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Merge git://git.kernel.org/pub/scm/linux/kernel/git/mason/btrfs-unstable
[deliverable/linux.git] / sound / pci / oxygen / virtuoso.c
CommitLineData
1b8ff22f
CL		 1/*
2 * C-Media CMI8788 driver for Asus Xonar cards
3 *
4 * Copyright (c) Clemens Ladisch <clemens@ladisch.de>
5 *
6 *
7 * This driver is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License, version 2.
9 *
10 * This driver is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
14 *
15 * You should have received a copy of the GNU General Public License
16 * along with this driver; if not, write to the Free Software
17 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
18 */
19
20/*
a9d3cc48
CL		 21 * Xonar D2/D2X
22 * ------------
23 *
878ac3ee
CL		 24 * CMI8788:
25 *
1b8ff22f 26 * SPI 0 -> 1st PCM1796 (front)
7113e958 27 * SPI 1 -> 2nd PCM1796 (surround)
1b8ff22f 28 * SPI 2 -> 3rd PCM1796 (center/LFE)
6ce6c473 29 * SPI 4 -> 4th PCM1796 (back)
1b8ff22f
CL		 30 *
31 * GPIO 2 -> M0 of CS5381
32 * GPIO 3 -> M1 of CS5381
878ac3ee 33 * GPIO 5 <- external power present (D2X only)
1b8ff22f 34 * GPIO 7 -> ALT
878ac3ee 35 * GPIO 8 -> enable output to speakers
1b8ff22f
CL		 36 */
37
a9d3cc48 38/*
5430c72b
CL		 39 * Xonar D1/DX
40 * -----------
a9d3cc48
CL		 41 *
42 * CMI8788:
43 *
44 * I²C <-> CS4398 (front)
45 * <-> CS4362A (surround, center/LFE, back)
46 *
5430c72b 47 * GPI 0 <- external power present (DX only)
a9d3cc48
CL		 48 *
49 * GPIO 0 -> enable output to speakers
a8bb1bad 50 * GPIO 1 -> enable front panel I/O
a9d3cc48
CL		 51 * GPIO 2 -> M0 of CS5361
52 * GPIO 3 -> M1 of CS5361
11864b4b 53 * GPIO 8 -> route input jack to line-in (0) or mic-in (1)
a9d3cc48
CL		 54 *
55 * CS4398:
56 *
57 * AD0 <- 1
58 * AD1 <- 1
59 *
60 * CS4362A:
61 *
62 * AD0 <- 0
63 */
64
7407a2e4
CL		 65/*
66 * Xonar HDAV1.3 (Deluxe)
67 * ----------------------
68 *
69 * CMI8788:
70 *
71 * I²C <-> PCM1796 (front)
72 *
73 * GPI 0 <- external power present
74 *
75 * GPIO 0 -> enable output to speakers
76 * GPIO 2 -> M0 of CS5381
77 * GPIO 3 -> M1 of CS5381
78 * GPIO 8 -> route input jack to line-in (0) or mic-in (1)
79 *
80 * TXD -> HDMI controller
81 * RXD <- HDMI controller
82 *
83 * PCM1796 front: AD1,0 <- 0,0
84 *
85 * no daughterboard
86 * ----------------
87 *
88 * GPIO 4 <- 1
89 *
90 * H6 daughterboard
91 * ----------------
92 *
93 * GPIO 4 <- 0
94 * GPIO 5 <- 0
95 *
96 * I²C <-> PCM1796 (surround)
97 * <-> PCM1796 (center/LFE)
98 * <-> PCM1796 (back)
99 *
100 * PCM1796 surround: AD1,0 <- 0,1
101 * PCM1796 center/LFE: AD1,0 <- 1,0
102 * PCM1796 back: AD1,0 <- 1,1
103 *
104 * unknown daughterboard
105 * ---------------------
106 *
107 * GPIO 4 <- 0
108 * GPIO 5 <- 1
109 *
110 * I²C <-> CS4362A (surround, center/LFE, back)
111 *
112 * CS4362A: AD0 <- 0
113 */
114
930738de
CL		 115/*
116 * Xonar Essence STX
117 * -----------------
118 *
119 * CMI8788:
120 *
121 * I²C <-> PCM1792A
122 *
123 * GPI 0 <- external power present
124 *
125 * GPIO 0 -> enable output to speakers
126 * GPIO 1 -> route HP to front panel (0) or rear jack (1)
127 * GPIO 2 -> M0 of CS5381
128 * GPIO 3 -> M1 of CS5381
129 * GPIO 7 -> route output to speaker jacks (0) or HP (1)
130 * GPIO 8 -> route input jack to line-in (0) or mic-in (1)
131 *
132 * PCM1792A:
133 *
134 * AD0 <- 0
135 *
136 * H6 daughterboard
137 * ----------------
138 *
139 * GPIO 4 <- 0
140 * GPIO 5 <- 0
141 */
142
1b8ff22f
CL		 143#include <linux/pci.h>
144#include <linux/delay.h>
ccc80fb4
CL		 145#include <linux/mutex.h>
146#include <sound/ac97_codec.h>
7407a2e4 147#include <sound/asoundef.h>
1b8ff22f
CL		 148#include <sound/control.h>
149#include <sound/core.h>
150#include <sound/initval.h>
151#include <sound/pcm.h>
7407a2e4 152#include <sound/pcm_params.h>
1b8ff22f
CL		 153#include <sound/tlv.h>
154#include "oxygen.h"
878ac3ee 155#include "cm9780.h"
33fa724e 156#include "pcm1796.h"
a9d3cc48
CL		 157#include "cs4398.h"
158#include "cs4362a.h"
1b8ff22f
CL		 159
160MODULE_AUTHOR("Clemens Ladisch <clemens@ladisch.de>");
a9d3cc48 161MODULE_DESCRIPTION("Asus AVx00 driver");
d023dc0a 162MODULE_LICENSE("GPL v2");
a9d3cc48 163MODULE_SUPPORTED_DEVICE("{{Asus,AV100},{Asus,AV200}}");
1b8ff22f
CL		 164
165static int index[SNDRV_CARDS] = SNDRV_DEFAULT_IDX;
166static char *id[SNDRV_CARDS] = SNDRV_DEFAULT_STR;
167static int enable[SNDRV_CARDS] = SNDRV_DEFAULT_ENABLE_PNP;
168
169module_param_array(index, int, NULL, 0444);
170MODULE_PARM_DESC(index, "card index");
171module_param_array(id, charp, NULL, 0444);
172MODULE_PARM_DESC(id, "ID string");
173module_param_array(enable, bool, NULL, 0444);
174MODULE_PARM_DESC(enable, "enable card");
175
271ebfca
CL		 176enum {
177 MODEL_D2,
178 MODEL_D2X,
5430c72b 179 MODEL_D1,
a9d3cc48 180 MODEL_DX,
7407a2e4
CL		 181 MODEL_HDAV, /* without daughterboard */
182 MODEL_HDAV_H6, /* with H6 daughterboard */
930738de 183 MODEL_STX,
271ebfca
CL		 184};
185
1b8ff22f 186static struct pci_device_id xonar_ids[] __devinitdata = {
271ebfca 187 { OXYGEN_PCI_SUBID(0x1043, 0x8269), .driver_data = MODEL_D2 },
a9d3cc48 188 { OXYGEN_PCI_SUBID(0x1043, 0x8275), .driver_data = MODEL_DX },
271ebfca 189 { OXYGEN_PCI_SUBID(0x1043, 0x82b7), .driver_data = MODEL_D2X },
7407a2e4 190 { OXYGEN_PCI_SUBID(0x1043, 0x8314), .driver_data = MODEL_HDAV },
5430c72b 191 { OXYGEN_PCI_SUBID(0x1043, 0x834f), .driver_data = MODEL_D1 },
930738de 192 { OXYGEN_PCI_SUBID(0x1043, 0x835c), .driver_data = MODEL_STX },
30459d7b 193 { OXYGEN_PCI_SUBID_BROKEN_EEPROM },
1b8ff22f
CL		 194 { }
195};
196MODULE_DEVICE_TABLE(pci, xonar_ids);
197
878ac3ee 198
a694a6a0
CL		 199#define GPIO_CS53x1_M_MASK 0x000c
200#define GPIO_CS53x1_M_SINGLE 0x0000
201#define GPIO_CS53x1_M_DOUBLE 0x0004
202#define GPIO_CS53x1_M_QUAD 0x0008
203
af9af174
CL		 204#define GPIO_D2X_EXT_POWER 0x0020
205#define GPIO_D2_ALT 0x0080
206#define GPIO_D2_OUTPUT_ENABLE 0x0100
878ac3ee 207
a9d3cc48
CL		 208#define GPI_DX_EXT_POWER 0x01
209#define GPIO_DX_OUTPUT_ENABLE 0x0001
a8bb1bad 210#define GPIO_DX_FRONT_PANEL 0x0002
11864b4b 211#define GPIO_DX_INPUT_ROUTE 0x0100
a9d3cc48 212
7407a2e4
CL		 213#define GPIO_HDAV_DB_MASK 0x0030
214#define GPIO_HDAV_DB_H6 0x0000
215#define GPIO_HDAV_DB_XX 0x0020
216
930738de
CL		 217#define GPIO_ST_HP_REAR 0x0002
218#define GPIO_ST_HP 0x0080
219
4f50d2fd 220#define I2C_DEVICE_PCM1796(i) (0x98 + ((i) << 1)) /* 10011, ADx=i, /W=0 */
a9d3cc48
CL		 221#define I2C_DEVICE_CS4398 0x9e /* 10011, AD1=1, AD0=1, /W=0 */
222#define I2C_DEVICE_CS4362A 0x30 /* 001100, AD0=0, /W=0 */
223
7c014159 224struct xonar_data {
af9af174 225 unsigned int anti_pop_delay;
70c27d34 226 unsigned int dacs;
af9af174
CL		 227 u16 output_enable_bit;
228 u8 ext_power_reg;
229 u8 ext_power_int_reg;
230 u8 ext_power_bit;
7c014159 231 u8 has_power;
e58aee95
CL		 232 u8 pcm1796_oversampling;
233 u8 cs4398_fm;
234 u8 cs4362a_fm;
7407a2e4 235 u8 hdmi_params[5];
7c014159
CL		 236};
237
fe10662c
CL		 238static void xonar_gpio_changed(struct oxygen *chip);
239
4f50d2fd
CL		 240static inline void pcm1796_write_spi(struct oxygen *chip, unsigned int codec,
241 u8 reg, u8 value)
1b8ff22f
CL		 242{
243 /* maps ALSA channel pair number to SPI output */
244 static const u8 codec_map[4] = {
7113e958 245 0, 1, 2, 4
1b8ff22f 246 };
c2353a08 247 oxygen_write_spi(chip, OXYGEN_SPI_TRIGGER |
1b8ff22f 248 OXYGEN_SPI_DATA_LENGTH_2 |
c2353a08 249 OXYGEN_SPI_CLOCK_160 |
1b8ff22f 250 (codec_map[codec] << OXYGEN_SPI_CODEC_SHIFT) |
c2353a08 251 OXYGEN_SPI_CEN_LATCH_CLOCK_HI,
1b8ff22f
CL		 252 (reg << 8) | value);
253}
254
4f50d2fd
CL		 255static inline void pcm1796_write_i2c(struct oxygen *chip, unsigned int codec,
256 u8 reg, u8 value)
257{
258 oxygen_write_i2c(chip, I2C_DEVICE_PCM1796(codec), reg, value);
259}
260
261static void pcm1796_write(struct oxygen *chip, unsigned int codec,
262 u8 reg, u8 value)
263{
264 if ((chip->model.function_flags & OXYGEN_FUNCTION_2WIRE_SPI_MASK) ==
265 OXYGEN_FUNCTION_SPI)
266 pcm1796_write_spi(chip, codec, reg, value);
267 else
268 pcm1796_write_i2c(chip, codec, reg, value);
269}
270
a9d3cc48
CL		 271static void cs4398_write(struct oxygen *chip, u8 reg, u8 value)
272{
273 oxygen_write_i2c(chip, I2C_DEVICE_CS4398, reg, value);
274}
275
276static void cs4362a_write(struct oxygen *chip, u8 reg, u8 value)
277{
278 oxygen_write_i2c(chip, I2C_DEVICE_CS4362A, reg, value);
279}
280
7407a2e4
CL		 281static void hdmi_write_command(struct oxygen *chip, u8 command,
282 unsigned int count, const u8 *params)
283{
284 unsigned int i;
285 u8 checksum;
286
287 oxygen_write_uart(chip, 0xfb);
288 oxygen_write_uart(chip, 0xef);
289 oxygen_write_uart(chip, command);
290 oxygen_write_uart(chip, count);
291 for (i = 0; i < count; ++i)
292 oxygen_write_uart(chip, params[i]);
293 checksum = 0xfb + 0xef + command + count;
294 for (i = 0; i < count; ++i)
295 checksum += params[i];
296 oxygen_write_uart(chip, checksum);
297}
298
92215f3a
CL		 299static void xonar_enable_output(struct oxygen *chip)
300{
301 struct xonar_data *data = chip->model_data;
302
303 msleep(data->anti_pop_delay);
304 oxygen_set_bits16(chip, OXYGEN_GPIO_DATA, data->output_enable_bit);
305}
306
af9af174
CL		 307static void xonar_common_init(struct oxygen *chip)
308{
309 struct xonar_data *data = chip->model_data;
310
311 if (data->ext_power_reg) {
312 oxygen_set_bits8(chip, data->ext_power_int_reg,
313 data->ext_power_bit);
314 chip->interrupt_mask |= OXYGEN_INT_GPIO;
fe10662c 315 chip->model.gpio_changed = xonar_gpio_changed;
af9af174
CL		 316 data->has_power = !!(oxygen_read8(chip, data->ext_power_reg)
317 & data->ext_power_bit);
318 }
92215f3a
CL		 319 oxygen_set_bits16(chip, OXYGEN_GPIO_CONTROL,
320 GPIO_CS53x1_M_MASK | data->output_enable_bit);
af9af174
CL		 321 oxygen_write16_masked(chip, OXYGEN_GPIO_DATA,
322 GPIO_CS53x1_M_SINGLE, GPIO_CS53x1_M_MASK);
323 oxygen_ac97_set_bits(chip, 0, CM9780_JACK, CM9780_FMIC2MIC);
92215f3a 324 xonar_enable_output(chip);
af9af174
CL		 325}
326
bbbfb552
CL		 327static void update_pcm1796_volume(struct oxygen *chip)
328{
70c27d34 329 struct xonar_data *data = chip->model_data;
bbbfb552
CL		 330 unsigned int i;
331
70c27d34 332 for (i = 0; i < data->dacs; ++i) {
bbbfb552
CL		 333 pcm1796_write(chip, i, 16, chip->dac_volume[i * 2]);
334 pcm1796_write(chip, i, 17, chip->dac_volume[i * 2 + 1]);
335 }
336}
337
338static void update_pcm1796_mute(struct oxygen *chip)
339{
70c27d34 340 struct xonar_data *data = chip->model_data;
bbbfb552
CL		 341 unsigned int i;
342 u8 value;
343
344 value = PCM1796_DMF_DISABLED | PCM1796_FMT_24_LJUST | PCM1796_ATLD;
345 if (chip->dac_mute)
346 value |= PCM1796_MUTE;
70c27d34 347 for (i = 0; i < data->dacs; ++i)
bbbfb552
CL		 348 pcm1796_write(chip, i, 18, value);
349}
350
75146fc0 351static void pcm1796_init(struct oxygen *chip)
1b8ff22f 352{
af9af174 353 struct xonar_data *data = chip->model_data;
1b8ff22f
CL		 354 unsigned int i;
355
70c27d34 356 for (i = 0; i < data->dacs; ++i) {
878ac3ee 357 pcm1796_write(chip, i, 19, PCM1796_FLT_SHARP | PCM1796_ATS_1);
e58aee95 358 pcm1796_write(chip, i, 20, data->pcm1796_oversampling);
878ac3ee 359 pcm1796_write(chip, i, 21, 0);
1b8ff22f 360 }
bbbfb552
CL		 361 update_pcm1796_mute(chip); /* set ATLD before ATL/ATR */
362 update_pcm1796_volume(chip);
75146fc0
CL		 363}
364
365static void xonar_d2_init(struct oxygen *chip)
366{
367 struct xonar_data *data = chip->model_data;
368
369 data->anti_pop_delay = 300;
30459d7b 370 data->dacs = 4;
75146fc0
CL		 371 data->output_enable_bit = GPIO_D2_OUTPUT_ENABLE;
372 data->pcm1796_oversampling = PCM1796_OS_64;
373
374 pcm1796_init(chip);
1b8ff22f 375
af9af174
CL		 376 oxygen_set_bits16(chip, OXYGEN_GPIO_CONTROL, GPIO_D2_ALT);
377 oxygen_clear_bits16(chip, OXYGEN_GPIO_DATA, GPIO_D2_ALT);
378
379 xonar_common_init(chip);
1b8ff22f
CL		 380
381 snd_component_add(chip->card, "PCM1796");
382 snd_component_add(chip->card, "CS5381");
383}
384
30459d7b
CL		 385static void xonar_d2x_init(struct oxygen *chip)
386{
387 struct xonar_data *data = chip->model_data;
388
389 data->ext_power_reg = OXYGEN_GPIO_DATA;
390 data->ext_power_int_reg = OXYGEN_GPIO_INTERRUPT_MASK;
391 data->ext_power_bit = GPIO_D2X_EXT_POWER;
392 oxygen_clear_bits16(chip, OXYGEN_GPIO_CONTROL, GPIO_D2X_EXT_POWER);
393
394 xonar_d2_init(chip);
395}
396
bbbfb552
CL		 397static void update_cs4362a_volumes(struct oxygen *chip)
398{
399 u8 mute;
400
401 mute = chip->dac_mute ? CS4362A_MUTE : 0;
402 cs4362a_write(chip, 7, (127 - chip->dac_volume[2]) | mute);
403 cs4362a_write(chip, 8, (127 - chip->dac_volume[3]) | mute);
404 cs4362a_write(chip, 10, (127 - chip->dac_volume[4]) | mute);
405 cs4362a_write(chip, 11, (127 - chip->dac_volume[5]) | mute);
406 cs4362a_write(chip, 13, (127 - chip->dac_volume[6]) | mute);
407 cs4362a_write(chip, 14, (127 - chip->dac_volume[7]) | mute);
408}
409
410static void update_cs43xx_volume(struct oxygen *chip)
411{
412 cs4398_write(chip, 5, (127 - chip->dac_volume[0]) * 2);
413 cs4398_write(chip, 6, (127 - chip->dac_volume[1]) * 2);
414 update_cs4362a_volumes(chip);
415}
416
417static void update_cs43xx_mute(struct oxygen *chip)
418{
419 u8 reg;
420
421 reg = CS4398_MUTEP_LOW | CS4398_PAMUTE;
422 if (chip->dac_mute)
423 reg |= CS4398_MUTE_B | CS4398_MUTE_A;
424 cs4398_write(chip, 4, reg);
425 update_cs4362a_volumes(chip);
426}
427
75146fc0 428static void cs43xx_init(struct oxygen *chip)
a9d3cc48
CL		 429{
430 struct xonar_data *data = chip->model_data;
a9d3cc48 431
a9d3cc48
CL		 432 /* set CPEN (control port mode) and power down */
433 cs4398_write(chip, 8, CS4398_CPEN | CS4398_PDN);
434 cs4362a_write(chip, 0x01, CS4362A_PDN | CS4362A_CPEN);
435 /* configure */
e58aee95 436 cs4398_write(chip, 2, data->cs4398_fm);
a9d3cc48 437 cs4398_write(chip, 3, CS4398_ATAPI_B_R | CS4398_ATAPI_A_L);
a9d3cc48
CL		 438 cs4398_write(chip, 7, CS4398_RMP_DN | CS4398_RMP_UP |
439 CS4398_ZERO_CROSS | CS4398_SOFT_RAMP);
440 cs4362a_write(chip, 0x02, CS4362A_DIF_LJUST);
441 cs4362a_write(chip, 0x03, CS4362A_MUTEC_6 | CS4362A_AMUTE |
442 CS4362A_RMP_UP | CS4362A_ZERO_CROSS | CS4362A_SOFT_RAMP);
443 cs4362a_write(chip, 0x04, CS4362A_RMP_DN | CS4362A_DEM_NONE);
444 cs4362a_write(chip, 0x05, 0);
e58aee95 445 cs4362a_write(chip, 0x06, data->cs4362a_fm);
e58aee95 446 cs4362a_write(chip, 0x09, data->cs4362a_fm);
e58aee95 447 cs4362a_write(chip, 0x0c, data->cs4362a_fm);
bbbfb552
CL		 448 update_cs43xx_volume(chip);
449 update_cs43xx_mute(chip);
a9d3cc48
CL		 450 /* clear power down */
451 cs4398_write(chip, 8, CS4398_CPEN);
452 cs4362a_write(chip, 0x01, CS4362A_CPEN);
75146fc0
CL		 453}
454
5430c72b 455static void xonar_d1_init(struct oxygen *chip)
75146fc0
CL		 456{
457 struct xonar_data *data = chip->model_data;
458
459 data->anti_pop_delay = 800;
460 data->output_enable_bit = GPIO_DX_OUTPUT_ENABLE;
75146fc0
CL		 461 data->cs4398_fm = CS4398_FM_SINGLE | CS4398_DEM_NONE | CS4398_DIF_LJUST;
462 data->cs4362a_fm = CS4362A_FM_SINGLE |
463 CS4362A_ATAPI_B_R | CS4362A_ATAPI_A_L;
464
465 oxygen_write16(chip, OXYGEN_2WIRE_BUS_STATUS,
466 OXYGEN_2WIRE_LENGTH_8 |
467 OXYGEN_2WIRE_INTERRUPT_MASK |
468 OXYGEN_2WIRE_SPEED_FAST);
469
470 cs43xx_init(chip);
a9d3cc48
CL		 471
472 oxygen_set_bits16(chip, OXYGEN_GPIO_CONTROL,
a8bb1bad
CL		 473 GPIO_DX_FRONT_PANEL | GPIO_DX_INPUT_ROUTE);
474 oxygen_clear_bits16(chip, OXYGEN_GPIO_DATA,
475 GPIO_DX_FRONT_PANEL | GPIO_DX_INPUT_ROUTE);
a9d3cc48
CL		 476
477 xonar_common_init(chip);
478
479 snd_component_add(chip->card, "CS4398");
480 snd_component_add(chip->card, "CS4362A");
481 snd_component_add(chip->card, "CS5361");
482}
483
30459d7b
CL		 484static void xonar_dx_init(struct oxygen *chip)
485{
486 struct xonar_data *data = chip->model_data;
487
488 data->ext_power_reg = OXYGEN_GPI_DATA;
489 data->ext_power_int_reg = OXYGEN_GPI_INTERRUPT_MASK;
490 data->ext_power_bit = GPI_DX_EXT_POWER;
491
492 xonar_d1_init(chip);
493}
494
7407a2e4
CL		 495static void xonar_hdav_init(struct oxygen *chip)
496{
497 struct xonar_data *data = chip->model_data;
498 u8 param;
499
500 oxygen_write16(chip, OXYGEN_2WIRE_BUS_STATUS,
501 OXYGEN_2WIRE_LENGTH_8 |
502 OXYGEN_2WIRE_INTERRUPT_MASK |
503 OXYGEN_2WIRE_SPEED_FAST);
504
505 data->anti_pop_delay = 100;
30459d7b 506 data->dacs = chip->model.private_data == MODEL_HDAV_H6 ? 4 : 1;
7407a2e4
CL		 507 data->output_enable_bit = GPIO_DX_OUTPUT_ENABLE;
508 data->ext_power_reg = OXYGEN_GPI_DATA;
509 data->ext_power_int_reg = OXYGEN_GPI_INTERRUPT_MASK;
510 data->ext_power_bit = GPI_DX_EXT_POWER;
511 data->pcm1796_oversampling = PCM1796_OS_64;
512
513 pcm1796_init(chip);
514
515 oxygen_set_bits16(chip, OXYGEN_GPIO_CONTROL, GPIO_DX_INPUT_ROUTE);
516 oxygen_clear_bits16(chip, OXYGEN_GPIO_DATA, GPIO_DX_INPUT_ROUTE);
517
518 oxygen_reset_uart(chip);
519 param = 0;
520 hdmi_write_command(chip, 0x61, 1, &param);
521 param = 1;
522 hdmi_write_command(chip, 0x74, 1, &param);
523 data->hdmi_params[1] = IEC958_AES3_CON_FS_48000;
524 data->hdmi_params[4] = 1;
525 hdmi_write_command(chip, 0x54, 5, data->hdmi_params);
526
527 xonar_common_init(chip);
528
529 snd_component_add(chip->card, "PCM1796");
530 snd_component_add(chip->card, "CS5381");
531}
532
930738de
CL		 533static void xonar_stx_init(struct oxygen *chip)
534{
535 struct xonar_data *data = chip->model_data;
536
537 oxygen_write16(chip, OXYGEN_2WIRE_BUS_STATUS,
538 OXYGEN_2WIRE_LENGTH_8 |
539 OXYGEN_2WIRE_INTERRUPT_MASK |
540 OXYGEN_2WIRE_SPEED_FAST);
541
542 data->anti_pop_delay = 100;
543 data->dacs = 1;
544 data->output_enable_bit = GPIO_DX_OUTPUT_ENABLE;
545 data->ext_power_reg = OXYGEN_GPI_DATA;
546 data->ext_power_int_reg = OXYGEN_GPI_INTERRUPT_MASK;
547 data->ext_power_bit = GPI_DX_EXT_POWER;
548 data->pcm1796_oversampling = PCM1796_OS_64;
549
550 pcm1796_init(chip);
551
552 oxygen_set_bits16(chip, OXYGEN_GPIO_CONTROL,
553 GPIO_DX_INPUT_ROUTE | GPIO_ST_HP_REAR | GPIO_ST_HP);
554 oxygen_clear_bits16(chip, OXYGEN_GPIO_DATA,
555 GPIO_DX_INPUT_ROUTE | GPIO_ST_HP_REAR | GPIO_ST_HP);
556
557 xonar_common_init(chip);
558
559 snd_component_add(chip->card, "PCM1792A");
560 snd_component_add(chip->card, "CS5381");
561}
562
c2bc4ff5 563static void xonar_disable_output(struct oxygen *chip)
1b8ff22f 564{
af9af174
CL		 565 struct xonar_data *data = chip->model_data;
566
567 oxygen_clear_bits16(chip, OXYGEN_GPIO_DATA, data->output_enable_bit);
1b8ff22f
CL		 568}
569
c2bc4ff5
CL		 570static void xonar_d2_cleanup(struct oxygen *chip)
571{
572 xonar_disable_output(chip);
573}
574
5430c72b 575static void xonar_d1_cleanup(struct oxygen *chip)
a9d3cc48 576{
c2bc4ff5 577 xonar_disable_output(chip);
a9d3cc48
CL		 578 cs4362a_write(chip, 0x01, CS4362A_PDN | CS4362A_CPEN);
579 oxygen_clear_bits8(chip, OXYGEN_FUNCTION, OXYGEN_FUNCTION_RESET_CODEC);
580}
581
7407a2e4
CL		 582static void xonar_hdav_cleanup(struct oxygen *chip)
583{
584 u8 param = 0;
585
586 hdmi_write_command(chip, 0x74, 1, &param);
587 xonar_disable_output(chip);
588}
589
930738de
CL		 590static void xonar_st_cleanup(struct oxygen *chip)
591{
592 xonar_disable_output(chip);
593}
594
c2bc4ff5
CL		 595static void xonar_d2_suspend(struct oxygen *chip)
596{
597 xonar_d2_cleanup(chip);
598}
599
600static void xonar_d1_suspend(struct oxygen *chip)
601{
602 xonar_d1_cleanup(chip);
603}
604
7407a2e4
CL		 605static void xonar_hdav_suspend(struct oxygen *chip)
606{
607 xonar_hdav_cleanup(chip);
608 msleep(2);
609}
610
930738de
CL		 611static void xonar_st_suspend(struct oxygen *chip)
612{
613 xonar_st_cleanup(chip);
614}
615
4a4bc53b
CL		 616static void xonar_d2_resume(struct oxygen *chip)
617{
618 pcm1796_init(chip);
619 xonar_enable_output(chip);
620}
621
5430c72b 622static void xonar_d1_resume(struct oxygen *chip)
4a4bc53b
CL		 623{
624 cs43xx_init(chip);
625 xonar_enable_output(chip);
626}
627
7407a2e4
CL		 628static void xonar_hdav_resume(struct oxygen *chip)
629{
630 struct xonar_data *data = chip->model_data;
631 u8 param;
632
633 oxygen_reset_uart(chip);
634 param = 0;
635 hdmi_write_command(chip, 0x61, 1, &param);
636 param = 1;
637 hdmi_write_command(chip, 0x74, 1, &param);
638 hdmi_write_command(chip, 0x54, 5, data->hdmi_params);
639 pcm1796_init(chip);
640 xonar_enable_output(chip);
641}
642
930738de
CL		 643static void xonar_st_resume(struct oxygen *chip)
644{
645 pcm1796_init(chip);
646 xonar_enable_output(chip);
647}
648
7407a2e4
CL		 649static void xonar_hdav_pcm_hardware_filter(unsigned int channel,
650 struct snd_pcm_hardware *hardware)
651{
652 if (channel == PCM_MULTICH) {
653 hardware->rates = SNDRV_PCM_RATE_44100 |
654 SNDRV_PCM_RATE_48000 |
655 SNDRV_PCM_RATE_96000 |
656 SNDRV_PCM_RATE_192000;
657 hardware->rate_min = 44100;
658 }
659}
660
1b8ff22f
CL		 661static void set_pcm1796_params(struct oxygen *chip,
662 struct snd_pcm_hw_params *params)
663{
e58aee95 664 struct xonar_data *data = chip->model_data;
1b8ff22f 665 unsigned int i;
1b8ff22f 666
e58aee95
CL		 667 data->pcm1796_oversampling =
668 params_rate(params) >= 96000 ? PCM1796_OS_32 : PCM1796_OS_64;
70c27d34 669 for (i = 0; i < data->dacs; ++i)
e58aee95 670 pcm1796_write(chip, i, 20, data->pcm1796_oversampling);
1b8ff22f
CL		 671}
672
a694a6a0 673static void set_cs53x1_params(struct oxygen *chip,
1b8ff22f
CL		 674 struct snd_pcm_hw_params *params)
675{
676 unsigned int value;
677
678 if (params_rate(params) <= 54000)
a694a6a0 679 value = GPIO_CS53x1_M_SINGLE;
1b8ff22f 680 else if (params_rate(params) <= 108000)
a694a6a0 681 value = GPIO_CS53x1_M_DOUBLE;
1b8ff22f 682 else
a694a6a0 683 value = GPIO_CS53x1_M_QUAD;
878ac3ee 684 oxygen_write16_masked(chip, OXYGEN_GPIO_DATA,
a694a6a0 685 value, GPIO_CS53x1_M_MASK);
1b8ff22f
CL		 686}
687
a9d3cc48
CL		 688static void set_cs43xx_params(struct oxygen *chip,
689 struct snd_pcm_hw_params *params)
690{
e58aee95 691 struct xonar_data *data = chip->model_data;
a9d3cc48 692
e58aee95
CL		 693 data->cs4398_fm = CS4398_DEM_NONE | CS4398_DIF_LJUST;
694 data->cs4362a_fm = CS4362A_ATAPI_B_R | CS4362A_ATAPI_A_L;
a9d3cc48 695 if (params_rate(params) <= 50000) {
e58aee95
CL		 696 data->cs4398_fm |= CS4398_FM_SINGLE;
697 data->cs4362a_fm |= CS4362A_FM_SINGLE;
a9d3cc48 698 } else if (params_rate(params) <= 100000) {
e58aee95
CL		 699 data->cs4398_fm |= CS4398_FM_DOUBLE;
700 data->cs4362a_fm |= CS4362A_FM_DOUBLE;
a9d3cc48 701 } else {
e58aee95
CL		 702 data->cs4398_fm |= CS4398_FM_QUAD;
703 data->cs4362a_fm |= CS4362A_FM_QUAD;
a9d3cc48 704 }
e58aee95
CL		 705 cs4398_write(chip, 2, data->cs4398_fm);
706 cs4362a_write(chip, 0x06, data->cs4362a_fm);
707 cs4362a_write(chip, 0x09, data->cs4362a_fm);
708 cs4362a_write(chip, 0x0c, data->cs4362a_fm);
a9d3cc48
CL		 709}
710
7407a2e4
CL		 711static void set_hdmi_params(struct oxygen *chip,
712 struct snd_pcm_hw_params *params)
713{
714 struct xonar_data *data = chip->model_data;
715
716 data->hdmi_params[0] = 0; /* 1 = non-audio */
717 switch (params_rate(params)) {
718 case 44100:
719 data->hdmi_params[1] = IEC958_AES3_CON_FS_44100;
720 break;
721 case 48000:
722 data->hdmi_params[1] = IEC958_AES3_CON_FS_48000;
723 break;
724 default: /* 96000 */
725 data->hdmi_params[1] = IEC958_AES3_CON_FS_96000;
726 break;
727 case 192000:
728 data->hdmi_params[1] = IEC958_AES3_CON_FS_192000;
729 break;
730 }
731 data->hdmi_params[2] = params_channels(params) / 2 - 1;
732 if (params_format(params) == SNDRV_PCM_FORMAT_S16_LE)
733 data->hdmi_params[3] = 0;
734 else
735 data->hdmi_params[3] = 0xc0;
736 data->hdmi_params[4] = 1; /* ? */
737 hdmi_write_command(chip, 0x54, 5, data->hdmi_params);
738}
739
740static void set_hdav_params(struct oxygen *chip,
741 struct snd_pcm_hw_params *params)
742{
743 set_pcm1796_params(chip, params);
744 set_hdmi_params(chip, params);
745}
746
7c014159
CL		 747static void xonar_gpio_changed(struct oxygen *chip)
748{
749 struct xonar_data *data = chip->model_data;
750 u8 has_power;
751
af9af174
CL		 752 has_power = !!(oxygen_read8(chip, data->ext_power_reg)
753 & data->ext_power_bit);
7c014159
CL		 754 if (has_power != data->has_power) {
755 data->has_power = has_power;
756 if (has_power) {
757 snd_printk(KERN_NOTICE "power restored\n");
758 } else {
759 snd_printk(KERN_CRIT
760 "Hey! Don't unplug the power cable!\n");
761 /* TODO: stop PCMs */
762 }
763 }
764}
765
7407a2e4
CL		 766static void xonar_hdav_uart_input(struct oxygen *chip)
767{
768 if (chip->uart_input_count >= 2 &&
769 chip->uart_input[chip->uart_input_count - 2] == 'O' &&
770 chip->uart_input[chip->uart_input_count - 1] == 'K') {
45bf8101 771 printk(KERN_DEBUG "message from Xonar HDAV HDMI chip received:\n");
7407a2e4
CL		 772 print_hex_dump_bytes("", DUMP_PREFIX_OFFSET,
773 chip->uart_input, chip->uart_input_count);
774 chip->uart_input_count = 0;
775 }
776}
777
c3f00739
CL		 778static int gpio_bit_switch_get(struct snd_kcontrol *ctl,
779 struct snd_ctl_elem_value *value)
1b8ff22f
CL		 780{
781 struct oxygen *chip = ctl->private_data;
c3f00739 782 u16 bit = ctl->private_value;
1b8ff22f
CL		 783
784 value->value.integer.value[0] =
c3f00739 785 !!(oxygen_read16(chip, OXYGEN_GPIO_DATA) & bit);
1b8ff22f
CL		 786 return 0;
787}
788
c3f00739
CL		 789static int gpio_bit_switch_put(struct snd_kcontrol *ctl,
790 struct snd_ctl_elem_value *value)
1b8ff22f
CL		 791{
792 struct oxygen *chip = ctl->private_data;
c3f00739 793 u16 bit = ctl->private_value;
1b8ff22f
CL		 794 u16 old_bits, new_bits;
795 int changed;
796
797 spin_lock_irq(&chip->reg_lock);
798 old_bits = oxygen_read16(chip, OXYGEN_GPIO_DATA);
799 if (value->value.integer.value[0])
c3f00739 800 new_bits = old_bits | bit;
1b8ff22f 801 else
c3f00739 802 new_bits = old_bits & ~bit;
1b8ff22f
CL		 803 changed = new_bits != old_bits;
804 if (changed)
805 oxygen_write16(chip, OXYGEN_GPIO_DATA, new_bits);
806 spin_unlock_irq(&chip->reg_lock);
807 return changed;
808}
809
810static const struct snd_kcontrol_new alt_switch = {
811 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
812 .name = "Analog Loopback Switch",
813 .info = snd_ctl_boolean_mono_info,
c3f00739
CL		 814 .get = gpio_bit_switch_get,
815 .put = gpio_bit_switch_put,
816 .private_value = GPIO_D2_ALT,
1b8ff22f
CL		 817};
818
a8bb1bad 819static const struct snd_kcontrol_new front_panel_switch = {
387fb6a2 820 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
a8bb1bad
CL		 821 .name = "Front Panel Switch",
822 .info = snd_ctl_boolean_mono_info,
c3f00739
CL		 823 .get = gpio_bit_switch_get,
824 .put = gpio_bit_switch_put,
825 .private_value = GPIO_DX_FRONT_PANEL,
387fb6a2
CL		 826};
827
930738de
CL		 828static int st_output_switch_info(struct snd_kcontrol *ctl,
829 struct snd_ctl_elem_info *info)
830{
831 static const char *const names[3] = {
832 "Speakers", "Headphones", "FP Headphones"
833 };
834
835 info->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED;
836 info->count = 1;
837 info->value.enumerated.items = 3;
838 if (info->value.enumerated.item >= 3)
839 info->value.enumerated.item = 2;
840 strcpy(info->value.enumerated.name, names[info->value.enumerated.item]);
841 return 0;
842}
843
844static int st_output_switch_get(struct snd_kcontrol *ctl,
845 struct snd_ctl_elem_value *value)
846{
847 struct oxygen *chip = ctl->private_data;
848 u16 gpio;
849
850 gpio = oxygen_read16(chip, OXYGEN_GPIO_DATA);
851 if (!(gpio & GPIO_ST_HP))
852 value->value.enumerated.item[0] = 0;
853 else if (gpio & GPIO_ST_HP_REAR)
854 value->value.enumerated.item[0] = 1;
855 else
856 value->value.enumerated.item[0] = 2;
857 return 0;
858}
859
860
861static int st_output_switch_put(struct snd_kcontrol *ctl,
862 struct snd_ctl_elem_value *value)
863{
864 struct oxygen *chip = ctl->private_data;
865 u16 gpio_old, gpio;
866
867 mutex_lock(&chip->mutex);
868 gpio_old = oxygen_read16(chip, OXYGEN_GPIO_DATA);
869 gpio = gpio_old;
870 switch (value->value.enumerated.item[0]) {
871 case 0:
872 gpio &= ~(GPIO_ST_HP | GPIO_ST_HP_REAR);
873 break;
874 case 1:
875 gpio |= GPIO_ST_HP | GPIO_ST_HP_REAR;
876 break;
877 case 2:
878 gpio = (gpio | GPIO_ST_HP) & ~GPIO_ST_HP_REAR;
879 break;
880 }
881 oxygen_write16(chip, OXYGEN_GPIO_DATA, gpio);
882 mutex_unlock(&chip->mutex);
883 return gpio != gpio_old;
884}
885
886static const struct snd_kcontrol_new st_output_switch = {
887 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
888 .name = "Analog Output",
889 .info = st_output_switch_info,
890 .get = st_output_switch_get,
891 .put = st_output_switch_put,
892};
893
c871c4a8
CL		 894static void xonar_line_mic_ac97_switch(struct oxygen *chip,
895 unsigned int reg, unsigned int mute)
11864b4b
CL		 896{
897 if (reg == AC97_LINE) {
898 spin_lock_irq(&chip->reg_lock);
899 oxygen_write16_masked(chip, OXYGEN_GPIO_DATA,
900 mute ? GPIO_DX_INPUT_ROUTE : 0,
901 GPIO_DX_INPUT_ROUTE);
902 spin_unlock_irq(&chip->reg_lock);
903 }
904}
905
eacbb9db
CL		 906static const DECLARE_TLV_DB_SCALE(pcm1796_db_scale, -6000, 50, 0);
907static const DECLARE_TLV_DB_SCALE(cs4362a_db_scale, -6000, 100, 0);
1b8ff22f 908
af9af174 909static int xonar_d2_control_filter(struct snd_kcontrol_new *template)
ccc80fb4 910{
4972a177 911 if (!strncmp(template->name, "CD Capture ", 11))
911b499a 912 /* CD in is actually connected to the video in pin */
ccc80fb4 913 template->private_value ^= AC97_CD ^ AC97_VIDEO;
ccc80fb4
CL		 914 return 0;
915}
916
5430c72b 917static int xonar_d1_control_filter(struct snd_kcontrol_new *template)
a9d3cc48 918{
4972a177 919 if (!strncmp(template->name, "CD Capture ", 11))
a9d3cc48 920 return 1; /* no CD input */
a9d3cc48
CL		 921 return 0;
922}
923
930738de
CL		 924static int xonar_st_control_filter(struct snd_kcontrol_new *template)
925{
926 if (!strncmp(template->name, "CD Capture ", 11))
927 return 1; /* no CD input */
928 if (!strcmp(template->name, "Stereo Upmixing"))
929 return 1; /* stereo only - we don't need upmixing */
930 return 0;
931}
932
fe10662c 933static int xonar_d2_mixer_init(struct oxygen *chip)
1b8ff22f
CL		 934{
935 return snd_ctl_add(chip->card, snd_ctl_new1(&alt_switch, chip));
936}
937
5430c72b 938static int xonar_d1_mixer_init(struct oxygen *chip)
387fb6a2 939{
a8bb1bad 940 return snd_ctl_add(chip->card, snd_ctl_new1(&front_panel_switch, chip));
387fb6a2
CL		 941}
942
930738de
CL		 943static int xonar_st_mixer_init(struct oxygen *chip)
944{
945 return snd_ctl_add(chip->card, snd_ctl_new1(&st_output_switch, chip));
946}
947
fe10662c
CL		 948static const struct oxygen_model model_xonar_d2 = {
949 .longname = "Asus Virtuoso 200",
950 .chip = "AV200",
fe10662c
CL		 951 .init = xonar_d2_init,
952 .control_filter = xonar_d2_control_filter,
953 .mixer_init = xonar_d2_mixer_init,
c2bc4ff5
CL		 954 .cleanup = xonar_d2_cleanup,
955 .suspend = xonar_d2_suspend,
fe10662c
CL		 956 .resume = xonar_d2_resume,
957 .set_dac_params = set_pcm1796_params,
958 .set_adc_params = set_cs53x1_params,
959 .update_dac_volume = update_pcm1796_volume,
960 .update_dac_mute = update_pcm1796_mute,
961 .dac_tlv = pcm1796_db_scale,
962 .model_data_size = sizeof(struct xonar_data),
d76596b1
CL		 963 .device_config = PLAYBACK_0_TO_I2S |
964 PLAYBACK_1_TO_SPDIF |
965 CAPTURE_0_FROM_I2S_2 |
dbbbd674
CL		 966 CAPTURE_1_FROM_SPDIF |
967 MIDI_OUTPUT |
968 MIDI_INPUT,
fe10662c 969 .dac_channels = 8,
eacbb9db
CL		 970 .dac_volume_min = 255 - 2*60,
971 .dac_volume_max = 255,
fe10662c 972 .misc_flags = OXYGEN_MISC_MIDI,
6ce6c473
CL		 973 .function_flags = OXYGEN_FUNCTION_SPI |
974 OXYGEN_FUNCTION_ENABLE_SPI_4_5,
975 .dac_i2s_format = OXYGEN_I2S_FORMAT_LJUST,
fe10662c
CL		 976 .adc_i2s_format = OXYGEN_I2S_FORMAT_LJUST,
977};
978
979static const struct oxygen_model model_xonar_d1 = {
980 .longname = "Asus Virtuoso 100",
981 .chip = "AV200",
fe10662c
CL		 982 .init = xonar_d1_init,
983 .control_filter = xonar_d1_control_filter,
984 .mixer_init = xonar_d1_mixer_init,
985 .cleanup = xonar_d1_cleanup,
c2bc4ff5 986 .suspend = xonar_d1_suspend,
fe10662c
CL		 987 .resume = xonar_d1_resume,
988 .set_dac_params = set_cs43xx_params,
989 .set_adc_params = set_cs53x1_params,
990 .update_dac_volume = update_cs43xx_volume,
991 .update_dac_mute = update_cs43xx_mute,
c871c4a8 992 .ac97_switch = xonar_line_mic_ac97_switch,
fe10662c
CL		 993 .dac_tlv = cs4362a_db_scale,
994 .model_data_size = sizeof(struct xonar_data),
d76596b1
CL		 995 .device_config = PLAYBACK_0_TO_I2S |
996 PLAYBACK_1_TO_SPDIF |
997 CAPTURE_0_FROM_I2S_2,
fe10662c 998 .dac_channels = 8,
eacbb9db 999 .dac_volume_min = 127 - 60,
fe10662c
CL		 1000 .dac_volume_max = 127,
1001 .function_flags = OXYGEN_FUNCTION_2WIRE,
1002 .dac_i2s_format = OXYGEN_I2S_FORMAT_LJUST,
1003 .adc_i2s_format = OXYGEN_I2S_FORMAT_LJUST,
1b8ff22f
CL		 1004};
1005
7407a2e4
CL		 1006static const struct oxygen_model model_xonar_hdav = {
1007 .longname = "Asus Virtuoso 200",
1008 .chip = "AV200",
7407a2e4
CL		 1009 .init = xonar_hdav_init,
1010 .cleanup = xonar_hdav_cleanup,
1011 .suspend = xonar_hdav_suspend,
1012 .resume = xonar_hdav_resume,
1013 .pcm_hardware_filter = xonar_hdav_pcm_hardware_filter,
1014 .set_dac_params = set_hdav_params,
1015 .set_adc_params = set_cs53x1_params,
1016 .update_dac_volume = update_pcm1796_volume,
1017 .update_dac_mute = update_pcm1796_mute,
1018 .uart_input = xonar_hdav_uart_input,
1019 .ac97_switch = xonar_line_mic_ac97_switch,
1020 .dac_tlv = pcm1796_db_scale,
1021 .model_data_size = sizeof(struct xonar_data),
1022 .device_config = PLAYBACK_0_TO_I2S |
1023 PLAYBACK_1_TO_SPDIF |
1024 CAPTURE_0_FROM_I2S_2,
1025 .dac_channels = 8,
eacbb9db
CL		 1026 .dac_volume_min = 255 - 2*60,
1027 .dac_volume_max = 255,
22c73378 1028 .misc_flags = OXYGEN_MISC_MIDI,
7407a2e4
CL		 1029 .function_flags = OXYGEN_FUNCTION_2WIRE,
1030 .dac_i2s_format = OXYGEN_I2S_FORMAT_LJUST,
1031 .adc_i2s_format = OXYGEN_I2S_FORMAT_LJUST,
1032};
1033
930738de
CL		 1034static const struct oxygen_model model_xonar_st = {
1035 .longname = "Asus Virtuoso 100",
1036 .chip = "AV200",
1037 .init = xonar_stx_init,
1038 .control_filter = xonar_st_control_filter,
1039 .mixer_init = xonar_st_mixer_init,
1040 .cleanup = xonar_st_cleanup,
1041 .suspend = xonar_st_suspend,
1042 .resume = xonar_st_resume,
1043 .set_dac_params = set_pcm1796_params,
1044 .set_adc_params = set_cs53x1_params,
1045 .update_dac_volume = update_pcm1796_volume,
1046 .update_dac_mute = update_pcm1796_mute,
1047 .ac97_switch = xonar_line_mic_ac97_switch,
1048 .dac_tlv = pcm1796_db_scale,
1049 .model_data_size = sizeof(struct xonar_data),
1050 .device_config = PLAYBACK_0_TO_I2S |
1051 PLAYBACK_1_TO_SPDIF |
1052 CAPTURE_0_FROM_I2S_2,
1053 .dac_channels = 2,
1054 .dac_volume_min = 255 - 2*60,
1055 .dac_volume_max = 255,
1056 .function_flags = OXYGEN_FUNCTION_2WIRE,
1057 .dac_i2s_format = OXYGEN_I2S_FORMAT_LJUST,
1058 .adc_i2s_format = OXYGEN_I2S_FORMAT_LJUST,
1059};
1060
30459d7b
CL		 1061static int __devinit get_xonar_model(struct oxygen *chip,
1062 const struct pci_device_id *id)
1b8ff22f 1063{
fe10662c
CL		 1064 static const struct oxygen_model *const models[] = {
1065 [MODEL_D1] = &model_xonar_d1,
1066 [MODEL_DX] = &model_xonar_d1,
1067 [MODEL_D2] = &model_xonar_d2,
1068 [MODEL_D2X] = &model_xonar_d2,
7407a2e4 1069 [MODEL_HDAV] = &model_xonar_hdav,
930738de 1070 [MODEL_STX] = &model_xonar_st,
fe10662c 1071 };
30459d7b
CL		 1072 static const char *const names[] = {
1073 [MODEL_D1] = "Xonar D1",
1074 [MODEL_DX] = "Xonar DX",
1075 [MODEL_D2] = "Xonar D2",
1076 [MODEL_D2X] = "Xonar D2X",
1077 [MODEL_HDAV] = "Xonar HDAV1.3",
1078 [MODEL_HDAV_H6] = "Xonar HDAV1.3+H6",
930738de 1079 [MODEL_STX] = "Xonar Essence STX",
30459d7b
CL		 1080 };
1081 unsigned int model = id->driver_data;
1082
1083 if (model >= ARRAY_SIZE(models) || !models[model])
1084 return -EINVAL;
1085 chip->model = *models[model];
1086
1087 switch (model) {
1088 case MODEL_D2X:
1089 chip->model.init = xonar_d2x_init;
1090 break;
1091 case MODEL_DX:
1092 chip->model.init = xonar_dx_init;
1093 break;
1094 case MODEL_HDAV:
1095 oxygen_clear_bits16(chip, OXYGEN_GPIO_CONTROL,
1096 GPIO_HDAV_DB_MASK);
1097 switch (oxygen_read16(chip, OXYGEN_GPIO_DATA) &
1098 GPIO_HDAV_DB_MASK) {
1099 case GPIO_HDAV_DB_H6:
1100 model = MODEL_HDAV_H6;
1101 break;
1102 case GPIO_HDAV_DB_XX:
1103 snd_printk(KERN_ERR "unknown daughterboard\n");
1104 return -ENODEV;
1105 }
1106 break;
930738de
CL		 1107 case MODEL_STX:
1108 oxygen_clear_bits16(chip, OXYGEN_GPIO_CONTROL,
1109 GPIO_HDAV_DB_MASK);
1110 break;
30459d7b
CL		 1111 }
1112
1113 chip->model.shortname = names[model];
1114 chip->model.private_data = model;
1115 return 0;
1116}
1117
1118static int __devinit xonar_probe(struct pci_dev *pci,
1119 const struct pci_device_id *pci_id)
1120{
1b8ff22f
CL		 1121 static int dev;
1122 int err;
1123
1124 if (dev >= SNDRV_CARDS)
1125 return -ENODEV;
1126 if (!enable[dev]) {
1127 ++dev;
1128 return -ENOENT;
1129 }
bb718588 1130 err = oxygen_pci_probe(pci, index[dev], id[dev], THIS_MODULE,
30459d7b 1131 xonar_ids, get_xonar_model);
1b8ff22f
CL		 1132 if (err >= 0)
1133 ++dev;
1134 return err;
1135}
1136
1137static struct pci_driver xonar_driver = {
1138 .name = "AV200",
1139 .id_table = xonar_ids,
1140 .probe = xonar_probe,
1141 .remove = __devexit_p(oxygen_pci_remove),
4a4bc53b
CL		 1142#ifdef CONFIG_PM
1143 .suspend = oxygen_pci_suspend,
1144 .resume = oxygen_pci_resume,
1145#endif
1b8ff22f
CL		 1146};
1147
1148static int __init alsa_card_xonar_init(void)
1149{
1150 return pci_register_driver(&xonar_driver);
1151}
1152
1153static void __exit alsa_card_xonar_exit(void)
1154{
1155 pci_unregister_driver(&xonar_driver);
1156}
1157
1158module_init(alsa_card_xonar_init)
1159module_exit(alsa_card_xonar_exit)
Linux kernel - Deliverables
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