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65c3ac88 CL |
1 | /* |
2 | * card driver for models with PCM1796 DACs (Xonar D2/D2X/HDAV1.3/ST/STX) | |
3 | * | |
4 | * Copyright (c) Clemens Ladisch <clemens@ladisch.de> | |
5 | * | |
6 | * | |
7 | * This driver is free software; you can redistribute it and/or modify | |
8 | * it under the terms of the GNU General Public License, version 2. | |
9 | * | |
10 | * This driver is distributed in the hope that it will be useful, | |
11 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
12 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
13 | * GNU General Public License for more details. | |
14 | * | |
15 | * You should have received a copy of the GNU General Public License | |
16 | * along with this driver; if not, see <http://www.gnu.org/licenses/>. | |
17 | */ | |
18 | ||
19 | /* | |
20 | * Xonar D2/D2X | |
21 | * ------------ | |
22 | * | |
23 | * CMI8788: | |
24 | * | |
de664936 CL |
25 | * SPI 0 -> 1st PCM1796 (front) |
26 | * SPI 1 -> 2nd PCM1796 (surround) | |
27 | * SPI 2 -> 3rd PCM1796 (center/LFE) | |
28 | * SPI 4 -> 4th PCM1796 (back) | |
65c3ac88 | 29 | * |
de664936 CL |
30 | * GPIO 2 -> M0 of CS5381 |
31 | * GPIO 3 -> M1 of CS5381 | |
32 | * GPIO 5 <- external power present (D2X only) | |
33 | * GPIO 7 -> ALT | |
34 | * GPIO 8 -> enable output to speakers | |
dc0adf48 CL |
35 | * |
36 | * CM9780: | |
37 | * | |
de664936 CL |
38 | * LINE_OUT -> input of ADC |
39 | * | |
40 | * AUX_IN <- aux | |
41 | * VIDEO_IN <- CD | |
42 | * FMIC_IN <- mic | |
43 | * | |
44 | * GPO 0 -> route line-in (0) or AC97 output (1) to CS5381 input | |
65c3ac88 CL |
45 | */ |
46 | ||
47 | /* | |
48 | * Xonar HDAV1.3 (Deluxe) | |
49 | * ---------------------- | |
50 | * | |
51 | * CMI8788: | |
52 | * | |
de664936 | 53 | * I²C <-> PCM1796 (addr 1001100) (front) |
65c3ac88 | 54 | * |
de664936 | 55 | * GPI 0 <- external power present |
65c3ac88 | 56 | * |
de664936 CL |
57 | * GPIO 0 -> enable HDMI (0) or speaker (1) output |
58 | * GPIO 2 -> M0 of CS5381 | |
59 | * GPIO 3 -> M1 of CS5381 | |
60 | * GPIO 4 <- daughterboard detection | |
61 | * GPIO 5 <- daughterboard detection | |
62 | * GPIO 6 -> ? | |
63 | * GPIO 7 -> ? | |
64 | * GPIO 8 -> route input jack to line-in (0) or mic-in (1) | |
65c3ac88 | 65 | * |
de664936 | 66 | * UART <-> HDMI controller |
65c3ac88 | 67 | * |
dc0adf48 CL |
68 | * CM9780: |
69 | * | |
de664936 CL |
70 | * LINE_OUT -> input of ADC |
71 | * | |
72 | * AUX_IN <- aux | |
73 | * CD_IN <- CD | |
74 | * MIC_IN <- mic | |
75 | * | |
76 | * GPO 0 -> route line-in (0) or AC97 output (1) to CS5381 input | |
dc0adf48 | 77 | * |
65c3ac88 CL |
78 | * no daughterboard |
79 | * ---------------- | |
80 | * | |
de664936 | 81 | * GPIO 4 <- 1 |
65c3ac88 CL |
82 | * |
83 | * H6 daughterboard | |
84 | * ---------------- | |
85 | * | |
de664936 CL |
86 | * GPIO 4 <- 0 |
87 | * GPIO 5 <- 0 | |
65c3ac88 | 88 | * |
de664936 CL |
89 | * I²C <-> PCM1796 (addr 1001101) (surround) |
90 | * <-> PCM1796 (addr 1001110) (center/LFE) | |
91 | * <-> PCM1796 (addr 1001111) (back) | |
65c3ac88 CL |
92 | * |
93 | * unknown daughterboard | |
94 | * --------------------- | |
95 | * | |
de664936 CL |
96 | * GPIO 4 <- 0 |
97 | * GPIO 5 <- 1 | |
65c3ac88 | 98 | * |
de664936 | 99 | * I²C <-> CS4362A (addr 0011000) (surround, center/LFE, back) |
65c3ac88 CL |
100 | */ |
101 | ||
102 | /* | |
103 | * Xonar Essence ST (Deluxe)/STX | |
104 | * ----------------------------- | |
105 | * | |
106 | * CMI8788: | |
107 | * | |
de664936 CL |
108 | * I²C <-> PCM1792A (addr 1001100) |
109 | * <-> CS2000 (addr 1001110) (ST only) | |
268304f4 | 110 | * |
de664936 | 111 | * ADC1 MCLK -> REF_CLK of CS2000 (ST only) |
65c3ac88 | 112 | * |
de664936 | 113 | * GPI 0 <- external power present (STX only) |
65c3ac88 | 114 | * |
de664936 CL |
115 | * GPIO 0 -> enable output to speakers |
116 | * GPIO 1 -> route HP to front panel (0) or rear jack (1) | |
117 | * GPIO 2 -> M0 of CS5381 | |
118 | * GPIO 3 -> M1 of CS5381 | |
119 | * GPIO 4 <- daughterboard detection | |
120 | * GPIO 5 <- daughterboard detection | |
121 | * GPIO 6 -> ? | |
122 | * GPIO 7 -> route output to speaker jacks (0) or HP (1) | |
123 | * GPIO 8 -> route input jack to line-in (0) or mic-in (1) | |
65c3ac88 CL |
124 | * |
125 | * PCM1792A: | |
126 | * | |
de664936 | 127 | * SCK <- CLK_OUT of CS2000 (ST only) |
dc0adf48 | 128 | * |
de664936 | 129 | * CM9780: |
dc0adf48 | 130 | * |
de664936 | 131 | * LINE_OUT -> input of ADC |
dc0adf48 | 132 | * |
de664936 CL |
133 | * AUX_IN <- aux |
134 | * MIC_IN <- mic | |
dc0adf48 | 135 | * |
de664936 | 136 | * GPO 0 -> route line-in (0) or AC97 output (1) to CS5381 input |
65c3ac88 CL |
137 | * |
138 | * H6 daughterboard | |
139 | * ---------------- | |
140 | * | |
141 | * GPIO 4 <- 0 | |
142 | * GPIO 5 <- 0 | |
143 | */ | |
144 | ||
2b830bae | 145 | /* |
de664936 CL |
146 | * Xonar Xense |
147 | * ----------- | |
2b830bae CL |
148 | * |
149 | * CMI8788: | |
150 | * | |
de664936 CL |
151 | * I²C <-> PCM1796 (addr 1001100) (front) |
152 | * <-> CS4362A (addr 0011000) (surround, center/LFE, back) | |
153 | * <-> CS2000 (addr 1001110) | |
154 | * | |
155 | * ADC1 MCLK -> REF_CLK of CS2000 | |
156 | * | |
157 | * GPI 0 <- external power present | |
158 | * | |
159 | * GPIO 0 -> enable output | |
160 | * GPIO 1 -> route HP to front panel (0) or rear jack (1) | |
161 | * GPIO 2 -> M0 of CS5381 | |
162 | * GPIO 3 -> M1 of CS5381 | |
163 | * GPIO 4 -> enable output | |
164 | * GPIO 5 -> enable output | |
165 | * GPIO 6 -> ? | |
166 | * GPIO 7 -> route output to HP (0) or speaker (1) | |
167 | * GPIO 8 -> route input jack to mic-in (0) or line-in (1) | |
168 | * | |
169 | * CM9780: | |
170 | * | |
171 | * LINE_OUT -> input of ADC | |
172 | * | |
173 | * AUX_IN <- aux | |
174 | * VIDEO_IN <- ? | |
175 | * FMIC_IN <- mic | |
2b830bae | 176 | * |
de664936 CL |
177 | * GPO 0 -> route line-in (0) or AC97 output (1) to CS5381 input |
178 | * GPO 1 -> route mic-in from input jack (0) or front panel header (1) | |
2b830bae CL |
179 | */ |
180 | ||
65c3ac88 CL |
181 | #include <linux/pci.h> |
182 | #include <linux/delay.h> | |
183 | #include <linux/mutex.h> | |
184 | #include <sound/ac97_codec.h> | |
185 | #include <sound/control.h> | |
186 | #include <sound/core.h> | |
9719fcaa | 187 | #include <sound/info.h> |
65c3ac88 CL |
188 | #include <sound/pcm.h> |
189 | #include <sound/pcm_params.h> | |
190 | #include <sound/tlv.h> | |
191 | #include "xonar.h" | |
192 | #include "cm9780.h" | |
193 | #include "pcm1796.h" | |
268304f4 | 194 | #include "cs2000.h" |
65c3ac88 CL |
195 | |
196 | ||
197 | #define GPIO_D2X_EXT_POWER 0x0020 | |
198 | #define GPIO_D2_ALT 0x0080 | |
199 | #define GPIO_D2_OUTPUT_ENABLE 0x0100 | |
200 | ||
201 | #define GPI_EXT_POWER 0x01 | |
202 | #define GPIO_INPUT_ROUTE 0x0100 | |
203 | ||
204 | #define GPIO_HDAV_OUTPUT_ENABLE 0x0001 | |
f7e4bad7 | 205 | #define GPIO_HDAV_MAGIC 0x00c0 |
65c3ac88 CL |
206 | |
207 | #define GPIO_DB_MASK 0x0030 | |
208 | #define GPIO_DB_H6 0x0000 | |
209 | ||
210 | #define GPIO_ST_OUTPUT_ENABLE 0x0001 | |
211 | #define GPIO_ST_HP_REAR 0x0002 | |
f7e4bad7 | 212 | #define GPIO_ST_MAGIC 0x0040 |
65c3ac88 CL |
213 | #define GPIO_ST_HP 0x0080 |
214 | ||
215 | #define I2C_DEVICE_PCM1796(i) (0x98 + ((i) << 1)) /* 10011, ii, /W=0 */ | |
268304f4 | 216 | #define I2C_DEVICE_CS2000 0x9c /* 100111, 0, /W=0 */ |
65c3ac88 | 217 | |
6f0de3ce CL |
218 | #define PCM1796_REG_BASE 16 |
219 | ||
65c3ac88 CL |
220 | |
221 | struct xonar_pcm179x { | |
222 | struct xonar_generic generic; | |
223 | unsigned int dacs; | |
6f0de3ce | 224 | u8 pcm1796_regs[4][5]; |
973dca93 | 225 | unsigned int current_rate; |
00b8dd7d | 226 | bool h6; |
a361e247 CL |
227 | bool hp_active; |
228 | s8 hp_gain_offset; | |
973dca93 | 229 | bool has_cs2000; |
9719fcaa | 230 | u8 cs2000_regs[0x1f]; |
dd203fa9 | 231 | bool broken_i2c; |
65c3ac88 CL |
232 | }; |
233 | ||
234 | struct xonar_hdav { | |
235 | struct xonar_pcm179x pcm179x; | |
236 | struct xonar_hdmi hdmi; | |
237 | }; | |
238 | ||
239 | ||
240 | static inline void pcm1796_write_spi(struct oxygen *chip, unsigned int codec, | |
241 | u8 reg, u8 value) | |
242 | { | |
243 | /* maps ALSA channel pair number to SPI output */ | |
244 | static const u8 codec_map[4] = { | |
245 | 0, 1, 2, 4 | |
246 | }; | |
247 | oxygen_write_spi(chip, OXYGEN_SPI_TRIGGER | | |
248 | OXYGEN_SPI_DATA_LENGTH_2 | | |
249 | OXYGEN_SPI_CLOCK_160 | | |
250 | (codec_map[codec] << OXYGEN_SPI_CODEC_SHIFT) | | |
251 | OXYGEN_SPI_CEN_LATCH_CLOCK_HI, | |
252 | (reg << 8) | value); | |
253 | } | |
254 | ||
255 | static inline void pcm1796_write_i2c(struct oxygen *chip, unsigned int codec, | |
256 | u8 reg, u8 value) | |
257 | { | |
258 | oxygen_write_i2c(chip, I2C_DEVICE_PCM1796(codec), reg, value); | |
259 | } | |
260 | ||
261 | static void pcm1796_write(struct oxygen *chip, unsigned int codec, | |
262 | u8 reg, u8 value) | |
263 | { | |
6f0de3ce CL |
264 | struct xonar_pcm179x *data = chip->model_data; |
265 | ||
65c3ac88 CL |
266 | if ((chip->model.function_flags & OXYGEN_FUNCTION_2WIRE_SPI_MASK) == |
267 | OXYGEN_FUNCTION_SPI) | |
268 | pcm1796_write_spi(chip, codec, reg, value); | |
269 | else | |
270 | pcm1796_write_i2c(chip, codec, reg, value); | |
6f0de3ce CL |
271 | if ((unsigned int)(reg - PCM1796_REG_BASE) |
272 | < ARRAY_SIZE(data->pcm1796_regs[codec])) | |
273 | data->pcm1796_regs[codec][reg - PCM1796_REG_BASE] = value; | |
65c3ac88 CL |
274 | } |
275 | ||
6f0de3ce CL |
276 | static void pcm1796_write_cached(struct oxygen *chip, unsigned int codec, |
277 | u8 reg, u8 value) | |
268304f4 | 278 | { |
6f0de3ce CL |
279 | struct xonar_pcm179x *data = chip->model_data; |
280 | ||
281 | if (value != data->pcm1796_regs[codec][reg - PCM1796_REG_BASE]) | |
282 | pcm1796_write(chip, codec, reg, value); | |
268304f4 CL |
283 | } |
284 | ||
6f0de3ce | 285 | static void cs2000_write(struct oxygen *chip, u8 reg, u8 value) |
65c3ac88 CL |
286 | { |
287 | struct xonar_pcm179x *data = chip->model_data; | |
65c3ac88 | 288 | |
6f0de3ce | 289 | oxygen_write_i2c(chip, I2C_DEVICE_CS2000, reg, value); |
9719fcaa | 290 | data->cs2000_regs[reg] = value; |
65c3ac88 CL |
291 | } |
292 | ||
6f0de3ce | 293 | static void cs2000_write_cached(struct oxygen *chip, u8 reg, u8 value) |
65c3ac88 CL |
294 | { |
295 | struct xonar_pcm179x *data = chip->model_data; | |
65c3ac88 | 296 | |
9719fcaa | 297 | if (value != data->cs2000_regs[reg]) |
6f0de3ce | 298 | cs2000_write(chip, reg, value); |
65c3ac88 CL |
299 | } |
300 | ||
6f0de3ce | 301 | static void pcm1796_registers_init(struct oxygen *chip) |
65c3ac88 CL |
302 | { |
303 | struct xonar_pcm179x *data = chip->model_data; | |
304 | unsigned int i; | |
a361e247 | 305 | s8 gain_offset; |
65c3ac88 | 306 | |
79815e00 | 307 | msleep(1); |
a361e247 | 308 | gain_offset = data->hp_active ? data->hp_gain_offset : 0; |
65c3ac88 | 309 | for (i = 0; i < data->dacs; ++i) { |
6f0de3ce CL |
310 | /* set ATLD before ATL/ATR */ |
311 | pcm1796_write(chip, i, 18, | |
312 | data->pcm1796_regs[0][18 - PCM1796_REG_BASE]); | |
a361e247 CL |
313 | pcm1796_write(chip, i, 16, chip->dac_volume[i * 2] |
314 | + gain_offset); | |
315 | pcm1796_write(chip, i, 17, chip->dac_volume[i * 2 + 1] | |
316 | + gain_offset); | |
4852ad02 CL |
317 | pcm1796_write(chip, i, 19, |
318 | data->pcm1796_regs[0][19 - PCM1796_REG_BASE]); | |
6f0de3ce CL |
319 | pcm1796_write(chip, i, 20, |
320 | data->pcm1796_regs[0][20 - PCM1796_REG_BASE]); | |
65c3ac88 | 321 | pcm1796_write(chip, i, 21, 0); |
bc29e262 | 322 | gain_offset = 0; |
65c3ac88 | 323 | } |
6f0de3ce CL |
324 | } |
325 | ||
326 | static void pcm1796_init(struct oxygen *chip) | |
327 | { | |
328 | struct xonar_pcm179x *data = chip->model_data; | |
329 | ||
c81c6b35 | 330 | data->pcm1796_regs[0][18 - PCM1796_REG_BASE] = |
03ff959d | 331 | PCM1796_DMF_DISABLED | PCM1796_FMT_24_I2S | PCM1796_ATLD; |
c81c6b35 CL |
332 | if (!data->broken_i2c) |
333 | data->pcm1796_regs[0][18 - PCM1796_REG_BASE] |= PCM1796_MUTE; | |
4852ad02 CL |
334 | data->pcm1796_regs[0][19 - PCM1796_REG_BASE] = |
335 | PCM1796_FLT_SHARP | PCM1796_ATS_1; | |
c97e2dc4 CL |
336 | data->pcm1796_regs[0][20 - PCM1796_REG_BASE] = |
337 | data->h6 ? PCM1796_OS_64 : PCM1796_OS_128; | |
6f0de3ce | 338 | pcm1796_registers_init(chip); |
973dca93 | 339 | data->current_rate = 48000; |
65c3ac88 CL |
340 | } |
341 | ||
342 | static void xonar_d2_init(struct oxygen *chip) | |
343 | { | |
344 | struct xonar_pcm179x *data = chip->model_data; | |
345 | ||
346 | data->generic.anti_pop_delay = 300; | |
347 | data->generic.output_enable_bit = GPIO_D2_OUTPUT_ENABLE; | |
348 | data->dacs = 4; | |
65c3ac88 CL |
349 | |
350 | pcm1796_init(chip); | |
351 | ||
352 | oxygen_set_bits16(chip, OXYGEN_GPIO_CONTROL, GPIO_D2_ALT); | |
353 | oxygen_clear_bits16(chip, OXYGEN_GPIO_DATA, GPIO_D2_ALT); | |
354 | ||
355 | oxygen_ac97_set_bits(chip, 0, CM9780_JACK, CM9780_FMIC2MIC); | |
356 | ||
357 | xonar_init_cs53x1(chip); | |
358 | xonar_enable_output(chip); | |
359 | ||
360 | snd_component_add(chip->card, "PCM1796"); | |
361 | snd_component_add(chip->card, "CS5381"); | |
362 | } | |
363 | ||
364 | static void xonar_d2x_init(struct oxygen *chip) | |
365 | { | |
366 | struct xonar_pcm179x *data = chip->model_data; | |
367 | ||
368 | data->generic.ext_power_reg = OXYGEN_GPIO_DATA; | |
369 | data->generic.ext_power_int_reg = OXYGEN_GPIO_INTERRUPT_MASK; | |
370 | data->generic.ext_power_bit = GPIO_D2X_EXT_POWER; | |
371 | oxygen_clear_bits16(chip, OXYGEN_GPIO_CONTROL, GPIO_D2X_EXT_POWER); | |
372 | xonar_init_ext_power(chip); | |
373 | xonar_d2_init(chip); | |
374 | } | |
375 | ||
376 | static void xonar_hdav_init(struct oxygen *chip) | |
377 | { | |
378 | struct xonar_hdav *data = chip->model_data; | |
379 | ||
380 | oxygen_write16(chip, OXYGEN_2WIRE_BUS_STATUS, | |
381 | OXYGEN_2WIRE_LENGTH_8 | | |
382 | OXYGEN_2WIRE_INTERRUPT_MASK | | |
4106055c | 383 | OXYGEN_2WIRE_SPEED_STANDARD); |
65c3ac88 CL |
384 | |
385 | data->pcm179x.generic.anti_pop_delay = 100; | |
386 | data->pcm179x.generic.output_enable_bit = GPIO_HDAV_OUTPUT_ENABLE; | |
387 | data->pcm179x.generic.ext_power_reg = OXYGEN_GPI_DATA; | |
388 | data->pcm179x.generic.ext_power_int_reg = OXYGEN_GPI_INTERRUPT_MASK; | |
389 | data->pcm179x.generic.ext_power_bit = GPI_EXT_POWER; | |
d2119c05 | 390 | data->pcm179x.dacs = chip->model.dac_channels_mixer / 2; |
00b8dd7d | 391 | data->pcm179x.h6 = chip->model.dac_channels_mixer > 2; |
65c3ac88 CL |
392 | |
393 | pcm1796_init(chip); | |
394 | ||
f7e4bad7 CL |
395 | oxygen_set_bits16(chip, OXYGEN_GPIO_CONTROL, |
396 | GPIO_HDAV_MAGIC | GPIO_INPUT_ROUTE); | |
65c3ac88 CL |
397 | oxygen_clear_bits16(chip, OXYGEN_GPIO_DATA, GPIO_INPUT_ROUTE); |
398 | ||
399 | xonar_init_cs53x1(chip); | |
400 | xonar_init_ext_power(chip); | |
401 | xonar_hdmi_init(chip, &data->hdmi); | |
402 | xonar_enable_output(chip); | |
403 | ||
404 | snd_component_add(chip->card, "PCM1796"); | |
405 | snd_component_add(chip->card, "CS5381"); | |
406 | } | |
407 | ||
268304f4 | 408 | static void xonar_st_init_i2c(struct oxygen *chip) |
65c3ac88 | 409 | { |
65c3ac88 CL |
410 | oxygen_write16(chip, OXYGEN_2WIRE_BUS_STATUS, |
411 | OXYGEN_2WIRE_LENGTH_8 | | |
412 | OXYGEN_2WIRE_INTERRUPT_MASK | | |
4106055c | 413 | OXYGEN_2WIRE_SPEED_STANDARD); |
268304f4 CL |
414 | } |
415 | ||
416 | static void xonar_st_init_common(struct oxygen *chip) | |
417 | { | |
418 | struct xonar_pcm179x *data = chip->model_data; | |
65c3ac88 | 419 | |
65c3ac88 | 420 | data->generic.output_enable_bit = GPIO_ST_OUTPUT_ENABLE; |
d2119c05 | 421 | data->dacs = chip->model.dac_channels_mixer / 2; |
a361e247 | 422 | data->hp_gain_offset = 2*-18; |
65c3ac88 CL |
423 | |
424 | pcm1796_init(chip); | |
425 | ||
426 | oxygen_set_bits16(chip, OXYGEN_GPIO_CONTROL, | |
f7e4bad7 CL |
427 | GPIO_INPUT_ROUTE | GPIO_ST_HP_REAR | |
428 | GPIO_ST_MAGIC | GPIO_ST_HP); | |
65c3ac88 CL |
429 | oxygen_clear_bits16(chip, OXYGEN_GPIO_DATA, |
430 | GPIO_INPUT_ROUTE | GPIO_ST_HP_REAR | GPIO_ST_HP); | |
431 | ||
432 | xonar_init_cs53x1(chip); | |
433 | xonar_enable_output(chip); | |
434 | ||
435 | snd_component_add(chip->card, "PCM1792A"); | |
436 | snd_component_add(chip->card, "CS5381"); | |
437 | } | |
438 | ||
268304f4 CL |
439 | static void cs2000_registers_init(struct oxygen *chip) |
440 | { | |
441 | struct xonar_pcm179x *data = chip->model_data; | |
442 | ||
443 | cs2000_write(chip, CS2000_GLOBAL_CFG, CS2000_FREEZE); | |
444 | cs2000_write(chip, CS2000_DEV_CTRL, 0); | |
445 | cs2000_write(chip, CS2000_DEV_CFG_1, | |
446 | CS2000_R_MOD_SEL_1 | | |
447 | (0 << CS2000_R_SEL_SHIFT) | | |
448 | CS2000_AUX_OUT_SRC_REF_CLK | | |
449 | CS2000_EN_DEV_CFG_1); | |
450 | cs2000_write(chip, CS2000_DEV_CFG_2, | |
451 | (0 << CS2000_LOCK_CLK_SHIFT) | | |
452 | CS2000_FRAC_N_SRC_STATIC); | |
453 | cs2000_write(chip, CS2000_RATIO_0 + 0, 0x00); /* 1.0 */ | |
454 | cs2000_write(chip, CS2000_RATIO_0 + 1, 0x10); | |
455 | cs2000_write(chip, CS2000_RATIO_0 + 2, 0x00); | |
456 | cs2000_write(chip, CS2000_RATIO_0 + 3, 0x00); | |
9719fcaa CL |
457 | cs2000_write(chip, CS2000_FUN_CFG_1, |
458 | data->cs2000_regs[CS2000_FUN_CFG_1]); | |
268304f4 CL |
459 | cs2000_write(chip, CS2000_FUN_CFG_2, 0); |
460 | cs2000_write(chip, CS2000_GLOBAL_CFG, CS2000_EN_DEV_CFG_2); | |
79815e00 | 461 | msleep(3); /* PLL lock delay */ |
268304f4 CL |
462 | } |
463 | ||
464 | static void xonar_st_init(struct oxygen *chip) | |
465 | { | |
466 | struct xonar_pcm179x *data = chip->model_data; | |
467 | ||
d737f3ee | 468 | data->generic.anti_pop_delay = 100; |
00b8dd7d | 469 | data->h6 = chip->model.dac_channels_mixer > 2; |
973dca93 | 470 | data->has_cs2000 = 1; |
9719fcaa | 471 | data->cs2000_regs[CS2000_FUN_CFG_1] = CS2000_REF_CLK_DIV_1; |
dd203fa9 | 472 | data->broken_i2c = true; |
268304f4 CL |
473 | |
474 | oxygen_write16(chip, OXYGEN_I2S_A_FORMAT, | |
c97e2dc4 CL |
475 | OXYGEN_RATE_48000 | |
476 | OXYGEN_I2S_FORMAT_I2S | | |
5b8bf2a5 | 477 | OXYGEN_I2S_MCLK(data->h6 ? MCLK_256 : MCLK_512) | |
c97e2dc4 CL |
478 | OXYGEN_I2S_BITS_16 | |
479 | OXYGEN_I2S_MASTER | | |
480 | OXYGEN_I2S_BCLK_64); | |
268304f4 CL |
481 | |
482 | xonar_st_init_i2c(chip); | |
483 | cs2000_registers_init(chip); | |
484 | xonar_st_init_common(chip); | |
485 | ||
486 | snd_component_add(chip->card, "CS2000"); | |
487 | } | |
488 | ||
65c3ac88 CL |
489 | static void xonar_stx_init(struct oxygen *chip) |
490 | { | |
491 | struct xonar_pcm179x *data = chip->model_data; | |
492 | ||
268304f4 | 493 | xonar_st_init_i2c(chip); |
d737f3ee | 494 | data->generic.anti_pop_delay = 800; |
65c3ac88 CL |
495 | data->generic.ext_power_reg = OXYGEN_GPI_DATA; |
496 | data->generic.ext_power_int_reg = OXYGEN_GPI_INTERRUPT_MASK; | |
497 | data->generic.ext_power_bit = GPI_EXT_POWER; | |
498 | xonar_init_ext_power(chip); | |
268304f4 | 499 | xonar_st_init_common(chip); |
65c3ac88 CL |
500 | } |
501 | ||
502 | static void xonar_d2_cleanup(struct oxygen *chip) | |
503 | { | |
504 | xonar_disable_output(chip); | |
505 | } | |
506 | ||
507 | static void xonar_hdav_cleanup(struct oxygen *chip) | |
508 | { | |
509 | xonar_hdmi_cleanup(chip); | |
510 | xonar_disable_output(chip); | |
511 | msleep(2); | |
512 | } | |
513 | ||
514 | static void xonar_st_cleanup(struct oxygen *chip) | |
515 | { | |
516 | xonar_disable_output(chip); | |
517 | } | |
518 | ||
519 | static void xonar_d2_suspend(struct oxygen *chip) | |
520 | { | |
521 | xonar_d2_cleanup(chip); | |
522 | } | |
523 | ||
524 | static void xonar_hdav_suspend(struct oxygen *chip) | |
525 | { | |
526 | xonar_hdav_cleanup(chip); | |
527 | } | |
528 | ||
529 | static void xonar_st_suspend(struct oxygen *chip) | |
530 | { | |
531 | xonar_st_cleanup(chip); | |
532 | } | |
533 | ||
534 | static void xonar_d2_resume(struct oxygen *chip) | |
535 | { | |
6f0de3ce | 536 | pcm1796_registers_init(chip); |
65c3ac88 CL |
537 | xonar_enable_output(chip); |
538 | } | |
539 | ||
540 | static void xonar_hdav_resume(struct oxygen *chip) | |
541 | { | |
542 | struct xonar_hdav *data = chip->model_data; | |
543 | ||
6f0de3ce | 544 | pcm1796_registers_init(chip); |
65c3ac88 CL |
545 | xonar_hdmi_resume(chip, &data->hdmi); |
546 | xonar_enable_output(chip); | |
547 | } | |
548 | ||
268304f4 | 549 | static void xonar_stx_resume(struct oxygen *chip) |
65c3ac88 | 550 | { |
6f0de3ce | 551 | pcm1796_registers_init(chip); |
65c3ac88 CL |
552 | xonar_enable_output(chip); |
553 | } | |
554 | ||
268304f4 CL |
555 | static void xonar_st_resume(struct oxygen *chip) |
556 | { | |
557 | cs2000_registers_init(chip); | |
558 | xonar_stx_resume(chip); | |
559 | } | |
560 | ||
973dca93 | 561 | static void update_pcm1796_oversampling(struct oxygen *chip) |
65c3ac88 CL |
562 | { |
563 | struct xonar_pcm179x *data = chip->model_data; | |
564 | unsigned int i; | |
6f0de3ce CL |
565 | u8 reg; |
566 | ||
c97e2dc4 | 567 | if (data->current_rate <= 48000 && !data->h6) |
973dca93 | 568 | reg = PCM1796_OS_128; |
973dca93 | 569 | else |
c97e2dc4 | 570 | reg = PCM1796_OS_64; |
6f0de3ce CL |
571 | for (i = 0; i < data->dacs; ++i) |
572 | pcm1796_write_cached(chip, i, 20, reg); | |
573 | } | |
574 | ||
973dca93 CL |
575 | static void set_pcm1796_params(struct oxygen *chip, |
576 | struct snd_pcm_hw_params *params) | |
577 | { | |
578 | struct xonar_pcm179x *data = chip->model_data; | |
579 | ||
79815e00 | 580 | msleep(1); |
973dca93 CL |
581 | data->current_rate = params_rate(params); |
582 | update_pcm1796_oversampling(chip); | |
583 | } | |
584 | ||
6f0de3ce CL |
585 | static void update_pcm1796_volume(struct oxygen *chip) |
586 | { | |
587 | struct xonar_pcm179x *data = chip->model_data; | |
588 | unsigned int i; | |
a361e247 | 589 | s8 gain_offset; |
6f0de3ce | 590 | |
a361e247 | 591 | gain_offset = data->hp_active ? data->hp_gain_offset : 0; |
6f0de3ce | 592 | for (i = 0; i < data->dacs; ++i) { |
a361e247 CL |
593 | pcm1796_write_cached(chip, i, 16, chip->dac_volume[i * 2] |
594 | + gain_offset); | |
595 | pcm1796_write_cached(chip, i, 17, chip->dac_volume[i * 2 + 1] | |
596 | + gain_offset); | |
bc29e262 | 597 | gain_offset = 0; |
6f0de3ce CL |
598 | } |
599 | } | |
600 | ||
601 | static void update_pcm1796_mute(struct oxygen *chip) | |
602 | { | |
603 | struct xonar_pcm179x *data = chip->model_data; | |
604 | unsigned int i; | |
605 | u8 value; | |
65c3ac88 | 606 | |
03ff959d | 607 | value = PCM1796_DMF_DISABLED | PCM1796_FMT_24_I2S | PCM1796_ATLD; |
6f0de3ce CL |
608 | if (chip->dac_mute) |
609 | value |= PCM1796_MUTE; | |
65c3ac88 | 610 | for (i = 0; i < data->dacs; ++i) |
6f0de3ce | 611 | pcm1796_write_cached(chip, i, 18, value); |
65c3ac88 CL |
612 | } |
613 | ||
973dca93 | 614 | static void update_cs2000_rate(struct oxygen *chip, unsigned int rate) |
268304f4 | 615 | { |
973dca93 | 616 | struct xonar_pcm179x *data = chip->model_data; |
6f0de3ce | 617 | u8 rate_mclk, reg; |
268304f4 | 618 | |
973dca93 | 619 | switch (rate) { |
973dca93 | 620 | case 32000: |
973dca93 | 621 | case 64000: |
5b8bf2a5 | 622 | rate_mclk = OXYGEN_RATE_32000; |
973dca93 | 623 | break; |
5b8bf2a5 | 624 | case 44100: |
973dca93 | 625 | case 88200: |
973dca93 | 626 | case 176400: |
5b8bf2a5 | 627 | rate_mclk = OXYGEN_RATE_44100; |
973dca93 | 628 | break; |
5b8bf2a5 CL |
629 | default: |
630 | case 48000: | |
631 | case 96000: | |
973dca93 | 632 | case 192000: |
5b8bf2a5 | 633 | rate_mclk = OXYGEN_RATE_48000; |
973dca93 CL |
634 | break; |
635 | } | |
5b8bf2a5 CL |
636 | |
637 | if (rate <= 96000 && (rate > 48000 || data->h6)) { | |
638 | rate_mclk |= OXYGEN_I2S_MCLK(MCLK_256); | |
6f0de3ce | 639 | reg = CS2000_REF_CLK_DIV_1; |
5b8bf2a5 CL |
640 | } else { |
641 | rate_mclk |= OXYGEN_I2S_MCLK(MCLK_512); | |
6f0de3ce | 642 | reg = CS2000_REF_CLK_DIV_2; |
5b8bf2a5 CL |
643 | } |
644 | ||
645 | oxygen_write16_masked(chip, OXYGEN_I2S_A_FORMAT, rate_mclk, | |
646 | OXYGEN_I2S_RATE_MASK | OXYGEN_I2S_MCLK_MASK); | |
6f0de3ce | 647 | cs2000_write_cached(chip, CS2000_FUN_CFG_1, reg); |
79815e00 | 648 | msleep(3); /* PLL lock delay */ |
268304f4 CL |
649 | } |
650 | ||
651 | static void set_st_params(struct oxygen *chip, | |
652 | struct snd_pcm_hw_params *params) | |
653 | { | |
973dca93 | 654 | update_cs2000_rate(chip, params_rate(params)); |
268304f4 CL |
655 | set_pcm1796_params(chip, params); |
656 | } | |
657 | ||
65c3ac88 CL |
658 | static void set_hdav_params(struct oxygen *chip, |
659 | struct snd_pcm_hw_params *params) | |
660 | { | |
661 | struct xonar_hdav *data = chip->model_data; | |
662 | ||
663 | set_pcm1796_params(chip, params); | |
664 | xonar_set_hdmi_params(chip, &data->hdmi, params); | |
665 | } | |
666 | ||
667 | static const struct snd_kcontrol_new alt_switch = { | |
668 | .iface = SNDRV_CTL_ELEM_IFACE_MIXER, | |
669 | .name = "Analog Loopback Switch", | |
670 | .info = snd_ctl_boolean_mono_info, | |
671 | .get = xonar_gpio_bit_switch_get, | |
672 | .put = xonar_gpio_bit_switch_put, | |
673 | .private_value = GPIO_D2_ALT, | |
674 | }; | |
675 | ||
4852ad02 CL |
676 | static int rolloff_info(struct snd_kcontrol *ctl, |
677 | struct snd_ctl_elem_info *info) | |
678 | { | |
679 | static const char *const names[2] = { | |
680 | "Sharp Roll-off", "Slow Roll-off" | |
681 | }; | |
682 | ||
9600732b | 683 | return snd_ctl_enum_info(info, 1, 2, names); |
4852ad02 CL |
684 | } |
685 | ||
686 | static int rolloff_get(struct snd_kcontrol *ctl, | |
687 | struct snd_ctl_elem_value *value) | |
688 | { | |
689 | struct oxygen *chip = ctl->private_data; | |
690 | struct xonar_pcm179x *data = chip->model_data; | |
691 | ||
692 | value->value.enumerated.item[0] = | |
693 | (data->pcm1796_regs[0][19 - PCM1796_REG_BASE] & | |
694 | PCM1796_FLT_MASK) != PCM1796_FLT_SHARP; | |
695 | return 0; | |
696 | } | |
697 | ||
698 | static int rolloff_put(struct snd_kcontrol *ctl, | |
699 | struct snd_ctl_elem_value *value) | |
700 | { | |
701 | struct oxygen *chip = ctl->private_data; | |
702 | struct xonar_pcm179x *data = chip->model_data; | |
703 | unsigned int i; | |
704 | int changed; | |
705 | u8 reg; | |
706 | ||
707 | mutex_lock(&chip->mutex); | |
708 | reg = data->pcm1796_regs[0][19 - PCM1796_REG_BASE]; | |
709 | reg &= ~PCM1796_FLT_MASK; | |
710 | if (!value->value.enumerated.item[0]) | |
711 | reg |= PCM1796_FLT_SHARP; | |
712 | else | |
713 | reg |= PCM1796_FLT_SLOW; | |
714 | changed = reg != data->pcm1796_regs[0][19 - PCM1796_REG_BASE]; | |
715 | if (changed) { | |
716 | for (i = 0; i < data->dacs; ++i) | |
717 | pcm1796_write(chip, i, 19, reg); | |
718 | } | |
719 | mutex_unlock(&chip->mutex); | |
720 | return changed; | |
721 | } | |
722 | ||
723 | static const struct snd_kcontrol_new rolloff_control = { | |
724 | .iface = SNDRV_CTL_ELEM_IFACE_MIXER, | |
725 | .name = "DAC Filter Playback Enum", | |
726 | .info = rolloff_info, | |
727 | .get = rolloff_get, | |
728 | .put = rolloff_put, | |
729 | }; | |
730 | ||
2509ec62 CL |
731 | static const struct snd_kcontrol_new hdav_hdmi_control = { |
732 | .iface = SNDRV_CTL_ELEM_IFACE_MIXER, | |
733 | .name = "HDMI Playback Switch", | |
734 | .info = snd_ctl_boolean_mono_info, | |
735 | .get = xonar_gpio_bit_switch_get, | |
736 | .put = xonar_gpio_bit_switch_put, | |
737 | .private_value = GPIO_HDAV_OUTPUT_ENABLE | XONAR_GPIO_BIT_INVERT, | |
738 | }; | |
739 | ||
65c3ac88 CL |
740 | static int st_output_switch_info(struct snd_kcontrol *ctl, |
741 | struct snd_ctl_elem_info *info) | |
742 | { | |
743 | static const char *const names[3] = { | |
744 | "Speakers", "Headphones", "FP Headphones" | |
745 | }; | |
746 | ||
9600732b | 747 | return snd_ctl_enum_info(info, 1, 3, names); |
65c3ac88 CL |
748 | } |
749 | ||
750 | static int st_output_switch_get(struct snd_kcontrol *ctl, | |
751 | struct snd_ctl_elem_value *value) | |
752 | { | |
753 | struct oxygen *chip = ctl->private_data; | |
754 | u16 gpio; | |
755 | ||
756 | gpio = oxygen_read16(chip, OXYGEN_GPIO_DATA); | |
757 | if (!(gpio & GPIO_ST_HP)) | |
758 | value->value.enumerated.item[0] = 0; | |
759 | else if (gpio & GPIO_ST_HP_REAR) | |
760 | value->value.enumerated.item[0] = 1; | |
761 | else | |
762 | value->value.enumerated.item[0] = 2; | |
763 | return 0; | |
764 | } | |
765 | ||
766 | ||
767 | static int st_output_switch_put(struct snd_kcontrol *ctl, | |
768 | struct snd_ctl_elem_value *value) | |
769 | { | |
770 | struct oxygen *chip = ctl->private_data; | |
a361e247 | 771 | struct xonar_pcm179x *data = chip->model_data; |
65c3ac88 CL |
772 | u16 gpio_old, gpio; |
773 | ||
774 | mutex_lock(&chip->mutex); | |
775 | gpio_old = oxygen_read16(chip, OXYGEN_GPIO_DATA); | |
776 | gpio = gpio_old; | |
777 | switch (value->value.enumerated.item[0]) { | |
778 | case 0: | |
779 | gpio &= ~(GPIO_ST_HP | GPIO_ST_HP_REAR); | |
780 | break; | |
781 | case 1: | |
782 | gpio |= GPIO_ST_HP | GPIO_ST_HP_REAR; | |
783 | break; | |
784 | case 2: | |
785 | gpio = (gpio | GPIO_ST_HP) & ~GPIO_ST_HP_REAR; | |
786 | break; | |
787 | } | |
788 | oxygen_write16(chip, OXYGEN_GPIO_DATA, gpio); | |
a361e247 CL |
789 | data->hp_active = gpio & GPIO_ST_HP; |
790 | update_pcm1796_volume(chip); | |
65c3ac88 CL |
791 | mutex_unlock(&chip->mutex); |
792 | return gpio != gpio_old; | |
793 | } | |
794 | ||
a361e247 CL |
795 | static int st_hp_volume_offset_info(struct snd_kcontrol *ctl, |
796 | struct snd_ctl_elem_info *info) | |
797 | { | |
798 | static const char *const names[3] = { | |
799 | "< 64 ohms", "64-300 ohms", "300-600 ohms" | |
800 | }; | |
801 | ||
9600732b | 802 | return snd_ctl_enum_info(info, 1, 3, names); |
a361e247 CL |
803 | } |
804 | ||
805 | static int st_hp_volume_offset_get(struct snd_kcontrol *ctl, | |
806 | struct snd_ctl_elem_value *value) | |
807 | { | |
808 | struct oxygen *chip = ctl->private_data; | |
809 | struct xonar_pcm179x *data = chip->model_data; | |
810 | ||
811 | mutex_lock(&chip->mutex); | |
812 | if (data->hp_gain_offset < 2*-6) | |
813 | value->value.enumerated.item[0] = 0; | |
814 | else if (data->hp_gain_offset < 0) | |
815 | value->value.enumerated.item[0] = 1; | |
816 | else | |
817 | value->value.enumerated.item[0] = 2; | |
818 | mutex_unlock(&chip->mutex); | |
819 | return 0; | |
820 | } | |
821 | ||
822 | ||
823 | static int st_hp_volume_offset_put(struct snd_kcontrol *ctl, | |
824 | struct snd_ctl_elem_value *value) | |
825 | { | |
826 | static const s8 offsets[] = { 2*-18, 2*-6, 0 }; | |
827 | struct oxygen *chip = ctl->private_data; | |
828 | struct xonar_pcm179x *data = chip->model_data; | |
829 | s8 offset; | |
830 | int changed; | |
831 | ||
832 | if (value->value.enumerated.item[0] > 2) | |
833 | return -EINVAL; | |
834 | offset = offsets[value->value.enumerated.item[0]]; | |
835 | mutex_lock(&chip->mutex); | |
836 | changed = offset != data->hp_gain_offset; | |
837 | if (changed) { | |
838 | data->hp_gain_offset = offset; | |
839 | update_pcm1796_volume(chip); | |
840 | } | |
841 | mutex_unlock(&chip->mutex); | |
842 | return changed; | |
843 | } | |
844 | ||
845 | static const struct snd_kcontrol_new st_controls[] = { | |
846 | { | |
847 | .iface = SNDRV_CTL_ELEM_IFACE_MIXER, | |
848 | .name = "Analog Output", | |
849 | .info = st_output_switch_info, | |
850 | .get = st_output_switch_get, | |
851 | .put = st_output_switch_put, | |
852 | }, | |
853 | { | |
854 | .iface = SNDRV_CTL_ELEM_IFACE_MIXER, | |
855 | .name = "Headphones Impedance Playback Enum", | |
856 | .info = st_hp_volume_offset_info, | |
857 | .get = st_hp_volume_offset_get, | |
858 | .put = st_hp_volume_offset_put, | |
859 | }, | |
65c3ac88 CL |
860 | }; |
861 | ||
862 | static void xonar_line_mic_ac97_switch(struct oxygen *chip, | |
863 | unsigned int reg, unsigned int mute) | |
864 | { | |
865 | if (reg == AC97_LINE) { | |
866 | spin_lock_irq(&chip->reg_lock); | |
867 | oxygen_write16_masked(chip, OXYGEN_GPIO_DATA, | |
868 | mute ? GPIO_INPUT_ROUTE : 0, | |
869 | GPIO_INPUT_ROUTE); | |
870 | spin_unlock_irq(&chip->reg_lock); | |
871 | } | |
872 | } | |
873 | ||
874 | static const DECLARE_TLV_DB_SCALE(pcm1796_db_scale, -6000, 50, 0); | |
875 | ||
876 | static int xonar_d2_control_filter(struct snd_kcontrol_new *template) | |
877 | { | |
878 | if (!strncmp(template->name, "CD Capture ", 11)) | |
879 | /* CD in is actually connected to the video in pin */ | |
880 | template->private_value ^= AC97_CD ^ AC97_VIDEO; | |
881 | return 0; | |
882 | } | |
883 | ||
dd203fa9 CL |
884 | static int xonar_st_h6_control_filter(struct snd_kcontrol_new *template) |
885 | { | |
886 | if (!strncmp(template->name, "Master Playback ", 16)) | |
887 | /* no volume/mute, as I²C to the third DAC does not work */ | |
888 | return 1; | |
889 | return 0; | |
890 | } | |
891 | ||
4852ad02 CL |
892 | static int add_pcm1796_controls(struct oxygen *chip) |
893 | { | |
dd203fa9 | 894 | struct xonar_pcm179x *data = chip->model_data; |
4852ad02 CL |
895 | int err; |
896 | ||
dd203fa9 CL |
897 | if (!data->broken_i2c) { |
898 | err = snd_ctl_add(chip->card, | |
899 | snd_ctl_new1(&rolloff_control, chip)); | |
900 | if (err < 0) | |
901 | return err; | |
dd203fa9 | 902 | } |
4852ad02 CL |
903 | return 0; |
904 | } | |
905 | ||
65c3ac88 CL |
906 | static int xonar_d2_mixer_init(struct oxygen *chip) |
907 | { | |
973dca93 CL |
908 | int err; |
909 | ||
910 | err = snd_ctl_add(chip->card, snd_ctl_new1(&alt_switch, chip)); | |
911 | if (err < 0) | |
912 | return err; | |
4852ad02 | 913 | err = add_pcm1796_controls(chip); |
973dca93 CL |
914 | if (err < 0) |
915 | return err; | |
916 | return 0; | |
917 | } | |
918 | ||
919 | static int xonar_hdav_mixer_init(struct oxygen *chip) | |
920 | { | |
2509ec62 CL |
921 | int err; |
922 | ||
923 | err = snd_ctl_add(chip->card, snd_ctl_new1(&hdav_hdmi_control, chip)); | |
924 | if (err < 0) | |
925 | return err; | |
926 | err = add_pcm1796_controls(chip); | |
927 | if (err < 0) | |
928 | return err; | |
929 | return 0; | |
65c3ac88 CL |
930 | } |
931 | ||
932 | static int xonar_st_mixer_init(struct oxygen *chip) | |
933 | { | |
a361e247 CL |
934 | unsigned int i; |
935 | int err; | |
936 | ||
937 | for (i = 0; i < ARRAY_SIZE(st_controls); ++i) { | |
938 | err = snd_ctl_add(chip->card, | |
939 | snd_ctl_new1(&st_controls[i], chip)); | |
940 | if (err < 0) | |
941 | return err; | |
942 | } | |
4852ad02 | 943 | err = add_pcm1796_controls(chip); |
973dca93 CL |
944 | if (err < 0) |
945 | return err; | |
a361e247 | 946 | return 0; |
65c3ac88 CL |
947 | } |
948 | ||
9719fcaa CL |
949 | static void dump_pcm1796_registers(struct oxygen *chip, |
950 | struct snd_info_buffer *buffer) | |
951 | { | |
952 | struct xonar_pcm179x *data = chip->model_data; | |
953 | unsigned int dac, i; | |
954 | ||
955 | for (dac = 0; dac < data->dacs; ++dac) { | |
956 | snd_iprintf(buffer, "\nPCM1796 %u:", dac + 1); | |
957 | for (i = 0; i < 5; ++i) | |
958 | snd_iprintf(buffer, " %02x", | |
959 | data->pcm1796_regs[dac][i]); | |
960 | } | |
961 | snd_iprintf(buffer, "\n"); | |
962 | } | |
963 | ||
964 | static void dump_cs2000_registers(struct oxygen *chip, | |
965 | struct snd_info_buffer *buffer) | |
966 | { | |
967 | struct xonar_pcm179x *data = chip->model_data; | |
968 | unsigned int i; | |
969 | ||
970 | if (data->has_cs2000) { | |
971 | snd_iprintf(buffer, "\nCS2000:\n00: "); | |
972 | for (i = 1; i < 0x10; ++i) | |
973 | snd_iprintf(buffer, " %02x", data->cs2000_regs[i]); | |
974 | snd_iprintf(buffer, "\n10:"); | |
975 | for (i = 0x10; i < 0x1f; ++i) | |
976 | snd_iprintf(buffer, " %02x", data->cs2000_regs[i]); | |
977 | snd_iprintf(buffer, "\n"); | |
978 | } | |
979 | } | |
980 | ||
981 | static void dump_st_registers(struct oxygen *chip, | |
982 | struct snd_info_buffer *buffer) | |
983 | { | |
984 | dump_pcm1796_registers(chip, buffer); | |
985 | dump_cs2000_registers(chip, buffer); | |
986 | } | |
987 | ||
65c3ac88 CL |
988 | static const struct oxygen_model model_xonar_d2 = { |
989 | .longname = "Asus Virtuoso 200", | |
990 | .chip = "AV200", | |
991 | .init = xonar_d2_init, | |
992 | .control_filter = xonar_d2_control_filter, | |
993 | .mixer_init = xonar_d2_mixer_init, | |
994 | .cleanup = xonar_d2_cleanup, | |
995 | .suspend = xonar_d2_suspend, | |
996 | .resume = xonar_d2_resume, | |
997 | .set_dac_params = set_pcm1796_params, | |
998 | .set_adc_params = xonar_set_cs53x1_params, | |
999 | .update_dac_volume = update_pcm1796_volume, | |
1000 | .update_dac_mute = update_pcm1796_mute, | |
9719fcaa | 1001 | .dump_registers = dump_pcm1796_registers, |
65c3ac88 CL |
1002 | .dac_tlv = pcm1796_db_scale, |
1003 | .model_data_size = sizeof(struct xonar_pcm179x), | |
1004 | .device_config = PLAYBACK_0_TO_I2S | | |
1005 | PLAYBACK_1_TO_SPDIF | | |
1006 | CAPTURE_0_FROM_I2S_2 | | |
1007 | CAPTURE_1_FROM_SPDIF | | |
1008 | MIDI_OUTPUT | | |
b6ca8ab3 CL |
1009 | MIDI_INPUT | |
1010 | AC97_CD_INPUT, | |
1f4d7be7 CL |
1011 | .dac_channels_pcm = 8, |
1012 | .dac_channels_mixer = 8, | |
65c3ac88 CL |
1013 | .dac_volume_min = 255 - 2*60, |
1014 | .dac_volume_max = 255, | |
1015 | .misc_flags = OXYGEN_MISC_MIDI, | |
1016 | .function_flags = OXYGEN_FUNCTION_SPI | | |
1017 | OXYGEN_FUNCTION_ENABLE_SPI_4_5, | |
5b8bf2a5 | 1018 | .dac_mclks = OXYGEN_MCLKS(512, 128, 128), |
ce2c4920 | 1019 | .adc_mclks = OXYGEN_MCLKS(256, 128, 128), |
03ff959d | 1020 | .dac_i2s_format = OXYGEN_I2S_FORMAT_I2S, |
65c3ac88 CL |
1021 | .adc_i2s_format = OXYGEN_I2S_FORMAT_LJUST, |
1022 | }; | |
1023 | ||
1024 | static const struct oxygen_model model_xonar_hdav = { | |
1025 | .longname = "Asus Virtuoso 200", | |
1026 | .chip = "AV200", | |
1027 | .init = xonar_hdav_init, | |
973dca93 | 1028 | .mixer_init = xonar_hdav_mixer_init, |
65c3ac88 CL |
1029 | .cleanup = xonar_hdav_cleanup, |
1030 | .suspend = xonar_hdav_suspend, | |
1031 | .resume = xonar_hdav_resume, | |
1032 | .pcm_hardware_filter = xonar_hdmi_pcm_hardware_filter, | |
1033 | .set_dac_params = set_hdav_params, | |
1034 | .set_adc_params = xonar_set_cs53x1_params, | |
1035 | .update_dac_volume = update_pcm1796_volume, | |
1036 | .update_dac_mute = update_pcm1796_mute, | |
1037 | .uart_input = xonar_hdmi_uart_input, | |
1038 | .ac97_switch = xonar_line_mic_ac97_switch, | |
9719fcaa | 1039 | .dump_registers = dump_pcm1796_registers, |
65c3ac88 CL |
1040 | .dac_tlv = pcm1796_db_scale, |
1041 | .model_data_size = sizeof(struct xonar_hdav), | |
1042 | .device_config = PLAYBACK_0_TO_I2S | | |
1043 | PLAYBACK_1_TO_SPDIF | | |
1044 | CAPTURE_0_FROM_I2S_2 | | |
1045 | CAPTURE_1_FROM_SPDIF, | |
1f4d7be7 CL |
1046 | .dac_channels_pcm = 8, |
1047 | .dac_channels_mixer = 2, | |
65c3ac88 CL |
1048 | .dac_volume_min = 255 - 2*60, |
1049 | .dac_volume_max = 255, | |
1050 | .misc_flags = OXYGEN_MISC_MIDI, | |
1051 | .function_flags = OXYGEN_FUNCTION_2WIRE, | |
5b8bf2a5 | 1052 | .dac_mclks = OXYGEN_MCLKS(512, 128, 128), |
ce2c4920 | 1053 | .adc_mclks = OXYGEN_MCLKS(256, 128, 128), |
03ff959d | 1054 | .dac_i2s_format = OXYGEN_I2S_FORMAT_I2S, |
65c3ac88 CL |
1055 | .adc_i2s_format = OXYGEN_I2S_FORMAT_LJUST, |
1056 | }; | |
1057 | ||
1058 | static const struct oxygen_model model_xonar_st = { | |
1059 | .longname = "Asus Virtuoso 100", | |
1060 | .chip = "AV200", | |
1061 | .init = xonar_st_init, | |
65c3ac88 CL |
1062 | .mixer_init = xonar_st_mixer_init, |
1063 | .cleanup = xonar_st_cleanup, | |
1064 | .suspend = xonar_st_suspend, | |
1065 | .resume = xonar_st_resume, | |
268304f4 | 1066 | .set_dac_params = set_st_params, |
65c3ac88 CL |
1067 | .set_adc_params = xonar_set_cs53x1_params, |
1068 | .update_dac_volume = update_pcm1796_volume, | |
1069 | .update_dac_mute = update_pcm1796_mute, | |
1070 | .ac97_switch = xonar_line_mic_ac97_switch, | |
9719fcaa | 1071 | .dump_registers = dump_st_registers, |
65c3ac88 CL |
1072 | .dac_tlv = pcm1796_db_scale, |
1073 | .model_data_size = sizeof(struct xonar_pcm179x), | |
1074 | .device_config = PLAYBACK_0_TO_I2S | | |
1075 | PLAYBACK_1_TO_SPDIF | | |
e96f38f7 | 1076 | CAPTURE_0_FROM_I2S_2 | |
dc3fcd16 | 1077 | CAPTURE_1_FROM_SPDIF | |
e96f38f7 | 1078 | AC97_FMIC_SWITCH, |
1f4d7be7 CL |
1079 | .dac_channels_pcm = 2, |
1080 | .dac_channels_mixer = 2, | |
65c3ac88 CL |
1081 | .dac_volume_min = 255 - 2*60, |
1082 | .dac_volume_max = 255, | |
1083 | .function_flags = OXYGEN_FUNCTION_2WIRE, | |
5b8bf2a5 | 1084 | .dac_mclks = OXYGEN_MCLKS(512, 128, 128), |
ce2c4920 | 1085 | .adc_mclks = OXYGEN_MCLKS(256, 128, 128), |
03ff959d | 1086 | .dac_i2s_format = OXYGEN_I2S_FORMAT_I2S, |
65c3ac88 CL |
1087 | .adc_i2s_format = OXYGEN_I2S_FORMAT_LJUST, |
1088 | }; | |
1089 | ||
f120a6fb BP |
1090 | int get_xonar_pcm179x_model(struct oxygen *chip, |
1091 | const struct pci_device_id *id) | |
65c3ac88 CL |
1092 | { |
1093 | switch (id->subdevice) { | |
1094 | case 0x8269: | |
1095 | chip->model = model_xonar_d2; | |
1096 | chip->model.shortname = "Xonar D2"; | |
1097 | break; | |
1098 | case 0x82b7: | |
1099 | chip->model = model_xonar_d2; | |
1100 | chip->model.shortname = "Xonar D2X"; | |
1101 | chip->model.init = xonar_d2x_init; | |
1102 | break; | |
1103 | case 0x8314: | |
1104 | chip->model = model_xonar_hdav; | |
1105 | oxygen_clear_bits16(chip, OXYGEN_GPIO_CONTROL, GPIO_DB_MASK); | |
1106 | switch (oxygen_read16(chip, OXYGEN_GPIO_DATA) & GPIO_DB_MASK) { | |
1107 | default: | |
1108 | chip->model.shortname = "Xonar HDAV1.3"; | |
1109 | break; | |
1110 | case GPIO_DB_H6: | |
1111 | chip->model.shortname = "Xonar HDAV1.3+H6"; | |
1f4d7be7 | 1112 | chip->model.dac_channels_mixer = 8; |
5b8bf2a5 | 1113 | chip->model.dac_mclks = OXYGEN_MCLKS(256, 128, 128); |
65c3ac88 CL |
1114 | break; |
1115 | } | |
1116 | break; | |
1117 | case 0x835d: | |
1118 | chip->model = model_xonar_st; | |
1119 | oxygen_clear_bits16(chip, OXYGEN_GPIO_CONTROL, GPIO_DB_MASK); | |
1120 | switch (oxygen_read16(chip, OXYGEN_GPIO_DATA) & GPIO_DB_MASK) { | |
1121 | default: | |
1122 | chip->model.shortname = "Xonar ST"; | |
1123 | break; | |
1124 | case GPIO_DB_H6: | |
1125 | chip->model.shortname = "Xonar ST+H6"; | |
dd203fa9 | 1126 | chip->model.control_filter = xonar_st_h6_control_filter; |
1f4d7be7 CL |
1127 | chip->model.dac_channels_pcm = 8; |
1128 | chip->model.dac_channels_mixer = 8; | |
c81c6b35 | 1129 | chip->model.dac_volume_min = 255; |
5b8bf2a5 | 1130 | chip->model.dac_mclks = OXYGEN_MCLKS(256, 128, 128); |
65c3ac88 CL |
1131 | break; |
1132 | } | |
1133 | break; | |
1134 | case 0x835c: | |
1135 | chip->model = model_xonar_st; | |
1136 | chip->model.shortname = "Xonar STX"; | |
1137 | chip->model.init = xonar_stx_init; | |
268304f4 CL |
1138 | chip->model.resume = xonar_stx_resume; |
1139 | chip->model.set_dac_params = set_pcm1796_params; | |
65c3ac88 CL |
1140 | break; |
1141 | default: | |
1142 | return -EINVAL; | |
1143 | } | |
1144 | return 0; | |
1145 | } |