Commit | Line | Data |
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1da177e4 LT |
1 | /* |
2 | * ALSA driver for RME Digi9652 audio interfaces | |
3 | * | |
4 | * Copyright (c) 1999 IEM - Winfried Ritsch | |
5 | * Copyright (c) 1999-2001 Paul Davis | |
6 | * | |
7 | * This program is free software; you can redistribute it and/or modify | |
8 | * it under the terms of the GNU General Public License as published by | |
9 | * the Free Software Foundation; either version 2 of the License, or | |
10 | * (at your option) any later version. | |
11 | * | |
12 | * This program is distributed in the hope that it will be useful, | |
13 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
14 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
15 | * GNU General Public License for more details. | |
16 | * | |
17 | * You should have received a copy of the GNU General Public License | |
18 | * along with this program; if not, write to the Free Software | |
19 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA | |
20 | * | |
21 | */ | |
22 | ||
23 | #include <sound/driver.h> | |
24 | #include <linux/delay.h> | |
25 | #include <linux/init.h> | |
26 | #include <linux/interrupt.h> | |
27 | #include <linux/pci.h> | |
28 | #include <linux/slab.h> | |
29 | #include <linux/moduleparam.h> | |
30 | ||
31 | #include <sound/core.h> | |
32 | #include <sound/control.h> | |
33 | #include <sound/pcm.h> | |
34 | #include <sound/info.h> | |
35 | #include <sound/asoundef.h> | |
36 | #include <sound/initval.h> | |
37 | ||
38 | #include <asm/current.h> | |
39 | #include <asm/io.h> | |
40 | ||
41 | static int index[SNDRV_CARDS] = SNDRV_DEFAULT_IDX; /* Index 0-MAX */ | |
42 | static char *id[SNDRV_CARDS] = SNDRV_DEFAULT_STR; /* ID for this card */ | |
43 | static int enable[SNDRV_CARDS] = SNDRV_DEFAULT_ENABLE_PNP; /* Enable this card */ | |
44 | static int precise_ptr[SNDRV_CARDS] = { [0 ... (SNDRV_CARDS-1)] = 0 }; /* Enable precise pointer */ | |
45 | ||
46 | module_param_array(index, int, NULL, 0444); | |
47 | MODULE_PARM_DESC(index, "Index value for RME Digi9652 (Hammerfall) soundcard."); | |
48 | module_param_array(id, charp, NULL, 0444); | |
49 | MODULE_PARM_DESC(id, "ID string for RME Digi9652 (Hammerfall) soundcard."); | |
50 | module_param_array(enable, bool, NULL, 0444); | |
51 | MODULE_PARM_DESC(enable, "Enable/disable specific RME96{52,36} soundcards."); | |
52 | module_param_array(precise_ptr, bool, NULL, 0444); | |
53 | MODULE_PARM_DESC(precise_ptr, "Enable precise pointer (doesn't work reliably)."); | |
54 | MODULE_AUTHOR("Paul Davis <pbd@op.net>, Winfried Ritsch"); | |
55 | MODULE_DESCRIPTION("RME Digi9652/Digi9636"); | |
56 | MODULE_LICENSE("GPL"); | |
57 | MODULE_SUPPORTED_DEVICE("{{RME,Hammerfall}," | |
58 | "{RME,Hammerfall-Light}}"); | |
59 | ||
60 | /* The Hammerfall has two sets of 24 ADAT + 2 S/PDIF channels, one for | |
61 | capture, one for playback. Both the ADAT and S/PDIF channels appear | |
62 | to the host CPU in the same block of memory. There is no functional | |
63 | difference between them in terms of access. | |
64 | ||
65 | The Hammerfall Light is identical to the Hammerfall, except that it | |
66 | has 2 sets 18 channels (16 ADAT + 2 S/PDIF) for capture and playback. | |
67 | */ | |
68 | ||
69 | #define RME9652_NCHANNELS 26 | |
70 | #define RME9636_NCHANNELS 18 | |
71 | ||
72 | /* Preferred sync source choices - used by "sync_pref" control switch */ | |
73 | ||
74 | #define RME9652_SYNC_FROM_SPDIF 0 | |
75 | #define RME9652_SYNC_FROM_ADAT1 1 | |
76 | #define RME9652_SYNC_FROM_ADAT2 2 | |
77 | #define RME9652_SYNC_FROM_ADAT3 3 | |
78 | ||
79 | /* Possible sources of S/PDIF input */ | |
80 | ||
81 | #define RME9652_SPDIFIN_OPTICAL 0 /* optical (ADAT1) */ | |
82 | #define RME9652_SPDIFIN_COAXIAL 1 /* coaxial (RCA) */ | |
83 | #define RME9652_SPDIFIN_INTERN 2 /* internal (CDROM) */ | |
84 | ||
85 | /* ------------- Status-Register bits --------------------- */ | |
86 | ||
87 | #define RME9652_IRQ (1<<0) /* IRQ is High if not reset by irq_clear */ | |
88 | #define RME9652_lock_2 (1<<1) /* ADAT 3-PLL: 1=locked, 0=unlocked */ | |
89 | #define RME9652_lock_1 (1<<2) /* ADAT 2-PLL: 1=locked, 0=unlocked */ | |
90 | #define RME9652_lock_0 (1<<3) /* ADAT 1-PLL: 1=locked, 0=unlocked */ | |
91 | #define RME9652_fs48 (1<<4) /* sample rate is 0=44.1/88.2,1=48/96 Khz */ | |
92 | #define RME9652_wsel_rd (1<<5) /* if Word-Clock is used and valid then 1 */ | |
93 | /* bits 6-15 encode h/w buffer pointer position */ | |
94 | #define RME9652_sync_2 (1<<16) /* if ADAT-IN 3 in sync to system clock */ | |
95 | #define RME9652_sync_1 (1<<17) /* if ADAT-IN 2 in sync to system clock */ | |
96 | #define RME9652_sync_0 (1<<18) /* if ADAT-IN 1 in sync to system clock */ | |
97 | #define RME9652_DS_rd (1<<19) /* 1=Double Speed Mode, 0=Normal Speed */ | |
98 | #define RME9652_tc_busy (1<<20) /* 1=time-code copy in progress (960ms) */ | |
99 | #define RME9652_tc_out (1<<21) /* time-code out bit */ | |
100 | #define RME9652_F_0 (1<<22) /* 000=64kHz, 100=88.2kHz, 011=96kHz */ | |
101 | #define RME9652_F_1 (1<<23) /* 111=32kHz, 110=44.1kHz, 101=48kHz, */ | |
102 | #define RME9652_F_2 (1<<24) /* external Crystal Chip if ERF=1 */ | |
103 | #define RME9652_ERF (1<<25) /* Error-Flag of SDPIF Receiver (1=No Lock) */ | |
104 | #define RME9652_buffer_id (1<<26) /* toggles by each interrupt on rec/play */ | |
105 | #define RME9652_tc_valid (1<<27) /* 1 = a signal is detected on time-code input */ | |
106 | #define RME9652_SPDIF_READ (1<<28) /* byte available from Rev 1.5+ S/PDIF interface */ | |
107 | ||
108 | #define RME9652_sync (RME9652_sync_0|RME9652_sync_1|RME9652_sync_2) | |
109 | #define RME9652_lock (RME9652_lock_0|RME9652_lock_1|RME9652_lock_2) | |
110 | #define RME9652_F (RME9652_F_0|RME9652_F_1|RME9652_F_2) | |
111 | #define rme9652_decode_spdif_rate(x) ((x)>>22) | |
112 | ||
113 | /* Bit 6..15 : h/w buffer pointer */ | |
114 | ||
115 | #define RME9652_buf_pos 0x000FFC0 | |
116 | ||
117 | /* Bits 31,30,29 are bits 5,4,3 of h/w pointer position on later | |
118 | Rev G EEPROMS and Rev 1.5 cards or later. | |
119 | */ | |
120 | ||
121 | #define RME9652_REV15_buf_pos(x) ((((x)&0xE0000000)>>26)|((x)&RME9652_buf_pos)) | |
122 | ||
1da177e4 LT |
123 | /* amount of io space we remap for register access. i'm not sure we |
124 | even need this much, but 1K is nice round number :) | |
125 | */ | |
126 | ||
127 | #define RME9652_IO_EXTENT 1024 | |
128 | ||
129 | #define RME9652_init_buffer 0 | |
130 | #define RME9652_play_buffer 32 /* holds ptr to 26x64kBit host RAM */ | |
131 | #define RME9652_rec_buffer 36 /* holds ptr to 26x64kBit host RAM */ | |
132 | #define RME9652_control_register 64 | |
133 | #define RME9652_irq_clear 96 | |
134 | #define RME9652_time_code 100 /* useful if used with alesis adat */ | |
135 | #define RME9652_thru_base 128 /* 132...228 Thru for 26 channels */ | |
136 | ||
137 | /* Read-only registers */ | |
138 | ||
139 | /* Writing to any of the register locations writes to the status | |
140 | register. We'll use the first location as our point of access. | |
141 | */ | |
142 | ||
143 | #define RME9652_status_register 0 | |
144 | ||
145 | /* --------- Control-Register Bits ---------------- */ | |
146 | ||
147 | ||
148 | #define RME9652_start_bit (1<<0) /* start record/play */ | |
149 | /* bits 1-3 encode buffersize/latency */ | |
150 | #define RME9652_Master (1<<4) /* Clock Mode Master=1,Slave/Auto=0 */ | |
151 | #define RME9652_IE (1<<5) /* Interupt Enable */ | |
152 | #define RME9652_freq (1<<6) /* samplerate 0=44.1/88.2, 1=48/96 kHz */ | |
153 | #define RME9652_freq1 (1<<7) /* if 0, 32kHz, else always 1 */ | |
154 | #define RME9652_DS (1<<8) /* Doule Speed 0=44.1/48, 1=88.2/96 Khz */ | |
155 | #define RME9652_PRO (1<<9) /* S/PDIF out: 0=consumer, 1=professional */ | |
156 | #define RME9652_EMP (1<<10) /* Emphasis 0=None, 1=ON */ | |
157 | #define RME9652_Dolby (1<<11) /* Non-audio bit 1=set, 0=unset */ | |
158 | #define RME9652_opt_out (1<<12) /* Use 1st optical OUT as SPDIF: 1=yes,0=no */ | |
159 | #define RME9652_wsel (1<<13) /* use Wordclock as sync (overwrites master) */ | |
160 | #define RME9652_inp_0 (1<<14) /* SPDIF-IN: 00=optical (ADAT1), */ | |
161 | #define RME9652_inp_1 (1<<15) /* 01=koaxial (Cinch), 10=Internal CDROM */ | |
162 | #define RME9652_SyncPref_ADAT2 (1<<16) | |
163 | #define RME9652_SyncPref_ADAT3 (1<<17) | |
164 | #define RME9652_SPDIF_RESET (1<<18) /* Rev 1.5+: h/w S/PDIF receiver */ | |
165 | #define RME9652_SPDIF_SELECT (1<<19) | |
166 | #define RME9652_SPDIF_CLOCK (1<<20) | |
167 | #define RME9652_SPDIF_WRITE (1<<21) | |
168 | #define RME9652_ADAT1_INTERNAL (1<<22) /* Rev 1.5+: if set, internal CD connector carries ADAT */ | |
169 | ||
170 | /* buffersize = 512Bytes * 2^n, where n is made from Bit2 ... Bit0 */ | |
171 | ||
172 | #define RME9652_latency 0x0e | |
173 | #define rme9652_encode_latency(x) (((x)&0x7)<<1) | |
174 | #define rme9652_decode_latency(x) (((x)>>1)&0x7) | |
175 | #define rme9652_running_double_speed(s) ((s)->control_register & RME9652_DS) | |
176 | #define RME9652_inp (RME9652_inp_0|RME9652_inp_1) | |
177 | #define rme9652_encode_spdif_in(x) (((x)&0x3)<<14) | |
178 | #define rme9652_decode_spdif_in(x) (((x)>>14)&0x3) | |
179 | ||
180 | #define RME9652_SyncPref_Mask (RME9652_SyncPref_ADAT2|RME9652_SyncPref_ADAT3) | |
181 | #define RME9652_SyncPref_ADAT1 0 | |
182 | #define RME9652_SyncPref_SPDIF (RME9652_SyncPref_ADAT2|RME9652_SyncPref_ADAT3) | |
183 | ||
184 | /* the size of a substream (1 mono data stream) */ | |
185 | ||
186 | #define RME9652_CHANNEL_BUFFER_SAMPLES (16*1024) | |
187 | #define RME9652_CHANNEL_BUFFER_BYTES (4*RME9652_CHANNEL_BUFFER_SAMPLES) | |
188 | ||
189 | /* the size of the area we need to allocate for DMA transfers. the | |
190 | size is the same regardless of the number of channels - the | |
191 | 9636 still uses the same memory area. | |
192 | ||
193 | Note that we allocate 1 more channel than is apparently needed | |
194 | because the h/w seems to write 1 byte beyond the end of the last | |
195 | page. Sigh. | |
196 | */ | |
197 | ||
198 | #define RME9652_DMA_AREA_BYTES ((RME9652_NCHANNELS+1) * RME9652_CHANNEL_BUFFER_BYTES) | |
199 | #define RME9652_DMA_AREA_KILOBYTES (RME9652_DMA_AREA_BYTES/1024) | |
200 | ||
abfd67bd | 201 | struct snd_rme9652 { |
1da177e4 LT |
202 | int dev; |
203 | ||
204 | spinlock_t lock; | |
205 | int irq; | |
206 | unsigned long port; | |
207 | void __iomem *iobase; | |
208 | ||
209 | int precise_ptr; | |
210 | ||
211 | u32 control_register; /* cached value */ | |
212 | u32 thru_bits; /* thru 1=on, 0=off channel 1=Bit1... channel 26= Bit26 */ | |
213 | ||
214 | u32 creg_spdif; | |
215 | u32 creg_spdif_stream; | |
216 | ||
217 | char *card_name; /* hammerfall or hammerfall light names */ | |
218 | ||
219 | size_t hw_offsetmask; /* &-with status register to get real hw_offset */ | |
220 | size_t prev_hw_offset; /* previous hw offset */ | |
221 | size_t max_jitter; /* maximum jitter in frames for | |
222 | hw pointer */ | |
223 | size_t period_bytes; /* guess what this is */ | |
224 | ||
225 | unsigned char ds_channels; | |
226 | unsigned char ss_channels; /* different for hammerfall/hammerfall-light */ | |
227 | ||
228 | struct snd_dma_buffer playback_dma_buf; | |
229 | struct snd_dma_buffer capture_dma_buf; | |
230 | ||
231 | unsigned char *capture_buffer; /* suitably aligned address */ | |
232 | unsigned char *playback_buffer; /* suitably aligned address */ | |
233 | ||
234 | pid_t capture_pid; | |
235 | pid_t playback_pid; | |
236 | ||
abfd67bd TI |
237 | struct snd_pcm_substream *capture_substream; |
238 | struct snd_pcm_substream *playback_substream; | |
1da177e4 LT |
239 | int running; |
240 | ||
241 | int passthru; /* non-zero if doing pass-thru */ | |
242 | int hw_rev; /* h/w rev * 10 (i.e. 1.5 has hw_rev = 15) */ | |
243 | ||
244 | int last_spdif_sample_rate; /* so that we can catch externally ... */ | |
245 | int last_adat_sample_rate; /* ... induced rate changes */ | |
246 | ||
247 | char *channel_map; | |
248 | ||
abfd67bd TI |
249 | struct snd_card *card; |
250 | struct snd_pcm *pcm; | |
1da177e4 | 251 | struct pci_dev *pci; |
abfd67bd | 252 | struct snd_kcontrol *spdif_ctl; |
1da177e4 | 253 | |
abfd67bd | 254 | }; |
1da177e4 LT |
255 | |
256 | /* These tables map the ALSA channels 1..N to the channels that we | |
257 | need to use in order to find the relevant channel buffer. RME | |
258 | refer to this kind of mapping as between "the ADAT channel and | |
259 | the DMA channel." We index it using the logical audio channel, | |
260 | and the value is the DMA channel (i.e. channel buffer number) | |
261 | where the data for that channel can be read/written from/to. | |
262 | */ | |
263 | ||
264 | static char channel_map_9652_ss[26] = { | |
265 | 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17, | |
266 | 18, 19, 20, 21, 22, 23, 24, 25 | |
267 | }; | |
268 | ||
269 | static char channel_map_9636_ss[26] = { | |
270 | 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, | |
271 | /* channels 16 and 17 are S/PDIF */ | |
272 | 24, 25, | |
273 | /* channels 18-25 don't exist */ | |
274 | -1, -1, -1, -1, -1, -1, -1, -1 | |
275 | }; | |
276 | ||
277 | static char channel_map_9652_ds[26] = { | |
278 | /* ADAT channels are remapped */ | |
279 | 1, 3, 5, 7, 9, 11, 13, 15, 17, 19, 21, 23, | |
280 | /* channels 12 and 13 are S/PDIF */ | |
281 | 24, 25, | |
282 | /* others don't exist */ | |
283 | -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1 | |
284 | }; | |
285 | ||
286 | static char channel_map_9636_ds[26] = { | |
287 | /* ADAT channels are remapped */ | |
288 | 1, 3, 5, 7, 9, 11, 13, 15, | |
289 | /* channels 8 and 9 are S/PDIF */ | |
290 | 24, 25 | |
291 | /* others don't exist */ | |
292 | -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1 | |
293 | }; | |
294 | ||
295 | static int snd_hammerfall_get_buffer(struct pci_dev *pci, struct snd_dma_buffer *dmab, size_t size) | |
296 | { | |
297 | dmab->dev.type = SNDRV_DMA_TYPE_DEV; | |
298 | dmab->dev.dev = snd_dma_pci_data(pci); | |
b6a96915 TI |
299 | if (snd_dma_get_reserved_buf(dmab, snd_dma_pci_buf_id(pci))) { |
300 | if (dmab->bytes >= size) | |
301 | return 0; | |
1da177e4 | 302 | } |
b6a96915 TI |
303 | if (snd_dma_alloc_pages(SNDRV_DMA_TYPE_DEV, snd_dma_pci_data(pci), |
304 | size, dmab) < 0) | |
305 | return -ENOMEM; | |
1da177e4 LT |
306 | return 0; |
307 | } | |
308 | ||
309 | static void snd_hammerfall_free_buffer(struct snd_dma_buffer *dmab, struct pci_dev *pci) | |
310 | { | |
b6a96915 TI |
311 | if (dmab->area) { |
312 | dmab->dev.dev = NULL; /* make it anonymous */ | |
1da177e4 | 313 | snd_dma_reserve_buf(dmab, snd_dma_pci_buf_id(pci)); |
b6a96915 | 314 | } |
1da177e4 LT |
315 | } |
316 | ||
317 | ||
396c9b92 | 318 | static struct pci_device_id snd_rme9652_ids[] __devinitdata = { |
1da177e4 LT |
319 | { |
320 | .vendor = 0x10ee, | |
321 | .device = 0x3fc4, | |
322 | .subvendor = PCI_ANY_ID, | |
323 | .subdevice = PCI_ANY_ID, | |
324 | }, /* RME Digi9652 */ | |
325 | { 0, }, | |
326 | }; | |
327 | ||
328 | MODULE_DEVICE_TABLE(pci, snd_rme9652_ids); | |
329 | ||
abfd67bd | 330 | static inline void rme9652_write(struct snd_rme9652 *rme9652, int reg, int val) |
1da177e4 LT |
331 | { |
332 | writel(val, rme9652->iobase + reg); | |
333 | } | |
334 | ||
abfd67bd | 335 | static inline unsigned int rme9652_read(struct snd_rme9652 *rme9652, int reg) |
1da177e4 LT |
336 | { |
337 | return readl(rme9652->iobase + reg); | |
338 | } | |
339 | ||
abfd67bd | 340 | static inline int snd_rme9652_use_is_exclusive(struct snd_rme9652 *rme9652) |
1da177e4 LT |
341 | { |
342 | unsigned long flags; | |
343 | int ret = 1; | |
344 | ||
345 | spin_lock_irqsave(&rme9652->lock, flags); | |
346 | if ((rme9652->playback_pid != rme9652->capture_pid) && | |
347 | (rme9652->playback_pid >= 0) && (rme9652->capture_pid >= 0)) { | |
348 | ret = 0; | |
349 | } | |
350 | spin_unlock_irqrestore(&rme9652->lock, flags); | |
351 | return ret; | |
352 | } | |
353 | ||
abfd67bd | 354 | static inline int rme9652_adat_sample_rate(struct snd_rme9652 *rme9652) |
1da177e4 LT |
355 | { |
356 | if (rme9652_running_double_speed(rme9652)) { | |
357 | return (rme9652_read(rme9652, RME9652_status_register) & | |
358 | RME9652_fs48) ? 96000 : 88200; | |
359 | } else { | |
360 | return (rme9652_read(rme9652, RME9652_status_register) & | |
361 | RME9652_fs48) ? 48000 : 44100; | |
362 | } | |
363 | } | |
364 | ||
abfd67bd | 365 | static inline void rme9652_compute_period_size(struct snd_rme9652 *rme9652) |
1da177e4 LT |
366 | { |
367 | unsigned int i; | |
368 | ||
369 | i = rme9652->control_register & RME9652_latency; | |
370 | rme9652->period_bytes = 1 << ((rme9652_decode_latency(i) + 8)); | |
371 | rme9652->hw_offsetmask = | |
372 | (rme9652->period_bytes * 2 - 1) & RME9652_buf_pos; | |
373 | rme9652->max_jitter = 80; | |
374 | } | |
375 | ||
abfd67bd | 376 | static snd_pcm_uframes_t rme9652_hw_pointer(struct snd_rme9652 *rme9652) |
1da177e4 LT |
377 | { |
378 | int status; | |
379 | unsigned int offset, frag; | |
380 | snd_pcm_uframes_t period_size = rme9652->period_bytes / 4; | |
381 | snd_pcm_sframes_t delta; | |
382 | ||
383 | status = rme9652_read(rme9652, RME9652_status_register); | |
384 | if (!rme9652->precise_ptr) | |
385 | return (status & RME9652_buffer_id) ? period_size : 0; | |
386 | offset = status & RME9652_buf_pos; | |
387 | ||
388 | /* The hardware may give a backward movement for up to 80 frames | |
389 | Martin Kirst <martin.kirst@freenet.de> knows the details. | |
390 | */ | |
391 | ||
392 | delta = rme9652->prev_hw_offset - offset; | |
393 | delta &= 0xffff; | |
394 | if (delta <= (snd_pcm_sframes_t)rme9652->max_jitter * 4) | |
395 | offset = rme9652->prev_hw_offset; | |
396 | else | |
397 | rme9652->prev_hw_offset = offset; | |
398 | offset &= rme9652->hw_offsetmask; | |
399 | offset /= 4; | |
400 | frag = status & RME9652_buffer_id; | |
401 | ||
402 | if (offset < period_size) { | |
403 | if (offset > rme9652->max_jitter) { | |
404 | if (frag) | |
405 | printk(KERN_ERR "Unexpected hw_pointer position (bufid == 0): status: %x offset: %d\n", status, offset); | |
406 | } else if (!frag) | |
407 | return 0; | |
408 | offset -= rme9652->max_jitter; | |
409 | if (offset < 0) | |
410 | offset += period_size * 2; | |
411 | } else { | |
412 | if (offset > period_size + rme9652->max_jitter) { | |
413 | if (!frag) | |
414 | printk(KERN_ERR "Unexpected hw_pointer position (bufid == 1): status: %x offset: %d\n", status, offset); | |
415 | } else if (frag) | |
416 | return period_size; | |
417 | offset -= rme9652->max_jitter; | |
418 | } | |
419 | ||
420 | return offset; | |
421 | } | |
422 | ||
abfd67bd | 423 | static inline void rme9652_reset_hw_pointer(struct snd_rme9652 *rme9652) |
1da177e4 LT |
424 | { |
425 | int i; | |
426 | ||
427 | /* reset the FIFO pointer to zero. We do this by writing to 8 | |
428 | registers, each of which is a 32bit wide register, and set | |
429 | them all to zero. Note that s->iobase is a pointer to | |
430 | int32, not pointer to char. | |
431 | */ | |
432 | ||
433 | for (i = 0; i < 8; i++) { | |
434 | rme9652_write(rme9652, i * 4, 0); | |
435 | udelay(10); | |
436 | } | |
437 | rme9652->prev_hw_offset = 0; | |
438 | } | |
439 | ||
abfd67bd | 440 | static inline void rme9652_start(struct snd_rme9652 *s) |
1da177e4 LT |
441 | { |
442 | s->control_register |= (RME9652_IE | RME9652_start_bit); | |
443 | rme9652_write(s, RME9652_control_register, s->control_register); | |
444 | } | |
445 | ||
abfd67bd | 446 | static inline void rme9652_stop(struct snd_rme9652 *s) |
1da177e4 LT |
447 | { |
448 | s->control_register &= ~(RME9652_start_bit | RME9652_IE); | |
449 | rme9652_write(s, RME9652_control_register, s->control_register); | |
450 | } | |
451 | ||
abfd67bd | 452 | static int rme9652_set_interrupt_interval(struct snd_rme9652 *s, |
1da177e4 LT |
453 | unsigned int frames) |
454 | { | |
455 | int restart = 0; | |
456 | int n; | |
457 | ||
458 | spin_lock_irq(&s->lock); | |
459 | ||
460 | if ((restart = s->running)) { | |
461 | rme9652_stop(s); | |
462 | } | |
463 | ||
464 | frames >>= 7; | |
465 | n = 0; | |
466 | while (frames) { | |
467 | n++; | |
468 | frames >>= 1; | |
469 | } | |
470 | ||
471 | s->control_register &= ~RME9652_latency; | |
472 | s->control_register |= rme9652_encode_latency(n); | |
473 | ||
474 | rme9652_write(s, RME9652_control_register, s->control_register); | |
475 | ||
476 | rme9652_compute_period_size(s); | |
477 | ||
478 | if (restart) | |
479 | rme9652_start(s); | |
480 | ||
481 | spin_unlock_irq(&s->lock); | |
482 | ||
483 | return 0; | |
484 | } | |
485 | ||
abfd67bd | 486 | static int rme9652_set_rate(struct snd_rme9652 *rme9652, int rate) |
1da177e4 LT |
487 | { |
488 | int restart; | |
489 | int reject_if_open = 0; | |
490 | int xrate; | |
491 | ||
492 | if (!snd_rme9652_use_is_exclusive (rme9652)) { | |
493 | return -EBUSY; | |
494 | } | |
495 | ||
496 | /* Changing from a "single speed" to a "double speed" rate is | |
497 | not allowed if any substreams are open. This is because | |
498 | such a change causes a shift in the location of | |
499 | the DMA buffers and a reduction in the number of available | |
500 | buffers. | |
501 | ||
502 | Note that a similar but essentially insoluble problem | |
503 | exists for externally-driven rate changes. All we can do | |
504 | is to flag rate changes in the read/write routines. | |
505 | */ | |
506 | ||
507 | spin_lock_irq(&rme9652->lock); | |
508 | xrate = rme9652_adat_sample_rate(rme9652); | |
509 | ||
510 | switch (rate) { | |
511 | case 44100: | |
512 | if (xrate > 48000) { | |
513 | reject_if_open = 1; | |
514 | } | |
515 | rate = 0; | |
516 | break; | |
517 | case 48000: | |
518 | if (xrate > 48000) { | |
519 | reject_if_open = 1; | |
520 | } | |
521 | rate = RME9652_freq; | |
522 | break; | |
523 | case 88200: | |
524 | if (xrate < 48000) { | |
525 | reject_if_open = 1; | |
526 | } | |
527 | rate = RME9652_DS; | |
528 | break; | |
529 | case 96000: | |
530 | if (xrate < 48000) { | |
531 | reject_if_open = 1; | |
532 | } | |
533 | rate = RME9652_DS | RME9652_freq; | |
534 | break; | |
535 | default: | |
536 | spin_unlock_irq(&rme9652->lock); | |
537 | return -EINVAL; | |
538 | } | |
539 | ||
540 | if (reject_if_open && (rme9652->capture_pid >= 0 || rme9652->playback_pid >= 0)) { | |
541 | spin_unlock_irq(&rme9652->lock); | |
542 | return -EBUSY; | |
543 | } | |
544 | ||
545 | if ((restart = rme9652->running)) { | |
546 | rme9652_stop(rme9652); | |
547 | } | |
548 | rme9652->control_register &= ~(RME9652_freq | RME9652_DS); | |
549 | rme9652->control_register |= rate; | |
550 | rme9652_write(rme9652, RME9652_control_register, rme9652->control_register); | |
551 | ||
552 | if (restart) { | |
553 | rme9652_start(rme9652); | |
554 | } | |
555 | ||
556 | if (rate & RME9652_DS) { | |
557 | if (rme9652->ss_channels == RME9652_NCHANNELS) { | |
558 | rme9652->channel_map = channel_map_9652_ds; | |
559 | } else { | |
560 | rme9652->channel_map = channel_map_9636_ds; | |
561 | } | |
562 | } else { | |
563 | if (rme9652->ss_channels == RME9652_NCHANNELS) { | |
564 | rme9652->channel_map = channel_map_9652_ss; | |
565 | } else { | |
566 | rme9652->channel_map = channel_map_9636_ss; | |
567 | } | |
568 | } | |
569 | ||
570 | spin_unlock_irq(&rme9652->lock); | |
571 | return 0; | |
572 | } | |
573 | ||
abfd67bd | 574 | static void rme9652_set_thru(struct snd_rme9652 *rme9652, int channel, int enable) |
1da177e4 LT |
575 | { |
576 | int i; | |
577 | ||
578 | rme9652->passthru = 0; | |
579 | ||
580 | if (channel < 0) { | |
581 | ||
582 | /* set thru for all channels */ | |
583 | ||
584 | if (enable) { | |
585 | for (i = 0; i < RME9652_NCHANNELS; i++) { | |
586 | rme9652->thru_bits |= (1 << i); | |
587 | rme9652_write(rme9652, RME9652_thru_base + i * 4, 1); | |
588 | } | |
589 | } else { | |
590 | for (i = 0; i < RME9652_NCHANNELS; i++) { | |
591 | rme9652->thru_bits &= ~(1 << i); | |
592 | rme9652_write(rme9652, RME9652_thru_base + i * 4, 0); | |
593 | } | |
594 | } | |
595 | ||
596 | } else { | |
597 | int mapped_channel; | |
598 | ||
599 | snd_assert(channel == RME9652_NCHANNELS, return); | |
600 | ||
601 | mapped_channel = rme9652->channel_map[channel]; | |
602 | ||
603 | if (enable) { | |
604 | rme9652->thru_bits |= (1 << mapped_channel); | |
605 | } else { | |
606 | rme9652->thru_bits &= ~(1 << mapped_channel); | |
607 | } | |
608 | ||
609 | rme9652_write(rme9652, | |
610 | RME9652_thru_base + mapped_channel * 4, | |
611 | enable ? 1 : 0); | |
612 | } | |
613 | } | |
614 | ||
abfd67bd | 615 | static int rme9652_set_passthru(struct snd_rme9652 *rme9652, int onoff) |
1da177e4 LT |
616 | { |
617 | if (onoff) { | |
618 | rme9652_set_thru(rme9652, -1, 1); | |
619 | ||
620 | /* we don't want interrupts, so do a | |
621 | custom version of rme9652_start(). | |
622 | */ | |
623 | ||
624 | rme9652->control_register = | |
625 | RME9652_inp_0 | | |
626 | rme9652_encode_latency(7) | | |
627 | RME9652_start_bit; | |
628 | ||
629 | rme9652_reset_hw_pointer(rme9652); | |
630 | ||
631 | rme9652_write(rme9652, RME9652_control_register, | |
632 | rme9652->control_register); | |
633 | rme9652->passthru = 1; | |
634 | } else { | |
635 | rme9652_set_thru(rme9652, -1, 0); | |
636 | rme9652_stop(rme9652); | |
637 | rme9652->passthru = 0; | |
638 | } | |
639 | ||
640 | return 0; | |
641 | } | |
642 | ||
abfd67bd | 643 | static void rme9652_spdif_set_bit (struct snd_rme9652 *rme9652, int mask, int onoff) |
1da177e4 LT |
644 | { |
645 | if (onoff) | |
646 | rme9652->control_register |= mask; | |
647 | else | |
648 | rme9652->control_register &= ~mask; | |
649 | ||
650 | rme9652_write(rme9652, RME9652_control_register, rme9652->control_register); | |
651 | } | |
652 | ||
abfd67bd | 653 | static void rme9652_spdif_write_byte (struct snd_rme9652 *rme9652, const int val) |
1da177e4 LT |
654 | { |
655 | long mask; | |
656 | long i; | |
657 | ||
658 | for (i = 0, mask = 0x80; i < 8; i++, mask >>= 1) { | |
659 | if (val & mask) | |
660 | rme9652_spdif_set_bit (rme9652, RME9652_SPDIF_WRITE, 1); | |
661 | else | |
662 | rme9652_spdif_set_bit (rme9652, RME9652_SPDIF_WRITE, 0); | |
663 | ||
664 | rme9652_spdif_set_bit (rme9652, RME9652_SPDIF_CLOCK, 1); | |
665 | rme9652_spdif_set_bit (rme9652, RME9652_SPDIF_CLOCK, 0); | |
666 | } | |
667 | } | |
668 | ||
abfd67bd | 669 | static int rme9652_spdif_read_byte (struct snd_rme9652 *rme9652) |
1da177e4 LT |
670 | { |
671 | long mask; | |
672 | long val; | |
673 | long i; | |
674 | ||
675 | val = 0; | |
676 | ||
677 | for (i = 0, mask = 0x80; i < 8; i++, mask >>= 1) { | |
678 | rme9652_spdif_set_bit (rme9652, RME9652_SPDIF_CLOCK, 1); | |
679 | if (rme9652_read (rme9652, RME9652_status_register) & RME9652_SPDIF_READ) | |
680 | val |= mask; | |
681 | rme9652_spdif_set_bit (rme9652, RME9652_SPDIF_CLOCK, 0); | |
682 | } | |
683 | ||
684 | return val; | |
685 | } | |
686 | ||
abfd67bd | 687 | static void rme9652_write_spdif_codec (struct snd_rme9652 *rme9652, const int address, const int data) |
1da177e4 LT |
688 | { |
689 | rme9652_spdif_set_bit (rme9652, RME9652_SPDIF_SELECT, 1); | |
690 | rme9652_spdif_write_byte (rme9652, 0x20); | |
691 | rme9652_spdif_write_byte (rme9652, address); | |
692 | rme9652_spdif_write_byte (rme9652, data); | |
693 | rme9652_spdif_set_bit (rme9652, RME9652_SPDIF_SELECT, 0); | |
694 | } | |
695 | ||
696 | ||
abfd67bd | 697 | static int rme9652_spdif_read_codec (struct snd_rme9652 *rme9652, const int address) |
1da177e4 LT |
698 | { |
699 | int ret; | |
700 | ||
701 | rme9652_spdif_set_bit (rme9652, RME9652_SPDIF_SELECT, 1); | |
702 | rme9652_spdif_write_byte (rme9652, 0x20); | |
703 | rme9652_spdif_write_byte (rme9652, address); | |
704 | rme9652_spdif_set_bit (rme9652, RME9652_SPDIF_SELECT, 0); | |
705 | rme9652_spdif_set_bit (rme9652, RME9652_SPDIF_SELECT, 1); | |
706 | ||
707 | rme9652_spdif_write_byte (rme9652, 0x21); | |
708 | ret = rme9652_spdif_read_byte (rme9652); | |
709 | rme9652_spdif_set_bit (rme9652, RME9652_SPDIF_SELECT, 0); | |
710 | ||
711 | return ret; | |
712 | } | |
713 | ||
abfd67bd | 714 | static void rme9652_initialize_spdif_receiver (struct snd_rme9652 *rme9652) |
1da177e4 LT |
715 | { |
716 | /* XXX what unsets this ? */ | |
717 | ||
718 | rme9652->control_register |= RME9652_SPDIF_RESET; | |
719 | ||
720 | rme9652_write_spdif_codec (rme9652, 4, 0x40); | |
721 | rme9652_write_spdif_codec (rme9652, 17, 0x13); | |
722 | rme9652_write_spdif_codec (rme9652, 6, 0x02); | |
723 | } | |
724 | ||
abfd67bd | 725 | static inline int rme9652_spdif_sample_rate(struct snd_rme9652 *s) |
1da177e4 LT |
726 | { |
727 | unsigned int rate_bits; | |
728 | ||
729 | if (rme9652_read(s, RME9652_status_register) & RME9652_ERF) { | |
730 | return -1; /* error condition */ | |
731 | } | |
732 | ||
733 | if (s->hw_rev == 15) { | |
734 | ||
735 | int x, y, ret; | |
736 | ||
737 | x = rme9652_spdif_read_codec (s, 30); | |
738 | ||
739 | if (x != 0) | |
740 | y = 48000 * 64 / x; | |
741 | else | |
742 | y = 0; | |
743 | ||
744 | if (y > 30400 && y < 33600) ret = 32000; | |
745 | else if (y > 41900 && y < 46000) ret = 44100; | |
746 | else if (y > 46000 && y < 50400) ret = 48000; | |
747 | else if (y > 60800 && y < 67200) ret = 64000; | |
748 | else if (y > 83700 && y < 92000) ret = 88200; | |
749 | else if (y > 92000 && y < 100000) ret = 96000; | |
750 | else ret = 0; | |
751 | return ret; | |
752 | } | |
753 | ||
754 | rate_bits = rme9652_read(s, RME9652_status_register) & RME9652_F; | |
755 | ||
756 | switch (rme9652_decode_spdif_rate(rate_bits)) { | |
757 | case 0x7: | |
758 | return 32000; | |
759 | break; | |
760 | ||
761 | case 0x6: | |
762 | return 44100; | |
763 | break; | |
764 | ||
765 | case 0x5: | |
766 | return 48000; | |
767 | break; | |
768 | ||
769 | case 0x4: | |
770 | return 88200; | |
771 | break; | |
772 | ||
773 | case 0x3: | |
774 | return 96000; | |
775 | break; | |
776 | ||
777 | case 0x0: | |
778 | return 64000; | |
779 | break; | |
780 | ||
781 | default: | |
99b359ba | 782 | snd_printk(KERN_ERR "%s: unknown S/PDIF input rate (bits = 0x%x)\n", |
1da177e4 LT |
783 | s->card_name, rate_bits); |
784 | return 0; | |
785 | break; | |
786 | } | |
787 | } | |
788 | ||
789 | /*----------------------------------------------------------------------------- | |
790 | Control Interface | |
791 | ----------------------------------------------------------------------------*/ | |
792 | ||
abfd67bd | 793 | static u32 snd_rme9652_convert_from_aes(struct snd_aes_iec958 *aes) |
1da177e4 LT |
794 | { |
795 | u32 val = 0; | |
796 | val |= (aes->status[0] & IEC958_AES0_PROFESSIONAL) ? RME9652_PRO : 0; | |
797 | val |= (aes->status[0] & IEC958_AES0_NONAUDIO) ? RME9652_Dolby : 0; | |
798 | if (val & RME9652_PRO) | |
799 | val |= (aes->status[0] & IEC958_AES0_PRO_EMPHASIS_5015) ? RME9652_EMP : 0; | |
800 | else | |
801 | val |= (aes->status[0] & IEC958_AES0_CON_EMPHASIS_5015) ? RME9652_EMP : 0; | |
802 | return val; | |
803 | } | |
804 | ||
abfd67bd | 805 | static void snd_rme9652_convert_to_aes(struct snd_aes_iec958 *aes, u32 val) |
1da177e4 LT |
806 | { |
807 | aes->status[0] = ((val & RME9652_PRO) ? IEC958_AES0_PROFESSIONAL : 0) | | |
808 | ((val & RME9652_Dolby) ? IEC958_AES0_NONAUDIO : 0); | |
809 | if (val & RME9652_PRO) | |
810 | aes->status[0] |= (val & RME9652_EMP) ? IEC958_AES0_PRO_EMPHASIS_5015 : 0; | |
811 | else | |
812 | aes->status[0] |= (val & RME9652_EMP) ? IEC958_AES0_CON_EMPHASIS_5015 : 0; | |
813 | } | |
814 | ||
abfd67bd | 815 | static int snd_rme9652_control_spdif_info(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo) |
1da177e4 LT |
816 | { |
817 | uinfo->type = SNDRV_CTL_ELEM_TYPE_IEC958; | |
818 | uinfo->count = 1; | |
819 | return 0; | |
820 | } | |
821 | ||
abfd67bd | 822 | static int snd_rme9652_control_spdif_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol) |
1da177e4 | 823 | { |
abfd67bd | 824 | struct snd_rme9652 *rme9652 = snd_kcontrol_chip(kcontrol); |
1da177e4 LT |
825 | |
826 | snd_rme9652_convert_to_aes(&ucontrol->value.iec958, rme9652->creg_spdif); | |
827 | return 0; | |
828 | } | |
829 | ||
abfd67bd | 830 | static int snd_rme9652_control_spdif_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol) |
1da177e4 | 831 | { |
abfd67bd | 832 | struct snd_rme9652 *rme9652 = snd_kcontrol_chip(kcontrol); |
1da177e4 LT |
833 | int change; |
834 | u32 val; | |
835 | ||
836 | val = snd_rme9652_convert_from_aes(&ucontrol->value.iec958); | |
837 | spin_lock_irq(&rme9652->lock); | |
838 | change = val != rme9652->creg_spdif; | |
839 | rme9652->creg_spdif = val; | |
840 | spin_unlock_irq(&rme9652->lock); | |
841 | return change; | |
842 | } | |
843 | ||
abfd67bd | 844 | static int snd_rme9652_control_spdif_stream_info(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo) |
1da177e4 LT |
845 | { |
846 | uinfo->type = SNDRV_CTL_ELEM_TYPE_IEC958; | |
847 | uinfo->count = 1; | |
848 | return 0; | |
849 | } | |
850 | ||
abfd67bd | 851 | static int snd_rme9652_control_spdif_stream_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol) |
1da177e4 | 852 | { |
abfd67bd | 853 | struct snd_rme9652 *rme9652 = snd_kcontrol_chip(kcontrol); |
1da177e4 LT |
854 | |
855 | snd_rme9652_convert_to_aes(&ucontrol->value.iec958, rme9652->creg_spdif_stream); | |
856 | return 0; | |
857 | } | |
858 | ||
abfd67bd | 859 | static int snd_rme9652_control_spdif_stream_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol) |
1da177e4 | 860 | { |
abfd67bd | 861 | struct snd_rme9652 *rme9652 = snd_kcontrol_chip(kcontrol); |
1da177e4 LT |
862 | int change; |
863 | u32 val; | |
864 | ||
865 | val = snd_rme9652_convert_from_aes(&ucontrol->value.iec958); | |
866 | spin_lock_irq(&rme9652->lock); | |
867 | change = val != rme9652->creg_spdif_stream; | |
868 | rme9652->creg_spdif_stream = val; | |
869 | rme9652->control_register &= ~(RME9652_PRO | RME9652_Dolby | RME9652_EMP); | |
870 | rme9652_write(rme9652, RME9652_control_register, rme9652->control_register |= val); | |
871 | spin_unlock_irq(&rme9652->lock); | |
872 | return change; | |
873 | } | |
874 | ||
abfd67bd | 875 | static int snd_rme9652_control_spdif_mask_info(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo) |
1da177e4 LT |
876 | { |
877 | uinfo->type = SNDRV_CTL_ELEM_TYPE_IEC958; | |
878 | uinfo->count = 1; | |
879 | return 0; | |
880 | } | |
881 | ||
abfd67bd | 882 | static int snd_rme9652_control_spdif_mask_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol) |
1da177e4 LT |
883 | { |
884 | ucontrol->value.iec958.status[0] = kcontrol->private_value; | |
885 | return 0; | |
886 | } | |
887 | ||
888 | #define RME9652_ADAT1_IN(xname, xindex) \ | |
67ed4161 | 889 | { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, .index = xindex, \ |
1da177e4 LT |
890 | .info = snd_rme9652_info_adat1_in, \ |
891 | .get = snd_rme9652_get_adat1_in, \ | |
892 | .put = snd_rme9652_put_adat1_in } | |
893 | ||
abfd67bd | 894 | static unsigned int rme9652_adat1_in(struct snd_rme9652 *rme9652) |
1da177e4 LT |
895 | { |
896 | if (rme9652->control_register & RME9652_ADAT1_INTERNAL) | |
897 | return 1; | |
898 | return 0; | |
899 | } | |
900 | ||
abfd67bd | 901 | static int rme9652_set_adat1_input(struct snd_rme9652 *rme9652, int internal) |
1da177e4 LT |
902 | { |
903 | int restart = 0; | |
904 | ||
905 | if (internal) { | |
906 | rme9652->control_register |= RME9652_ADAT1_INTERNAL; | |
907 | } else { | |
908 | rme9652->control_register &= ~RME9652_ADAT1_INTERNAL; | |
909 | } | |
910 | ||
911 | /* XXX do we actually need to stop the card when we do this ? */ | |
912 | ||
913 | if ((restart = rme9652->running)) { | |
914 | rme9652_stop(rme9652); | |
915 | } | |
916 | ||
917 | rme9652_write(rme9652, RME9652_control_register, rme9652->control_register); | |
918 | ||
919 | if (restart) { | |
920 | rme9652_start(rme9652); | |
921 | } | |
922 | ||
923 | return 0; | |
924 | } | |
925 | ||
abfd67bd | 926 | static int snd_rme9652_info_adat1_in(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo) |
1da177e4 LT |
927 | { |
928 | static char *texts[2] = {"ADAT1", "Internal"}; | |
929 | ||
930 | uinfo->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED; | |
931 | uinfo->count = 1; | |
932 | uinfo->value.enumerated.items = 2; | |
933 | if (uinfo->value.enumerated.item > 1) | |
934 | uinfo->value.enumerated.item = 1; | |
935 | strcpy(uinfo->value.enumerated.name, texts[uinfo->value.enumerated.item]); | |
936 | return 0; | |
937 | } | |
938 | ||
abfd67bd | 939 | static int snd_rme9652_get_adat1_in(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol) |
1da177e4 | 940 | { |
abfd67bd | 941 | struct snd_rme9652 *rme9652 = snd_kcontrol_chip(kcontrol); |
1da177e4 LT |
942 | |
943 | spin_lock_irq(&rme9652->lock); | |
944 | ucontrol->value.enumerated.item[0] = rme9652_adat1_in(rme9652); | |
945 | spin_unlock_irq(&rme9652->lock); | |
946 | return 0; | |
947 | } | |
948 | ||
abfd67bd | 949 | static int snd_rme9652_put_adat1_in(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol) |
1da177e4 | 950 | { |
abfd67bd | 951 | struct snd_rme9652 *rme9652 = snd_kcontrol_chip(kcontrol); |
1da177e4 LT |
952 | int change; |
953 | unsigned int val; | |
954 | ||
955 | if (!snd_rme9652_use_is_exclusive(rme9652)) | |
956 | return -EBUSY; | |
957 | val = ucontrol->value.enumerated.item[0] % 2; | |
958 | spin_lock_irq(&rme9652->lock); | |
959 | change = val != rme9652_adat1_in(rme9652); | |
960 | if (change) | |
961 | rme9652_set_adat1_input(rme9652, val); | |
962 | spin_unlock_irq(&rme9652->lock); | |
963 | return change; | |
964 | } | |
965 | ||
966 | #define RME9652_SPDIF_IN(xname, xindex) \ | |
67ed4161 | 967 | { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, .index = xindex, \ |
1da177e4 LT |
968 | .info = snd_rme9652_info_spdif_in, \ |
969 | .get = snd_rme9652_get_spdif_in, .put = snd_rme9652_put_spdif_in } | |
970 | ||
abfd67bd | 971 | static unsigned int rme9652_spdif_in(struct snd_rme9652 *rme9652) |
1da177e4 LT |
972 | { |
973 | return rme9652_decode_spdif_in(rme9652->control_register & | |
974 | RME9652_inp); | |
975 | } | |
976 | ||
abfd67bd | 977 | static int rme9652_set_spdif_input(struct snd_rme9652 *rme9652, int in) |
1da177e4 LT |
978 | { |
979 | int restart = 0; | |
980 | ||
981 | rme9652->control_register &= ~RME9652_inp; | |
982 | rme9652->control_register |= rme9652_encode_spdif_in(in); | |
983 | ||
984 | if ((restart = rme9652->running)) { | |
985 | rme9652_stop(rme9652); | |
986 | } | |
987 | ||
988 | rme9652_write(rme9652, RME9652_control_register, rme9652->control_register); | |
989 | ||
990 | if (restart) { | |
991 | rme9652_start(rme9652); | |
992 | } | |
993 | ||
994 | return 0; | |
995 | } | |
996 | ||
abfd67bd | 997 | static int snd_rme9652_info_spdif_in(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo) |
1da177e4 LT |
998 | { |
999 | static char *texts[3] = {"ADAT1", "Coaxial", "Internal"}; | |
1000 | ||
1001 | uinfo->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED; | |
1002 | uinfo->count = 1; | |
1003 | uinfo->value.enumerated.items = 3; | |
1004 | if (uinfo->value.enumerated.item > 2) | |
1005 | uinfo->value.enumerated.item = 2; | |
1006 | strcpy(uinfo->value.enumerated.name, texts[uinfo->value.enumerated.item]); | |
1007 | return 0; | |
1008 | } | |
1009 | ||
abfd67bd | 1010 | static int snd_rme9652_get_spdif_in(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol) |
1da177e4 | 1011 | { |
abfd67bd | 1012 | struct snd_rme9652 *rme9652 = snd_kcontrol_chip(kcontrol); |
1da177e4 LT |
1013 | |
1014 | spin_lock_irq(&rme9652->lock); | |
1015 | ucontrol->value.enumerated.item[0] = rme9652_spdif_in(rme9652); | |
1016 | spin_unlock_irq(&rme9652->lock); | |
1017 | return 0; | |
1018 | } | |
1019 | ||
abfd67bd | 1020 | static int snd_rme9652_put_spdif_in(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol) |
1da177e4 | 1021 | { |
abfd67bd | 1022 | struct snd_rme9652 *rme9652 = snd_kcontrol_chip(kcontrol); |
1da177e4 LT |
1023 | int change; |
1024 | unsigned int val; | |
1025 | ||
1026 | if (!snd_rme9652_use_is_exclusive(rme9652)) | |
1027 | return -EBUSY; | |
1028 | val = ucontrol->value.enumerated.item[0] % 3; | |
1029 | spin_lock_irq(&rme9652->lock); | |
1030 | change = val != rme9652_spdif_in(rme9652); | |
1031 | if (change) | |
1032 | rme9652_set_spdif_input(rme9652, val); | |
1033 | spin_unlock_irq(&rme9652->lock); | |
1034 | return change; | |
1035 | } | |
1036 | ||
1037 | #define RME9652_SPDIF_OUT(xname, xindex) \ | |
67ed4161 | 1038 | { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, .index = xindex, \ |
1da177e4 LT |
1039 | .info = snd_rme9652_info_spdif_out, \ |
1040 | .get = snd_rme9652_get_spdif_out, .put = snd_rme9652_put_spdif_out } | |
1041 | ||
abfd67bd | 1042 | static int rme9652_spdif_out(struct snd_rme9652 *rme9652) |
1da177e4 LT |
1043 | { |
1044 | return (rme9652->control_register & RME9652_opt_out) ? 1 : 0; | |
1045 | } | |
1046 | ||
abfd67bd | 1047 | static int rme9652_set_spdif_output(struct snd_rme9652 *rme9652, int out) |
1da177e4 LT |
1048 | { |
1049 | int restart = 0; | |
1050 | ||
1051 | if (out) { | |
1052 | rme9652->control_register |= RME9652_opt_out; | |
1053 | } else { | |
1054 | rme9652->control_register &= ~RME9652_opt_out; | |
1055 | } | |
1056 | ||
1057 | if ((restart = rme9652->running)) { | |
1058 | rme9652_stop(rme9652); | |
1059 | } | |
1060 | ||
1061 | rme9652_write(rme9652, RME9652_control_register, rme9652->control_register); | |
1062 | ||
1063 | if (restart) { | |
1064 | rme9652_start(rme9652); | |
1065 | } | |
1066 | ||
1067 | return 0; | |
1068 | } | |
1069 | ||
abfd67bd | 1070 | static int snd_rme9652_info_spdif_out(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo) |
1da177e4 LT |
1071 | { |
1072 | uinfo->type = SNDRV_CTL_ELEM_TYPE_BOOLEAN; | |
1073 | uinfo->count = 1; | |
1074 | uinfo->value.integer.min = 0; | |
1075 | uinfo->value.integer.max = 1; | |
1076 | return 0; | |
1077 | } | |
1078 | ||
abfd67bd | 1079 | static int snd_rme9652_get_spdif_out(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol) |
1da177e4 | 1080 | { |
abfd67bd | 1081 | struct snd_rme9652 *rme9652 = snd_kcontrol_chip(kcontrol); |
1da177e4 LT |
1082 | |
1083 | spin_lock_irq(&rme9652->lock); | |
1084 | ucontrol->value.integer.value[0] = rme9652_spdif_out(rme9652); | |
1085 | spin_unlock_irq(&rme9652->lock); | |
1086 | return 0; | |
1087 | } | |
1088 | ||
abfd67bd | 1089 | static int snd_rme9652_put_spdif_out(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol) |
1da177e4 | 1090 | { |
abfd67bd | 1091 | struct snd_rme9652 *rme9652 = snd_kcontrol_chip(kcontrol); |
1da177e4 LT |
1092 | int change; |
1093 | unsigned int val; | |
1094 | ||
1095 | if (!snd_rme9652_use_is_exclusive(rme9652)) | |
1096 | return -EBUSY; | |
1097 | val = ucontrol->value.integer.value[0] & 1; | |
1098 | spin_lock_irq(&rme9652->lock); | |
1099 | change = (int)val != rme9652_spdif_out(rme9652); | |
1100 | rme9652_set_spdif_output(rme9652, val); | |
1101 | spin_unlock_irq(&rme9652->lock); | |
1102 | return change; | |
1103 | } | |
1104 | ||
1105 | #define RME9652_SYNC_MODE(xname, xindex) \ | |
67ed4161 | 1106 | { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, .index = xindex, \ |
1da177e4 LT |
1107 | .info = snd_rme9652_info_sync_mode, \ |
1108 | .get = snd_rme9652_get_sync_mode, .put = snd_rme9652_put_sync_mode } | |
1109 | ||
abfd67bd | 1110 | static int rme9652_sync_mode(struct snd_rme9652 *rme9652) |
1da177e4 LT |
1111 | { |
1112 | if (rme9652->control_register & RME9652_wsel) { | |
1113 | return 2; | |
1114 | } else if (rme9652->control_register & RME9652_Master) { | |
1115 | return 1; | |
1116 | } else { | |
1117 | return 0; | |
1118 | } | |
1119 | } | |
1120 | ||
abfd67bd | 1121 | static int rme9652_set_sync_mode(struct snd_rme9652 *rme9652, int mode) |
1da177e4 LT |
1122 | { |
1123 | int restart = 0; | |
1124 | ||
1125 | switch (mode) { | |
1126 | case 0: | |
1127 | rme9652->control_register &= | |
1128 | ~(RME9652_Master | RME9652_wsel); | |
1129 | break; | |
1130 | case 1: | |
1131 | rme9652->control_register = | |
1132 | (rme9652->control_register & ~RME9652_wsel) | RME9652_Master; | |
1133 | break; | |
1134 | case 2: | |
1135 | rme9652->control_register |= | |
1136 | (RME9652_Master | RME9652_wsel); | |
1137 | break; | |
1138 | } | |
1139 | ||
1140 | if ((restart = rme9652->running)) { | |
1141 | rme9652_stop(rme9652); | |
1142 | } | |
1143 | ||
1144 | rme9652_write(rme9652, RME9652_control_register, rme9652->control_register); | |
1145 | ||
1146 | if (restart) { | |
1147 | rme9652_start(rme9652); | |
1148 | } | |
1149 | ||
1150 | return 0; | |
1151 | } | |
1152 | ||
abfd67bd | 1153 | static int snd_rme9652_info_sync_mode(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo) |
1da177e4 LT |
1154 | { |
1155 | static char *texts[3] = {"AutoSync", "Master", "Word Clock"}; | |
1156 | ||
1157 | uinfo->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED; | |
1158 | uinfo->count = 1; | |
1159 | uinfo->value.enumerated.items = 3; | |
1160 | if (uinfo->value.enumerated.item > 2) | |
1161 | uinfo->value.enumerated.item = 2; | |
1162 | strcpy(uinfo->value.enumerated.name, texts[uinfo->value.enumerated.item]); | |
1163 | return 0; | |
1164 | } | |
1165 | ||
abfd67bd | 1166 | static int snd_rme9652_get_sync_mode(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol) |
1da177e4 | 1167 | { |
abfd67bd | 1168 | struct snd_rme9652 *rme9652 = snd_kcontrol_chip(kcontrol); |
1da177e4 LT |
1169 | |
1170 | spin_lock_irq(&rme9652->lock); | |
1171 | ucontrol->value.enumerated.item[0] = rme9652_sync_mode(rme9652); | |
1172 | spin_unlock_irq(&rme9652->lock); | |
1173 | return 0; | |
1174 | } | |
1175 | ||
abfd67bd | 1176 | static int snd_rme9652_put_sync_mode(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol) |
1da177e4 | 1177 | { |
abfd67bd | 1178 | struct snd_rme9652 *rme9652 = snd_kcontrol_chip(kcontrol); |
1da177e4 LT |
1179 | int change; |
1180 | unsigned int val; | |
1181 | ||
1182 | val = ucontrol->value.enumerated.item[0] % 3; | |
1183 | spin_lock_irq(&rme9652->lock); | |
1184 | change = (int)val != rme9652_sync_mode(rme9652); | |
1185 | rme9652_set_sync_mode(rme9652, val); | |
1186 | spin_unlock_irq(&rme9652->lock); | |
1187 | return change; | |
1188 | } | |
1189 | ||
1190 | #define RME9652_SYNC_PREF(xname, xindex) \ | |
67ed4161 | 1191 | { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, .index = xindex, \ |
1da177e4 LT |
1192 | .info = snd_rme9652_info_sync_pref, \ |
1193 | .get = snd_rme9652_get_sync_pref, .put = snd_rme9652_put_sync_pref } | |
1194 | ||
abfd67bd | 1195 | static int rme9652_sync_pref(struct snd_rme9652 *rme9652) |
1da177e4 LT |
1196 | { |
1197 | switch (rme9652->control_register & RME9652_SyncPref_Mask) { | |
1198 | case RME9652_SyncPref_ADAT1: | |
1199 | return RME9652_SYNC_FROM_ADAT1; | |
1200 | case RME9652_SyncPref_ADAT2: | |
1201 | return RME9652_SYNC_FROM_ADAT2; | |
1202 | case RME9652_SyncPref_ADAT3: | |
1203 | return RME9652_SYNC_FROM_ADAT3; | |
1204 | case RME9652_SyncPref_SPDIF: | |
1205 | return RME9652_SYNC_FROM_SPDIF; | |
1206 | } | |
1207 | /* Not reachable */ | |
1208 | return 0; | |
1209 | } | |
1210 | ||
abfd67bd | 1211 | static int rme9652_set_sync_pref(struct snd_rme9652 *rme9652, int pref) |
1da177e4 LT |
1212 | { |
1213 | int restart; | |
1214 | ||
1215 | rme9652->control_register &= ~RME9652_SyncPref_Mask; | |
1216 | switch (pref) { | |
1217 | case RME9652_SYNC_FROM_ADAT1: | |
1218 | rme9652->control_register |= RME9652_SyncPref_ADAT1; | |
1219 | break; | |
1220 | case RME9652_SYNC_FROM_ADAT2: | |
1221 | rme9652->control_register |= RME9652_SyncPref_ADAT2; | |
1222 | break; | |
1223 | case RME9652_SYNC_FROM_ADAT3: | |
1224 | rme9652->control_register |= RME9652_SyncPref_ADAT3; | |
1225 | break; | |
1226 | case RME9652_SYNC_FROM_SPDIF: | |
1227 | rme9652->control_register |= RME9652_SyncPref_SPDIF; | |
1228 | break; | |
1229 | } | |
1230 | ||
1231 | if ((restart = rme9652->running)) { | |
1232 | rme9652_stop(rme9652); | |
1233 | } | |
1234 | ||
1235 | rme9652_write(rme9652, RME9652_control_register, rme9652->control_register); | |
1236 | ||
1237 | if (restart) { | |
1238 | rme9652_start(rme9652); | |
1239 | } | |
1240 | ||
1241 | return 0; | |
1242 | } | |
1243 | ||
abfd67bd | 1244 | static int snd_rme9652_info_sync_pref(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo) |
1da177e4 LT |
1245 | { |
1246 | static char *texts[4] = {"IEC958 In", "ADAT1 In", "ADAT2 In", "ADAT3 In"}; | |
abfd67bd | 1247 | struct snd_rme9652 *rme9652 = snd_kcontrol_chip(kcontrol); |
1da177e4 LT |
1248 | |
1249 | uinfo->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED; | |
1250 | uinfo->count = 1; | |
1251 | uinfo->value.enumerated.items = rme9652->ss_channels == RME9652_NCHANNELS ? 4 : 3; | |
1252 | if (uinfo->value.enumerated.item >= uinfo->value.enumerated.items) | |
1253 | uinfo->value.enumerated.item = uinfo->value.enumerated.items - 1; | |
1254 | strcpy(uinfo->value.enumerated.name, texts[uinfo->value.enumerated.item]); | |
1255 | return 0; | |
1256 | } | |
1257 | ||
abfd67bd | 1258 | static int snd_rme9652_get_sync_pref(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol) |
1da177e4 | 1259 | { |
abfd67bd | 1260 | struct snd_rme9652 *rme9652 = snd_kcontrol_chip(kcontrol); |
1da177e4 LT |
1261 | |
1262 | spin_lock_irq(&rme9652->lock); | |
1263 | ucontrol->value.enumerated.item[0] = rme9652_sync_pref(rme9652); | |
1264 | spin_unlock_irq(&rme9652->lock); | |
1265 | return 0; | |
1266 | } | |
1267 | ||
abfd67bd | 1268 | static int snd_rme9652_put_sync_pref(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol) |
1da177e4 | 1269 | { |
abfd67bd | 1270 | struct snd_rme9652 *rme9652 = snd_kcontrol_chip(kcontrol); |
1da177e4 LT |
1271 | int change, max; |
1272 | unsigned int val; | |
1273 | ||
1274 | if (!snd_rme9652_use_is_exclusive(rme9652)) | |
1275 | return -EBUSY; | |
1276 | max = rme9652->ss_channels == RME9652_NCHANNELS ? 4 : 3; | |
1277 | val = ucontrol->value.enumerated.item[0] % max; | |
1278 | spin_lock_irq(&rme9652->lock); | |
1279 | change = (int)val != rme9652_sync_pref(rme9652); | |
1280 | rme9652_set_sync_pref(rme9652, val); | |
1281 | spin_unlock_irq(&rme9652->lock); | |
1282 | return change; | |
1283 | } | |
1284 | ||
abfd67bd | 1285 | static int snd_rme9652_info_thru(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo) |
1da177e4 | 1286 | { |
abfd67bd | 1287 | struct snd_rme9652 *rme9652 = snd_kcontrol_chip(kcontrol); |
1da177e4 LT |
1288 | uinfo->type = SNDRV_CTL_ELEM_TYPE_BOOLEAN; |
1289 | uinfo->count = rme9652->ss_channels; | |
1290 | uinfo->value.integer.min = 0; | |
1291 | uinfo->value.integer.max = 1; | |
1292 | return 0; | |
1293 | } | |
1294 | ||
abfd67bd | 1295 | static int snd_rme9652_get_thru(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol) |
1da177e4 | 1296 | { |
abfd67bd | 1297 | struct snd_rme9652 *rme9652 = snd_kcontrol_chip(kcontrol); |
1da177e4 LT |
1298 | unsigned int k; |
1299 | u32 thru_bits = rme9652->thru_bits; | |
1300 | ||
1301 | for (k = 0; k < rme9652->ss_channels; ++k) { | |
1302 | ucontrol->value.integer.value[k] = !!(thru_bits & (1 << k)); | |
1303 | } | |
1304 | return 0; | |
1305 | } | |
1306 | ||
abfd67bd | 1307 | static int snd_rme9652_put_thru(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol) |
1da177e4 | 1308 | { |
abfd67bd | 1309 | struct snd_rme9652 *rme9652 = snd_kcontrol_chip(kcontrol); |
1da177e4 LT |
1310 | int change; |
1311 | unsigned int chn; | |
1312 | u32 thru_bits = 0; | |
1313 | ||
1314 | if (!snd_rme9652_use_is_exclusive(rme9652)) | |
1315 | return -EBUSY; | |
1316 | ||
1317 | for (chn = 0; chn < rme9652->ss_channels; ++chn) { | |
1318 | if (ucontrol->value.integer.value[chn]) | |
1319 | thru_bits |= 1 << chn; | |
1320 | } | |
1321 | ||
1322 | spin_lock_irq(&rme9652->lock); | |
1323 | change = thru_bits ^ rme9652->thru_bits; | |
1324 | if (change) { | |
1325 | for (chn = 0; chn < rme9652->ss_channels; ++chn) { | |
1326 | if (!(change & (1 << chn))) | |
1327 | continue; | |
1328 | rme9652_set_thru(rme9652,chn,thru_bits&(1<<chn)); | |
1329 | } | |
1330 | } | |
1331 | spin_unlock_irq(&rme9652->lock); | |
1332 | return !!change; | |
1333 | } | |
1334 | ||
1335 | #define RME9652_PASSTHRU(xname, xindex) \ | |
67ed4161 | 1336 | { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, .index = xindex, \ |
1da177e4 LT |
1337 | .info = snd_rme9652_info_passthru, \ |
1338 | .put = snd_rme9652_put_passthru, \ | |
1339 | .get = snd_rme9652_get_passthru } | |
1340 | ||
abfd67bd | 1341 | static int snd_rme9652_info_passthru(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo) |
1da177e4 LT |
1342 | { |
1343 | uinfo->type = SNDRV_CTL_ELEM_TYPE_BOOLEAN; | |
1344 | uinfo->count = 1; | |
1345 | uinfo->value.integer.min = 0; | |
1346 | uinfo->value.integer.max = 1; | |
1347 | return 0; | |
1348 | } | |
1349 | ||
abfd67bd | 1350 | static int snd_rme9652_get_passthru(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol) |
1da177e4 | 1351 | { |
abfd67bd | 1352 | struct snd_rme9652 *rme9652 = snd_kcontrol_chip(kcontrol); |
1da177e4 LT |
1353 | |
1354 | spin_lock_irq(&rme9652->lock); | |
1355 | ucontrol->value.integer.value[0] = rme9652->passthru; | |
1356 | spin_unlock_irq(&rme9652->lock); | |
1357 | return 0; | |
1358 | } | |
1359 | ||
abfd67bd | 1360 | static int snd_rme9652_put_passthru(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol) |
1da177e4 | 1361 | { |
abfd67bd | 1362 | struct snd_rme9652 *rme9652 = snd_kcontrol_chip(kcontrol); |
1da177e4 LT |
1363 | int change; |
1364 | unsigned int val; | |
1365 | int err = 0; | |
1366 | ||
1367 | if (!snd_rme9652_use_is_exclusive(rme9652)) | |
1368 | return -EBUSY; | |
1369 | ||
1370 | val = ucontrol->value.integer.value[0] & 1; | |
1371 | spin_lock_irq(&rme9652->lock); | |
1372 | change = (ucontrol->value.integer.value[0] != rme9652->passthru); | |
1373 | if (change) | |
1374 | err = rme9652_set_passthru(rme9652, val); | |
1375 | spin_unlock_irq(&rme9652->lock); | |
1376 | return err ? err : change; | |
1377 | } | |
1378 | ||
1379 | /* Read-only switches */ | |
1380 | ||
1381 | #define RME9652_SPDIF_RATE(xname, xindex) \ | |
67ed4161 | 1382 | { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, .index = xindex, \ |
1da177e4 LT |
1383 | .access = SNDRV_CTL_ELEM_ACCESS_READ | SNDRV_CTL_ELEM_ACCESS_VOLATILE, \ |
1384 | .info = snd_rme9652_info_spdif_rate, \ | |
1385 | .get = snd_rme9652_get_spdif_rate } | |
1386 | ||
abfd67bd | 1387 | static int snd_rme9652_info_spdif_rate(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo) |
1da177e4 LT |
1388 | { |
1389 | uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER; | |
1390 | uinfo->count = 1; | |
1391 | uinfo->value.integer.min = 0; | |
1392 | uinfo->value.integer.max = 96000; | |
1393 | return 0; | |
1394 | } | |
1395 | ||
abfd67bd | 1396 | static int snd_rme9652_get_spdif_rate(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol) |
1da177e4 | 1397 | { |
abfd67bd | 1398 | struct snd_rme9652 *rme9652 = snd_kcontrol_chip(kcontrol); |
1da177e4 LT |
1399 | |
1400 | spin_lock_irq(&rme9652->lock); | |
1401 | ucontrol->value.integer.value[0] = rme9652_spdif_sample_rate(rme9652); | |
1402 | spin_unlock_irq(&rme9652->lock); | |
1403 | return 0; | |
1404 | } | |
1405 | ||
1406 | #define RME9652_ADAT_SYNC(xname, xindex, xidx) \ | |
67ed4161 | 1407 | { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, .index = xindex, \ |
1da177e4 LT |
1408 | .access = SNDRV_CTL_ELEM_ACCESS_READ | SNDRV_CTL_ELEM_ACCESS_VOLATILE, \ |
1409 | .info = snd_rme9652_info_adat_sync, \ | |
1410 | .get = snd_rme9652_get_adat_sync, .private_value = xidx } | |
1411 | ||
abfd67bd | 1412 | static int snd_rme9652_info_adat_sync(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo) |
1da177e4 LT |
1413 | { |
1414 | static char *texts[4] = {"No Lock", "Lock", "No Lock Sync", "Lock Sync"}; | |
1415 | ||
1416 | uinfo->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED; | |
1417 | uinfo->count = 1; | |
1418 | uinfo->value.enumerated.items = 4; | |
1419 | if (uinfo->value.enumerated.item >= uinfo->value.enumerated.items) | |
1420 | uinfo->value.enumerated.item = uinfo->value.enumerated.items - 1; | |
1421 | strcpy(uinfo->value.enumerated.name, texts[uinfo->value.enumerated.item]); | |
1422 | return 0; | |
1423 | } | |
1424 | ||
abfd67bd | 1425 | static int snd_rme9652_get_adat_sync(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol) |
1da177e4 | 1426 | { |
abfd67bd | 1427 | struct snd_rme9652 *rme9652 = snd_kcontrol_chip(kcontrol); |
1da177e4 LT |
1428 | unsigned int mask1, mask2, val; |
1429 | ||
1430 | switch (kcontrol->private_value) { | |
1431 | case 0: mask1 = RME9652_lock_0; mask2 = RME9652_sync_0; break; | |
1432 | case 1: mask1 = RME9652_lock_1; mask2 = RME9652_sync_1; break; | |
1433 | case 2: mask1 = RME9652_lock_2; mask2 = RME9652_sync_2; break; | |
1434 | default: return -EINVAL; | |
1435 | } | |
1436 | val = rme9652_read(rme9652, RME9652_status_register); | |
1437 | ucontrol->value.enumerated.item[0] = (val & mask1) ? 1 : 0; | |
1438 | ucontrol->value.enumerated.item[0] |= (val & mask2) ? 2 : 0; | |
1439 | return 0; | |
1440 | } | |
1441 | ||
1442 | #define RME9652_TC_VALID(xname, xindex) \ | |
67ed4161 | 1443 | { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, .index = xindex, \ |
1da177e4 LT |
1444 | .access = SNDRV_CTL_ELEM_ACCESS_READ | SNDRV_CTL_ELEM_ACCESS_VOLATILE, \ |
1445 | .info = snd_rme9652_info_tc_valid, \ | |
1446 | .get = snd_rme9652_get_tc_valid } | |
1447 | ||
abfd67bd | 1448 | static int snd_rme9652_info_tc_valid(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo) |
1da177e4 LT |
1449 | { |
1450 | uinfo->type = SNDRV_CTL_ELEM_TYPE_BOOLEAN; | |
1451 | uinfo->count = 1; | |
1452 | uinfo->value.integer.min = 0; | |
1453 | uinfo->value.integer.max = 1; | |
1454 | return 0; | |
1455 | } | |
1456 | ||
abfd67bd | 1457 | static int snd_rme9652_get_tc_valid(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol) |
1da177e4 | 1458 | { |
abfd67bd | 1459 | struct snd_rme9652 *rme9652 = snd_kcontrol_chip(kcontrol); |
1da177e4 LT |
1460 | |
1461 | ucontrol->value.integer.value[0] = | |
1462 | (rme9652_read(rme9652, RME9652_status_register) & RME9652_tc_valid) ? 1 : 0; | |
1463 | return 0; | |
1464 | } | |
1465 | ||
44456d37 | 1466 | #ifdef ALSA_HAS_STANDARD_WAY_OF_RETURNING_TIMECODE |
1da177e4 LT |
1467 | |
1468 | /* FIXME: this routine needs a port to the new control API --jk */ | |
1469 | ||
1470 | static int snd_rme9652_get_tc_value(void *private_data, | |
1471 | snd_kswitch_t *kswitch, | |
1472 | snd_switch_t *uswitch) | |
1473 | { | |
abfd67bd | 1474 | struct snd_rme9652 *s = (struct snd_rme9652 *) private_data; |
1da177e4 LT |
1475 | u32 value; |
1476 | int i; | |
1477 | ||
1478 | uswitch->type = SNDRV_SW_TYPE_DWORD; | |
1479 | ||
1480 | if ((rme9652_read(s, RME9652_status_register) & | |
1481 | RME9652_tc_valid) == 0) { | |
1482 | uswitch->value.data32[0] = 0; | |
1483 | return 0; | |
1484 | } | |
1485 | ||
1486 | /* timecode request */ | |
1487 | ||
1488 | rme9652_write(s, RME9652_time_code, 0); | |
1489 | ||
1490 | /* XXX bug alert: loop-based timing !!!! */ | |
1491 | ||
1492 | for (i = 0; i < 50; i++) { | |
1493 | if (!(rme9652_read(s, i * 4) & RME9652_tc_busy)) | |
1494 | break; | |
1495 | } | |
1496 | ||
1497 | if (!(rme9652_read(s, i * 4) & RME9652_tc_busy)) { | |
1498 | return -EIO; | |
1499 | } | |
1500 | ||
1501 | value = 0; | |
1502 | ||
1503 | for (i = 0; i < 32; i++) { | |
1504 | value >>= 1; | |
1505 | ||
1506 | if (rme9652_read(s, i * 4) & RME9652_tc_out) | |
1507 | value |= 0x80000000; | |
1508 | } | |
1509 | ||
1510 | if (value > 2 * 60 * 48000) { | |
1511 | value -= 2 * 60 * 48000; | |
1512 | } else { | |
1513 | value = 0; | |
1514 | } | |
1515 | ||
1516 | uswitch->value.data32[0] = value; | |
1517 | ||
1518 | return 0; | |
1519 | } | |
1520 | ||
1521 | #endif /* ALSA_HAS_STANDARD_WAY_OF_RETURNING_TIMECODE */ | |
1522 | ||
abfd67bd | 1523 | static struct snd_kcontrol_new snd_rme9652_controls[] = { |
1da177e4 | 1524 | { |
5549d549 | 1525 | .iface = SNDRV_CTL_ELEM_IFACE_PCM, |
1da177e4 LT |
1526 | .name = SNDRV_CTL_NAME_IEC958("",PLAYBACK,DEFAULT), |
1527 | .info = snd_rme9652_control_spdif_info, | |
1528 | .get = snd_rme9652_control_spdif_get, | |
1529 | .put = snd_rme9652_control_spdif_put, | |
1530 | }, | |
1531 | { | |
1532 | .access = SNDRV_CTL_ELEM_ACCESS_READWRITE | SNDRV_CTL_ELEM_ACCESS_INACTIVE, | |
5549d549 | 1533 | .iface = SNDRV_CTL_ELEM_IFACE_PCM, |
1da177e4 LT |
1534 | .name = SNDRV_CTL_NAME_IEC958("",PLAYBACK,PCM_STREAM), |
1535 | .info = snd_rme9652_control_spdif_stream_info, | |
1536 | .get = snd_rme9652_control_spdif_stream_get, | |
1537 | .put = snd_rme9652_control_spdif_stream_put, | |
1538 | }, | |
1539 | { | |
1540 | .access = SNDRV_CTL_ELEM_ACCESS_READ, | |
5549d549 | 1541 | .iface = SNDRV_CTL_ELEM_IFACE_PCM, |
1da177e4 LT |
1542 | .name = SNDRV_CTL_NAME_IEC958("",PLAYBACK,CON_MASK), |
1543 | .info = snd_rme9652_control_spdif_mask_info, | |
1544 | .get = snd_rme9652_control_spdif_mask_get, | |
1545 | .private_value = IEC958_AES0_NONAUDIO | | |
1546 | IEC958_AES0_PROFESSIONAL | | |
1547 | IEC958_AES0_CON_EMPHASIS, | |
1548 | }, | |
1549 | { | |
1550 | .access = SNDRV_CTL_ELEM_ACCESS_READ, | |
5549d549 | 1551 | .iface = SNDRV_CTL_ELEM_IFACE_PCM, |
1da177e4 LT |
1552 | .name = SNDRV_CTL_NAME_IEC958("",PLAYBACK,PRO_MASK), |
1553 | .info = snd_rme9652_control_spdif_mask_info, | |
1554 | .get = snd_rme9652_control_spdif_mask_get, | |
1555 | .private_value = IEC958_AES0_NONAUDIO | | |
1556 | IEC958_AES0_PROFESSIONAL | | |
1557 | IEC958_AES0_PRO_EMPHASIS, | |
1558 | }, | |
1559 | RME9652_SPDIF_IN("IEC958 Input Connector", 0), | |
1560 | RME9652_SPDIF_OUT("IEC958 Output also on ADAT1", 0), | |
1561 | RME9652_SYNC_MODE("Sync Mode", 0), | |
1562 | RME9652_SYNC_PREF("Preferred Sync Source", 0), | |
1563 | { | |
67ed4161 | 1564 | .iface = SNDRV_CTL_ELEM_IFACE_MIXER, |
1da177e4 LT |
1565 | .name = "Channels Thru", |
1566 | .index = 0, | |
1567 | .info = snd_rme9652_info_thru, | |
1568 | .get = snd_rme9652_get_thru, | |
1569 | .put = snd_rme9652_put_thru, | |
1570 | }, | |
1571 | RME9652_SPDIF_RATE("IEC958 Sample Rate", 0), | |
1572 | RME9652_ADAT_SYNC("ADAT1 Sync Check", 0, 0), | |
1573 | RME9652_ADAT_SYNC("ADAT2 Sync Check", 0, 1), | |
1574 | RME9652_TC_VALID("Timecode Valid", 0), | |
1575 | RME9652_PASSTHRU("Passthru", 0) | |
1576 | }; | |
1577 | ||
abfd67bd | 1578 | static struct snd_kcontrol_new snd_rme9652_adat3_check = |
1da177e4 LT |
1579 | RME9652_ADAT_SYNC("ADAT3 Sync Check", 0, 2); |
1580 | ||
abfd67bd | 1581 | static struct snd_kcontrol_new snd_rme9652_adat1_input = |
1da177e4 LT |
1582 | RME9652_ADAT1_IN("ADAT1 Input Source", 0); |
1583 | ||
abfd67bd | 1584 | static int snd_rme9652_create_controls(struct snd_card *card, struct snd_rme9652 *rme9652) |
1da177e4 LT |
1585 | { |
1586 | unsigned int idx; | |
1587 | int err; | |
abfd67bd | 1588 | struct snd_kcontrol *kctl; |
1da177e4 LT |
1589 | |
1590 | for (idx = 0; idx < ARRAY_SIZE(snd_rme9652_controls); idx++) { | |
1591 | if ((err = snd_ctl_add(card, kctl = snd_ctl_new1(&snd_rme9652_controls[idx], rme9652))) < 0) | |
1592 | return err; | |
1593 | if (idx == 1) /* IEC958 (S/PDIF) Stream */ | |
1594 | rme9652->spdif_ctl = kctl; | |
1595 | } | |
1596 | ||
1597 | if (rme9652->ss_channels == RME9652_NCHANNELS) | |
1598 | if ((err = snd_ctl_add(card, kctl = snd_ctl_new1(&snd_rme9652_adat3_check, rme9652))) < 0) | |
1599 | return err; | |
1600 | ||
1601 | if (rme9652->hw_rev >= 15) | |
1602 | if ((err = snd_ctl_add(card, kctl = snd_ctl_new1(&snd_rme9652_adat1_input, rme9652))) < 0) | |
1603 | return err; | |
1604 | ||
1605 | return 0; | |
1606 | } | |
1607 | ||
1608 | /*------------------------------------------------------------ | |
1609 | /proc interface | |
1610 | ------------------------------------------------------------*/ | |
1611 | ||
1612 | static void | |
abfd67bd | 1613 | snd_rme9652_proc_read(struct snd_info_entry *entry, struct snd_info_buffer *buffer) |
1da177e4 | 1614 | { |
abfd67bd | 1615 | struct snd_rme9652 *rme9652 = (struct snd_rme9652 *) entry->private_data; |
1da177e4 LT |
1616 | u32 thru_bits = rme9652->thru_bits; |
1617 | int show_auto_sync_source = 0; | |
1618 | int i; | |
1619 | unsigned int status; | |
1620 | int x; | |
1621 | ||
1622 | status = rme9652_read(rme9652, RME9652_status_register); | |
1623 | ||
1624 | snd_iprintf(buffer, "%s (Card #%d)\n", rme9652->card_name, rme9652->card->number + 1); | |
1625 | snd_iprintf(buffer, "Buffers: capture %p playback %p\n", | |
1626 | rme9652->capture_buffer, rme9652->playback_buffer); | |
1627 | snd_iprintf(buffer, "IRQ: %d Registers bus: 0x%lx VM: 0x%lx\n", | |
1628 | rme9652->irq, rme9652->port, (unsigned long)rme9652->iobase); | |
1629 | snd_iprintf(buffer, "Control register: %x\n", rme9652->control_register); | |
1630 | ||
1631 | snd_iprintf(buffer, "\n"); | |
1632 | ||
1633 | x = 1 << (6 + rme9652_decode_latency(rme9652->control_register & | |
1634 | RME9652_latency)); | |
1635 | ||
1636 | snd_iprintf(buffer, "Latency: %d samples (2 periods of %lu bytes)\n", | |
1637 | x, (unsigned long) rme9652->period_bytes); | |
1638 | snd_iprintf(buffer, "Hardware pointer (frames): %ld\n", | |
1639 | rme9652_hw_pointer(rme9652)); | |
1640 | snd_iprintf(buffer, "Passthru: %s\n", | |
1641 | rme9652->passthru ? "yes" : "no"); | |
1642 | ||
1643 | if ((rme9652->control_register & (RME9652_Master | RME9652_wsel)) == 0) { | |
1644 | snd_iprintf(buffer, "Clock mode: autosync\n"); | |
1645 | show_auto_sync_source = 1; | |
1646 | } else if (rme9652->control_register & RME9652_wsel) { | |
1647 | if (status & RME9652_wsel_rd) { | |
1648 | snd_iprintf(buffer, "Clock mode: word clock\n"); | |
1649 | } else { | |
1650 | snd_iprintf(buffer, "Clock mode: word clock (no signal)\n"); | |
1651 | } | |
1652 | } else { | |
1653 | snd_iprintf(buffer, "Clock mode: master\n"); | |
1654 | } | |
1655 | ||
1656 | if (show_auto_sync_source) { | |
1657 | switch (rme9652->control_register & RME9652_SyncPref_Mask) { | |
1658 | case RME9652_SyncPref_ADAT1: | |
1659 | snd_iprintf(buffer, "Pref. sync source: ADAT1\n"); | |
1660 | break; | |
1661 | case RME9652_SyncPref_ADAT2: | |
1662 | snd_iprintf(buffer, "Pref. sync source: ADAT2\n"); | |
1663 | break; | |
1664 | case RME9652_SyncPref_ADAT3: | |
1665 | snd_iprintf(buffer, "Pref. sync source: ADAT3\n"); | |
1666 | break; | |
1667 | case RME9652_SyncPref_SPDIF: | |
1668 | snd_iprintf(buffer, "Pref. sync source: IEC958\n"); | |
1669 | break; | |
1670 | default: | |
1671 | snd_iprintf(buffer, "Pref. sync source: ???\n"); | |
1672 | } | |
1673 | } | |
1674 | ||
1675 | if (rme9652->hw_rev >= 15) | |
1676 | snd_iprintf(buffer, "\nADAT1 Input source: %s\n", | |
1677 | (rme9652->control_register & RME9652_ADAT1_INTERNAL) ? | |
1678 | "Internal" : "ADAT1 optical"); | |
1679 | ||
1680 | snd_iprintf(buffer, "\n"); | |
1681 | ||
1682 | switch (rme9652_decode_spdif_in(rme9652->control_register & | |
1683 | RME9652_inp)) { | |
1684 | case RME9652_SPDIFIN_OPTICAL: | |
1685 | snd_iprintf(buffer, "IEC958 input: ADAT1\n"); | |
1686 | break; | |
1687 | case RME9652_SPDIFIN_COAXIAL: | |
1688 | snd_iprintf(buffer, "IEC958 input: Coaxial\n"); | |
1689 | break; | |
1690 | case RME9652_SPDIFIN_INTERN: | |
1691 | snd_iprintf(buffer, "IEC958 input: Internal\n"); | |
1692 | break; | |
1693 | default: | |
1694 | snd_iprintf(buffer, "IEC958 input: ???\n"); | |
1695 | break; | |
1696 | } | |
1697 | ||
1698 | if (rme9652->control_register & RME9652_opt_out) { | |
1699 | snd_iprintf(buffer, "IEC958 output: Coaxial & ADAT1\n"); | |
1700 | } else { | |
1701 | snd_iprintf(buffer, "IEC958 output: Coaxial only\n"); | |
1702 | } | |
1703 | ||
1704 | if (rme9652->control_register & RME9652_PRO) { | |
1705 | snd_iprintf(buffer, "IEC958 quality: Professional\n"); | |
1706 | } else { | |
1707 | snd_iprintf(buffer, "IEC958 quality: Consumer\n"); | |
1708 | } | |
1709 | ||
1710 | if (rme9652->control_register & RME9652_EMP) { | |
1711 | snd_iprintf(buffer, "IEC958 emphasis: on\n"); | |
1712 | } else { | |
1713 | snd_iprintf(buffer, "IEC958 emphasis: off\n"); | |
1714 | } | |
1715 | ||
1716 | if (rme9652->control_register & RME9652_Dolby) { | |
1717 | snd_iprintf(buffer, "IEC958 Dolby: on\n"); | |
1718 | } else { | |
1719 | snd_iprintf(buffer, "IEC958 Dolby: off\n"); | |
1720 | } | |
1721 | ||
1722 | i = rme9652_spdif_sample_rate(rme9652); | |
1723 | ||
1724 | if (i < 0) { | |
1725 | snd_iprintf(buffer, | |
1726 | "IEC958 sample rate: error flag set\n"); | |
1727 | } else if (i == 0) { | |
1728 | snd_iprintf(buffer, "IEC958 sample rate: undetermined\n"); | |
1729 | } else { | |
1730 | snd_iprintf(buffer, "IEC958 sample rate: %d\n", i); | |
1731 | } | |
1732 | ||
1733 | snd_iprintf(buffer, "\n"); | |
1734 | ||
1735 | snd_iprintf(buffer, "ADAT Sample rate: %dHz\n", | |
1736 | rme9652_adat_sample_rate(rme9652)); | |
1737 | ||
1738 | /* Sync Check */ | |
1739 | ||
1740 | x = status & RME9652_sync_0; | |
1741 | if (status & RME9652_lock_0) { | |
1742 | snd_iprintf(buffer, "ADAT1: %s\n", x ? "Sync" : "Lock"); | |
1743 | } else { | |
1744 | snd_iprintf(buffer, "ADAT1: No Lock\n"); | |
1745 | } | |
1746 | ||
1747 | x = status & RME9652_sync_1; | |
1748 | if (status & RME9652_lock_1) { | |
1749 | snd_iprintf(buffer, "ADAT2: %s\n", x ? "Sync" : "Lock"); | |
1750 | } else { | |
1751 | snd_iprintf(buffer, "ADAT2: No Lock\n"); | |
1752 | } | |
1753 | ||
1754 | x = status & RME9652_sync_2; | |
1755 | if (status & RME9652_lock_2) { | |
1756 | snd_iprintf(buffer, "ADAT3: %s\n", x ? "Sync" : "Lock"); | |
1757 | } else { | |
1758 | snd_iprintf(buffer, "ADAT3: No Lock\n"); | |
1759 | } | |
1760 | ||
1761 | snd_iprintf(buffer, "\n"); | |
1762 | ||
1763 | snd_iprintf(buffer, "Timecode signal: %s\n", | |
1764 | (status & RME9652_tc_valid) ? "yes" : "no"); | |
1765 | ||
1766 | /* thru modes */ | |
1767 | ||
1768 | snd_iprintf(buffer, "Punch Status:\n\n"); | |
1769 | ||
1770 | for (i = 0; i < rme9652->ss_channels; i++) { | |
1771 | if (thru_bits & (1 << i)) { | |
1772 | snd_iprintf(buffer, "%2d: on ", i + 1); | |
1773 | } else { | |
1774 | snd_iprintf(buffer, "%2d: off ", i + 1); | |
1775 | } | |
1776 | ||
1777 | if (((i + 1) % 8) == 0) { | |
1778 | snd_iprintf(buffer, "\n"); | |
1779 | } | |
1780 | } | |
1781 | ||
1782 | snd_iprintf(buffer, "\n"); | |
1783 | } | |
1784 | ||
abfd67bd | 1785 | static void __devinit snd_rme9652_proc_init(struct snd_rme9652 *rme9652) |
1da177e4 | 1786 | { |
abfd67bd | 1787 | struct snd_info_entry *entry; |
1da177e4 LT |
1788 | |
1789 | if (! snd_card_proc_new(rme9652->card, "rme9652", &entry)) | |
bf850204 | 1790 | snd_info_set_text_ops(entry, rme9652, snd_rme9652_proc_read); |
1da177e4 LT |
1791 | } |
1792 | ||
abfd67bd | 1793 | static void snd_rme9652_free_buffers(struct snd_rme9652 *rme9652) |
1da177e4 LT |
1794 | { |
1795 | snd_hammerfall_free_buffer(&rme9652->capture_dma_buf, rme9652->pci); | |
1796 | snd_hammerfall_free_buffer(&rme9652->playback_dma_buf, rme9652->pci); | |
1797 | } | |
1798 | ||
abfd67bd | 1799 | static int snd_rme9652_free(struct snd_rme9652 *rme9652) |
1da177e4 LT |
1800 | { |
1801 | if (rme9652->irq >= 0) | |
1802 | rme9652_stop(rme9652); | |
1803 | snd_rme9652_free_buffers(rme9652); | |
1804 | ||
1805 | if (rme9652->irq >= 0) | |
1806 | free_irq(rme9652->irq, (void *)rme9652); | |
1807 | if (rme9652->iobase) | |
1808 | iounmap(rme9652->iobase); | |
1809 | if (rme9652->port) | |
1810 | pci_release_regions(rme9652->pci); | |
1811 | ||
1812 | pci_disable_device(rme9652->pci); | |
1813 | return 0; | |
1814 | } | |
1815 | ||
abfd67bd | 1816 | static int __devinit snd_rme9652_initialize_memory(struct snd_rme9652 *rme9652) |
1da177e4 LT |
1817 | { |
1818 | unsigned long pb_bus, cb_bus; | |
1819 | ||
1820 | if (snd_hammerfall_get_buffer(rme9652->pci, &rme9652->capture_dma_buf, RME9652_DMA_AREA_BYTES) < 0 || | |
1821 | snd_hammerfall_get_buffer(rme9652->pci, &rme9652->playback_dma_buf, RME9652_DMA_AREA_BYTES) < 0) { | |
1822 | if (rme9652->capture_dma_buf.area) | |
1823 | snd_dma_free_pages(&rme9652->capture_dma_buf); | |
1824 | printk(KERN_ERR "%s: no buffers available\n", rme9652->card_name); | |
1825 | return -ENOMEM; | |
1826 | } | |
1827 | ||
1828 | /* Align to bus-space 64K boundary */ | |
1829 | ||
1830 | cb_bus = (rme9652->capture_dma_buf.addr + 0xFFFF) & ~0xFFFFl; | |
1831 | pb_bus = (rme9652->playback_dma_buf.addr + 0xFFFF) & ~0xFFFFl; | |
1832 | ||
1833 | /* Tell the card where it is */ | |
1834 | ||
1835 | rme9652_write(rme9652, RME9652_rec_buffer, cb_bus); | |
1836 | rme9652_write(rme9652, RME9652_play_buffer, pb_bus); | |
1837 | ||
1838 | rme9652->capture_buffer = rme9652->capture_dma_buf.area + (cb_bus - rme9652->capture_dma_buf.addr); | |
1839 | rme9652->playback_buffer = rme9652->playback_dma_buf.area + (pb_bus - rme9652->playback_dma_buf.addr); | |
1840 | ||
1841 | return 0; | |
1842 | } | |
1843 | ||
abfd67bd | 1844 | static void snd_rme9652_set_defaults(struct snd_rme9652 *rme9652) |
1da177e4 LT |
1845 | { |
1846 | unsigned int k; | |
1847 | ||
1848 | /* ASSUMPTION: rme9652->lock is either held, or | |
1849 | there is no need to hold it (e.g. during module | |
1850 | initalization). | |
1851 | */ | |
1852 | ||
1853 | /* set defaults: | |
1854 | ||
1855 | SPDIF Input via Coax | |
1856 | autosync clock mode | |
1857 | maximum latency (7 = 8192 samples, 64Kbyte buffer, | |
1858 | which implies 2 4096 sample, 32Kbyte periods). | |
1859 | ||
1860 | if rev 1.5, initialize the S/PDIF receiver. | |
1861 | ||
1862 | */ | |
1863 | ||
1864 | rme9652->control_register = | |
1865 | RME9652_inp_0 | rme9652_encode_latency(7); | |
1866 | ||
1867 | rme9652_write(rme9652, RME9652_control_register, rme9652->control_register); | |
1868 | ||
1869 | rme9652_reset_hw_pointer(rme9652); | |
1870 | rme9652_compute_period_size(rme9652); | |
1871 | ||
1872 | /* default: thru off for all channels */ | |
1873 | ||
1874 | for (k = 0; k < RME9652_NCHANNELS; ++k) | |
1875 | rme9652_write(rme9652, RME9652_thru_base + k * 4, 0); | |
1876 | ||
1877 | rme9652->thru_bits = 0; | |
1878 | rme9652->passthru = 0; | |
1879 | ||
1880 | /* set a default rate so that the channel map is set up */ | |
1881 | ||
1882 | rme9652_set_rate(rme9652, 48000); | |
1883 | } | |
1884 | ||
1885 | static irqreturn_t snd_rme9652_interrupt(int irq, void *dev_id, struct pt_regs *regs) | |
1886 | { | |
abfd67bd | 1887 | struct snd_rme9652 *rme9652 = (struct snd_rme9652 *) dev_id; |
1da177e4 LT |
1888 | |
1889 | if (!(rme9652_read(rme9652, RME9652_status_register) & RME9652_IRQ)) { | |
1890 | return IRQ_NONE; | |
1891 | } | |
1892 | ||
1893 | rme9652_write(rme9652, RME9652_irq_clear, 0); | |
1894 | ||
1895 | if (rme9652->capture_substream) { | |
1896 | snd_pcm_period_elapsed(rme9652->pcm->streams[SNDRV_PCM_STREAM_CAPTURE].substream); | |
1897 | } | |
1898 | ||
1899 | if (rme9652->playback_substream) { | |
1900 | snd_pcm_period_elapsed(rme9652->pcm->streams[SNDRV_PCM_STREAM_PLAYBACK].substream); | |
1901 | } | |
1902 | return IRQ_HANDLED; | |
1903 | } | |
1904 | ||
abfd67bd | 1905 | static snd_pcm_uframes_t snd_rme9652_hw_pointer(struct snd_pcm_substream *substream) |
1da177e4 | 1906 | { |
abfd67bd | 1907 | struct snd_rme9652 *rme9652 = snd_pcm_substream_chip(substream); |
1da177e4 LT |
1908 | return rme9652_hw_pointer(rme9652); |
1909 | } | |
1910 | ||
abfd67bd | 1911 | static char *rme9652_channel_buffer_location(struct snd_rme9652 *rme9652, |
1da177e4 LT |
1912 | int stream, |
1913 | int channel) | |
1914 | ||
1915 | { | |
1916 | int mapped_channel; | |
1917 | ||
1918 | snd_assert(channel >= 0 || channel < RME9652_NCHANNELS, return NULL); | |
1919 | ||
1920 | if ((mapped_channel = rme9652->channel_map[channel]) < 0) { | |
1921 | return NULL; | |
1922 | } | |
1923 | ||
1924 | if (stream == SNDRV_PCM_STREAM_CAPTURE) { | |
1925 | return rme9652->capture_buffer + | |
1926 | (mapped_channel * RME9652_CHANNEL_BUFFER_BYTES); | |
1927 | } else { | |
1928 | return rme9652->playback_buffer + | |
1929 | (mapped_channel * RME9652_CHANNEL_BUFFER_BYTES); | |
1930 | } | |
1931 | } | |
1932 | ||
abfd67bd | 1933 | static int snd_rme9652_playback_copy(struct snd_pcm_substream *substream, int channel, |
1da177e4 LT |
1934 | snd_pcm_uframes_t pos, void __user *src, snd_pcm_uframes_t count) |
1935 | { | |
abfd67bd | 1936 | struct snd_rme9652 *rme9652 = snd_pcm_substream_chip(substream); |
1da177e4 LT |
1937 | char *channel_buf; |
1938 | ||
1939 | snd_assert(pos + count <= RME9652_CHANNEL_BUFFER_BYTES / 4, return -EINVAL); | |
1940 | ||
1941 | channel_buf = rme9652_channel_buffer_location (rme9652, | |
1942 | substream->pstr->stream, | |
1943 | channel); | |
1944 | snd_assert(channel_buf != NULL, return -EIO); | |
1945 | if (copy_from_user(channel_buf + pos * 4, src, count * 4)) | |
1946 | return -EFAULT; | |
1947 | return count; | |
1948 | } | |
1949 | ||
abfd67bd | 1950 | static int snd_rme9652_capture_copy(struct snd_pcm_substream *substream, int channel, |
1da177e4 LT |
1951 | snd_pcm_uframes_t pos, void __user *dst, snd_pcm_uframes_t count) |
1952 | { | |
abfd67bd | 1953 | struct snd_rme9652 *rme9652 = snd_pcm_substream_chip(substream); |
1da177e4 LT |
1954 | char *channel_buf; |
1955 | ||
1956 | snd_assert(pos + count <= RME9652_CHANNEL_BUFFER_BYTES / 4, return -EINVAL); | |
1957 | ||
1958 | channel_buf = rme9652_channel_buffer_location (rme9652, | |
1959 | substream->pstr->stream, | |
1960 | channel); | |
1961 | snd_assert(channel_buf != NULL, return -EIO); | |
1962 | if (copy_to_user(dst, channel_buf + pos * 4, count * 4)) | |
1963 | return -EFAULT; | |
1964 | return count; | |
1965 | } | |
1966 | ||
abfd67bd | 1967 | static int snd_rme9652_hw_silence(struct snd_pcm_substream *substream, int channel, |
1da177e4 LT |
1968 | snd_pcm_uframes_t pos, snd_pcm_uframes_t count) |
1969 | { | |
abfd67bd | 1970 | struct snd_rme9652 *rme9652 = snd_pcm_substream_chip(substream); |
1da177e4 LT |
1971 | char *channel_buf; |
1972 | ||
1973 | channel_buf = rme9652_channel_buffer_location (rme9652, | |
1974 | substream->pstr->stream, | |
1975 | channel); | |
1976 | snd_assert(channel_buf != NULL, return -EIO); | |
1977 | memset(channel_buf + pos * 4, 0, count * 4); | |
1978 | return count; | |
1979 | } | |
1980 | ||
abfd67bd | 1981 | static int snd_rme9652_reset(struct snd_pcm_substream *substream) |
1da177e4 | 1982 | { |
abfd67bd TI |
1983 | struct snd_pcm_runtime *runtime = substream->runtime; |
1984 | struct snd_rme9652 *rme9652 = snd_pcm_substream_chip(substream); | |
1985 | struct snd_pcm_substream *other; | |
1da177e4 LT |
1986 | if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) |
1987 | other = rme9652->capture_substream; | |
1988 | else | |
1989 | other = rme9652->playback_substream; | |
1990 | if (rme9652->running) | |
1991 | runtime->status->hw_ptr = rme9652_hw_pointer(rme9652); | |
1992 | else | |
1993 | runtime->status->hw_ptr = 0; | |
1994 | if (other) { | |
1995 | struct list_head *pos; | |
abfd67bd TI |
1996 | struct snd_pcm_substream *s; |
1997 | struct snd_pcm_runtime *oruntime = other->runtime; | |
1da177e4 LT |
1998 | snd_pcm_group_for_each(pos, substream) { |
1999 | s = snd_pcm_group_substream_entry(pos); | |
2000 | if (s == other) { | |
2001 | oruntime->status->hw_ptr = runtime->status->hw_ptr; | |
2002 | break; | |
2003 | } | |
2004 | } | |
2005 | } | |
2006 | return 0; | |
2007 | } | |
2008 | ||
abfd67bd TI |
2009 | static int snd_rme9652_hw_params(struct snd_pcm_substream *substream, |
2010 | struct snd_pcm_hw_params *params) | |
1da177e4 | 2011 | { |
abfd67bd | 2012 | struct snd_rme9652 *rme9652 = snd_pcm_substream_chip(substream); |
1da177e4 LT |
2013 | int err; |
2014 | pid_t this_pid; | |
2015 | pid_t other_pid; | |
2016 | ||
2017 | spin_lock_irq(&rme9652->lock); | |
2018 | ||
2019 | if (substream->pstr->stream == SNDRV_PCM_STREAM_PLAYBACK) { | |
2020 | rme9652->control_register &= ~(RME9652_PRO | RME9652_Dolby | RME9652_EMP); | |
2021 | rme9652_write(rme9652, RME9652_control_register, rme9652->control_register |= rme9652->creg_spdif_stream); | |
2022 | this_pid = rme9652->playback_pid; | |
2023 | other_pid = rme9652->capture_pid; | |
2024 | } else { | |
2025 | this_pid = rme9652->capture_pid; | |
2026 | other_pid = rme9652->playback_pid; | |
2027 | } | |
2028 | ||
2029 | if ((other_pid > 0) && (this_pid != other_pid)) { | |
2030 | ||
2031 | /* The other stream is open, and not by the same | |
2032 | task as this one. Make sure that the parameters | |
2033 | that matter are the same. | |
2034 | */ | |
2035 | ||
2036 | if ((int)params_rate(params) != | |
2037 | rme9652_adat_sample_rate(rme9652)) { | |
2038 | spin_unlock_irq(&rme9652->lock); | |
2039 | _snd_pcm_hw_param_setempty(params, SNDRV_PCM_HW_PARAM_RATE); | |
2040 | return -EBUSY; | |
2041 | } | |
2042 | ||
2043 | if (params_period_size(params) != rme9652->period_bytes / 4) { | |
2044 | spin_unlock_irq(&rme9652->lock); | |
2045 | _snd_pcm_hw_param_setempty(params, SNDRV_PCM_HW_PARAM_PERIOD_SIZE); | |
2046 | return -EBUSY; | |
2047 | } | |
2048 | ||
2049 | /* We're fine. */ | |
2050 | ||
2051 | spin_unlock_irq(&rme9652->lock); | |
2052 | return 0; | |
2053 | ||
2054 | } else { | |
2055 | spin_unlock_irq(&rme9652->lock); | |
2056 | } | |
2057 | ||
2058 | /* how to make sure that the rate matches an externally-set one ? | |
2059 | */ | |
2060 | ||
2061 | if ((err = rme9652_set_rate(rme9652, params_rate(params))) < 0) { | |
2062 | _snd_pcm_hw_param_setempty(params, SNDRV_PCM_HW_PARAM_RATE); | |
2063 | return err; | |
2064 | } | |
2065 | ||
2066 | if ((err = rme9652_set_interrupt_interval(rme9652, params_period_size(params))) < 0) { | |
2067 | _snd_pcm_hw_param_setempty(params, SNDRV_PCM_HW_PARAM_PERIOD_SIZE); | |
2068 | return err; | |
2069 | } | |
2070 | ||
2071 | return 0; | |
2072 | } | |
2073 | ||
abfd67bd TI |
2074 | static int snd_rme9652_channel_info(struct snd_pcm_substream *substream, |
2075 | struct snd_pcm_channel_info *info) | |
1da177e4 | 2076 | { |
abfd67bd | 2077 | struct snd_rme9652 *rme9652 = snd_pcm_substream_chip(substream); |
1da177e4 LT |
2078 | int chn; |
2079 | ||
2080 | snd_assert(info->channel < RME9652_NCHANNELS, return -EINVAL); | |
2081 | ||
2082 | if ((chn = rme9652->channel_map[info->channel]) < 0) { | |
2083 | return -EINVAL; | |
2084 | } | |
2085 | ||
2086 | info->offset = chn * RME9652_CHANNEL_BUFFER_BYTES; | |
2087 | info->first = 0; | |
2088 | info->step = 32; | |
2089 | return 0; | |
2090 | } | |
2091 | ||
abfd67bd | 2092 | static int snd_rme9652_ioctl(struct snd_pcm_substream *substream, |
1da177e4 LT |
2093 | unsigned int cmd, void *arg) |
2094 | { | |
2095 | switch (cmd) { | |
2096 | case SNDRV_PCM_IOCTL1_RESET: | |
2097 | { | |
2098 | return snd_rme9652_reset(substream); | |
2099 | } | |
2100 | case SNDRV_PCM_IOCTL1_CHANNEL_INFO: | |
2101 | { | |
abfd67bd | 2102 | struct snd_pcm_channel_info *info = arg; |
1da177e4 LT |
2103 | return snd_rme9652_channel_info(substream, info); |
2104 | } | |
2105 | default: | |
2106 | break; | |
2107 | } | |
2108 | ||
2109 | return snd_pcm_lib_ioctl(substream, cmd, arg); | |
2110 | } | |
2111 | ||
abfd67bd | 2112 | static void rme9652_silence_playback(struct snd_rme9652 *rme9652) |
1da177e4 LT |
2113 | { |
2114 | memset(rme9652->playback_buffer, 0, RME9652_DMA_AREA_BYTES); | |
2115 | } | |
2116 | ||
abfd67bd | 2117 | static int snd_rme9652_trigger(struct snd_pcm_substream *substream, |
1da177e4 LT |
2118 | int cmd) |
2119 | { | |
abfd67bd TI |
2120 | struct snd_rme9652 *rme9652 = snd_pcm_substream_chip(substream); |
2121 | struct snd_pcm_substream *other; | |
1da177e4 LT |
2122 | int running; |
2123 | spin_lock(&rme9652->lock); | |
2124 | running = rme9652->running; | |
2125 | switch (cmd) { | |
2126 | case SNDRV_PCM_TRIGGER_START: | |
2127 | running |= 1 << substream->stream; | |
2128 | break; | |
2129 | case SNDRV_PCM_TRIGGER_STOP: | |
2130 | running &= ~(1 << substream->stream); | |
2131 | break; | |
2132 | default: | |
2133 | snd_BUG(); | |
2134 | spin_unlock(&rme9652->lock); | |
2135 | return -EINVAL; | |
2136 | } | |
2137 | if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) | |
2138 | other = rme9652->capture_substream; | |
2139 | else | |
2140 | other = rme9652->playback_substream; | |
2141 | ||
2142 | if (other) { | |
2143 | struct list_head *pos; | |
abfd67bd | 2144 | struct snd_pcm_substream *s; |
1da177e4 LT |
2145 | snd_pcm_group_for_each(pos, substream) { |
2146 | s = snd_pcm_group_substream_entry(pos); | |
2147 | if (s == other) { | |
2148 | snd_pcm_trigger_done(s, substream); | |
2149 | if (cmd == SNDRV_PCM_TRIGGER_START) | |
2150 | running |= 1 << s->stream; | |
2151 | else | |
2152 | running &= ~(1 << s->stream); | |
2153 | goto _ok; | |
2154 | } | |
2155 | } | |
2156 | if (cmd == SNDRV_PCM_TRIGGER_START) { | |
2157 | if (!(running & (1 << SNDRV_PCM_STREAM_PLAYBACK)) && | |
2158 | substream->stream == SNDRV_PCM_STREAM_CAPTURE) | |
2159 | rme9652_silence_playback(rme9652); | |
2160 | } else { | |
2161 | if (running && | |
2162 | substream->stream == SNDRV_PCM_STREAM_PLAYBACK) | |
2163 | rme9652_silence_playback(rme9652); | |
2164 | } | |
2165 | } else { | |
2166 | if (substream->stream == SNDRV_PCM_STREAM_CAPTURE) | |
2167 | rme9652_silence_playback(rme9652); | |
2168 | } | |
2169 | _ok: | |
2170 | snd_pcm_trigger_done(substream, substream); | |
2171 | if (!rme9652->running && running) | |
2172 | rme9652_start(rme9652); | |
2173 | else if (rme9652->running && !running) | |
2174 | rme9652_stop(rme9652); | |
2175 | rme9652->running = running; | |
2176 | spin_unlock(&rme9652->lock); | |
2177 | ||
2178 | return 0; | |
2179 | } | |
2180 | ||
abfd67bd | 2181 | static int snd_rme9652_prepare(struct snd_pcm_substream *substream) |
1da177e4 | 2182 | { |
abfd67bd | 2183 | struct snd_rme9652 *rme9652 = snd_pcm_substream_chip(substream); |
1da177e4 LT |
2184 | unsigned long flags; |
2185 | int result = 0; | |
2186 | ||
2187 | spin_lock_irqsave(&rme9652->lock, flags); | |
2188 | if (!rme9652->running) | |
2189 | rme9652_reset_hw_pointer(rme9652); | |
2190 | spin_unlock_irqrestore(&rme9652->lock, flags); | |
2191 | return result; | |
2192 | } | |
2193 | ||
abfd67bd | 2194 | static struct snd_pcm_hardware snd_rme9652_playback_subinfo = |
1da177e4 LT |
2195 | { |
2196 | .info = (SNDRV_PCM_INFO_MMAP | | |
2197 | SNDRV_PCM_INFO_MMAP_VALID | | |
2198 | SNDRV_PCM_INFO_NONINTERLEAVED | | |
2199 | SNDRV_PCM_INFO_SYNC_START | | |
2200 | SNDRV_PCM_INFO_DOUBLE), | |
2201 | .formats = SNDRV_PCM_FMTBIT_S32_LE, | |
2202 | .rates = (SNDRV_PCM_RATE_44100 | | |
2203 | SNDRV_PCM_RATE_48000 | | |
2204 | SNDRV_PCM_RATE_88200 | | |
2205 | SNDRV_PCM_RATE_96000), | |
2206 | .rate_min = 44100, | |
2207 | .rate_max = 96000, | |
2208 | .channels_min = 10, | |
2209 | .channels_max = 26, | |
2210 | .buffer_bytes_max = RME9652_CHANNEL_BUFFER_BYTES * 26, | |
2211 | .period_bytes_min = (64 * 4) * 10, | |
2212 | .period_bytes_max = (8192 * 4) * 26, | |
2213 | .periods_min = 2, | |
2214 | .periods_max = 2, | |
2215 | .fifo_size = 0, | |
2216 | }; | |
2217 | ||
abfd67bd | 2218 | static struct snd_pcm_hardware snd_rme9652_capture_subinfo = |
1da177e4 LT |
2219 | { |
2220 | .info = (SNDRV_PCM_INFO_MMAP | | |
2221 | SNDRV_PCM_INFO_MMAP_VALID | | |
2222 | SNDRV_PCM_INFO_NONINTERLEAVED | | |
2223 | SNDRV_PCM_INFO_SYNC_START), | |
2224 | .formats = SNDRV_PCM_FMTBIT_S32_LE, | |
2225 | .rates = (SNDRV_PCM_RATE_44100 | | |
2226 | SNDRV_PCM_RATE_48000 | | |
2227 | SNDRV_PCM_RATE_88200 | | |
2228 | SNDRV_PCM_RATE_96000), | |
2229 | .rate_min = 44100, | |
2230 | .rate_max = 96000, | |
2231 | .channels_min = 10, | |
2232 | .channels_max = 26, | |
2233 | .buffer_bytes_max = RME9652_CHANNEL_BUFFER_BYTES *26, | |
2234 | .period_bytes_min = (64 * 4) * 10, | |
2235 | .period_bytes_max = (8192 * 4) * 26, | |
2236 | .periods_min = 2, | |
2237 | .periods_max = 2, | |
2238 | .fifo_size = 0, | |
2239 | }; | |
2240 | ||
2241 | static unsigned int period_sizes[] = { 64, 128, 256, 512, 1024, 2048, 4096, 8192 }; | |
2242 | ||
abfd67bd | 2243 | static struct snd_pcm_hw_constraint_list hw_constraints_period_sizes = { |
1da177e4 LT |
2244 | .count = ARRAY_SIZE(period_sizes), |
2245 | .list = period_sizes, | |
2246 | .mask = 0 | |
2247 | }; | |
2248 | ||
abfd67bd TI |
2249 | static int snd_rme9652_hw_rule_channels(struct snd_pcm_hw_params *params, |
2250 | struct snd_pcm_hw_rule *rule) | |
1da177e4 | 2251 | { |
abfd67bd TI |
2252 | struct snd_rme9652 *rme9652 = rule->private; |
2253 | struct snd_interval *c = hw_param_interval(params, SNDRV_PCM_HW_PARAM_CHANNELS); | |
1da177e4 LT |
2254 | unsigned int list[2] = { rme9652->ds_channels, rme9652->ss_channels }; |
2255 | return snd_interval_list(c, 2, list, 0); | |
2256 | } | |
2257 | ||
abfd67bd TI |
2258 | static int snd_rme9652_hw_rule_channels_rate(struct snd_pcm_hw_params *params, |
2259 | struct snd_pcm_hw_rule *rule) | |
1da177e4 | 2260 | { |
abfd67bd TI |
2261 | struct snd_rme9652 *rme9652 = rule->private; |
2262 | struct snd_interval *c = hw_param_interval(params, SNDRV_PCM_HW_PARAM_CHANNELS); | |
2263 | struct snd_interval *r = hw_param_interval(params, SNDRV_PCM_HW_PARAM_RATE); | |
1da177e4 | 2264 | if (r->min > 48000) { |
abfd67bd | 2265 | struct snd_interval t = { |
1da177e4 LT |
2266 | .min = rme9652->ds_channels, |
2267 | .max = rme9652->ds_channels, | |
2268 | .integer = 1, | |
2269 | }; | |
2270 | return snd_interval_refine(c, &t); | |
2271 | } else if (r->max < 88200) { | |
abfd67bd | 2272 | struct snd_interval t = { |
1da177e4 LT |
2273 | .min = rme9652->ss_channels, |
2274 | .max = rme9652->ss_channels, | |
2275 | .integer = 1, | |
2276 | }; | |
2277 | return snd_interval_refine(c, &t); | |
2278 | } | |
2279 | return 0; | |
2280 | } | |
2281 | ||
abfd67bd TI |
2282 | static int snd_rme9652_hw_rule_rate_channels(struct snd_pcm_hw_params *params, |
2283 | struct snd_pcm_hw_rule *rule) | |
1da177e4 | 2284 | { |
abfd67bd TI |
2285 | struct snd_rme9652 *rme9652 = rule->private; |
2286 | struct snd_interval *c = hw_param_interval(params, SNDRV_PCM_HW_PARAM_CHANNELS); | |
2287 | struct snd_interval *r = hw_param_interval(params, SNDRV_PCM_HW_PARAM_RATE); | |
1da177e4 | 2288 | if (c->min >= rme9652->ss_channels) { |
abfd67bd | 2289 | struct snd_interval t = { |
1da177e4 LT |
2290 | .min = 44100, |
2291 | .max = 48000, | |
2292 | .integer = 1, | |
2293 | }; | |
2294 | return snd_interval_refine(r, &t); | |
2295 | } else if (c->max <= rme9652->ds_channels) { | |
abfd67bd | 2296 | struct snd_interval t = { |
1da177e4 LT |
2297 | .min = 88200, |
2298 | .max = 96000, | |
2299 | .integer = 1, | |
2300 | }; | |
2301 | return snd_interval_refine(r, &t); | |
2302 | } | |
2303 | return 0; | |
2304 | } | |
2305 | ||
abfd67bd | 2306 | static int snd_rme9652_playback_open(struct snd_pcm_substream *substream) |
1da177e4 | 2307 | { |
abfd67bd TI |
2308 | struct snd_rme9652 *rme9652 = snd_pcm_substream_chip(substream); |
2309 | struct snd_pcm_runtime *runtime = substream->runtime; | |
1da177e4 LT |
2310 | |
2311 | spin_lock_irq(&rme9652->lock); | |
2312 | ||
2313 | snd_pcm_set_sync(substream); | |
2314 | ||
2315 | runtime->hw = snd_rme9652_playback_subinfo; | |
2316 | runtime->dma_area = rme9652->playback_buffer; | |
2317 | runtime->dma_bytes = RME9652_DMA_AREA_BYTES; | |
2318 | ||
2319 | if (rme9652->capture_substream == NULL) { | |
2320 | rme9652_stop(rme9652); | |
2321 | rme9652_set_thru(rme9652, -1, 0); | |
2322 | } | |
2323 | ||
2324 | rme9652->playback_pid = current->pid; | |
2325 | rme9652->playback_substream = substream; | |
2326 | ||
2327 | spin_unlock_irq(&rme9652->lock); | |
2328 | ||
2329 | snd_pcm_hw_constraint_msbits(runtime, 0, 32, 24); | |
2330 | snd_pcm_hw_constraint_list(runtime, 0, SNDRV_PCM_HW_PARAM_PERIOD_SIZE, &hw_constraints_period_sizes); | |
2331 | snd_pcm_hw_rule_add(runtime, 0, SNDRV_PCM_HW_PARAM_CHANNELS, | |
2332 | snd_rme9652_hw_rule_channels, rme9652, | |
2333 | SNDRV_PCM_HW_PARAM_CHANNELS, -1); | |
2334 | snd_pcm_hw_rule_add(runtime, 0, SNDRV_PCM_HW_PARAM_CHANNELS, | |
2335 | snd_rme9652_hw_rule_channels_rate, rme9652, | |
2336 | SNDRV_PCM_HW_PARAM_RATE, -1); | |
2337 | snd_pcm_hw_rule_add(runtime, 0, SNDRV_PCM_HW_PARAM_RATE, | |
2338 | snd_rme9652_hw_rule_rate_channels, rme9652, | |
2339 | SNDRV_PCM_HW_PARAM_CHANNELS, -1); | |
2340 | ||
2341 | rme9652->creg_spdif_stream = rme9652->creg_spdif; | |
2342 | rme9652->spdif_ctl->vd[0].access &= ~SNDRV_CTL_ELEM_ACCESS_INACTIVE; | |
2343 | snd_ctl_notify(rme9652->card, SNDRV_CTL_EVENT_MASK_VALUE | | |
2344 | SNDRV_CTL_EVENT_MASK_INFO, &rme9652->spdif_ctl->id); | |
2345 | return 0; | |
2346 | } | |
2347 | ||
abfd67bd | 2348 | static int snd_rme9652_playback_release(struct snd_pcm_substream *substream) |
1da177e4 | 2349 | { |
abfd67bd | 2350 | struct snd_rme9652 *rme9652 = snd_pcm_substream_chip(substream); |
1da177e4 LT |
2351 | |
2352 | spin_lock_irq(&rme9652->lock); | |
2353 | ||
2354 | rme9652->playback_pid = -1; | |
2355 | rme9652->playback_substream = NULL; | |
2356 | ||
2357 | spin_unlock_irq(&rme9652->lock); | |
2358 | ||
2359 | rme9652->spdif_ctl->vd[0].access |= SNDRV_CTL_ELEM_ACCESS_INACTIVE; | |
2360 | snd_ctl_notify(rme9652->card, SNDRV_CTL_EVENT_MASK_VALUE | | |
2361 | SNDRV_CTL_EVENT_MASK_INFO, &rme9652->spdif_ctl->id); | |
2362 | return 0; | |
2363 | } | |
2364 | ||
2365 | ||
abfd67bd | 2366 | static int snd_rme9652_capture_open(struct snd_pcm_substream *substream) |
1da177e4 | 2367 | { |
abfd67bd TI |
2368 | struct snd_rme9652 *rme9652 = snd_pcm_substream_chip(substream); |
2369 | struct snd_pcm_runtime *runtime = substream->runtime; | |
1da177e4 LT |
2370 | |
2371 | spin_lock_irq(&rme9652->lock); | |
2372 | ||
2373 | snd_pcm_set_sync(substream); | |
2374 | ||
2375 | runtime->hw = snd_rme9652_capture_subinfo; | |
2376 | runtime->dma_area = rme9652->capture_buffer; | |
2377 | runtime->dma_bytes = RME9652_DMA_AREA_BYTES; | |
2378 | ||
2379 | if (rme9652->playback_substream == NULL) { | |
2380 | rme9652_stop(rme9652); | |
2381 | rme9652_set_thru(rme9652, -1, 0); | |
2382 | } | |
2383 | ||
2384 | rme9652->capture_pid = current->pid; | |
2385 | rme9652->capture_substream = substream; | |
2386 | ||
2387 | spin_unlock_irq(&rme9652->lock); | |
2388 | ||
2389 | snd_pcm_hw_constraint_msbits(runtime, 0, 32, 24); | |
2390 | snd_pcm_hw_constraint_list(runtime, 0, SNDRV_PCM_HW_PARAM_PERIOD_SIZE, &hw_constraints_period_sizes); | |
2391 | snd_pcm_hw_rule_add(runtime, 0, SNDRV_PCM_HW_PARAM_CHANNELS, | |
2392 | snd_rme9652_hw_rule_channels, rme9652, | |
2393 | SNDRV_PCM_HW_PARAM_CHANNELS, -1); | |
2394 | snd_pcm_hw_rule_add(runtime, 0, SNDRV_PCM_HW_PARAM_CHANNELS, | |
2395 | snd_rme9652_hw_rule_channels_rate, rme9652, | |
2396 | SNDRV_PCM_HW_PARAM_RATE, -1); | |
2397 | snd_pcm_hw_rule_add(runtime, 0, SNDRV_PCM_HW_PARAM_RATE, | |
2398 | snd_rme9652_hw_rule_rate_channels, rme9652, | |
2399 | SNDRV_PCM_HW_PARAM_CHANNELS, -1); | |
2400 | return 0; | |
2401 | } | |
2402 | ||
abfd67bd | 2403 | static int snd_rme9652_capture_release(struct snd_pcm_substream *substream) |
1da177e4 | 2404 | { |
abfd67bd | 2405 | struct snd_rme9652 *rme9652 = snd_pcm_substream_chip(substream); |
1da177e4 LT |
2406 | |
2407 | spin_lock_irq(&rme9652->lock); | |
2408 | ||
2409 | rme9652->capture_pid = -1; | |
2410 | rme9652->capture_substream = NULL; | |
2411 | ||
2412 | spin_unlock_irq(&rme9652->lock); | |
2413 | return 0; | |
2414 | } | |
2415 | ||
abfd67bd | 2416 | static struct snd_pcm_ops snd_rme9652_playback_ops = { |
1da177e4 LT |
2417 | .open = snd_rme9652_playback_open, |
2418 | .close = snd_rme9652_playback_release, | |
2419 | .ioctl = snd_rme9652_ioctl, | |
2420 | .hw_params = snd_rme9652_hw_params, | |
2421 | .prepare = snd_rme9652_prepare, | |
2422 | .trigger = snd_rme9652_trigger, | |
2423 | .pointer = snd_rme9652_hw_pointer, | |
2424 | .copy = snd_rme9652_playback_copy, | |
2425 | .silence = snd_rme9652_hw_silence, | |
2426 | }; | |
2427 | ||
abfd67bd | 2428 | static struct snd_pcm_ops snd_rme9652_capture_ops = { |
1da177e4 LT |
2429 | .open = snd_rme9652_capture_open, |
2430 | .close = snd_rme9652_capture_release, | |
2431 | .ioctl = snd_rme9652_ioctl, | |
2432 | .hw_params = snd_rme9652_hw_params, | |
2433 | .prepare = snd_rme9652_prepare, | |
2434 | .trigger = snd_rme9652_trigger, | |
2435 | .pointer = snd_rme9652_hw_pointer, | |
2436 | .copy = snd_rme9652_capture_copy, | |
2437 | }; | |
2438 | ||
abfd67bd TI |
2439 | static int __devinit snd_rme9652_create_pcm(struct snd_card *card, |
2440 | struct snd_rme9652 *rme9652) | |
1da177e4 | 2441 | { |
abfd67bd | 2442 | struct snd_pcm *pcm; |
1da177e4 LT |
2443 | int err; |
2444 | ||
2445 | if ((err = snd_pcm_new(card, | |
2446 | rme9652->card_name, | |
2447 | 0, 1, 1, &pcm)) < 0) { | |
2448 | return err; | |
2449 | } | |
2450 | ||
2451 | rme9652->pcm = pcm; | |
2452 | pcm->private_data = rme9652; | |
2453 | strcpy(pcm->name, rme9652->card_name); | |
2454 | ||
2455 | snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, &snd_rme9652_playback_ops); | |
2456 | snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_CAPTURE, &snd_rme9652_capture_ops); | |
2457 | ||
2458 | pcm->info_flags = SNDRV_PCM_INFO_JOINT_DUPLEX; | |
2459 | ||
2460 | return 0; | |
2461 | } | |
2462 | ||
abfd67bd TI |
2463 | static int __devinit snd_rme9652_create(struct snd_card *card, |
2464 | struct snd_rme9652 *rme9652, | |
1da177e4 LT |
2465 | int precise_ptr) |
2466 | { | |
2467 | struct pci_dev *pci = rme9652->pci; | |
2468 | int err; | |
2469 | int status; | |
2470 | unsigned short rev; | |
2471 | ||
2472 | rme9652->irq = -1; | |
2473 | rme9652->card = card; | |
2474 | ||
2475 | pci_read_config_word(rme9652->pci, PCI_CLASS_REVISION, &rev); | |
2476 | ||
2477 | switch (rev & 0xff) { | |
2478 | case 3: | |
2479 | case 4: | |
2480 | case 8: | |
2481 | case 9: | |
2482 | break; | |
2483 | ||
2484 | default: | |
2485 | /* who knows? */ | |
2486 | return -ENODEV; | |
2487 | } | |
2488 | ||
2489 | if ((err = pci_enable_device(pci)) < 0) | |
2490 | return err; | |
2491 | ||
2492 | spin_lock_init(&rme9652->lock); | |
2493 | ||
2494 | if ((err = pci_request_regions(pci, "rme9652")) < 0) | |
2495 | return err; | |
2496 | rme9652->port = pci_resource_start(pci, 0); | |
2497 | rme9652->iobase = ioremap_nocache(rme9652->port, RME9652_IO_EXTENT); | |
2498 | if (rme9652->iobase == NULL) { | |
99b359ba | 2499 | snd_printk(KERN_ERR "unable to remap region 0x%lx-0x%lx\n", rme9652->port, rme9652->port + RME9652_IO_EXTENT - 1); |
1da177e4 LT |
2500 | return -EBUSY; |
2501 | } | |
2502 | ||
2503 | if (request_irq(pci->irq, snd_rme9652_interrupt, SA_INTERRUPT|SA_SHIRQ, "rme9652", (void *)rme9652)) { | |
99b359ba | 2504 | snd_printk(KERN_ERR "unable to request IRQ %d\n", pci->irq); |
1da177e4 LT |
2505 | return -EBUSY; |
2506 | } | |
2507 | rme9652->irq = pci->irq; | |
2508 | rme9652->precise_ptr = precise_ptr; | |
2509 | ||
2510 | /* Determine the h/w rev level of the card. This seems like | |
2511 | a particularly kludgy way to encode it, but its what RME | |
2512 | chose to do, so we follow them ... | |
2513 | */ | |
2514 | ||
2515 | status = rme9652_read(rme9652, RME9652_status_register); | |
2516 | if (rme9652_decode_spdif_rate(status&RME9652_F) == 1) { | |
2517 | rme9652->hw_rev = 15; | |
2518 | } else { | |
2519 | rme9652->hw_rev = 11; | |
2520 | } | |
2521 | ||
2522 | /* Differentiate between the standard Hammerfall, and the | |
2523 | "Light", which does not have the expansion board. This | |
2524 | method comes from information received from Mathhias | |
2525 | Clausen at RME. Display the EEPROM and h/w revID where | |
2526 | relevant. | |
2527 | */ | |
2528 | ||
2529 | switch (rev) { | |
2530 | case 8: /* original eprom */ | |
2531 | strcpy(card->driver, "RME9636"); | |
2532 | if (rme9652->hw_rev == 15) { | |
2533 | rme9652->card_name = "RME Digi9636 (Rev 1.5)"; | |
2534 | } else { | |
2535 | rme9652->card_name = "RME Digi9636"; | |
2536 | } | |
2537 | rme9652->ss_channels = RME9636_NCHANNELS; | |
2538 | break; | |
2539 | case 9: /* W36_G EPROM */ | |
2540 | strcpy(card->driver, "RME9636"); | |
2541 | rme9652->card_name = "RME Digi9636 (Rev G)"; | |
2542 | rme9652->ss_channels = RME9636_NCHANNELS; | |
2543 | break; | |
2544 | case 4: /* W52_G EPROM */ | |
2545 | strcpy(card->driver, "RME9652"); | |
2546 | rme9652->card_name = "RME Digi9652 (Rev G)"; | |
2547 | rme9652->ss_channels = RME9652_NCHANNELS; | |
2548 | break; | |
2549 | case 3: /* original eprom */ | |
2550 | strcpy(card->driver, "RME9652"); | |
2551 | if (rme9652->hw_rev == 15) { | |
2552 | rme9652->card_name = "RME Digi9652 (Rev 1.5)"; | |
2553 | } else { | |
2554 | rme9652->card_name = "RME Digi9652"; | |
2555 | } | |
2556 | rme9652->ss_channels = RME9652_NCHANNELS; | |
2557 | break; | |
2558 | } | |
2559 | ||
2560 | rme9652->ds_channels = (rme9652->ss_channels - 2) / 2 + 2; | |
2561 | ||
2562 | pci_set_master(rme9652->pci); | |
2563 | ||
2564 | if ((err = snd_rme9652_initialize_memory(rme9652)) < 0) { | |
2565 | return err; | |
2566 | } | |
2567 | ||
2568 | if ((err = snd_rme9652_create_pcm(card, rme9652)) < 0) { | |
2569 | return err; | |
2570 | } | |
2571 | ||
2572 | if ((err = snd_rme9652_create_controls(card, rme9652)) < 0) { | |
2573 | return err; | |
2574 | } | |
2575 | ||
2576 | snd_rme9652_proc_init(rme9652); | |
2577 | ||
2578 | rme9652->last_spdif_sample_rate = -1; | |
2579 | rme9652->last_adat_sample_rate = -1; | |
2580 | rme9652->playback_pid = -1; | |
2581 | rme9652->capture_pid = -1; | |
2582 | rme9652->capture_substream = NULL; | |
2583 | rme9652->playback_substream = NULL; | |
2584 | ||
2585 | snd_rme9652_set_defaults(rme9652); | |
2586 | ||
2587 | if (rme9652->hw_rev == 15) { | |
2588 | rme9652_initialize_spdif_receiver (rme9652); | |
2589 | } | |
2590 | ||
2591 | return 0; | |
2592 | } | |
2593 | ||
abfd67bd | 2594 | static void snd_rme9652_card_free(struct snd_card *card) |
1da177e4 | 2595 | { |
abfd67bd | 2596 | struct snd_rme9652 *rme9652 = (struct snd_rme9652 *) card->private_data; |
1da177e4 LT |
2597 | |
2598 | if (rme9652) | |
2599 | snd_rme9652_free(rme9652); | |
2600 | } | |
2601 | ||
2602 | static int __devinit snd_rme9652_probe(struct pci_dev *pci, | |
2603 | const struct pci_device_id *pci_id) | |
2604 | { | |
2605 | static int dev; | |
abfd67bd TI |
2606 | struct snd_rme9652 *rme9652; |
2607 | struct snd_card *card; | |
1da177e4 LT |
2608 | int err; |
2609 | ||
2610 | if (dev >= SNDRV_CARDS) | |
2611 | return -ENODEV; | |
2612 | if (!enable[dev]) { | |
2613 | dev++; | |
2614 | return -ENOENT; | |
2615 | } | |
2616 | ||
2617 | card = snd_card_new(index[dev], id[dev], THIS_MODULE, | |
abfd67bd | 2618 | sizeof(struct snd_rme9652)); |
1da177e4 LT |
2619 | |
2620 | if (!card) | |
2621 | return -ENOMEM; | |
2622 | ||
abfd67bd | 2623 | rme9652 = (struct snd_rme9652 *) card->private_data; |
1da177e4 LT |
2624 | card->private_free = snd_rme9652_card_free; |
2625 | rme9652->dev = dev; | |
2626 | rme9652->pci = pci; | |
2627 | snd_card_set_dev(card, &pci->dev); | |
2628 | ||
2629 | if ((err = snd_rme9652_create(card, rme9652, precise_ptr[dev])) < 0) { | |
2630 | snd_card_free(card); | |
2631 | return err; | |
2632 | } | |
2633 | ||
2634 | strcpy(card->shortname, rme9652->card_name); | |
2635 | ||
2636 | sprintf(card->longname, "%s at 0x%lx, irq %d", | |
2637 | card->shortname, rme9652->port, rme9652->irq); | |
2638 | ||
2639 | ||
2640 | if ((err = snd_card_register(card)) < 0) { | |
2641 | snd_card_free(card); | |
2642 | return err; | |
2643 | } | |
2644 | pci_set_drvdata(pci, card); | |
2645 | dev++; | |
2646 | return 0; | |
2647 | } | |
2648 | ||
2649 | static void __devexit snd_rme9652_remove(struct pci_dev *pci) | |
2650 | { | |
2651 | snd_card_free(pci_get_drvdata(pci)); | |
2652 | pci_set_drvdata(pci, NULL); | |
2653 | } | |
2654 | ||
2655 | static struct pci_driver driver = { | |
2656 | .name = "RME Digi9652 (Hammerfall)", | |
2657 | .id_table = snd_rme9652_ids, | |
2658 | .probe = snd_rme9652_probe, | |
2659 | .remove = __devexit_p(snd_rme9652_remove), | |
2660 | }; | |
2661 | ||
2662 | static int __init alsa_card_hammerfall_init(void) | |
2663 | { | |
01d25d46 | 2664 | return pci_register_driver(&driver); |
1da177e4 LT |
2665 | } |
2666 | ||
2667 | static void __exit alsa_card_hammerfall_exit(void) | |
2668 | { | |
2669 | pci_unregister_driver(&driver); | |
2670 | } | |
2671 | ||
2672 | module_init(alsa_card_hammerfall_init) | |
2673 | module_exit(alsa_card_hammerfall_exit) |