Commit | Line | Data |
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1da177e4 LT |
1 | /* |
2 | * ALSA driver for VIA VT82xx (South Bridge) | |
3 | * | |
4 | * VT82C686A/B/C, VT8233A/C, VT8235 | |
5 | * | |
c1017a4c | 6 | * Copyright (c) 2000 Jaroslav Kysela <perex@perex.cz> |
1da177e4 LT |
7 | * Tjeerd.Mulder <Tjeerd.Mulder@fujitsu-siemens.com> |
8 | * 2002 Takashi Iwai <tiwai@suse.de> | |
9 | * | |
10 | * This program is free software; you can redistribute it and/or modify | |
11 | * it under the terms of the GNU General Public License as published by | |
12 | * the Free Software Foundation; either version 2 of the License, or | |
13 | * (at your option) any later version. | |
14 | * | |
15 | * This program is distributed in the hope that it will be useful, | |
16 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
17 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
18 | * GNU General Public License for more details. | |
19 | * | |
20 | * You should have received a copy of the GNU General Public License | |
21 | * along with this program; if not, write to the Free Software | |
22 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA | |
23 | * | |
24 | */ | |
25 | ||
26 | /* | |
27 | * Changes: | |
28 | * | |
29 | * Dec. 19, 2002 Takashi Iwai <tiwai@suse.de> | |
30 | * - use the DSX channels for the first pcm playback. | |
31 | * (on VIA8233, 8233C and 8235 only) | |
32 | * this will allow you play simultaneously up to 4 streams. | |
33 | * multi-channel playback is assigned to the second device | |
34 | * on these chips. | |
35 | * - support the secondary capture (on VIA8233/C,8235) | |
36 | * - SPDIF support | |
37 | * the DSX3 channel can be used for SPDIF output. | |
38 | * on VIA8233A, this channel is assigned to the second pcm | |
39 | * playback. | |
40 | * the card config of alsa-lib will assign the correct | |
41 | * device for applications. | |
42 | * - clean up the code, separate low-level initialization | |
43 | * routines for each chipset. | |
4f550df5 KW |
44 | * |
45 | * Sep. 26, 2005 Karsten Wiese <annabellesgarden@yahoo.de> | |
46 | * - Optimize position calculation for the 823x chips. | |
1da177e4 LT |
47 | */ |
48 | ||
1da177e4 LT |
49 | #include <asm/io.h> |
50 | #include <linux/delay.h> | |
51 | #include <linux/interrupt.h> | |
52 | #include <linux/init.h> | |
53 | #include <linux/pci.h> | |
54 | #include <linux/slab.h> | |
55 | #include <linux/gameport.h> | |
65a77217 | 56 | #include <linux/module.h> |
1da177e4 LT |
57 | #include <sound/core.h> |
58 | #include <sound/pcm.h> | |
59 | #include <sound/pcm_params.h> | |
60 | #include <sound/info.h> | |
7058c042 | 61 | #include <sound/tlv.h> |
1da177e4 LT |
62 | #include <sound/ac97_codec.h> |
63 | #include <sound/mpu401.h> | |
64 | #include <sound/initval.h> | |
65 | ||
66 | #if 0 | |
67 | #define POINTER_DEBUG | |
68 | #endif | |
69 | ||
c1017a4c | 70 | MODULE_AUTHOR("Jaroslav Kysela <perex@perex.cz>"); |
1da177e4 LT |
71 | MODULE_DESCRIPTION("VIA VT82xx audio"); |
72 | MODULE_LICENSE("GPL"); | |
73 | MODULE_SUPPORTED_DEVICE("{{VIA,VT82C686A/B/C,pci},{VIA,VT8233A/C,8235}}"); | |
74 | ||
75 | #if defined(CONFIG_GAMEPORT) || (defined(MODULE) && defined(CONFIG_GAMEPORT_MODULE)) | |
76 | #define SUPPORT_JOYSTICK 1 | |
77 | #endif | |
78 | ||
b7fe4622 CL |
79 | static int index = SNDRV_DEFAULT_IDX1; /* Index 0-MAX */ |
80 | static char *id = SNDRV_DEFAULT_STR1; /* ID for this card */ | |
81 | static long mpu_port; | |
1da177e4 | 82 | #ifdef SUPPORT_JOYSTICK |
a67ff6a5 | 83 | static bool joystick; |
1da177e4 | 84 | #endif |
b7fe4622 CL |
85 | static int ac97_clock = 48000; |
86 | static char *ac97_quirk; | |
87 | static int dxs_support; | |
395c61d1 | 88 | static int dxs_init_volume = 31; |
115551d9 | 89 | static int nodelay; |
1da177e4 | 90 | |
b7fe4622 | 91 | module_param(index, int, 0444); |
1da177e4 | 92 | MODULE_PARM_DESC(index, "Index value for VIA 82xx bridge."); |
b7fe4622 | 93 | module_param(id, charp, 0444); |
1da177e4 | 94 | MODULE_PARM_DESC(id, "ID string for VIA 82xx bridge."); |
b7fe4622 | 95 | module_param(mpu_port, long, 0444); |
1da177e4 LT |
96 | MODULE_PARM_DESC(mpu_port, "MPU-401 port. (VT82C686x only)"); |
97 | #ifdef SUPPORT_JOYSTICK | |
b7fe4622 | 98 | module_param(joystick, bool, 0444); |
1da177e4 LT |
99 | MODULE_PARM_DESC(joystick, "Enable joystick. (VT82C686x only)"); |
100 | #endif | |
b7fe4622 | 101 | module_param(ac97_clock, int, 0444); |
1da177e4 | 102 | MODULE_PARM_DESC(ac97_clock, "AC'97 codec clock (default 48000Hz)."); |
b7fe4622 | 103 | module_param(ac97_quirk, charp, 0444); |
1da177e4 | 104 | MODULE_PARM_DESC(ac97_quirk, "AC'97 workaround for strange hardware."); |
b7fe4622 | 105 | module_param(dxs_support, int, 0444); |
2d7eb7cb | 106 | MODULE_PARM_DESC(dxs_support, "Support for DXS channels (0 = auto, 1 = enable, 2 = disable, 3 = 48k only, 4 = no VRA, 5 = enable any sample rate)"); |
395c61d1 CL |
107 | module_param(dxs_init_volume, int, 0644); |
108 | MODULE_PARM_DESC(dxs_init_volume, "initial DXS volume (0-31)"); | |
115551d9 SA |
109 | module_param(nodelay, int, 0444); |
110 | MODULE_PARM_DESC(nodelay, "Disable 500ms init delay"); | |
1da177e4 | 111 | |
2b3e584b | 112 | /* just for backward compatibility */ |
a67ff6a5 | 113 | static bool enable; |
698444f3 | 114 | module_param(enable, bool, 0444); |
2b3e584b | 115 | |
1da177e4 | 116 | |
1da177e4 LT |
117 | /* revision numbers for via686 */ |
118 | #define VIA_REV_686_A 0x10 | |
119 | #define VIA_REV_686_B 0x11 | |
120 | #define VIA_REV_686_C 0x12 | |
121 | #define VIA_REV_686_D 0x13 | |
122 | #define VIA_REV_686_E 0x14 | |
123 | #define VIA_REV_686_H 0x20 | |
124 | ||
125 | /* revision numbers for via8233 */ | |
126 | #define VIA_REV_PRE_8233 0x10 /* not in market */ | |
127 | #define VIA_REV_8233C 0x20 /* 2 rec, 4 pb, 1 multi-pb */ | |
128 | #define VIA_REV_8233 0x30 /* 2 rec, 4 pb, 1 multi-pb, spdif */ | |
129 | #define VIA_REV_8233A 0x40 /* 1 rec, 1 multi-pb, spdf */ | |
130 | #define VIA_REV_8235 0x50 /* 2 rec, 4 pb, 1 multi-pb, spdif */ | |
131 | #define VIA_REV_8237 0x60 | |
8263c65f | 132 | #define VIA_REV_8251 0x70 |
1da177e4 LT |
133 | |
134 | /* | |
135 | * Direct registers | |
136 | */ | |
137 | ||
138 | #define VIAREG(via, x) ((via)->port + VIA_REG_##x) | |
139 | #define VIADEV_REG(viadev, x) ((viadev)->port + VIA_REG_##x) | |
140 | ||
141 | /* common offsets */ | |
142 | #define VIA_REG_OFFSET_STATUS 0x00 /* byte - channel status */ | |
143 | #define VIA_REG_STAT_ACTIVE 0x80 /* RO */ | |
4f550df5 | 144 | #define VIA8233_SHADOW_STAT_ACTIVE 0x08 /* RO */ |
1da177e4 LT |
145 | #define VIA_REG_STAT_PAUSED 0x40 /* RO */ |
146 | #define VIA_REG_STAT_TRIGGER_QUEUED 0x08 /* RO */ | |
147 | #define VIA_REG_STAT_STOPPED 0x04 /* RWC */ | |
148 | #define VIA_REG_STAT_EOL 0x02 /* RWC */ | |
149 | #define VIA_REG_STAT_FLAG 0x01 /* RWC */ | |
150 | #define VIA_REG_OFFSET_CONTROL 0x01 /* byte - channel control */ | |
151 | #define VIA_REG_CTRL_START 0x80 /* WO */ | |
152 | #define VIA_REG_CTRL_TERMINATE 0x40 /* WO */ | |
153 | #define VIA_REG_CTRL_AUTOSTART 0x20 | |
154 | #define VIA_REG_CTRL_PAUSE 0x08 /* RW */ | |
155 | #define VIA_REG_CTRL_INT_STOP 0x04 | |
156 | #define VIA_REG_CTRL_INT_EOL 0x02 | |
157 | #define VIA_REG_CTRL_INT_FLAG 0x01 | |
158 | #define VIA_REG_CTRL_RESET 0x01 /* RW - probably reset? undocumented */ | |
159 | #define VIA_REG_CTRL_INT (VIA_REG_CTRL_INT_FLAG | VIA_REG_CTRL_INT_EOL | VIA_REG_CTRL_AUTOSTART) | |
160 | #define VIA_REG_OFFSET_TYPE 0x02 /* byte - channel type (686 only) */ | |
161 | #define VIA_REG_TYPE_AUTOSTART 0x80 /* RW - autostart at EOL */ | |
162 | #define VIA_REG_TYPE_16BIT 0x20 /* RW */ | |
163 | #define VIA_REG_TYPE_STEREO 0x10 /* RW */ | |
164 | #define VIA_REG_TYPE_INT_LLINE 0x00 | |
165 | #define VIA_REG_TYPE_INT_LSAMPLE 0x04 | |
166 | #define VIA_REG_TYPE_INT_LESSONE 0x08 | |
167 | #define VIA_REG_TYPE_INT_MASK 0x0c | |
168 | #define VIA_REG_TYPE_INT_EOL 0x02 | |
169 | #define VIA_REG_TYPE_INT_FLAG 0x01 | |
170 | #define VIA_REG_OFFSET_TABLE_PTR 0x04 /* dword - channel table pointer */ | |
171 | #define VIA_REG_OFFSET_CURR_PTR 0x04 /* dword - channel current pointer */ | |
172 | #define VIA_REG_OFFSET_STOP_IDX 0x08 /* dword - stop index, channel type, sample rate */ | |
173 | #define VIA8233_REG_TYPE_16BIT 0x00200000 /* RW */ | |
174 | #define VIA8233_REG_TYPE_STEREO 0x00100000 /* RW */ | |
175 | #define VIA_REG_OFFSET_CURR_COUNT 0x0c /* dword - channel current count (24 bit) */ | |
176 | #define VIA_REG_OFFSET_CURR_INDEX 0x0f /* byte - channel current index (for via8233 only) */ | |
177 | ||
178 | #define DEFINE_VIA_REGSET(name,val) \ | |
179 | enum {\ | |
180 | VIA_REG_##name##_STATUS = (val),\ | |
181 | VIA_REG_##name##_CONTROL = (val) + 0x01,\ | |
182 | VIA_REG_##name##_TYPE = (val) + 0x02,\ | |
183 | VIA_REG_##name##_TABLE_PTR = (val) + 0x04,\ | |
184 | VIA_REG_##name##_CURR_PTR = (val) + 0x04,\ | |
185 | VIA_REG_##name##_STOP_IDX = (val) + 0x08,\ | |
186 | VIA_REG_##name##_CURR_COUNT = (val) + 0x0c,\ | |
187 | } | |
188 | ||
189 | /* playback block */ | |
190 | DEFINE_VIA_REGSET(PLAYBACK, 0x00); | |
191 | DEFINE_VIA_REGSET(CAPTURE, 0x10); | |
192 | DEFINE_VIA_REGSET(FM, 0x20); | |
193 | ||
194 | /* AC'97 */ | |
195 | #define VIA_REG_AC97 0x80 /* dword */ | |
196 | #define VIA_REG_AC97_CODEC_ID_MASK (3<<30) | |
197 | #define VIA_REG_AC97_CODEC_ID_SHIFT 30 | |
198 | #define VIA_REG_AC97_CODEC_ID_PRIMARY 0x00 | |
199 | #define VIA_REG_AC97_CODEC_ID_SECONDARY 0x01 | |
200 | #define VIA_REG_AC97_SECONDARY_VALID (1<<27) | |
201 | #define VIA_REG_AC97_PRIMARY_VALID (1<<25) | |
202 | #define VIA_REG_AC97_BUSY (1<<24) | |
203 | #define VIA_REG_AC97_READ (1<<23) | |
204 | #define VIA_REG_AC97_CMD_SHIFT 16 | |
205 | #define VIA_REG_AC97_CMD_MASK 0x7e | |
206 | #define VIA_REG_AC97_DATA_SHIFT 0 | |
207 | #define VIA_REG_AC97_DATA_MASK 0xffff | |
208 | ||
209 | #define VIA_REG_SGD_SHADOW 0x84 /* dword */ | |
210 | /* via686 */ | |
211 | #define VIA_REG_SGD_STAT_PB_FLAG (1<<0) | |
212 | #define VIA_REG_SGD_STAT_CP_FLAG (1<<1) | |
213 | #define VIA_REG_SGD_STAT_FM_FLAG (1<<2) | |
214 | #define VIA_REG_SGD_STAT_PB_EOL (1<<4) | |
215 | #define VIA_REG_SGD_STAT_CP_EOL (1<<5) | |
216 | #define VIA_REG_SGD_STAT_FM_EOL (1<<6) | |
217 | #define VIA_REG_SGD_STAT_PB_STOP (1<<8) | |
218 | #define VIA_REG_SGD_STAT_CP_STOP (1<<9) | |
219 | #define VIA_REG_SGD_STAT_FM_STOP (1<<10) | |
220 | #define VIA_REG_SGD_STAT_PB_ACTIVE (1<<12) | |
221 | #define VIA_REG_SGD_STAT_CP_ACTIVE (1<<13) | |
222 | #define VIA_REG_SGD_STAT_FM_ACTIVE (1<<14) | |
223 | /* via8233 */ | |
224 | #define VIA8233_REG_SGD_STAT_FLAG (1<<0) | |
225 | #define VIA8233_REG_SGD_STAT_EOL (1<<1) | |
226 | #define VIA8233_REG_SGD_STAT_STOP (1<<2) | |
227 | #define VIA8233_REG_SGD_STAT_ACTIVE (1<<3) | |
228 | #define VIA8233_INTR_MASK(chan) ((VIA8233_REG_SGD_STAT_FLAG|VIA8233_REG_SGD_STAT_EOL) << ((chan) * 4)) | |
229 | #define VIA8233_REG_SGD_CHAN_SDX 0 | |
230 | #define VIA8233_REG_SGD_CHAN_MULTI 4 | |
231 | #define VIA8233_REG_SGD_CHAN_REC 6 | |
232 | #define VIA8233_REG_SGD_CHAN_REC1 7 | |
233 | ||
234 | #define VIA_REG_GPI_STATUS 0x88 | |
235 | #define VIA_REG_GPI_INTR 0x8c | |
236 | ||
237 | /* multi-channel and capture registers for via8233 */ | |
238 | DEFINE_VIA_REGSET(MULTPLAY, 0x40); | |
239 | DEFINE_VIA_REGSET(CAPTURE_8233, 0x60); | |
240 | ||
241 | /* via8233-specific registers */ | |
242 | #define VIA_REG_OFS_PLAYBACK_VOLUME_L 0x02 /* byte */ | |
243 | #define VIA_REG_OFS_PLAYBACK_VOLUME_R 0x03 /* byte */ | |
244 | #define VIA_REG_OFS_MULTPLAY_FORMAT 0x02 /* byte - format and channels */ | |
245 | #define VIA_REG_MULTPLAY_FMT_8BIT 0x00 | |
246 | #define VIA_REG_MULTPLAY_FMT_16BIT 0x80 | |
247 | #define VIA_REG_MULTPLAY_FMT_CH_MASK 0x70 /* # channels << 4 (valid = 1,2,4,6) */ | |
248 | #define VIA_REG_OFS_CAPTURE_FIFO 0x02 /* byte - bit 6 = fifo enable */ | |
249 | #define VIA_REG_CAPTURE_FIFO_ENABLE 0x40 | |
250 | ||
251 | #define VIA_DXS_MAX_VOLUME 31 /* max. volume (attenuation) of reg 0x32/33 */ | |
252 | ||
253 | #define VIA_REG_CAPTURE_CHANNEL 0x63 /* byte - input select */ | |
254 | #define VIA_REG_CAPTURE_CHANNEL_MIC 0x4 | |
255 | #define VIA_REG_CAPTURE_CHANNEL_LINE 0 | |
256 | #define VIA_REG_CAPTURE_SELECT_CODEC 0x03 /* recording source codec (0 = primary) */ | |
257 | ||
258 | #define VIA_TBL_BIT_FLAG 0x40000000 | |
259 | #define VIA_TBL_BIT_EOL 0x80000000 | |
260 | ||
261 | /* pci space */ | |
262 | #define VIA_ACLINK_STAT 0x40 | |
263 | #define VIA_ACLINK_C11_READY 0x20 | |
264 | #define VIA_ACLINK_C10_READY 0x10 | |
265 | #define VIA_ACLINK_C01_READY 0x04 /* secondary codec ready */ | |
266 | #define VIA_ACLINK_LOWPOWER 0x02 /* low-power state */ | |
267 | #define VIA_ACLINK_C00_READY 0x01 /* primary codec ready */ | |
268 | #define VIA_ACLINK_CTRL 0x41 | |
269 | #define VIA_ACLINK_CTRL_ENABLE 0x80 /* 0: disable, 1: enable */ | |
270 | #define VIA_ACLINK_CTRL_RESET 0x40 /* 0: assert, 1: de-assert */ | |
271 | #define VIA_ACLINK_CTRL_SYNC 0x20 /* 0: release SYNC, 1: force SYNC hi */ | |
272 | #define VIA_ACLINK_CTRL_SDO 0x10 /* 0: release SDO, 1: force SDO hi */ | |
273 | #define VIA_ACLINK_CTRL_VRA 0x08 /* 0: disable VRA, 1: enable VRA */ | |
274 | #define VIA_ACLINK_CTRL_PCM 0x04 /* 0: disable PCM, 1: enable PCM */ | |
275 | #define VIA_ACLINK_CTRL_FM 0x02 /* via686 only */ | |
276 | #define VIA_ACLINK_CTRL_SB 0x01 /* via686 only */ | |
277 | #define VIA_ACLINK_CTRL_INIT (VIA_ACLINK_CTRL_ENABLE|\ | |
278 | VIA_ACLINK_CTRL_RESET|\ | |
279 | VIA_ACLINK_CTRL_PCM|\ | |
280 | VIA_ACLINK_CTRL_VRA) | |
281 | #define VIA_FUNC_ENABLE 0x42 | |
282 | #define VIA_FUNC_MIDI_PNP 0x80 /* FIXME: it's 0x40 in the datasheet! */ | |
283 | #define VIA_FUNC_MIDI_IRQMASK 0x40 /* FIXME: not documented! */ | |
284 | #define VIA_FUNC_RX2C_WRITE 0x20 | |
285 | #define VIA_FUNC_SB_FIFO_EMPTY 0x10 | |
286 | #define VIA_FUNC_ENABLE_GAME 0x08 | |
287 | #define VIA_FUNC_ENABLE_FM 0x04 | |
288 | #define VIA_FUNC_ENABLE_MIDI 0x02 | |
289 | #define VIA_FUNC_ENABLE_SB 0x01 | |
290 | #define VIA_PNP_CONTROL 0x43 | |
291 | #define VIA_FM_NMI_CTRL 0x48 | |
292 | #define VIA8233_VOLCHG_CTRL 0x48 | |
293 | #define VIA8233_SPDIF_CTRL 0x49 | |
294 | #define VIA8233_SPDIF_DX3 0x08 | |
295 | #define VIA8233_SPDIF_SLOT_MASK 0x03 | |
296 | #define VIA8233_SPDIF_SLOT_1011 0x00 | |
297 | #define VIA8233_SPDIF_SLOT_34 0x01 | |
298 | #define VIA8233_SPDIF_SLOT_78 0x02 | |
299 | #define VIA8233_SPDIF_SLOT_69 0x03 | |
300 | ||
301 | /* | |
302 | */ | |
303 | ||
304 | #define VIA_DXS_AUTO 0 | |
305 | #define VIA_DXS_ENABLE 1 | |
306 | #define VIA_DXS_DISABLE 2 | |
307 | #define VIA_DXS_48K 3 | |
308 | #define VIA_DXS_NO_VRA 4 | |
2d7eb7cb | 309 | #define VIA_DXS_SRC 5 |
1da177e4 LT |
310 | |
311 | ||
1da177e4 LT |
312 | /* |
313 | * pcm stream | |
314 | */ | |
315 | ||
316 | struct snd_via_sg_table { | |
317 | unsigned int offset; | |
318 | unsigned int size; | |
319 | } ; | |
320 | ||
321 | #define VIA_TABLE_SIZE 255 | |
5503600a | 322 | #define VIA_MAX_BUFSIZE (1<<24) |
1da177e4 | 323 | |
e437e3d7 | 324 | struct viadev { |
1da177e4 LT |
325 | unsigned int reg_offset; |
326 | unsigned long port; | |
327 | int direction; /* playback = 0, capture = 1 */ | |
e437e3d7 | 328 | struct snd_pcm_substream *substream; |
1da177e4 LT |
329 | int running; |
330 | unsigned int tbl_entries; /* # descriptors */ | |
331 | struct snd_dma_buffer table; | |
332 | struct snd_via_sg_table *idx_table; | |
333 | /* for recovery from the unexpected pointer */ | |
334 | unsigned int lastpos; | |
335 | unsigned int fragsize; | |
336 | unsigned int bufsize; | |
337 | unsigned int bufsize2; | |
4f550df5 KW |
338 | int hwptr_done; /* processed frame position in the buffer */ |
339 | int in_interrupt; | |
340 | int shadow_shift; | |
1da177e4 LT |
341 | }; |
342 | ||
343 | ||
344 | enum { TYPE_CARD_VIA686 = 1, TYPE_CARD_VIA8233 }; | |
345 | enum { TYPE_VIA686, TYPE_VIA8233, TYPE_VIA8233A }; | |
346 | ||
347 | #define VIA_MAX_DEVS 7 /* 4 playback, 1 multi, 2 capture */ | |
348 | ||
349 | struct via_rate_lock { | |
350 | spinlock_t lock; | |
351 | int rate; | |
352 | int used; | |
353 | }; | |
354 | ||
e437e3d7 | 355 | struct via82xx { |
1da177e4 LT |
356 | int irq; |
357 | ||
358 | unsigned long port; | |
359 | struct resource *mpu_res; | |
360 | int chip_type; | |
361 | unsigned char revision; | |
362 | ||
363 | unsigned char old_legacy; | |
364 | unsigned char old_legacy_cfg; | |
c7561cd8 | 365 | #ifdef CONFIG_PM_SLEEP |
1da177e4 LT |
366 | unsigned char legacy_saved; |
367 | unsigned char legacy_cfg_saved; | |
368 | unsigned char spdif_ctrl_saved; | |
369 | unsigned char capture_src_saved[2]; | |
370 | unsigned int mpu_port_saved; | |
371 | #endif | |
372 | ||
00f226d4 HM |
373 | unsigned char playback_volume[4][2]; /* for VIA8233/C/8235; default = 0 */ |
374 | unsigned char playback_volume_c[2]; /* for VIA8233/C/8235; default = 0 */ | |
1da177e4 LT |
375 | |
376 | unsigned int intr_mask; /* SGD_SHADOW mask to check interrupts */ | |
377 | ||
378 | struct pci_dev *pci; | |
e437e3d7 | 379 | struct snd_card *card; |
1da177e4 LT |
380 | |
381 | unsigned int num_devs; | |
382 | unsigned int playback_devno, multi_devno, capture_devno; | |
e437e3d7 | 383 | struct viadev devs[VIA_MAX_DEVS]; |
1da177e4 LT |
384 | struct via_rate_lock rates[2]; /* playback and capture */ |
385 | unsigned int dxs_fixed: 1; /* DXS channel accepts only 48kHz */ | |
386 | unsigned int no_vra: 1; /* no need to set VRA on DXS channels */ | |
2d7eb7cb | 387 | unsigned int dxs_src: 1; /* use full SRC capabilities of DXS */ |
1da177e4 LT |
388 | unsigned int spdif_on: 1; /* only spdif rates work to external DACs */ |
389 | ||
e437e3d7 TI |
390 | struct snd_pcm *pcms[2]; |
391 | struct snd_rawmidi *rmidi; | |
3d009413 | 392 | struct snd_kcontrol *dxs_controls[4]; |
1da177e4 | 393 | |
e437e3d7 TI |
394 | struct snd_ac97_bus *ac97_bus; |
395 | struct snd_ac97 *ac97; | |
1da177e4 LT |
396 | unsigned int ac97_clock; |
397 | unsigned int ac97_secondary; /* secondary AC'97 codec is present */ | |
398 | ||
399 | spinlock_t reg_lock; | |
e437e3d7 | 400 | struct snd_info_entry *proc_entry; |
1da177e4 LT |
401 | |
402 | #ifdef SUPPORT_JOYSTICK | |
403 | struct gameport *gameport; | |
404 | #endif | |
405 | }; | |
406 | ||
cebe41d4 | 407 | static DEFINE_PCI_DEVICE_TABLE(snd_via82xx_ids) = { |
4f550df5 | 408 | /* 0x1106, 0x3058 */ |
28d27aae | 409 | { PCI_VDEVICE(VIA, PCI_DEVICE_ID_VIA_82C686_5), TYPE_CARD_VIA686, }, /* 686A */ |
4f550df5 | 410 | /* 0x1106, 0x3059 */ |
28d27aae | 411 | { PCI_VDEVICE(VIA, PCI_DEVICE_ID_VIA_8233_5), TYPE_CARD_VIA8233, }, /* VT8233 */ |
1da177e4 LT |
412 | { 0, } |
413 | }; | |
414 | ||
415 | MODULE_DEVICE_TABLE(pci, snd_via82xx_ids); | |
416 | ||
417 | /* | |
418 | */ | |
419 | ||
420 | /* | |
421 | * allocate and initialize the descriptor buffers | |
422 | * periods = number of periods | |
423 | * fragsize = period size in bytes | |
424 | */ | |
e437e3d7 | 425 | static int build_via_table(struct viadev *dev, struct snd_pcm_substream *substream, |
1da177e4 LT |
426 | struct pci_dev *pci, |
427 | unsigned int periods, unsigned int fragsize) | |
428 | { | |
429 | unsigned int i, idx, ofs, rest; | |
e437e3d7 | 430 | struct via82xx *chip = snd_pcm_substream_chip(substream); |
1da177e4 LT |
431 | |
432 | if (dev->table.area == NULL) { | |
433 | /* the start of each lists must be aligned to 8 bytes, | |
434 | * but the kernel pages are much bigger, so we don't care | |
435 | */ | |
436 | if (snd_dma_alloc_pages(SNDRV_DMA_TYPE_DEV, snd_dma_pci_data(chip->pci), | |
437 | PAGE_ALIGN(VIA_TABLE_SIZE * 2 * 8), | |
438 | &dev->table) < 0) | |
439 | return -ENOMEM; | |
440 | } | |
441 | if (! dev->idx_table) { | |
442 | dev->idx_table = kmalloc(sizeof(*dev->idx_table) * VIA_TABLE_SIZE, GFP_KERNEL); | |
443 | if (! dev->idx_table) | |
444 | return -ENOMEM; | |
445 | } | |
446 | ||
447 | /* fill the entries */ | |
448 | idx = 0; | |
449 | ofs = 0; | |
450 | for (i = 0; i < periods; i++) { | |
451 | rest = fragsize; | |
452 | /* fill descriptors for a period. | |
453 | * a period can be split to several descriptors if it's | |
454 | * over page boundary. | |
455 | */ | |
456 | do { | |
457 | unsigned int r; | |
458 | unsigned int flag; | |
77a23f26 | 459 | unsigned int addr; |
1da177e4 LT |
460 | |
461 | if (idx >= VIA_TABLE_SIZE) { | |
462 | snd_printk(KERN_ERR "via82xx: too much table size!\n"); | |
463 | return -EINVAL; | |
464 | } | |
77a23f26 TI |
465 | addr = snd_pcm_sgbuf_get_addr(substream, ofs); |
466 | ((u32 *)dev->table.area)[idx << 1] = cpu_to_le32(addr); | |
5503600a | 467 | r = snd_pcm_sgbuf_get_chunk_size(substream, ofs, rest); |
1da177e4 LT |
468 | rest -= r; |
469 | if (! rest) { | |
470 | if (i == periods - 1) | |
471 | flag = VIA_TBL_BIT_EOL; /* buffer boundary */ | |
472 | else | |
473 | flag = VIA_TBL_BIT_FLAG; /* period boundary */ | |
474 | } else | |
475 | flag = 0; /* period continues to the next */ | |
ee419653 TI |
476 | /* |
477 | printk(KERN_DEBUG "via: tbl %d: at %d size %d " | |
478 | "(rest %d)\n", idx, ofs, r, rest); | |
479 | */ | |
1da177e4 LT |
480 | ((u32 *)dev->table.area)[(idx<<1) + 1] = cpu_to_le32(r | flag); |
481 | dev->idx_table[idx].offset = ofs; | |
482 | dev->idx_table[idx].size = r; | |
483 | ofs += r; | |
484 | idx++; | |
485 | } while (rest > 0); | |
486 | } | |
487 | dev->tbl_entries = idx; | |
488 | dev->bufsize = periods * fragsize; | |
489 | dev->bufsize2 = dev->bufsize / 2; | |
490 | dev->fragsize = fragsize; | |
491 | return 0; | |
492 | } | |
493 | ||
494 | ||
e437e3d7 | 495 | static int clean_via_table(struct viadev *dev, struct snd_pcm_substream *substream, |
1da177e4 LT |
496 | struct pci_dev *pci) |
497 | { | |
498 | if (dev->table.area) { | |
499 | snd_dma_free_pages(&dev->table); | |
500 | dev->table.area = NULL; | |
501 | } | |
4d572776 JJ |
502 | kfree(dev->idx_table); |
503 | dev->idx_table = NULL; | |
1da177e4 LT |
504 | return 0; |
505 | } | |
506 | ||
507 | /* | |
508 | * Basic I/O | |
509 | */ | |
510 | ||
e437e3d7 | 511 | static inline unsigned int snd_via82xx_codec_xread(struct via82xx *chip) |
1da177e4 LT |
512 | { |
513 | return inl(VIAREG(chip, AC97)); | |
514 | } | |
515 | ||
e437e3d7 | 516 | static inline void snd_via82xx_codec_xwrite(struct via82xx *chip, unsigned int val) |
1da177e4 LT |
517 | { |
518 | outl(val, VIAREG(chip, AC97)); | |
519 | } | |
520 | ||
e437e3d7 | 521 | static int snd_via82xx_codec_ready(struct via82xx *chip, int secondary) |
1da177e4 LT |
522 | { |
523 | unsigned int timeout = 1000; /* 1ms */ | |
524 | unsigned int val; | |
525 | ||
526 | while (timeout-- > 0) { | |
527 | udelay(1); | |
528 | if (!((val = snd_via82xx_codec_xread(chip)) & VIA_REG_AC97_BUSY)) | |
529 | return val & 0xffff; | |
530 | } | |
e437e3d7 TI |
531 | snd_printk(KERN_ERR "codec_ready: codec %i is not ready [0x%x]\n", |
532 | secondary, snd_via82xx_codec_xread(chip)); | |
1da177e4 LT |
533 | return -EIO; |
534 | } | |
535 | ||
e437e3d7 | 536 | static int snd_via82xx_codec_valid(struct via82xx *chip, int secondary) |
1da177e4 LT |
537 | { |
538 | unsigned int timeout = 1000; /* 1ms */ | |
539 | unsigned int val, val1; | |
540 | unsigned int stat = !secondary ? VIA_REG_AC97_PRIMARY_VALID : | |
541 | VIA_REG_AC97_SECONDARY_VALID; | |
542 | ||
543 | while (timeout-- > 0) { | |
544 | val = snd_via82xx_codec_xread(chip); | |
545 | val1 = val & (VIA_REG_AC97_BUSY | stat); | |
546 | if (val1 == stat) | |
547 | return val & 0xffff; | |
548 | udelay(1); | |
549 | } | |
550 | return -EIO; | |
551 | } | |
552 | ||
e437e3d7 | 553 | static void snd_via82xx_codec_wait(struct snd_ac97 *ac97) |
1da177e4 | 554 | { |
e437e3d7 | 555 | struct via82xx *chip = ac97->private_data; |
1da177e4 LT |
556 | int err; |
557 | err = snd_via82xx_codec_ready(chip, ac97->num); | |
558 | /* here we need to wait fairly for long time.. */ | |
115551d9 SA |
559 | if (!nodelay) |
560 | msleep(500); | |
1da177e4 LT |
561 | } |
562 | ||
e437e3d7 | 563 | static void snd_via82xx_codec_write(struct snd_ac97 *ac97, |
1da177e4 LT |
564 | unsigned short reg, |
565 | unsigned short val) | |
566 | { | |
e437e3d7 | 567 | struct via82xx *chip = ac97->private_data; |
1da177e4 | 568 | unsigned int xval; |
4f550df5 | 569 | |
1da177e4 LT |
570 | xval = !ac97->num ? VIA_REG_AC97_CODEC_ID_PRIMARY : VIA_REG_AC97_CODEC_ID_SECONDARY; |
571 | xval <<= VIA_REG_AC97_CODEC_ID_SHIFT; | |
572 | xval |= reg << VIA_REG_AC97_CMD_SHIFT; | |
573 | xval |= val << VIA_REG_AC97_DATA_SHIFT; | |
574 | snd_via82xx_codec_xwrite(chip, xval); | |
575 | snd_via82xx_codec_ready(chip, ac97->num); | |
576 | } | |
577 | ||
e437e3d7 | 578 | static unsigned short snd_via82xx_codec_read(struct snd_ac97 *ac97, unsigned short reg) |
1da177e4 | 579 | { |
e437e3d7 | 580 | struct via82xx *chip = ac97->private_data; |
1da177e4 LT |
581 | unsigned int xval, val = 0xffff; |
582 | int again = 0; | |
583 | ||
584 | xval = ac97->num << VIA_REG_AC97_CODEC_ID_SHIFT; | |
585 | xval |= ac97->num ? VIA_REG_AC97_SECONDARY_VALID : VIA_REG_AC97_PRIMARY_VALID; | |
586 | xval |= VIA_REG_AC97_READ; | |
587 | xval |= (reg & 0x7f) << VIA_REG_AC97_CMD_SHIFT; | |
588 | while (1) { | |
589 | if (again++ > 3) { | |
e437e3d7 TI |
590 | snd_printk(KERN_ERR "codec_read: codec %i is not valid [0x%x]\n", |
591 | ac97->num, snd_via82xx_codec_xread(chip)); | |
1da177e4 LT |
592 | return 0xffff; |
593 | } | |
594 | snd_via82xx_codec_xwrite(chip, xval); | |
595 | udelay (20); | |
596 | if (snd_via82xx_codec_valid(chip, ac97->num) >= 0) { | |
597 | udelay(25); | |
598 | val = snd_via82xx_codec_xread(chip); | |
599 | break; | |
600 | } | |
601 | } | |
602 | return val & 0xffff; | |
603 | } | |
604 | ||
e437e3d7 | 605 | static void snd_via82xx_channel_reset(struct via82xx *chip, struct viadev *viadev) |
1da177e4 LT |
606 | { |
607 | outb(VIA_REG_CTRL_PAUSE | VIA_REG_CTRL_TERMINATE | VIA_REG_CTRL_RESET, | |
608 | VIADEV_REG(viadev, OFFSET_CONTROL)); | |
609 | inb(VIADEV_REG(viadev, OFFSET_CONTROL)); | |
610 | udelay(50); | |
611 | /* disable interrupts */ | |
612 | outb(0x00, VIADEV_REG(viadev, OFFSET_CONTROL)); | |
613 | /* clear interrupts */ | |
614 | outb(0x03, VIADEV_REG(viadev, OFFSET_STATUS)); | |
615 | outb(0x00, VIADEV_REG(viadev, OFFSET_TYPE)); /* for via686 */ | |
616 | // outl(0, VIADEV_REG(viadev, OFFSET_CURR_PTR)); | |
617 | viadev->lastpos = 0; | |
4f550df5 | 618 | viadev->hwptr_done = 0; |
1da177e4 LT |
619 | } |
620 | ||
621 | ||
622 | /* | |
623 | * Interrupt handler | |
4f550df5 | 624 | * Used for 686 and 8233A |
1da177e4 | 625 | */ |
7d12e780 | 626 | static irqreturn_t snd_via686_interrupt(int irq, void *dev_id) |
1da177e4 | 627 | { |
e437e3d7 | 628 | struct via82xx *chip = dev_id; |
1da177e4 LT |
629 | unsigned int status; |
630 | unsigned int i; | |
631 | ||
632 | status = inl(VIAREG(chip, SGD_SHADOW)); | |
633 | if (! (status & chip->intr_mask)) { | |
634 | if (chip->rmidi) | |
635 | /* check mpu401 interrupt */ | |
7d12e780 | 636 | return snd_mpu401_uart_interrupt(irq, chip->rmidi->private_data); |
1da177e4 LT |
637 | return IRQ_NONE; |
638 | } | |
639 | ||
640 | /* check status for each stream */ | |
641 | spin_lock(&chip->reg_lock); | |
642 | for (i = 0; i < chip->num_devs; i++) { | |
e437e3d7 | 643 | struct viadev *viadev = &chip->devs[i]; |
1da177e4 | 644 | unsigned char c_status = inb(VIADEV_REG(viadev, OFFSET_STATUS)); |
4f550df5 | 645 | if (! (c_status & (VIA_REG_STAT_EOL|VIA_REG_STAT_FLAG|VIA_REG_STAT_STOPPED))) |
1da177e4 LT |
646 | continue; |
647 | if (viadev->substream && viadev->running) { | |
4f550df5 KW |
648 | /* |
649 | * Update hwptr_done based on 'period elapsed' | |
650 | * interrupts. We'll use it, when the chip returns 0 | |
651 | * for OFFSET_CURR_COUNT. | |
652 | */ | |
653 | if (c_status & VIA_REG_STAT_EOL) | |
654 | viadev->hwptr_done = 0; | |
655 | else | |
656 | viadev->hwptr_done += viadev->fragsize; | |
657 | viadev->in_interrupt = c_status; | |
1da177e4 LT |
658 | spin_unlock(&chip->reg_lock); |
659 | snd_pcm_period_elapsed(viadev->substream); | |
660 | spin_lock(&chip->reg_lock); | |
4f550df5 | 661 | viadev->in_interrupt = 0; |
1da177e4 LT |
662 | } |
663 | outb(c_status, VIADEV_REG(viadev, OFFSET_STATUS)); /* ack */ | |
664 | } | |
665 | spin_unlock(&chip->reg_lock); | |
666 | return IRQ_HANDLED; | |
667 | } | |
668 | ||
4f550df5 KW |
669 | /* |
670 | * Interrupt handler | |
671 | */ | |
7d12e780 | 672 | static irqreturn_t snd_via8233_interrupt(int irq, void *dev_id) |
4f550df5 | 673 | { |
e437e3d7 | 674 | struct via82xx *chip = dev_id; |
4f550df5 KW |
675 | unsigned int status; |
676 | unsigned int i; | |
677 | int irqreturn = 0; | |
678 | ||
679 | /* check status for each stream */ | |
680 | spin_lock(&chip->reg_lock); | |
681 | status = inl(VIAREG(chip, SGD_SHADOW)); | |
682 | ||
683 | for (i = 0; i < chip->num_devs; i++) { | |
e437e3d7 TI |
684 | struct viadev *viadev = &chip->devs[i]; |
685 | struct snd_pcm_substream *substream; | |
4f550df5 KW |
686 | unsigned char c_status, shadow_status; |
687 | ||
688 | shadow_status = (status >> viadev->shadow_shift) & | |
689 | (VIA8233_SHADOW_STAT_ACTIVE|VIA_REG_STAT_EOL| | |
690 | VIA_REG_STAT_FLAG); | |
691 | c_status = shadow_status & (VIA_REG_STAT_EOL|VIA_REG_STAT_FLAG); | |
692 | if (!c_status) | |
693 | continue; | |
694 | ||
695 | substream = viadev->substream; | |
696 | if (substream && viadev->running) { | |
697 | /* | |
698 | * Update hwptr_done based on 'period elapsed' | |
699 | * interrupts. We'll use it, when the chip returns 0 | |
700 | * for OFFSET_CURR_COUNT. | |
701 | */ | |
702 | if (c_status & VIA_REG_STAT_EOL) | |
703 | viadev->hwptr_done = 0; | |
704 | else | |
705 | viadev->hwptr_done += viadev->fragsize; | |
706 | viadev->in_interrupt = c_status; | |
707 | if (shadow_status & VIA8233_SHADOW_STAT_ACTIVE) | |
708 | viadev->in_interrupt |= VIA_REG_STAT_ACTIVE; | |
709 | spin_unlock(&chip->reg_lock); | |
710 | ||
711 | snd_pcm_period_elapsed(substream); | |
712 | ||
713 | spin_lock(&chip->reg_lock); | |
714 | viadev->in_interrupt = 0; | |
715 | } | |
716 | outb(c_status, VIADEV_REG(viadev, OFFSET_STATUS)); /* ack */ | |
717 | irqreturn = 1; | |
718 | } | |
719 | spin_unlock(&chip->reg_lock); | |
720 | return IRQ_RETVAL(irqreturn); | |
721 | } | |
722 | ||
1da177e4 LT |
723 | /* |
724 | * PCM callbacks | |
725 | */ | |
726 | ||
727 | /* | |
728 | * trigger callback | |
729 | */ | |
e437e3d7 | 730 | static int snd_via82xx_pcm_trigger(struct snd_pcm_substream *substream, int cmd) |
1da177e4 | 731 | { |
e437e3d7 TI |
732 | struct via82xx *chip = snd_pcm_substream_chip(substream); |
733 | struct viadev *viadev = substream->runtime->private_data; | |
1da177e4 LT |
734 | unsigned char val; |
735 | ||
736 | if (chip->chip_type != TYPE_VIA686) | |
737 | val = VIA_REG_CTRL_INT; | |
738 | else | |
739 | val = 0; | |
740 | switch (cmd) { | |
741 | case SNDRV_PCM_TRIGGER_START: | |
41e4845c | 742 | case SNDRV_PCM_TRIGGER_RESUME: |
1da177e4 LT |
743 | val |= VIA_REG_CTRL_START; |
744 | viadev->running = 1; | |
745 | break; | |
746 | case SNDRV_PCM_TRIGGER_STOP: | |
41e4845c | 747 | case SNDRV_PCM_TRIGGER_SUSPEND: |
1da177e4 LT |
748 | val = VIA_REG_CTRL_TERMINATE; |
749 | viadev->running = 0; | |
750 | break; | |
751 | case SNDRV_PCM_TRIGGER_PAUSE_PUSH: | |
752 | val |= VIA_REG_CTRL_PAUSE; | |
753 | viadev->running = 0; | |
754 | break; | |
755 | case SNDRV_PCM_TRIGGER_PAUSE_RELEASE: | |
756 | viadev->running = 1; | |
757 | break; | |
758 | default: | |
759 | return -EINVAL; | |
760 | } | |
761 | outb(val, VIADEV_REG(viadev, OFFSET_CONTROL)); | |
762 | if (cmd == SNDRV_PCM_TRIGGER_STOP) | |
763 | snd_via82xx_channel_reset(chip, viadev); | |
764 | return 0; | |
765 | } | |
766 | ||
767 | ||
768 | /* | |
769 | * pointer callbacks | |
770 | */ | |
771 | ||
772 | /* | |
773 | * calculate the linear position at the given sg-buffer index and the rest count | |
774 | */ | |
775 | ||
776 | #define check_invalid_pos(viadev,pos) \ | |
e437e3d7 TI |
777 | ((pos) < viadev->lastpos && ((pos) >= viadev->bufsize2 ||\ |
778 | viadev->lastpos < viadev->bufsize2)) | |
1da177e4 | 779 | |
e437e3d7 TI |
780 | static inline unsigned int calc_linear_pos(struct viadev *viadev, unsigned int idx, |
781 | unsigned int count) | |
1da177e4 LT |
782 | { |
783 | unsigned int size, base, res; | |
784 | ||
785 | size = viadev->idx_table[idx].size; | |
786 | base = viadev->idx_table[idx].offset; | |
787 | res = base + size - count; | |
4f550df5 KW |
788 | if (res >= viadev->bufsize) |
789 | res -= viadev->bufsize; | |
1da177e4 LT |
790 | |
791 | /* check the validity of the calculated position */ | |
792 | if (size < count) { | |
e437e3d7 TI |
793 | snd_printd(KERN_ERR "invalid via82xx_cur_ptr (size = %d, count = %d)\n", |
794 | (int)size, (int)count); | |
1da177e4 LT |
795 | res = viadev->lastpos; |
796 | } else { | |
797 | if (! count) { | |
798 | /* Some mobos report count = 0 on the DMA boundary, | |
799 | * i.e. count = size indeed. | |
800 | * Let's check whether this step is above the expected size. | |
801 | */ | |
802 | int delta = res - viadev->lastpos; | |
803 | if (delta < 0) | |
804 | delta += viadev->bufsize; | |
805 | if ((unsigned int)delta > viadev->fragsize) | |
806 | res = base; | |
807 | } | |
808 | if (check_invalid_pos(viadev, res)) { | |
809 | #ifdef POINTER_DEBUG | |
e437e3d7 TI |
810 | printk(KERN_DEBUG "fail: idx = %i/%i, lastpos = 0x%x, " |
811 | "bufsize2 = 0x%x, offsize = 0x%x, size = 0x%x, " | |
812 | "count = 0x%x\n", idx, viadev->tbl_entries, | |
813 | viadev->lastpos, viadev->bufsize2, | |
814 | viadev->idx_table[idx].offset, | |
815 | viadev->idx_table[idx].size, count); | |
1da177e4 LT |
816 | #endif |
817 | /* count register returns full size when end of buffer is reached */ | |
818 | res = base + size; | |
819 | if (check_invalid_pos(viadev, res)) { | |
e437e3d7 TI |
820 | snd_printd(KERN_ERR "invalid via82xx_cur_ptr (2), " |
821 | "using last valid pointer\n"); | |
1da177e4 LT |
822 | res = viadev->lastpos; |
823 | } | |
824 | } | |
825 | } | |
1da177e4 LT |
826 | return res; |
827 | } | |
828 | ||
829 | /* | |
830 | * get the current pointer on via686 | |
831 | */ | |
e437e3d7 | 832 | static snd_pcm_uframes_t snd_via686_pcm_pointer(struct snd_pcm_substream *substream) |
1da177e4 | 833 | { |
e437e3d7 TI |
834 | struct via82xx *chip = snd_pcm_substream_chip(substream); |
835 | struct viadev *viadev = substream->runtime->private_data; | |
1da177e4 LT |
836 | unsigned int idx, ptr, count, res; |
837 | ||
da3cec35 TI |
838 | if (snd_BUG_ON(!viadev->tbl_entries)) |
839 | return 0; | |
1da177e4 LT |
840 | if (!(inb(VIADEV_REG(viadev, OFFSET_STATUS)) & VIA_REG_STAT_ACTIVE)) |
841 | return 0; | |
842 | ||
843 | spin_lock(&chip->reg_lock); | |
844 | count = inl(VIADEV_REG(viadev, OFFSET_CURR_COUNT)) & 0xffffff; | |
845 | /* The via686a does not have the current index register, | |
846 | * so we need to calculate the index from CURR_PTR. | |
847 | */ | |
848 | ptr = inl(VIADEV_REG(viadev, OFFSET_CURR_PTR)); | |
849 | if (ptr <= (unsigned int)viadev->table.addr) | |
850 | idx = 0; | |
851 | else /* CURR_PTR holds the address + 8 */ | |
852 | idx = ((ptr - (unsigned int)viadev->table.addr) / 8 - 1) % viadev->tbl_entries; | |
853 | res = calc_linear_pos(viadev, idx, count); | |
4f550df5 | 854 | viadev->lastpos = res; /* remember the last position */ |
1da177e4 LT |
855 | spin_unlock(&chip->reg_lock); |
856 | ||
857 | return bytes_to_frames(substream->runtime, res); | |
858 | } | |
859 | ||
860 | /* | |
861 | * get the current pointer on via823x | |
862 | */ | |
e437e3d7 | 863 | static snd_pcm_uframes_t snd_via8233_pcm_pointer(struct snd_pcm_substream *substream) |
1da177e4 | 864 | { |
e437e3d7 TI |
865 | struct via82xx *chip = snd_pcm_substream_chip(substream); |
866 | struct viadev *viadev = substream->runtime->private_data; | |
1da177e4 | 867 | unsigned int idx, count, res; |
4f550df5 | 868 | int status; |
1da177e4 | 869 | |
da3cec35 TI |
870 | if (snd_BUG_ON(!viadev->tbl_entries)) |
871 | return 0; | |
4f550df5 | 872 | |
1da177e4 | 873 | spin_lock(&chip->reg_lock); |
4f550df5 KW |
874 | count = inl(VIADEV_REG(viadev, OFFSET_CURR_COUNT)); |
875 | status = viadev->in_interrupt; | |
876 | if (!status) | |
877 | status = inb(VIADEV_REG(viadev, OFFSET_STATUS)); | |
878 | ||
c6cc0e3b BJ |
879 | /* An apparent bug in the 8251 is worked around by sending a |
880 | * REG_CTRL_START. */ | |
881 | if (chip->revision == VIA_REV_8251 && (status & VIA_REG_STAT_EOL)) | |
882 | snd_via82xx_pcm_trigger(substream, SNDRV_PCM_TRIGGER_START); | |
883 | ||
4f550df5 | 884 | if (!(status & VIA_REG_STAT_ACTIVE)) { |
c6cc0e3b BJ |
885 | res = 0; |
886 | goto unlock; | |
4f550df5 KW |
887 | } |
888 | if (count & 0xffffff) { | |
889 | idx = count >> 24; | |
890 | if (idx >= viadev->tbl_entries) { | |
1da177e4 | 891 | #ifdef POINTER_DEBUG |
e437e3d7 TI |
892 | printk(KERN_DEBUG "fail: invalid idx = %i/%i\n", idx, |
893 | viadev->tbl_entries); | |
1da177e4 | 894 | #endif |
4f550df5 KW |
895 | res = viadev->lastpos; |
896 | } else { | |
897 | count &= 0xffffff; | |
898 | res = calc_linear_pos(viadev, idx, count); | |
899 | } | |
1da177e4 | 900 | } else { |
4f550df5 KW |
901 | res = viadev->hwptr_done; |
902 | if (!viadev->in_interrupt) { | |
903 | if (status & VIA_REG_STAT_EOL) { | |
904 | res = 0; | |
905 | } else | |
906 | if (status & VIA_REG_STAT_FLAG) { | |
907 | res += viadev->fragsize; | |
908 | } | |
909 | } | |
910 | } | |
911 | unlock: | |
912 | viadev->lastpos = res; | |
1da177e4 LT |
913 | spin_unlock(&chip->reg_lock); |
914 | ||
915 | return bytes_to_frames(substream->runtime, res); | |
916 | } | |
917 | ||
918 | ||
919 | /* | |
920 | * hw_params callback: | |
921 | * allocate the buffer and build up the buffer description table | |
922 | */ | |
e437e3d7 TI |
923 | static int snd_via82xx_hw_params(struct snd_pcm_substream *substream, |
924 | struct snd_pcm_hw_params *hw_params) | |
1da177e4 | 925 | { |
e437e3d7 TI |
926 | struct via82xx *chip = snd_pcm_substream_chip(substream); |
927 | struct viadev *viadev = substream->runtime->private_data; | |
1da177e4 LT |
928 | int err; |
929 | ||
930 | err = snd_pcm_lib_malloc_pages(substream, params_buffer_bytes(hw_params)); | |
931 | if (err < 0) | |
932 | return err; | |
933 | err = build_via_table(viadev, substream, chip->pci, | |
934 | params_periods(hw_params), | |
935 | params_period_bytes(hw_params)); | |
936 | if (err < 0) | |
937 | return err; | |
938 | ||
939 | return 0; | |
940 | } | |
941 | ||
942 | /* | |
943 | * hw_free callback: | |
944 | * clean up the buffer description table and release the buffer | |
945 | */ | |
e437e3d7 | 946 | static int snd_via82xx_hw_free(struct snd_pcm_substream *substream) |
1da177e4 | 947 | { |
e437e3d7 TI |
948 | struct via82xx *chip = snd_pcm_substream_chip(substream); |
949 | struct viadev *viadev = substream->runtime->private_data; | |
1da177e4 LT |
950 | |
951 | clean_via_table(viadev, substream, chip->pci); | |
952 | snd_pcm_lib_free_pages(substream); | |
953 | return 0; | |
954 | } | |
955 | ||
956 | ||
957 | /* | |
958 | * set up the table pointer | |
959 | */ | |
e437e3d7 | 960 | static void snd_via82xx_set_table_ptr(struct via82xx *chip, struct viadev *viadev) |
1da177e4 LT |
961 | { |
962 | snd_via82xx_codec_ready(chip, 0); | |
963 | outl((u32)viadev->table.addr, VIADEV_REG(viadev, OFFSET_TABLE_PTR)); | |
964 | udelay(20); | |
965 | snd_via82xx_codec_ready(chip, 0); | |
966 | } | |
967 | ||
968 | /* | |
969 | * prepare callback for playback and capture on via686 | |
970 | */ | |
e437e3d7 TI |
971 | static void via686_setup_format(struct via82xx *chip, struct viadev *viadev, |
972 | struct snd_pcm_runtime *runtime) | |
1da177e4 LT |
973 | { |
974 | snd_via82xx_channel_reset(chip, viadev); | |
975 | /* this must be set after channel_reset */ | |
976 | snd_via82xx_set_table_ptr(chip, viadev); | |
977 | outb(VIA_REG_TYPE_AUTOSTART | | |
978 | (runtime->format == SNDRV_PCM_FORMAT_S16_LE ? VIA_REG_TYPE_16BIT : 0) | | |
979 | (runtime->channels > 1 ? VIA_REG_TYPE_STEREO : 0) | | |
980 | ((viadev->reg_offset & 0x10) == 0 ? VIA_REG_TYPE_INT_LSAMPLE : 0) | | |
981 | VIA_REG_TYPE_INT_EOL | | |
982 | VIA_REG_TYPE_INT_FLAG, VIADEV_REG(viadev, OFFSET_TYPE)); | |
983 | } | |
984 | ||
e437e3d7 | 985 | static int snd_via686_playback_prepare(struct snd_pcm_substream *substream) |
1da177e4 | 986 | { |
e437e3d7 TI |
987 | struct via82xx *chip = snd_pcm_substream_chip(substream); |
988 | struct viadev *viadev = substream->runtime->private_data; | |
989 | struct snd_pcm_runtime *runtime = substream->runtime; | |
1da177e4 LT |
990 | |
991 | snd_ac97_set_rate(chip->ac97, AC97_PCM_FRONT_DAC_RATE, runtime->rate); | |
992 | snd_ac97_set_rate(chip->ac97, AC97_SPDIF, runtime->rate); | |
993 | via686_setup_format(chip, viadev, runtime); | |
994 | return 0; | |
995 | } | |
996 | ||
e437e3d7 | 997 | static int snd_via686_capture_prepare(struct snd_pcm_substream *substream) |
1da177e4 | 998 | { |
e437e3d7 TI |
999 | struct via82xx *chip = snd_pcm_substream_chip(substream); |
1000 | struct viadev *viadev = substream->runtime->private_data; | |
1001 | struct snd_pcm_runtime *runtime = substream->runtime; | |
1da177e4 LT |
1002 | |
1003 | snd_ac97_set_rate(chip->ac97, AC97_PCM_LR_ADC_RATE, runtime->rate); | |
1004 | via686_setup_format(chip, viadev, runtime); | |
1005 | return 0; | |
1006 | } | |
1007 | ||
1008 | /* | |
1009 | * lock the current rate | |
1010 | */ | |
1011 | static int via_lock_rate(struct via_rate_lock *rec, int rate) | |
1012 | { | |
1013 | int changed = 0; | |
1014 | ||
1015 | spin_lock_irq(&rec->lock); | |
1016 | if (rec->rate != rate) { | |
1017 | if (rec->rate && rec->used > 1) /* already set */ | |
1018 | changed = -EINVAL; | |
1019 | else { | |
1020 | rec->rate = rate; | |
1021 | changed = 1; | |
1022 | } | |
1023 | } | |
1024 | spin_unlock_irq(&rec->lock); | |
1025 | return changed; | |
1026 | } | |
1027 | ||
1028 | /* | |
1029 | * prepare callback for DSX playback on via823x | |
1030 | */ | |
e437e3d7 | 1031 | static int snd_via8233_playback_prepare(struct snd_pcm_substream *substream) |
1da177e4 | 1032 | { |
e437e3d7 TI |
1033 | struct via82xx *chip = snd_pcm_substream_chip(substream); |
1034 | struct viadev *viadev = substream->runtime->private_data; | |
1035 | struct snd_pcm_runtime *runtime = substream->runtime; | |
2d7eb7cb | 1036 | int ac97_rate = chip->dxs_src ? 48000 : runtime->rate; |
1da177e4 LT |
1037 | int rate_changed; |
1038 | u32 rbits; | |
1039 | ||
2d7eb7cb | 1040 | if ((rate_changed = via_lock_rate(&chip->rates[0], ac97_rate)) < 0) |
1da177e4 | 1041 | return rate_changed; |
16d3f140 | 1042 | if (rate_changed) |
1da177e4 LT |
1043 | snd_ac97_set_rate(chip->ac97, AC97_PCM_FRONT_DAC_RATE, |
1044 | chip->no_vra ? 48000 : runtime->rate); | |
16d3f140 TI |
1045 | if (chip->spdif_on && viadev->reg_offset == 0x30) |
1046 | snd_ac97_set_rate(chip->ac97, AC97_SPDIF, runtime->rate); | |
1047 | ||
1da177e4 LT |
1048 | if (runtime->rate == 48000) |
1049 | rbits = 0xfffff; | |
1050 | else | |
e437e3d7 TI |
1051 | rbits = (0x100000 / 48000) * runtime->rate + |
1052 | ((0x100000 % 48000) * runtime->rate) / 48000; | |
da3cec35 | 1053 | snd_BUG_ON(rbits & ~0xfffff); |
1da177e4 LT |
1054 | snd_via82xx_channel_reset(chip, viadev); |
1055 | snd_via82xx_set_table_ptr(chip, viadev); | |
e437e3d7 TI |
1056 | outb(chip->playback_volume[viadev->reg_offset / 0x10][0], |
1057 | VIADEV_REG(viadev, OFS_PLAYBACK_VOLUME_L)); | |
1058 | outb(chip->playback_volume[viadev->reg_offset / 0x10][1], | |
1059 | VIADEV_REG(viadev, OFS_PLAYBACK_VOLUME_R)); | |
1da177e4 LT |
1060 | outl((runtime->format == SNDRV_PCM_FORMAT_S16_LE ? VIA8233_REG_TYPE_16BIT : 0) | /* format */ |
1061 | (runtime->channels > 1 ? VIA8233_REG_TYPE_STEREO : 0) | /* stereo */ | |
1062 | rbits | /* rate */ | |
1063 | 0xff000000, /* STOP index is never reached */ | |
1064 | VIADEV_REG(viadev, OFFSET_STOP_IDX)); | |
1065 | udelay(20); | |
1066 | snd_via82xx_codec_ready(chip, 0); | |
1067 | return 0; | |
1068 | } | |
1069 | ||
1070 | /* | |
1071 | * prepare callback for multi-channel playback on via823x | |
1072 | */ | |
e437e3d7 | 1073 | static int snd_via8233_multi_prepare(struct snd_pcm_substream *substream) |
1da177e4 | 1074 | { |
e437e3d7 TI |
1075 | struct via82xx *chip = snd_pcm_substream_chip(substream); |
1076 | struct viadev *viadev = substream->runtime->private_data; | |
1077 | struct snd_pcm_runtime *runtime = substream->runtime; | |
1da177e4 LT |
1078 | unsigned int slots; |
1079 | int fmt; | |
1080 | ||
1081 | if (via_lock_rate(&chip->rates[0], runtime->rate) < 0) | |
1082 | return -EINVAL; | |
1083 | snd_ac97_set_rate(chip->ac97, AC97_PCM_FRONT_DAC_RATE, runtime->rate); | |
1084 | snd_ac97_set_rate(chip->ac97, AC97_PCM_SURR_DAC_RATE, runtime->rate); | |
1085 | snd_ac97_set_rate(chip->ac97, AC97_PCM_LFE_DAC_RATE, runtime->rate); | |
1086 | snd_ac97_set_rate(chip->ac97, AC97_SPDIF, runtime->rate); | |
1087 | snd_via82xx_channel_reset(chip, viadev); | |
1088 | snd_via82xx_set_table_ptr(chip, viadev); | |
1089 | ||
e437e3d7 TI |
1090 | fmt = (runtime->format == SNDRV_PCM_FORMAT_S16_LE) ? |
1091 | VIA_REG_MULTPLAY_FMT_16BIT : VIA_REG_MULTPLAY_FMT_8BIT; | |
1da177e4 LT |
1092 | fmt |= runtime->channels << 4; |
1093 | outb(fmt, VIADEV_REG(viadev, OFS_MULTPLAY_FORMAT)); | |
1094 | #if 0 | |
1095 | if (chip->revision == VIA_REV_8233A) | |
1096 | slots = 0; | |
1097 | else | |
1098 | #endif | |
1099 | { | |
1100 | /* set sample number to slot 3, 4, 7, 8, 6, 9 (for VIA8233/C,8235) */ | |
1101 | /* corresponding to FL, FR, RL, RR, C, LFE ?? */ | |
1102 | switch (runtime->channels) { | |
1103 | case 1: slots = (1<<0) | (1<<4); break; | |
1104 | case 2: slots = (1<<0) | (2<<4); break; | |
1105 | case 3: slots = (1<<0) | (2<<4) | (5<<8); break; | |
1106 | case 4: slots = (1<<0) | (2<<4) | (3<<8) | (4<<12); break; | |
1107 | case 5: slots = (1<<0) | (2<<4) | (3<<8) | (4<<12) | (5<<16); break; | |
1108 | case 6: slots = (1<<0) | (2<<4) | (3<<8) | (4<<12) | (5<<16) | (6<<20); break; | |
1109 | default: slots = 0; break; | |
1110 | } | |
1111 | } | |
1112 | /* STOP index is never reached */ | |
1113 | outl(0xff000000 | slots, VIADEV_REG(viadev, OFFSET_STOP_IDX)); | |
1114 | udelay(20); | |
1115 | snd_via82xx_codec_ready(chip, 0); | |
1116 | return 0; | |
1117 | } | |
1118 | ||
1119 | /* | |
1120 | * prepare callback for capture on via823x | |
1121 | */ | |
e437e3d7 | 1122 | static int snd_via8233_capture_prepare(struct snd_pcm_substream *substream) |
1da177e4 | 1123 | { |
e437e3d7 TI |
1124 | struct via82xx *chip = snd_pcm_substream_chip(substream); |
1125 | struct viadev *viadev = substream->runtime->private_data; | |
1126 | struct snd_pcm_runtime *runtime = substream->runtime; | |
1da177e4 LT |
1127 | |
1128 | if (via_lock_rate(&chip->rates[1], runtime->rate) < 0) | |
1129 | return -EINVAL; | |
1130 | snd_ac97_set_rate(chip->ac97, AC97_PCM_LR_ADC_RATE, runtime->rate); | |
1131 | snd_via82xx_channel_reset(chip, viadev); | |
1132 | snd_via82xx_set_table_ptr(chip, viadev); | |
1133 | outb(VIA_REG_CAPTURE_FIFO_ENABLE, VIADEV_REG(viadev, OFS_CAPTURE_FIFO)); | |
1134 | outl((runtime->format == SNDRV_PCM_FORMAT_S16_LE ? VIA8233_REG_TYPE_16BIT : 0) | | |
1135 | (runtime->channels > 1 ? VIA8233_REG_TYPE_STEREO : 0) | | |
1136 | 0xff000000, /* STOP index is never reached */ | |
1137 | VIADEV_REG(viadev, OFFSET_STOP_IDX)); | |
1138 | udelay(20); | |
1139 | snd_via82xx_codec_ready(chip, 0); | |
1140 | return 0; | |
1141 | } | |
1142 | ||
1143 | ||
1144 | /* | |
1145 | * pcm hardware definition, identical for both playback and capture | |
1146 | */ | |
e437e3d7 | 1147 | static struct snd_pcm_hardware snd_via82xx_hw = |
1da177e4 LT |
1148 | { |
1149 | .info = (SNDRV_PCM_INFO_MMAP | SNDRV_PCM_INFO_INTERLEAVED | | |
1150 | SNDRV_PCM_INFO_BLOCK_TRANSFER | | |
1151 | SNDRV_PCM_INFO_MMAP_VALID | | |
41e4845c | 1152 | /* SNDRV_PCM_INFO_RESUME | */ |
1da177e4 LT |
1153 | SNDRV_PCM_INFO_PAUSE), |
1154 | .formats = SNDRV_PCM_FMTBIT_U8 | SNDRV_PCM_FMTBIT_S16_LE, | |
1155 | .rates = SNDRV_PCM_RATE_48000, | |
1156 | .rate_min = 48000, | |
1157 | .rate_max = 48000, | |
1158 | .channels_min = 1, | |
1159 | .channels_max = 2, | |
5503600a | 1160 | .buffer_bytes_max = VIA_MAX_BUFSIZE, |
1da177e4 | 1161 | .period_bytes_min = 32, |
5503600a | 1162 | .period_bytes_max = VIA_MAX_BUFSIZE / 2, |
1da177e4 LT |
1163 | .periods_min = 2, |
1164 | .periods_max = VIA_TABLE_SIZE / 2, | |
1165 | .fifo_size = 0, | |
1166 | }; | |
1167 | ||
1168 | ||
1169 | /* | |
1170 | * open callback skeleton | |
1171 | */ | |
e437e3d7 TI |
1172 | static int snd_via82xx_pcm_open(struct via82xx *chip, struct viadev *viadev, |
1173 | struct snd_pcm_substream *substream) | |
1da177e4 | 1174 | { |
e437e3d7 | 1175 | struct snd_pcm_runtime *runtime = substream->runtime; |
1da177e4 LT |
1176 | int err; |
1177 | struct via_rate_lock *ratep; | |
5495ffbd | 1178 | bool use_src = false; |
1da177e4 LT |
1179 | |
1180 | runtime->hw = snd_via82xx_hw; | |
1181 | ||
1182 | /* set the hw rate condition */ | |
1183 | ratep = &chip->rates[viadev->direction]; | |
1184 | spin_lock_irq(&ratep->lock); | |
1185 | ratep->used++; | |
1186 | if (chip->spdif_on && viadev->reg_offset == 0x30) { | |
1187 | /* DXS#3 and spdif is on */ | |
1188 | runtime->hw.rates = chip->ac97->rates[AC97_RATES_SPDIF]; | |
1189 | snd_pcm_limit_hw_rates(runtime); | |
1190 | } else if (chip->dxs_fixed && viadev->reg_offset < 0x40) { | |
1191 | /* fixed DXS playback rate */ | |
1192 | runtime->hw.rates = SNDRV_PCM_RATE_48000; | |
1193 | runtime->hw.rate_min = runtime->hw.rate_max = 48000; | |
2d7eb7cb SV |
1194 | } else if (chip->dxs_src && viadev->reg_offset < 0x40) { |
1195 | /* use full SRC capabilities of DXS */ | |
1196 | runtime->hw.rates = (SNDRV_PCM_RATE_CONTINUOUS | | |
1197 | SNDRV_PCM_RATE_8000_48000); | |
1198 | runtime->hw.rate_min = 8000; | |
1199 | runtime->hw.rate_max = 48000; | |
5495ffbd | 1200 | use_src = true; |
1da177e4 LT |
1201 | } else if (! ratep->rate) { |
1202 | int idx = viadev->direction ? AC97_RATES_ADC : AC97_RATES_FRONT_DAC; | |
1203 | runtime->hw.rates = chip->ac97->rates[idx]; | |
1204 | snd_pcm_limit_hw_rates(runtime); | |
1205 | } else { | |
1206 | /* a fixed rate */ | |
1207 | runtime->hw.rates = SNDRV_PCM_RATE_KNOT; | |
1208 | runtime->hw.rate_max = runtime->hw.rate_min = ratep->rate; | |
1209 | } | |
1210 | spin_unlock_irq(&ratep->lock); | |
1211 | ||
1212 | /* we may remove following constaint when we modify table entries | |
1213 | in interrupt */ | |
1214 | if ((err = snd_pcm_hw_constraint_integer(runtime, SNDRV_PCM_HW_PARAM_PERIODS)) < 0) | |
1215 | return err; | |
1216 | ||
5495ffbd CL |
1217 | if (use_src) { |
1218 | err = snd_pcm_hw_rule_noresample(runtime, 48000); | |
1219 | if (err < 0) | |
1220 | return err; | |
1221 | } | |
1222 | ||
1da177e4 LT |
1223 | runtime->private_data = viadev; |
1224 | viadev->substream = substream; | |
1225 | ||
1226 | return 0; | |
1227 | } | |
1228 | ||
1229 | ||
1230 | /* | |
3d009413 | 1231 | * open callback for playback on via686 |
1da177e4 | 1232 | */ |
3d009413 | 1233 | static int snd_via686_playback_open(struct snd_pcm_substream *substream) |
1da177e4 | 1234 | { |
e437e3d7 TI |
1235 | struct via82xx *chip = snd_pcm_substream_chip(substream); |
1236 | struct viadev *viadev = &chip->devs[chip->playback_devno + substream->number]; | |
1da177e4 LT |
1237 | int err; |
1238 | ||
1239 | if ((err = snd_via82xx_pcm_open(chip, viadev, substream)) < 0) | |
1240 | return err; | |
1241 | return 0; | |
1242 | } | |
1243 | ||
3d009413 CL |
1244 | /* |
1245 | * open callback for playback on via823x DXS | |
1246 | */ | |
1247 | static int snd_via8233_playback_open(struct snd_pcm_substream *substream) | |
1248 | { | |
1249 | struct via82xx *chip = snd_pcm_substream_chip(substream); | |
1250 | struct viadev *viadev; | |
1251 | unsigned int stream; | |
1252 | int err; | |
1253 | ||
1254 | viadev = &chip->devs[chip->playback_devno + substream->number]; | |
1255 | if ((err = snd_via82xx_pcm_open(chip, viadev, substream)) < 0) | |
1256 | return err; | |
1257 | stream = viadev->reg_offset / 0x10; | |
1258 | if (chip->dxs_controls[stream]) { | |
395c61d1 CL |
1259 | chip->playback_volume[stream][0] = |
1260 | VIA_DXS_MAX_VOLUME - (dxs_init_volume & 31); | |
1261 | chip->playback_volume[stream][1] = | |
1262 | VIA_DXS_MAX_VOLUME - (dxs_init_volume & 31); | |
3d009413 CL |
1263 | chip->dxs_controls[stream]->vd[0].access &= |
1264 | ~SNDRV_CTL_ELEM_ACCESS_INACTIVE; | |
1265 | snd_ctl_notify(chip->card, SNDRV_CTL_EVENT_MASK_VALUE | | |
1266 | SNDRV_CTL_EVENT_MASK_INFO, | |
1267 | &chip->dxs_controls[stream]->id); | |
1268 | } | |
1269 | return 0; | |
1270 | } | |
1271 | ||
1da177e4 LT |
1272 | /* |
1273 | * open callback for playback on via823x multi-channel | |
1274 | */ | |
e437e3d7 | 1275 | static int snd_via8233_multi_open(struct snd_pcm_substream *substream) |
1da177e4 | 1276 | { |
e437e3d7 TI |
1277 | struct via82xx *chip = snd_pcm_substream_chip(substream); |
1278 | struct viadev *viadev = &chip->devs[chip->multi_devno]; | |
1da177e4 LT |
1279 | int err; |
1280 | /* channels constraint for VIA8233A | |
1281 | * 3 and 5 channels are not supported | |
1282 | */ | |
1283 | static unsigned int channels[] = { | |
1284 | 1, 2, 4, 6 | |
1285 | }; | |
e437e3d7 | 1286 | static struct snd_pcm_hw_constraint_list hw_constraints_channels = { |
1da177e4 LT |
1287 | .count = ARRAY_SIZE(channels), |
1288 | .list = channels, | |
1289 | .mask = 0, | |
1290 | }; | |
1291 | ||
1292 | if ((err = snd_via82xx_pcm_open(chip, viadev, substream)) < 0) | |
1293 | return err; | |
1294 | substream->runtime->hw.channels_max = 6; | |
1295 | if (chip->revision == VIA_REV_8233A) | |
e437e3d7 TI |
1296 | snd_pcm_hw_constraint_list(substream->runtime, 0, |
1297 | SNDRV_PCM_HW_PARAM_CHANNELS, | |
1298 | &hw_constraints_channels); | |
1da177e4 LT |
1299 | return 0; |
1300 | } | |
1301 | ||
1302 | /* | |
1303 | * open callback for capture on via686 and via823x | |
1304 | */ | |
e437e3d7 | 1305 | static int snd_via82xx_capture_open(struct snd_pcm_substream *substream) |
1da177e4 | 1306 | { |
e437e3d7 TI |
1307 | struct via82xx *chip = snd_pcm_substream_chip(substream); |
1308 | struct viadev *viadev = &chip->devs[chip->capture_devno + substream->pcm->device]; | |
1da177e4 LT |
1309 | |
1310 | return snd_via82xx_pcm_open(chip, viadev, substream); | |
1311 | } | |
1312 | ||
1313 | /* | |
1314 | * close callback | |
1315 | */ | |
e437e3d7 | 1316 | static int snd_via82xx_pcm_close(struct snd_pcm_substream *substream) |
1da177e4 | 1317 | { |
e437e3d7 TI |
1318 | struct via82xx *chip = snd_pcm_substream_chip(substream); |
1319 | struct viadev *viadev = substream->runtime->private_data; | |
1da177e4 LT |
1320 | struct via_rate_lock *ratep; |
1321 | ||
1322 | /* release the rate lock */ | |
1323 | ratep = &chip->rates[viadev->direction]; | |
1324 | spin_lock_irq(&ratep->lock); | |
1325 | ratep->used--; | |
1326 | if (! ratep->used) | |
1327 | ratep->rate = 0; | |
1328 | spin_unlock_irq(&ratep->lock); | |
6dbe6628 TI |
1329 | if (! ratep->rate) { |
1330 | if (! viadev->direction) { | |
1331 | snd_ac97_update_power(chip->ac97, | |
1332 | AC97_PCM_FRONT_DAC_RATE, 0); | |
1333 | snd_ac97_update_power(chip->ac97, | |
1334 | AC97_PCM_SURR_DAC_RATE, 0); | |
1335 | snd_ac97_update_power(chip->ac97, | |
1336 | AC97_PCM_LFE_DAC_RATE, 0); | |
1337 | } else | |
1338 | snd_ac97_update_power(chip->ac97, | |
1339 | AC97_PCM_LR_ADC_RATE, 0); | |
1340 | } | |
1da177e4 LT |
1341 | viadev->substream = NULL; |
1342 | return 0; | |
1343 | } | |
1344 | ||
3d009413 CL |
1345 | static int snd_via8233_playback_close(struct snd_pcm_substream *substream) |
1346 | { | |
1347 | struct via82xx *chip = snd_pcm_substream_chip(substream); | |
1348 | struct viadev *viadev = substream->runtime->private_data; | |
1349 | unsigned int stream; | |
1350 | ||
1351 | stream = viadev->reg_offset / 0x10; | |
1352 | if (chip->dxs_controls[stream]) { | |
1353 | chip->dxs_controls[stream]->vd[0].access |= | |
1354 | SNDRV_CTL_ELEM_ACCESS_INACTIVE; | |
1355 | snd_ctl_notify(chip->card, SNDRV_CTL_EVENT_MASK_INFO, | |
1356 | &chip->dxs_controls[stream]->id); | |
1357 | } | |
1358 | return snd_via82xx_pcm_close(substream); | |
1359 | } | |
1360 | ||
1da177e4 LT |
1361 | |
1362 | /* via686 playback callbacks */ | |
e437e3d7 | 1363 | static struct snd_pcm_ops snd_via686_playback_ops = { |
3d009413 | 1364 | .open = snd_via686_playback_open, |
1da177e4 LT |
1365 | .close = snd_via82xx_pcm_close, |
1366 | .ioctl = snd_pcm_lib_ioctl, | |
1367 | .hw_params = snd_via82xx_hw_params, | |
1368 | .hw_free = snd_via82xx_hw_free, | |
1369 | .prepare = snd_via686_playback_prepare, | |
1370 | .trigger = snd_via82xx_pcm_trigger, | |
1371 | .pointer = snd_via686_pcm_pointer, | |
1372 | .page = snd_pcm_sgbuf_ops_page, | |
1373 | }; | |
1374 | ||
1375 | /* via686 capture callbacks */ | |
e437e3d7 | 1376 | static struct snd_pcm_ops snd_via686_capture_ops = { |
1da177e4 LT |
1377 | .open = snd_via82xx_capture_open, |
1378 | .close = snd_via82xx_pcm_close, | |
1379 | .ioctl = snd_pcm_lib_ioctl, | |
1380 | .hw_params = snd_via82xx_hw_params, | |
1381 | .hw_free = snd_via82xx_hw_free, | |
1382 | .prepare = snd_via686_capture_prepare, | |
1383 | .trigger = snd_via82xx_pcm_trigger, | |
1384 | .pointer = snd_via686_pcm_pointer, | |
1385 | .page = snd_pcm_sgbuf_ops_page, | |
1386 | }; | |
1387 | ||
1388 | /* via823x DSX playback callbacks */ | |
e437e3d7 | 1389 | static struct snd_pcm_ops snd_via8233_playback_ops = { |
3d009413 CL |
1390 | .open = snd_via8233_playback_open, |
1391 | .close = snd_via8233_playback_close, | |
1da177e4 LT |
1392 | .ioctl = snd_pcm_lib_ioctl, |
1393 | .hw_params = snd_via82xx_hw_params, | |
1394 | .hw_free = snd_via82xx_hw_free, | |
1395 | .prepare = snd_via8233_playback_prepare, | |
1396 | .trigger = snd_via82xx_pcm_trigger, | |
1397 | .pointer = snd_via8233_pcm_pointer, | |
1398 | .page = snd_pcm_sgbuf_ops_page, | |
1399 | }; | |
1400 | ||
1401 | /* via823x multi-channel playback callbacks */ | |
e437e3d7 | 1402 | static struct snd_pcm_ops snd_via8233_multi_ops = { |
1da177e4 LT |
1403 | .open = snd_via8233_multi_open, |
1404 | .close = snd_via82xx_pcm_close, | |
1405 | .ioctl = snd_pcm_lib_ioctl, | |
1406 | .hw_params = snd_via82xx_hw_params, | |
1407 | .hw_free = snd_via82xx_hw_free, | |
1408 | .prepare = snd_via8233_multi_prepare, | |
1409 | .trigger = snd_via82xx_pcm_trigger, | |
1410 | .pointer = snd_via8233_pcm_pointer, | |
1411 | .page = snd_pcm_sgbuf_ops_page, | |
1412 | }; | |
1413 | ||
1414 | /* via823x capture callbacks */ | |
e437e3d7 | 1415 | static struct snd_pcm_ops snd_via8233_capture_ops = { |
1da177e4 LT |
1416 | .open = snd_via82xx_capture_open, |
1417 | .close = snd_via82xx_pcm_close, | |
1418 | .ioctl = snd_pcm_lib_ioctl, | |
1419 | .hw_params = snd_via82xx_hw_params, | |
1420 | .hw_free = snd_via82xx_hw_free, | |
1421 | .prepare = snd_via8233_capture_prepare, | |
1422 | .trigger = snd_via82xx_pcm_trigger, | |
1423 | .pointer = snd_via8233_pcm_pointer, | |
1424 | .page = snd_pcm_sgbuf_ops_page, | |
1425 | }; | |
1426 | ||
1427 | ||
e437e3d7 TI |
1428 | static void init_viadev(struct via82xx *chip, int idx, unsigned int reg_offset, |
1429 | int shadow_pos, int direction) | |
1da177e4 LT |
1430 | { |
1431 | chip->devs[idx].reg_offset = reg_offset; | |
4f550df5 | 1432 | chip->devs[idx].shadow_shift = shadow_pos * 4; |
1da177e4 LT |
1433 | chip->devs[idx].direction = direction; |
1434 | chip->devs[idx].port = chip->port + reg_offset; | |
1435 | } | |
1436 | ||
1437 | /* | |
1438 | * create pcm instances for VIA8233, 8233C and 8235 (not 8233A) | |
1439 | */ | |
e437e3d7 | 1440 | static int __devinit snd_via8233_pcm_new(struct via82xx *chip) |
1da177e4 | 1441 | { |
e437e3d7 | 1442 | struct snd_pcm *pcm; |
e36e3b86 | 1443 | struct snd_pcm_chmap *chmap; |
1da177e4 LT |
1444 | int i, err; |
1445 | ||
1446 | chip->playback_devno = 0; /* x 4 */ | |
1447 | chip->multi_devno = 4; /* x 1 */ | |
1448 | chip->capture_devno = 5; /* x 2 */ | |
1449 | chip->num_devs = 7; | |
1450 | chip->intr_mask = 0x33033333; /* FLAG|EOL for rec0-1, mc, sdx0-3 */ | |
1451 | ||
1452 | /* PCM #0: 4 DSX playbacks and 1 capture */ | |
1453 | err = snd_pcm_new(chip->card, chip->card->shortname, 0, 4, 1, &pcm); | |
1454 | if (err < 0) | |
1455 | return err; | |
1456 | snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, &snd_via8233_playback_ops); | |
1457 | snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_CAPTURE, &snd_via8233_capture_ops); | |
1458 | pcm->private_data = chip; | |
1459 | strcpy(pcm->name, chip->card->shortname); | |
1460 | chip->pcms[0] = pcm; | |
1461 | /* set up playbacks */ | |
1462 | for (i = 0; i < 4; i++) | |
4f550df5 | 1463 | init_viadev(chip, i, 0x10 * i, i, 0); |
1da177e4 | 1464 | /* capture */ |
4f550df5 | 1465 | init_viadev(chip, chip->capture_devno, VIA_REG_CAPTURE_8233_STATUS, 6, 1); |
1da177e4 | 1466 | |
a2e3961d TI |
1467 | snd_pcm_lib_preallocate_pages_for_all(pcm, SNDRV_DMA_TYPE_DEV_SG, |
1468 | snd_dma_pci_data(chip->pci), | |
5503600a | 1469 | 64*1024, VIA_MAX_BUFSIZE); |
1da177e4 | 1470 | |
e36e3b86 TI |
1471 | err = snd_pcm_add_chmap_ctls(pcm, SNDRV_PCM_STREAM_PLAYBACK, |
1472 | snd_pcm_std_chmaps, 2, 0, | |
1473 | &chmap); | |
1474 | if (err < 0) | |
1475 | return err; | |
1476 | ||
1da177e4 LT |
1477 | /* PCM #1: multi-channel playback and 2nd capture */ |
1478 | err = snd_pcm_new(chip->card, chip->card->shortname, 1, 1, 1, &pcm); | |
1479 | if (err < 0) | |
1480 | return err; | |
1481 | snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, &snd_via8233_multi_ops); | |
1482 | snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_CAPTURE, &snd_via8233_capture_ops); | |
1483 | pcm->private_data = chip; | |
1484 | strcpy(pcm->name, chip->card->shortname); | |
1485 | chip->pcms[1] = pcm; | |
1486 | /* set up playback */ | |
4f550df5 | 1487 | init_viadev(chip, chip->multi_devno, VIA_REG_MULTPLAY_STATUS, 4, 0); |
1da177e4 | 1488 | /* set up capture */ |
4f550df5 | 1489 | init_viadev(chip, chip->capture_devno + 1, VIA_REG_CAPTURE_8233_STATUS + 0x10, 7, 1); |
1da177e4 | 1490 | |
a2e3961d TI |
1491 | snd_pcm_lib_preallocate_pages_for_all(pcm, SNDRV_DMA_TYPE_DEV_SG, |
1492 | snd_dma_pci_data(chip->pci), | |
5503600a | 1493 | 64*1024, VIA_MAX_BUFSIZE); |
e36e3b86 TI |
1494 | |
1495 | err = snd_pcm_add_chmap_ctls(pcm, SNDRV_PCM_STREAM_PLAYBACK, | |
1496 | snd_pcm_alt_chmaps, 6, 0, | |
1497 | &chmap); | |
1498 | if (err < 0) | |
1499 | return err; | |
1500 | chip->ac97->chmaps[SNDRV_PCM_STREAM_PLAYBACK] = chmap; | |
1501 | ||
1da177e4 LT |
1502 | return 0; |
1503 | } | |
1504 | ||
1505 | /* | |
1506 | * create pcm instances for VIA8233A | |
1507 | */ | |
e437e3d7 | 1508 | static int __devinit snd_via8233a_pcm_new(struct via82xx *chip) |
1da177e4 | 1509 | { |
e437e3d7 | 1510 | struct snd_pcm *pcm; |
e36e3b86 | 1511 | struct snd_pcm_chmap *chmap; |
1da177e4 LT |
1512 | int err; |
1513 | ||
1514 | chip->multi_devno = 0; | |
1515 | chip->playback_devno = 1; | |
1516 | chip->capture_devno = 2; | |
1517 | chip->num_devs = 3; | |
1518 | chip->intr_mask = 0x03033000; /* FLAG|EOL for rec0, mc, sdx3 */ | |
1519 | ||
1520 | /* PCM #0: multi-channel playback and capture */ | |
1521 | err = snd_pcm_new(chip->card, chip->card->shortname, 0, 1, 1, &pcm); | |
1522 | if (err < 0) | |
1523 | return err; | |
1524 | snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, &snd_via8233_multi_ops); | |
1525 | snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_CAPTURE, &snd_via8233_capture_ops); | |
1526 | pcm->private_data = chip; | |
1527 | strcpy(pcm->name, chip->card->shortname); | |
1528 | chip->pcms[0] = pcm; | |
1529 | /* set up playback */ | |
4f550df5 | 1530 | init_viadev(chip, chip->multi_devno, VIA_REG_MULTPLAY_STATUS, 4, 0); |
1da177e4 | 1531 | /* capture */ |
4f550df5 | 1532 | init_viadev(chip, chip->capture_devno, VIA_REG_CAPTURE_8233_STATUS, 6, 1); |
1da177e4 | 1533 | |
a2e3961d TI |
1534 | snd_pcm_lib_preallocate_pages_for_all(pcm, SNDRV_DMA_TYPE_DEV_SG, |
1535 | snd_dma_pci_data(chip->pci), | |
5503600a | 1536 | 64*1024, VIA_MAX_BUFSIZE); |
1da177e4 | 1537 | |
e36e3b86 TI |
1538 | err = snd_pcm_add_chmap_ctls(pcm, SNDRV_PCM_STREAM_PLAYBACK, |
1539 | snd_pcm_alt_chmaps, 6, 0, | |
1540 | &chmap); | |
1541 | if (err < 0) | |
1542 | return err; | |
1543 | chip->ac97->chmaps[SNDRV_PCM_STREAM_PLAYBACK] = chmap; | |
1544 | ||
1da177e4 LT |
1545 | /* SPDIF supported? */ |
1546 | if (! ac97_can_spdif(chip->ac97)) | |
1547 | return 0; | |
1548 | ||
1549 | /* PCM #1: DXS3 playback (for spdif) */ | |
1550 | err = snd_pcm_new(chip->card, chip->card->shortname, 1, 1, 0, &pcm); | |
1551 | if (err < 0) | |
1552 | return err; | |
1553 | snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, &snd_via8233_playback_ops); | |
1554 | pcm->private_data = chip; | |
1555 | strcpy(pcm->name, chip->card->shortname); | |
1556 | chip->pcms[1] = pcm; | |
1557 | /* set up playback */ | |
4f550df5 | 1558 | init_viadev(chip, chip->playback_devno, 0x30, 3, 0); |
1da177e4 | 1559 | |
a2e3961d TI |
1560 | snd_pcm_lib_preallocate_pages_for_all(pcm, SNDRV_DMA_TYPE_DEV_SG, |
1561 | snd_dma_pci_data(chip->pci), | |
5503600a | 1562 | 64*1024, VIA_MAX_BUFSIZE); |
1da177e4 LT |
1563 | return 0; |
1564 | } | |
1565 | ||
1566 | /* | |
1567 | * create a pcm instance for via686a/b | |
1568 | */ | |
e437e3d7 | 1569 | static int __devinit snd_via686_pcm_new(struct via82xx *chip) |
1da177e4 | 1570 | { |
e437e3d7 | 1571 | struct snd_pcm *pcm; |
1da177e4 LT |
1572 | int err; |
1573 | ||
1574 | chip->playback_devno = 0; | |
1575 | chip->capture_devno = 1; | |
1576 | chip->num_devs = 2; | |
1577 | chip->intr_mask = 0x77; /* FLAG | EOL for PB, CP, FM */ | |
1578 | ||
1579 | err = snd_pcm_new(chip->card, chip->card->shortname, 0, 1, 1, &pcm); | |
1580 | if (err < 0) | |
1581 | return err; | |
1582 | snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, &snd_via686_playback_ops); | |
1583 | snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_CAPTURE, &snd_via686_capture_ops); | |
1584 | pcm->private_data = chip; | |
1585 | strcpy(pcm->name, chip->card->shortname); | |
1586 | chip->pcms[0] = pcm; | |
4f550df5 KW |
1587 | init_viadev(chip, 0, VIA_REG_PLAYBACK_STATUS, 0, 0); |
1588 | init_viadev(chip, 1, VIA_REG_CAPTURE_STATUS, 0, 1); | |
1da177e4 | 1589 | |
a2e3961d TI |
1590 | snd_pcm_lib_preallocate_pages_for_all(pcm, SNDRV_DMA_TYPE_DEV_SG, |
1591 | snd_dma_pci_data(chip->pci), | |
5503600a | 1592 | 64*1024, VIA_MAX_BUFSIZE); |
1da177e4 LT |
1593 | return 0; |
1594 | } | |
1595 | ||
1596 | ||
1597 | /* | |
1598 | * Mixer part | |
1599 | */ | |
1600 | ||
e437e3d7 TI |
1601 | static int snd_via8233_capture_source_info(struct snd_kcontrol *kcontrol, |
1602 | struct snd_ctl_elem_info *uinfo) | |
1da177e4 LT |
1603 | { |
1604 | /* formerly they were "Line" and "Mic", but it looks like that they | |
1605 | * have nothing to do with the actual physical connections... | |
1606 | */ | |
1607 | static char *texts[2] = { | |
1608 | "Input1", "Input2" | |
1609 | }; | |
1610 | uinfo->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED; | |
1611 | uinfo->count = 1; | |
1612 | uinfo->value.enumerated.items = 2; | |
1613 | if (uinfo->value.enumerated.item >= 2) | |
1614 | uinfo->value.enumerated.item = 1; | |
1615 | strcpy(uinfo->value.enumerated.name, texts[uinfo->value.enumerated.item]); | |
1616 | return 0; | |
1617 | } | |
1618 | ||
e437e3d7 TI |
1619 | static int snd_via8233_capture_source_get(struct snd_kcontrol *kcontrol, |
1620 | struct snd_ctl_elem_value *ucontrol) | |
1da177e4 | 1621 | { |
e437e3d7 | 1622 | struct via82xx *chip = snd_kcontrol_chip(kcontrol); |
1da177e4 LT |
1623 | unsigned long port = chip->port + (kcontrol->id.index ? (VIA_REG_CAPTURE_CHANNEL + 0x10) : VIA_REG_CAPTURE_CHANNEL); |
1624 | ucontrol->value.enumerated.item[0] = inb(port) & VIA_REG_CAPTURE_CHANNEL_MIC ? 1 : 0; | |
1625 | return 0; | |
1626 | } | |
1627 | ||
e437e3d7 TI |
1628 | static int snd_via8233_capture_source_put(struct snd_kcontrol *kcontrol, |
1629 | struct snd_ctl_elem_value *ucontrol) | |
1da177e4 | 1630 | { |
e437e3d7 | 1631 | struct via82xx *chip = snd_kcontrol_chip(kcontrol); |
1da177e4 LT |
1632 | unsigned long port = chip->port + (kcontrol->id.index ? (VIA_REG_CAPTURE_CHANNEL + 0x10) : VIA_REG_CAPTURE_CHANNEL); |
1633 | u8 val, oval; | |
1634 | ||
1635 | spin_lock_irq(&chip->reg_lock); | |
1636 | oval = inb(port); | |
1637 | val = oval & ~VIA_REG_CAPTURE_CHANNEL_MIC; | |
1638 | if (ucontrol->value.enumerated.item[0]) | |
1639 | val |= VIA_REG_CAPTURE_CHANNEL_MIC; | |
1640 | if (val != oval) | |
1641 | outb(val, port); | |
1642 | spin_unlock_irq(&chip->reg_lock); | |
1643 | return val != oval; | |
1644 | } | |
1645 | ||
e437e3d7 | 1646 | static struct snd_kcontrol_new snd_via8233_capture_source __devinitdata = { |
1da177e4 LT |
1647 | .name = "Input Source Select", |
1648 | .iface = SNDRV_CTL_ELEM_IFACE_MIXER, | |
1649 | .info = snd_via8233_capture_source_info, | |
1650 | .get = snd_via8233_capture_source_get, | |
1651 | .put = snd_via8233_capture_source_put, | |
1652 | }; | |
1653 | ||
a5ce8890 | 1654 | #define snd_via8233_dxs3_spdif_info snd_ctl_boolean_mono_info |
1da177e4 | 1655 | |
e437e3d7 TI |
1656 | static int snd_via8233_dxs3_spdif_get(struct snd_kcontrol *kcontrol, |
1657 | struct snd_ctl_elem_value *ucontrol) | |
1da177e4 | 1658 | { |
e437e3d7 | 1659 | struct via82xx *chip = snd_kcontrol_chip(kcontrol); |
1da177e4 LT |
1660 | u8 val; |
1661 | ||
1662 | pci_read_config_byte(chip->pci, VIA8233_SPDIF_CTRL, &val); | |
1663 | ucontrol->value.integer.value[0] = (val & VIA8233_SPDIF_DX3) ? 1 : 0; | |
1664 | return 0; | |
1665 | } | |
1666 | ||
e437e3d7 TI |
1667 | static int snd_via8233_dxs3_spdif_put(struct snd_kcontrol *kcontrol, |
1668 | struct snd_ctl_elem_value *ucontrol) | |
1da177e4 | 1669 | { |
e437e3d7 | 1670 | struct via82xx *chip = snd_kcontrol_chip(kcontrol); |
1da177e4 LT |
1671 | u8 val, oval; |
1672 | ||
1673 | pci_read_config_byte(chip->pci, VIA8233_SPDIF_CTRL, &oval); | |
1674 | val = oval & ~VIA8233_SPDIF_DX3; | |
1675 | if (ucontrol->value.integer.value[0]) | |
1676 | val |= VIA8233_SPDIF_DX3; | |
1677 | /* save the spdif flag for rate filtering */ | |
1678 | chip->spdif_on = ucontrol->value.integer.value[0] ? 1 : 0; | |
1679 | if (val != oval) { | |
1680 | pci_write_config_byte(chip->pci, VIA8233_SPDIF_CTRL, val); | |
1681 | return 1; | |
1682 | } | |
1683 | return 0; | |
1684 | } | |
1685 | ||
e437e3d7 | 1686 | static struct snd_kcontrol_new snd_via8233_dxs3_spdif_control __devinitdata = { |
10e8d78a | 1687 | .name = SNDRV_CTL_NAME_IEC958("Output ",NONE,SWITCH), |
1da177e4 LT |
1688 | .iface = SNDRV_CTL_ELEM_IFACE_MIXER, |
1689 | .info = snd_via8233_dxs3_spdif_info, | |
1690 | .get = snd_via8233_dxs3_spdif_get, | |
1691 | .put = snd_via8233_dxs3_spdif_put, | |
1692 | }; | |
1693 | ||
e437e3d7 TI |
1694 | static int snd_via8233_dxs_volume_info(struct snd_kcontrol *kcontrol, |
1695 | struct snd_ctl_elem_info *uinfo) | |
1da177e4 LT |
1696 | { |
1697 | uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER; | |
1698 | uinfo->count = 2; | |
1699 | uinfo->value.integer.min = 0; | |
1700 | uinfo->value.integer.max = VIA_DXS_MAX_VOLUME; | |
1701 | return 0; | |
1702 | } | |
1703 | ||
e437e3d7 TI |
1704 | static int snd_via8233_dxs_volume_get(struct snd_kcontrol *kcontrol, |
1705 | struct snd_ctl_elem_value *ucontrol) | |
1da177e4 | 1706 | { |
e437e3d7 | 1707 | struct via82xx *chip = snd_kcontrol_chip(kcontrol); |
2fb930b5 | 1708 | unsigned int idx = kcontrol->id.subdevice; |
00f226d4 HM |
1709 | |
1710 | ucontrol->value.integer.value[0] = VIA_DXS_MAX_VOLUME - chip->playback_volume[idx][0]; | |
1711 | ucontrol->value.integer.value[1] = VIA_DXS_MAX_VOLUME - chip->playback_volume[idx][1]; | |
1712 | return 0; | |
1713 | } | |
1714 | ||
e437e3d7 TI |
1715 | static int snd_via8233_pcmdxs_volume_get(struct snd_kcontrol *kcontrol, |
1716 | struct snd_ctl_elem_value *ucontrol) | |
00f226d4 | 1717 | { |
e437e3d7 | 1718 | struct via82xx *chip = snd_kcontrol_chip(kcontrol); |
00f226d4 HM |
1719 | ucontrol->value.integer.value[0] = VIA_DXS_MAX_VOLUME - chip->playback_volume_c[0]; |
1720 | ucontrol->value.integer.value[1] = VIA_DXS_MAX_VOLUME - chip->playback_volume_c[1]; | |
1da177e4 LT |
1721 | return 0; |
1722 | } | |
1723 | ||
e437e3d7 TI |
1724 | static int snd_via8233_dxs_volume_put(struct snd_kcontrol *kcontrol, |
1725 | struct snd_ctl_elem_value *ucontrol) | |
00f226d4 | 1726 | { |
e437e3d7 | 1727 | struct via82xx *chip = snd_kcontrol_chip(kcontrol); |
2fb930b5 | 1728 | unsigned int idx = kcontrol->id.subdevice; |
00f226d4 HM |
1729 | unsigned long port = chip->port + 0x10 * idx; |
1730 | unsigned char val; | |
1731 | int i, change = 0; | |
1732 | ||
1733 | for (i = 0; i < 2; i++) { | |
1734 | val = ucontrol->value.integer.value[i]; | |
1735 | if (val > VIA_DXS_MAX_VOLUME) | |
1736 | val = VIA_DXS_MAX_VOLUME; | |
1737 | val = VIA_DXS_MAX_VOLUME - val; | |
1738 | change |= val != chip->playback_volume[idx][i]; | |
1739 | if (change) { | |
1740 | chip->playback_volume[idx][i] = val; | |
1741 | outb(val, port + VIA_REG_OFS_PLAYBACK_VOLUME_L + i); | |
1742 | } | |
1743 | } | |
1744 | return change; | |
1745 | } | |
1746 | ||
e437e3d7 TI |
1747 | static int snd_via8233_pcmdxs_volume_put(struct snd_kcontrol *kcontrol, |
1748 | struct snd_ctl_elem_value *ucontrol) | |
1da177e4 | 1749 | { |
e437e3d7 | 1750 | struct via82xx *chip = snd_kcontrol_chip(kcontrol); |
1da177e4 LT |
1751 | unsigned int idx; |
1752 | unsigned char val; | |
1753 | int i, change = 0; | |
1754 | ||
1755 | for (i = 0; i < 2; i++) { | |
1756 | val = ucontrol->value.integer.value[i]; | |
1757 | if (val > VIA_DXS_MAX_VOLUME) | |
1758 | val = VIA_DXS_MAX_VOLUME; | |
1759 | val = VIA_DXS_MAX_VOLUME - val; | |
00f226d4 | 1760 | if (val != chip->playback_volume_c[i]) { |
1da177e4 | 1761 | change = 1; |
00f226d4 | 1762 | chip->playback_volume_c[i] = val; |
1da177e4 LT |
1763 | for (idx = 0; idx < 4; idx++) { |
1764 | unsigned long port = chip->port + 0x10 * idx; | |
00f226d4 | 1765 | chip->playback_volume[idx][i] = val; |
1da177e4 LT |
1766 | outb(val, port + VIA_REG_OFS_PLAYBACK_VOLUME_L + i); |
1767 | } | |
1768 | } | |
1769 | } | |
1770 | return change; | |
1771 | } | |
1772 | ||
b452e08e | 1773 | static const DECLARE_TLV_DB_SCALE(db_scale_dxs, -4650, 150, 1); |
7058c042 | 1774 | |
e437e3d7 | 1775 | static struct snd_kcontrol_new snd_via8233_pcmdxs_volume_control __devinitdata = { |
1da177e4 LT |
1776 | .name = "PCM Playback Volume", |
1777 | .iface = SNDRV_CTL_ELEM_IFACE_MIXER, | |
7058c042 TI |
1778 | .access = (SNDRV_CTL_ELEM_ACCESS_READWRITE | |
1779 | SNDRV_CTL_ELEM_ACCESS_TLV_READ), | |
1da177e4 | 1780 | .info = snd_via8233_dxs_volume_info, |
00f226d4 HM |
1781 | .get = snd_via8233_pcmdxs_volume_get, |
1782 | .put = snd_via8233_pcmdxs_volume_put, | |
7058c042 | 1783 | .tlv = { .p = db_scale_dxs } |
00f226d4 HM |
1784 | }; |
1785 | ||
e437e3d7 | 1786 | static struct snd_kcontrol_new snd_via8233_dxs_volume_control __devinitdata = { |
2fb930b5 CL |
1787 | .iface = SNDRV_CTL_ELEM_IFACE_PCM, |
1788 | .device = 0, | |
1789 | /* .subdevice set later */ | |
1790 | .name = "PCM Playback Volume", | |
3d009413 CL |
1791 | .access = SNDRV_CTL_ELEM_ACCESS_READWRITE | |
1792 | SNDRV_CTL_ELEM_ACCESS_TLV_READ | | |
1793 | SNDRV_CTL_ELEM_ACCESS_INACTIVE, | |
00f226d4 | 1794 | .info = snd_via8233_dxs_volume_info, |
1da177e4 LT |
1795 | .get = snd_via8233_dxs_volume_get, |
1796 | .put = snd_via8233_dxs_volume_put, | |
7058c042 | 1797 | .tlv = { .p = db_scale_dxs } |
1da177e4 LT |
1798 | }; |
1799 | ||
1800 | /* | |
1801 | */ | |
1802 | ||
e437e3d7 | 1803 | static void snd_via82xx_mixer_free_ac97_bus(struct snd_ac97_bus *bus) |
1da177e4 | 1804 | { |
e437e3d7 | 1805 | struct via82xx *chip = bus->private_data; |
1da177e4 LT |
1806 | chip->ac97_bus = NULL; |
1807 | } | |
1808 | ||
e437e3d7 | 1809 | static void snd_via82xx_mixer_free_ac97(struct snd_ac97 *ac97) |
1da177e4 | 1810 | { |
e437e3d7 | 1811 | struct via82xx *chip = ac97->private_data; |
1da177e4 LT |
1812 | chip->ac97 = NULL; |
1813 | } | |
1814 | ||
1815 | static struct ac97_quirk ac97_quirks[] = { | |
1816 | { | |
69ad07cf JK |
1817 | .subvendor = 0x1106, |
1818 | .subdevice = 0x4161, | |
1da177e4 LT |
1819 | .codec_id = 0x56494161, /* VT1612A */ |
1820 | .name = "Soltek SL-75DRV5", | |
1821 | .type = AC97_TUNE_NONE | |
1822 | }, | |
1823 | { /* FIXME: which codec? */ | |
69ad07cf JK |
1824 | .subvendor = 0x1106, |
1825 | .subdevice = 0x4161, | |
1da177e4 LT |
1826 | .name = "ASRock K7VT2", |
1827 | .type = AC97_TUNE_HP_ONLY | |
1828 | }, | |
bf30a430 CL |
1829 | { |
1830 | .subvendor = 0x110a, | |
1831 | .subdevice = 0x0079, | |
1832 | .name = "Fujitsu Siemens D1289", | |
1833 | .type = AC97_TUNE_HP_ONLY | |
1834 | }, | |
1da177e4 | 1835 | { |
69ad07cf JK |
1836 | .subvendor = 0x1019, |
1837 | .subdevice = 0x0a81, | |
1da177e4 LT |
1838 | .name = "ECS K7VTA3", |
1839 | .type = AC97_TUNE_HP_ONLY | |
1840 | }, | |
1841 | { | |
69ad07cf JK |
1842 | .subvendor = 0x1019, |
1843 | .subdevice = 0x0a85, | |
1da177e4 LT |
1844 | .name = "ECS L7VMM2", |
1845 | .type = AC97_TUNE_HP_ONLY | |
1846 | }, | |
942fd1eb WS |
1847 | { |
1848 | .subvendor = 0x1019, | |
1849 | .subdevice = 0x1841, | |
1850 | .name = "ECS K7VTA3", | |
1851 | .type = AC97_TUNE_HP_ONLY | |
1852 | }, | |
1da177e4 | 1853 | { |
69ad07cf JK |
1854 | .subvendor = 0x1849, |
1855 | .subdevice = 0x3059, | |
1da177e4 LT |
1856 | .name = "ASRock K7VM2", |
1857 | .type = AC97_TUNE_HP_ONLY /* VT1616 */ | |
1858 | }, | |
1859 | { | |
69ad07cf JK |
1860 | .subvendor = 0x14cd, |
1861 | .subdevice = 0x7002, | |
1da177e4 LT |
1862 | .name = "Unknown", |
1863 | .type = AC97_TUNE_ALC_JACK | |
1864 | }, | |
1865 | { | |
69ad07cf JK |
1866 | .subvendor = 0x1071, |
1867 | .subdevice = 0x8590, | |
1da177e4 LT |
1868 | .name = "Mitac Mobo", |
1869 | .type = AC97_TUNE_ALC_JACK | |
1870 | }, | |
1871 | { | |
69ad07cf JK |
1872 | .subvendor = 0x161f, |
1873 | .subdevice = 0x202b, | |
1da177e4 LT |
1874 | .name = "Arima Notebook", |
1875 | .type = AC97_TUNE_HP_ONLY, | |
1876 | }, | |
dac8dddd TI |
1877 | { |
1878 | .subvendor = 0x161f, | |
1879 | .subdevice = 0x2032, | |
1880 | .name = "Targa Traveller 811", | |
1881 | .type = AC97_TUNE_HP_ONLY, | |
1882 | }, | |
d4199f01 DC |
1883 | { |
1884 | .subvendor = 0x161f, | |
1885 | .subdevice = 0x2032, | |
1886 | .name = "m680x", | |
1887 | .type = AC97_TUNE_HP_ONLY, /* http://launchpad.net/bugs/38546 */ | |
1888 | }, | |
9674513d TI |
1889 | { |
1890 | .subvendor = 0x1297, | |
1891 | .subdevice = 0xa232, | |
1892 | .name = "Shuttle AK32VN", | |
1893 | .type = AC97_TUNE_HP_ONLY | |
1894 | }, | |
1da177e4 LT |
1895 | { } /* terminator */ |
1896 | }; | |
1897 | ||
e437e3d7 | 1898 | static int __devinit snd_via82xx_mixer_new(struct via82xx *chip, const char *quirk_override) |
1da177e4 | 1899 | { |
e437e3d7 | 1900 | struct snd_ac97_template ac97; |
1da177e4 | 1901 | int err; |
e437e3d7 | 1902 | static struct snd_ac97_bus_ops ops = { |
1da177e4 LT |
1903 | .write = snd_via82xx_codec_write, |
1904 | .read = snd_via82xx_codec_read, | |
1905 | .wait = snd_via82xx_codec_wait, | |
1906 | }; | |
1907 | ||
1908 | if ((err = snd_ac97_bus(chip->card, 0, &ops, chip, &chip->ac97_bus)) < 0) | |
1909 | return err; | |
1910 | chip->ac97_bus->private_free = snd_via82xx_mixer_free_ac97_bus; | |
1911 | chip->ac97_bus->clock = chip->ac97_clock; | |
1da177e4 LT |
1912 | |
1913 | memset(&ac97, 0, sizeof(ac97)); | |
1914 | ac97.private_data = chip; | |
1915 | ac97.private_free = snd_via82xx_mixer_free_ac97; | |
1916 | ac97.pci = chip->pci; | |
f1a63a38 | 1917 | ac97.scaps = AC97_SCAP_SKIP_MODEM | AC97_SCAP_POWER_SAVE; |
1da177e4 LT |
1918 | if ((err = snd_ac97_mixer(chip->ac97_bus, &ac97, &chip->ac97)) < 0) |
1919 | return err; | |
1920 | ||
1921 | snd_ac97_tune_hardware(chip->ac97, ac97_quirks, quirk_override); | |
1922 | ||
1923 | if (chip->chip_type != TYPE_VIA686) { | |
1924 | /* use slot 10/11 */ | |
1925 | snd_ac97_update_bits(chip->ac97, AC97_EXTENDED_STATUS, 0x03 << 4, 0x03 << 4); | |
1926 | } | |
1927 | ||
1928 | return 0; | |
1929 | } | |
1930 | ||
1931 | #ifdef SUPPORT_JOYSTICK | |
1932 | #define JOYSTICK_ADDR 0x200 | |
e437e3d7 | 1933 | static int __devinit snd_via686_create_gameport(struct via82xx *chip, unsigned char *legacy) |
1da177e4 LT |
1934 | { |
1935 | struct gameport *gp; | |
1936 | struct resource *r; | |
1937 | ||
b7fe4622 | 1938 | if (!joystick) |
1da177e4 LT |
1939 | return -ENODEV; |
1940 | ||
1941 | r = request_region(JOYSTICK_ADDR, 8, "VIA686 gameport"); | |
1942 | if (!r) { | |
e437e3d7 TI |
1943 | printk(KERN_WARNING "via82xx: cannot reserve joystick port 0x%#x\n", |
1944 | JOYSTICK_ADDR); | |
1da177e4 LT |
1945 | return -EBUSY; |
1946 | } | |
1947 | ||
1948 | chip->gameport = gp = gameport_allocate_port(); | |
1949 | if (!gp) { | |
1950 | printk(KERN_ERR "via82xx: cannot allocate memory for gameport\n"); | |
b1d5776d | 1951 | release_and_free_resource(r); |
1da177e4 LT |
1952 | return -ENOMEM; |
1953 | } | |
1954 | ||
1955 | gameport_set_name(gp, "VIA686 Gameport"); | |
1956 | gameport_set_phys(gp, "pci%s/gameport0", pci_name(chip->pci)); | |
1957 | gameport_set_dev_parent(gp, &chip->pci->dev); | |
1958 | gp->io = JOYSTICK_ADDR; | |
1959 | gameport_set_port_data(gp, r); | |
1960 | ||
1961 | /* Enable legacy joystick port */ | |
1962 | *legacy |= VIA_FUNC_ENABLE_GAME; | |
1963 | pci_write_config_byte(chip->pci, VIA_FUNC_ENABLE, *legacy); | |
1964 | ||
1965 | gameport_register_port(chip->gameport); | |
1966 | ||
1967 | return 0; | |
1968 | } | |
1969 | ||
e437e3d7 | 1970 | static void snd_via686_free_gameport(struct via82xx *chip) |
1da177e4 LT |
1971 | { |
1972 | if (chip->gameport) { | |
1973 | struct resource *r = gameport_get_port_data(chip->gameport); | |
1974 | ||
1975 | gameport_unregister_port(chip->gameport); | |
1976 | chip->gameport = NULL; | |
b1d5776d | 1977 | release_and_free_resource(r); |
1da177e4 LT |
1978 | } |
1979 | } | |
1980 | #else | |
e437e3d7 | 1981 | static inline int snd_via686_create_gameport(struct via82xx *chip, unsigned char *legacy) |
1da177e4 LT |
1982 | { |
1983 | return -ENOSYS; | |
1984 | } | |
e437e3d7 | 1985 | static inline void snd_via686_free_gameport(struct via82xx *chip) { } |
1da177e4 LT |
1986 | #endif |
1987 | ||
1988 | ||
1989 | /* | |
1990 | * | |
1991 | */ | |
1992 | ||
e437e3d7 | 1993 | static int __devinit snd_via8233_init_misc(struct via82xx *chip) |
1da177e4 LT |
1994 | { |
1995 | int i, err, caps; | |
1996 | unsigned char val; | |
1997 | ||
1998 | caps = chip->chip_type == TYPE_VIA8233A ? 1 : 2; | |
1999 | for (i = 0; i < caps; i++) { | |
2000 | snd_via8233_capture_source.index = i; | |
2001 | err = snd_ctl_add(chip->card, snd_ctl_new1(&snd_via8233_capture_source, chip)); | |
2002 | if (err < 0) | |
2003 | return err; | |
2004 | } | |
2005 | if (ac97_can_spdif(chip->ac97)) { | |
2006 | err = snd_ctl_add(chip->card, snd_ctl_new1(&snd_via8233_dxs3_spdif_control, chip)); | |
2007 | if (err < 0) | |
2008 | return err; | |
2009 | } | |
2010 | if (chip->chip_type != TYPE_VIA8233A) { | |
2011 | /* when no h/w PCM volume control is found, use DXS volume control | |
2012 | * as the PCM vol control | |
2013 | */ | |
e437e3d7 | 2014 | struct snd_ctl_elem_id sid; |
1da177e4 LT |
2015 | memset(&sid, 0, sizeof(sid)); |
2016 | strcpy(sid.name, "PCM Playback Volume"); | |
2017 | sid.iface = SNDRV_CTL_ELEM_IFACE_MIXER; | |
2018 | if (! snd_ctl_find_id(chip->card, &sid)) { | |
00f226d4 HM |
2019 | snd_printd(KERN_INFO "Using DXS as PCM Playback\n"); |
2020 | err = snd_ctl_add(chip->card, snd_ctl_new1(&snd_via8233_pcmdxs_volume_control, chip)); | |
2021 | if (err < 0) | |
2022 | return err; | |
2023 | } | |
2024 | else /* Using DXS when PCM emulation is enabled is really weird */ | |
2025 | { | |
2fb930b5 CL |
2026 | for (i = 0; i < 4; ++i) { |
2027 | struct snd_kcontrol *kctl; | |
2028 | ||
2029 | kctl = snd_ctl_new1( | |
2030 | &snd_via8233_dxs_volume_control, chip); | |
2031 | if (!kctl) | |
2032 | return -ENOMEM; | |
2033 | kctl->id.subdevice = i; | |
2034 | err = snd_ctl_add(chip->card, kctl); | |
2035 | if (err < 0) | |
2036 | return err; | |
3d009413 | 2037 | chip->dxs_controls[i] = kctl; |
2fb930b5 | 2038 | } |
1da177e4 LT |
2039 | } |
2040 | } | |
1da177e4 LT |
2041 | /* select spdif data slot 10/11 */ |
2042 | pci_read_config_byte(chip->pci, VIA8233_SPDIF_CTRL, &val); | |
2043 | val = (val & ~VIA8233_SPDIF_SLOT_MASK) | VIA8233_SPDIF_SLOT_1011; | |
2044 | val &= ~VIA8233_SPDIF_DX3; /* SPDIF off as default */ | |
2045 | pci_write_config_byte(chip->pci, VIA8233_SPDIF_CTRL, val); | |
2046 | ||
2047 | return 0; | |
2048 | } | |
2049 | ||
e437e3d7 | 2050 | static int __devinit snd_via686_init_misc(struct via82xx *chip) |
1da177e4 LT |
2051 | { |
2052 | unsigned char legacy, legacy_cfg; | |
2053 | int rev_h = 0; | |
2054 | ||
2055 | legacy = chip->old_legacy; | |
2056 | legacy_cfg = chip->old_legacy_cfg; | |
2057 | legacy |= VIA_FUNC_MIDI_IRQMASK; /* FIXME: correct? (disable MIDI) */ | |
2058 | legacy &= ~VIA_FUNC_ENABLE_GAME; /* disable joystick */ | |
2059 | if (chip->revision >= VIA_REV_686_H) { | |
2060 | rev_h = 1; | |
b7fe4622 CL |
2061 | if (mpu_port >= 0x200) { /* force MIDI */ |
2062 | mpu_port &= 0xfffc; | |
2063 | pci_write_config_dword(chip->pci, 0x18, mpu_port | 0x01); | |
c7561cd8 | 2064 | #ifdef CONFIG_PM_SLEEP |
b7fe4622 | 2065 | chip->mpu_port_saved = mpu_port; |
1da177e4 LT |
2066 | #endif |
2067 | } else { | |
b7fe4622 | 2068 | mpu_port = pci_resource_start(chip->pci, 2); |
1da177e4 LT |
2069 | } |
2070 | } else { | |
b7fe4622 | 2071 | switch (mpu_port) { /* force MIDI */ |
1da177e4 LT |
2072 | case 0x300: |
2073 | case 0x310: | |
2074 | case 0x320: | |
2075 | case 0x330: | |
2076 | legacy_cfg &= ~(3 << 2); | |
b7fe4622 | 2077 | legacy_cfg |= (mpu_port & 0x0030) >> 2; |
1da177e4 LT |
2078 | break; |
2079 | default: /* no, use BIOS settings */ | |
2080 | if (legacy & VIA_FUNC_ENABLE_MIDI) | |
b7fe4622 | 2081 | mpu_port = 0x300 + ((legacy_cfg & 0x000c) << 2); |
1da177e4 LT |
2082 | break; |
2083 | } | |
2084 | } | |
b7fe4622 CL |
2085 | if (mpu_port >= 0x200 && |
2086 | (chip->mpu_res = request_region(mpu_port, 2, "VIA82xx MPU401")) | |
2087 | != NULL) { | |
1da177e4 LT |
2088 | if (rev_h) |
2089 | legacy |= VIA_FUNC_MIDI_PNP; /* enable PCI I/O 2 */ | |
2090 | legacy |= VIA_FUNC_ENABLE_MIDI; | |
2091 | } else { | |
2092 | if (rev_h) | |
2093 | legacy &= ~VIA_FUNC_MIDI_PNP; /* disable PCI I/O 2 */ | |
2094 | legacy &= ~VIA_FUNC_ENABLE_MIDI; | |
b7fe4622 | 2095 | mpu_port = 0; |
1da177e4 LT |
2096 | } |
2097 | ||
2098 | pci_write_config_byte(chip->pci, VIA_FUNC_ENABLE, legacy); | |
2099 | pci_write_config_byte(chip->pci, VIA_PNP_CONTROL, legacy_cfg); | |
2100 | if (chip->mpu_res) { | |
2101 | if (snd_mpu401_uart_new(chip->card, 0, MPU401_HW_VIA686A, | |
dba8b469 CL |
2102 | mpu_port, MPU401_INFO_INTEGRATED | |
2103 | MPU401_INFO_IRQ_HOOK, -1, | |
2104 | &chip->rmidi) < 0) { | |
b7fe4622 CL |
2105 | printk(KERN_WARNING "unable to initialize MPU-401" |
2106 | " at 0x%lx, skipping\n", mpu_port); | |
1da177e4 LT |
2107 | legacy &= ~VIA_FUNC_ENABLE_MIDI; |
2108 | } else { | |
2109 | legacy &= ~VIA_FUNC_MIDI_IRQMASK; /* enable MIDI interrupt */ | |
2110 | } | |
2111 | pci_write_config_byte(chip->pci, VIA_FUNC_ENABLE, legacy); | |
2112 | } | |
2113 | ||
b7fe4622 | 2114 | snd_via686_create_gameport(chip, &legacy); |
1da177e4 | 2115 | |
c7561cd8 | 2116 | #ifdef CONFIG_PM_SLEEP |
1da177e4 LT |
2117 | chip->legacy_saved = legacy; |
2118 | chip->legacy_cfg_saved = legacy_cfg; | |
2119 | #endif | |
2120 | ||
2121 | return 0; | |
2122 | } | |
2123 | ||
2124 | ||
2125 | /* | |
2126 | * proc interface | |
2127 | */ | |
e437e3d7 TI |
2128 | static void snd_via82xx_proc_read(struct snd_info_entry *entry, |
2129 | struct snd_info_buffer *buffer) | |
1da177e4 | 2130 | { |
e437e3d7 | 2131 | struct via82xx *chip = entry->private_data; |
1da177e4 LT |
2132 | int i; |
2133 | ||
2134 | snd_iprintf(buffer, "%s\n\n", chip->card->longname); | |
2135 | for (i = 0; i < 0xa0; i += 4) { | |
2136 | snd_iprintf(buffer, "%02x: %08x\n", i, inl(chip->port + i)); | |
2137 | } | |
2138 | } | |
2139 | ||
e437e3d7 | 2140 | static void __devinit snd_via82xx_proc_init(struct via82xx *chip) |
1da177e4 | 2141 | { |
e437e3d7 | 2142 | struct snd_info_entry *entry; |
1da177e4 LT |
2143 | |
2144 | if (! snd_card_proc_new(chip->card, "via82xx", &entry)) | |
bf850204 | 2145 | snd_info_set_text_ops(entry, chip, snd_via82xx_proc_read); |
1da177e4 LT |
2146 | } |
2147 | ||
2148 | /* | |
2149 | * | |
2150 | */ | |
2151 | ||
e437e3d7 | 2152 | static int snd_via82xx_chip_init(struct via82xx *chip) |
1da177e4 LT |
2153 | { |
2154 | unsigned int val; | |
ef21ca24 | 2155 | unsigned long end_time; |
1da177e4 LT |
2156 | unsigned char pval; |
2157 | ||
2158 | #if 0 /* broken on K7M? */ | |
2159 | if (chip->chip_type == TYPE_VIA686) | |
2160 | /* disable all legacy ports */ | |
2161 | pci_write_config_byte(chip->pci, VIA_FUNC_ENABLE, 0); | |
2162 | #endif | |
2163 | pci_read_config_byte(chip->pci, VIA_ACLINK_STAT, &pval); | |
2164 | if (! (pval & VIA_ACLINK_C00_READY)) { /* codec not ready? */ | |
2165 | /* deassert ACLink reset, force SYNC */ | |
2166 | pci_write_config_byte(chip->pci, VIA_ACLINK_CTRL, | |
2167 | VIA_ACLINK_CTRL_ENABLE | | |
2168 | VIA_ACLINK_CTRL_RESET | | |
2169 | VIA_ACLINK_CTRL_SYNC); | |
2170 | udelay(100); | |
2171 | #if 1 /* FIXME: should we do full reset here for all chip models? */ | |
2172 | pci_write_config_byte(chip->pci, VIA_ACLINK_CTRL, 0x00); | |
2173 | udelay(100); | |
2174 | #else | |
2175 | /* deassert ACLink reset, force SYNC (warm AC'97 reset) */ | |
2176 | pci_write_config_byte(chip->pci, VIA_ACLINK_CTRL, | |
2177 | VIA_ACLINK_CTRL_RESET|VIA_ACLINK_CTRL_SYNC); | |
2178 | udelay(2); | |
2179 | #endif | |
2180 | /* ACLink on, deassert ACLink reset, VSR, SGD data out */ | |
2181 | /* note - FM data out has trouble with non VRA codecs !! */ | |
2182 | pci_write_config_byte(chip->pci, VIA_ACLINK_CTRL, VIA_ACLINK_CTRL_INIT); | |
2183 | udelay(100); | |
2184 | } | |
2185 | ||
2186 | /* Make sure VRA is enabled, in case we didn't do a | |
2187 | * complete codec reset, above */ | |
2188 | pci_read_config_byte(chip->pci, VIA_ACLINK_CTRL, &pval); | |
2189 | if ((pval & VIA_ACLINK_CTRL_INIT) != VIA_ACLINK_CTRL_INIT) { | |
2190 | /* ACLink on, deassert ACLink reset, VSR, SGD data out */ | |
2191 | /* note - FM data out has trouble with non VRA codecs !! */ | |
2192 | pci_write_config_byte(chip->pci, VIA_ACLINK_CTRL, VIA_ACLINK_CTRL_INIT); | |
2193 | udelay(100); | |
2194 | } | |
2195 | ||
2196 | /* wait until codec ready */ | |
ef21ca24 | 2197 | end_time = jiffies + msecs_to_jiffies(750); |
1da177e4 LT |
2198 | do { |
2199 | pci_read_config_byte(chip->pci, VIA_ACLINK_STAT, &pval); | |
2200 | if (pval & VIA_ACLINK_C00_READY) /* primary codec ready */ | |
2201 | break; | |
d86d0193 | 2202 | schedule_timeout_uninterruptible(1); |
ef21ca24 | 2203 | } while (time_before(jiffies, end_time)); |
1da177e4 LT |
2204 | |
2205 | if ((val = snd_via82xx_codec_xread(chip)) & VIA_REG_AC97_BUSY) | |
99b359ba | 2206 | snd_printk(KERN_ERR "AC'97 codec is not ready [0x%x]\n", val); |
1da177e4 LT |
2207 | |
2208 | #if 0 /* FIXME: we don't support the second codec yet so skip the detection now.. */ | |
2209 | snd_via82xx_codec_xwrite(chip, VIA_REG_AC97_READ | | |
2210 | VIA_REG_AC97_SECONDARY_VALID | | |
2211 | (VIA_REG_AC97_CODEC_ID_SECONDARY << VIA_REG_AC97_CODEC_ID_SHIFT)); | |
ef21ca24 | 2212 | end_time = jiffies + msecs_to_jiffies(750); |
1da177e4 LT |
2213 | snd_via82xx_codec_xwrite(chip, VIA_REG_AC97_READ | |
2214 | VIA_REG_AC97_SECONDARY_VALID | | |
2215 | (VIA_REG_AC97_CODEC_ID_SECONDARY << VIA_REG_AC97_CODEC_ID_SHIFT)); | |
2216 | do { | |
2217 | if ((val = snd_via82xx_codec_xread(chip)) & VIA_REG_AC97_SECONDARY_VALID) { | |
2218 | chip->ac97_secondary = 1; | |
2219 | goto __ac97_ok2; | |
2220 | } | |
d86d0193 | 2221 | schedule_timeout_uninterruptible(1); |
ef21ca24 | 2222 | } while (time_before(jiffies, end_time)); |
1da177e4 LT |
2223 | /* This is ok, the most of motherboards have only one codec */ |
2224 | ||
2225 | __ac97_ok2: | |
2226 | #endif | |
2227 | ||
2228 | if (chip->chip_type == TYPE_VIA686) { | |
2229 | /* route FM trap to IRQ, disable FM trap */ | |
2230 | pci_write_config_byte(chip->pci, VIA_FM_NMI_CTRL, 0); | |
2231 | /* disable all GPI interrupts */ | |
2232 | outl(0, VIAREG(chip, GPI_INTR)); | |
2233 | } | |
2234 | ||
2235 | if (chip->chip_type != TYPE_VIA686) { | |
2236 | /* Workaround for Award BIOS bug: | |
2237 | * DXS channels don't work properly with VRA if MC97 is disabled. | |
2238 | */ | |
2239 | struct pci_dev *pci; | |
0dd119f7 | 2240 | pci = pci_get_device(0x1106, 0x3068, NULL); /* MC97 */ |
1da177e4 LT |
2241 | if (pci) { |
2242 | unsigned char data; | |
2243 | pci_read_config_byte(pci, 0x44, &data); | |
2244 | pci_write_config_byte(pci, 0x44, data | 0x40); | |
0dd119f7 | 2245 | pci_dev_put(pci); |
1da177e4 LT |
2246 | } |
2247 | } | |
2248 | ||
2249 | if (chip->chip_type != TYPE_VIA8233A) { | |
2250 | int i, idx; | |
2251 | for (idx = 0; idx < 4; idx++) { | |
2252 | unsigned long port = chip->port + 0x10 * idx; | |
00f226d4 HM |
2253 | for (i = 0; i < 2; i++) { |
2254 | chip->playback_volume[idx][i]=chip->playback_volume_c[i]; | |
e437e3d7 TI |
2255 | outb(chip->playback_volume_c[i], |
2256 | port + VIA_REG_OFS_PLAYBACK_VOLUME_L + i); | |
00f226d4 | 2257 | } |
1da177e4 LT |
2258 | } |
2259 | } | |
2260 | ||
2261 | return 0; | |
2262 | } | |
2263 | ||
c7561cd8 | 2264 | #ifdef CONFIG_PM_SLEEP |
1da177e4 LT |
2265 | /* |
2266 | * power management | |
2267 | */ | |
68cb2b55 | 2268 | static int snd_via82xx_suspend(struct device *dev) |
1da177e4 | 2269 | { |
68cb2b55 TI |
2270 | struct pci_dev *pci = to_pci_dev(dev); |
2271 | struct snd_card *card = dev_get_drvdata(dev); | |
57feb835 | 2272 | struct via82xx *chip = card->private_data; |
1da177e4 LT |
2273 | int i; |
2274 | ||
57feb835 | 2275 | snd_power_change_state(card, SNDRV_CTL_POWER_D3hot); |
1da177e4 | 2276 | for (i = 0; i < 2; i++) |
57feb835 | 2277 | snd_pcm_suspend_all(chip->pcms[i]); |
1da177e4 LT |
2278 | for (i = 0; i < chip->num_devs; i++) |
2279 | snd_via82xx_channel_reset(chip, &chip->devs[i]); | |
2280 | synchronize_irq(chip->irq); | |
2281 | snd_ac97_suspend(chip->ac97); | |
2282 | ||
2283 | /* save misc values */ | |
2284 | if (chip->chip_type != TYPE_VIA686) { | |
2285 | pci_read_config_byte(chip->pci, VIA8233_SPDIF_CTRL, &chip->spdif_ctrl_saved); | |
2286 | chip->capture_src_saved[0] = inb(chip->port + VIA_REG_CAPTURE_CHANNEL); | |
2287 | chip->capture_src_saved[1] = inb(chip->port + VIA_REG_CAPTURE_CHANNEL + 0x10); | |
2288 | } | |
2289 | ||
57feb835 TI |
2290 | pci_disable_device(pci); |
2291 | pci_save_state(pci); | |
68cb2b55 | 2292 | pci_set_power_state(pci, PCI_D3hot); |
1da177e4 LT |
2293 | return 0; |
2294 | } | |
2295 | ||
68cb2b55 | 2296 | static int snd_via82xx_resume(struct device *dev) |
1da177e4 | 2297 | { |
68cb2b55 TI |
2298 | struct pci_dev *pci = to_pci_dev(dev); |
2299 | struct snd_card *card = dev_get_drvdata(dev); | |
57feb835 | 2300 | struct via82xx *chip = card->private_data; |
1da177e4 LT |
2301 | int i; |
2302 | ||
57feb835 | 2303 | pci_set_power_state(pci, PCI_D0); |
30b35399 TI |
2304 | pci_restore_state(pci); |
2305 | if (pci_enable_device(pci) < 0) { | |
2306 | printk(KERN_ERR "via82xx: pci_enable_device failed, " | |
2307 | "disabling device\n"); | |
2308 | snd_card_disconnect(card); | |
2309 | return -EIO; | |
2310 | } | |
2311 | pci_set_master(pci); | |
1da177e4 LT |
2312 | |
2313 | snd_via82xx_chip_init(chip); | |
2314 | ||
2315 | if (chip->chip_type == TYPE_VIA686) { | |
2316 | if (chip->mpu_port_saved) | |
2317 | pci_write_config_dword(chip->pci, 0x18, chip->mpu_port_saved | 0x01); | |
2318 | pci_write_config_byte(chip->pci, VIA_FUNC_ENABLE, chip->legacy_saved); | |
2319 | pci_write_config_byte(chip->pci, VIA_PNP_CONTROL, chip->legacy_cfg_saved); | |
2320 | } else { | |
2321 | pci_write_config_byte(chip->pci, VIA8233_SPDIF_CTRL, chip->spdif_ctrl_saved); | |
2322 | outb(chip->capture_src_saved[0], chip->port + VIA_REG_CAPTURE_CHANNEL); | |
2323 | outb(chip->capture_src_saved[1], chip->port + VIA_REG_CAPTURE_CHANNEL + 0x10); | |
2324 | } | |
2325 | ||
2326 | snd_ac97_resume(chip->ac97); | |
2327 | ||
2328 | for (i = 0; i < chip->num_devs; i++) | |
2329 | snd_via82xx_channel_reset(chip, &chip->devs[i]); | |
2330 | ||
57feb835 | 2331 | snd_power_change_state(card, SNDRV_CTL_POWER_D0); |
1da177e4 LT |
2332 | return 0; |
2333 | } | |
68cb2b55 TI |
2334 | |
2335 | static SIMPLE_DEV_PM_OPS(snd_via82xx_pm, snd_via82xx_suspend, snd_via82xx_resume); | |
2336 | #define SND_VIA82XX_PM_OPS &snd_via82xx_pm | |
2337 | #else | |
2338 | #define SND_VIA82XX_PM_OPS NULL | |
c7561cd8 | 2339 | #endif /* CONFIG_PM_SLEEP */ |
1da177e4 | 2340 | |
e437e3d7 | 2341 | static int snd_via82xx_free(struct via82xx *chip) |
1da177e4 LT |
2342 | { |
2343 | unsigned int i; | |
2344 | ||
2345 | if (chip->irq < 0) | |
2346 | goto __end_hw; | |
2347 | /* disable interrupts */ | |
2348 | for (i = 0; i < chip->num_devs; i++) | |
2349 | snd_via82xx_channel_reset(chip, &chip->devs[i]); | |
f000fd80 | 2350 | |
1da177e4 | 2351 | if (chip->irq >= 0) |
e437e3d7 | 2352 | free_irq(chip->irq, chip); |
757d5a75 | 2353 | __end_hw: |
b1d5776d | 2354 | release_and_free_resource(chip->mpu_res); |
1da177e4 LT |
2355 | pci_release_regions(chip->pci); |
2356 | ||
2357 | if (chip->chip_type == TYPE_VIA686) { | |
2358 | snd_via686_free_gameport(chip); | |
2359 | pci_write_config_byte(chip->pci, VIA_FUNC_ENABLE, chip->old_legacy); | |
2360 | pci_write_config_byte(chip->pci, VIA_PNP_CONTROL, chip->old_legacy_cfg); | |
2361 | } | |
2362 | pci_disable_device(chip->pci); | |
2363 | kfree(chip); | |
2364 | return 0; | |
2365 | } | |
2366 | ||
e437e3d7 | 2367 | static int snd_via82xx_dev_free(struct snd_device *device) |
1da177e4 | 2368 | { |
e437e3d7 | 2369 | struct via82xx *chip = device->device_data; |
1da177e4 LT |
2370 | return snd_via82xx_free(chip); |
2371 | } | |
2372 | ||
e437e3d7 | 2373 | static int __devinit snd_via82xx_create(struct snd_card *card, |
1da177e4 LT |
2374 | struct pci_dev *pci, |
2375 | int chip_type, | |
2376 | int revision, | |
2377 | unsigned int ac97_clock, | |
e437e3d7 | 2378 | struct via82xx ** r_via) |
1da177e4 | 2379 | { |
e437e3d7 | 2380 | struct via82xx *chip; |
1da177e4 | 2381 | int err; |
e437e3d7 | 2382 | static struct snd_device_ops ops = { |
1da177e4 LT |
2383 | .dev_free = snd_via82xx_dev_free, |
2384 | }; | |
2385 | ||
2386 | if ((err = pci_enable_device(pci)) < 0) | |
2387 | return err; | |
2388 | ||
e560d8d8 | 2389 | if ((chip = kzalloc(sizeof(*chip), GFP_KERNEL)) == NULL) { |
1da177e4 LT |
2390 | pci_disable_device(pci); |
2391 | return -ENOMEM; | |
2392 | } | |
2393 | ||
2394 | chip->chip_type = chip_type; | |
2395 | chip->revision = revision; | |
2396 | ||
2397 | spin_lock_init(&chip->reg_lock); | |
2398 | spin_lock_init(&chip->rates[0].lock); | |
2399 | spin_lock_init(&chip->rates[1].lock); | |
2400 | chip->card = card; | |
2401 | chip->pci = pci; | |
2402 | chip->irq = -1; | |
2403 | ||
2404 | pci_read_config_byte(pci, VIA_FUNC_ENABLE, &chip->old_legacy); | |
2405 | pci_read_config_byte(pci, VIA_PNP_CONTROL, &chip->old_legacy_cfg); | |
2406 | pci_write_config_byte(chip->pci, VIA_FUNC_ENABLE, | |
2407 | chip->old_legacy & ~(VIA_FUNC_ENABLE_SB|VIA_FUNC_ENABLE_FM)); | |
2408 | ||
2409 | if ((err = pci_request_regions(pci, card->driver)) < 0) { | |
2410 | kfree(chip); | |
2411 | pci_disable_device(pci); | |
2412 | return err; | |
2413 | } | |
2414 | chip->port = pci_resource_start(pci, 0); | |
4f550df5 KW |
2415 | if (request_irq(pci->irq, |
2416 | chip_type == TYPE_VIA8233 ? | |
2417 | snd_via8233_interrupt : snd_via686_interrupt, | |
437a5a46 | 2418 | IRQF_SHARED, |
934c2b6d | 2419 | KBUILD_MODNAME, chip)) { |
99b359ba | 2420 | snd_printk(KERN_ERR "unable to grab IRQ %d\n", pci->irq); |
1da177e4 LT |
2421 | snd_via82xx_free(chip); |
2422 | return -EBUSY; | |
2423 | } | |
2424 | chip->irq = pci->irq; | |
2425 | if (ac97_clock >= 8000 && ac97_clock <= 48000) | |
2426 | chip->ac97_clock = ac97_clock; | |
2427 | synchronize_irq(chip->irq); | |
2428 | ||
2429 | if ((err = snd_via82xx_chip_init(chip)) < 0) { | |
2430 | snd_via82xx_free(chip); | |
2431 | return err; | |
2432 | } | |
2433 | ||
2434 | if ((err = snd_device_new(card, SNDRV_DEV_LOWLEVEL, chip, &ops)) < 0) { | |
2435 | snd_via82xx_free(chip); | |
2436 | return err; | |
2437 | } | |
2438 | ||
2439 | /* The 8233 ac97 controller does not implement the master bit | |
2440 | * in the pci command register. IMHO this is a violation of the PCI spec. | |
2441 | * We call pci_set_master here because it does not hurt. */ | |
2442 | pci_set_master(pci); | |
2443 | ||
2444 | snd_card_set_dev(card, &pci->dev); | |
2445 | ||
2446 | *r_via = chip; | |
2447 | return 0; | |
2448 | } | |
2449 | ||
2450 | struct via823x_info { | |
2451 | int revision; | |
2452 | char *name; | |
2453 | int type; | |
2454 | }; | |
2455 | static struct via823x_info via823x_cards[] __devinitdata = { | |
2456 | { VIA_REV_PRE_8233, "VIA 8233-Pre", TYPE_VIA8233 }, | |
2457 | { VIA_REV_8233C, "VIA 8233C", TYPE_VIA8233 }, | |
2458 | { VIA_REV_8233, "VIA 8233", TYPE_VIA8233 }, | |
2459 | { VIA_REV_8233A, "VIA 8233A", TYPE_VIA8233A }, | |
2460 | { VIA_REV_8235, "VIA 8235", TYPE_VIA8233 }, | |
2461 | { VIA_REV_8237, "VIA 8237", TYPE_VIA8233 }, | |
8263c65f | 2462 | { VIA_REV_8251, "VIA 8251", TYPE_VIA8233 }, |
1da177e4 LT |
2463 | }; |
2464 | ||
2465 | /* | |
2466 | * auto detection of DXS channel supports. | |
2467 | */ | |
9d74958a TI |
2468 | |
2469 | static struct snd_pci_quirk dxs_whitelist[] __devinitdata = { | |
2470 | SND_PCI_QUIRK(0x1005, 0x4710, "Avance Logic Mobo", VIA_DXS_ENABLE), | |
2471 | SND_PCI_QUIRK(0x1019, 0x0996, "ESC Mobo", VIA_DXS_48K), | |
2472 | SND_PCI_QUIRK(0x1019, 0x0a81, "ECS K7VTA3 v8.0", VIA_DXS_NO_VRA), | |
2473 | SND_PCI_QUIRK(0x1019, 0x0a85, "ECS L7VMM2", VIA_DXS_NO_VRA), | |
a85165c6 | 2474 | SND_PCI_QUIRK_VENDOR(0x1019, "ESC K8", VIA_DXS_SRC), |
9d74958a TI |
2475 | SND_PCI_QUIRK(0x1019, 0xaa01, "ESC K8T890-A", VIA_DXS_SRC), |
2476 | SND_PCI_QUIRK(0x1025, 0x0033, "Acer Inspire 1353LM", VIA_DXS_NO_VRA), | |
2477 | SND_PCI_QUIRK(0x1025, 0x0046, "Acer Aspire 1524 WLMi", VIA_DXS_SRC), | |
a85165c6 TI |
2478 | SND_PCI_QUIRK_VENDOR(0x1043, "ASUS A7/A8", VIA_DXS_NO_VRA), |
2479 | SND_PCI_QUIRK_VENDOR(0x1071, "Diverse Notebook", VIA_DXS_NO_VRA), | |
9d74958a | 2480 | SND_PCI_QUIRK(0x10cf, 0x118e, "FSC Laptop", VIA_DXS_ENABLE), |
a85165c6 | 2481 | SND_PCI_QUIRK_VENDOR(0x1106, "ASRock", VIA_DXS_SRC), |
11be265f | 2482 | SND_PCI_QUIRK(0x1297, 0xa231, "Shuttle AK31v2", VIA_DXS_SRC), |
9674513d TI |
2483 | SND_PCI_QUIRK(0x1297, 0xa232, "Shuttle", VIA_DXS_SRC), |
2484 | SND_PCI_QUIRK(0x1297, 0xc160, "Shuttle Sk41G", VIA_DXS_SRC), | |
9d74958a TI |
2485 | SND_PCI_QUIRK(0x1458, 0xa002, "Gigabyte GA-7VAXP", VIA_DXS_ENABLE), |
2486 | SND_PCI_QUIRK(0x1462, 0x3800, "MSI KT266", VIA_DXS_ENABLE), | |
2487 | SND_PCI_QUIRK(0x1462, 0x7120, "MSI KT4V", VIA_DXS_ENABLE), | |
2488 | SND_PCI_QUIRK(0x1462, 0x7142, "MSI K8MM-V", VIA_DXS_ENABLE), | |
a85165c6 | 2489 | SND_PCI_QUIRK_VENDOR(0x1462, "MSI Mobo", VIA_DXS_SRC), |
9d74958a TI |
2490 | SND_PCI_QUIRK(0x147b, 0x1401, "ABIT KD7(-RAID)", VIA_DXS_ENABLE), |
2491 | SND_PCI_QUIRK(0x147b, 0x1411, "ABIT VA-20", VIA_DXS_ENABLE), | |
2492 | SND_PCI_QUIRK(0x147b, 0x1413, "ABIT KV8 Pro", VIA_DXS_ENABLE), | |
2493 | SND_PCI_QUIRK(0x147b, 0x1415, "ABIT AV8", VIA_DXS_NO_VRA), | |
2494 | SND_PCI_QUIRK(0x14ff, 0x0403, "Twinhead mobo", VIA_DXS_ENABLE), | |
2495 | SND_PCI_QUIRK(0x14ff, 0x0408, "Twinhead laptop", VIA_DXS_SRC), | |
2496 | SND_PCI_QUIRK(0x1558, 0x4701, "Clevo D470", VIA_DXS_SRC), | |
2497 | SND_PCI_QUIRK(0x1584, 0x8120, "Diverse Laptop", VIA_DXS_ENABLE), | |
2498 | SND_PCI_QUIRK(0x1584, 0x8123, "Targa/Uniwill", VIA_DXS_NO_VRA), | |
2499 | SND_PCI_QUIRK(0x161f, 0x202b, "Amira Notebook", VIA_DXS_NO_VRA), | |
2500 | SND_PCI_QUIRK(0x161f, 0x2032, "m680x machines", VIA_DXS_48K), | |
2501 | SND_PCI_QUIRK(0x1631, 0xe004, "PB EasyNote 3174", VIA_DXS_ENABLE), | |
2502 | SND_PCI_QUIRK(0x1695, 0x3005, "EPoX EP-8K9A", VIA_DXS_ENABLE), | |
a85165c6 TI |
2503 | SND_PCI_QUIRK_VENDOR(0x1695, "EPoX mobo", VIA_DXS_SRC), |
2504 | SND_PCI_QUIRK_VENDOR(0x16f3, "Jetway K8", VIA_DXS_SRC), | |
2505 | SND_PCI_QUIRK_VENDOR(0x1734, "FSC Laptop", VIA_DXS_SRC), | |
9d74958a | 2506 | SND_PCI_QUIRK(0x1849, 0x3059, "ASRock K7VM2", VIA_DXS_NO_VRA), |
a85165c6 | 2507 | SND_PCI_QUIRK_VENDOR(0x1849, "ASRock mobo", VIA_DXS_SRC), |
9d74958a TI |
2508 | SND_PCI_QUIRK(0x1919, 0x200a, "Soltek SL-K8", VIA_DXS_NO_VRA), |
2509 | SND_PCI_QUIRK(0x4005, 0x4710, "MSI K7T266", VIA_DXS_SRC), | |
2510 | { } /* terminator */ | |
1da177e4 LT |
2511 | }; |
2512 | ||
a769577b | 2513 | static int __devinit check_dxs_list(struct pci_dev *pci, int revision) |
1da177e4 | 2514 | { |
9d74958a | 2515 | const struct snd_pci_quirk *w; |
1da177e4 | 2516 | |
9d74958a TI |
2517 | w = snd_pci_quirk_lookup(pci, dxs_whitelist); |
2518 | if (w) { | |
2519 | snd_printdd(KERN_INFO "via82xx: DXS white list for %s found\n", | |
2520 | w->name); | |
2521 | return w->value; | |
1da177e4 LT |
2522 | } |
2523 | ||
a769577b TI |
2524 | /* for newer revision, default to DXS_SRC */ |
2525 | if (revision >= VIA_REV_8235) | |
2526 | return VIA_DXS_SRC; | |
2527 | ||
1da177e4 LT |
2528 | /* |
2529 | * not detected, try 48k rate only to be sure. | |
2530 | */ | |
2531 | printk(KERN_INFO "via82xx: Assuming DXS channels with 48k fixed sample rate.\n"); | |
ee3b4c60 | 2532 | printk(KERN_INFO " Please try dxs_support=5 option\n"); |
1da177e4 | 2533 | printk(KERN_INFO " and report if it works on your machine.\n"); |
ee3b4c60 | 2534 | printk(KERN_INFO " For more details, read ALSA-Configuration.txt.\n"); |
1da177e4 LT |
2535 | return VIA_DXS_48K; |
2536 | }; | |
2537 | ||
2538 | static int __devinit snd_via82xx_probe(struct pci_dev *pci, | |
2539 | const struct pci_device_id *pci_id) | |
2540 | { | |
e437e3d7 TI |
2541 | struct snd_card *card; |
2542 | struct via82xx *chip; | |
1da177e4 LT |
2543 | int chip_type = 0, card_type; |
2544 | unsigned int i; | |
2545 | int err; | |
2546 | ||
e58de7ba TI |
2547 | err = snd_card_create(index, id, THIS_MODULE, 0, &card); |
2548 | if (err < 0) | |
2549 | return err; | |
1da177e4 LT |
2550 | |
2551 | card_type = pci_id->driver_data; | |
1da177e4 LT |
2552 | switch (card_type) { |
2553 | case TYPE_CARD_VIA686: | |
2554 | strcpy(card->driver, "VIA686A"); | |
44c10138 | 2555 | sprintf(card->shortname, "VIA 82C686A/B rev%x", pci->revision); |
1da177e4 LT |
2556 | chip_type = TYPE_VIA686; |
2557 | break; | |
2558 | case TYPE_CARD_VIA8233: | |
2559 | chip_type = TYPE_VIA8233; | |
44c10138 | 2560 | sprintf(card->shortname, "VIA 823x rev%x", pci->revision); |
1da177e4 | 2561 | for (i = 0; i < ARRAY_SIZE(via823x_cards); i++) { |
44c10138 | 2562 | if (pci->revision == via823x_cards[i].revision) { |
1da177e4 LT |
2563 | chip_type = via823x_cards[i].type; |
2564 | strcpy(card->shortname, via823x_cards[i].name); | |
2565 | break; | |
2566 | } | |
2567 | } | |
2568 | if (chip_type != TYPE_VIA8233A) { | |
b7fe4622 | 2569 | if (dxs_support == VIA_DXS_AUTO) |
44c10138 | 2570 | dxs_support = check_dxs_list(pci, pci->revision); |
1da177e4 LT |
2571 | /* force to use VIA8233 or 8233A model according to |
2572 | * dxs_support module option | |
2573 | */ | |
b7fe4622 | 2574 | if (dxs_support == VIA_DXS_DISABLE) |
1da177e4 LT |
2575 | chip_type = TYPE_VIA8233A; |
2576 | else | |
2577 | chip_type = TYPE_VIA8233; | |
2578 | } | |
2579 | if (chip_type == TYPE_VIA8233A) | |
2580 | strcpy(card->driver, "VIA8233A"); | |
44c10138 | 2581 | else if (pci->revision >= VIA_REV_8237) |
1da177e4 LT |
2582 | strcpy(card->driver, "VIA8237"); /* no slog assignment */ |
2583 | else | |
2584 | strcpy(card->driver, "VIA8233"); | |
2585 | break; | |
2586 | default: | |
2587 | snd_printk(KERN_ERR "invalid card type %d\n", card_type); | |
2588 | err = -EINVAL; | |
2589 | goto __error; | |
2590 | } | |
2591 | ||
44c10138 | 2592 | if ((err = snd_via82xx_create(card, pci, chip_type, pci->revision, |
b7fe4622 | 2593 | ac97_clock, &chip)) < 0) |
1da177e4 | 2594 | goto __error; |
57feb835 | 2595 | card->private_data = chip; |
b7fe4622 | 2596 | if ((err = snd_via82xx_mixer_new(chip, ac97_quirk)) < 0) |
1da177e4 LT |
2597 | goto __error; |
2598 | ||
2599 | if (chip_type == TYPE_VIA686) { | |
2600 | if ((err = snd_via686_pcm_new(chip)) < 0 || | |
b7fe4622 | 2601 | (err = snd_via686_init_misc(chip)) < 0) |
1da177e4 LT |
2602 | goto __error; |
2603 | } else { | |
2604 | if (chip_type == TYPE_VIA8233A) { | |
2605 | if ((err = snd_via8233a_pcm_new(chip)) < 0) | |
2606 | goto __error; | |
2607 | // chip->dxs_fixed = 1; /* FIXME: use 48k for DXS #3? */ | |
2608 | } else { | |
2609 | if ((err = snd_via8233_pcm_new(chip)) < 0) | |
2610 | goto __error; | |
b7fe4622 | 2611 | if (dxs_support == VIA_DXS_48K) |
1da177e4 | 2612 | chip->dxs_fixed = 1; |
b7fe4622 | 2613 | else if (dxs_support == VIA_DXS_NO_VRA) |
1da177e4 | 2614 | chip->no_vra = 1; |
b7fe4622 | 2615 | else if (dxs_support == VIA_DXS_SRC) { |
2d7eb7cb SV |
2616 | chip->no_vra = 1; |
2617 | chip->dxs_src = 1; | |
2618 | } | |
1da177e4 | 2619 | } |
b7fe4622 | 2620 | if ((err = snd_via8233_init_misc(chip)) < 0) |
1da177e4 LT |
2621 | goto __error; |
2622 | } | |
2623 | ||
1da177e4 LT |
2624 | /* disable interrupts */ |
2625 | for (i = 0; i < chip->num_devs; i++) | |
2626 | snd_via82xx_channel_reset(chip, &chip->devs[i]); | |
2627 | ||
2628 | snprintf(card->longname, sizeof(card->longname), | |
2629 | "%s with %s at %#lx, irq %d", card->shortname, | |
2630 | snd_ac97_get_short_name(chip->ac97), chip->port, chip->irq); | |
2631 | ||
2632 | snd_via82xx_proc_init(chip); | |
2633 | ||
2634 | if ((err = snd_card_register(card)) < 0) { | |
2635 | snd_card_free(card); | |
2636 | return err; | |
2637 | } | |
2638 | pci_set_drvdata(pci, card); | |
1da177e4 LT |
2639 | return 0; |
2640 | ||
2641 | __error: | |
2642 | snd_card_free(card); | |
2643 | return err; | |
2644 | } | |
2645 | ||
2646 | static void __devexit snd_via82xx_remove(struct pci_dev *pci) | |
2647 | { | |
2648 | snd_card_free(pci_get_drvdata(pci)); | |
2649 | pci_set_drvdata(pci, NULL); | |
2650 | } | |
2651 | ||
e9f66d9b | 2652 | static struct pci_driver via82xx_driver = { |
3733e424 | 2653 | .name = KBUILD_MODNAME, |
1da177e4 LT |
2654 | .id_table = snd_via82xx_ids, |
2655 | .probe = snd_via82xx_probe, | |
2656 | .remove = __devexit_p(snd_via82xx_remove), | |
68cb2b55 TI |
2657 | .driver = { |
2658 | .pm = SND_VIA82XX_PM_OPS, | |
2659 | }, | |
1da177e4 LT |
2660 | }; |
2661 | ||
e9f66d9b | 2662 | module_pci_driver(via82xx_driver); |