[deliverable/linux.git] / sound / soc / codecs / ak4642.c

/*
 * ak4642.c  --  AK4642/AK4643 ALSA Soc Audio driver
 *
 * Copyright (C) 2009 Renesas Solutions Corp.
 * Kuninori Morimoto <morimoto.kuninori@renesas.com>
 *
 * Based on wm8731.c by Richard Purdie
 * Based on ak4535.c by Richard Purdie
 * Based on wm8753.c by Liam Girdwood
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License version 2 as
 * published by the Free Software Foundation.
 */

/* ** CAUTION **
 *
 * This is very simple driver.
 * It can use headphone output / stereo input only
 *
 * AK4642 is not tested.
 * AK4643 is tested.
 */

#include <linux/delay.h>
#include <linux/i2c.h>
#include <linux/platform_device.h>
#include <linux/slab.h>
#include <sound/soc-dapm.h>
#include <sound/initval.h>
#include <sound/tlv.h>

#define AK4642_VERSION "0.0.1"

#define PW_MGMT1	0x00
#define PW_MGMT2	0x01
#define SG_SL1		0x02
#define SG_SL2		0x03
#define MD_CTL1		0x04
#define MD_CTL2		0x05
#define TIMER		0x06
#define ALC_CTL1	0x07
#define ALC_CTL2	0x08
#define L_IVC		0x09
#define L_DVC		0x0a
#define ALC_CTL3	0x0b
#define R_IVC		0x0c
#define R_DVC		0x0d
#define MD_CTL3		0x0e
#define MD_CTL4		0x0f
#define PW_MGMT3	0x10
#define DF_S		0x11
#define FIL3_0		0x12
#define FIL3_1		0x13
#define FIL3_2		0x14
#define FIL3_3		0x15
#define EQ_0		0x16
#define EQ_1		0x17
#define EQ_2		0x18
#define EQ_3		0x19
#define EQ_4		0x1a
#define EQ_5		0x1b
#define FIL1_0		0x1c
#define FIL1_1		0x1d
#define FIL1_2		0x1e
#define FIL1_3		0x1f
#define PW_MGMT4	0x20
#define MD_CTL5		0x21
#define LO_MS		0x22
#define HP_MS		0x23
#define SPK_MS		0x24

#define AK4642_CACHEREGNUM 	0x25

/* PW_MGMT2 */
#define HPMTN		(1 << 6)
#define PMHPL		(1 << 5)
#define PMHPR		(1 << 4)
#define MS		(1 << 3) /* master/slave select */
#define MCKO		(1 << 1)
#define PMPLL		(1 << 0)

#define PMHP_MASK	(PMHPL | PMHPR)
#define PMHP		PMHP_MASK

/* MD_CTL1 */
#define PLL3		(1 << 7)
#define PLL2		(1 << 6)
#define PLL1		(1 << 5)
#define PLL0		(1 << 4)
#define PLL_MASK	(PLL3 | PLL2 | PLL1 | PLL0)

#define BCKO_MASK	(1 << 3)
#define BCKO_64		BCKO_MASK

/* MD_CTL2 */
#define FS0		(1 << 0)
#define FS1		(1 << 1)
#define FS2		(1 << 2)
#define FS3		(1 << 5)
#define FS_MASK		(FS0 | FS1 | FS2 | FS3)


/*
 * Playback Volume (table 39)
 *
 * max : 0x00 : +12.0 dB
 *       ( 0.5 dB step )
 * min : 0xFE : -115.0 dB
 * mute: 0xFF
 */
static const DECLARE_TLV_DB_SCALE(out_tlv, -11500, 50, 1);

static const struct snd_kcontrol_new ak4642_snd_controls[] = {

	SOC_DOUBLE_R_TLV("Digital Playback Volume", L_DVC, R_DVC,
			 0, 0xFF, 1, out_tlv),
};


/* codec private data */
struct ak4642_priv {
	unsigned int sysclk;
	enum snd_soc_control_type control_type;
	void *control_data;
};

/*
 * ak4642 register cache
 */
static const u16 ak4642_reg[AK4642_CACHEREGNUM] = {
	0x0000, 0x0000, 0x0001, 0x0000,
	0x0002, 0x0000, 0x0000, 0x0000,
	0x00e1, 0x00e1, 0x0018, 0x0000,
	0x00e1, 0x0018, 0x0011, 0x0008,
	0x0000, 0x0000, 0x0000, 0x0000,
	0x0000, 0x0000, 0x0000, 0x0000,
	0x0000, 0x0000, 0x0000, 0x0000,
	0x0000, 0x0000, 0x0000, 0x0000,
	0x0000, 0x0000, 0x0000, 0x0000,
	0x0000,
};

/*
 * read ak4642 register cache
 */
static inline unsigned int ak4642_read_reg_cache(struct snd_soc_codec *codec,
	unsigned int reg)
{
	u16 *cache = codec->reg_cache;
	if (reg >= AK4642_CACHEREGNUM)
		return -1;
	return cache[reg];
}

/*
 * write ak4642 register cache
 */
static inline void ak4642_write_reg_cache(struct snd_soc_codec *codec,
	u16 reg, unsigned int value)
{
	u16 *cache = codec->reg_cache;
	if (reg >= AK4642_CACHEREGNUM)
		return;

	cache[reg] = value;
}

/*
 * write to the AK4642 register space
 */
static int ak4642_write(struct snd_soc_codec *codec, unsigned int reg,
	unsigned int value)
{
	u8 data[2];

	/* data is
	 *   D15..D8 AK4642 register offset
	 *   D7...D0 register data
	 */
	data[0] = reg & 0xff;
	data[1] = value & 0xff;

	if (codec->hw_write(codec->control_data, data, 2) == 2) {
		ak4642_write_reg_cache(codec, reg, value);
		return 0;
	} else
		return -EIO;
}

static int ak4642_sync(struct snd_soc_codec *codec)
{
	u16 *cache = codec->reg_cache;
	int i, r = 0;

	for (i = 0; i < AK4642_CACHEREGNUM; i++)
		r |= ak4642_write(codec, i, cache[i]);

	return r;
};

static int ak4642_dai_startup(struct snd_pcm_substream *substream,
			      struct snd_soc_dai *dai)
{
	int is_play = substream->stream == SNDRV_PCM_STREAM_PLAYBACK;
	struct snd_soc_codec *codec = dai->codec;

	if (is_play) {
		/*
		 * start headphone output
		 *
		 * PLL, Master Mode
		 * Audio I/F Format :MSB justified (ADC & DAC)
		 * Bass Boost Level : Middle
		 *
		 * This operation came from example code of
		 * "ASAHI KASEI AK4642" (japanese) manual p97.
		 */
		ak4642_write(codec, 0x0f, 0x09);
		ak4642_write(codec, 0x0e, 0x19);
		ak4642_write(codec, 0x09, 0x91);
		ak4642_write(codec, 0x0c, 0x91);
		ak4642_write(codec, 0x00, 0x64);
		snd_soc_update_bits(codec, PW_MGMT2, PMHP_MASK,	PMHP);
		snd_soc_update_bits(codec, PW_MGMT2, HPMTN,	HPMTN);
	} else {
		/*
		 * start stereo input
		 *
		 * PLL Master Mode
		 * Audio I/F Format:MSB justified (ADC & DAC)
		 * Pre MIC AMP:+20dB
		 * MIC Power On
		 * ALC setting:Refer to Table 35
		 * ALC bit=“1”
		 *
		 * This operation came from example code of
		 * "ASAHI KASEI AK4642" (japanese) manual p94.
		 */
		ak4642_write(codec, 0x02, 0x05);
		ak4642_write(codec, 0x06, 0x3c);
		ak4642_write(codec, 0x08, 0xe1);
		ak4642_write(codec, 0x0b, 0x00);
		ak4642_write(codec, 0x07, 0x21);
		ak4642_write(codec, 0x00, 0x41);
		ak4642_write(codec, 0x10, 0x01);
	}

	return 0;
}

static void ak4642_dai_shutdown(struct snd_pcm_substream *substream,
			       struct snd_soc_dai *dai)
{
	int is_play = substream->stream == SNDRV_PCM_STREAM_PLAYBACK;
	struct snd_soc_codec *codec = dai->codec;

	if (is_play) {
		/* stop headphone output */
		snd_soc_update_bits(codec, PW_MGMT2, HPMTN,	0);
		snd_soc_update_bits(codec, PW_MGMT2, PMHP_MASK,	0);
		ak4642_write(codec, 0x00, 0x40);
		ak4642_write(codec, 0x0e, 0x11);
		ak4642_write(codec, 0x0f, 0x08);
	} else {
		/* stop stereo input */
		ak4642_write(codec, 0x00, 0x40);
		ak4642_write(codec, 0x10, 0x00);
		ak4642_write(codec, 0x07, 0x01);
	}
}

static int ak4642_dai_set_sysclk(struct snd_soc_dai *codec_dai,
	int clk_id, unsigned int freq, int dir)
{
	struct snd_soc_codec *codec = codec_dai->codec;
	u8 pll;

	switch (freq) {
	case 11289600:
		pll = PLL2;
		break;
	case 12288000:
		pll = PLL2 | PLL0;
		break;
	case 12000000:
		pll = PLL2 | PLL1;
		break;
	case 24000000:
		pll = PLL2 | PLL1 | PLL0;
		break;
	case 13500000:
		pll = PLL3 | PLL2;
		break;
	case 27000000:
		pll = PLL3 | PLL2 | PLL0;
		break;
	default:
		return -EINVAL;
	}
	snd_soc_update_bits(codec, MD_CTL1, PLL_MASK, pll);

	return 0;
}

static int ak4642_dai_set_fmt(struct snd_soc_dai *dai, unsigned int fmt)
{
	struct snd_soc_codec *codec = dai->codec;
	u8 data;
	u8 bcko;

	data = MCKO | PMPLL; /* use MCKO */
	bcko = 0;

	/* set master/slave audio interface */
	switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) {
	case SND_SOC_DAIFMT_CBM_CFM:
		data |= MS;
		bcko = BCKO_64;
		break;
	case SND_SOC_DAIFMT_CBS_CFS:
		break;
	default:
		return -EINVAL;
	}
	snd_soc_update_bits(codec, PW_MGMT2, MS, data);
	snd_soc_update_bits(codec, MD_CTL1, BCKO_MASK, bcko);

	return 0;
}

static int ak4642_dai_hw_params(struct snd_pcm_substream *substream,
				struct snd_pcm_hw_params *params,
				struct snd_soc_dai *dai)
{
	struct snd_soc_codec *codec = dai->codec;
	u8 rate;

	switch (params_rate(params)) {
	case 7350:
		rate = FS2;
		break;
	case 8000:
		rate = 0;
		break;
	case 11025:
		rate = FS2 | FS0;
		break;
	case 12000:
		rate = FS0;
		break;
	case 14700:
		rate = FS2 | FS1;
		break;
	case 16000:
		rate = FS1;
		break;
	case 22050:
		rate = FS2 | FS1 | FS0;
		break;
	case 24000:
		rate = FS1 | FS0;
		break;
	case 29400:
		rate = FS3 | FS2 | FS1;
		break;
	case 32000:
		rate = FS3 | FS1;
		break;
	case 44100:
		rate = FS3 | FS2 | FS1 | FS0;
		break;
	case 48000:
		rate = FS3 | FS1 | FS0;
		break;
	default:
		return -EINVAL;
		break;
	}
	snd_soc_update_bits(codec, MD_CTL2, FS_MASK, rate);

	return 0;
}

static struct snd_soc_dai_ops ak4642_dai_ops = {
	.startup	= ak4642_dai_startup,
	.shutdown	= ak4642_dai_shutdown,
	.set_sysclk	= ak4642_dai_set_sysclk,
	.set_fmt	= ak4642_dai_set_fmt,
	.hw_params	= ak4642_dai_hw_params,
};

static struct snd_soc_dai_driver ak4642_dai = {
	.name = "ak4642-hifi",
	.playback = {
		.stream_name = "Playback",
		.channels_min = 1,
		.channels_max = 2,
		.rates = SNDRV_PCM_RATE_8000_48000,
		.formats = SNDRV_PCM_FMTBIT_S16_LE },
	.capture = {
		.stream_name = "Capture",
		.channels_min = 1,
		.channels_max = 2,
		.rates = SNDRV_PCM_RATE_8000_48000,
		.formats = SNDRV_PCM_FMTBIT_S16_LE },
	.ops = &ak4642_dai_ops,
	.symmetric_rates = 1,
};

static int ak4642_resume(struct snd_soc_codec *codec)
{
	ak4642_sync(codec);
	return 0;
}


static int ak4642_probe(struct snd_soc_codec *codec)
{
	struct ak4642_priv *ak4642 = snd_soc_codec_get_drvdata(codec);

	dev_info(codec->dev, "AK4642 Audio Codec %s", AK4642_VERSION);

	codec->hw_write		= (hw_write_t)i2c_master_send;
	codec->control_data = ak4642->control_data;

	snd_soc_add_controls(codec, ak4642_snd_controls,
			     ARRAY_SIZE(ak4642_snd_controls));

	return 0;
}

static struct snd_soc_codec_driver soc_codec_dev_ak4642 = {
	.probe =	ak4642_probe,
	.resume =	ak4642_resume,
	.read		= ak4642_read_reg_cache,
	.write		= ak4642_write,
	.reg_cache_size	= ARRAY_SIZE(ak4642_reg),
	.reg_word_size = sizeof(u8),
	.reg_cache_default	= ak4642_reg,
};

#if defined(CONFIG_I2C) || defined(CONFIG_I2C_MODULE)
static __devinit int ak4642_i2c_probe(struct i2c_client *i2c,
				      const struct i2c_device_id *id)
{
	struct ak4642_priv *ak4642;
	int ret;

	ak4642 = kzalloc(sizeof(struct ak4642_priv), GFP_KERNEL);
	if (ak4642 == NULL)
		return -ENOMEM;

	i2c_set_clientdata(i2c, ak4642);
	ak4642->control_data = i2c;
	ak4642->control_type = SND_SOC_I2C;

	ret =  snd_soc_register_codec(&i2c->dev,
			&soc_codec_dev_ak4642, &ak4642_dai, 1);
	if (ret < 0)
		kfree(ak4642);
	return ret;
}

static __devexit int ak4642_i2c_remove(struct i2c_client *client)
{
	snd_soc_unregister_codec(&client->dev);
	kfree(i2c_get_clientdata(client));
	return 0;
}

static const struct i2c_device_id ak4642_i2c_id[] = {
	{ "ak4642", 0 },
	{ "ak4643", 0 },
	{ }
};
MODULE_DEVICE_TABLE(i2c, ak4642_i2c_id);

static struct i2c_driver ak4642_i2c_driver = {
	.driver = {
		.name = "ak4642-codec",
		.owner = THIS_MODULE,
	},
	.probe =    ak4642_i2c_probe,
	.remove =   __devexit_p(ak4642_i2c_remove),
	.id_table = ak4642_i2c_id,
};
#endif

static int __init ak4642_modinit(void)
{
	int ret = 0;
#if defined(CONFIG_I2C) || defined(CONFIG_I2C_MODULE)
	ret = i2c_add_driver(&ak4642_i2c_driver);
#endif
	return ret;

}
module_init(ak4642_modinit);

static void __exit ak4642_exit(void)
{
#if defined(CONFIG_I2C) || defined(CONFIG_I2C_MODULE)
	i2c_del_driver(&ak4642_i2c_driver);
#endif

}
module_exit(ak4642_exit);

MODULE_DESCRIPTION("Soc AK4642 driver");
MODULE_AUTHOR("Kuninori Morimoto <morimoto.kuninori@renesas.com>");
MODULE_LICENSE("GPL");
Commit	Line	Data
a3a83d9a KM	1	/*
	2	* ak4642.c -- AK4642/AK4643 ALSA Soc Audio driver
	3	*
	4	* Copyright (C) 2009 Renesas Solutions Corp.
	5	* Kuninori Morimoto <morimoto.kuninori@renesas.com>
	6	*
	7	* Based on wm8731.c by Richard Purdie
	8	* Based on ak4535.c by Richard Purdie
	9	* Based on wm8753.c by Liam Girdwood
	10	*
	11	* This program is free software; you can redistribute it and/or modify
	12	* it under the terms of the GNU General Public License version 2 as
	13	* published by the Free Software Foundation.
	14	*/
	15
	16	/* CAUTION
	17	*
	18	* This is very simple driver.
	19	* It can use headphone output / stereo input only
	20	*
	21	* AK4642 is not tested.
	22	* AK4643 is tested.
	23	*/
	24
a3a83d9a	25	#include <linux/delay.h>
a3a83d9a KM	26	#include <linux/i2c.h>
a3a83d9a KM	27	#include <linux/platform_device.h>
5a0e3ad6	28	#include <linux/slab.h>
a3a83d9a KM	29	#include <sound/soc-dapm.h>
a3a83d9a KM	30	#include <sound/initval.h>
a300de3c	31	#include <sound/tlv.h>
a3a83d9a	32
a3a83d9a KM	33	#define AK4642_VERSION "0.0.1"
	34
	35	#define PW_MGMT1 0x00
	36	#define PW_MGMT2 0x01
	37	#define SG_SL1 0x02
	38	#define SG_SL2 0x03
	39	#define MD_CTL1 0x04
	40	#define MD_CTL2 0x05
	41	#define TIMER 0x06
	42	#define ALC_CTL1 0x07
	43	#define ALC_CTL2 0x08
	44	#define L_IVC 0x09
	45	#define L_DVC 0x0a
	46	#define ALC_CTL3 0x0b
	47	#define R_IVC 0x0c
	48	#define R_DVC 0x0d
	49	#define MD_CTL3 0x0e
	50	#define MD_CTL4 0x0f
	51	#define PW_MGMT3 0x10
	52	#define DF_S 0x11
	53	#define FIL3_0 0x12
	54	#define FIL3_1 0x13
	55	#define FIL3_2 0x14
	56	#define FIL3_3 0x15
	57	#define EQ_0 0x16
	58	#define EQ_1 0x17
	59	#define EQ_2 0x18
	60	#define EQ_3 0x19
	61	#define EQ_4 0x1a
	62	#define EQ_5 0x1b
	63	#define FIL1_0 0x1c
	64	#define FIL1_1 0x1d
	65	#define FIL1_2 0x1e
	66	#define FIL1_3 0x1f
	67	#define PW_MGMT4 0x20
	68	#define MD_CTL5 0x21
	69	#define LO_MS 0x22
	70	#define HP_MS 0x23
	71	#define SPK_MS 0x24
	72
	73	#define AK4642_CACHEREGNUM 0x25
	74
0643ce8f KM	75	/* PW_MGMT2 */
	76	#define HPMTN (1 << 6)
	77	#define PMHPL (1 << 5)
	78	#define PMHPR (1 << 4)
	79	#define MS (1 << 3) /* master/slave select */
	80	#define MCKO (1 << 1)
	81	#define PMPLL (1 << 0)
	82
	83	#define PMHP_MASK (PMHPL \| PMHPR)
	84	#define PMHP PMHP_MASK
	85
4b6316b4 KM	86	/* MD_CTL1 */
	87	#define PLL3 (1 << 7)
	88	#define PLL2 (1 << 6)
	89	#define PLL1 (1 << 5)
	90	#define PLL0 (1 << 4)
	91	#define PLL_MASK (PLL3 \| PLL2 \| PLL1 \| PLL0)
	92
0643ce8f KM	93	#define BCKO_MASK (1 << 3)
	94	#define BCKO_64 BCKO_MASK
	95
1ad747ca KM	96	/* MD_CTL2 */
	97	#define FS0 (1 << 0)
	98	#define FS1 (1 << 1)
	99	#define FS2 (1 << 2)
	100	#define FS3 (1 << 5)
	101	#define FS_MASK (FS0 \| FS1 \| FS2 \| FS3)
	102
a3a83d9a	103
a300de3c KM	104	/*
	105	* Playback Volume (table 39)
	106	*
	107	* max : 0x00 : +12.0 dB
	108	* ( 0.5 dB step )
	109	* min : 0xFE : -115.0 dB
	110	* mute: 0xFF
	111	*/
	112	static const DECLARE_TLV_DB_SCALE(out_tlv, -11500, 50, 1);
	113
	114	static const struct snd_kcontrol_new ak4642_snd_controls[] = {
	115
	116	SOC_DOUBLE_R_TLV("Digital Playback Volume", L_DVC, R_DVC,
	117	0, 0xFF, 1, out_tlv),
	118	};
	119
	120
a3a83d9a KM	121	/* codec private data */
a3a83d9a KM	122	struct ak4642_priv {
f0fba2ad LG	123	unsigned int sysclk;
	124	enum snd_soc_control_type control_type;
	125	void *control_data;
a3a83d9a KM	126	};
a3a83d9a KM	127
a3a83d9a KM	128	/*
	129	* ak4642 register cache
	130	*/
	131	static const u16 ak4642_reg[AK4642_CACHEREGNUM] = {
	132	0x0000, 0x0000, 0x0001, 0x0000,
	133	0x0002, 0x0000, 0x0000, 0x0000,
	134	0x00e1, 0x00e1, 0x0018, 0x0000,
	135	0x00e1, 0x0018, 0x0011, 0x0008,
	136	0x0000, 0x0000, 0x0000, 0x0000,
	137	0x0000, 0x0000, 0x0000, 0x0000,
	138	0x0000, 0x0000, 0x0000, 0x0000,
	139	0x0000, 0x0000, 0x0000, 0x0000,
	140	0x0000, 0x0000, 0x0000, 0x0000,
	141	0x0000,
	142	};
	143
	144	/*
	145	* read ak4642 register cache
	146	*/
	147	static inline unsigned int ak4642_read_reg_cache(struct snd_soc_codec *codec,
	148	unsigned int reg)
	149	{
	150	u16 *cache = codec->reg_cache;
	151	if (reg >= AK4642_CACHEREGNUM)
	152	return -1;
	153	return cache[reg];
	154	}
	155
	156	/*
	157	* write ak4642 register cache
	158	*/
	159	static inline void ak4642_write_reg_cache(struct snd_soc_codec *codec,
	160	u16 reg, unsigned int value)
	161	{
	162	u16 *cache = codec->reg_cache;
	163	if (reg >= AK4642_CACHEREGNUM)
	164	return;
	165
	166	cache[reg] = value;
	167	}
	168
	169	/*
	170	* write to the AK4642 register space
	171	*/
	172	static int ak4642_write(struct snd_soc_codec *codec, unsigned int reg,
	173	unsigned int value)
	174	{
	175	u8 data[2];
	176
	177	/* data is
	178	* D15..D8 AK4642 register offset
	179	* D7...D0 register data
	180	*/
	181	data[0] = reg & 0xff;
	182	data[1] = value & 0xff;
	183
	184	if (codec->hw_write(codec->control_data, data, 2) == 2) {
	185	ak4642_write_reg_cache(codec, reg, value);
	186	return 0;
	187	} else
	188	return -EIO;
	189	}
	190
	191	static int ak4642_sync(struct snd_soc_codec *codec)
192	{
193	u16 *cache = codec->reg_cache;
194	int i, r = 0;
195
196	for (i = 0; i < AK4642_CACHEREGNUM; i++)
197	r \|= ak4642_write(codec, i, cache[i]);
198
199	return r;
200	};
201
202	static int ak4642_dai_startup(struct snd_pcm_substream *substream,
203	struct snd_soc_dai *dai)
204	{
205	int is_play = substream->stream == SNDRV_PCM_STREAM_PLAYBACK;
206	struct snd_soc_codec *codec = dai->codec;
207
208	if (is_play) {
209	/*
210	* start headphone output
211	*
212	* PLL, Master Mode
213	* Audio I/F Format :MSB justified (ADC & DAC)
a3a83d9a KM	214	* Bass Boost Level : Middle
	215	*
	216	* This operation came from example code of
	217	* "ASAHI KASEI AK4642" (japanese) manual p97.
a3a83d9a	218	*/
a3a83d9a KM	219	ak4642_write(codec, 0x0f, 0x09);
	220	ak4642_write(codec, 0x0e, 0x19);
	221	ak4642_write(codec, 0x09, 0x91);
	222	ak4642_write(codec, 0x0c, 0x91);
a3a83d9a	223	ak4642_write(codec, 0x00, 0x64);
0643ce8f KM	224	snd_soc_update_bits(codec, PW_MGMT2, PMHP_MASK, PMHP);
0643ce8f KM	225	snd_soc_update_bits(codec, PW_MGMT2, HPMTN, HPMTN);
a3a83d9a KM	226	} else {
	227	/*
	228	* start stereo input
	229	*
	230	* PLL Master Mode
	231	* Audio I/F Format:MSB justified (ADC & DAC)
a3a83d9a KM	232	* Pre MIC AMP:+20dB
	233	* MIC Power On
	234	* ALC setting:Refer to Table 35
	235	* ALC bit=“1”
	236	*
	237	* This operation came from example code of
	238	* "ASAHI KASEI AK4642" (japanese) manual p94.
	239	*/
a3a83d9a KM	240	ak4642_write(codec, 0x02, 0x05);
	241	ak4642_write(codec, 0x06, 0x3c);
	242	ak4642_write(codec, 0x08, 0xe1);
	243	ak4642_write(codec, 0x0b, 0x00);
	244	ak4642_write(codec, 0x07, 0x21);
	245	ak4642_write(codec, 0x00, 0x41);
	246	ak4642_write(codec, 0x10, 0x01);
	247	}
	248
	249	return 0;
	250	}
	251
	252	static void ak4642_dai_shutdown(struct snd_pcm_substream *substream,
	253	struct snd_soc_dai *dai)
	254	{
	255	int is_play = substream->stream == SNDRV_PCM_STREAM_PLAYBACK;
	256	struct snd_soc_codec *codec = dai->codec;
	257
	258	if (is_play) {
	259	/* stop headphone output */
0643ce8f KM	260	snd_soc_update_bits(codec, PW_MGMT2, HPMTN, 0);
0643ce8f KM	261	snd_soc_update_bits(codec, PW_MGMT2, PMHP_MASK, 0);
a3a83d9a KM	262	ak4642_write(codec, 0x00, 0x40);
	263	ak4642_write(codec, 0x0e, 0x11);
	264	ak4642_write(codec, 0x0f, 0x08);
	265	} else {
	266	/* stop stereo input */
	267	ak4642_write(codec, 0x00, 0x40);
	268	ak4642_write(codec, 0x10, 0x00);
	269	ak4642_write(codec, 0x07, 0x01);
	270	}
	271	}
	272
	273	static int ak4642_dai_set_sysclk(struct snd_soc_dai *codec_dai,
	274	int clk_id, unsigned int freq, int dir)
	275	{
	276	struct snd_soc_codec *codec = codec_dai->codec;
4b6316b4 KM	277	u8 pll;
	278
	279	switch (freq) {
	280	case 11289600:
	281	pll = PLL2;
	282	break;
	283	case 12288000:
	284	pll = PLL2 \| PLL0;
	285	break;
	286	case 12000000:
	287	pll = PLL2 \| PLL1;
	288	break;
	289	case 24000000:
	290	pll = PLL2 \| PLL1 \| PLL0;
	291	break;
	292	case 13500000:
	293	pll = PLL3 \| PLL2;
	294	break;
	295	case 27000000:
	296	pll = PLL3 \| PLL2 \| PLL0;
	297	break;
	298	default:
	299	return -EINVAL;
	300	}
	301	snd_soc_update_bits(codec, MD_CTL1, PLL_MASK, pll);
a3a83d9a	302
a3a83d9a KM	303	return 0;
	304	}
	305
0643ce8f KM	306	static int ak4642_dai_set_fmt(struct snd_soc_dai *dai, unsigned int fmt)
	307	{
	308	struct snd_soc_codec *codec = dai->codec;
	309	u8 data;
	310	u8 bcko;
	311
	312	data = MCKO \| PMPLL; /* use MCKO */
	313	bcko = 0;
	314
	315	/* set master/slave audio interface */
	316	switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) {
	317	case SND_SOC_DAIFMT_CBM_CFM:
	318	data \|= MS;
	319	bcko = BCKO_64;
	320	break;
	321	case SND_SOC_DAIFMT_CBS_CFS:
	322	break;
	323	default:
	324	return -EINVAL;
	325	}
	326	snd_soc_update_bits(codec, PW_MGMT2, MS, data);
	327	snd_soc_update_bits(codec, MD_CTL1, BCKO_MASK, bcko);
	328
	329	return 0;
	330	}
	331
1ad747ca KM	332	static int ak4642_dai_hw_params(struct snd_pcm_substream *substream,
	333	struct snd_pcm_hw_params *params,
	334	struct snd_soc_dai *dai)
	335	{
	336	struct snd_soc_codec *codec = dai->codec;
	337	u8 rate;
	338
	339	switch (params_rate(params)) {
	340	case 7350:
	341	rate = FS2;
	342	break;
	343	case 8000:
	344	rate = 0;
	345	break;
	346	case 11025:
	347	rate = FS2 \| FS0;
	348	break;
	349	case 12000:
	350	rate = FS0;
	351	break;
	352	case 14700:
	353	rate = FS2 \| FS1;
	354	break;
	355	case 16000:
	356	rate = FS1;
	357	break;
	358	case 22050:
	359	rate = FS2 \| FS1 \| FS0;
	360	break;
	361	case 24000:
	362	rate = FS1 \| FS0;
	363	break;
	364	case 29400:
	365	rate = FS3 \| FS2 \| FS1;
	366	break;
	367	case 32000:
	368	rate = FS3 \| FS1;
	369	break;
	370	case 44100:
	371	rate = FS3 \| FS2 \| FS1 \| FS0;
	372	break;
	373	case 48000:
	374	rate = FS3 \| FS1 \| FS0;
	375	break;
	376	default:
	377	return -EINVAL;
	378	break;
	379	}
	380	snd_soc_update_bits(codec, MD_CTL2, FS_MASK, rate);
a3a83d9a	381
a3a83d9a KM	382	return 0;
	383	}
	384
	385	static struct snd_soc_dai_ops ak4642_dai_ops = {
	386	.startup = ak4642_dai_startup,
	387	.shutdown = ak4642_dai_shutdown,
	388	.set_sysclk = ak4642_dai_set_sysclk,
0643ce8f	389	.set_fmt = ak4642_dai_set_fmt,
1ad747ca	390	.hw_params = ak4642_dai_hw_params,
a3a83d9a KM	391	};
a3a83d9a KM	392
f0fba2ad LG	393	static struct snd_soc_dai_driver ak4642_dai = {
f0fba2ad LG	394	.name = "ak4642-hifi",
a3a83d9a KM	395	.playback = {
	396	.stream_name = "Playback",
	397	.channels_min = 1,
	398	.channels_max = 2,
	399	.rates = SNDRV_PCM_RATE_8000_48000,
	400	.formats = SNDRV_PCM_FMTBIT_S16_LE },
	401	.capture = {
	402	.stream_name = "Capture",
	403	.channels_min = 1,
	404	.channels_max = 2,
	405	.rates = SNDRV_PCM_RATE_8000_48000,
	406	.formats = SNDRV_PCM_FMTBIT_S16_LE },
	407	.ops = &ak4642_dai_ops,
1ad747ca	408	.symmetric_rates = 1,
a3a83d9a	409	};
a3a83d9a	410
f0fba2ad	411	static int ak4642_resume(struct snd_soc_codec *codec)
a3a83d9a	412	{
a3a83d9a KM	413	ak4642_sync(codec);
	414	return 0;
	415	}
	416
f0fba2ad LG	417
f0fba2ad LG	418	static int ak4642_probe(struct snd_soc_codec *codec)
a3a83d9a	419	{
f0fba2ad	420	struct ak4642_priv *ak4642 = snd_soc_codec_get_drvdata(codec);
a3a83d9a	421
f0fba2ad	422	dev_info(codec->dev, "AK4642 Audio Codec %s", AK4642_VERSION);
a3a83d9a	423
a3a83d9a	424	codec->hw_write = (hw_write_t)i2c_master_send;
f0fba2ad	425	codec->control_data = ak4642->control_data;
a3a83d9a	426
73bb379f KM	427	snd_soc_add_controls(codec, ak4642_snd_controls,
73bb379f KM	428	ARRAY_SIZE(ak4642_snd_controls));
a3a83d9a	429
f0fba2ad	430	return 0;
a3a83d9a KM	431	}
a3a83d9a KM	432
f0fba2ad LG	433	static struct snd_soc_codec_driver soc_codec_dev_ak4642 = {
	434	.probe = ak4642_probe,
	435	.resume = ak4642_resume,
	436	.read = ak4642_read_reg_cache,
	437	.write = ak4642_write,
	438	.reg_cache_size = ARRAY_SIZE(ak4642_reg),
	439	.reg_word_size = sizeof(u8),
	440	.reg_cache_default = ak4642_reg,
	441	};
	442
a3a83d9a	443	#if defined(CONFIG_I2C) \|\| defined(CONFIG_I2C_MODULE)
f0fba2ad LG	444	static __devinit int ak4642_i2c_probe(struct i2c_client *i2c,
f0fba2ad LG	445	const struct i2c_device_id *id)
a3a83d9a KM	446	{
a3a83d9a KM	447	struct ak4642_priv *ak4642;
a3a83d9a KM	448	int ret;
	449
	450	ak4642 = kzalloc(sizeof(struct ak4642_priv), GFP_KERNEL);
f0fba2ad	451	if (ak4642 == NULL)
a3a83d9a KM	452	return -ENOMEM;
a3a83d9a KM	453
a3a83d9a	454	i2c_set_clientdata(i2c, ak4642);
f0fba2ad LG	455	ak4642->control_data = i2c;
f0fba2ad LG	456	ak4642->control_type = SND_SOC_I2C;
a3a83d9a	457
f0fba2ad LG	458	ret = snd_soc_register_codec(&i2c->dev,
	459	&soc_codec_dev_ak4642, &ak4642_dai, 1);
	460	if (ret < 0)
7bcaad91	461	kfree(ak4642);
a3a83d9a KM	462	return ret;
	463	}
	464
f0fba2ad	465	static __devexit int ak4642_i2c_remove(struct i2c_client *client)
a3a83d9a	466	{
f0fba2ad LG	467	snd_soc_unregister_codec(&client->dev);
f0fba2ad LG	468	kfree(i2c_get_clientdata(client));
a3a83d9a KM	469	return 0;
	470	}
	471
	472	static const struct i2c_device_id ak4642_i2c_id[] = {
	473	{ "ak4642", 0 },
	474	{ "ak4643", 0 },
	475	{ }
	476	};
	477	MODULE_DEVICE_TABLE(i2c, ak4642_i2c_id);
	478
	479	static struct i2c_driver ak4642_i2c_driver = {
	480	.driver = {
f0fba2ad	481	.name = "ak4642-codec",
a3a83d9a KM	482	.owner = THIS_MODULE,
a3a83d9a KM	483	},
f0fba2ad LG	484	.probe = ak4642_i2c_probe,
	485	.remove = __devexit_p(ak4642_i2c_remove),
	486	.id_table = ak4642_i2c_id,
a3a83d9a	487	};
a3a83d9a KM	488	#endif
a3a83d9a KM	489
a3a83d9a KM	490	static int __init ak4642_modinit(void)
a3a83d9a KM	491	{
1cf86f6f	492	int ret = 0;
a3a83d9a KM	493	#if defined(CONFIG_I2C) \|\| defined(CONFIG_I2C_MODULE)
	494	ret = i2c_add_driver(&ak4642_i2c_driver);
	495	#endif
	496	return ret;
	497
	498	}
	499	module_init(ak4642_modinit);
	500
	501	static void __exit ak4642_exit(void)
	502	{
	503	#if defined(CONFIG_I2C) \|\| defined(CONFIG_I2C_MODULE)
	504	i2c_del_driver(&ak4642_i2c_driver);
	505	#endif
	506
	507	}
	508	module_exit(ak4642_exit);
	509
	510	MODULE_DESCRIPTION("Soc AK4642 driver");
	511	MODULE_AUTHOR("Kuninori Morimoto <morimoto.kuninori@renesas.com>");
	512	MODULE_LICENSE("GPL");