ASoC: hdac_hdmi: parse eld for channel map capability
[deliverable/linux.git] / sound / soc / codecs / hdac_hdmi.c
CommitLineData
18382ead
SP
1/*
2 * hdac_hdmi.c - ASoc HDA-HDMI codec driver for Intel platforms
3 *
4 * Copyright (C) 2014-2015 Intel Corp
5 * Author: Samreen Nilofer <samreen.nilofer@intel.com>
6 * Subhransu S. Prusty <subhransu.s.prusty@intel.com>
7 * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
8 *
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License as published by
11 * the Free Software Foundation; version 2 of the License.
12 *
13 * This program is distributed in the hope that it will be useful, but
14 * WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
16 * General Public License for more details.
17 *
18 * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
19 */
20#include <linux/init.h>
21#include <linux/delay.h>
22#include <linux/module.h>
23#include <linux/pm_runtime.h>
a657f1d0 24#include <linux/hdmi.h>
2428bca3 25#include <drm/drm_edid.h>
18382ead 26#include <sound/pcm_params.h>
4a3478de 27#include <sound/jack.h>
18382ead
SP
28#include <sound/soc.h>
29#include <sound/hdaudio_ext.h>
07f083ab 30#include <sound/hda_i915.h>
2428bca3 31#include <sound/pcm_drm_eld.h>
18382ead 32#include "../../hda/local.h"
4a3478de 33#include "hdac_hdmi.h"
18382ead 34
17a42c45
SP
35#define NAME_SIZE 32
36
b0362adb
SP
37#define AMP_OUT_MUTE 0xb080
38#define AMP_OUT_UNMUTE 0xb000
18382ead 39#define PIN_OUT (AC_PINCTL_OUT_EN)
b0362adb 40
18382ead
SP
41#define HDA_MAX_CONNECTIONS 32
42
148569fd
SP
43#define HDA_MAX_CVTS 3
44
b8a54545
SP
45#define ELD_MAX_SIZE 256
46#define ELD_FIXED_BYTES 20
47
18382ead
SP
48struct hdac_hdmi_cvt_params {
49 unsigned int channels_min;
50 unsigned int channels_max;
51 u32 rates;
52 u64 formats;
53 unsigned int maxbps;
54};
55
56struct hdac_hdmi_cvt {
15b91447 57 struct list_head head;
18382ead 58 hda_nid_t nid;
4a3478de 59 const char *name;
18382ead
SP
60 struct hdac_hdmi_cvt_params params;
61};
62
b7756ede
SP
63/* Currently only spk_alloc, more to be added */
64struct hdac_hdmi_parsed_eld {
65 u8 spk_alloc;
66};
67
b8a54545
SP
68struct hdac_hdmi_eld {
69 bool monitor_present;
70 bool eld_valid;
71 int eld_size;
72 char eld_buffer[ELD_MAX_SIZE];
b7756ede 73 struct hdac_hdmi_parsed_eld info;
b8a54545
SP
74};
75
18382ead 76struct hdac_hdmi_pin {
15b91447 77 struct list_head head;
18382ead
SP
78 hda_nid_t nid;
79 int num_mux_nids;
80 hda_nid_t mux_nids[HDA_MAX_CONNECTIONS];
b8a54545
SP
81 struct hdac_hdmi_eld eld;
82 struct hdac_ext_device *edev;
83 int repoll_count;
84 struct delayed_work work;
18382ead
SP
85};
86
4a3478de
JK
87struct hdac_hdmi_pcm {
88 struct list_head head;
89 int pcm_id;
90 struct hdac_hdmi_pin *pin;
91 struct hdac_hdmi_cvt *cvt;
92 struct snd_jack *jack;
93};
94
18382ead
SP
95struct hdac_hdmi_dai_pin_map {
96 int dai_id;
15b91447
SP
97 struct hdac_hdmi_pin *pin;
98 struct hdac_hdmi_cvt *cvt;
18382ead
SP
99};
100
101struct hdac_hdmi_priv {
148569fd 102 struct hdac_hdmi_dai_pin_map dai_map[HDA_MAX_CVTS];
15b91447
SP
103 struct list_head pin_list;
104 struct list_head cvt_list;
4a3478de 105 struct list_head pcm_list;
15b91447
SP
106 int num_pin;
107 int num_cvt;
4a3478de 108 struct mutex pin_mutex;
18382ead
SP
109};
110
e342ac08
SP
111static inline struct hdac_ext_device *to_hda_ext_device(struct device *dev)
112{
51b2c425 113 struct hdac_device *hdac = dev_to_hdac_dev(dev);
e342ac08 114
51b2c425 115 return to_ehdac_device(hdac);
e342ac08
SP
116}
117
2428bca3
SP
118static unsigned int sad_format(const u8 *sad)
119{
120 return ((sad[0] >> 0x3) & 0x1f);
121}
122
123static unsigned int sad_sample_bits_lpcm(const u8 *sad)
124{
125 return (sad[2] & 7);
126}
127
128static int hdac_hdmi_eld_limit_formats(struct snd_pcm_runtime *runtime,
129 void *eld)
130{
131 u64 formats = SNDRV_PCM_FMTBIT_S16;
132 int i;
133 const u8 *sad, *eld_buf = eld;
134
135 sad = drm_eld_sad(eld_buf);
136 if (!sad)
137 goto format_constraint;
138
139 for (i = drm_eld_sad_count(eld_buf); i > 0; i--, sad += 3) {
140 if (sad_format(sad) == 1) { /* AUDIO_CODING_TYPE_LPCM */
141
142 /*
143 * the controller support 20 and 24 bits in 32 bit
144 * container so we set S32
145 */
146 if (sad_sample_bits_lpcm(sad) & 0x6)
147 formats |= SNDRV_PCM_FMTBIT_S32;
148 }
149 }
150
151format_constraint:
152 return snd_pcm_hw_constraint_mask64(runtime, SNDRV_PCM_HW_PARAM_FORMAT,
153 formats);
154
155}
156
b8a54545
SP
157 /* HDMI ELD routines */
158static unsigned int hdac_hdmi_get_eld_data(struct hdac_device *codec,
159 hda_nid_t nid, int byte_index)
160{
161 unsigned int val;
162
163 val = snd_hdac_codec_read(codec, nid, 0, AC_VERB_GET_HDMI_ELDD,
164 byte_index);
165
166 dev_dbg(&codec->dev, "HDMI: ELD data byte %d: 0x%x\n",
167 byte_index, val);
168
169 return val;
170}
171
172static int hdac_hdmi_get_eld_size(struct hdac_device *codec, hda_nid_t nid)
173{
174 return snd_hdac_codec_read(codec, nid, 0, AC_VERB_GET_HDMI_DIP_SIZE,
175 AC_DIPSIZE_ELD_BUF);
176}
177
178/*
179 * This function queries the ELD size and ELD data and fills in the buffer
180 * passed by user
181 */
182static int hdac_hdmi_get_eld(struct hdac_device *codec, hda_nid_t nid,
183 unsigned char *buf, int *eld_size)
184{
185 int i, size, ret = 0;
186
187 /*
188 * ELD size is initialized to zero in caller function. If no errors and
189 * ELD is valid, actual eld_size is assigned.
190 */
191
192 size = hdac_hdmi_get_eld_size(codec, nid);
193 if (size < ELD_FIXED_BYTES || size > ELD_MAX_SIZE) {
194 dev_err(&codec->dev, "HDMI: invalid ELD buf size %d\n", size);
195 return -ERANGE;
196 }
197
198 /* set ELD buffer */
199 for (i = 0; i < size; i++) {
200 unsigned int val = hdac_hdmi_get_eld_data(codec, nid, i);
201 /*
202 * Graphics driver might be writing to ELD buffer right now.
203 * Just abort. The caller will repoll after a while.
204 */
205 if (!(val & AC_ELDD_ELD_VALID)) {
206 dev_err(&codec->dev,
207 "HDMI: invalid ELD data byte %d\n", i);
208 ret = -EINVAL;
209 goto error;
210 }
211 val &= AC_ELDD_ELD_DATA;
212 /*
213 * The first byte cannot be zero. This can happen on some DVI
214 * connections. Some Intel chips may also need some 250ms delay
215 * to return non-zero ELD data, even when the graphics driver
216 * correctly writes ELD content before setting ELD_valid bit.
217 */
218 if (!val && !i) {
219 dev_err(&codec->dev, "HDMI: 0 ELD data\n");
220 ret = -EINVAL;
221 goto error;
222 }
223 buf[i] = val;
224 }
225
226 *eld_size = size;
227error:
228 return ret;
229}
230
b0362adb
SP
231static int hdac_hdmi_setup_stream(struct hdac_ext_device *hdac,
232 hda_nid_t cvt_nid, hda_nid_t pin_nid,
233 u32 stream_tag, int format)
234{
235 unsigned int val;
236
237 dev_dbg(&hdac->hdac.dev, "cvt nid %d pnid %d stream %d format 0x%x\n",
238 cvt_nid, pin_nid, stream_tag, format);
239
240 val = (stream_tag << 4);
241
242 snd_hdac_codec_write(&hdac->hdac, cvt_nid, 0,
243 AC_VERB_SET_CHANNEL_STREAMID, val);
244 snd_hdac_codec_write(&hdac->hdac, cvt_nid, 0,
245 AC_VERB_SET_STREAM_FORMAT, format);
246
247 return 0;
248}
249
a657f1d0
SP
250static void
251hdac_hdmi_set_dip_index(struct hdac_ext_device *hdac, hda_nid_t pin_nid,
252 int packet_index, int byte_index)
253{
254 int val;
255
256 val = (packet_index << 5) | (byte_index & 0x1f);
257
258 snd_hdac_codec_write(&hdac->hdac, pin_nid, 0,
259 AC_VERB_SET_HDMI_DIP_INDEX, val);
260}
261
478f544e
SP
262struct dp_audio_infoframe {
263 u8 type; /* 0x84 */
264 u8 len; /* 0x1b */
265 u8 ver; /* 0x11 << 2 */
266
267 u8 CC02_CT47; /* match with HDMI infoframe from this on */
268 u8 SS01_SF24;
269 u8 CXT04;
270 u8 CA;
271 u8 LFEPBL01_LSV36_DM_INH7;
272};
273
a657f1d0
SP
274static int hdac_hdmi_setup_audio_infoframe(struct hdac_ext_device *hdac,
275 hda_nid_t cvt_nid, hda_nid_t pin_nid)
276{
277 uint8_t buffer[HDMI_INFOFRAME_HEADER_SIZE + HDMI_AUDIO_INFOFRAME_SIZE];
278 struct hdmi_audio_infoframe frame;
478f544e
SP
279 struct dp_audio_infoframe dp_ai;
280 struct hdac_hdmi_priv *hdmi = hdac->private_data;
281 struct hdac_hdmi_pin *pin;
282 u8 *dip;
a657f1d0
SP
283 int ret;
284 int i;
478f544e
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285 const u8 *eld_buf;
286 u8 conn_type;
287 int channels = 2;
a657f1d0 288
478f544e
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289 list_for_each_entry(pin, &hdmi->pin_list, head) {
290 if (pin->nid == pin_nid)
291 break;
292 }
a657f1d0 293
478f544e
SP
294 eld_buf = pin->eld.eld_buffer;
295 conn_type = drm_eld_get_conn_type(eld_buf);
a657f1d0
SP
296
297 /* setup channel count */
298 snd_hdac_codec_write(&hdac->hdac, cvt_nid, 0,
478f544e
SP
299 AC_VERB_SET_CVT_CHAN_COUNT, channels - 1);
300
301 switch (conn_type) {
302 case DRM_ELD_CONN_TYPE_HDMI:
303 hdmi_audio_infoframe_init(&frame);
304
305 /* Default stereo for now */
306 frame.channels = channels;
307
308 ret = hdmi_audio_infoframe_pack(&frame, buffer, sizeof(buffer));
309 if (ret < 0)
310 return ret;
a657f1d0 311
478f544e
SP
312 break;
313
314 case DRM_ELD_CONN_TYPE_DP:
315 memset(&dp_ai, 0, sizeof(dp_ai));
316 dp_ai.type = 0x84;
317 dp_ai.len = 0x1b;
318 dp_ai.ver = 0x11 << 2;
319 dp_ai.CC02_CT47 = channels - 1;
320 dp_ai.CA = 0;
321
322 dip = (u8 *)&dp_ai;
323 break;
324
325 default:
326 dev_err(&hdac->hdac.dev, "Invalid connection type: %d\n",
327 conn_type);
328 return -EIO;
329 }
a657f1d0
SP
330
331 /* stop infoframe transmission */
332 hdac_hdmi_set_dip_index(hdac, pin_nid, 0x0, 0x0);
333 snd_hdac_codec_write(&hdac->hdac, pin_nid, 0,
334 AC_VERB_SET_HDMI_DIP_XMIT, AC_DIPXMIT_DISABLE);
335
336
337 /* Fill infoframe. Index auto-incremented */
338 hdac_hdmi_set_dip_index(hdac, pin_nid, 0x0, 0x0);
478f544e 339 if (conn_type == DRM_ELD_CONN_TYPE_HDMI) {
391005e8 340 for (i = 0; i < sizeof(buffer); i++)
478f544e 341 snd_hdac_codec_write(&hdac->hdac, pin_nid, 0,
391005e8 342 AC_VERB_SET_HDMI_DIP_DATA, buffer[i]);
478f544e
SP
343 } else {
344 for (i = 0; i < sizeof(dp_ai); i++)
345 snd_hdac_codec_write(&hdac->hdac, pin_nid, 0,
a657f1d0 346 AC_VERB_SET_HDMI_DIP_DATA, dip[i]);
478f544e 347 }
a657f1d0
SP
348
349 /* Start infoframe */
350 hdac_hdmi_set_dip_index(hdac, pin_nid, 0x0, 0x0);
351 snd_hdac_codec_write(&hdac->hdac, pin_nid, 0,
352 AC_VERB_SET_HDMI_DIP_XMIT, AC_DIPXMIT_BEST);
353
354 return 0;
355}
356
b0362adb
SP
357static void hdac_hdmi_set_power_state(struct hdac_ext_device *edev,
358 struct hdac_hdmi_dai_pin_map *dai_map, unsigned int pwr_state)
359{
360 /* Power up pin widget */
15b91447
SP
361 if (!snd_hdac_check_power_state(&edev->hdac, dai_map->pin->nid,
362 pwr_state))
363 snd_hdac_codec_write(&edev->hdac, dai_map->pin->nid, 0,
b0362adb
SP
364 AC_VERB_SET_POWER_STATE, pwr_state);
365
366 /* Power up converter */
15b91447
SP
367 if (!snd_hdac_check_power_state(&edev->hdac, dai_map->cvt->nid,
368 pwr_state))
369 snd_hdac_codec_write(&edev->hdac, dai_map->cvt->nid, 0,
b0362adb
SP
370 AC_VERB_SET_POWER_STATE, pwr_state);
371}
372
373static int hdac_hdmi_playback_prepare(struct snd_pcm_substream *substream,
374 struct snd_soc_dai *dai)
375{
376 struct hdac_ext_device *hdac = snd_soc_dai_get_drvdata(dai);
377 struct hdac_hdmi_priv *hdmi = hdac->private_data;
378 struct hdac_hdmi_dai_pin_map *dai_map;
379 struct hdac_ext_dma_params *dd;
a657f1d0 380 int ret;
b0362adb 381
b0362adb
SP
382 dai_map = &hdmi->dai_map[dai->id];
383
384 dd = (struct hdac_ext_dma_params *)snd_soc_dai_get_dma_data(dai, substream);
385 dev_dbg(&hdac->hdac.dev, "stream tag from cpu dai %d format in cvt 0x%x\n",
386 dd->stream_tag, dd->format);
387
15b91447
SP
388 ret = hdac_hdmi_setup_audio_infoframe(hdac, dai_map->cvt->nid,
389 dai_map->pin->nid);
a657f1d0
SP
390 if (ret < 0)
391 return ret;
392
15b91447
SP
393 return hdac_hdmi_setup_stream(hdac, dai_map->cvt->nid,
394 dai_map->pin->nid, dd->stream_tag, dd->format);
b0362adb
SP
395}
396
397static int hdac_hdmi_set_hw_params(struct snd_pcm_substream *substream,
398 struct snd_pcm_hw_params *hparams, struct snd_soc_dai *dai)
399{
400 struct hdac_ext_device *hdac = snd_soc_dai_get_drvdata(dai);
54dfa1ea
SP
401 struct hdac_hdmi_priv *hdmi = hdac->private_data;
402 struct hdac_hdmi_dai_pin_map *dai_map;
403 struct hdac_hdmi_pin *pin;
b0362adb
SP
404 struct hdac_ext_dma_params *dd;
405
54dfa1ea
SP
406 dai_map = &hdmi->dai_map[dai->id];
407 pin = dai_map->pin;
408
409 if (!pin)
410 return -ENODEV;
411
412 if ((!pin->eld.monitor_present) || (!pin->eld.eld_valid)) {
413 dev_err(&hdac->hdac.dev, "device is not configured for this pin: %d\n",
414 pin->nid);
b0362adb
SP
415 return -ENODEV;
416 }
417
6793a3d7
SP
418 dd = snd_soc_dai_get_dma_data(dai, substream);
419 if (!dd) {
420 dd = kzalloc(sizeof(*dd), GFP_KERNEL);
421 if (!dd)
422 return -ENOMEM;
423 }
424
b0362adb
SP
425 dd->format = snd_hdac_calc_stream_format(params_rate(hparams),
426 params_channels(hparams), params_format(hparams),
427 24, 0);
428
429 snd_soc_dai_set_dma_data(dai, substream, (void *)dd);
430
431 return 0;
432}
433
434static int hdac_hdmi_playback_cleanup(struct snd_pcm_substream *substream,
435 struct snd_soc_dai *dai)
436{
437 struct hdac_ext_device *edev = snd_soc_dai_get_drvdata(dai);
438 struct hdac_ext_dma_params *dd;
439 struct hdac_hdmi_priv *hdmi = edev->private_data;
440 struct hdac_hdmi_dai_pin_map *dai_map;
441
442 dai_map = &hdmi->dai_map[dai->id];
443
b0362adb 444 dd = (struct hdac_ext_dma_params *)snd_soc_dai_get_dma_data(dai, substream);
b0362adb 445
6793a3d7
SP
446 if (dd) {
447 snd_soc_dai_set_dma_data(dai, substream, NULL);
448 kfree(dd);
449 }
b0362adb
SP
450
451 return 0;
452}
453
ab85f5b3
SP
454static void hdac_hdmi_enable_cvt(struct hdac_ext_device *edev,
455 struct hdac_hdmi_dai_pin_map *dai_map)
456{
457 /* Enable transmission */
458 snd_hdac_codec_write(&edev->hdac, dai_map->cvt->nid, 0,
459 AC_VERB_SET_DIGI_CONVERT_1, 1);
460
461 /* Category Code (CC) to zero */
462 snd_hdac_codec_write(&edev->hdac, dai_map->cvt->nid, 0,
463 AC_VERB_SET_DIGI_CONVERT_2, 0);
464}
465
148569fd
SP
466static int hdac_hdmi_enable_pin(struct hdac_ext_device *hdac,
467 struct hdac_hdmi_dai_pin_map *dai_map)
468{
469 int mux_idx;
470 struct hdac_hdmi_pin *pin = dai_map->pin;
471
472 for (mux_idx = 0; mux_idx < pin->num_mux_nids; mux_idx++) {
473 if (pin->mux_nids[mux_idx] == dai_map->cvt->nid) {
474 snd_hdac_codec_write(&hdac->hdac, pin->nid, 0,
475 AC_VERB_SET_CONNECT_SEL, mux_idx);
476 break;
477 }
478 }
479
480 if (mux_idx == pin->num_mux_nids)
481 return -EIO;
482
483 /* Enable out path for this pin widget */
484 snd_hdac_codec_write(&hdac->hdac, pin->nid, 0,
485 AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT);
486
487 hdac_hdmi_set_power_state(hdac, dai_map, AC_PWRST_D0);
488
489 snd_hdac_codec_write(&hdac->hdac, pin->nid, 0,
490 AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_UNMUTE);
491
492 return 0;
493}
494
495static int hdac_hdmi_query_pin_connlist(struct hdac_ext_device *hdac,
496 struct hdac_hdmi_pin *pin)
497{
498 if (!(get_wcaps(&hdac->hdac, pin->nid) & AC_WCAP_CONN_LIST)) {
499 dev_warn(&hdac->hdac.dev,
500 "HDMI: pin %d wcaps %#x does not support connection list\n",
501 pin->nid, get_wcaps(&hdac->hdac, pin->nid));
502 return -EINVAL;
503 }
504
505 pin->num_mux_nids = snd_hdac_get_connections(&hdac->hdac, pin->nid,
506 pin->mux_nids, HDA_MAX_CONNECTIONS);
507 if (pin->num_mux_nids == 0)
508 dev_warn(&hdac->hdac.dev, "No connections found for pin: %d\n",
509 pin->nid);
510
511 dev_dbg(&hdac->hdac.dev, "num_mux_nids %d for pin: %d\n",
512 pin->num_mux_nids, pin->nid);
513
514 return pin->num_mux_nids;
515}
516
517/*
518 * Query pcm list and return pin widget to which stream is routed.
519 *
520 * Also query connection list of the pin, to validate the cvt to pin map.
521 *
522 * Same stream rendering to multiple pins simultaneously can be done
523 * possibly, but not supported for now in driver. So return the first pin
524 * connected.
525 */
526static struct hdac_hdmi_pin *hdac_hdmi_get_pin_from_cvt(
527 struct hdac_ext_device *edev,
528 struct hdac_hdmi_priv *hdmi,
529 struct hdac_hdmi_cvt *cvt)
530{
531 struct hdac_hdmi_pcm *pcm;
532 struct hdac_hdmi_pin *pin = NULL;
533 int ret, i;
534
535 list_for_each_entry(pcm, &hdmi->pcm_list, head) {
536 if (pcm->cvt == cvt) {
537 pin = pcm->pin;
538 break;
539 }
540 }
541
542 if (pin) {
543 ret = hdac_hdmi_query_pin_connlist(edev, pin);
544 if (ret < 0)
545 return NULL;
546
547 for (i = 0; i < pin->num_mux_nids; i++) {
548 if (pin->mux_nids[i] == cvt->nid)
549 return pin;
550 }
551 }
552
553 return NULL;
554}
555
54dfa1ea
SP
556/*
557 * This tries to get a valid pin and set the HW constraints based on the
558 * ELD. Even if a valid pin is not found return success so that device open
559 * doesn't fail.
560 */
b0362adb
SP
561static int hdac_hdmi_pcm_open(struct snd_pcm_substream *substream,
562 struct snd_soc_dai *dai)
563{
564 struct hdac_ext_device *hdac = snd_soc_dai_get_drvdata(dai);
565 struct hdac_hdmi_priv *hdmi = hdac->private_data;
566 struct hdac_hdmi_dai_pin_map *dai_map;
148569fd
SP
567 struct hdac_hdmi_cvt *cvt;
568 struct hdac_hdmi_pin *pin;
2428bca3 569 int ret;
b0362adb 570
b0362adb
SP
571 dai_map = &hdmi->dai_map[dai->id];
572
148569fd
SP
573 cvt = dai_map->cvt;
574 pin = hdac_hdmi_get_pin_from_cvt(hdac, hdmi, cvt);
54dfa1ea
SP
575
576 /*
577 * To make PA and other userland happy.
578 * userland scans devices so returning error does not help.
579 */
148569fd 580 if (!pin)
54dfa1ea 581 return 0;
148569fd
SP
582
583 if ((!pin->eld.monitor_present) ||
584 (!pin->eld.eld_valid)) {
b8a54545 585
54dfa1ea 586 dev_warn(&hdac->hdac.dev,
148569fd
SP
587 "Failed: montior present? %d ELD valid?: %d for pin: %d\n",
588 pin->eld.monitor_present, pin->eld.eld_valid, pin->nid);
b0362adb 589
54dfa1ea 590 return 0;
b0362adb
SP
591 }
592
148569fd 593 dai_map->pin = pin;
b0362adb 594
ab85f5b3 595 hdac_hdmi_enable_cvt(hdac, dai_map);
148569fd
SP
596 ret = hdac_hdmi_enable_pin(hdac, dai_map);
597 if (ret < 0)
598 return ret;
b0362adb 599
2428bca3 600 ret = hdac_hdmi_eld_limit_formats(substream->runtime,
148569fd 601 pin->eld.eld_buffer);
2428bca3
SP
602 if (ret < 0)
603 return ret;
b0362adb 604
2428bca3 605 return snd_pcm_hw_constraint_eld(substream->runtime,
148569fd 606 pin->eld.eld_buffer);
b0362adb
SP
607}
608
571d5078
JK
609static int hdac_hdmi_trigger(struct snd_pcm_substream *substream, int cmd,
610 struct snd_soc_dai *dai)
611{
612 struct hdac_hdmi_dai_pin_map *dai_map;
613 struct hdac_ext_device *hdac = snd_soc_dai_get_drvdata(dai);
614 struct hdac_hdmi_priv *hdmi = hdac->private_data;
615 int ret;
616
617 dai_map = &hdmi->dai_map[dai->id];
618 if (cmd == SNDRV_PCM_TRIGGER_RESUME) {
619 ret = hdac_hdmi_enable_pin(hdac, dai_map);
620 if (ret < 0)
621 return ret;
622
623 return hdac_hdmi_playback_prepare(substream, dai);
624 }
625
626 return 0;
627}
628
b0362adb
SP
629static void hdac_hdmi_pcm_close(struct snd_pcm_substream *substream,
630 struct snd_soc_dai *dai)
631{
632 struct hdac_ext_device *hdac = snd_soc_dai_get_drvdata(dai);
633 struct hdac_hdmi_priv *hdmi = hdac->private_data;
634 struct hdac_hdmi_dai_pin_map *dai_map;
635
636 dai_map = &hdmi->dai_map[dai->id];
637
54dfa1ea
SP
638 if (dai_map->pin) {
639 snd_hdac_codec_write(&hdac->hdac, dai_map->cvt->nid, 0,
640 AC_VERB_SET_CHANNEL_STREAMID, 0);
641 snd_hdac_codec_write(&hdac->hdac, dai_map->cvt->nid, 0,
642 AC_VERB_SET_STREAM_FORMAT, 0);
643
644 hdac_hdmi_set_power_state(hdac, dai_map, AC_PWRST_D3);
b0362adb 645
54dfa1ea 646 snd_hdac_codec_write(&hdac->hdac, dai_map->pin->nid, 0,
b0362adb 647 AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_MUTE);
148569fd 648
54dfa1ea
SP
649 dai_map->pin = NULL;
650 }
b0362adb
SP
651}
652
18382ead
SP
653static int
654hdac_hdmi_query_cvt_params(struct hdac_device *hdac, struct hdac_hdmi_cvt *cvt)
655{
656 int err;
657
658 /* Only stereo supported as of now */
659 cvt->params.channels_min = cvt->params.channels_max = 2;
660
661 err = snd_hdac_query_supported_pcm(hdac, cvt->nid,
662 &cvt->params.rates,
663 &cvt->params.formats,
664 &cvt->params.maxbps);
665 if (err < 0)
666 dev_err(&hdac->dev,
667 "Failed to query pcm params for nid %d: %d\n",
668 cvt->nid, err);
669
670 return err;
671}
672
79f4e922
SP
673static int hdac_hdmi_fill_widget_info(struct device *dev,
674 struct snd_soc_dapm_widget *w,
675 enum snd_soc_dapm_type id, void *priv,
676 const char *wname, const char *stream,
677 struct snd_kcontrol_new *wc, int numkc)
18382ead
SP
678{
679 w->id = id;
79f4e922
SP
680 w->name = devm_kstrdup(dev, wname, GFP_KERNEL);
681 if (!w->name)
682 return -ENOMEM;
683
18382ead
SP
684 w->sname = stream;
685 w->reg = SND_SOC_NOPM;
686 w->shift = 0;
79f4e922
SP
687 w->kcontrol_news = wc;
688 w->num_kcontrols = numkc;
689 w->priv = priv;
690
691 return 0;
18382ead
SP
692}
693
694static void hdac_hdmi_fill_route(struct snd_soc_dapm_route *route,
79f4e922
SP
695 const char *sink, const char *control, const char *src,
696 int (*handler)(struct snd_soc_dapm_widget *src,
697 struct snd_soc_dapm_widget *sink))
18382ead
SP
698{
699 route->sink = sink;
700 route->source = src;
701 route->control = control;
79f4e922 702 route->connected = handler;
18382ead
SP
703}
704
4a3478de
JK
705static struct hdac_hdmi_pcm *hdac_hdmi_get_pcm(struct hdac_ext_device *edev,
706 struct hdac_hdmi_pin *pin)
707{
708 struct hdac_hdmi_priv *hdmi = edev->private_data;
709 struct hdac_hdmi_pcm *pcm = NULL;
710
711 list_for_each_entry(pcm, &hdmi->pcm_list, head) {
712 if (pcm->pin == pin)
713 return pcm;
714 }
715
716 return NULL;
717}
718
719/*
720 * Based on user selection, map the PINs with the PCMs.
721 */
722static int hdac_hdmi_set_pin_mux(struct snd_kcontrol *kcontrol,
723 struct snd_ctl_elem_value *ucontrol)
724{
725 int ret;
726 struct soc_enum *e = (struct soc_enum *)kcontrol->private_value;
727 struct snd_soc_dapm_widget *w = snd_soc_dapm_kcontrol_widget(kcontrol);
728 struct snd_soc_dapm_context *dapm = w->dapm;
729 struct hdac_hdmi_pin *pin = w->priv;
730 struct hdac_ext_device *edev = to_hda_ext_device(dapm->dev);
731 struct hdac_hdmi_priv *hdmi = edev->private_data;
732 struct hdac_hdmi_pcm *pcm = NULL;
733 const char *cvt_name = e->texts[ucontrol->value.enumerated.item[0]];
734
735 ret = snd_soc_dapm_put_enum_double(kcontrol, ucontrol);
736 if (ret < 0)
737 return ret;
738
739 mutex_lock(&hdmi->pin_mutex);
740 list_for_each_entry(pcm, &hdmi->pcm_list, head) {
741 if (pcm->pin == pin)
742 pcm->pin = NULL;
743
744 /*
745 * Jack status is not reported during device probe as the
746 * PCMs are not registered by then. So report it here.
747 */
748 if (!strcmp(cvt_name, pcm->cvt->name) && !pcm->pin) {
749 pcm->pin = pin;
750 if (pin->eld.monitor_present && pin->eld.eld_valid) {
751 dev_dbg(&edev->hdac.dev,
752 "jack report for pcm=%d\n",
753 pcm->pcm_id);
754
755 snd_jack_report(pcm->jack, SND_JACK_AVOUT);
756 }
757 mutex_unlock(&hdmi->pin_mutex);
758 return ret;
759 }
760 }
761 mutex_unlock(&hdmi->pin_mutex);
762
763 return ret;
764}
765
79f4e922
SP
766/*
767 * Ideally the Mux inputs should be based on the num_muxs enumerated, but
768 * the display driver seem to be programming the connection list for the pin
769 * widget runtime.
770 *
771 * So programming all the possible inputs for the mux, the user has to take
772 * care of selecting the right one and leaving all other inputs selected to
773 * "NONE"
774 */
775static int hdac_hdmi_create_pin_muxs(struct hdac_ext_device *edev,
776 struct hdac_hdmi_pin *pin,
777 struct snd_soc_dapm_widget *widget,
778 const char *widget_name)
779{
780 struct hdac_hdmi_priv *hdmi = edev->private_data;
781 struct snd_kcontrol_new *kc;
782 struct hdac_hdmi_cvt *cvt;
783 struct soc_enum *se;
784 char kc_name[NAME_SIZE];
785 char mux_items[NAME_SIZE];
786 /* To hold inputs to the Pin mux */
787 char *items[HDA_MAX_CONNECTIONS];
788 int i = 0;
789 int num_items = hdmi->num_cvt + 1;
790
791 kc = devm_kzalloc(&edev->hdac.dev, sizeof(*kc), GFP_KERNEL);
792 if (!kc)
793 return -ENOMEM;
794
795 se = devm_kzalloc(&edev->hdac.dev, sizeof(*se), GFP_KERNEL);
796 if (!se)
797 return -ENOMEM;
798
799 sprintf(kc_name, "Pin %d Input", pin->nid);
800 kc->name = devm_kstrdup(&edev->hdac.dev, kc_name, GFP_KERNEL);
801 if (!kc->name)
802 return -ENOMEM;
803
804 kc->private_value = (long)se;
805 kc->iface = SNDRV_CTL_ELEM_IFACE_MIXER;
806 kc->access = 0;
807 kc->info = snd_soc_info_enum_double;
4a3478de 808 kc->put = hdac_hdmi_set_pin_mux;
79f4e922
SP
809 kc->get = snd_soc_dapm_get_enum_double;
810
811 se->reg = SND_SOC_NOPM;
812
813 /* enum texts: ["NONE", "cvt #", "cvt #", ...] */
814 se->items = num_items;
815 se->mask = roundup_pow_of_two(se->items) - 1;
816
817 sprintf(mux_items, "NONE");
818 items[i] = devm_kstrdup(&edev->hdac.dev, mux_items, GFP_KERNEL);
819 if (!items[i])
820 return -ENOMEM;
821
822 list_for_each_entry(cvt, &hdmi->cvt_list, head) {
823 i++;
824 sprintf(mux_items, "cvt %d", cvt->nid);
825 items[i] = devm_kstrdup(&edev->hdac.dev, mux_items, GFP_KERNEL);
826 if (!items[i])
827 return -ENOMEM;
828 }
829
830 se->texts = devm_kmemdup(&edev->hdac.dev, items,
831 (num_items * sizeof(char *)), GFP_KERNEL);
832 if (!se->texts)
833 return -ENOMEM;
834
835 return hdac_hdmi_fill_widget_info(&edev->hdac.dev, widget,
4a3478de 836 snd_soc_dapm_mux, pin, widget_name, NULL, kc, 1);
79f4e922
SP
837}
838
839/* Add cvt <- input <- mux route map */
840static void hdac_hdmi_add_pinmux_cvt_route(struct hdac_ext_device *edev,
841 struct snd_soc_dapm_widget *widgets,
842 struct snd_soc_dapm_route *route, int rindex)
843{
844 struct hdac_hdmi_priv *hdmi = edev->private_data;
845 const struct snd_kcontrol_new *kc;
846 struct soc_enum *se;
847 int mux_index = hdmi->num_cvt + hdmi->num_pin;
848 int i, j;
849
850 for (i = 0; i < hdmi->num_pin; i++) {
851 kc = widgets[mux_index].kcontrol_news;
852 se = (struct soc_enum *)kc->private_value;
853 for (j = 0; j < hdmi->num_cvt; j++) {
854 hdac_hdmi_fill_route(&route[rindex],
855 widgets[mux_index].name,
856 se->texts[j + 1],
857 widgets[j].name, NULL);
858
859 rindex++;
860 }
861
862 mux_index++;
863 }
864}
865
866/*
867 * Widgets are added in the below sequence
868 * Converter widgets for num converters enumerated
869 * Pin widgets for num pins enumerated
870 * Pin mux widgets to represent connenction list of pin widget
871 *
872 * Total widgets elements = num_cvt + num_pin + num_pin;
873 *
874 * Routes are added as below:
875 * pin mux -> pin (based on num_pins)
876 * cvt -> "Input sel control" -> pin_mux
877 *
878 * Total route elements:
879 * num_pins + (pin_muxes * num_cvt)
880 */
881static int create_fill_widget_route_map(struct snd_soc_dapm_context *dapm)
18382ead 882{
79f4e922
SP
883 struct snd_soc_dapm_widget *widgets;
884 struct snd_soc_dapm_route *route;
885 struct hdac_ext_device *edev = to_hda_ext_device(dapm->dev);
886 struct hdac_hdmi_priv *hdmi = edev->private_data;
887 struct snd_soc_dai_driver *dai_drv = dapm->component->dai_drv;
888 char widget_name[NAME_SIZE];
889 struct hdac_hdmi_cvt *cvt;
890 struct hdac_hdmi_pin *pin;
891 int ret, i = 0, num_routes = 0;
18382ead 892
79f4e922
SP
893 if (list_empty(&hdmi->cvt_list) || list_empty(&hdmi->pin_list))
894 return -EINVAL;
18382ead 895
79f4e922
SP
896 widgets = devm_kzalloc(dapm->dev,
897 (sizeof(*widgets) * ((2 * hdmi->num_pin) + hdmi->num_cvt)),
898 GFP_KERNEL);
18382ead 899
79f4e922
SP
900 if (!widgets)
901 return -ENOMEM;
902
903 /* DAPM widgets to represent each converter widget */
904 list_for_each_entry(cvt, &hdmi->cvt_list, head) {
905 sprintf(widget_name, "Converter %d", cvt->nid);
906 ret = hdac_hdmi_fill_widget_info(dapm->dev, &widgets[i],
907 snd_soc_dapm_aif_in, &cvt->nid,
908 widget_name, dai_drv[i].playback.stream_name, NULL, 0);
909 if (ret < 0)
910 return ret;
911 i++;
912 }
913
914 list_for_each_entry(pin, &hdmi->pin_list, head) {
915 sprintf(widget_name, "hif%d Output", pin->nid);
916 ret = hdac_hdmi_fill_widget_info(dapm->dev, &widgets[i],
917 snd_soc_dapm_output, &pin->nid,
918 widget_name, NULL, NULL, 0);
919 if (ret < 0)
920 return ret;
921 i++;
922 }
923
924 /* DAPM widgets to represent the connection list to pin widget */
925 list_for_each_entry(pin, &hdmi->pin_list, head) {
926 sprintf(widget_name, "Pin %d Mux", pin->nid);
927 ret = hdac_hdmi_create_pin_muxs(edev, pin, &widgets[i],
928 widget_name);
929 if (ret < 0)
930 return ret;
931 i++;
932
933 /* For cvt to pin_mux mapping */
934 num_routes += hdmi->num_cvt;
935
936 /* For pin_mux to pin mapping */
937 num_routes++;
938 }
939
940 route = devm_kzalloc(dapm->dev, (sizeof(*route) * num_routes),
941 GFP_KERNEL);
942 if (!route)
943 return -ENOMEM;
944
945 i = 0;
946 /* Add pin <- NULL <- mux route map */
947 list_for_each_entry(pin, &hdmi->pin_list, head) {
948 int sink_index = i + hdmi->num_cvt;
949 int src_index = sink_index + hdmi->num_pin;
950
951 hdac_hdmi_fill_route(&route[i],
952 widgets[sink_index].name, NULL,
953 widgets[src_index].name, NULL);
954 i++;
955
956 }
957
958 hdac_hdmi_add_pinmux_cvt_route(edev, widgets, route, i);
959
960 snd_soc_dapm_new_controls(dapm, widgets,
961 ((2 * hdmi->num_pin) + hdmi->num_cvt));
962
963 snd_soc_dapm_add_routes(dapm, route, num_routes);
964 snd_soc_dapm_new_widgets(dapm->card);
965
966 return 0;
18382ead 967
18382ead
SP
968}
969
15b91447 970static int hdac_hdmi_init_dai_map(struct hdac_ext_device *edev)
18382ead 971{
15b91447 972 struct hdac_hdmi_priv *hdmi = edev->private_data;
148569fd 973 struct hdac_hdmi_dai_pin_map *dai_map;
15b91447 974 struct hdac_hdmi_cvt *cvt;
148569fd 975 int dai_id = 0;
18382ead 976
148569fd 977 if (list_empty(&hdmi->cvt_list))
15b91447 978 return -EINVAL;
18382ead 979
148569fd
SP
980 list_for_each_entry(cvt, &hdmi->cvt_list, head) {
981 dai_map = &hdmi->dai_map[dai_id];
982 dai_map->dai_id = dai_id;
983 dai_map->cvt = cvt;
18382ead 984
148569fd 985 dai_id++;
18382ead 986
148569fd
SP
987 if (dai_id == HDA_MAX_CVTS) {
988 dev_warn(&edev->hdac.dev,
989 "Max dais supported: %d\n", dai_id);
990 break;
991 }
992 }
18382ead 993
15b91447
SP
994 return 0;
995}
996
997static int hdac_hdmi_add_cvt(struct hdac_ext_device *edev, hda_nid_t nid)
998{
999 struct hdac_hdmi_priv *hdmi = edev->private_data;
1000 struct hdac_hdmi_cvt *cvt;
4a3478de 1001 char name[NAME_SIZE];
15b91447
SP
1002
1003 cvt = kzalloc(sizeof(*cvt), GFP_KERNEL);
1004 if (!cvt)
1005 return -ENOMEM;
1006
1007 cvt->nid = nid;
4a3478de
JK
1008 sprintf(name, "cvt %d", cvt->nid);
1009 cvt->name = kstrdup(name, GFP_KERNEL);
15b91447
SP
1010
1011 list_add_tail(&cvt->head, &hdmi->cvt_list);
1012 hdmi->num_cvt++;
1013
1014 return hdac_hdmi_query_cvt_params(&edev->hdac, cvt);
1015}
1016
b7756ede
SP
1017static void hdac_hdmi_parse_eld(struct hdac_ext_device *edev,
1018 struct hdac_hdmi_pin *pin)
1019{
1020 pin->eld.info.spk_alloc = pin->eld.eld_buffer[DRM_ELD_SPEAKER];
1021}
1022
b8a54545
SP
1023static void hdac_hdmi_present_sense(struct hdac_hdmi_pin *pin, int repoll)
1024{
1025 struct hdac_ext_device *edev = pin->edev;
4a3478de
JK
1026 struct hdac_hdmi_priv *hdmi = edev->private_data;
1027 struct hdac_hdmi_pcm *pcm;
b8a54545
SP
1028 int val;
1029
b8a54545
SP
1030 pin->repoll_count = repoll;
1031
1032 pm_runtime_get_sync(&edev->hdac.dev);
1033 val = snd_hdac_codec_read(&edev->hdac, pin->nid, 0,
1034 AC_VERB_GET_PIN_SENSE, 0);
1035
1036 dev_dbg(&edev->hdac.dev, "Pin sense val %x for pin: %d\n",
1037 val, pin->nid);
1038
4a3478de
JK
1039
1040 mutex_lock(&hdmi->pin_mutex);
b8a54545
SP
1041 pin->eld.monitor_present = !!(val & AC_PINSENSE_PRESENCE);
1042 pin->eld.eld_valid = !!(val & AC_PINSENSE_ELDV);
1043
4a3478de
JK
1044 pcm = hdac_hdmi_get_pcm(edev, pin);
1045
b8a54545
SP
1046 if (!pin->eld.monitor_present || !pin->eld.eld_valid) {
1047
1048 dev_dbg(&edev->hdac.dev, "%s: disconnect for pin %d\n",
1049 __func__, pin->nid);
4a3478de
JK
1050
1051 /*
1052 * PCMs are not registered during device probe, so don't
1053 * report jack here. It will be done in usermode mux
1054 * control select.
1055 */
1056 if (pcm) {
1057 dev_dbg(&edev->hdac.dev,
1058 "jack report for pcm=%d\n", pcm->pcm_id);
1059
1060 snd_jack_report(pcm->jack, 0);
1061 }
1062
1063 mutex_unlock(&hdmi->pin_mutex);
b8a54545
SP
1064 goto put_hdac_device;
1065 }
1066
1067 if (pin->eld.monitor_present && pin->eld.eld_valid) {
1068 /* TODO: use i915 component for reading ELD later */
1069 if (hdac_hdmi_get_eld(&edev->hdac, pin->nid,
1070 pin->eld.eld_buffer,
1071 &pin->eld.eld_size) == 0) {
1072
4a3478de
JK
1073 if (pcm) {
1074 dev_dbg(&edev->hdac.dev,
1075 "jack report for pcm=%d\n",
1076 pcm->pcm_id);
1077
1078 snd_jack_report(pcm->jack, SND_JACK_AVOUT);
1079 }
b7756ede 1080 hdac_hdmi_parse_eld(edev, pin);
4a3478de 1081
b8a54545
SP
1082 print_hex_dump_bytes("ELD: ", DUMP_PREFIX_OFFSET,
1083 pin->eld.eld_buffer, pin->eld.eld_size);
1084 } else {
1085 pin->eld.monitor_present = false;
1086 pin->eld.eld_valid = false;
4a3478de
JK
1087
1088 if (pcm) {
1089 dev_dbg(&edev->hdac.dev,
1090 "jack report for pcm=%d\n",
1091 pcm->pcm_id);
1092
1093 snd_jack_report(pcm->jack, 0);
1094 }
b8a54545
SP
1095 }
1096 }
1097
4a3478de
JK
1098 mutex_unlock(&hdmi->pin_mutex);
1099
b8a54545
SP
1100 /*
1101 * Sometimes the pin_sense may present invalid monitor
1102 * present and eld_valid. If ELD data is not valid, loop few
1103 * more times to get correct pin sense and valid ELD.
1104 */
1105 if ((!pin->eld.monitor_present || !pin->eld.eld_valid) && repoll)
1106 schedule_delayed_work(&pin->work, msecs_to_jiffies(300));
1107
1108put_hdac_device:
1109 pm_runtime_put_sync(&edev->hdac.dev);
1110}
1111
1112static void hdac_hdmi_repoll_eld(struct work_struct *work)
1113{
1114 struct hdac_hdmi_pin *pin =
1115 container_of(to_delayed_work(work), struct hdac_hdmi_pin, work);
1116
1117 /* picked from legacy HDA driver */
1118 if (pin->repoll_count++ > 6)
1119 pin->repoll_count = 0;
1120
1121 hdac_hdmi_present_sense(pin, pin->repoll_count);
1122}
1123
15b91447
SP
1124static int hdac_hdmi_add_pin(struct hdac_ext_device *edev, hda_nid_t nid)
1125{
1126 struct hdac_hdmi_priv *hdmi = edev->private_data;
1127 struct hdac_hdmi_pin *pin;
1128
1129 pin = kzalloc(sizeof(*pin), GFP_KERNEL);
1130 if (!pin)
1131 return -ENOMEM;
1132
1133 pin->nid = nid;
1134
1135 list_add_tail(&pin->head, &hdmi->pin_list);
1136 hdmi->num_pin++;
1137
b8a54545
SP
1138 pin->edev = edev;
1139 INIT_DELAYED_WORK(&pin->work, hdac_hdmi_repoll_eld);
1140
15b91447 1141 return 0;
18382ead
SP
1142}
1143
211caab7
SP
1144#define INTEL_VENDOR_NID 0x08
1145#define INTEL_GET_VENDOR_VERB 0xf81
1146#define INTEL_SET_VENDOR_VERB 0x781
1147#define INTEL_EN_DP12 0x02 /* enable DP 1.2 features */
1148#define INTEL_EN_ALL_PIN_CVTS 0x01 /* enable 2nd & 3rd pins and convertors */
1149
1150static void hdac_hdmi_skl_enable_all_pins(struct hdac_device *hdac)
1151{
1152 unsigned int vendor_param;
1153
1154 vendor_param = snd_hdac_codec_read(hdac, INTEL_VENDOR_NID, 0,
1155 INTEL_GET_VENDOR_VERB, 0);
1156 if (vendor_param == -1 || vendor_param & INTEL_EN_ALL_PIN_CVTS)
1157 return;
1158
1159 vendor_param |= INTEL_EN_ALL_PIN_CVTS;
1160 vendor_param = snd_hdac_codec_read(hdac, INTEL_VENDOR_NID, 0,
1161 INTEL_SET_VENDOR_VERB, vendor_param);
1162 if (vendor_param == -1)
1163 return;
1164}
1165
1166static void hdac_hdmi_skl_enable_dp12(struct hdac_device *hdac)
1167{
1168 unsigned int vendor_param;
1169
1170 vendor_param = snd_hdac_codec_read(hdac, INTEL_VENDOR_NID, 0,
1171 INTEL_GET_VENDOR_VERB, 0);
1172 if (vendor_param == -1 || vendor_param & INTEL_EN_DP12)
1173 return;
1174
1175 /* enable DP1.2 mode */
1176 vendor_param |= INTEL_EN_DP12;
1177 vendor_param = snd_hdac_codec_read(hdac, INTEL_VENDOR_NID, 0,
1178 INTEL_SET_VENDOR_VERB, vendor_param);
1179 if (vendor_param == -1)
1180 return;
1181
1182}
1183
17a42c45
SP
1184static struct snd_soc_dai_ops hdmi_dai_ops = {
1185 .startup = hdac_hdmi_pcm_open,
1186 .shutdown = hdac_hdmi_pcm_close,
1187 .hw_params = hdac_hdmi_set_hw_params,
1188 .prepare = hdac_hdmi_playback_prepare,
571d5078 1189 .trigger = hdac_hdmi_trigger,
17a42c45
SP
1190 .hw_free = hdac_hdmi_playback_cleanup,
1191};
1192
1193/*
1194 * Each converter can support a stream independently. So a dai is created
1195 * based on the number of converter queried.
1196 */
1197static int hdac_hdmi_create_dais(struct hdac_device *hdac,
1198 struct snd_soc_dai_driver **dais,
1199 struct hdac_hdmi_priv *hdmi, int num_dais)
1200{
1201 struct snd_soc_dai_driver *hdmi_dais;
1202 struct hdac_hdmi_cvt *cvt;
1203 char name[NAME_SIZE], dai_name[NAME_SIZE];
1204 int i = 0;
1205 u32 rates, bps;
1206 unsigned int rate_max = 384000, rate_min = 8000;
1207 u64 formats;
1208 int ret;
1209
1210 hdmi_dais = devm_kzalloc(&hdac->dev,
1211 (sizeof(*hdmi_dais) * num_dais),
1212 GFP_KERNEL);
1213 if (!hdmi_dais)
1214 return -ENOMEM;
1215
1216 list_for_each_entry(cvt, &hdmi->cvt_list, head) {
1217 ret = snd_hdac_query_supported_pcm(hdac, cvt->nid,
1218 &rates, &formats, &bps);
1219 if (ret)
1220 return ret;
1221
1222 sprintf(dai_name, "intel-hdmi-hifi%d", i+1);
1223 hdmi_dais[i].name = devm_kstrdup(&hdac->dev,
1224 dai_name, GFP_KERNEL);
1225
1226 if (!hdmi_dais[i].name)
1227 return -ENOMEM;
1228
1229 snprintf(name, sizeof(name), "hifi%d", i+1);
1230 hdmi_dais[i].playback.stream_name =
1231 devm_kstrdup(&hdac->dev, name, GFP_KERNEL);
1232 if (!hdmi_dais[i].playback.stream_name)
1233 return -ENOMEM;
1234
1235 /*
1236 * Set caps based on capability queried from the converter.
1237 * It will be constrained runtime based on ELD queried.
1238 */
1239 hdmi_dais[i].playback.formats = formats;
1240 hdmi_dais[i].playback.rates = rates;
1241 hdmi_dais[i].playback.rate_max = rate_max;
1242 hdmi_dais[i].playback.rate_min = rate_min;
1243 hdmi_dais[i].playback.channels_min = 2;
1244 hdmi_dais[i].playback.channels_max = 2;
1245 hdmi_dais[i].ops = &hdmi_dai_ops;
1246
1247 i++;
1248 }
1249
1250 *dais = hdmi_dais;
1251
1252 return 0;
1253}
1254
18382ead
SP
1255/*
1256 * Parse all nodes and store the cvt/pin nids in array
1257 * Add one time initialization for pin and cvt widgets
1258 */
17a42c45
SP
1259static int hdac_hdmi_parse_and_map_nid(struct hdac_ext_device *edev,
1260 struct snd_soc_dai_driver **dais, int *num_dais)
18382ead
SP
1261{
1262 hda_nid_t nid;
3c83ac23 1263 int i, num_nodes;
18382ead
SP
1264 struct hdac_device *hdac = &edev->hdac;
1265 struct hdac_hdmi_priv *hdmi = edev->private_data;
15b91447 1266 int ret;
18382ead 1267
211caab7
SP
1268 hdac_hdmi_skl_enable_all_pins(hdac);
1269 hdac_hdmi_skl_enable_dp12(hdac);
1270
3c83ac23 1271 num_nodes = snd_hdac_get_sub_nodes(hdac, hdac->afg, &nid);
541140d4 1272 if (!nid || num_nodes <= 0) {
18382ead
SP
1273 dev_warn(&hdac->dev, "HDMI: failed to get afg sub nodes\n");
1274 return -EINVAL;
1275 }
1276
3c83ac23 1277 hdac->num_nodes = num_nodes;
18382ead
SP
1278 hdac->start_nid = nid;
1279
1280 for (i = 0; i < hdac->num_nodes; i++, nid++) {
1281 unsigned int caps;
1282 unsigned int type;
1283
1284 caps = get_wcaps(hdac, nid);
1285 type = get_wcaps_type(caps);
1286
1287 if (!(caps & AC_WCAP_DIGITAL))
1288 continue;
1289
1290 switch (type) {
1291
1292 case AC_WID_AUD_OUT:
15b91447
SP
1293 ret = hdac_hdmi_add_cvt(edev, nid);
1294 if (ret < 0)
1295 return ret;
18382ead
SP
1296 break;
1297
1298 case AC_WID_PIN:
15b91447
SP
1299 ret = hdac_hdmi_add_pin(edev, nid);
1300 if (ret < 0)
1301 return ret;
18382ead
SP
1302 break;
1303 }
1304 }
1305
1306 hdac->end_nid = nid;
1307
15b91447 1308 if (!hdmi->num_pin || !hdmi->num_cvt)
18382ead
SP
1309 return -EIO;
1310
17a42c45
SP
1311 ret = hdac_hdmi_create_dais(hdac, dais, hdmi, hdmi->num_cvt);
1312 if (ret) {
1313 dev_err(&hdac->dev, "Failed to create dais with err: %d\n",
1314 ret);
1315 return ret;
1316 }
1317
1318 *num_dais = hdmi->num_cvt;
1319
15b91447 1320 return hdac_hdmi_init_dai_map(edev);
18382ead
SP
1321}
1322
b8a54545
SP
1323static void hdac_hdmi_eld_notify_cb(void *aptr, int port)
1324{
1325 struct hdac_ext_device *edev = aptr;
1326 struct hdac_hdmi_priv *hdmi = edev->private_data;
1327 struct hdac_hdmi_pin *pin;
1328 struct snd_soc_codec *codec = edev->scodec;
1329
1330 /* Don't know how this mapping is derived */
1331 hda_nid_t pin_nid = port + 0x04;
1332
1333 dev_dbg(&edev->hdac.dev, "%s: for pin: %d\n", __func__, pin_nid);
1334
1335 /*
1336 * skip notification during system suspend (but not in runtime PM);
1337 * the state will be updated at resume. Also since the ELD and
1338 * connection states are updated in anyway at the end of the resume,
1339 * we can skip it when received during PM process.
1340 */
1341 if (snd_power_get_state(codec->component.card->snd_card) !=
1342 SNDRV_CTL_POWER_D0)
1343 return;
1344
1345 if (atomic_read(&edev->hdac.in_pm))
1346 return;
1347
1348 list_for_each_entry(pin, &hdmi->pin_list, head) {
1349 if (pin->nid == pin_nid)
1350 hdac_hdmi_present_sense(pin, 1);
1351 }
1352}
1353
1354static struct i915_audio_component_audio_ops aops = {
1355 .pin_eld_notify = hdac_hdmi_eld_notify_cb,
1356};
1357
4a3478de
JK
1358int hdac_hdmi_jack_init(struct snd_soc_dai *dai, int device)
1359{
1360 char jack_name[NAME_SIZE];
1361 struct snd_soc_codec *codec = dai->codec;
1362 struct hdac_ext_device *edev = snd_soc_codec_get_drvdata(codec);
1363 struct snd_soc_dapm_context *dapm =
1364 snd_soc_component_get_dapm(&codec->component);
1365 struct hdac_hdmi_priv *hdmi = edev->private_data;
1366 struct hdac_hdmi_pcm *pcm;
1367
1368 /*
1369 * this is a new PCM device, create new pcm and
1370 * add to the pcm list
1371 */
1372 pcm = kzalloc(sizeof(*pcm), GFP_KERNEL);
1373 if (!pcm)
1374 return -ENOMEM;
1375 pcm->pcm_id = device;
1376 pcm->cvt = hdmi->dai_map[dai->id].cvt;
1377
1378 list_add_tail(&pcm->head, &hdmi->pcm_list);
1379
1380 sprintf(jack_name, "HDMI/DP, pcm=%d Jack", device);
1381
1382 return snd_jack_new(dapm->card->snd_card, jack_name,
1383 SND_JACK_AVOUT, &pcm->jack, true, false);
1384}
1385EXPORT_SYMBOL_GPL(hdac_hdmi_jack_init);
1386
18382ead
SP
1387static int hdmi_codec_probe(struct snd_soc_codec *codec)
1388{
1389 struct hdac_ext_device *edev = snd_soc_codec_get_drvdata(codec);
1390 struct hdac_hdmi_priv *hdmi = edev->private_data;
1391 struct snd_soc_dapm_context *dapm =
1392 snd_soc_component_get_dapm(&codec->component);
b8a54545
SP
1393 struct hdac_hdmi_pin *pin;
1394 int ret;
18382ead
SP
1395
1396 edev->scodec = codec;
1397
79f4e922
SP
1398 ret = create_fill_widget_route_map(dapm);
1399 if (ret < 0)
1400 return ret;
18382ead 1401
b8a54545
SP
1402 aops.audio_ptr = edev;
1403 ret = snd_hdac_i915_register_notifier(&aops);
1404 if (ret < 0) {
1405 dev_err(&edev->hdac.dev, "notifier register failed: err: %d\n",
1406 ret);
1407 return ret;
1408 }
1409
1410 list_for_each_entry(pin, &hdmi->pin_list, head)
1411 hdac_hdmi_present_sense(pin, 1);
1412
18382ead
SP
1413 /* Imp: Store the card pointer in hda_codec */
1414 edev->card = dapm->card->snd_card;
1415
e342ac08
SP
1416 /*
1417 * hdac_device core already sets the state to active and calls
1418 * get_noresume. So enable runtime and set the device to suspend.
1419 */
1420 pm_runtime_enable(&edev->hdac.dev);
1421 pm_runtime_put(&edev->hdac.dev);
1422 pm_runtime_suspend(&edev->hdac.dev);
1423
1424 return 0;
1425}
1426
1427static int hdmi_codec_remove(struct snd_soc_codec *codec)
1428{
1429 struct hdac_ext_device *edev = snd_soc_codec_get_drvdata(codec);
1430
1431 pm_runtime_disable(&edev->hdac.dev);
18382ead
SP
1432 return 0;
1433}
1434
571d5078
JK
1435#ifdef CONFIG_PM
1436static int hdmi_codec_resume(struct snd_soc_codec *codec)
1437{
1438 struct hdac_ext_device *edev = snd_soc_codec_get_drvdata(codec);
1439 struct hdac_hdmi_priv *hdmi = edev->private_data;
1440 struct hdac_hdmi_pin *pin;
1441 struct hdac_device *hdac = &edev->hdac;
1442 struct hdac_bus *bus = hdac->bus;
1443 int err;
1444 unsigned long timeout;
1445
1446 hdac_hdmi_skl_enable_all_pins(&edev->hdac);
1447 hdac_hdmi_skl_enable_dp12(&edev->hdac);
1448
1449 /* Power up afg */
1450 if (!snd_hdac_check_power_state(hdac, hdac->afg, AC_PWRST_D0)) {
1451
1452 snd_hdac_codec_write(hdac, hdac->afg, 0,
1453 AC_VERB_SET_POWER_STATE, AC_PWRST_D0);
1454
1455 /* Wait till power state is set to D0 */
1456 timeout = jiffies + msecs_to_jiffies(1000);
1457 while (!snd_hdac_check_power_state(hdac, hdac->afg, AC_PWRST_D0)
1458 && time_before(jiffies, timeout)) {
1459 msleep(50);
1460 }
1461 }
1462
1463 /*
1464 * As the ELD notify callback request is not entertained while the
1465 * device is in suspend state. Need to manually check detection of
1466 * all pins here.
1467 */
1468 list_for_each_entry(pin, &hdmi->pin_list, head)
1469 hdac_hdmi_present_sense(pin, 1);
1470
1471 /*
1472 * Codec power is turned ON during controller resume.
1473 * Turn it OFF here
1474 */
1475 err = snd_hdac_display_power(bus, false);
1476 if (err < 0) {
1477 dev_err(bus->dev,
1478 "Cannot turn OFF display power on i915, err: %d\n",
1479 err);
1480 return err;
1481 }
1482
1483 return 0;
1484}
1485#else
1486#define hdmi_codec_resume NULL
1487#endif
1488
18382ead
SP
1489static struct snd_soc_codec_driver hdmi_hda_codec = {
1490 .probe = hdmi_codec_probe,
e342ac08 1491 .remove = hdmi_codec_remove,
571d5078 1492 .resume = hdmi_codec_resume,
18382ead
SP
1493 .idle_bias_off = true,
1494};
1495
18382ead
SP
1496static int hdac_hdmi_dev_probe(struct hdac_ext_device *edev)
1497{
1498 struct hdac_device *codec = &edev->hdac;
1499 struct hdac_hdmi_priv *hdmi_priv;
17a42c45
SP
1500 struct snd_soc_dai_driver *hdmi_dais = NULL;
1501 int num_dais = 0;
18382ead
SP
1502 int ret = 0;
1503
1504 hdmi_priv = devm_kzalloc(&codec->dev, sizeof(*hdmi_priv), GFP_KERNEL);
1505 if (hdmi_priv == NULL)
1506 return -ENOMEM;
1507
1508 edev->private_data = hdmi_priv;
1509
1510 dev_set_drvdata(&codec->dev, edev);
1511
15b91447
SP
1512 INIT_LIST_HEAD(&hdmi_priv->pin_list);
1513 INIT_LIST_HEAD(&hdmi_priv->cvt_list);
4a3478de
JK
1514 INIT_LIST_HEAD(&hdmi_priv->pcm_list);
1515 mutex_init(&hdmi_priv->pin_mutex);
15b91447 1516
aeaccef0
RB
1517 /*
1518 * Turned off in the runtime_suspend during the first explicit
1519 * pm_runtime_suspend call.
1520 */
1521 ret = snd_hdac_display_power(edev->hdac.bus, true);
1522 if (ret < 0) {
1523 dev_err(&edev->hdac.dev,
1524 "Cannot turn on display power on i915 err: %d\n",
1525 ret);
1526 return ret;
1527 }
1528
17a42c45
SP
1529 ret = hdac_hdmi_parse_and_map_nid(edev, &hdmi_dais, &num_dais);
1530 if (ret < 0) {
1531 dev_err(&codec->dev,
1532 "Failed in parse and map nid with err: %d\n", ret);
18382ead 1533 return ret;
17a42c45 1534 }
18382ead
SP
1535
1536 /* ASoC specific initialization */
1537 return snd_soc_register_codec(&codec->dev, &hdmi_hda_codec,
17a42c45 1538 hdmi_dais, num_dais);
18382ead
SP
1539}
1540
1541static int hdac_hdmi_dev_remove(struct hdac_ext_device *edev)
1542{
15b91447
SP
1543 struct hdac_hdmi_priv *hdmi = edev->private_data;
1544 struct hdac_hdmi_pin *pin, *pin_next;
1545 struct hdac_hdmi_cvt *cvt, *cvt_next;
4a3478de 1546 struct hdac_hdmi_pcm *pcm, *pcm_next;
15b91447 1547
18382ead
SP
1548 snd_soc_unregister_codec(&edev->hdac.dev);
1549
4a3478de
JK
1550 list_for_each_entry_safe(pcm, pcm_next, &hdmi->pcm_list, head) {
1551 pcm->cvt = NULL;
1552 pcm->pin = NULL;
1553 list_del(&pcm->head);
1554 kfree(pcm);
1555 }
1556
15b91447
SP
1557 list_for_each_entry_safe(cvt, cvt_next, &hdmi->cvt_list, head) {
1558 list_del(&cvt->head);
4a3478de 1559 kfree(cvt->name);
15b91447
SP
1560 kfree(cvt);
1561 }
1562
1563 list_for_each_entry_safe(pin, pin_next, &hdmi->pin_list, head) {
1564 list_del(&pin->head);
1565 kfree(pin);
1566 }
1567
18382ead
SP
1568 return 0;
1569}
1570
e342ac08
SP
1571#ifdef CONFIG_PM
1572static int hdac_hdmi_runtime_suspend(struct device *dev)
1573{
1574 struct hdac_ext_device *edev = to_hda_ext_device(dev);
1575 struct hdac_device *hdac = &edev->hdac;
07f083ab 1576 struct hdac_bus *bus = hdac->bus;
7ed49700 1577 unsigned long timeout;
07f083ab 1578 int err;
e342ac08
SP
1579
1580 dev_dbg(dev, "Enter: %s\n", __func__);
1581
07f083ab
SP
1582 /* controller may not have been initialized for the first time */
1583 if (!bus)
1584 return 0;
1585
e342ac08 1586 /* Power down afg */
7ed49700 1587 if (!snd_hdac_check_power_state(hdac, hdac->afg, AC_PWRST_D3)) {
e342ac08
SP
1588 snd_hdac_codec_write(hdac, hdac->afg, 0,
1589 AC_VERB_SET_POWER_STATE, AC_PWRST_D3);
1590
7ed49700
SP
1591 /* Wait till power state is set to D3 */
1592 timeout = jiffies + msecs_to_jiffies(1000);
1593 while (!snd_hdac_check_power_state(hdac, hdac->afg, AC_PWRST_D3)
1594 && time_before(jiffies, timeout)) {
1595
1596 msleep(50);
1597 }
1598 }
1599
07f083ab
SP
1600 err = snd_hdac_display_power(bus, false);
1601 if (err < 0) {
1602 dev_err(bus->dev, "Cannot turn on display power on i915\n");
1603 return err;
1604 }
1605
e342ac08
SP
1606 return 0;
1607}
1608
1609static int hdac_hdmi_runtime_resume(struct device *dev)
1610{
1611 struct hdac_ext_device *edev = to_hda_ext_device(dev);
1612 struct hdac_device *hdac = &edev->hdac;
07f083ab
SP
1613 struct hdac_bus *bus = hdac->bus;
1614 int err;
e342ac08
SP
1615
1616 dev_dbg(dev, "Enter: %s\n", __func__);
1617
07f083ab
SP
1618 /* controller may not have been initialized for the first time */
1619 if (!bus)
1620 return 0;
1621
1622 err = snd_hdac_display_power(bus, true);
1623 if (err < 0) {
1624 dev_err(bus->dev, "Cannot turn on display power on i915\n");
1625 return err;
1626 }
1627
ab85f5b3
SP
1628 hdac_hdmi_skl_enable_all_pins(&edev->hdac);
1629 hdac_hdmi_skl_enable_dp12(&edev->hdac);
1630
e342ac08
SP
1631 /* Power up afg */
1632 if (!snd_hdac_check_power_state(hdac, hdac->afg, AC_PWRST_D0))
1633 snd_hdac_codec_write(hdac, hdac->afg, 0,
1634 AC_VERB_SET_POWER_STATE, AC_PWRST_D0);
1635
1636 return 0;
1637}
1638#else
1639#define hdac_hdmi_runtime_suspend NULL
1640#define hdac_hdmi_runtime_resume NULL
1641#endif
1642
1643static const struct dev_pm_ops hdac_hdmi_pm = {
1644 SET_RUNTIME_PM_OPS(hdac_hdmi_runtime_suspend, hdac_hdmi_runtime_resume, NULL)
1645};
1646
18382ead
SP
1647static const struct hda_device_id hdmi_list[] = {
1648 HDA_CODEC_EXT_ENTRY(0x80862809, 0x100000, "Skylake HDMI", 0),
e2304803 1649 HDA_CODEC_EXT_ENTRY(0x8086280a, 0x100000, "Broxton HDMI", 0),
18382ead
SP
1650 {}
1651};
1652
1653MODULE_DEVICE_TABLE(hdaudio, hdmi_list);
1654
1655static struct hdac_ext_driver hdmi_driver = {
1656 . hdac = {
1657 .driver = {
1658 .name = "HDMI HDA Codec",
e342ac08 1659 .pm = &hdac_hdmi_pm,
18382ead
SP
1660 },
1661 .id_table = hdmi_list,
1662 },
1663 .probe = hdac_hdmi_dev_probe,
1664 .remove = hdac_hdmi_dev_remove,
1665};
1666
1667static int __init hdmi_init(void)
1668{
1669 return snd_hda_ext_driver_register(&hdmi_driver);
1670}
1671
1672static void __exit hdmi_exit(void)
1673{
1674 snd_hda_ext_driver_unregister(&hdmi_driver);
1675}
1676
1677module_init(hdmi_init);
1678module_exit(hdmi_exit);
1679
1680MODULE_LICENSE("GPL v2");
1681MODULE_DESCRIPTION("HDMI HD codec");
1682MODULE_AUTHOR("Samreen Nilofer<samreen.nilofer@intel.com>");
1683MODULE_AUTHOR("Subhransu S. Prusty<subhransu.s.prusty@intel.com>");
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