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5d421516 MB |
1 | /* |
2 | * wm8510.c -- WM8510 ALSA Soc Audio driver | |
3 | * | |
4 | * Copyright 2006 Wolfson Microelectronics PLC. | |
5 | * | |
d331124d | 6 | * Author: Liam Girdwood <lrg@slimlogic.co.uk> |
5d421516 MB |
7 | * |
8 | * This program is free software; you can redistribute it and/or modify | |
9 | * it under the terms of the GNU General Public License version 2 as | |
10 | * published by the Free Software Foundation. | |
11 | */ | |
12 | ||
13 | #include <linux/module.h> | |
14 | #include <linux/moduleparam.h> | |
15 | #include <linux/kernel.h> | |
16 | #include <linux/init.h> | |
17 | #include <linux/delay.h> | |
18 | #include <linux/pm.h> | |
19 | #include <linux/i2c.h> | |
20 | #include <linux/platform_device.h> | |
5e357952 | 21 | #include <linux/spi/spi.h> |
5a0e3ad6 | 22 | #include <linux/slab.h> |
5d421516 MB |
23 | #include <sound/core.h> |
24 | #include <sound/pcm.h> | |
25 | #include <sound/pcm_params.h> | |
26 | #include <sound/soc.h> | |
27 | #include <sound/soc-dapm.h> | |
28 | #include <sound/initval.h> | |
29 | ||
30 | #include "wm8510.h" | |
31 | ||
5d421516 MB |
32 | /* |
33 | * wm8510 register cache | |
34 | * We can't read the WM8510 register space when we are | |
35 | * using 2 wire for device control, so we cache them instead. | |
36 | */ | |
37 | static const u16 wm8510_reg[WM8510_CACHEREGNUM] = { | |
38 | 0x0000, 0x0000, 0x0000, 0x0000, | |
39 | 0x0050, 0x0000, 0x0140, 0x0000, | |
40 | 0x0000, 0x0000, 0x0000, 0x00ff, | |
41 | 0x0000, 0x0000, 0x0100, 0x00ff, | |
42 | 0x0000, 0x0000, 0x012c, 0x002c, | |
43 | 0x002c, 0x002c, 0x002c, 0x0000, | |
44 | 0x0032, 0x0000, 0x0000, 0x0000, | |
45 | 0x0000, 0x0000, 0x0000, 0x0000, | |
46 | 0x0038, 0x000b, 0x0032, 0x0000, | |
47 | 0x0008, 0x000c, 0x0093, 0x00e9, | |
48 | 0x0000, 0x0000, 0x0000, 0x0000, | |
49 | 0x0003, 0x0010, 0x0000, 0x0000, | |
50 | 0x0000, 0x0002, 0x0001, 0x0000, | |
51 | 0x0000, 0x0000, 0x0039, 0x0000, | |
05a076de | 52 | 0x0001, |
5d421516 MB |
53 | }; |
54 | ||
09af98b0 MB |
55 | #define WM8510_POWER1_BIASEN 0x08 |
56 | #define WM8510_POWER1_BUFIOEN 0x10 | |
57 | ||
17a52fd6 | 58 | #define wm8510_reset(c) snd_soc_write(c, WM8510_RESET, 0) |
5d421516 | 59 | |
f0fba2ad LG |
60 | /* codec private data */ |
61 | struct wm8510_priv { | |
62 | enum snd_soc_control_type control_type; | |
f0fba2ad LG |
63 | }; |
64 | ||
5d421516 MB |
65 | static const char *wm8510_companding[] = { "Off", "NC", "u-law", "A-law" }; |
66 | static const char *wm8510_deemp[] = { "None", "32kHz", "44.1kHz", "48kHz" }; | |
67 | static const char *wm8510_alc[] = { "ALC", "Limiter" }; | |
68 | ||
69 | static const struct soc_enum wm8510_enum[] = { | |
70 | SOC_ENUM_SINGLE(WM8510_COMP, 1, 4, wm8510_companding), /* adc */ | |
71 | SOC_ENUM_SINGLE(WM8510_COMP, 3, 4, wm8510_companding), /* dac */ | |
72 | SOC_ENUM_SINGLE(WM8510_DAC, 4, 4, wm8510_deemp), | |
73 | SOC_ENUM_SINGLE(WM8510_ALC3, 8, 2, wm8510_alc), | |
74 | }; | |
75 | ||
76 | static const struct snd_kcontrol_new wm8510_snd_controls[] = { | |
77 | ||
78 | SOC_SINGLE("Digital Loopback Switch", WM8510_COMP, 0, 1, 0), | |
79 | ||
80 | SOC_ENUM("DAC Companding", wm8510_enum[1]), | |
81 | SOC_ENUM("ADC Companding", wm8510_enum[0]), | |
82 | ||
83 | SOC_ENUM("Playback De-emphasis", wm8510_enum[2]), | |
84 | SOC_SINGLE("DAC Inversion Switch", WM8510_DAC, 0, 1, 0), | |
85 | ||
86 | SOC_SINGLE("Master Playback Volume", WM8510_DACVOL, 0, 127, 0), | |
87 | ||
88 | SOC_SINGLE("High Pass Filter Switch", WM8510_ADC, 8, 1, 0), | |
89 | SOC_SINGLE("High Pass Cut Off", WM8510_ADC, 4, 7, 0), | |
90 | SOC_SINGLE("ADC Inversion Switch", WM8510_COMP, 0, 1, 0), | |
91 | ||
92 | SOC_SINGLE("Capture Volume", WM8510_ADCVOL, 0, 127, 0), | |
93 | ||
94 | SOC_SINGLE("DAC Playback Limiter Switch", WM8510_DACLIM1, 8, 1, 0), | |
95 | SOC_SINGLE("DAC Playback Limiter Decay", WM8510_DACLIM1, 4, 15, 0), | |
96 | SOC_SINGLE("DAC Playback Limiter Attack", WM8510_DACLIM1, 0, 15, 0), | |
97 | ||
98 | SOC_SINGLE("DAC Playback Limiter Threshold", WM8510_DACLIM2, 4, 7, 0), | |
99 | SOC_SINGLE("DAC Playback Limiter Boost", WM8510_DACLIM2, 0, 15, 0), | |
100 | ||
101 | SOC_SINGLE("ALC Enable Switch", WM8510_ALC1, 8, 1, 0), | |
102 | SOC_SINGLE("ALC Capture Max Gain", WM8510_ALC1, 3, 7, 0), | |
103 | SOC_SINGLE("ALC Capture Min Gain", WM8510_ALC1, 0, 7, 0), | |
104 | ||
105 | SOC_SINGLE("ALC Capture ZC Switch", WM8510_ALC2, 8, 1, 0), | |
106 | SOC_SINGLE("ALC Capture Hold", WM8510_ALC2, 4, 7, 0), | |
107 | SOC_SINGLE("ALC Capture Target", WM8510_ALC2, 0, 15, 0), | |
108 | ||
109 | SOC_ENUM("ALC Capture Mode", wm8510_enum[3]), | |
110 | SOC_SINGLE("ALC Capture Decay", WM8510_ALC3, 4, 15, 0), | |
111 | SOC_SINGLE("ALC Capture Attack", WM8510_ALC3, 0, 15, 0), | |
112 | ||
113 | SOC_SINGLE("ALC Capture Noise Gate Switch", WM8510_NGATE, 3, 1, 0), | |
114 | SOC_SINGLE("ALC Capture Noise Gate Threshold", WM8510_NGATE, 0, 7, 0), | |
115 | ||
116 | SOC_SINGLE("Capture PGA ZC Switch", WM8510_INPPGA, 7, 1, 0), | |
117 | SOC_SINGLE("Capture PGA Volume", WM8510_INPPGA, 0, 63, 0), | |
118 | ||
119 | SOC_SINGLE("Speaker Playback ZC Switch", WM8510_SPKVOL, 7, 1, 0), | |
120 | SOC_SINGLE("Speaker Playback Switch", WM8510_SPKVOL, 6, 1, 1), | |
121 | SOC_SINGLE("Speaker Playback Volume", WM8510_SPKVOL, 0, 63, 0), | |
122 | SOC_SINGLE("Speaker Boost", WM8510_OUTPUT, 2, 1, 0), | |
123 | ||
124 | SOC_SINGLE("Capture Boost(+20dB)", WM8510_ADCBOOST, 8, 1, 0), | |
125 | SOC_SINGLE("Mono Playback Switch", WM8510_MONOMIX, 6, 1, 1), | |
126 | }; | |
127 | ||
5d421516 MB |
128 | /* Speaker Output Mixer */ |
129 | static const struct snd_kcontrol_new wm8510_speaker_mixer_controls[] = { | |
130 | SOC_DAPM_SINGLE("Line Bypass Switch", WM8510_SPKMIX, 1, 1, 0), | |
131 | SOC_DAPM_SINGLE("Aux Playback Switch", WM8510_SPKMIX, 5, 1, 0), | |
132 | SOC_DAPM_SINGLE("PCM Playback Switch", WM8510_SPKMIX, 0, 1, 0), | |
133 | }; | |
134 | ||
135 | /* Mono Output Mixer */ | |
136 | static const struct snd_kcontrol_new wm8510_mono_mixer_controls[] = { | |
137 | SOC_DAPM_SINGLE("Line Bypass Switch", WM8510_MONOMIX, 1, 1, 0), | |
138 | SOC_DAPM_SINGLE("Aux Playback Switch", WM8510_MONOMIX, 2, 1, 0), | |
139 | SOC_DAPM_SINGLE("PCM Playback Switch", WM8510_MONOMIX, 0, 1, 0), | |
140 | }; | |
141 | ||
142 | static const struct snd_kcontrol_new wm8510_boost_controls[] = { | |
8ae23ec3 | 143 | SOC_DAPM_SINGLE("Mic PGA Switch", WM8510_INPPGA, 6, 1, 1), |
5d421516 MB |
144 | SOC_DAPM_SINGLE("Aux Volume", WM8510_ADCBOOST, 0, 7, 0), |
145 | SOC_DAPM_SINGLE("Mic Volume", WM8510_ADCBOOST, 4, 7, 0), | |
146 | }; | |
147 | ||
148 | static const struct snd_kcontrol_new wm8510_micpga_controls[] = { | |
149 | SOC_DAPM_SINGLE("MICP Switch", WM8510_INPUT, 0, 1, 0), | |
150 | SOC_DAPM_SINGLE("MICN Switch", WM8510_INPUT, 1, 1, 0), | |
151 | SOC_DAPM_SINGLE("AUX Switch", WM8510_INPUT, 2, 1, 0), | |
152 | }; | |
153 | ||
154 | static const struct snd_soc_dapm_widget wm8510_dapm_widgets[] = { | |
155 | SND_SOC_DAPM_MIXER("Speaker Mixer", WM8510_POWER3, 2, 0, | |
156 | &wm8510_speaker_mixer_controls[0], | |
157 | ARRAY_SIZE(wm8510_speaker_mixer_controls)), | |
158 | SND_SOC_DAPM_MIXER("Mono Mixer", WM8510_POWER3, 3, 0, | |
159 | &wm8510_mono_mixer_controls[0], | |
160 | ARRAY_SIZE(wm8510_mono_mixer_controls)), | |
161 | SND_SOC_DAPM_DAC("DAC", "HiFi Playback", WM8510_POWER3, 0, 0), | |
162 | SND_SOC_DAPM_ADC("ADC", "HiFi Capture", WM8510_POWER2, 0, 0), | |
163 | SND_SOC_DAPM_PGA("Aux Input", WM8510_POWER1, 6, 0, NULL, 0), | |
164 | SND_SOC_DAPM_PGA("SpkN Out", WM8510_POWER3, 5, 0, NULL, 0), | |
165 | SND_SOC_DAPM_PGA("SpkP Out", WM8510_POWER3, 6, 0, NULL, 0), | |
166 | SND_SOC_DAPM_PGA("Mono Out", WM8510_POWER3, 7, 0, NULL, 0), | |
167 | ||
2b5f34c5 MB |
168 | SND_SOC_DAPM_MIXER("Mic PGA", WM8510_POWER2, 2, 0, |
169 | &wm8510_micpga_controls[0], | |
170 | ARRAY_SIZE(wm8510_micpga_controls)), | |
5d421516 MB |
171 | SND_SOC_DAPM_MIXER("Boost Mixer", WM8510_POWER2, 4, 0, |
172 | &wm8510_boost_controls[0], | |
173 | ARRAY_SIZE(wm8510_boost_controls)), | |
174 | ||
175 | SND_SOC_DAPM_MICBIAS("Mic Bias", WM8510_POWER1, 4, 0), | |
176 | ||
177 | SND_SOC_DAPM_INPUT("MICN"), | |
178 | SND_SOC_DAPM_INPUT("MICP"), | |
179 | SND_SOC_DAPM_INPUT("AUX"), | |
180 | SND_SOC_DAPM_OUTPUT("MONOOUT"), | |
181 | SND_SOC_DAPM_OUTPUT("SPKOUTP"), | |
182 | SND_SOC_DAPM_OUTPUT("SPKOUTN"), | |
183 | }; | |
184 | ||
185 | static const struct snd_soc_dapm_route audio_map[] = { | |
186 | /* Mono output mixer */ | |
187 | {"Mono Mixer", "PCM Playback Switch", "DAC"}, | |
188 | {"Mono Mixer", "Aux Playback Switch", "Aux Input"}, | |
189 | {"Mono Mixer", "Line Bypass Switch", "Boost Mixer"}, | |
190 | ||
191 | /* Speaker output mixer */ | |
192 | {"Speaker Mixer", "PCM Playback Switch", "DAC"}, | |
193 | {"Speaker Mixer", "Aux Playback Switch", "Aux Input"}, | |
194 | {"Speaker Mixer", "Line Bypass Switch", "Boost Mixer"}, | |
195 | ||
196 | /* Outputs */ | |
197 | {"Mono Out", NULL, "Mono Mixer"}, | |
198 | {"MONOOUT", NULL, "Mono Out"}, | |
199 | {"SpkN Out", NULL, "Speaker Mixer"}, | |
200 | {"SpkP Out", NULL, "Speaker Mixer"}, | |
201 | {"SPKOUTN", NULL, "SpkN Out"}, | |
202 | {"SPKOUTP", NULL, "SpkP Out"}, | |
203 | ||
204 | /* Microphone PGA */ | |
205 | {"Mic PGA", "MICN Switch", "MICN"}, | |
206 | {"Mic PGA", "MICP Switch", "MICP"}, | |
207 | { "Mic PGA", "AUX Switch", "Aux Input" }, | |
208 | ||
209 | /* Boost Mixer */ | |
210 | {"Boost Mixer", "Mic PGA Switch", "Mic PGA"}, | |
211 | {"Boost Mixer", "Mic Volume", "MICP"}, | |
212 | {"Boost Mixer", "Aux Volume", "Aux Input"}, | |
213 | ||
214 | {"ADC", NULL, "Boost Mixer"}, | |
215 | }; | |
216 | ||
217 | static int wm8510_add_widgets(struct snd_soc_codec *codec) | |
218 | { | |
ce6120cc | 219 | struct snd_soc_dapm_context *dapm = &codec->dapm; |
5d421516 | 220 | |
ce6120cc LG |
221 | snd_soc_dapm_new_controls(dapm, wm8510_dapm_widgets, |
222 | ARRAY_SIZE(wm8510_dapm_widgets)); | |
223 | snd_soc_dapm_add_routes(dapm, audio_map, ARRAY_SIZE(audio_map)); | |
5d421516 | 224 | |
5d421516 MB |
225 | return 0; |
226 | } | |
227 | ||
228 | struct pll_ { | |
229 | unsigned int pre_div:4; /* prescale - 1 */ | |
230 | unsigned int n:4; | |
231 | unsigned int k; | |
232 | }; | |
233 | ||
234 | static struct pll_ pll_div; | |
235 | ||
236 | /* The size in bits of the pll divide multiplied by 10 | |
237 | * to allow rounding later */ | |
238 | #define FIXED_PLL_SIZE ((1 << 24) * 10) | |
239 | ||
240 | static void pll_factors(unsigned int target, unsigned int source) | |
241 | { | |
242 | unsigned long long Kpart; | |
243 | unsigned int K, Ndiv, Nmod; | |
244 | ||
245 | Ndiv = target / source; | |
246 | if (Ndiv < 6) { | |
247 | source >>= 1; | |
248 | pll_div.pre_div = 1; | |
249 | Ndiv = target / source; | |
250 | } else | |
251 | pll_div.pre_div = 0; | |
252 | ||
253 | if ((Ndiv < 6) || (Ndiv > 12)) | |
254 | printk(KERN_WARNING | |
449bd54d | 255 | "WM8510 N value %u outwith recommended range!d\n", |
5d421516 MB |
256 | Ndiv); |
257 | ||
258 | pll_div.n = Ndiv; | |
259 | Nmod = target % source; | |
260 | Kpart = FIXED_PLL_SIZE * (long long)Nmod; | |
261 | ||
262 | do_div(Kpart, source); | |
263 | ||
264 | K = Kpart & 0xFFFFFFFF; | |
265 | ||
266 | /* Check if we need to round */ | |
267 | if ((K % 10) >= 5) | |
268 | K += 5; | |
269 | ||
270 | /* Move down to proper range now rounding is done */ | |
271 | K /= 10; | |
272 | ||
273 | pll_div.k = K; | |
274 | } | |
275 | ||
85488037 MB |
276 | static int wm8510_set_dai_pll(struct snd_soc_dai *codec_dai, int pll_id, |
277 | int source, unsigned int freq_in, unsigned int freq_out) | |
5d421516 MB |
278 | { |
279 | struct snd_soc_codec *codec = codec_dai->codec; | |
280 | u16 reg; | |
281 | ||
282 | if (freq_in == 0 || freq_out == 0) { | |
283 | /* Clock CODEC directly from MCLK */ | |
17a52fd6 MB |
284 | reg = snd_soc_read(codec, WM8510_CLOCK); |
285 | snd_soc_write(codec, WM8510_CLOCK, reg & 0x0ff); | |
5d421516 MB |
286 | |
287 | /* Turn off PLL */ | |
17a52fd6 MB |
288 | reg = snd_soc_read(codec, WM8510_POWER1); |
289 | snd_soc_write(codec, WM8510_POWER1, reg & 0x1df); | |
5d421516 MB |
290 | return 0; |
291 | } | |
292 | ||
86027ae7 | 293 | pll_factors(freq_out*4, freq_in); |
5d421516 | 294 | |
17a52fd6 MB |
295 | snd_soc_write(codec, WM8510_PLLN, (pll_div.pre_div << 4) | pll_div.n); |
296 | snd_soc_write(codec, WM8510_PLLK1, pll_div.k >> 18); | |
297 | snd_soc_write(codec, WM8510_PLLK2, (pll_div.k >> 9) & 0x1ff); | |
298 | snd_soc_write(codec, WM8510_PLLK3, pll_div.k & 0x1ff); | |
299 | reg = snd_soc_read(codec, WM8510_POWER1); | |
300 | snd_soc_write(codec, WM8510_POWER1, reg | 0x020); | |
5d421516 MB |
301 | |
302 | /* Run CODEC from PLL instead of MCLK */ | |
17a52fd6 MB |
303 | reg = snd_soc_read(codec, WM8510_CLOCK); |
304 | snd_soc_write(codec, WM8510_CLOCK, reg | 0x100); | |
5d421516 MB |
305 | |
306 | return 0; | |
307 | } | |
308 | ||
309 | /* | |
310 | * Configure WM8510 clock dividers. | |
311 | */ | |
e550e17f | 312 | static int wm8510_set_dai_clkdiv(struct snd_soc_dai *codec_dai, |
5d421516 MB |
313 | int div_id, int div) |
314 | { | |
315 | struct snd_soc_codec *codec = codec_dai->codec; | |
316 | u16 reg; | |
317 | ||
318 | switch (div_id) { | |
319 | case WM8510_OPCLKDIV: | |
17a52fd6 MB |
320 | reg = snd_soc_read(codec, WM8510_GPIO) & 0x1cf; |
321 | snd_soc_write(codec, WM8510_GPIO, reg | div); | |
5d421516 MB |
322 | break; |
323 | case WM8510_MCLKDIV: | |
17a52fd6 MB |
324 | reg = snd_soc_read(codec, WM8510_CLOCK) & 0x11f; |
325 | snd_soc_write(codec, WM8510_CLOCK, reg | div); | |
5d421516 MB |
326 | break; |
327 | case WM8510_ADCCLK: | |
17a52fd6 MB |
328 | reg = snd_soc_read(codec, WM8510_ADC) & 0x1f7; |
329 | snd_soc_write(codec, WM8510_ADC, reg | div); | |
5d421516 MB |
330 | break; |
331 | case WM8510_DACCLK: | |
17a52fd6 MB |
332 | reg = snd_soc_read(codec, WM8510_DAC) & 0x1f7; |
333 | snd_soc_write(codec, WM8510_DAC, reg | div); | |
5d421516 MB |
334 | break; |
335 | case WM8510_BCLKDIV: | |
17a52fd6 MB |
336 | reg = snd_soc_read(codec, WM8510_CLOCK) & 0x1e3; |
337 | snd_soc_write(codec, WM8510_CLOCK, reg | div); | |
5d421516 MB |
338 | break; |
339 | default: | |
340 | return -EINVAL; | |
341 | } | |
342 | ||
343 | return 0; | |
344 | } | |
345 | ||
e550e17f | 346 | static int wm8510_set_dai_fmt(struct snd_soc_dai *codec_dai, |
5d421516 MB |
347 | unsigned int fmt) |
348 | { | |
349 | struct snd_soc_codec *codec = codec_dai->codec; | |
350 | u16 iface = 0; | |
17a52fd6 | 351 | u16 clk = snd_soc_read(codec, WM8510_CLOCK) & 0x1fe; |
5d421516 MB |
352 | |
353 | /* set master/slave audio interface */ | |
354 | switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) { | |
355 | case SND_SOC_DAIFMT_CBM_CFM: | |
356 | clk |= 0x0001; | |
357 | break; | |
358 | case SND_SOC_DAIFMT_CBS_CFS: | |
359 | break; | |
360 | default: | |
361 | return -EINVAL; | |
362 | } | |
363 | ||
364 | /* interface format */ | |
365 | switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) { | |
366 | case SND_SOC_DAIFMT_I2S: | |
367 | iface |= 0x0010; | |
368 | break; | |
369 | case SND_SOC_DAIFMT_RIGHT_J: | |
370 | break; | |
371 | case SND_SOC_DAIFMT_LEFT_J: | |
372 | iface |= 0x0008; | |
373 | break; | |
374 | case SND_SOC_DAIFMT_DSP_A: | |
375 | iface |= 0x00018; | |
376 | break; | |
377 | default: | |
378 | return -EINVAL; | |
379 | } | |
380 | ||
381 | /* clock inversion */ | |
382 | switch (fmt & SND_SOC_DAIFMT_INV_MASK) { | |
383 | case SND_SOC_DAIFMT_NB_NF: | |
384 | break; | |
385 | case SND_SOC_DAIFMT_IB_IF: | |
386 | iface |= 0x0180; | |
387 | break; | |
388 | case SND_SOC_DAIFMT_IB_NF: | |
389 | iface |= 0x0100; | |
390 | break; | |
391 | case SND_SOC_DAIFMT_NB_IF: | |
392 | iface |= 0x0080; | |
393 | break; | |
394 | default: | |
395 | return -EINVAL; | |
396 | } | |
397 | ||
17a52fd6 MB |
398 | snd_soc_write(codec, WM8510_IFACE, iface); |
399 | snd_soc_write(codec, WM8510_CLOCK, clk); | |
5d421516 MB |
400 | return 0; |
401 | } | |
402 | ||
403 | static int wm8510_pcm_hw_params(struct snd_pcm_substream *substream, | |
dee89c4d MB |
404 | struct snd_pcm_hw_params *params, |
405 | struct snd_soc_dai *dai) | |
5d421516 MB |
406 | { |
407 | struct snd_soc_pcm_runtime *rtd = substream->private_data; | |
f0fba2ad | 408 | struct snd_soc_codec *codec = rtd->codec; |
17a52fd6 MB |
409 | u16 iface = snd_soc_read(codec, WM8510_IFACE) & 0x19f; |
410 | u16 adn = snd_soc_read(codec, WM8510_ADD) & 0x1f1; | |
5d421516 MB |
411 | |
412 | /* bit size */ | |
413 | switch (params_format(params)) { | |
414 | case SNDRV_PCM_FORMAT_S16_LE: | |
415 | break; | |
416 | case SNDRV_PCM_FORMAT_S20_3LE: | |
417 | iface |= 0x0020; | |
418 | break; | |
419 | case SNDRV_PCM_FORMAT_S24_LE: | |
420 | iface |= 0x0040; | |
421 | break; | |
422 | case SNDRV_PCM_FORMAT_S32_LE: | |
423 | iface |= 0x0060; | |
424 | break; | |
425 | } | |
426 | ||
427 | /* filter coefficient */ | |
428 | switch (params_rate(params)) { | |
b3172f22 | 429 | case 8000: |
5d421516 MB |
430 | adn |= 0x5 << 1; |
431 | break; | |
b3172f22 | 432 | case 11025: |
5d421516 MB |
433 | adn |= 0x4 << 1; |
434 | break; | |
b3172f22 | 435 | case 16000: |
5d421516 MB |
436 | adn |= 0x3 << 1; |
437 | break; | |
b3172f22 | 438 | case 22050: |
5d421516 MB |
439 | adn |= 0x2 << 1; |
440 | break; | |
b3172f22 | 441 | case 32000: |
5d421516 MB |
442 | adn |= 0x1 << 1; |
443 | break; | |
b3172f22 GL |
444 | case 44100: |
445 | case 48000: | |
5d421516 MB |
446 | break; |
447 | } | |
448 | ||
17a52fd6 MB |
449 | snd_soc_write(codec, WM8510_IFACE, iface); |
450 | snd_soc_write(codec, WM8510_ADD, adn); | |
5d421516 MB |
451 | return 0; |
452 | } | |
453 | ||
e550e17f | 454 | static int wm8510_mute(struct snd_soc_dai *dai, int mute) |
5d421516 MB |
455 | { |
456 | struct snd_soc_codec *codec = dai->codec; | |
17a52fd6 | 457 | u16 mute_reg = snd_soc_read(codec, WM8510_DAC) & 0xffbf; |
5d421516 MB |
458 | |
459 | if (mute) | |
17a52fd6 | 460 | snd_soc_write(codec, WM8510_DAC, mute_reg | 0x40); |
5d421516 | 461 | else |
17a52fd6 | 462 | snd_soc_write(codec, WM8510_DAC, mute_reg); |
5d421516 MB |
463 | return 0; |
464 | } | |
465 | ||
466 | /* liam need to make this lower power with dapm */ | |
467 | static int wm8510_set_bias_level(struct snd_soc_codec *codec, | |
468 | enum snd_soc_bias_level level) | |
469 | { | |
17a52fd6 | 470 | u16 power1 = snd_soc_read(codec, WM8510_POWER1) & ~0x3; |
5d421516 MB |
471 | |
472 | switch (level) { | |
473 | case SND_SOC_BIAS_ON: | |
5d421516 | 474 | case SND_SOC_BIAS_PREPARE: |
09af98b0 | 475 | power1 |= 0x1; /* VMID 50k */ |
17a52fd6 | 476 | snd_soc_write(codec, WM8510_POWER1, power1); |
09af98b0 MB |
477 | break; |
478 | ||
5d421516 | 479 | case SND_SOC_BIAS_STANDBY: |
09af98b0 MB |
480 | power1 |= WM8510_POWER1_BIASEN | WM8510_POWER1_BUFIOEN; |
481 | ||
ce6120cc | 482 | if (codec->dapm.bias_level == SND_SOC_BIAS_OFF) { |
09af98b0 | 483 | /* Initial cap charge at VMID 5k */ |
17a52fd6 | 484 | snd_soc_write(codec, WM8510_POWER1, power1 | 0x3); |
09af98b0 MB |
485 | mdelay(100); |
486 | } | |
487 | ||
488 | power1 |= 0x2; /* VMID 500k */ | |
17a52fd6 | 489 | snd_soc_write(codec, WM8510_POWER1, power1); |
5d421516 | 490 | break; |
09af98b0 | 491 | |
5d421516 | 492 | case SND_SOC_BIAS_OFF: |
17a52fd6 MB |
493 | snd_soc_write(codec, WM8510_POWER1, 0); |
494 | snd_soc_write(codec, WM8510_POWER2, 0); | |
495 | snd_soc_write(codec, WM8510_POWER3, 0); | |
5d421516 MB |
496 | break; |
497 | } | |
09af98b0 | 498 | |
ce6120cc | 499 | codec->dapm.bias_level = level; |
5d421516 MB |
500 | return 0; |
501 | } | |
502 | ||
503 | #define WM8510_RATES (SNDRV_PCM_RATE_8000 | SNDRV_PCM_RATE_11025 |\ | |
504 | SNDRV_PCM_RATE_16000 | SNDRV_PCM_RATE_22050 |\ | |
505 | SNDRV_PCM_RATE_44100 | SNDRV_PCM_RATE_48000) | |
506 | ||
507 | #define WM8510_FORMATS (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S20_3LE |\ | |
508 | SNDRV_PCM_FMTBIT_S24_LE | SNDRV_PCM_FMTBIT_S32_LE) | |
509 | ||
6335d055 EM |
510 | static struct snd_soc_dai_ops wm8510_dai_ops = { |
511 | .hw_params = wm8510_pcm_hw_params, | |
512 | .digital_mute = wm8510_mute, | |
513 | .set_fmt = wm8510_set_dai_fmt, | |
514 | .set_clkdiv = wm8510_set_dai_clkdiv, | |
515 | .set_pll = wm8510_set_dai_pll, | |
516 | }; | |
517 | ||
f0fba2ad LG |
518 | static struct snd_soc_dai_driver wm8510_dai = { |
519 | .name = "wm8510-hifi", | |
5d421516 MB |
520 | .playback = { |
521 | .stream_name = "Playback", | |
522 | .channels_min = 2, | |
523 | .channels_max = 2, | |
524 | .rates = WM8510_RATES, | |
525 | .formats = WM8510_FORMATS,}, | |
526 | .capture = { | |
527 | .stream_name = "Capture", | |
528 | .channels_min = 2, | |
529 | .channels_max = 2, | |
530 | .rates = WM8510_RATES, | |
531 | .formats = WM8510_FORMATS,}, | |
6335d055 | 532 | .ops = &wm8510_dai_ops, |
cc369cf5 | 533 | .symmetric_rates = 1, |
5d421516 | 534 | }; |
5d421516 | 535 | |
f0fba2ad | 536 | static int wm8510_suspend(struct snd_soc_codec *codec, pm_message_t state) |
5d421516 | 537 | { |
5d421516 MB |
538 | wm8510_set_bias_level(codec, SND_SOC_BIAS_OFF); |
539 | return 0; | |
540 | } | |
541 | ||
f0fba2ad | 542 | static int wm8510_resume(struct snd_soc_codec *codec) |
5d421516 | 543 | { |
5d421516 MB |
544 | int i; |
545 | u8 data[2]; | |
546 | u16 *cache = codec->reg_cache; | |
547 | ||
548 | /* Sync reg_cache with the hardware */ | |
549 | for (i = 0; i < ARRAY_SIZE(wm8510_reg); i++) { | |
550 | data[0] = (i << 1) | ((cache[i] >> 8) & 0x0001); | |
551 | data[1] = cache[i] & 0x00ff; | |
552 | codec->hw_write(codec->control_data, data, 2); | |
553 | } | |
554 | wm8510_set_bias_level(codec, SND_SOC_BIAS_STANDBY); | |
29e189c2 | 555 | |
5d421516 MB |
556 | return 0; |
557 | } | |
558 | ||
f0fba2ad | 559 | static int wm8510_probe(struct snd_soc_codec *codec) |
5d421516 | 560 | { |
f0fba2ad LG |
561 | struct wm8510_priv *wm8510 = snd_soc_codec_get_drvdata(codec); |
562 | int ret; | |
5d421516 | 563 | |
f0fba2ad | 564 | ret = snd_soc_codec_set_cache_io(codec, 7, 9, wm8510->control_type); |
17a52fd6 | 565 | if (ret < 0) { |
f0fba2ad LG |
566 | printk(KERN_ERR "wm8510: failed to set cache I/O: %d\n", ret); |
567 | return ret; | |
17a52fd6 MB |
568 | } |
569 | ||
5d421516 MB |
570 | wm8510_reset(codec); |
571 | ||
5d421516 MB |
572 | /* power on device */ |
573 | wm8510_set_bias_level(codec, SND_SOC_BIAS_STANDBY); | |
3e8e1952 IM |
574 | snd_soc_add_controls(codec, wm8510_snd_controls, |
575 | ARRAY_SIZE(wm8510_snd_controls)); | |
5d421516 | 576 | wm8510_add_widgets(codec); |
fe3e78e0 | 577 | |
5d421516 | 578 | return ret; |
5d421516 MB |
579 | } |
580 | ||
f0fba2ad LG |
581 | /* power down chip */ |
582 | static int wm8510_remove(struct snd_soc_codec *codec) | |
5d421516 | 583 | { |
f0fba2ad | 584 | struct wm8510_priv *wm8510 = snd_soc_codec_get_drvdata(codec); |
5d421516 | 585 | |
f0fba2ad LG |
586 | wm8510_set_bias_level(codec, SND_SOC_BIAS_OFF); |
587 | kfree(wm8510); | |
5d421516 MB |
588 | return 0; |
589 | } | |
590 | ||
f0fba2ad LG |
591 | static struct snd_soc_codec_driver soc_codec_dev_wm8510 = { |
592 | .probe = wm8510_probe, | |
593 | .remove = wm8510_remove, | |
594 | .suspend = wm8510_suspend, | |
595 | .resume = wm8510_resume, | |
596 | .set_bias_level = wm8510_set_bias_level, | |
597 | .reg_cache_size = ARRAY_SIZE(wm8510_reg), | |
598 | .reg_word_size = sizeof(u16), | |
599 | .reg_cache_default =wm8510_reg, | |
5d421516 MB |
600 | }; |
601 | ||
5e357952 MB |
602 | #if defined(CONFIG_SPI_MASTER) |
603 | static int __devinit wm8510_spi_probe(struct spi_device *spi) | |
604 | { | |
f0fba2ad | 605 | struct wm8510_priv *wm8510; |
5e357952 MB |
606 | int ret; |
607 | ||
f0fba2ad LG |
608 | wm8510 = kzalloc(sizeof(struct wm8510_priv), GFP_KERNEL); |
609 | if (wm8510 == NULL) | |
610 | return -ENOMEM; | |
611 | ||
f0fba2ad LG |
612 | wm8510->control_type = SND_SOC_SPI; |
613 | spi_set_drvdata(spi, wm8510); | |
5e357952 | 614 | |
f0fba2ad LG |
615 | ret = snd_soc_register_codec(&spi->dev, |
616 | &soc_codec_dev_wm8510, &wm8510_dai, 1); | |
5e357952 | 617 | if (ret < 0) |
f0fba2ad | 618 | kfree(wm8510); |
5e357952 MB |
619 | return ret; |
620 | } | |
621 | ||
622 | static int __devexit wm8510_spi_remove(struct spi_device *spi) | |
623 | { | |
f0fba2ad | 624 | snd_soc_unregister_codec(&spi->dev); |
5e357952 MB |
625 | return 0; |
626 | } | |
627 | ||
628 | static struct spi_driver wm8510_spi_driver = { | |
629 | .driver = { | |
630 | .name = "wm8510", | |
5e357952 MB |
631 | .owner = THIS_MODULE, |
632 | }, | |
633 | .probe = wm8510_spi_probe, | |
634 | .remove = __devexit_p(wm8510_spi_remove), | |
635 | }; | |
5e357952 MB |
636 | #endif /* CONFIG_SPI_MASTER */ |
637 | ||
f0fba2ad LG |
638 | #if defined(CONFIG_I2C) || defined(CONFIG_I2C_MODULE) |
639 | static __devinit int wm8510_i2c_probe(struct i2c_client *i2c, | |
640 | const struct i2c_device_id *id) | |
5d421516 | 641 | { |
f0fba2ad LG |
642 | struct wm8510_priv *wm8510; |
643 | int ret; | |
5d421516 | 644 | |
f0fba2ad LG |
645 | wm8510 = kzalloc(sizeof(struct wm8510_priv), GFP_KERNEL); |
646 | if (wm8510 == NULL) | |
5d421516 MB |
647 | return -ENOMEM; |
648 | ||
f0fba2ad | 649 | i2c_set_clientdata(i2c, wm8510); |
f0fba2ad | 650 | wm8510->control_type = SND_SOC_I2C; |
5d421516 | 651 | |
f0fba2ad LG |
652 | ret = snd_soc_register_codec(&i2c->dev, |
653 | &soc_codec_dev_wm8510, &wm8510_dai, 1); | |
654 | if (ret < 0) | |
655 | kfree(wm8510); | |
5d421516 MB |
656 | return ret; |
657 | } | |
658 | ||
f0fba2ad | 659 | static __devexit int wm8510_i2c_remove(struct i2c_client *client) |
5d421516 | 660 | { |
f0fba2ad | 661 | snd_soc_unregister_codec(&client->dev); |
5d421516 MB |
662 | return 0; |
663 | } | |
664 | ||
f0fba2ad LG |
665 | static const struct i2c_device_id wm8510_i2c_id[] = { |
666 | { "wm8510", 0 }, | |
667 | { } | |
668 | }; | |
669 | MODULE_DEVICE_TABLE(i2c, wm8510_i2c_id); | |
670 | ||
671 | static struct i2c_driver wm8510_i2c_driver = { | |
672 | .driver = { | |
673 | .name = "wm8510-codec", | |
674 | .owner = THIS_MODULE, | |
675 | }, | |
676 | .probe = wm8510_i2c_probe, | |
677 | .remove = __devexit_p(wm8510_i2c_remove), | |
678 | .id_table = wm8510_i2c_id, | |
5d421516 | 679 | }; |
f0fba2ad | 680 | #endif |
5d421516 | 681 | |
c9b3a40f | 682 | static int __init wm8510_modinit(void) |
64089b84 | 683 | { |
f0fba2ad LG |
684 | int ret = 0; |
685 | #if defined(CONFIG_I2C) || defined(CONFIG_I2C_MODULE) | |
686 | ret = i2c_add_driver(&wm8510_i2c_driver); | |
687 | if (ret != 0) { | |
688 | printk(KERN_ERR "Failed to register WM8510 I2C driver: %d\n", | |
689 | ret); | |
690 | } | |
691 | #endif | |
692 | #if defined(CONFIG_SPI_MASTER) | |
693 | ret = spi_register_driver(&wm8510_spi_driver); | |
694 | if (ret != 0) { | |
695 | printk(KERN_ERR "Failed to register WM8510 SPI driver: %d\n", | |
696 | ret); | |
697 | } | |
698 | #endif | |
699 | return ret; | |
64089b84 MB |
700 | } |
701 | module_init(wm8510_modinit); | |
702 | ||
703 | static void __exit wm8510_exit(void) | |
704 | { | |
f0fba2ad LG |
705 | #if defined(CONFIG_I2C) || defined(CONFIG_I2C_MODULE) |
706 | i2c_del_driver(&wm8510_i2c_driver); | |
707 | #endif | |
708 | #if defined(CONFIG_SPI_MASTER) | |
709 | spi_unregister_driver(&wm8510_spi_driver); | |
710 | #endif | |
64089b84 MB |
711 | } |
712 | module_exit(wm8510_exit); | |
713 | ||
5d421516 MB |
714 | MODULE_DESCRIPTION("ASoC WM8510 driver"); |
715 | MODULE_AUTHOR("Liam Girdwood"); | |
716 | MODULE_LICENSE("GPL"); |