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40e0aa64 RP |
1 | /* |
2 | * wm8731.c -- WM8731 ALSA SoC Audio driver | |
3 | * | |
4 | * Copyright 2005 Openedhand Ltd. | |
5 | * | |
6 | * Author: Richard Purdie <richard@openedhand.com> | |
7 | * | |
8 | * Based on wm8753.c by Liam Girdwood | |
9 | * | |
10 | * This program is free software; you can redistribute it and/or modify | |
11 | * it under the terms of the GNU General Public License version 2 as | |
12 | * published by the Free Software Foundation. | |
13 | */ | |
14 | ||
15 | #include <linux/module.h> | |
16 | #include <linux/moduleparam.h> | |
17 | #include <linux/init.h> | |
18 | #include <linux/delay.h> | |
19 | #include <linux/pm.h> | |
20 | #include <linux/i2c.h> | |
21 | #include <linux/platform_device.h> | |
22 | #include <sound/driver.h> | |
23 | #include <sound/core.h> | |
24 | #include <sound/pcm.h> | |
25 | #include <sound/pcm_params.h> | |
26 | #include <sound/soc.h> | |
27 | #include <sound/soc-dapm.h> | |
28 | #include <sound/initval.h> | |
29 | ||
30 | #include "wm8731.h" | |
31 | ||
32 | #define AUDIO_NAME "wm8731" | |
33 | #define WM8731_VERSION "0.12" | |
34 | ||
35 | /* | |
36 | * Debug | |
37 | */ | |
38 | ||
39 | #define WM8731_DEBUG 0 | |
40 | ||
41 | #ifdef WM8731_DEBUG | |
42 | #define dbg(format, arg...) \ | |
43 | printk(KERN_DEBUG AUDIO_NAME ": " format "\n" , ## arg) | |
44 | #else | |
45 | #define dbg(format, arg...) do {} while (0) | |
46 | #endif | |
47 | #define err(format, arg...) \ | |
48 | printk(KERN_ERR AUDIO_NAME ": " format "\n" , ## arg) | |
49 | #define info(format, arg...) \ | |
50 | printk(KERN_INFO AUDIO_NAME ": " format "\n" , ## arg) | |
51 | #define warn(format, arg...) \ | |
52 | printk(KERN_WARNING AUDIO_NAME ": " format "\n" , ## arg) | |
53 | ||
54 | struct snd_soc_codec_device soc_codec_dev_wm8731; | |
55 | ||
56 | /* | |
57 | * wm8731 register cache | |
58 | * We can't read the WM8731 register space when we are | |
59 | * using 2 wire for device control, so we cache them instead. | |
60 | * There is no point in caching the reset register | |
61 | */ | |
62 | static const u16 wm8731_reg[WM8731_CACHEREGNUM] = { | |
63 | 0x0097, 0x0097, 0x0079, 0x0079, | |
64 | 0x000a, 0x0008, 0x009f, 0x000a, | |
65 | 0x0000, 0x0000 | |
66 | }; | |
67 | ||
68 | #define WM8731_DAIFMT \ | |
69 | (SND_SOC_DAIFMT_I2S | SND_SOC_DAIFMT_LEFT_J | SND_SOC_DAIFMT_RIGHT_J | \ | |
70 | SND_SOC_DAIFMT_NB_NF | SND_SOC_DAIFMT_NB_IF | SND_SOC_DAIFMT_IB_NF | \ | |
71 | SND_SOC_DAIFMT_IB_IF) | |
72 | ||
73 | #define WM8731_DIR \ | |
74 | (SND_SOC_DAIDIR_PLAYBACK | SND_SOC_DAIDIR_CAPTURE) | |
75 | ||
76 | #define WM8731_RATES \ | |
77 | (SNDRV_PCM_RATE_8000 | SNDRV_PCM_RATE_11025 | SNDRV_PCM_RATE_16000 | \ | |
78 | SNDRV_PCM_RATE_22050 | SNDRV_PCM_RATE_32000 | SNDRV_PCM_RATE_44100 | \ | |
79 | SNDRV_PCM_RATE_48000 | SNDRV_PCM_RATE_88200 | SNDRV_PCM_RATE_96000) | |
80 | ||
81 | #define WM8731_HIFI_BITS \ | |
82 | (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S20_3LE | \ | |
83 | SNDRV_PCM_FMTBIT_S24_LE | SNDRV_PCM_FMTBIT_S32_LE) | |
84 | ||
85 | static struct snd_soc_dai_mode wm8731_modes[] = { | |
86 | /* codec frame and clock master modes */ | |
87 | /* 8k */ | |
527541f9 LG |
88 | { |
89 | .fmt = WM8731_DAIFMT | SND_SOC_DAIFMT_CBM_CFM, | |
b3b9c1cb TI |
90 | .pcmfmt = WM8731_HIFI_BITS, |
91 | .pcmrate = SNDRV_PCM_RATE_8000, | |
527541f9 | 92 | .pcmdir = WM8731_DIR, |
b3b9c1cb | 93 | .fs = 1536, |
527541f9 LG |
94 | .bfs = SND_SOC_FSB(64), |
95 | }, | |
96 | { | |
97 | .fmt = WM8731_DAIFMT | SND_SOC_DAIFMT_CBM_CFM, | |
b3b9c1cb TI |
98 | .pcmfmt = WM8731_HIFI_BITS, |
99 | .pcmrate = SNDRV_PCM_RATE_8000, | |
527541f9 | 100 | .pcmdir = WM8731_DIR, |
b3b9c1cb | 101 | .fs = 2304, |
527541f9 LG |
102 | .bfs = SND_SOC_FSB(64), |
103 | }, | |
104 | { | |
105 | .fmt = WM8731_DAIFMT | SND_SOC_DAIFMT_CBM_CFM, | |
b3b9c1cb TI |
106 | .pcmfmt = WM8731_HIFI_BITS, |
107 | .pcmrate = SNDRV_PCM_RATE_8000, | |
527541f9 | 108 | .pcmdir = WM8731_DIR, |
b3b9c1cb | 109 | .fs = 1408, |
527541f9 LG |
110 | .bfs = SND_SOC_FSB(64), |
111 | }, | |
112 | { | |
113 | .fmt = WM8731_DAIFMT | SND_SOC_DAIFMT_CBM_CFM, | |
b3b9c1cb TI |
114 | .pcmfmt = WM8731_HIFI_BITS, |
115 | .pcmrate = SNDRV_PCM_RATE_8000, | |
527541f9 | 116 | .pcmdir = WM8731_DIR, |
b3b9c1cb | 117 | .fs = 2112, |
527541f9 LG |
118 | .bfs = SND_SOC_FSB(64), |
119 | }, | |
40e0aa64 RP |
120 | |
121 | /* 32k */ | |
527541f9 LG |
122 | { |
123 | .fmt = WM8731_DAIFMT | SND_SOC_DAIFMT_CBM_CFM, | |
b3b9c1cb | 124 | .pcmfmt = WM8731_HIFI_BITS, |
527541f9 LG |
125 | .pcmrate = SNDRV_PCM_RATE_32000, |
126 | .pcmdir = WM8731_DIR, | |
b3b9c1cb | 127 | .fs = 384, |
527541f9 LG |
128 | .bfs = SND_SOC_FSB(64), |
129 | }, | |
130 | { | |
131 | .fmt = WM8731_DAIFMT | SND_SOC_DAIFMT_CBM_CFM, | |
b3b9c1cb TI |
132 | .pcmfmt = WM8731_HIFI_BITS, |
133 | .pcmrate = SNDRV_PCM_RATE_32000, | |
527541f9 | 134 | .pcmdir = WM8731_DIR, |
b3b9c1cb | 135 | .fs = 576, |
527541f9 LG |
136 | .bfs = SND_SOC_FSB(64), |
137 | }, | |
40e0aa64 RP |
138 | |
139 | /* 44.1k & 48k */ | |
527541f9 LG |
140 | { |
141 | .fmt = WM8731_DAIFMT | SND_SOC_DAIFMT_CBM_CFM, | |
b3b9c1cb | 142 | .pcmfmt = WM8731_HIFI_BITS, |
527541f9 LG |
143 | .pcmrate = SNDRV_PCM_RATE_44100 | SNDRV_PCM_RATE_48000, |
144 | .pcmdir = WM8731_DIR, | |
b3b9c1cb | 145 | .fs = 256, |
527541f9 LG |
146 | .bfs = SND_SOC_FSB(64), |
147 | }, | |
148 | { | |
149 | .fmt = WM8731_DAIFMT | SND_SOC_DAIFMT_CBM_CFM, | |
b3b9c1cb | 150 | .pcmfmt = WM8731_HIFI_BITS, |
527541f9 LG |
151 | .pcmrate = SNDRV_PCM_RATE_44100 | SNDRV_PCM_RATE_48000, |
152 | .pcmdir = WM8731_DIR, | |
b3b9c1cb | 153 | .fs = 384, |
527541f9 LG |
154 | .bfs = SND_SOC_FSB(64), |
155 | }, | |
40e0aa64 RP |
156 | |
157 | /* 88.2 & 96k */ | |
527541f9 LG |
158 | { |
159 | .fmt = WM8731_DAIFMT | SND_SOC_DAIFMT_CBM_CFM, | |
b3b9c1cb | 160 | .pcmfmt = WM8731_HIFI_BITS, |
527541f9 LG |
161 | .pcmrate = SNDRV_PCM_RATE_88200 | SNDRV_PCM_RATE_96000, |
162 | .pcmdir = WM8731_DIR, | |
b3b9c1cb | 163 | .fs = 128, |
527541f9 LG |
164 | .bfs = SND_SOC_FSB(64), |
165 | ||
166 | }, | |
167 | { | |
168 | .fmt = WM8731_DAIFMT | SND_SOC_DAIFMT_CBM_CFM, | |
b3b9c1cb | 169 | .pcmfmt = WM8731_HIFI_BITS, |
527541f9 LG |
170 | .pcmrate = SNDRV_PCM_RATE_88200 | SNDRV_PCM_RATE_96000, |
171 | .pcmdir = WM8731_DIR, | |
b3b9c1cb | 172 | .fs = 192, |
527541f9 LG |
173 | .bfs = SND_SOC_FSB(64), |
174 | }, | |
40e0aa64 RP |
175 | |
176 | /* USB codec frame and clock master modes */ | |
177 | /* 8k */ | |
527541f9 LG |
178 | { |
179 | .fmt = WM8731_DAIFMT | SND_SOC_DAIFMT_CBM_CFM, | |
b3b9c1cb TI |
180 | .pcmfmt = WM8731_HIFI_BITS, |
181 | .pcmrate = SNDRV_PCM_RATE_8000, | |
527541f9 | 182 | .pcmdir = WM8731_DIR, |
b3b9c1cb TI |
183 | .flags = SND_SOC_DAI_BFS_DIV, |
184 | .fs = 1500, | |
527541f9 LG |
185 | .bfs = SND_SOC_FSBD(1), |
186 | }, | |
40e0aa64 RP |
187 | |
188 | /* 44.1k */ | |
527541f9 LG |
189 | { |
190 | .fmt = WM8731_DAIFMT | SND_SOC_DAIFMT_CBM_CFM, | |
b3b9c1cb TI |
191 | .pcmfmt = WM8731_HIFI_BITS, |
192 | .pcmrate = SNDRV_PCM_RATE_44100, | |
527541f9 LG |
193 | .pcmdir = WM8731_DIR, |
194 | .flags = SND_SOC_DAI_BFS_DIV, | |
b3b9c1cb | 195 | .fs = 272, |
527541f9 LG |
196 | .bfs = SND_SOC_FSBD(1), |
197 | }, | |
40e0aa64 RP |
198 | |
199 | /* 48k */ | |
527541f9 LG |
200 | { |
201 | .fmt = WM8731_DAIFMT | SND_SOC_DAIFMT_CBM_CFM, | |
b3b9c1cb TI |
202 | .pcmfmt = WM8731_HIFI_BITS, |
203 | .pcmrate = SNDRV_PCM_RATE_48000, | |
527541f9 | 204 | .pcmdir = WM8731_DIR, |
b3b9c1cb TI |
205 | .flags = SND_SOC_DAI_BFS_DIV, |
206 | .fs = 250, | |
527541f9 LG |
207 | .bfs = SND_SOC_FSBD(1), |
208 | }, | |
40e0aa64 RP |
209 | |
210 | /* 88.2k */ | |
527541f9 | 211 | { |
b3b9c1cb TI |
212 | .fmt = WM8731_DAIFMT | SND_SOC_DAIFMT_CBM_CFM, |
213 | .pcmfmt = WM8731_HIFI_BITS, | |
214 | .pcmrate = SNDRV_PCM_RATE_88200, | |
527541f9 LG |
215 | .pcmdir = WM8731_DIR, |
216 | .flags = SND_SOC_DAI_BFS_DIV, | |
b3b9c1cb | 217 | .fs = 136, |
527541f9 LG |
218 | .bfs = SND_SOC_FSBD(1), |
219 | }, | |
40e0aa64 RP |
220 | |
221 | /* 96k */ | |
527541f9 LG |
222 | { |
223 | .fmt = WM8731_DAIFMT | SND_SOC_DAIFMT_CBM_CFM, | |
b3b9c1cb TI |
224 | .pcmfmt = WM8731_HIFI_BITS, |
225 | .pcmrate = SNDRV_PCM_RATE_96000, | |
527541f9 | 226 | .pcmdir = WM8731_DIR, |
b3b9c1cb TI |
227 | .flags = SND_SOC_DAI_BFS_DIV, |
228 | .fs = 125, | |
527541f9 LG |
229 | .bfs = SND_SOC_FSBD(1), |
230 | }, | |
40e0aa64 RP |
231 | |
232 | /* codec frame and clock slave modes */ | |
527541f9 LG |
233 | { |
234 | .fmt = WM8731_DAIFMT | SND_SOC_DAIFMT_CBS_CFS, | |
b3b9c1cb TI |
235 | .pcmfmt = WM8731_HIFI_BITS, |
236 | .pcmrate = WM8731_RATES, | |
527541f9 LG |
237 | .pcmdir = WM8731_DIR, |
238 | .flags = SND_SOC_DAI_BFS_DIV, | |
b3b9c1cb | 239 | .fs = SND_SOC_FS_ALL, |
527541f9 LG |
240 | .bfs = SND_SOC_FSBD_ALL, |
241 | }, | |
40e0aa64 RP |
242 | }; |
243 | ||
244 | /* | |
245 | * read wm8731 register cache | |
246 | */ | |
247 | static inline unsigned int wm8731_read_reg_cache(struct snd_soc_codec *codec, | |
248 | unsigned int reg) | |
249 | { | |
250 | u16 *cache = codec->reg_cache; | |
251 | if (reg == WM8731_RESET) | |
252 | return 0; | |
253 | if (reg >= WM8731_CACHEREGNUM) | |
254 | return -1; | |
255 | return cache[reg]; | |
256 | } | |
257 | ||
258 | /* | |
259 | * write wm8731 register cache | |
260 | */ | |
261 | static inline void wm8731_write_reg_cache(struct snd_soc_codec *codec, | |
262 | u16 reg, unsigned int value) | |
263 | { | |
264 | u16 *cache = codec->reg_cache; | |
265 | if (reg >= WM8731_CACHEREGNUM) | |
266 | return; | |
267 | cache[reg] = value; | |
268 | } | |
269 | ||
270 | /* | |
271 | * write to the WM8731 register space | |
272 | */ | |
273 | static int wm8731_write(struct snd_soc_codec *codec, unsigned int reg, | |
274 | unsigned int value) | |
275 | { | |
276 | u8 data[2]; | |
277 | ||
278 | /* data is | |
279 | * D15..D9 WM8731 register offset | |
280 | * D8...D0 register data | |
281 | */ | |
282 | data[0] = (reg << 1) | ((value >> 8) & 0x0001); | |
283 | data[1] = value & 0x00ff; | |
284 | ||
285 | wm8731_write_reg_cache (codec, reg, value); | |
286 | if (codec->hw_write(codec->control_data, data, 2) == 2) | |
287 | return 0; | |
288 | else | |
289 | return -EIO; | |
290 | } | |
291 | ||
292 | #define wm8731_reset(c) wm8731_write(c, WM8731_RESET, 0) | |
293 | ||
294 | static const char *wm8731_input_select[] = {"Line In", "Mic"}; | |
295 | static const char *wm8731_deemph[] = {"None", "32Khz", "44.1Khz", "48Khz"}; | |
296 | ||
297 | static const struct soc_enum wm8731_enum[] = { | |
298 | SOC_ENUM_SINGLE(WM8731_APANA, 2, 2, wm8731_input_select), | |
299 | SOC_ENUM_SINGLE(WM8731_APDIGI, 1, 4, wm8731_deemph), | |
300 | }; | |
301 | ||
302 | static const struct snd_kcontrol_new wm8731_snd_controls[] = { | |
303 | ||
304 | SOC_DOUBLE_R("Playback Volume", WM8731_LOUT1V, WM8731_ROUT1V, 0, 127, 0), | |
305 | SOC_DOUBLE_R("Playback ZC Switch", WM8731_LOUT1V, WM8731_ROUT1V, 7, 1, 0), | |
306 | ||
307 | SOC_DOUBLE_R("Capture Volume", WM8731_LINVOL, WM8731_RINVOL, 0, 31, 0), | |
308 | SOC_DOUBLE_R("Line Capture Switch", WM8731_LINVOL, WM8731_RINVOL, 7, 1, 1), | |
309 | ||
310 | SOC_SINGLE("Mic Boost (+20dB)", WM8731_APANA, 0, 1, 0), | |
311 | SOC_SINGLE("Capture Mic Switch", WM8731_APANA, 1, 1, 1), | |
312 | ||
313 | SOC_SINGLE("Sidetone Playback Volume", WM8731_APANA, 6, 3, 1), | |
314 | ||
315 | SOC_SINGLE("ADC High Pass Filter Switch", WM8731_APDIGI, 0, 1, 1), | |
316 | SOC_SINGLE("Store DC Offset Switch", WM8731_APDIGI, 4, 1, 0), | |
317 | ||
318 | SOC_ENUM("Playback De-emphasis", wm8731_enum[1]), | |
319 | }; | |
320 | ||
321 | /* add non dapm controls */ | |
322 | static int wm8731_add_controls(struct snd_soc_codec *codec) | |
323 | { | |
324 | int err, i; | |
325 | ||
326 | for (i = 0; i < ARRAY_SIZE(wm8731_snd_controls); i++) { | |
327 | if ((err = snd_ctl_add(codec->card, | |
328 | snd_soc_cnew(&wm8731_snd_controls[i],codec, NULL))) < 0) | |
329 | return err; | |
330 | } | |
331 | ||
332 | return 0; | |
333 | } | |
334 | ||
335 | /* Output Mixer */ | |
336 | static const struct snd_kcontrol_new wm8731_output_mixer_controls[] = { | |
337 | SOC_DAPM_SINGLE("Line Bypass Switch", WM8731_APANA, 3, 1, 0), | |
338 | SOC_DAPM_SINGLE("Mic Sidetone Switch", WM8731_APANA, 5, 1, 0), | |
339 | SOC_DAPM_SINGLE("HiFi Playback Switch", WM8731_APANA, 4, 1, 0), | |
340 | }; | |
341 | ||
342 | /* Input mux */ | |
343 | static const struct snd_kcontrol_new wm8731_input_mux_controls = | |
344 | SOC_DAPM_ENUM("Input Select", wm8731_enum[0]); | |
345 | ||
346 | static const struct snd_soc_dapm_widget wm8731_dapm_widgets[] = { | |
347 | SND_SOC_DAPM_MIXER("Output Mixer", WM8731_PWR, 4, 1, | |
348 | &wm8731_output_mixer_controls[0], | |
349 | ARRAY_SIZE(wm8731_output_mixer_controls)), | |
350 | SND_SOC_DAPM_DAC("DAC", "HiFi Playback", WM8731_PWR, 3, 1), | |
351 | SND_SOC_DAPM_OUTPUT("LOUT"), | |
352 | SND_SOC_DAPM_OUTPUT("LHPOUT"), | |
353 | SND_SOC_DAPM_OUTPUT("ROUT"), | |
354 | SND_SOC_DAPM_OUTPUT("RHPOUT"), | |
355 | SND_SOC_DAPM_ADC("ADC", "HiFi Capture", WM8731_PWR, 2, 1), | |
356 | SND_SOC_DAPM_MUX("Input Mux", SND_SOC_NOPM, 0, 0, &wm8731_input_mux_controls), | |
357 | SND_SOC_DAPM_PGA("Line Input", WM8731_PWR, 0, 1, NULL, 0), | |
358 | SND_SOC_DAPM_MICBIAS("Mic Bias", WM8731_PWR, 1, 1), | |
359 | SND_SOC_DAPM_INPUT("MICIN"), | |
360 | SND_SOC_DAPM_INPUT("RLINEIN"), | |
361 | SND_SOC_DAPM_INPUT("LLINEIN"), | |
362 | }; | |
363 | ||
364 | static const char *intercon[][3] = { | |
365 | /* output mixer */ | |
366 | {"Output Mixer", "Line Bypass Switch", "Line Input"}, | |
367 | {"Output Mixer", "HiFi Playback Switch", "DAC"}, | |
368 | {"Output Mixer", "Mic Sidetone Switch", "Mic Bias"}, | |
369 | ||
370 | /* outputs */ | |
371 | {"RHPOUT", NULL, "Output Mixer"}, | |
372 | {"ROUT", NULL, "Output Mixer"}, | |
373 | {"LHPOUT", NULL, "Output Mixer"}, | |
374 | {"LOUT", NULL, "Output Mixer"}, | |
375 | ||
376 | /* input mux */ | |
377 | {"Input Mux", "Line In", "Line Input"}, | |
378 | {"Input Mux", "Mic", "Mic Bias"}, | |
379 | {"ADC", NULL, "Input Mux"}, | |
380 | ||
381 | /* inputs */ | |
382 | {"Line Input", NULL, "LLINEIN"}, | |
383 | {"Line Input", NULL, "RLINEIN"}, | |
384 | {"Mic Bias", NULL, "MICIN"}, | |
385 | ||
386 | /* terminator */ | |
387 | {NULL, NULL, NULL}, | |
388 | }; | |
389 | ||
390 | static int wm8731_add_widgets(struct snd_soc_codec *codec) | |
391 | { | |
392 | int i; | |
393 | ||
394 | for(i = 0; i < ARRAY_SIZE(wm8731_dapm_widgets); i++) { | |
395 | snd_soc_dapm_new_control(codec, &wm8731_dapm_widgets[i]); | |
396 | } | |
397 | ||
398 | /* set up audio path interconnects */ | |
399 | for(i = 0; intercon[i][0] != NULL; i++) { | |
400 | snd_soc_dapm_connect_input(codec, intercon[i][0], | |
401 | intercon[i][1], intercon[i][2]); | |
402 | } | |
403 | ||
404 | snd_soc_dapm_new_widgets(codec); | |
405 | return 0; | |
406 | } | |
407 | ||
408 | struct _coeff_div { | |
409 | u32 mclk; | |
410 | u32 rate; | |
411 | u16 fs; | |
412 | u8 sr:4; | |
413 | u8 bosr:1; | |
414 | u8 usb:1; | |
415 | }; | |
416 | ||
417 | /* codec mclk clock divider coefficients */ | |
418 | static const struct _coeff_div coeff_div[] = { | |
419 | /* 48k */ | |
420 | {12288000, 48000, 256, 0x0, 0x0, 0x0}, | |
421 | {18432000, 48000, 384, 0x0, 0x1, 0x0}, | |
422 | {12000000, 48000, 250, 0x0, 0x0, 0x1}, | |
423 | ||
424 | /* 32k */ | |
425 | {12288000, 32000, 384, 0x6, 0x0, 0x0}, | |
426 | {18432000, 32000, 576, 0x6, 0x1, 0x0}, | |
427 | ||
428 | /* 8k */ | |
429 | {12288000, 8000, 1536, 0x3, 0x0, 0x0}, | |
430 | {18432000, 8000, 2304, 0x3, 0x1, 0x0}, | |
431 | {11289600, 8000, 1408, 0xb, 0x0, 0x0}, | |
432 | {16934400, 8000, 2112, 0xb, 0x1, 0x0}, | |
433 | {12000000, 8000, 1500, 0x3, 0x0, 0x1}, | |
434 | ||
435 | /* 96k */ | |
436 | {12288000, 96000, 128, 0x7, 0x0, 0x0}, | |
437 | {18432000, 96000, 192, 0x7, 0x1, 0x0}, | |
438 | {12000000, 96000, 125, 0x7, 0x0, 0x1}, | |
439 | ||
440 | /* 44.1k */ | |
441 | {11289600, 44100, 256, 0x8, 0x0, 0x0}, | |
442 | {16934400, 44100, 384, 0x8, 0x1, 0x0}, | |
443 | {12000000, 44100, 272, 0x8, 0x1, 0x1}, | |
444 | ||
445 | /* 88.2k */ | |
446 | {11289600, 88200, 128, 0xf, 0x0, 0x0}, | |
447 | {16934400, 88200, 192, 0xf, 0x1, 0x0}, | |
448 | {12000000, 88200, 136, 0xf, 0x1, 0x1}, | |
449 | }; | |
450 | ||
451 | static inline int get_coeff(int mclk, int rate) | |
452 | { | |
453 | int i; | |
454 | ||
455 | for (i = 0; i < ARRAY_SIZE(coeff_div); i++) { | |
456 | if (coeff_div[i].rate == rate && coeff_div[i].mclk == mclk) | |
457 | return i; | |
458 | } | |
459 | return 0; | |
460 | } | |
461 | ||
462 | /* WM8731 supports numerous clocks per sample rate */ | |
463 | static unsigned int wm8731_config_sysclk(struct snd_soc_codec_dai *dai, | |
464 | struct snd_soc_clock_info *info, unsigned int clk) | |
465 | { | |
466 | dai->mclk = 0; | |
467 | ||
468 | /* check that the calculated FS and rate actually match a clock from | |
469 | * the machine driver */ | |
470 | if (info->fs * info->rate == clk) | |
471 | dai->mclk = clk; | |
472 | ||
473 | return dai->mclk; | |
474 | } | |
475 | ||
476 | static int wm8731_pcm_prepare(struct snd_pcm_substream *substream) | |
477 | { | |
478 | struct snd_soc_pcm_runtime *rtd = substream->private_data; | |
479 | struct snd_soc_device *socdev = rtd->socdev; | |
480 | struct snd_soc_codec *codec = socdev->codec; | |
481 | u16 iface = 0, srate; | |
482 | int i = get_coeff(rtd->codec_dai->mclk, | |
483 | snd_soc_get_rate(rtd->codec_dai->dai_runtime.pcmrate)); | |
484 | ||
485 | /* set master/slave audio interface */ | |
486 | switch (rtd->codec_dai->dai_runtime.fmt & SND_SOC_DAIFMT_CLOCK_MASK) { | |
487 | case SND_SOC_DAIFMT_CBM_CFM: | |
488 | iface |= 0x0040; | |
489 | break; | |
490 | case SND_SOC_DAIFMT_CBS_CFS: | |
491 | break; | |
492 | } | |
493 | srate = (coeff_div[i].sr << 2) | | |
494 | (coeff_div[i].bosr << 1) | coeff_div[i].usb; | |
495 | wm8731_write(codec, WM8731_SRATE, srate); | |
496 | ||
497 | /* interface format */ | |
498 | switch (rtd->codec_dai->dai_runtime.fmt & SND_SOC_DAIFMT_FORMAT_MASK) { | |
499 | case SND_SOC_DAIFMT_I2S: | |
500 | iface |= 0x0002; | |
501 | break; | |
502 | case SND_SOC_DAIFMT_RIGHT_J: | |
503 | break; | |
504 | case SND_SOC_DAIFMT_LEFT_J: | |
505 | iface |= 0x0001; | |
506 | break; | |
507 | case SND_SOC_DAIFMT_DSP_A: | |
508 | iface |= 0x0003; | |
509 | break; | |
510 | case SND_SOC_DAIFMT_DSP_B: | |
511 | iface |= 0x0013; | |
512 | break; | |
513 | } | |
514 | ||
515 | /* bit size */ | |
516 | switch (rtd->codec_dai->dai_runtime.pcmfmt) { | |
517 | case SNDRV_PCM_FMTBIT_S16_LE: | |
518 | break; | |
519 | case SNDRV_PCM_FMTBIT_S20_3LE: | |
520 | iface |= 0x0004; | |
521 | break; | |
522 | case SNDRV_PCM_FMTBIT_S24_LE: | |
523 | iface |= 0x0008; | |
524 | break; | |
525 | case SNDRV_PCM_FMTBIT_S32_LE: | |
526 | iface |= 0x000c; | |
527 | break; | |
528 | } | |
529 | ||
530 | /* clock inversion */ | |
531 | switch (rtd->codec_dai->dai_runtime.fmt & SND_SOC_DAIFMT_INV_MASK) { | |
532 | case SND_SOC_DAIFMT_NB_NF: | |
533 | break; | |
534 | case SND_SOC_DAIFMT_IB_IF: | |
535 | iface |= 0x0090; | |
536 | break; | |
537 | case SND_SOC_DAIFMT_IB_NF: | |
538 | iface |= 0x0080; | |
539 | break; | |
540 | case SND_SOC_DAIFMT_NB_IF: | |
541 | iface |= 0x0010; | |
542 | break; | |
543 | } | |
544 | ||
545 | /* set iface */ | |
546 | wm8731_write(codec, WM8731_IFACE, iface); | |
547 | ||
548 | /* set active */ | |
549 | wm8731_write(codec, WM8731_ACTIVE, 0x0001); | |
550 | return 0; | |
551 | } | |
552 | ||
553 | static void wm8731_shutdown(struct snd_pcm_substream *substream) | |
554 | { | |
555 | struct snd_soc_pcm_runtime *rtd = substream->private_data; | |
556 | struct snd_soc_device *socdev = rtd->socdev; | |
557 | struct snd_soc_codec *codec = socdev->codec; | |
558 | ||
559 | /* deactivate */ | |
560 | if (!codec->active) { | |
561 | udelay(50); | |
562 | wm8731_write(codec, WM8731_ACTIVE, 0x0); | |
563 | } | |
564 | } | |
565 | ||
566 | static int wm8731_mute(struct snd_soc_codec *codec, | |
567 | struct snd_soc_codec_dai *dai, int mute) | |
568 | { | |
569 | u16 mute_reg = wm8731_read_reg_cache(codec, WM8731_APDIGI) & 0xfff7; | |
570 | if (mute) | |
571 | wm8731_write(codec, WM8731_APDIGI, mute_reg | 0x8); | |
572 | else | |
573 | wm8731_write(codec, WM8731_APDIGI, mute_reg); | |
574 | return 0; | |
575 | } | |
576 | ||
577 | static int wm8731_dapm_event(struct snd_soc_codec *codec, int event) | |
578 | { | |
579 | u16 reg = wm8731_read_reg_cache(codec, WM8731_PWR) & 0xff7f; | |
580 | ||
581 | switch (event) { | |
582 | case SNDRV_CTL_POWER_D0: /* full On */ | |
583 | /* vref/mid, osc on, dac unmute */ | |
584 | wm8731_write(codec, WM8731_PWR, reg); | |
585 | break; | |
586 | case SNDRV_CTL_POWER_D1: /* partial On */ | |
587 | case SNDRV_CTL_POWER_D2: /* partial On */ | |
588 | break; | |
589 | case SNDRV_CTL_POWER_D3hot: /* Off, with power */ | |
590 | /* everything off except vref/vmid, */ | |
591 | wm8731_write(codec, WM8731_PWR, reg | 0x0040); | |
592 | break; | |
593 | case SNDRV_CTL_POWER_D3cold: /* Off, without power */ | |
594 | /* everything off, dac mute, inactive */ | |
595 | wm8731_write(codec, WM8731_ACTIVE, 0x0); | |
596 | wm8731_write(codec, WM8731_PWR, 0xffff); | |
597 | break; | |
598 | } | |
599 | codec->dapm_state = event; | |
600 | return 0; | |
601 | } | |
602 | ||
603 | struct snd_soc_codec_dai wm8731_dai = { | |
604 | .name = "WM8731", | |
605 | .playback = { | |
606 | .stream_name = "Playback", | |
607 | .channels_min = 1, | |
608 | .channels_max = 2, | |
609 | }, | |
610 | .capture = { | |
611 | .stream_name = "Capture", | |
612 | .channels_min = 1, | |
613 | .channels_max = 2, | |
614 | }, | |
615 | .config_sysclk = wm8731_config_sysclk, | |
616 | .digital_mute = wm8731_mute, | |
617 | .ops = { | |
618 | .prepare = wm8731_pcm_prepare, | |
619 | .shutdown = wm8731_shutdown, | |
620 | }, | |
621 | .caps = { | |
622 | .num_modes = ARRAY_SIZE(wm8731_modes), | |
623 | .mode = wm8731_modes, | |
624 | }, | |
625 | }; | |
626 | EXPORT_SYMBOL_GPL(wm8731_dai); | |
627 | ||
628 | static int wm8731_suspend(struct platform_device *pdev, pm_message_t state) | |
629 | { | |
630 | struct snd_soc_device *socdev = platform_get_drvdata(pdev); | |
631 | struct snd_soc_codec *codec = socdev->codec; | |
632 | ||
633 | wm8731_write(codec, WM8731_ACTIVE, 0x0); | |
634 | wm8731_dapm_event(codec, SNDRV_CTL_POWER_D3cold); | |
635 | return 0; | |
636 | } | |
637 | ||
638 | static int wm8731_resume(struct platform_device *pdev) | |
639 | { | |
640 | struct snd_soc_device *socdev = platform_get_drvdata(pdev); | |
641 | struct snd_soc_codec *codec = socdev->codec; | |
642 | int i; | |
643 | u8 data[2]; | |
644 | u16 *cache = codec->reg_cache; | |
645 | ||
646 | /* Sync reg_cache with the hardware */ | |
647 | for (i = 0; i < ARRAY_SIZE(wm8731_reg); i++) { | |
648 | data[0] = (i << 1) | ((cache[i] >> 8) & 0x0001); | |
649 | data[1] = cache[i] & 0x00ff; | |
650 | codec->hw_write(codec->control_data, data, 2); | |
651 | } | |
652 | wm8731_dapm_event(codec, SNDRV_CTL_POWER_D3hot); | |
653 | wm8731_dapm_event(codec, codec->suspend_dapm_state); | |
654 | return 0; | |
655 | } | |
656 | ||
657 | /* | |
658 | * initialise the WM8731 driver | |
659 | * register the mixer and dsp interfaces with the kernel | |
660 | */ | |
661 | static int wm8731_init(struct snd_soc_device *socdev) | |
662 | { | |
663 | struct snd_soc_codec *codec = socdev->codec; | |
664 | int reg, ret = 0; | |
665 | ||
666 | codec->name = "WM8731"; | |
667 | codec->owner = THIS_MODULE; | |
668 | codec->read = wm8731_read_reg_cache; | |
669 | codec->write = wm8731_write; | |
670 | codec->dapm_event = wm8731_dapm_event; | |
671 | codec->dai = &wm8731_dai; | |
672 | codec->num_dai = 1; | |
673 | codec->reg_cache_size = ARRAY_SIZE(wm8731_reg); | |
674 | ||
675 | codec->reg_cache = | |
676 | kzalloc(sizeof(u16) * ARRAY_SIZE(wm8731_reg), GFP_KERNEL); | |
677 | if (codec->reg_cache == NULL) | |
678 | return -ENOMEM; | |
679 | memcpy(codec->reg_cache, | |
680 | wm8731_reg, sizeof(u16) * ARRAY_SIZE(wm8731_reg)); | |
681 | codec->reg_cache_size = sizeof(u16) * ARRAY_SIZE(wm8731_reg); | |
682 | ||
683 | wm8731_reset(codec); | |
684 | ||
685 | /* register pcms */ | |
686 | ret = snd_soc_new_pcms(socdev, SNDRV_DEFAULT_IDX1, SNDRV_DEFAULT_STR1); | |
687 | if (ret < 0) { | |
688 | kfree(codec->reg_cache); | |
689 | return ret; | |
690 | } | |
691 | ||
692 | /* power on device */ | |
693 | wm8731_dapm_event(codec, SNDRV_CTL_POWER_D3hot); | |
694 | ||
695 | /* set the update bits */ | |
696 | reg = wm8731_read_reg_cache(codec, WM8731_LOUT1V); | |
697 | wm8731_write(codec, WM8731_LOUT1V, reg | 0x0100); | |
698 | reg = wm8731_read_reg_cache(codec, WM8731_ROUT1V); | |
699 | wm8731_write(codec, WM8731_ROUT1V, reg | 0x0100); | |
700 | reg = wm8731_read_reg_cache(codec, WM8731_LINVOL); | |
701 | wm8731_write(codec, WM8731_LINVOL, reg | 0x0100); | |
702 | reg = wm8731_read_reg_cache(codec, WM8731_RINVOL); | |
703 | wm8731_write(codec, WM8731_RINVOL, reg | 0x0100); | |
704 | ||
705 | wm8731_add_controls(codec); | |
706 | wm8731_add_widgets(codec); | |
707 | ret = snd_soc_register_card(socdev); | |
708 | if (ret < 0) { | |
709 | snd_soc_free_pcms(socdev); | |
710 | snd_soc_dapm_free(socdev); | |
711 | } | |
712 | ||
713 | return ret; | |
714 | } | |
715 | ||
716 | static struct snd_soc_device *wm8731_socdev; | |
717 | ||
718 | #if defined (CONFIG_I2C) || defined (CONFIG_I2C_MODULE) | |
719 | ||
720 | /* | |
721 | * WM8731 2 wire address is determined by GPIO5 | |
722 | * state during powerup. | |
723 | * low = 0x1a | |
724 | * high = 0x1b | |
725 | */ | |
726 | static unsigned short normal_i2c[] = { 0, I2C_CLIENT_END }; | |
727 | ||
728 | /* Magic definition of all other variables and things */ | |
729 | I2C_CLIENT_INSMOD; | |
730 | ||
731 | static struct i2c_driver wm8731_i2c_driver; | |
732 | static struct i2c_client client_template; | |
733 | ||
734 | /* If the i2c layer weren't so broken, we could pass this kind of data | |
735 | around */ | |
736 | ||
737 | static int wm8731_codec_probe(struct i2c_adapter *adap, int addr, int kind) | |
738 | { | |
739 | struct snd_soc_device *socdev = wm8731_socdev; | |
740 | struct wm8731_setup_data *setup = socdev->codec_data; | |
741 | struct snd_soc_codec *codec = socdev->codec; | |
742 | struct i2c_client *i2c; | |
743 | int ret; | |
744 | ||
745 | if (addr != setup->i2c_address) | |
746 | return -ENODEV; | |
747 | ||
748 | client_template.adapter = adap; | |
749 | client_template.addr = addr; | |
750 | ||
751 | i2c = kzalloc(sizeof(struct i2c_client), GFP_KERNEL); | |
752 | if (i2c == NULL) { | |
753 | kfree(codec); | |
754 | return -ENOMEM; | |
755 | } | |
756 | memcpy(i2c, &client_template, sizeof(struct i2c_client)); | |
757 | i2c_set_clientdata(i2c, codec); | |
758 | codec->control_data = i2c; | |
759 | ||
760 | ret = i2c_attach_client(i2c); | |
761 | if (ret < 0) { | |
762 | err("failed to attach codec at addr %x\n", addr); | |
763 | goto err; | |
764 | } | |
765 | ||
766 | ret = wm8731_init(socdev); | |
767 | if (ret < 0) { | |
768 | err("failed to initialise WM8731\n"); | |
769 | goto err; | |
770 | } | |
771 | return ret; | |
772 | ||
773 | err: | |
774 | kfree(codec); | |
775 | kfree(i2c); | |
776 | return ret; | |
777 | } | |
778 | ||
779 | static int wm8731_i2c_detach(struct i2c_client *client) | |
780 | { | |
781 | struct snd_soc_codec* codec = i2c_get_clientdata(client); | |
782 | i2c_detach_client(client); | |
783 | kfree(codec->reg_cache); | |
784 | kfree(client); | |
785 | return 0; | |
786 | } | |
787 | ||
788 | static int wm8731_i2c_attach(struct i2c_adapter *adap) | |
789 | { | |
790 | return i2c_probe(adap, &addr_data, wm8731_codec_probe); | |
791 | } | |
792 | ||
793 | /* corgi i2c codec control layer */ | |
794 | static struct i2c_driver wm8731_i2c_driver = { | |
795 | .driver = { | |
796 | .name = "WM8731 I2C Codec", | |
797 | .owner = THIS_MODULE, | |
798 | }, | |
799 | .id = I2C_DRIVERID_WM8731, | |
800 | .attach_adapter = wm8731_i2c_attach, | |
801 | .detach_client = wm8731_i2c_detach, | |
802 | .command = NULL, | |
803 | }; | |
804 | ||
805 | static struct i2c_client client_template = { | |
806 | .name = "WM8731", | |
807 | .driver = &wm8731_i2c_driver, | |
808 | }; | |
809 | #endif | |
810 | ||
811 | static int wm8731_probe(struct platform_device *pdev) | |
812 | { | |
813 | struct snd_soc_device *socdev = platform_get_drvdata(pdev); | |
814 | struct wm8731_setup_data *setup; | |
815 | struct snd_soc_codec *codec; | |
816 | int ret = 0; | |
817 | ||
818 | info("WM8731 Audio Codec %s", WM8731_VERSION); | |
819 | ||
820 | setup = socdev->codec_data; | |
821 | codec = kzalloc(sizeof(struct snd_soc_codec), GFP_KERNEL); | |
822 | if (codec == NULL) | |
823 | return -ENOMEM; | |
824 | ||
825 | socdev->codec = codec; | |
826 | mutex_init(&codec->mutex); | |
827 | INIT_LIST_HEAD(&codec->dapm_widgets); | |
828 | INIT_LIST_HEAD(&codec->dapm_paths); | |
829 | ||
830 | wm8731_socdev = socdev; | |
831 | #if defined (CONFIG_I2C) || defined (CONFIG_I2C_MODULE) | |
832 | if (setup->i2c_address) { | |
833 | normal_i2c[0] = setup->i2c_address; | |
834 | codec->hw_write = (hw_write_t)i2c_master_send; | |
835 | ret = i2c_add_driver(&wm8731_i2c_driver); | |
836 | if (ret != 0) | |
837 | printk(KERN_ERR "can't add i2c driver"); | |
838 | } | |
839 | #else | |
840 | /* Add other interfaces here */ | |
841 | #endif | |
842 | return ret; | |
843 | } | |
844 | ||
845 | /* power down chip */ | |
846 | static int wm8731_remove(struct platform_device *pdev) | |
847 | { | |
848 | struct snd_soc_device *socdev = platform_get_drvdata(pdev); | |
849 | struct snd_soc_codec *codec = socdev->codec; | |
850 | ||
851 | if (codec->control_data) | |
852 | wm8731_dapm_event(codec, SNDRV_CTL_POWER_D3cold); | |
853 | ||
854 | snd_soc_free_pcms(socdev); | |
855 | snd_soc_dapm_free(socdev); | |
856 | #if defined (CONFIG_I2C) || defined (CONFIG_I2C_MODULE) | |
857 | i2c_del_driver(&wm8731_i2c_driver); | |
858 | #endif | |
859 | kfree(codec); | |
860 | ||
861 | return 0; | |
862 | } | |
863 | ||
864 | struct snd_soc_codec_device soc_codec_dev_wm8731 = { | |
865 | .probe = wm8731_probe, | |
866 | .remove = wm8731_remove, | |
867 | .suspend = wm8731_suspend, | |
868 | .resume = wm8731_resume, | |
869 | }; | |
870 | ||
871 | EXPORT_SYMBOL_GPL(soc_codec_dev_wm8731); | |
872 | ||
873 | MODULE_DESCRIPTION("ASoC WM8731 driver"); | |
874 | MODULE_AUTHOR("Richard Purdie"); | |
875 | MODULE_LICENSE("GPL"); |