ASoC: wm8731: initialize the hardware when loading the codec driver
[deliverable/linux.git] / sound / soc / codecs / wm8731.c
CommitLineData
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1/*
2 * wm8731.c -- WM8731 ALSA SoC Audio driver
3 *
4 * Copyright 2005 Openedhand Ltd.
656baaeb 5 * Copyright 2006-12 Wolfson Microelectronics, plc
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6 *
7 * Author: Richard Purdie <richard@openedhand.com>
8 *
9 * Based on wm8753.c by Liam Girdwood
10 *
11 * This program is free software; you can redistribute it and/or modify
12 * it under the terms of the GNU General Public License version 2 as
13 * published by the Free Software Foundation.
14 */
15
16#include <linux/module.h>
17#include <linux/moduleparam.h>
18#include <linux/init.h>
19#include <linux/delay.h>
20#include <linux/pm.h>
21#include <linux/i2c.h>
5a0e3ad6 22#include <linux/slab.h>
05d448e2 23#include <linux/regmap.h>
7dea7c01 24#include <linux/regulator/consumer.h>
d2a40355 25#include <linux/spi/spi.h>
a7f96e4d 26#include <linux/of_device.h>
a51ff30f 27#include <linux/mutex.h>
99d42234 28#include <linux/clk.h>
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29#include <sound/core.h>
30#include <sound/pcm.h>
31#include <sound/pcm_params.h>
32#include <sound/soc.h>
40e0aa64 33#include <sound/initval.h>
d00efa64 34#include <sound/tlv.h>
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35
36#include "wm8731.h"
37
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38#define WM8731_NUM_SUPPLIES 4
39static const char *wm8731_supply_names[WM8731_NUM_SUPPLIES] = {
40 "AVDD",
41 "HPVDD",
42 "DCVDD",
43 "DBVDD",
44};
45
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46/* codec private data */
47struct wm8731_priv {
05d448e2 48 struct regmap *regmap;
99d42234 49 struct clk *mclk;
7dea7c01 50 struct regulator_bulk_data supplies[WM8731_NUM_SUPPLIES];
0890c2b7 51 const struct snd_pcm_hw_constraint_list *constraints;
b36d61d4 52 unsigned int sysclk;
9745e824 53 int sysclk_type;
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54 int playback_fs;
55 bool deemph;
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56
57 struct mutex lock;
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58};
59
a8035c8f 60
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61/*
62 * wm8731 register cache
40e0aa64 63 */
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64static const struct reg_default wm8731_reg_defaults[] = {
65 { 0, 0x0097 },
66 { 1, 0x0097 },
67 { 2, 0x0079 },
68 { 3, 0x0079 },
69 { 4, 0x000a },
70 { 5, 0x0008 },
71 { 6, 0x009f },
72 { 7, 0x000a },
73 { 8, 0x0000 },
74 { 9, 0x0000 },
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75};
76
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77static bool wm8731_volatile(struct device *dev, unsigned int reg)
78{
79 return reg == WM8731_RESET;
80}
81
82static bool wm8731_writeable(struct device *dev, unsigned int reg)
83{
84 return reg <= WM8731_RESET;
85}
86
6702dfcc 87#define wm8731_reset(m) regmap_write(m, WM8731_RESET, 0)
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88
89static const char *wm8731_input_select[] = {"Line In", "Mic"};
59f72970 90
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91static SOC_ENUM_SINGLE_DECL(wm8731_insel_enum,
92 WM8731_APANA, 2, wm8731_input_select);
59f72970 93
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94static int wm8731_deemph[] = { 0, 32000, 44100, 48000 };
95
96static int wm8731_set_deemph(struct snd_soc_codec *codec)
97{
98 struct wm8731_priv *wm8731 = snd_soc_codec_get_drvdata(codec);
99 int val, i, best;
100
101 /* If we're using deemphasis select the nearest available sample
102 * rate.
103 */
104 if (wm8731->deemph) {
105 best = 1;
106 for (i = 2; i < ARRAY_SIZE(wm8731_deemph); i++) {
107 if (abs(wm8731_deemph[i] - wm8731->playback_fs) <
108 abs(wm8731_deemph[best] - wm8731->playback_fs))
109 best = i;
110 }
111
112 val = best << 1;
113 } else {
114 best = 0;
115 val = 0;
116 }
117
118 dev_dbg(codec->dev, "Set deemphasis %d (%dHz)\n",
119 best, wm8731_deemph[best]);
120
121 return snd_soc_update_bits(codec, WM8731_APDIGI, 0x6, val);
122}
123
124static int wm8731_get_deemph(struct snd_kcontrol *kcontrol,
125 struct snd_ctl_elem_value *ucontrol)
126{
ea53bf77 127 struct snd_soc_codec *codec = snd_soc_kcontrol_codec(kcontrol);
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128 struct wm8731_priv *wm8731 = snd_soc_codec_get_drvdata(codec);
129
bd14016f 130 ucontrol->value.integer.value[0] = wm8731->deemph;
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131
132 return 0;
133}
134
135static int wm8731_put_deemph(struct snd_kcontrol *kcontrol,
136 struct snd_ctl_elem_value *ucontrol)
137{
ea53bf77 138 struct snd_soc_codec *codec = snd_soc_kcontrol_codec(kcontrol);
dd31b310 139 struct wm8731_priv *wm8731 = snd_soc_codec_get_drvdata(codec);
bd14016f 140 int deemph = ucontrol->value.integer.value[0];
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141 int ret = 0;
142
143 if (deemph > 1)
144 return -EINVAL;
145
a51ff30f 146 mutex_lock(&wm8731->lock);
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147 if (wm8731->deemph != deemph) {
148 wm8731->deemph = deemph;
59f72970 149
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150 wm8731_set_deemph(codec);
151
152 ret = 1;
153 }
a51ff30f 154 mutex_unlock(&wm8731->lock);
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155
156 return ret;
157}
40e0aa64 158
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159static const DECLARE_TLV_DB_SCALE(in_tlv, -3450, 150, 0);
160static const DECLARE_TLV_DB_SCALE(sidetone_tlv, -1500, 300, 0);
161static const DECLARE_TLV_DB_SCALE(out_tlv, -12100, 100, 1);
d921184e 162static const DECLARE_TLV_DB_SCALE(mic_tlv, 0, 2000, 0);
d00efa64 163
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164static const struct snd_kcontrol_new wm8731_snd_controls[] = {
165
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166SOC_DOUBLE_R_TLV("Master Playback Volume", WM8731_LOUT1V, WM8731_ROUT1V,
167 0, 127, 0, out_tlv),
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168SOC_DOUBLE_R("Master Playback ZC Switch", WM8731_LOUT1V, WM8731_ROUT1V,
169 7, 1, 0),
40e0aa64 170
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171SOC_DOUBLE_R_TLV("Capture Volume", WM8731_LINVOL, WM8731_RINVOL, 0, 31, 0,
172 in_tlv),
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173SOC_DOUBLE_R("Line Capture Switch", WM8731_LINVOL, WM8731_RINVOL, 7, 1, 1),
174
d921184e 175SOC_SINGLE_TLV("Mic Boost Volume", WM8731_APANA, 0, 1, 0, mic_tlv),
ef38ed88 176SOC_SINGLE("Mic Capture Switch", WM8731_APANA, 1, 1, 1),
40e0aa64 177
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178SOC_SINGLE_TLV("Sidetone Playback Volume", WM8731_APANA, 6, 3, 1,
179 sidetone_tlv),
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180
181SOC_SINGLE("ADC High Pass Filter Switch", WM8731_APDIGI, 0, 1, 1),
182SOC_SINGLE("Store DC Offset Switch", WM8731_APDIGI, 4, 1, 0),
183
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184SOC_SINGLE_BOOL_EXT("Playback Deemphasis Switch", 0,
185 wm8731_get_deemph, wm8731_put_deemph),
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186};
187
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188/* Output Mixer */
189static const struct snd_kcontrol_new wm8731_output_mixer_controls[] = {
190SOC_DAPM_SINGLE("Line Bypass Switch", WM8731_APANA, 3, 1, 0),
191SOC_DAPM_SINGLE("Mic Sidetone Switch", WM8731_APANA, 5, 1, 0),
192SOC_DAPM_SINGLE("HiFi Playback Switch", WM8731_APANA, 4, 1, 0),
193};
194
195/* Input mux */
196static const struct snd_kcontrol_new wm8731_input_mux_controls =
59f72970 197SOC_DAPM_ENUM("Input Select", wm8731_insel_enum);
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198
199static const struct snd_soc_dapm_widget wm8731_dapm_widgets[] = {
8a27bd9a 200SND_SOC_DAPM_SUPPLY("ACTIVE",WM8731_ACTIVE, 0, 0, NULL, 0),
9745e824 201SND_SOC_DAPM_SUPPLY("OSC", WM8731_PWR, 5, 1, NULL, 0),
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202SND_SOC_DAPM_MIXER("Output Mixer", WM8731_PWR, 4, 1,
203 &wm8731_output_mixer_controls[0],
204 ARRAY_SIZE(wm8731_output_mixer_controls)),
205SND_SOC_DAPM_DAC("DAC", "HiFi Playback", WM8731_PWR, 3, 1),
206SND_SOC_DAPM_OUTPUT("LOUT"),
207SND_SOC_DAPM_OUTPUT("LHPOUT"),
208SND_SOC_DAPM_OUTPUT("ROUT"),
209SND_SOC_DAPM_OUTPUT("RHPOUT"),
210SND_SOC_DAPM_ADC("ADC", "HiFi Capture", WM8731_PWR, 2, 1),
211SND_SOC_DAPM_MUX("Input Mux", SND_SOC_NOPM, 0, 0, &wm8731_input_mux_controls),
212SND_SOC_DAPM_PGA("Line Input", WM8731_PWR, 0, 1, NULL, 0),
213SND_SOC_DAPM_MICBIAS("Mic Bias", WM8731_PWR, 1, 1),
214SND_SOC_DAPM_INPUT("MICIN"),
215SND_SOC_DAPM_INPUT("RLINEIN"),
216SND_SOC_DAPM_INPUT("LLINEIN"),
217};
218
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219static int wm8731_check_osc(struct snd_soc_dapm_widget *source,
220 struct snd_soc_dapm_widget *sink)
221{
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222 struct snd_soc_codec *codec = snd_soc_dapm_to_codec(source->dapm);
223 struct wm8731_priv *wm8731 = snd_soc_codec_get_drvdata(codec);
9745e824 224
5a195b44 225 return wm8731->sysclk_type == WM8731_SYSCLK_XTAL;
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226}
227
5e251aec 228static const struct snd_soc_dapm_route wm8731_intercon[] = {
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229 {"DAC", NULL, "OSC", wm8731_check_osc},
230 {"ADC", NULL, "OSC", wm8731_check_osc},
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231 {"DAC", NULL, "ACTIVE"},
232 {"ADC", NULL, "ACTIVE"},
9745e824 233
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234 /* output mixer */
235 {"Output Mixer", "Line Bypass Switch", "Line Input"},
236 {"Output Mixer", "HiFi Playback Switch", "DAC"},
237 {"Output Mixer", "Mic Sidetone Switch", "Mic Bias"},
238
239 /* outputs */
240 {"RHPOUT", NULL, "Output Mixer"},
241 {"ROUT", NULL, "Output Mixer"},
242 {"LHPOUT", NULL, "Output Mixer"},
243 {"LOUT", NULL, "Output Mixer"},
244
245 /* input mux */
246 {"Input Mux", "Line In", "Line Input"},
247 {"Input Mux", "Mic", "Mic Bias"},
248 {"ADC", NULL, "Input Mux"},
249
250 /* inputs */
251 {"Line Input", NULL, "LLINEIN"},
252 {"Line Input", NULL, "RLINEIN"},
253 {"Mic Bias", NULL, "MICIN"},
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254};
255
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256struct _coeff_div {
257 u32 mclk;
258 u32 rate;
259 u16 fs;
260 u8 sr:4;
261 u8 bosr:1;
262 u8 usb:1;
263};
264
265/* codec mclk clock divider coefficients */
266static const struct _coeff_div coeff_div[] = {
267 /* 48k */
268 {12288000, 48000, 256, 0x0, 0x0, 0x0},
269 {18432000, 48000, 384, 0x0, 0x1, 0x0},
270 {12000000, 48000, 250, 0x0, 0x0, 0x1},
271
272 /* 32k */
273 {12288000, 32000, 384, 0x6, 0x0, 0x0},
274 {18432000, 32000, 576, 0x6, 0x1, 0x0},
298a2c75 275 {12000000, 32000, 375, 0x6, 0x0, 0x1},
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276
277 /* 8k */
278 {12288000, 8000, 1536, 0x3, 0x0, 0x0},
279 {18432000, 8000, 2304, 0x3, 0x1, 0x0},
280 {11289600, 8000, 1408, 0xb, 0x0, 0x0},
281 {16934400, 8000, 2112, 0xb, 0x1, 0x0},
282 {12000000, 8000, 1500, 0x3, 0x0, 0x1},
283
284 /* 96k */
285 {12288000, 96000, 128, 0x7, 0x0, 0x0},
286 {18432000, 96000, 192, 0x7, 0x1, 0x0},
287 {12000000, 96000, 125, 0x7, 0x0, 0x1},
288
289 /* 44.1k */
290 {11289600, 44100, 256, 0x8, 0x0, 0x0},
291 {16934400, 44100, 384, 0x8, 0x1, 0x0},
292 {12000000, 44100, 272, 0x8, 0x1, 0x1},
293
294 /* 88.2k */
295 {11289600, 88200, 128, 0xf, 0x0, 0x0},
296 {16934400, 88200, 192, 0xf, 0x1, 0x0},
297 {12000000, 88200, 136, 0xf, 0x1, 0x1},
298};
299
0890c2b7
RG
300/* rates constraints */
301static const unsigned int wm8731_rates_12000000[] = {
302 8000, 32000, 44100, 48000, 96000, 88200,
303};
304
305static const unsigned int wm8731_rates_12288000_18432000[] = {
306 8000, 32000, 48000, 96000,
307};
308
309static const unsigned int wm8731_rates_11289600_16934400[] = {
310 8000, 44100, 88200,
311};
312
313static const struct snd_pcm_hw_constraint_list wm8731_constraints_12000000 = {
314 .list = wm8731_rates_12000000,
315 .count = ARRAY_SIZE(wm8731_rates_12000000),
316};
317
318static const
319struct snd_pcm_hw_constraint_list wm8731_constraints_12288000_18432000 = {
320 .list = wm8731_rates_12288000_18432000,
321 .count = ARRAY_SIZE(wm8731_rates_12288000_18432000),
322};
323
324static const
325struct snd_pcm_hw_constraint_list wm8731_constraints_11289600_16934400 = {
326 .list = wm8731_rates_11289600_16934400,
327 .count = ARRAY_SIZE(wm8731_rates_11289600_16934400),
328};
329
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330static inline int get_coeff(int mclk, int rate)
331{
332 int i;
333
334 for (i = 0; i < ARRAY_SIZE(coeff_div); i++) {
335 if (coeff_div[i].rate == rate && coeff_div[i].mclk == mclk)
336 return i;
337 }
338 return 0;
339}
340
b36d61d4 341static int wm8731_hw_params(struct snd_pcm_substream *substream,
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342 struct snd_pcm_hw_params *params,
343 struct snd_soc_dai *dai)
40e0aa64 344{
f0fba2ad 345 struct snd_soc_codec *codec = dai->codec;
b2c812e2 346 struct wm8731_priv *wm8731 = snd_soc_codec_get_drvdata(codec);
17a52fd6 347 u16 iface = snd_soc_read(codec, WM8731_IFACE) & 0xfff3;
b36d61d4
FM
348 int i = get_coeff(wm8731->sysclk, params_rate(params));
349 u16 srate = (coeff_div[i].sr << 2) |
350 (coeff_div[i].bosr << 1) | coeff_div[i].usb;
40e0aa64 351
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352 wm8731->playback_fs = params_rate(params);
353
17a52fd6 354 snd_soc_write(codec, WM8731_SRATE, srate);
b36d61d4
FM
355
356 /* bit size */
dfb6778e
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357 switch (params_width(params)) {
358 case 16:
b36d61d4 359 break;
dfb6778e 360 case 20:
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FM
361 iface |= 0x0004;
362 break;
dfb6778e 363 case 24:
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FM
364 iface |= 0x0008;
365 break;
366 }
40e0aa64 367
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368 wm8731_set_deemph(codec);
369
17a52fd6 370 snd_soc_write(codec, WM8731_IFACE, iface);
b36d61d4 371 return 0;
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372}
373
e550e17f 374static int wm8731_mute(struct snd_soc_dai *dai, int mute)
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FM
375{
376 struct snd_soc_codec *codec = dai->codec;
17a52fd6 377 u16 mute_reg = snd_soc_read(codec, WM8731_APDIGI) & 0xfff7;
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FM
378
379 if (mute)
17a52fd6 380 snd_soc_write(codec, WM8731_APDIGI, mute_reg | 0x8);
b36d61d4 381 else
17a52fd6 382 snd_soc_write(codec, WM8731_APDIGI, mute_reg);
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FM
383 return 0;
384}
385
e550e17f 386static int wm8731_set_dai_sysclk(struct snd_soc_dai *codec_dai,
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FM
387 int clk_id, unsigned int freq, int dir)
388{
389 struct snd_soc_codec *codec = codec_dai->codec;
fc31fda6 390 struct snd_soc_dapm_context *dapm = snd_soc_codec_get_dapm(codec);
b2c812e2 391 struct wm8731_priv *wm8731 = snd_soc_codec_get_drvdata(codec);
b36d61d4 392
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393 switch (clk_id) {
394 case WM8731_SYSCLK_XTAL:
395 case WM8731_SYSCLK_MCLK:
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396 if (wm8731->mclk && clk_set_rate(wm8731->mclk, freq))
397 return -EINVAL;
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398 wm8731->sysclk_type = clk_id;
399 break;
400 default:
401 return -EINVAL;
402 }
403
b36d61d4 404 switch (freq) {
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405 case 0:
406 wm8731->constraints = NULL;
407 break;
b36d61d4 408 case 12000000:
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409 wm8731->constraints = &wm8731_constraints_12000000;
410 break;
b36d61d4 411 case 12288000:
b36d61d4 412 case 18432000:
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413 wm8731->constraints = &wm8731_constraints_12288000_18432000;
414 break;
415 case 16934400:
416 case 11289600:
417 wm8731->constraints = &wm8731_constraints_11289600_16934400;
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418 break;
419 default:
420 return -EINVAL;
b36d61d4 421 }
9745e824 422
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423 wm8731->sysclk = freq;
424
fc31fda6 425 snd_soc_dapm_sync(dapm);
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426
427 return 0;
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FM
428}
429
430
e550e17f 431static int wm8731_set_dai_fmt(struct snd_soc_dai *codec_dai,
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432 unsigned int fmt)
433{
434 struct snd_soc_codec *codec = codec_dai->codec;
435 u16 iface = 0;
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436
437 /* set master/slave audio interface */
b36d61d4 438 switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) {
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439 case SND_SOC_DAIFMT_CBM_CFM:
440 iface |= 0x0040;
441 break;
442 case SND_SOC_DAIFMT_CBS_CFS:
443 break;
b36d61d4
FM
444 default:
445 return -EINVAL;
40e0aa64 446 }
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447
448 /* interface format */
b36d61d4 449 switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
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450 case SND_SOC_DAIFMT_I2S:
451 iface |= 0x0002;
452 break;
453 case SND_SOC_DAIFMT_RIGHT_J:
454 break;
455 case SND_SOC_DAIFMT_LEFT_J:
456 iface |= 0x0001;
457 break;
458 case SND_SOC_DAIFMT_DSP_A:
b4af6ef9 459 iface |= 0x0013;
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460 break;
461 case SND_SOC_DAIFMT_DSP_B:
b4af6ef9 462 iface |= 0x0003;
40e0aa64 463 break;
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FM
464 default:
465 return -EINVAL;
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RP
466 }
467
468 /* clock inversion */
b36d61d4 469 switch (fmt & SND_SOC_DAIFMT_INV_MASK) {
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470 case SND_SOC_DAIFMT_NB_NF:
471 break;
472 case SND_SOC_DAIFMT_IB_IF:
473 iface |= 0x0090;
474 break;
475 case SND_SOC_DAIFMT_IB_NF:
476 iface |= 0x0080;
477 break;
478 case SND_SOC_DAIFMT_NB_IF:
479 iface |= 0x0010;
480 break;
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FM
481 default:
482 return -EINVAL;
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RP
483 }
484
485 /* set iface */
17a52fd6 486 snd_soc_write(codec, WM8731_IFACE, iface);
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487 return 0;
488}
489
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490static int wm8731_set_bias_level(struct snd_soc_codec *codec,
491 enum snd_soc_bias_level level)
40e0aa64 492{
06ae9988 493 struct wm8731_priv *wm8731 = snd_soc_codec_get_drvdata(codec);
9bf311fe 494 int ret;
22d22ee5 495 u16 reg;
40e0aa64 496
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497 switch (level) {
498 case SND_SOC_BIAS_ON:
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499 if (wm8731->mclk)
500 clk_prepare_enable(wm8731->mclk);
40e0aa64 501 break;
0be9898a 502 case SND_SOC_BIAS_PREPARE:
40e0aa64 503 break;
0be9898a 504 case SND_SOC_BIAS_STANDBY:
fc31fda6 505 if (snd_soc_codec_get_bias_level(codec) == SND_SOC_BIAS_OFF) {
06ae9988
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506 ret = regulator_bulk_enable(ARRAY_SIZE(wm8731->supplies),
507 wm8731->supplies);
508 if (ret != 0)
509 return ret;
510
05d448e2 511 regcache_sync(wm8731->regmap);
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512 }
513
22d22ee5 514 /* Clear PWROFF, gate CLKOUT, everything else as-is */
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515 reg = snd_soc_read(codec, WM8731_PWR) & 0xff7f;
516 snd_soc_write(codec, WM8731_PWR, reg | 0x0040);
40e0aa64 517 break;
0be9898a 518 case SND_SOC_BIAS_OFF:
99d42234
SW
519 if (wm8731->mclk)
520 clk_disable_unprepare(wm8731->mclk);
17a52fd6 521 snd_soc_write(codec, WM8731_PWR, 0xffff);
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522 regulator_bulk_disable(ARRAY_SIZE(wm8731->supplies),
523 wm8731->supplies);
05d448e2 524 regcache_mark_dirty(wm8731->regmap);
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525 break;
526 }
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RP
527 return 0;
528}
529
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530static int wm8731_startup(struct snd_pcm_substream *substream,
531 struct snd_soc_dai *dai)
532{
533 struct wm8731_priv *wm8731 = snd_soc_codec_get_drvdata(dai->codec);
534
535 if (wm8731->constraints)
536 snd_pcm_hw_constraint_list(substream->runtime, 0,
537 SNDRV_PCM_HW_PARAM_RATE,
538 wm8731->constraints);
539
540 return 0;
541}
542
e135443e 543#define WM8731_RATES SNDRV_PCM_RATE_8000_96000
b36d61d4
FM
544
545#define WM8731_FORMATS (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S20_3LE |\
546 SNDRV_PCM_FMTBIT_S24_LE)
547
85e7652d 548static const struct snd_soc_dai_ops wm8731_dai_ops = {
0890c2b7 549 .startup = wm8731_startup,
6335d055 550 .hw_params = wm8731_hw_params,
6335d055
EM
551 .digital_mute = wm8731_mute,
552 .set_sysclk = wm8731_set_dai_sysclk,
553 .set_fmt = wm8731_set_dai_fmt,
554};
555
f0fba2ad
LG
556static struct snd_soc_dai_driver wm8731_dai = {
557 .name = "wm8731-hifi",
40e0aa64
RP
558 .playback = {
559 .stream_name = "Playback",
560 .channels_min = 1,
561 .channels_max = 2,
b36d61d4
FM
562 .rates = WM8731_RATES,
563 .formats = WM8731_FORMATS,},
40e0aa64
RP
564 .capture = {
565 .stream_name = "Capture",
566 .channels_min = 1,
567 .channels_max = 2,
b36d61d4
FM
568 .rates = WM8731_RATES,
569 .formats = WM8731_FORMATS,},
6335d055 570 .ops = &wm8731_dai_ops,
4934482d 571 .symmetric_rates = 1,
40e0aa64 572};
40e0aa64 573
6702dfcc
SK
574static int wm8731_request_supplies(struct device *dev,
575 struct wm8731_priv *wm8731)
40e0aa64 576{
f0fba2ad 577 int ret = 0, i;
5998102b 578
7dea7c01
MB
579 for (i = 0; i < ARRAY_SIZE(wm8731->supplies); i++)
580 wm8731->supplies[i].supply = wm8731_supply_names[i];
581
6702dfcc 582 ret = devm_regulator_bulk_get(dev, ARRAY_SIZE(wm8731->supplies),
7dea7c01
MB
583 wm8731->supplies);
584 if (ret != 0) {
6702dfcc 585 dev_err(dev, "Failed to request supplies: %d\n", ret);
f0fba2ad 586 return ret;
7dea7c01
MB
587 }
588
589 ret = regulator_bulk_enable(ARRAY_SIZE(wm8731->supplies),
590 wm8731->supplies);
591 if (ret != 0) {
6702dfcc 592 dev_err(dev, "Failed to enable supplies: %d\n", ret);
3598aad5 593 return ret;
7dea7c01
MB
594 }
595
6702dfcc
SK
596 return 0;
597}
598
599static int wm8731_hw_init(struct device *dev, struct wm8731_priv *wm8731)
600{
601 int ret = 0;
602
603 ret = wm8731_reset(wm8731->regmap);
519cf2df 604 if (ret < 0) {
6702dfcc 605 dev_err(dev, "Failed to issue reset: %d\n", ret);
7dea7c01 606 goto err_regulator_enable;
519cf2df
MB
607 }
608
6702dfcc
SK
609 /* Clear POWEROFF, keep everything else disabled */
610 regmap_write(wm8731->regmap, WM8731_PWR, 0x7f);
5998102b
MB
611
612 /* Latch the update bits */
6702dfcc
SK
613 regmap_update_bits(wm8731->regmap, WM8731_LOUT1V, 0x100, 0);
614 regmap_update_bits(wm8731->regmap, WM8731_ROUT1V, 0x100, 0);
615 regmap_update_bits(wm8731->regmap, WM8731_LINVOL, 0x100, 0);
616 regmap_update_bits(wm8731->regmap, WM8731_RINVOL, 0x100, 0);
5998102b 617
ce3bdaa8 618 /* Disable bypass path by default */
6702dfcc 619 regmap_update_bits(wm8731->regmap, WM8731_APANA, 0x8, 0);
ce3bdaa8 620
6702dfcc 621 regcache_mark_dirty(wm8731->regmap);
fe5422fc 622
7dea7c01 623err_regulator_enable:
6702dfcc 624 /* Regulators will be enabled by bias management */
7dea7c01 625 regulator_bulk_disable(ARRAY_SIZE(wm8731->supplies), wm8731->supplies);
f0fba2ad 626
fe5422fc 627 return ret;
a8035c8f
MB
628}
629
f0fba2ad 630static struct snd_soc_codec_driver soc_codec_dev_wm8731 = {
f0fba2ad 631 .set_bias_level = wm8731_set_bias_level,
2081b2cf
LPC
632 .suspend_bias_off = true,
633
5e251aec
MB
634 .dapm_widgets = wm8731_dapm_widgets,
635 .num_dapm_widgets = ARRAY_SIZE(wm8731_dapm_widgets),
636 .dapm_routes = wm8731_intercon,
637 .num_dapm_routes = ARRAY_SIZE(wm8731_intercon),
cb555318
MB
638 .controls = wm8731_snd_controls,
639 .num_controls = ARRAY_SIZE(wm8731_snd_controls),
f0fba2ad
LG
640};
641
a7f96e4d
MB
642static const struct of_device_id wm8731_of_match[] = {
643 { .compatible = "wlf,wm8731", },
644 { }
645};
646
647MODULE_DEVICE_TABLE(of, wm8731_of_match);
648
05d448e2
MB
649static const struct regmap_config wm8731_regmap = {
650 .reg_bits = 7,
651 .val_bits = 9,
652
653 .max_register = WM8731_RESET,
654 .volatile_reg = wm8731_volatile,
655 .writeable_reg = wm8731_writeable,
656
657 .cache_type = REGCACHE_RBTREE,
658 .reg_defaults = wm8731_reg_defaults,
659 .num_reg_defaults = ARRAY_SIZE(wm8731_reg_defaults),
660};
661
5998102b 662#if defined(CONFIG_SPI_MASTER)
7a79e94e 663static int wm8731_spi_probe(struct spi_device *spi)
5998102b 664{
5998102b 665 struct wm8731_priv *wm8731;
f0fba2ad 666 int ret;
5998102b 667
cea82d8a 668 wm8731 = devm_kzalloc(&spi->dev, sizeof(*wm8731), GFP_KERNEL);
5998102b
MB
669 if (wm8731 == NULL)
670 return -ENOMEM;
671
99d42234
SW
672 wm8731->mclk = devm_clk_get(&spi->dev, "mclk");
673 if (IS_ERR(wm8731->mclk)) {
674 ret = PTR_ERR(wm8731->mclk);
675 if (ret == -ENOENT) {
676 wm8731->mclk = NULL;
677 dev_warn(&spi->dev, "Assuming static MCLK\n");
678 } else {
679 dev_err(&spi->dev, "Failed to get MCLK: %d\n",
680 ret);
681 return ret;
682 }
683 }
684
a51ff30f
LPC
685 mutex_init(&wm8731->lock);
686
6702dfcc
SK
687 spi_set_drvdata(spi, wm8731);
688
689 ret = wm8731_request_supplies(&spi->dev, wm8731);
690 if (ret != 0)
691 return ret;
692
f1992dde 693 wm8731->regmap = devm_regmap_init_spi(spi, &wm8731_regmap);
05d448e2
MB
694 if (IS_ERR(wm8731->regmap)) {
695 ret = PTR_ERR(wm8731->regmap);
696 dev_err(&spi->dev, "Failed to allocate register map: %d\n",
697 ret);
f1992dde 698 return ret;
05d448e2
MB
699 }
700
6702dfcc
SK
701 ret = wm8731_hw_init(&spi->dev, wm8731);
702 if (ret != 0)
703 return ret;
93b760b7 704
f0fba2ad
LG
705 ret = snd_soc_register_codec(&spi->dev,
706 &soc_codec_dev_wm8731, &wm8731_dai, 1);
05d448e2
MB
707 if (ret != 0) {
708 dev_err(&spi->dev, "Failed to register CODEC: %d\n", ret);
f1992dde 709 return ret;
05d448e2
MB
710 }
711
712 return 0;
5998102b
MB
713}
714
7a79e94e 715static int wm8731_spi_remove(struct spi_device *spi)
5998102b 716{
f0fba2ad 717 snd_soc_unregister_codec(&spi->dev);
5998102b
MB
718 return 0;
719}
720
721static struct spi_driver wm8731_spi_driver = {
722 .driver = {
99b59f3c 723 .name = "wm8731",
5998102b 724 .owner = THIS_MODULE,
a7f96e4d 725 .of_match_table = wm8731_of_match,
5998102b
MB
726 },
727 .probe = wm8731_spi_probe,
7a79e94e 728 .remove = wm8731_spi_remove,
5998102b 729};
a8035c8f
MB
730#endif /* CONFIG_SPI_MASTER */
731
b65ab73e 732#if IS_ENABLED(CONFIG_I2C)
7a79e94e
BP
733static int wm8731_i2c_probe(struct i2c_client *i2c,
734 const struct i2c_device_id *id)
a8035c8f 735{
5998102b 736 struct wm8731_priv *wm8731;
f0fba2ad 737 int ret;
a8035c8f 738
f1992dde
MB
739 wm8731 = devm_kzalloc(&i2c->dev, sizeof(struct wm8731_priv),
740 GFP_KERNEL);
5998102b
MB
741 if (wm8731 == NULL)
742 return -ENOMEM;
743
99d42234
SW
744 wm8731->mclk = devm_clk_get(&i2c->dev, "mclk");
745 if (IS_ERR(wm8731->mclk)) {
746 ret = PTR_ERR(wm8731->mclk);
747 if (ret == -ENOENT) {
748 wm8731->mclk = NULL;
749 dev_warn(&i2c->dev, "Assuming static MCLK\n");
750 } else {
751 dev_err(&i2c->dev, "Failed to get MCLK: %d\n",
752 ret);
753 return ret;
754 }
755 }
756
8a6cf30b
ML
757 mutex_init(&wm8731->lock);
758
6702dfcc
SK
759 i2c_set_clientdata(i2c, wm8731);
760
761 ret = wm8731_request_supplies(&i2c->dev, wm8731);
762 if (ret != 0)
763 return ret;
764
f1992dde 765 wm8731->regmap = devm_regmap_init_i2c(i2c, &wm8731_regmap);
05d448e2
MB
766 if (IS_ERR(wm8731->regmap)) {
767 ret = PTR_ERR(wm8731->regmap);
768 dev_err(&i2c->dev, "Failed to allocate register map: %d\n",
769 ret);
f1992dde 770 return ret;
05d448e2
MB
771 }
772
6702dfcc
SK
773 ret = wm8731_hw_init(&i2c->dev, wm8731);
774 if (ret != 0)
775 return ret;
a8035c8f 776
05d448e2 777 ret = snd_soc_register_codec(&i2c->dev,
f0fba2ad 778 &soc_codec_dev_wm8731, &wm8731_dai, 1);
05d448e2
MB
779 if (ret != 0) {
780 dev_err(&i2c->dev, "Failed to register CODEC: %d\n", ret);
f1992dde 781 return ret;
05d448e2
MB
782 }
783
784 return 0;
a8035c8f
MB
785}
786
7a79e94e 787static int wm8731_i2c_remove(struct i2c_client *client)
a8035c8f 788{
f0fba2ad 789 snd_soc_unregister_codec(&client->dev);
a8035c8f
MB
790 return 0;
791}
792
793static const struct i2c_device_id wm8731_i2c_id[] = {
794 { "wm8731", 0 },
795 { }
796};
797MODULE_DEVICE_TABLE(i2c, wm8731_i2c_id);
798
799static struct i2c_driver wm8731_i2c_driver = {
800 .driver = {
99b59f3c 801 .name = "wm8731",
a8035c8f 802 .owner = THIS_MODULE,
a7f96e4d 803 .of_match_table = wm8731_of_match,
a8035c8f
MB
804 },
805 .probe = wm8731_i2c_probe,
7a79e94e 806 .remove = wm8731_i2c_remove,
a8035c8f
MB
807 .id_table = wm8731_i2c_id,
808};
809#endif
810
c9b3a40f 811static int __init wm8731_modinit(void)
64089b84 812{
f0fba2ad 813 int ret = 0;
b65ab73e 814#if IS_ENABLED(CONFIG_I2C)
5998102b
MB
815 ret = i2c_add_driver(&wm8731_i2c_driver);
816 if (ret != 0) {
817 printk(KERN_ERR "Failed to register WM8731 I2C driver: %d\n",
818 ret);
819 }
820#endif
821#if defined(CONFIG_SPI_MASTER)
822 ret = spi_register_driver(&wm8731_spi_driver);
823 if (ret != 0) {
824 printk(KERN_ERR "Failed to register WM8731 SPI driver: %d\n",
825 ret);
826 }
827#endif
f0fba2ad 828 return ret;
64089b84
MB
829}
830module_init(wm8731_modinit);
831
832static void __exit wm8731_exit(void)
833{
b65ab73e 834#if IS_ENABLED(CONFIG_I2C)
5998102b
MB
835 i2c_del_driver(&wm8731_i2c_driver);
836#endif
837#if defined(CONFIG_SPI_MASTER)
838 spi_unregister_driver(&wm8731_spi_driver);
839#endif
64089b84
MB
840}
841module_exit(wm8731_exit);
842
40e0aa64
RP
843MODULE_DESCRIPTION("ASoC WM8731 driver");
844MODULE_AUTHOR("Richard Purdie");
845MODULE_LICENSE("GPL");
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