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ASoC: Begin to factor out register cache I/O functions
[deliverable/linux.git] / sound / soc / codecs / wm8750.c
CommitLineData
abadfc92
RP		 1/*
2 * wm8750.c -- WM8750 ALSA SoC audio driver
3 *
4 * Copyright 2005 Openedhand Ltd.
5 *
6 * Author: Richard Purdie <richard@openedhand.com>
7 *
8 * Based on WM8753.c
9 *
10 * This program is free software; you can redistribute it and/or modify
11 * it under the terms of the GNU General Public License version 2 as
12 * published by the Free Software Foundation.
13 */
14
15#include <linux/module.h>
16#include <linux/moduleparam.h>
17#include <linux/init.h>
18#include <linux/delay.h>
19#include <linux/pm.h>
20#include <linux/i2c.h>
21#include <linux/platform_device.h>
2f3dfaf5 22#include <linux/spi/spi.h>
abadfc92
RP		 23#include <sound/core.h>
24#include <sound/pcm.h>
25#include <sound/pcm_params.h>
26#include <sound/soc.h>
27#include <sound/soc-dapm.h>
28#include <sound/initval.h>
29
30#include "wm8750.h"
31
4422b606 32#define WM8750_VERSION "0.12"
abadfc92 33
4422b606
LG		 34/* codec private data */
35struct wm8750_priv {
36 unsigned int sysclk;
37};
38
abadfc92
RP		 39/*
40 * wm8750 register cache
41 * We can't read the WM8750 register space when we
42 * are using 2 wire for device control, so we cache them instead.
43 */
44static const u16 wm8750_reg[] = {
45 0x0097, 0x0097, 0x0079, 0x0079, /* 0 */
46 0x0000, 0x0008, 0x0000, 0x000a, /* 4 */
47 0x0000, 0x0000, 0x00ff, 0x00ff, /* 8 */
48 0x000f, 0x000f, 0x0000, 0x0000, /* 12 */
49 0x0000, 0x007b, 0x0000, 0x0032, /* 16 */
50 0x0000, 0x00c3, 0x00c3, 0x00c0, /* 20 */
51 0x0000, 0x0000, 0x0000, 0x0000, /* 24 */
52 0x0000, 0x0000, 0x0000, 0x0000, /* 28 */
53 0x0000, 0x0000, 0x0050, 0x0050, /* 32 */
54 0x0050, 0x0050, 0x0050, 0x0050, /* 36 */
55 0x0079, 0x0079, 0x0079, /* 40 */
56};
57
17a52fd6 58#define wm8750_reset(c) snd_soc_write(c, WM8750_RESET, 0)
abadfc92
RP		 59
60/*
61 * WM8750 Controls
62 */
63static const char *wm8750_bass[] = {"Linear Control", "Adaptive Boost"};
64static const char *wm8750_bass_filter[] = { "130Hz @ 48kHz", "200Hz @ 48kHz" };
65static const char *wm8750_treble[] = {"8kHz", "4kHz"};
66static const char *wm8750_3d_lc[] = {"200Hz", "500Hz"};
67static const char *wm8750_3d_uc[] = {"2.2kHz", "1.5kHz"};
68static const char *wm8750_3d_func[] = {"Capture", "Playback"};
69static const char *wm8750_alc_func[] = {"Off", "Right", "Left", "Stereo"};
70static const char *wm8750_ng_type[] = {"Constant PGA Gain",
71 "Mute ADC Output"};
72static const char *wm8750_line_mux[] = {"Line 1", "Line 2", "Line 3", "PGA",
73 "Differential"};
74static const char *wm8750_pga_sel[] = {"Line 1", "Line 2", "Line 3",
75 "Differential"};
76static const char *wm8750_out3[] = {"VREF", "ROUT1 + Vol", "MonoOut",
77 "ROUT1"};
78static const char *wm8750_diff_sel[] = {"Line 1", "Line 2"};
79static const char *wm8750_adcpol[] = {"Normal", "L Invert", "R Invert",
80 "L + R Invert"};
81static const char *wm8750_deemph[] = {"None", "32Khz", "44.1Khz", "48Khz"};
82static const char *wm8750_mono_mux[] = {"Stereo", "Mono (Left)",
83 "Mono (Right)", "Digital Mono"};
84
85static const struct soc_enum wm8750_enum[] = {
86SOC_ENUM_SINGLE(WM8750_BASS, 7, 2, wm8750_bass),
87SOC_ENUM_SINGLE(WM8750_BASS, 6, 2, wm8750_bass_filter),
88SOC_ENUM_SINGLE(WM8750_TREBLE, 6, 2, wm8750_treble),
89SOC_ENUM_SINGLE(WM8750_3D, 5, 2, wm8750_3d_lc),
90SOC_ENUM_SINGLE(WM8750_3D, 6, 2, wm8750_3d_uc),
91SOC_ENUM_SINGLE(WM8750_3D, 7, 2, wm8750_3d_func),
92SOC_ENUM_SINGLE(WM8750_ALC1, 7, 4, wm8750_alc_func),
93SOC_ENUM_SINGLE(WM8750_NGATE, 1, 2, wm8750_ng_type),
94SOC_ENUM_SINGLE(WM8750_LOUTM1, 0, 5, wm8750_line_mux),
95SOC_ENUM_SINGLE(WM8750_ROUTM1, 0, 5, wm8750_line_mux),
96SOC_ENUM_SINGLE(WM8750_LADCIN, 6, 4, wm8750_pga_sel), /* 10 */
97SOC_ENUM_SINGLE(WM8750_RADCIN, 6, 4, wm8750_pga_sel),
98SOC_ENUM_SINGLE(WM8750_ADCTL2, 7, 4, wm8750_out3),
99SOC_ENUM_SINGLE(WM8750_ADCIN, 8, 2, wm8750_diff_sel),
100SOC_ENUM_SINGLE(WM8750_ADCDAC, 5, 4, wm8750_adcpol),
101SOC_ENUM_SINGLE(WM8750_ADCDAC, 1, 4, wm8750_deemph),
102SOC_ENUM_SINGLE(WM8750_ADCIN, 6, 4, wm8750_mono_mux), /* 16 */
103
104};
105
106static const struct snd_kcontrol_new wm8750_snd_controls[] = {
107
108SOC_DOUBLE_R("Capture Volume", WM8750_LINVOL, WM8750_RINVOL, 0, 63, 0),
109SOC_DOUBLE_R("Capture ZC Switch", WM8750_LINVOL, WM8750_RINVOL, 6, 1, 0),
110SOC_DOUBLE_R("Capture Switch", WM8750_LINVOL, WM8750_RINVOL, 7, 1, 1),
111
bd903b6e 112SOC_DOUBLE_R("Headphone Playback ZC Switch", WM8750_LOUT1V,
abadfc92 113 WM8750_ROUT1V, 7, 1, 0),
bd903b6e 114SOC_DOUBLE_R("Speaker Playback ZC Switch", WM8750_LOUT2V,
abadfc92
RP		 115 WM8750_ROUT2V, 7, 1, 0),
116
117SOC_ENUM("Playback De-emphasis", wm8750_enum[15]),
118
119SOC_ENUM("Capture Polarity", wm8750_enum[14]),
120SOC_SINGLE("Playback 6dB Attenuate", WM8750_ADCDAC, 7, 1, 0),
121SOC_SINGLE("Capture 6dB Attenuate", WM8750_ADCDAC, 8, 1, 0),
122
123SOC_DOUBLE_R("PCM Volume", WM8750_LDAC, WM8750_RDAC, 0, 255, 0),
124
125SOC_ENUM("Bass Boost", wm8750_enum[0]),
126SOC_ENUM("Bass Filter", wm8750_enum[1]),
127SOC_SINGLE("Bass Volume", WM8750_BASS, 0, 15, 1),
128
6a7b8cf4 129SOC_SINGLE("Treble Volume", WM8750_TREBLE, 0, 15, 1),
abadfc92
RP		 130SOC_ENUM("Treble Cut-off", wm8750_enum[2]),
131
132SOC_SINGLE("3D Switch", WM8750_3D, 0, 1, 0),
133SOC_SINGLE("3D Volume", WM8750_3D, 1, 15, 0),
134SOC_ENUM("3D Lower Cut-off", wm8750_enum[3]),
135SOC_ENUM("3D Upper Cut-off", wm8750_enum[4]),
136SOC_ENUM("3D Mode", wm8750_enum[5]),
137
138SOC_SINGLE("ALC Capture Target Volume", WM8750_ALC1, 0, 7, 0),
139SOC_SINGLE("ALC Capture Max Volume", WM8750_ALC1, 4, 7, 0),
140SOC_ENUM("ALC Capture Function", wm8750_enum[6]),
141SOC_SINGLE("ALC Capture ZC Switch", WM8750_ALC2, 7, 1, 0),
142SOC_SINGLE("ALC Capture Hold Time", WM8750_ALC2, 0, 15, 0),
143SOC_SINGLE("ALC Capture Decay Time", WM8750_ALC3, 4, 15, 0),
144SOC_SINGLE("ALC Capture Attack Time", WM8750_ALC3, 0, 15, 0),
145SOC_SINGLE("ALC Capture NG Threshold", WM8750_NGATE, 3, 31, 0),
146SOC_ENUM("ALC Capture NG Type", wm8750_enum[4]),
147SOC_SINGLE("ALC Capture NG Switch", WM8750_NGATE, 0, 1, 0),
148
149SOC_SINGLE("Left ADC Capture Volume", WM8750_LADC, 0, 255, 0),
150SOC_SINGLE("Right ADC Capture Volume", WM8750_RADC, 0, 255, 0),
151
152SOC_SINGLE("ZC Timeout Switch", WM8750_ADCTL1, 0, 1, 0),
153SOC_SINGLE("Playback Invert Switch", WM8750_ADCTL1, 1, 1, 0),
154
bd903b6e 155SOC_SINGLE("Right Speaker Playback Invert Switch", WM8750_ADCTL2, 4, 1, 0),
abadfc92
RP		 156
157/* Unimplemented */
158/* ADCDAC Bit 0 - ADCHPD */
159/* ADCDAC Bit 4 - HPOR */
160/* ADCTL1 Bit 2,3 - DATSEL */
161/* ADCTL1 Bit 4,5 - DMONOMIX */
162/* ADCTL1 Bit 6,7 - VSEL */
163/* ADCTL2 Bit 2 - LRCM */
164/* ADCTL2 Bit 3 - TRI */
165/* ADCTL3 Bit 5 - HPFLREN */
166/* ADCTL3 Bit 6 - VROI */
167/* ADCTL3 Bit 7,8 - ADCLRM */
168/* ADCIN Bit 4 - LDCM */
169/* ADCIN Bit 5 - RDCM */
170
171SOC_DOUBLE_R("Mic Boost", WM8750_LADCIN, WM8750_RADCIN, 4, 3, 0),
172
173SOC_DOUBLE_R("Bypass Left Playback Volume", WM8750_LOUTM1,
174 WM8750_LOUTM2, 4, 7, 1),
175SOC_DOUBLE_R("Bypass Right Playback Volume", WM8750_ROUTM1,
176 WM8750_ROUTM2, 4, 7, 1),
177SOC_DOUBLE_R("Bypass Mono Playback Volume", WM8750_MOUTM1,
178 WM8750_MOUTM2, 4, 7, 1),
179
180SOC_SINGLE("Mono Playback ZC Switch", WM8750_MOUTV, 7, 1, 0),
181
bd903b6e
LG		 182SOC_DOUBLE_R("Headphone Playback Volume", WM8750_LOUT1V, WM8750_ROUT1V,
183 0, 127, 0),
184SOC_DOUBLE_R("Speaker Playback Volume", WM8750_LOUT2V, WM8750_ROUT2V,
185 0, 127, 0),
abadfc92
RP		 186
187SOC_SINGLE("Mono Playback Volume", WM8750_MOUTV, 0, 127, 0),
188
189};
190
abadfc92
RP		 191/*
192 * DAPM Controls
193 */
194
195/* Left Mixer */
196static const struct snd_kcontrol_new wm8750_left_mixer_controls[] = {
197SOC_DAPM_SINGLE("Playback Switch", WM8750_LOUTM1, 8, 1, 0),
198SOC_DAPM_SINGLE("Left Bypass Switch", WM8750_LOUTM1, 7, 1, 0),
199SOC_DAPM_SINGLE("Right Playback Switch", WM8750_LOUTM2, 8, 1, 0),
200SOC_DAPM_SINGLE("Right Bypass Switch", WM8750_LOUTM2, 7, 1, 0),
201};
202
203/* Right Mixer */
204static const struct snd_kcontrol_new wm8750_right_mixer_controls[] = {
205SOC_DAPM_SINGLE("Left Playback Switch", WM8750_ROUTM1, 8, 1, 0),
206SOC_DAPM_SINGLE("Left Bypass Switch", WM8750_ROUTM1, 7, 1, 0),
207SOC_DAPM_SINGLE("Playback Switch", WM8750_ROUTM2, 8, 1, 0),
208SOC_DAPM_SINGLE("Right Bypass Switch", WM8750_ROUTM2, 7, 1, 0),
209};
210
211/* Mono Mixer */
212static const struct snd_kcontrol_new wm8750_mono_mixer_controls[] = {
213SOC_DAPM_SINGLE("Left Playback Switch", WM8750_MOUTM1, 8, 1, 0),
214SOC_DAPM_SINGLE("Left Bypass Switch", WM8750_MOUTM1, 7, 1, 0),
215SOC_DAPM_SINGLE("Right Playback Switch", WM8750_MOUTM2, 8, 1, 0),
216SOC_DAPM_SINGLE("Right Bypass Switch", WM8750_MOUTM2, 7, 1, 0),
217};
218
219/* Left Line Mux */
220static const struct snd_kcontrol_new wm8750_left_line_controls =
221SOC_DAPM_ENUM("Route", wm8750_enum[8]);
222
223/* Right Line Mux */
224static const struct snd_kcontrol_new wm8750_right_line_controls =
225SOC_DAPM_ENUM("Route", wm8750_enum[9]);
226
227/* Left PGA Mux */
228static const struct snd_kcontrol_new wm8750_left_pga_controls =
229SOC_DAPM_ENUM("Route", wm8750_enum[10]);
230
231/* Right PGA Mux */
232static const struct snd_kcontrol_new wm8750_right_pga_controls =
233SOC_DAPM_ENUM("Route", wm8750_enum[11]);
234
235/* Out 3 Mux */
236static const struct snd_kcontrol_new wm8750_out3_controls =
237SOC_DAPM_ENUM("Route", wm8750_enum[12]);
238
239/* Differential Mux */
240static const struct snd_kcontrol_new wm8750_diffmux_controls =
241SOC_DAPM_ENUM("Route", wm8750_enum[13]);
242
243/* Mono ADC Mux */
244static const struct snd_kcontrol_new wm8750_monomux_controls =
245SOC_DAPM_ENUM("Route", wm8750_enum[16]);
246
247static const struct snd_soc_dapm_widget wm8750_dapm_widgets[] = {
248 SND_SOC_DAPM_MIXER("Left Mixer", SND_SOC_NOPM, 0, 0,
249 &wm8750_left_mixer_controls[0],
250 ARRAY_SIZE(wm8750_left_mixer_controls)),
251 SND_SOC_DAPM_MIXER("Right Mixer", SND_SOC_NOPM, 0, 0,
252 &wm8750_right_mixer_controls[0],
253 ARRAY_SIZE(wm8750_right_mixer_controls)),
254 SND_SOC_DAPM_MIXER("Mono Mixer", WM8750_PWR2, 2, 0,
255 &wm8750_mono_mixer_controls[0],
256 ARRAY_SIZE(wm8750_mono_mixer_controls)),
257
258 SND_SOC_DAPM_PGA("Right Out 2", WM8750_PWR2, 3, 0, NULL, 0),
259 SND_SOC_DAPM_PGA("Left Out 2", WM8750_PWR2, 4, 0, NULL, 0),
260 SND_SOC_DAPM_PGA("Right Out 1", WM8750_PWR2, 5, 0, NULL, 0),
261 SND_SOC_DAPM_PGA("Left Out 1", WM8750_PWR2, 6, 0, NULL, 0),
262 SND_SOC_DAPM_DAC("Right DAC", "Right Playback", WM8750_PWR2, 7, 0),
263 SND_SOC_DAPM_DAC("Left DAC", "Left Playback", WM8750_PWR2, 8, 0),
264
265 SND_SOC_DAPM_MICBIAS("Mic Bias", WM8750_PWR1, 1, 0),
266 SND_SOC_DAPM_ADC("Right ADC", "Right Capture", WM8750_PWR1, 2, 0),
267 SND_SOC_DAPM_ADC("Left ADC", "Left Capture", WM8750_PWR1, 3, 0),
268
269 SND_SOC_DAPM_MUX("Left PGA Mux", WM8750_PWR1, 5, 0,
270 &wm8750_left_pga_controls),
271 SND_SOC_DAPM_MUX("Right PGA Mux", WM8750_PWR1, 4, 0,
272 &wm8750_right_pga_controls),
273 SND_SOC_DAPM_MUX("Left Line Mux", SND_SOC_NOPM, 0, 0,
274 &wm8750_left_line_controls),
275 SND_SOC_DAPM_MUX("Right Line Mux", SND_SOC_NOPM, 0, 0,
276 &wm8750_right_line_controls),
277
278 SND_SOC_DAPM_MUX("Out3 Mux", SND_SOC_NOPM, 0, 0, &wm8750_out3_controls),
279 SND_SOC_DAPM_PGA("Out 3", WM8750_PWR2, 1, 0, NULL, 0),
280 SND_SOC_DAPM_PGA("Mono Out 1", WM8750_PWR2, 2, 0, NULL, 0),
281
282 SND_SOC_DAPM_MUX("Differential Mux", SND_SOC_NOPM, 0, 0,
283 &wm8750_diffmux_controls),
284 SND_SOC_DAPM_MUX("Left ADC Mux", SND_SOC_NOPM, 0, 0,
285 &wm8750_monomux_controls),
286 SND_SOC_DAPM_MUX("Right ADC Mux", SND_SOC_NOPM, 0, 0,
287 &wm8750_monomux_controls),
288
289 SND_SOC_DAPM_OUTPUT("LOUT1"),
290 SND_SOC_DAPM_OUTPUT("ROUT1"),
291 SND_SOC_DAPM_OUTPUT("LOUT2"),
292 SND_SOC_DAPM_OUTPUT("ROUT2"),
23ba79bd 293 SND_SOC_DAPM_OUTPUT("MONO1"),
abadfc92 294 SND_SOC_DAPM_OUTPUT("OUT3"),
04489eeb 295 SND_SOC_DAPM_OUTPUT("VREF"),
abadfc92
RP		 296
297 SND_SOC_DAPM_INPUT("LINPUT1"),
298 SND_SOC_DAPM_INPUT("LINPUT2"),
299 SND_SOC_DAPM_INPUT("LINPUT3"),
300 SND_SOC_DAPM_INPUT("RINPUT1"),
301 SND_SOC_DAPM_INPUT("RINPUT2"),
302 SND_SOC_DAPM_INPUT("RINPUT3"),
303};
304
a65f0568 305static const struct snd_soc_dapm_route audio_map[] = {
abadfc92
RP		 306 /* left mixer */
307 {"Left Mixer", "Playback Switch", "Left DAC"},
308 {"Left Mixer", "Left Bypass Switch", "Left Line Mux"},
309 {"Left Mixer", "Right Playback Switch", "Right DAC"},
310 {"Left Mixer", "Right Bypass Switch", "Right Line Mux"},
311
312 /* right mixer */
313 {"Right Mixer", "Left Playback Switch", "Left DAC"},
314 {"Right Mixer", "Left Bypass Switch", "Left Line Mux"},
315 {"Right Mixer", "Playback Switch", "Right DAC"},
316 {"Right Mixer", "Right Bypass Switch", "Right Line Mux"},
317
318 /* left out 1 */
319 {"Left Out 1", NULL, "Left Mixer"},
320 {"LOUT1", NULL, "Left Out 1"},
321
322 /* left out 2 */
323 {"Left Out 2", NULL, "Left Mixer"},
324 {"LOUT2", NULL, "Left Out 2"},
325
326 /* right out 1 */
327 {"Right Out 1", NULL, "Right Mixer"},
328 {"ROUT1", NULL, "Right Out 1"},
329
330 /* right out 2 */
331 {"Right Out 2", NULL, "Right Mixer"},
332 {"ROUT2", NULL, "Right Out 2"},
333
334 /* mono mixer */
335 {"Mono Mixer", "Left Playback Switch", "Left DAC"},
336 {"Mono Mixer", "Left Bypass Switch", "Left Line Mux"},
337 {"Mono Mixer", "Right Playback Switch", "Right DAC"},
338 {"Mono Mixer", "Right Bypass Switch", "Right Line Mux"},
339
340 /* mono out */
341 {"Mono Out 1", NULL, "Mono Mixer"},
342 {"MONO1", NULL, "Mono Out 1"},
343
344 /* out 3 */
345 {"Out3 Mux", "VREF", "VREF"},
346 {"Out3 Mux", "ROUT1 + Vol", "ROUT1"},
347 {"Out3 Mux", "ROUT1", "Right Mixer"},
348 {"Out3 Mux", "MonoOut", "MONO1"},
349 {"Out 3", NULL, "Out3 Mux"},
350 {"OUT3", NULL, "Out 3"},
351
352 /* Left Line Mux */
353 {"Left Line Mux", "Line 1", "LINPUT1"},
354 {"Left Line Mux", "Line 2", "LINPUT2"},
355 {"Left Line Mux", "Line 3", "LINPUT3"},
356 {"Left Line Mux", "PGA", "Left PGA Mux"},
357 {"Left Line Mux", "Differential", "Differential Mux"},
358
359 /* Right Line Mux */
360 {"Right Line Mux", "Line 1", "RINPUT1"},
361 {"Right Line Mux", "Line 2", "RINPUT2"},
362 {"Right Line Mux", "Line 3", "RINPUT3"},
363 {"Right Line Mux", "PGA", "Right PGA Mux"},
364 {"Right Line Mux", "Differential", "Differential Mux"},
365
366 /* Left PGA Mux */
367 {"Left PGA Mux", "Line 1", "LINPUT1"},
368 {"Left PGA Mux", "Line 2", "LINPUT2"},
369 {"Left PGA Mux", "Line 3", "LINPUT3"},
370 {"Left PGA Mux", "Differential", "Differential Mux"},
371
372 /* Right PGA Mux */
373 {"Right PGA Mux", "Line 1", "RINPUT1"},
374 {"Right PGA Mux", "Line 2", "RINPUT2"},
375 {"Right PGA Mux", "Line 3", "RINPUT3"},
376 {"Right PGA Mux", "Differential", "Differential Mux"},
377
378 /* Differential Mux */
379 {"Differential Mux", "Line 1", "LINPUT1"},
380 {"Differential Mux", "Line 1", "RINPUT1"},
381 {"Differential Mux", "Line 2", "LINPUT2"},
382 {"Differential Mux", "Line 2", "RINPUT2"},
383
384 /* Left ADC Mux */
385 {"Left ADC Mux", "Stereo", "Left PGA Mux"},
386 {"Left ADC Mux", "Mono (Left)", "Left PGA Mux"},
387 {"Left ADC Mux", "Digital Mono", "Left PGA Mux"},
388
389 /* Right ADC Mux */
390 {"Right ADC Mux", "Stereo", "Right PGA Mux"},
391 {"Right ADC Mux", "Mono (Right)", "Right PGA Mux"},
392 {"Right ADC Mux", "Digital Mono", "Right PGA Mux"},
393
394 /* ADC */
395 {"Left ADC", NULL, "Left ADC Mux"},
396 {"Right ADC", NULL, "Right ADC Mux"},
abadfc92
RP		 397};
398
399static int wm8750_add_widgets(struct snd_soc_codec *codec)
400{
a65f0568
MB		 401 snd_soc_dapm_new_controls(codec, wm8750_dapm_widgets,
402 ARRAY_SIZE(wm8750_dapm_widgets));
abadfc92 403
a65f0568 404 snd_soc_dapm_add_routes(codec, audio_map, ARRAY_SIZE(audio_map));
abadfc92
RP		 405
406 snd_soc_dapm_new_widgets(codec);
407 return 0;
408}
409
410struct _coeff_div {
411 u32 mclk;
412 u32 rate;
413 u16 fs;
414 u8 sr:5;
415 u8 usb:1;
416};
417
418/* codec hifi mclk clock divider coefficients */
419static const struct _coeff_div coeff_div[] = {
420 /* 8k */
421 {12288000, 8000, 1536, 0x6, 0x0},
422 {11289600, 8000, 1408, 0x16, 0x0},
423 {18432000, 8000, 2304, 0x7, 0x0},
424 {16934400, 8000, 2112, 0x17, 0x0},
425 {12000000, 8000, 1500, 0x6, 0x1},
426
427 /* 11.025k */
428 {11289600, 11025, 1024, 0x18, 0x0},
429 {16934400, 11025, 1536, 0x19, 0x0},
430 {12000000, 11025, 1088, 0x19, 0x1},
431
432 /* 16k */
433 {12288000, 16000, 768, 0xa, 0x0},
434 {18432000, 16000, 1152, 0xb, 0x0},
435 {12000000, 16000, 750, 0xa, 0x1},
436
437 /* 22.05k */
438 {11289600, 22050, 512, 0x1a, 0x0},
439 {16934400, 22050, 768, 0x1b, 0x0},
440 {12000000, 22050, 544, 0x1b, 0x1},
441
442 /* 32k */
443 {12288000, 32000, 384, 0xc, 0x0},
444 {18432000, 32000, 576, 0xd, 0x0},
445 {12000000, 32000, 375, 0xa, 0x1},
446
447 /* 44.1k */
448 {11289600, 44100, 256, 0x10, 0x0},
449 {16934400, 44100, 384, 0x11, 0x0},
450 {12000000, 44100, 272, 0x11, 0x1},
451
452 /* 48k */
453 {12288000, 48000, 256, 0x0, 0x0},
454 {18432000, 48000, 384, 0x1, 0x0},
455 {12000000, 48000, 250, 0x0, 0x1},
456
457 /* 88.2k */
458 {11289600, 88200, 128, 0x1e, 0x0},
459 {16934400, 88200, 192, 0x1f, 0x0},
460 {12000000, 88200, 136, 0x1f, 0x1},
461
462 /* 96k */
463 {12288000, 96000, 128, 0xe, 0x0},
464 {18432000, 96000, 192, 0xf, 0x0},
465 {12000000, 96000, 125, 0xe, 0x1},
466};
467
468static inline int get_coeff(int mclk, int rate)
469{
470 int i;
471
472 for (i = 0; i < ARRAY_SIZE(coeff_div); i++) {
473 if (coeff_div[i].rate == rate && coeff_div[i].mclk == mclk)
474 return i;
475 }
a71a468a
LG		 476
477 printk(KERN_ERR "wm8750: could not get coeff for mclk %d @ rate %d\n",
478 mclk, rate);
abadfc92
RP		 479 return -EINVAL;
480}
481
e550e17f 482static int wm8750_set_dai_sysclk(struct snd_soc_dai *codec_dai,
4422b606 483 int clk_id, unsigned int freq, int dir)
abadfc92 484{
4422b606
LG		 485 struct snd_soc_codec *codec = codec_dai->codec;
486 struct wm8750_priv *wm8750 = codec->private_data;
487
488 switch (freq) {
489 case 11289600:
490 case 12000000:
491 case 12288000:
492 case 16934400:
493 case 18432000:
494 wm8750->sysclk = freq;
495 return 0;
496 }
497 return -EINVAL;
abadfc92
RP		 498}
499
e550e17f 500static int wm8750_set_dai_fmt(struct snd_soc_dai *codec_dai,
4422b606 501 unsigned int fmt)
abadfc92 502{
4422b606
LG		 503 struct snd_soc_codec *codec = codec_dai->codec;
504 u16 iface = 0;
abadfc92
RP		 505
506 /* set master/slave audio interface */
4422b606 507 switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) {
abadfc92
RP		 508 case SND_SOC_DAIFMT_CBM_CFM:
509 iface = 0x0040;
510 break;
511 case SND_SOC_DAIFMT_CBS_CFS:
512 break;
4422b606
LG		 513 default:
514 return -EINVAL;
abadfc92
RP		 515 }
516
517 /* interface format */
4422b606 518 switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
abadfc92
RP		 519 case SND_SOC_DAIFMT_I2S:
520 iface |= 0x0002;
521 break;
522 case SND_SOC_DAIFMT_RIGHT_J:
523 break;
524 case SND_SOC_DAIFMT_LEFT_J:
525 iface |= 0x0001;
526 break;
527 case SND_SOC_DAIFMT_DSP_A:
528 iface |= 0x0003;
529 break;
530 case SND_SOC_DAIFMT_DSP_B:
531 iface |= 0x0013;
532 break;
4422b606
LG		 533 default:
534 return -EINVAL;
abadfc92
RP		 535 }
536
537 /* clock inversion */
4422b606 538 switch (fmt & SND_SOC_DAIFMT_INV_MASK) {
abadfc92
RP		 539 case SND_SOC_DAIFMT_NB_NF:
540 break;
541 case SND_SOC_DAIFMT_IB_IF:
542 iface |= 0x0090;
543 break;
544 case SND_SOC_DAIFMT_IB_NF:
545 iface |= 0x0080;
546 break;
547 case SND_SOC_DAIFMT_NB_IF:
548 iface |= 0x0010;
549 break;
4422b606
LG		 550 default:
551 return -EINVAL;
abadfc92
RP		 552 }
553
17a52fd6 554 snd_soc_write(codec, WM8750_IFACE, iface);
4422b606
LG		 555 return 0;
556}
557
558static int wm8750_pcm_hw_params(struct snd_pcm_substream *substream,
dee89c4d
MB		 559 struct snd_pcm_hw_params *params,
560 struct snd_soc_dai *dai)
4422b606
LG		 561{
562 struct snd_soc_pcm_runtime *rtd = substream->private_data;
563 struct snd_soc_device *socdev = rtd->socdev;
6627a653 564 struct snd_soc_codec *codec = socdev->card->codec;
4422b606 565 struct wm8750_priv *wm8750 = codec->private_data;
17a52fd6
MB		 566 u16 iface = snd_soc_read(codec, WM8750_IFACE) & 0x1f3;
567 u16 srate = snd_soc_read(codec, WM8750_SRATE) & 0x1c0;
4422b606
LG		 568 int coeff = get_coeff(wm8750->sysclk, params_rate(params));
569
570 /* bit size */
571 switch (params_format(params)) {
572 case SNDRV_PCM_FORMAT_S16_LE:
abadfc92 573 break;
4422b606
LG		 574 case SNDRV_PCM_FORMAT_S20_3LE:
575 iface |= 0x0004;
abadfc92 576 break;
4422b606
LG		 577 case SNDRV_PCM_FORMAT_S24_LE:
578 iface |= 0x0008;
abadfc92 579 break;
4422b606
LG		 580 case SNDRV_PCM_FORMAT_S32_LE:
581 iface |= 0x000c;
abadfc92
RP		 582 break;
583 }
584
585 /* set iface & srate */
17a52fd6 586 snd_soc_write(codec, WM8750_IFACE, iface);
4422b606 587 if (coeff >= 0)
17a52fd6 588 snd_soc_write(codec, WM8750_SRATE, srate |
4422b606 589 (coeff_div[coeff].sr << 1) | coeff_div[coeff].usb);
abadfc92
RP		 590
591 return 0;
592}
593
e550e17f 594static int wm8750_mute(struct snd_soc_dai *dai, int mute)
abadfc92 595{
4422b606 596 struct snd_soc_codec *codec = dai->codec;
17a52fd6 597 u16 mute_reg = snd_soc_read(codec, WM8750_ADCDAC) & 0xfff7;
4422b606 598
abadfc92 599 if (mute)
17a52fd6 600 snd_soc_write(codec, WM8750_ADCDAC, mute_reg | 0x8);
abadfc92 601 else
17a52fd6 602 snd_soc_write(codec, WM8750_ADCDAC, mute_reg);
abadfc92
RP		 603 return 0;
604}
605
0be9898a
MB		 606static int wm8750_set_bias_level(struct snd_soc_codec *codec,
607 enum snd_soc_bias_level level)
abadfc92 608{
17a52fd6 609 u16 pwr_reg = snd_soc_read(codec, WM8750_PWR1) & 0xfe3e;
abadfc92 610
0be9898a
MB		 611 switch (level) {
612 case SND_SOC_BIAS_ON:
abadfc92 613 /* set vmid to 50k and unmute dac */
17a52fd6 614 snd_soc_write(codec, WM8750_PWR1, pwr_reg | 0x00c0);
abadfc92 615 break;
0be9898a 616 case SND_SOC_BIAS_PREPARE:
abadfc92 617 /* set vmid to 5k for quick power up */
17a52fd6 618 snd_soc_write(codec, WM8750_PWR1, pwr_reg | 0x01c1);
abadfc92 619 break;
0be9898a 620 case SND_SOC_BIAS_STANDBY:
abadfc92 621 /* mute dac and set vmid to 500k, enable VREF */
17a52fd6 622 snd_soc_write(codec, WM8750_PWR1, pwr_reg | 0x0141);
abadfc92 623 break;
0be9898a 624 case SND_SOC_BIAS_OFF:
17a52fd6 625 snd_soc_write(codec, WM8750_PWR1, 0x0001);
abadfc92
RP		 626 break;
627 }
0be9898a 628 codec->bias_level = level;
abadfc92
RP		 629 return 0;
630}
631
4422b606 632#define WM8750_RATES (SNDRV_PCM_RATE_8000 | SNDRV_PCM_RATE_11025 |\
42f3030f
MB		 633 SNDRV_PCM_RATE_16000 | SNDRV_PCM_RATE_22050 | SNDRV_PCM_RATE_44100 | \
634 SNDRV_PCM_RATE_48000 | SNDRV_PCM_RATE_88200 | SNDRV_PCM_RATE_96000)
4422b606
LG		 635
636#define WM8750_FORMATS (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S20_3LE |\
637 SNDRV_PCM_FMTBIT_S24_LE)
638
6335d055
EM		 639static struct snd_soc_dai_ops wm8750_dai_ops = {
640 .hw_params = wm8750_pcm_hw_params,
641 .digital_mute = wm8750_mute,
642 .set_fmt = wm8750_set_dai_fmt,
643 .set_sysclk = wm8750_set_dai_sysclk,
644};
645
e550e17f 646struct snd_soc_dai wm8750_dai = {
abadfc92
RP		 647 .name = "WM8750",
648 .playback = {
649 .stream_name = "Playback",
650 .channels_min = 1,
651 .channels_max = 2,
4422b606
LG		 652 .rates = WM8750_RATES,
653 .formats = WM8750_FORMATS,},
abadfc92
RP		 654 .capture = {
655 .stream_name = "Capture",
656 .channels_min = 1,
657 .channels_max = 2,
4422b606
LG		 658 .rates = WM8750_RATES,
659 .formats = WM8750_FORMATS,},
6335d055 660 .ops = &wm8750_dai_ops,
abadfc92
RP		 661};
662EXPORT_SYMBOL_GPL(wm8750_dai);
663
1321b160 664static void wm8750_work(struct work_struct *work)
abadfc92 665{
1321b160
TI		 666 struct snd_soc_codec *codec =
667 container_of(work, struct snd_soc_codec, delayed_work.work);
0be9898a 668 wm8750_set_bias_level(codec, codec->bias_level);
abadfc92
RP		 669}
670
671static int wm8750_suspend(struct platform_device *pdev, pm_message_t state)
672{
673 struct snd_soc_device *socdev = platform_get_drvdata(pdev);
6627a653 674 struct snd_soc_codec *codec = socdev->card->codec;
abadfc92 675
0be9898a 676 wm8750_set_bias_level(codec, SND_SOC_BIAS_OFF);
abadfc92
RP		 677 return 0;
678}
679
680static int wm8750_resume(struct platform_device *pdev)
681{
682 struct snd_soc_device *socdev = platform_get_drvdata(pdev);
6627a653 683 struct snd_soc_codec *codec = socdev->card->codec;
abadfc92
RP		 684 int i;
685 u8 data[2];
686 u16 *cache = codec->reg_cache;
687
688 /* Sync reg_cache with the hardware */
689 for (i = 0; i < ARRAY_SIZE(wm8750_reg); i++) {
690 if (i == WM8750_RESET)
691 continue;
692 data[0] = (i << 1) | ((cache[i] >> 8) & 0x0001);
693 data[1] = cache[i] & 0x00ff;
694 codec->hw_write(codec->control_data, data, 2);
695 }
696
0be9898a 697 wm8750_set_bias_level(codec, SND_SOC_BIAS_STANDBY);
abadfc92
RP		 698
699 /* charge wm8750 caps */
0be9898a
MB		 700 if (codec->suspend_bias_level == SND_SOC_BIAS_ON) {
701 wm8750_set_bias_level(codec, SND_SOC_BIAS_PREPARE);
702 codec->bias_level = SND_SOC_BIAS_ON;
42f3030f
MB		 703 schedule_delayed_work(&codec->delayed_work,
704 msecs_to_jiffies(1000));
abadfc92
RP		 705 }
706
707 return 0;
708}
709
710/*
711 * initialise the WM8750 driver
712 * register the mixer and dsp interfaces with the kernel
713 */
714static int wm8750_init(struct snd_soc_device *socdev)
715{
6627a653 716 struct snd_soc_codec *codec = socdev->card->codec;
abadfc92
RP		 717 int reg, ret = 0;
718
719 codec->name = "WM8750";
720 codec->owner = THIS_MODULE;
0be9898a 721 codec->set_bias_level = wm8750_set_bias_level;
abadfc92
RP		 722 codec->dai = &wm8750_dai;
723 codec->num_dai = 1;
d751b233 724 codec->reg_cache_size = ARRAY_SIZE(wm8750_reg);
713fb939 725 codec->reg_cache = kmemdup(wm8750_reg, sizeof(wm8750_reg), GFP_KERNEL);
abadfc92
RP		 726 if (codec->reg_cache == NULL)
727 return -ENOMEM;
abadfc92 728
17a52fd6
MB		 729 ret = snd_soc_codec_set_cache_io(codec, 7, 9);
730 if (ret < 0) {
731 printk(KERN_ERR "wm8750: failed to set cache I/O: %d\n", ret);
732 goto err;
733 }
734
735 ret = wm8750_reset(codec);
736 if (ret < 0) {
737 printk(KERN_ERR "wm8750: failed to reset: %d\n", ret);
738 goto err;
739 }
abadfc92
RP		 740
741 /* register pcms */
742 ret = snd_soc_new_pcms(socdev, SNDRV_DEFAULT_IDX1, SNDRV_DEFAULT_STR1);
743 if (ret < 0) {
e35115a5 744 printk(KERN_ERR "wm8750: failed to create pcms\n");
17a52fd6 745 goto err;
abadfc92
RP		 746 }
747
748 /* charge output caps */
0be9898a
MB		 749 wm8750_set_bias_level(codec, SND_SOC_BIAS_PREPARE);
750 codec->bias_level = SND_SOC_BIAS_STANDBY;
1321b160 751 schedule_delayed_work(&codec->delayed_work, msecs_to_jiffies(1000));
abadfc92
RP		 752
753 /* set the update bits */
17a52fd6
MB		 754 reg = snd_soc_read(codec, WM8750_LDAC);
755 snd_soc_write(codec, WM8750_LDAC, reg | 0x0100);
756 reg = snd_soc_read(codec, WM8750_RDAC);
757 snd_soc_write(codec, WM8750_RDAC, reg | 0x0100);
758 reg = snd_soc_read(codec, WM8750_LOUT1V);
759 snd_soc_write(codec, WM8750_LOUT1V, reg | 0x0100);
760 reg = snd_soc_read(codec, WM8750_ROUT1V);
761 snd_soc_write(codec, WM8750_ROUT1V, reg | 0x0100);
762 reg = snd_soc_read(codec, WM8750_LOUT2V);
763 snd_soc_write(codec, WM8750_LOUT2V, reg | 0x0100);
764 reg = snd_soc_read(codec, WM8750_ROUT2V);
765 snd_soc_write(codec, WM8750_ROUT2V, reg | 0x0100);
766 reg = snd_soc_read(codec, WM8750_LINVOL);
767 snd_soc_write(codec, WM8750_LINVOL, reg | 0x0100);
768 reg = snd_soc_read(codec, WM8750_RINVOL);
769 snd_soc_write(codec, WM8750_RINVOL, reg | 0x0100);
abadfc92 770
3e8e1952
IM		 771 snd_soc_add_controls(codec, wm8750_snd_controls,
772 ARRAY_SIZE(wm8750_snd_controls));
abadfc92 773 wm8750_add_widgets(codec);
968a6025 774 ret = snd_soc_init_card(socdev);
abadfc92 775 if (ret < 0) {
e35115a5
LG		 776 printk(KERN_ERR "wm8750: failed to register card\n");
777 goto card_err;
abadfc92 778 }
e35115a5 779 return ret;
abadfc92 780
e35115a5
LG		 781card_err:
782 snd_soc_free_pcms(socdev);
783 snd_soc_dapm_free(socdev);
17a52fd6 784err:
e35115a5 785 kfree(codec->reg_cache);
abadfc92
RP		 786 return ret;
787}
788
789/* If the i2c layer weren't so broken, we could pass this kind of data
790 around */
791static struct snd_soc_device *wm8750_socdev;
792
42f3030f 793#if defined(CONFIG_I2C) || defined(CONFIG_I2C_MODULE)
abadfc92
RP		 794
795/*
2f3dfaf5 796 * WM8750 2 wire address is determined by GPIO5
abadfc92
RP		 797 * state during powerup.
798 * low = 0x1a
799 * high = 0x1b
800 */
abadfc92 801
ee1d0099
JD		 802static int wm8750_i2c_probe(struct i2c_client *i2c,
803 const struct i2c_device_id *id)
abadfc92
RP		 804{
805 struct snd_soc_device *socdev = wm8750_socdev;
6627a653 806 struct snd_soc_codec *codec = socdev->card->codec;
abadfc92
RP		 807 int ret;
808
abadfc92
RP		 809 i2c_set_clientdata(i2c, codec);
810 codec->control_data = i2c;
811
abadfc92 812 ret = wm8750_init(socdev);
ee1d0099 813 if (ret < 0)
a5c95e90 814 pr_err("failed to initialise WM8750\n");
abadfc92 815
abadfc92
RP		 816 return ret;
817}
818
ee1d0099 819static int wm8750_i2c_remove(struct i2c_client *client)
abadfc92
RP		 820{
821 struct snd_soc_codec *codec = i2c_get_clientdata(client);
abadfc92 822 kfree(codec->reg_cache);
abadfc92
RP		 823 return 0;
824}
825
ee1d0099
JD		 826static const struct i2c_device_id wm8750_i2c_id[] = {
827 { "wm8750", 0 },
828 { }
829};
830MODULE_DEVICE_TABLE(i2c, wm8750_i2c_id);
abadfc92 831
abadfc92
RP		 832static struct i2c_driver wm8750_i2c_driver = {
833 .driver = {
834 .name = "WM8750 I2C Codec",
835 .owner = THIS_MODULE,
836 },
ee1d0099
JD		 837 .probe = wm8750_i2c_probe,
838 .remove = wm8750_i2c_remove,
839 .id_table = wm8750_i2c_id,
abadfc92
RP		 840};
841
ee1d0099
JD		 842static int wm8750_add_i2c_device(struct platform_device *pdev,
843 const struct wm8750_setup_data *setup)
844{
845 struct i2c_board_info info;
846 struct i2c_adapter *adapter;
847 struct i2c_client *client;
848 int ret;
849
850 ret = i2c_add_driver(&wm8750_i2c_driver);
851 if (ret != 0) {
852 dev_err(&pdev->dev, "can't add i2c driver\n");
853 return ret;
854 }
855
856 memset(&info, 0, sizeof(struct i2c_board_info));
857 info.addr = setup->i2c_address;
858 strlcpy(info.type, "wm8750", I2C_NAME_SIZE);
859
860 adapter = i2c_get_adapter(setup->i2c_bus);
861 if (!adapter) {
862 dev_err(&pdev->dev, "can't get i2c adapter %d\n",
863 setup->i2c_bus);
864 goto err_driver;
865 }
866
867 client = i2c_new_device(adapter, &info);
868 i2c_put_adapter(adapter);
869 if (!client) {
870 dev_err(&pdev->dev, "can't add i2c device at 0x%x\n",
871 (unsigned int)info.addr);
872 goto err_driver;
873 }
874
875 return 0;
876
877err_driver:
878 i2c_del_driver(&wm8750_i2c_driver);
879 return -ENODEV;
880}
abadfc92
RP		 881#endif
882
2f3dfaf5
MB		 883#if defined(CONFIG_SPI_MASTER)
884static int __devinit wm8750_spi_probe(struct spi_device *spi)
885{
886 struct snd_soc_device *socdev = wm8750_socdev;
6627a653 887 struct snd_soc_codec *codec = socdev->card->codec;
2f3dfaf5
MB		 888 int ret;
889
890 codec->control_data = spi;
891
892 ret = wm8750_init(socdev);
893 if (ret < 0)
894 dev_err(&spi->dev, "failed to initialise WM8750\n");
895
896 return ret;
897}
898
899static int __devexit wm8750_spi_remove(struct spi_device *spi)
900{
901 return 0;
902}
903
904static struct spi_driver wm8750_spi_driver = {
905 .driver = {
906 .name = "wm8750",
907 .bus = &spi_bus_type,
908 .owner = THIS_MODULE,
909 },
910 .probe = wm8750_spi_probe,
911 .remove = __devexit_p(wm8750_spi_remove),
912};
913
914static int wm8750_spi_write(struct spi_device *spi, const char *data, int len)
915{
916 struct spi_transfer t;
917 struct spi_message m;
918 u8 msg[2];
919
920 if (len <= 0)
921 return 0;
922
923 msg[0] = data[0];
924 msg[1] = data[1];
925
926 spi_message_init(&m);
927 memset(&t, 0, (sizeof t));
928
929 t.tx_buf = &msg[0];
930 t.len = len;
931
932 spi_message_add_tail(&t, &m);
933 spi_sync(spi, &m);
934
935 return len;
936}
937#endif
938
abadfc92
RP		 939static int wm8750_probe(struct platform_device *pdev)
940{
941 struct snd_soc_device *socdev = platform_get_drvdata(pdev);
942 struct wm8750_setup_data *setup = socdev->codec_data;
943 struct snd_soc_codec *codec;
4422b606 944 struct wm8750_priv *wm8750;
b7c9d852 945 int ret;
abadfc92 946
a5c95e90 947 pr_info("WM8750 Audio Codec %s", WM8750_VERSION);
abadfc92
RP		 948 codec = kzalloc(sizeof(struct snd_soc_codec), GFP_KERNEL);
949 if (codec == NULL)
950 return -ENOMEM;
951
4422b606
LG		 952 wm8750 = kzalloc(sizeof(struct wm8750_priv), GFP_KERNEL);
953 if (wm8750 == NULL) {
954 kfree(codec);
955 return -ENOMEM;
956 }
957
958 codec->private_data = wm8750;
6627a653 959 socdev->card->codec = codec;
abadfc92
RP		 960 mutex_init(&codec->mutex);
961 INIT_LIST_HEAD(&codec->dapm_widgets);
962 INIT_LIST_HEAD(&codec->dapm_paths);
963 wm8750_socdev = socdev;
1321b160 964 INIT_DELAYED_WORK(&codec->delayed_work, wm8750_work);
42f3030f 965
b7c9d852
MB		 966 ret = -ENODEV;
967
42f3030f 968#if defined(CONFIG_I2C) || defined(CONFIG_I2C_MODULE)
abadfc92 969 if (setup->i2c_address) {
abadfc92 970 codec->hw_write = (hw_write_t)i2c_master_send;
ee1d0099 971 ret = wm8750_add_i2c_device(pdev, setup);
abadfc92 972 }
abadfc92 973#endif
2f3dfaf5
MB		 974#if defined(CONFIG_SPI_MASTER)
975 if (setup->spi) {
976 codec->hw_write = (hw_write_t)wm8750_spi_write;
977 ret = spi_register_driver(&wm8750_spi_driver);
978 if (ret != 0)
979 printk(KERN_ERR "can't add spi driver");
980 }
981#endif
abadfc92 982
3051e41a
JD		 983 if (ret != 0) {
984 kfree(codec->private_data);
985 kfree(codec);
986 }
abadfc92
RP		 987 return ret;
988}
989
4422b606
LG		 990/*
991 * This function forces any delayed work to be queued and run.
992 */
993static int run_delayed_work(struct delayed_work *dwork)
994{
995 int ret;
996
997 /* cancel any work waiting to be queued. */
998 ret = cancel_delayed_work(dwork);
999
1000 /* if there was any work waiting then we run it now and
1001 * wait for it's completion */
1002 if (ret) {
1003 schedule_delayed_work(dwork, 0);
1004 flush_scheduled_work();
1005 }
1006 return ret;
1007}
1008
abadfc92
RP		 1009/* power down chip */
1010static int wm8750_remove(struct platform_device *pdev)
1011{
1012 struct snd_soc_device *socdev = platform_get_drvdata(pdev);
6627a653 1013 struct snd_soc_codec *codec = socdev->card->codec;
abadfc92
RP		 1014
1015 if (codec->control_data)
0be9898a 1016 wm8750_set_bias_level(codec, SND_SOC_BIAS_OFF);
4422b606 1017 run_delayed_work(&codec->delayed_work);
abadfc92
RP		 1018 snd_soc_free_pcms(socdev);
1019 snd_soc_dapm_free(socdev);
42f3030f 1020#if defined(CONFIG_I2C) || defined(CONFIG_I2C_MODULE)
ee1d0099 1021 i2c_unregister_device(codec->control_data);
abadfc92 1022 i2c_del_driver(&wm8750_i2c_driver);
2f3dfaf5
MB		 1023#endif
1024#if defined(CONFIG_SPI_MASTER)
1025 spi_unregister_driver(&wm8750_spi_driver);
abadfc92 1026#endif
4422b606 1027 kfree(codec->private_data);
abadfc92
RP		 1028 kfree(codec);
1029
1030 return 0;
1031}
1032
1033struct snd_soc_codec_device soc_codec_dev_wm8750 = {
1034 .probe = wm8750_probe,
1035 .remove = wm8750_remove,
1036 .suspend = wm8750_suspend,
1037 .resume = wm8750_resume,
1038};
abadfc92
RP		 1039EXPORT_SYMBOL_GPL(soc_codec_dev_wm8750);
1040
c9b3a40f 1041static int __init wm8750_modinit(void)
64089b84
MB		 1042{
1043 return snd_soc_register_dai(&wm8750_dai);
1044}
1045module_init(wm8750_modinit);
1046
1047static void __exit wm8750_exit(void)
1048{
1049 snd_soc_unregister_dai(&wm8750_dai);
1050}
1051module_exit(wm8750_exit);
1052
abadfc92
RP		 1053MODULE_DESCRIPTION("ASoC WM8750 driver");
1054MODULE_AUTHOR("Liam Girdwood");
1055MODULE_LICENSE("GPL");
Linux kernel - Deliverables
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