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[ALSA] snd-ak4114: Fix two array overflows
[deliverable/linux.git] / sound / soc / codecs / wm8750.c
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abadfc92
RP		 1/*
2 * wm8750.c -- WM8750 ALSA SoC audio driver
3 *
4 * Copyright 2005 Openedhand Ltd.
5 *
6 * Author: Richard Purdie <richard@openedhand.com>
7 *
8 * Based on WM8753.c
9 *
10 * This program is free software; you can redistribute it and/or modify
11 * it under the terms of the GNU General Public License version 2 as
12 * published by the Free Software Foundation.
13 */
14
15#include <linux/module.h>
16#include <linux/moduleparam.h>
17#include <linux/init.h>
18#include <linux/delay.h>
19#include <linux/pm.h>
20#include <linux/i2c.h>
21#include <linux/platform_device.h>
22#include <sound/driver.h>
23#include <sound/core.h>
24#include <sound/pcm.h>
25#include <sound/pcm_params.h>
26#include <sound/soc.h>
27#include <sound/soc-dapm.h>
28#include <sound/initval.h>
29
30#include "wm8750.h"
31
32#define AUDIO_NAME "WM8750"
4422b606 33#define WM8750_VERSION "0.12"
abadfc92
RP		 34
35/*
36 * Debug
37 */
38
39#define WM8750_DEBUG 0
40
41#ifdef WM8750_DEBUG
42#define dbg(format, arg...) \
43 printk(KERN_DEBUG AUDIO_NAME ": " format "\n" , ## arg)
44#else
45#define dbg(format, arg...) do {} while (0)
46#endif
47#define err(format, arg...) \
48 printk(KERN_ERR AUDIO_NAME ": " format "\n" , ## arg)
49#define info(format, arg...) \
50 printk(KERN_INFO AUDIO_NAME ": " format "\n" , ## arg)
51#define warn(format, arg...) \
52 printk(KERN_WARNING AUDIO_NAME ": " format "\n" , ## arg)
53
4422b606
LG		 54/* codec private data */
55struct wm8750_priv {
56 unsigned int sysclk;
57};
58
abadfc92
RP		 59/*
60 * wm8750 register cache
61 * We can't read the WM8750 register space when we
62 * are using 2 wire for device control, so we cache them instead.
63 */
64static const u16 wm8750_reg[] = {
65 0x0097, 0x0097, 0x0079, 0x0079, /* 0 */
66 0x0000, 0x0008, 0x0000, 0x000a, /* 4 */
67 0x0000, 0x0000, 0x00ff, 0x00ff, /* 8 */
68 0x000f, 0x000f, 0x0000, 0x0000, /* 12 */
69 0x0000, 0x007b, 0x0000, 0x0032, /* 16 */
70 0x0000, 0x00c3, 0x00c3, 0x00c0, /* 20 */
71 0x0000, 0x0000, 0x0000, 0x0000, /* 24 */
72 0x0000, 0x0000, 0x0000, 0x0000, /* 28 */
73 0x0000, 0x0000, 0x0050, 0x0050, /* 32 */
74 0x0050, 0x0050, 0x0050, 0x0050, /* 36 */
75 0x0079, 0x0079, 0x0079, /* 40 */
76};
77
abadfc92
RP		 78/*
79 * read wm8750 register cache
80 */
81static inline unsigned int wm8750_read_reg_cache(struct snd_soc_codec *codec,
82 unsigned int reg)
83{
84 u16 *cache = codec->reg_cache;
85 if (reg > WM8750_CACHE_REGNUM)
86 return -1;
87 return cache[reg];
88}
89
90/*
91 * write wm8750 register cache
92 */
93static inline void wm8750_write_reg_cache(struct snd_soc_codec *codec,
94 unsigned int reg, unsigned int value)
95{
96 u16 *cache = codec->reg_cache;
97 if (reg > WM8750_CACHE_REGNUM)
98 return;
99 cache[reg] = value;
100}
101
102static int wm8750_write(struct snd_soc_codec *codec, unsigned int reg,
103 unsigned int value)
104{
105 u8 data[2];
106
107 /* data is
108 * D15..D9 WM8753 register offset
109 * D8...D0 register data
110 */
111 data[0] = (reg << 1) | ((value >> 8) & 0x0001);
112 data[1] = value & 0x00ff;
113
114 wm8750_write_reg_cache (codec, reg, value);
115 if (codec->hw_write(codec->control_data, data, 2) == 2)
116 return 0;
117 else
118 return -EIO;
119}
120
121#define wm8750_reset(c) wm8750_write(c, WM8750_RESET, 0)
122
123/*
124 * WM8750 Controls
125 */
126static const char *wm8750_bass[] = {"Linear Control", "Adaptive Boost"};
127static const char *wm8750_bass_filter[] = { "130Hz @ 48kHz", "200Hz @ 48kHz" };
128static const char *wm8750_treble[] = {"8kHz", "4kHz"};
129static const char *wm8750_3d_lc[] = {"200Hz", "500Hz"};
130static const char *wm8750_3d_uc[] = {"2.2kHz", "1.5kHz"};
131static const char *wm8750_3d_func[] = {"Capture", "Playback"};
132static const char *wm8750_alc_func[] = {"Off", "Right", "Left", "Stereo"};
133static const char *wm8750_ng_type[] = {"Constant PGA Gain",
134 "Mute ADC Output"};
135static const char *wm8750_line_mux[] = {"Line 1", "Line 2", "Line 3", "PGA",
136 "Differential"};
137static const char *wm8750_pga_sel[] = {"Line 1", "Line 2", "Line 3",
138 "Differential"};
139static const char *wm8750_out3[] = {"VREF", "ROUT1 + Vol", "MonoOut",
140 "ROUT1"};
141static const char *wm8750_diff_sel[] = {"Line 1", "Line 2"};
142static const char *wm8750_adcpol[] = {"Normal", "L Invert", "R Invert",
143 "L + R Invert"};
144static const char *wm8750_deemph[] = {"None", "32Khz", "44.1Khz", "48Khz"};
145static const char *wm8750_mono_mux[] = {"Stereo", "Mono (Left)",
146 "Mono (Right)", "Digital Mono"};
147
148static const struct soc_enum wm8750_enum[] = {
149SOC_ENUM_SINGLE(WM8750_BASS, 7, 2, wm8750_bass),
150SOC_ENUM_SINGLE(WM8750_BASS, 6, 2, wm8750_bass_filter),
151SOC_ENUM_SINGLE(WM8750_TREBLE, 6, 2, wm8750_treble),
152SOC_ENUM_SINGLE(WM8750_3D, 5, 2, wm8750_3d_lc),
153SOC_ENUM_SINGLE(WM8750_3D, 6, 2, wm8750_3d_uc),
154SOC_ENUM_SINGLE(WM8750_3D, 7, 2, wm8750_3d_func),
155SOC_ENUM_SINGLE(WM8750_ALC1, 7, 4, wm8750_alc_func),
156SOC_ENUM_SINGLE(WM8750_NGATE, 1, 2, wm8750_ng_type),
157SOC_ENUM_SINGLE(WM8750_LOUTM1, 0, 5, wm8750_line_mux),
158SOC_ENUM_SINGLE(WM8750_ROUTM1, 0, 5, wm8750_line_mux),
159SOC_ENUM_SINGLE(WM8750_LADCIN, 6, 4, wm8750_pga_sel), /* 10 */
160SOC_ENUM_SINGLE(WM8750_RADCIN, 6, 4, wm8750_pga_sel),
161SOC_ENUM_SINGLE(WM8750_ADCTL2, 7, 4, wm8750_out3),
162SOC_ENUM_SINGLE(WM8750_ADCIN, 8, 2, wm8750_diff_sel),
163SOC_ENUM_SINGLE(WM8750_ADCDAC, 5, 4, wm8750_adcpol),
164SOC_ENUM_SINGLE(WM8750_ADCDAC, 1, 4, wm8750_deemph),
165SOC_ENUM_SINGLE(WM8750_ADCIN, 6, 4, wm8750_mono_mux), /* 16 */
166
167};
168
169static const struct snd_kcontrol_new wm8750_snd_controls[] = {
170
171SOC_DOUBLE_R("Capture Volume", WM8750_LINVOL, WM8750_RINVOL, 0, 63, 0),
172SOC_DOUBLE_R("Capture ZC Switch", WM8750_LINVOL, WM8750_RINVOL, 6, 1, 0),
173SOC_DOUBLE_R("Capture Switch", WM8750_LINVOL, WM8750_RINVOL, 7, 1, 1),
174
bd903b6e 175SOC_DOUBLE_R("Headphone Playback ZC Switch", WM8750_LOUT1V,
abadfc92 176 WM8750_ROUT1V, 7, 1, 0),
bd903b6e 177SOC_DOUBLE_R("Speaker Playback ZC Switch", WM8750_LOUT2V,
abadfc92
RP		 178 WM8750_ROUT2V, 7, 1, 0),
179
180SOC_ENUM("Playback De-emphasis", wm8750_enum[15]),
181
182SOC_ENUM("Capture Polarity", wm8750_enum[14]),
183SOC_SINGLE("Playback 6dB Attenuate", WM8750_ADCDAC, 7, 1, 0),
184SOC_SINGLE("Capture 6dB Attenuate", WM8750_ADCDAC, 8, 1, 0),
185
186SOC_DOUBLE_R("PCM Volume", WM8750_LDAC, WM8750_RDAC, 0, 255, 0),
187
188SOC_ENUM("Bass Boost", wm8750_enum[0]),
189SOC_ENUM("Bass Filter", wm8750_enum[1]),
190SOC_SINGLE("Bass Volume", WM8750_BASS, 0, 15, 1),
191
192SOC_SINGLE("Treble Volume", WM8750_TREBLE, 0, 15, 0),
193SOC_ENUM("Treble Cut-off", wm8750_enum[2]),
194
195SOC_SINGLE("3D Switch", WM8750_3D, 0, 1, 0),
196SOC_SINGLE("3D Volume", WM8750_3D, 1, 15, 0),
197SOC_ENUM("3D Lower Cut-off", wm8750_enum[3]),
198SOC_ENUM("3D Upper Cut-off", wm8750_enum[4]),
199SOC_ENUM("3D Mode", wm8750_enum[5]),
200
201SOC_SINGLE("ALC Capture Target Volume", WM8750_ALC1, 0, 7, 0),
202SOC_SINGLE("ALC Capture Max Volume", WM8750_ALC1, 4, 7, 0),
203SOC_ENUM("ALC Capture Function", wm8750_enum[6]),
204SOC_SINGLE("ALC Capture ZC Switch", WM8750_ALC2, 7, 1, 0),
205SOC_SINGLE("ALC Capture Hold Time", WM8750_ALC2, 0, 15, 0),
206SOC_SINGLE("ALC Capture Decay Time", WM8750_ALC3, 4, 15, 0),
207SOC_SINGLE("ALC Capture Attack Time", WM8750_ALC3, 0, 15, 0),
208SOC_SINGLE("ALC Capture NG Threshold", WM8750_NGATE, 3, 31, 0),
209SOC_ENUM("ALC Capture NG Type", wm8750_enum[4]),
210SOC_SINGLE("ALC Capture NG Switch", WM8750_NGATE, 0, 1, 0),
211
212SOC_SINGLE("Left ADC Capture Volume", WM8750_LADC, 0, 255, 0),
213SOC_SINGLE("Right ADC Capture Volume", WM8750_RADC, 0, 255, 0),
214
215SOC_SINGLE("ZC Timeout Switch", WM8750_ADCTL1, 0, 1, 0),
216SOC_SINGLE("Playback Invert Switch", WM8750_ADCTL1, 1, 1, 0),
217
bd903b6e 218SOC_SINGLE("Right Speaker Playback Invert Switch", WM8750_ADCTL2, 4, 1, 0),
abadfc92
RP		 219
220/* Unimplemented */
221/* ADCDAC Bit 0 - ADCHPD */
222/* ADCDAC Bit 4 - HPOR */
223/* ADCTL1 Bit 2,3 - DATSEL */
224/* ADCTL1 Bit 4,5 - DMONOMIX */
225/* ADCTL1 Bit 6,7 - VSEL */
226/* ADCTL2 Bit 2 - LRCM */
227/* ADCTL2 Bit 3 - TRI */
228/* ADCTL3 Bit 5 - HPFLREN */
229/* ADCTL3 Bit 6 - VROI */
230/* ADCTL3 Bit 7,8 - ADCLRM */
231/* ADCIN Bit 4 - LDCM */
232/* ADCIN Bit 5 - RDCM */
233
234SOC_DOUBLE_R("Mic Boost", WM8750_LADCIN, WM8750_RADCIN, 4, 3, 0),
235
236SOC_DOUBLE_R("Bypass Left Playback Volume", WM8750_LOUTM1,
237 WM8750_LOUTM2, 4, 7, 1),
238SOC_DOUBLE_R("Bypass Right Playback Volume", WM8750_ROUTM1,
239 WM8750_ROUTM2, 4, 7, 1),
240SOC_DOUBLE_R("Bypass Mono Playback Volume", WM8750_MOUTM1,
241 WM8750_MOUTM2, 4, 7, 1),
242
243SOC_SINGLE("Mono Playback ZC Switch", WM8750_MOUTV, 7, 1, 0),
244
bd903b6e
LG		 245SOC_DOUBLE_R("Headphone Playback Volume", WM8750_LOUT1V, WM8750_ROUT1V,
246 0, 127, 0),
247SOC_DOUBLE_R("Speaker Playback Volume", WM8750_LOUT2V, WM8750_ROUT2V,
248 0, 127, 0),
abadfc92
RP		 249
250SOC_SINGLE("Mono Playback Volume", WM8750_MOUTV, 0, 127, 0),
251
252};
253
254/* add non dapm controls */
255static int wm8750_add_controls(struct snd_soc_codec *codec)
256{
257 int err, i;
258
259 for (i = 0; i < ARRAY_SIZE(wm8750_snd_controls); i++) {
260 err = snd_ctl_add(codec->card,
261 snd_soc_cnew(&wm8750_snd_controls[i],codec, NULL));
262 if (err < 0)
263 return err;
264 }
265 return 0;
266}
267
268/*
269 * DAPM Controls
270 */
271
272/* Left Mixer */
273static const struct snd_kcontrol_new wm8750_left_mixer_controls[] = {
274SOC_DAPM_SINGLE("Playback Switch", WM8750_LOUTM1, 8, 1, 0),
275SOC_DAPM_SINGLE("Left Bypass Switch", WM8750_LOUTM1, 7, 1, 0),
276SOC_DAPM_SINGLE("Right Playback Switch", WM8750_LOUTM2, 8, 1, 0),
277SOC_DAPM_SINGLE("Right Bypass Switch", WM8750_LOUTM2, 7, 1, 0),
278};
279
280/* Right Mixer */
281static const struct snd_kcontrol_new wm8750_right_mixer_controls[] = {
282SOC_DAPM_SINGLE("Left Playback Switch", WM8750_ROUTM1, 8, 1, 0),
283SOC_DAPM_SINGLE("Left Bypass Switch", WM8750_ROUTM1, 7, 1, 0),
284SOC_DAPM_SINGLE("Playback Switch", WM8750_ROUTM2, 8, 1, 0),
285SOC_DAPM_SINGLE("Right Bypass Switch", WM8750_ROUTM2, 7, 1, 0),
286};
287
288/* Mono Mixer */
289static const struct snd_kcontrol_new wm8750_mono_mixer_controls[] = {
290SOC_DAPM_SINGLE("Left Playback Switch", WM8750_MOUTM1, 8, 1, 0),
291SOC_DAPM_SINGLE("Left Bypass Switch", WM8750_MOUTM1, 7, 1, 0),
292SOC_DAPM_SINGLE("Right Playback Switch", WM8750_MOUTM2, 8, 1, 0),
293SOC_DAPM_SINGLE("Right Bypass Switch", WM8750_MOUTM2, 7, 1, 0),
294};
295
296/* Left Line Mux */
297static const struct snd_kcontrol_new wm8750_left_line_controls =
298SOC_DAPM_ENUM("Route", wm8750_enum[8]);
299
300/* Right Line Mux */
301static const struct snd_kcontrol_new wm8750_right_line_controls =
302SOC_DAPM_ENUM("Route", wm8750_enum[9]);
303
304/* Left PGA Mux */
305static const struct snd_kcontrol_new wm8750_left_pga_controls =
306SOC_DAPM_ENUM("Route", wm8750_enum[10]);
307
308/* Right PGA Mux */
309static const struct snd_kcontrol_new wm8750_right_pga_controls =
310SOC_DAPM_ENUM("Route", wm8750_enum[11]);
311
312/* Out 3 Mux */
313static const struct snd_kcontrol_new wm8750_out3_controls =
314SOC_DAPM_ENUM("Route", wm8750_enum[12]);
315
316/* Differential Mux */
317static const struct snd_kcontrol_new wm8750_diffmux_controls =
318SOC_DAPM_ENUM("Route", wm8750_enum[13]);
319
320/* Mono ADC Mux */
321static const struct snd_kcontrol_new wm8750_monomux_controls =
322SOC_DAPM_ENUM("Route", wm8750_enum[16]);
323
324static const struct snd_soc_dapm_widget wm8750_dapm_widgets[] = {
325 SND_SOC_DAPM_MIXER("Left Mixer", SND_SOC_NOPM, 0, 0,
326 &wm8750_left_mixer_controls[0],
327 ARRAY_SIZE(wm8750_left_mixer_controls)),
328 SND_SOC_DAPM_MIXER("Right Mixer", SND_SOC_NOPM, 0, 0,
329 &wm8750_right_mixer_controls[0],
330 ARRAY_SIZE(wm8750_right_mixer_controls)),
331 SND_SOC_DAPM_MIXER("Mono Mixer", WM8750_PWR2, 2, 0,
332 &wm8750_mono_mixer_controls[0],
333 ARRAY_SIZE(wm8750_mono_mixer_controls)),
334
335 SND_SOC_DAPM_PGA("Right Out 2", WM8750_PWR2, 3, 0, NULL, 0),
336 SND_SOC_DAPM_PGA("Left Out 2", WM8750_PWR2, 4, 0, NULL, 0),
337 SND_SOC_DAPM_PGA("Right Out 1", WM8750_PWR2, 5, 0, NULL, 0),
338 SND_SOC_DAPM_PGA("Left Out 1", WM8750_PWR2, 6, 0, NULL, 0),
339 SND_SOC_DAPM_DAC("Right DAC", "Right Playback", WM8750_PWR2, 7, 0),
340 SND_SOC_DAPM_DAC("Left DAC", "Left Playback", WM8750_PWR2, 8, 0),
341
342 SND_SOC_DAPM_MICBIAS("Mic Bias", WM8750_PWR1, 1, 0),
343 SND_SOC_DAPM_ADC("Right ADC", "Right Capture", WM8750_PWR1, 2, 0),
344 SND_SOC_DAPM_ADC("Left ADC", "Left Capture", WM8750_PWR1, 3, 0),
345
346 SND_SOC_DAPM_MUX("Left PGA Mux", WM8750_PWR1, 5, 0,
347 &wm8750_left_pga_controls),
348 SND_SOC_DAPM_MUX("Right PGA Mux", WM8750_PWR1, 4, 0,
349 &wm8750_right_pga_controls),
350 SND_SOC_DAPM_MUX("Left Line Mux", SND_SOC_NOPM, 0, 0,
351 &wm8750_left_line_controls),
352 SND_SOC_DAPM_MUX("Right Line Mux", SND_SOC_NOPM, 0, 0,
353 &wm8750_right_line_controls),
354
355 SND_SOC_DAPM_MUX("Out3 Mux", SND_SOC_NOPM, 0, 0, &wm8750_out3_controls),
356 SND_SOC_DAPM_PGA("Out 3", WM8750_PWR2, 1, 0, NULL, 0),
357 SND_SOC_DAPM_PGA("Mono Out 1", WM8750_PWR2, 2, 0, NULL, 0),
358
359 SND_SOC_DAPM_MUX("Differential Mux", SND_SOC_NOPM, 0, 0,
360 &wm8750_diffmux_controls),
361 SND_SOC_DAPM_MUX("Left ADC Mux", SND_SOC_NOPM, 0, 0,
362 &wm8750_monomux_controls),
363 SND_SOC_DAPM_MUX("Right ADC Mux", SND_SOC_NOPM, 0, 0,
364 &wm8750_monomux_controls),
365
366 SND_SOC_DAPM_OUTPUT("LOUT1"),
367 SND_SOC_DAPM_OUTPUT("ROUT1"),
368 SND_SOC_DAPM_OUTPUT("LOUT2"),
369 SND_SOC_DAPM_OUTPUT("ROUT2"),
370 SND_SOC_DAPM_OUTPUT("MONO"),
371 SND_SOC_DAPM_OUTPUT("OUT3"),
372
373 SND_SOC_DAPM_INPUT("LINPUT1"),
374 SND_SOC_DAPM_INPUT("LINPUT2"),
375 SND_SOC_DAPM_INPUT("LINPUT3"),
376 SND_SOC_DAPM_INPUT("RINPUT1"),
377 SND_SOC_DAPM_INPUT("RINPUT2"),
378 SND_SOC_DAPM_INPUT("RINPUT3"),
379};
380
381static const char *audio_map[][3] = {
382 /* left mixer */
383 {"Left Mixer", "Playback Switch", "Left DAC"},
384 {"Left Mixer", "Left Bypass Switch", "Left Line Mux"},
385 {"Left Mixer", "Right Playback Switch", "Right DAC"},
386 {"Left Mixer", "Right Bypass Switch", "Right Line Mux"},
387
388 /* right mixer */
389 {"Right Mixer", "Left Playback Switch", "Left DAC"},
390 {"Right Mixer", "Left Bypass Switch", "Left Line Mux"},
391 {"Right Mixer", "Playback Switch", "Right DAC"},
392 {"Right Mixer", "Right Bypass Switch", "Right Line Mux"},
393
394 /* left out 1 */
395 {"Left Out 1", NULL, "Left Mixer"},
396 {"LOUT1", NULL, "Left Out 1"},
397
398 /* left out 2 */
399 {"Left Out 2", NULL, "Left Mixer"},
400 {"LOUT2", NULL, "Left Out 2"},
401
402 /* right out 1 */
403 {"Right Out 1", NULL, "Right Mixer"},
404 {"ROUT1", NULL, "Right Out 1"},
405
406 /* right out 2 */
407 {"Right Out 2", NULL, "Right Mixer"},
408 {"ROUT2", NULL, "Right Out 2"},
409
410 /* mono mixer */
411 {"Mono Mixer", "Left Playback Switch", "Left DAC"},
412 {"Mono Mixer", "Left Bypass Switch", "Left Line Mux"},
413 {"Mono Mixer", "Right Playback Switch", "Right DAC"},
414 {"Mono Mixer", "Right Bypass Switch", "Right Line Mux"},
415
416 /* mono out */
417 {"Mono Out 1", NULL, "Mono Mixer"},
418 {"MONO1", NULL, "Mono Out 1"},
419
420 /* out 3 */
421 {"Out3 Mux", "VREF", "VREF"},
422 {"Out3 Mux", "ROUT1 + Vol", "ROUT1"},
423 {"Out3 Mux", "ROUT1", "Right Mixer"},
424 {"Out3 Mux", "MonoOut", "MONO1"},
425 {"Out 3", NULL, "Out3 Mux"},
426 {"OUT3", NULL, "Out 3"},
427
428 /* Left Line Mux */
429 {"Left Line Mux", "Line 1", "LINPUT1"},
430 {"Left Line Mux", "Line 2", "LINPUT2"},
431 {"Left Line Mux", "Line 3", "LINPUT3"},
432 {"Left Line Mux", "PGA", "Left PGA Mux"},
433 {"Left Line Mux", "Differential", "Differential Mux"},
434
435 /* Right Line Mux */
436 {"Right Line Mux", "Line 1", "RINPUT1"},
437 {"Right Line Mux", "Line 2", "RINPUT2"},
438 {"Right Line Mux", "Line 3", "RINPUT3"},
439 {"Right Line Mux", "PGA", "Right PGA Mux"},
440 {"Right Line Mux", "Differential", "Differential Mux"},
441
442 /* Left PGA Mux */
443 {"Left PGA Mux", "Line 1", "LINPUT1"},
444 {"Left PGA Mux", "Line 2", "LINPUT2"},
445 {"Left PGA Mux", "Line 3", "LINPUT3"},
446 {"Left PGA Mux", "Differential", "Differential Mux"},
447
448 /* Right PGA Mux */
449 {"Right PGA Mux", "Line 1", "RINPUT1"},
450 {"Right PGA Mux", "Line 2", "RINPUT2"},
451 {"Right PGA Mux", "Line 3", "RINPUT3"},
452 {"Right PGA Mux", "Differential", "Differential Mux"},
453
454 /* Differential Mux */
455 {"Differential Mux", "Line 1", "LINPUT1"},
456 {"Differential Mux", "Line 1", "RINPUT1"},
457 {"Differential Mux", "Line 2", "LINPUT2"},
458 {"Differential Mux", "Line 2", "RINPUT2"},
459
460 /* Left ADC Mux */
461 {"Left ADC Mux", "Stereo", "Left PGA Mux"},
462 {"Left ADC Mux", "Mono (Left)", "Left PGA Mux"},
463 {"Left ADC Mux", "Digital Mono", "Left PGA Mux"},
464
465 /* Right ADC Mux */
466 {"Right ADC Mux", "Stereo", "Right PGA Mux"},
467 {"Right ADC Mux", "Mono (Right)", "Right PGA Mux"},
468 {"Right ADC Mux", "Digital Mono", "Right PGA Mux"},
469
470 /* ADC */
471 {"Left ADC", NULL, "Left ADC Mux"},
472 {"Right ADC", NULL, "Right ADC Mux"},
473
474 /* terminator */
475 {NULL, NULL, NULL},
476};
477
478static int wm8750_add_widgets(struct snd_soc_codec *codec)
479{
480 int i;
481
482 for(i = 0; i < ARRAY_SIZE(wm8750_dapm_widgets); i++) {
483 snd_soc_dapm_new_control(codec, &wm8750_dapm_widgets[i]);
484 }
485
486 /* set up audio path audio_mapnects */
487 for(i = 0; audio_map[i][0] != NULL; i++) {
488 snd_soc_dapm_connect_input(codec, audio_map[i][0],
489 audio_map[i][1], audio_map[i][2]);
490 }
491
492 snd_soc_dapm_new_widgets(codec);
493 return 0;
494}
495
496struct _coeff_div {
497 u32 mclk;
498 u32 rate;
499 u16 fs;
500 u8 sr:5;
501 u8 usb:1;
502};
503
504/* codec hifi mclk clock divider coefficients */
505static const struct _coeff_div coeff_div[] = {
506 /* 8k */
507 {12288000, 8000, 1536, 0x6, 0x0},
508 {11289600, 8000, 1408, 0x16, 0x0},
509 {18432000, 8000, 2304, 0x7, 0x0},
510 {16934400, 8000, 2112, 0x17, 0x0},
511 {12000000, 8000, 1500, 0x6, 0x1},
512
513 /* 11.025k */
514 {11289600, 11025, 1024, 0x18, 0x0},
515 {16934400, 11025, 1536, 0x19, 0x0},
516 {12000000, 11025, 1088, 0x19, 0x1},
517
518 /* 16k */
519 {12288000, 16000, 768, 0xa, 0x0},
520 {18432000, 16000, 1152, 0xb, 0x0},
521 {12000000, 16000, 750, 0xa, 0x1},
522
523 /* 22.05k */
524 {11289600, 22050, 512, 0x1a, 0x0},
525 {16934400, 22050, 768, 0x1b, 0x0},
526 {12000000, 22050, 544, 0x1b, 0x1},
527
528 /* 32k */
529 {12288000, 32000, 384, 0xc, 0x0},
530 {18432000, 32000, 576, 0xd, 0x0},
531 {12000000, 32000, 375, 0xa, 0x1},
532
533 /* 44.1k */
534 {11289600, 44100, 256, 0x10, 0x0},
535 {16934400, 44100, 384, 0x11, 0x0},
536 {12000000, 44100, 272, 0x11, 0x1},
537
538 /* 48k */
539 {12288000, 48000, 256, 0x0, 0x0},
540 {18432000, 48000, 384, 0x1, 0x0},
541 {12000000, 48000, 250, 0x0, 0x1},
542
543 /* 88.2k */
544 {11289600, 88200, 128, 0x1e, 0x0},
545 {16934400, 88200, 192, 0x1f, 0x0},
546 {12000000, 88200, 136, 0x1f, 0x1},
547
548 /* 96k */
549 {12288000, 96000, 128, 0xe, 0x0},
550 {18432000, 96000, 192, 0xf, 0x0},
551 {12000000, 96000, 125, 0xe, 0x1},
552};
553
554static inline int get_coeff(int mclk, int rate)
555{
556 int i;
557
558 for (i = 0; i < ARRAY_SIZE(coeff_div); i++) {
559 if (coeff_div[i].rate == rate && coeff_div[i].mclk == mclk)
560 return i;
561 }
a71a468a
LG		 562
563 printk(KERN_ERR "wm8750: could not get coeff for mclk %d @ rate %d\n",
564 mclk, rate);
abadfc92
RP		 565 return -EINVAL;
566}
567
4422b606
LG		 568static int wm8750_set_dai_sysclk(struct snd_soc_codec_dai *codec_dai,
569 int clk_id, unsigned int freq, int dir)
abadfc92 570{
4422b606
LG		 571 struct snd_soc_codec *codec = codec_dai->codec;
572 struct wm8750_priv *wm8750 = codec->private_data;
573
574 switch (freq) {
575 case 11289600:
576 case 12000000:
577 case 12288000:
578 case 16934400:
579 case 18432000:
580 wm8750->sysclk = freq;
581 return 0;
582 }
583 return -EINVAL;
abadfc92
RP		 584}
585
4422b606
LG		 586static int wm8750_set_dai_fmt(struct snd_soc_codec_dai *codec_dai,
587 unsigned int fmt)
abadfc92 588{
4422b606
LG		 589 struct snd_soc_codec *codec = codec_dai->codec;
590 u16 iface = 0;
abadfc92
RP		 591
592 /* set master/slave audio interface */
4422b606 593 switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) {
abadfc92
RP		 594 case SND_SOC_DAIFMT_CBM_CFM:
595 iface = 0x0040;
596 break;
597 case SND_SOC_DAIFMT_CBS_CFS:
598 break;
4422b606
LG		 599 default:
600 return -EINVAL;
abadfc92
RP		 601 }
602
603 /* interface format */
4422b606 604 switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
abadfc92
RP		 605 case SND_SOC_DAIFMT_I2S:
606 iface |= 0x0002;
607 break;
608 case SND_SOC_DAIFMT_RIGHT_J:
609 break;
610 case SND_SOC_DAIFMT_LEFT_J:
611 iface |= 0x0001;
612 break;
613 case SND_SOC_DAIFMT_DSP_A:
614 iface |= 0x0003;
615 break;
616 case SND_SOC_DAIFMT_DSP_B:
617 iface |= 0x0013;
618 break;
4422b606
LG		 619 default:
620 return -EINVAL;
abadfc92
RP		 621 }
622
623 /* clock inversion */
4422b606 624 switch (fmt & SND_SOC_DAIFMT_INV_MASK) {
abadfc92
RP		 625 case SND_SOC_DAIFMT_NB_NF:
626 break;
627 case SND_SOC_DAIFMT_IB_IF:
628 iface |= 0x0090;
629 break;
630 case SND_SOC_DAIFMT_IB_NF:
631 iface |= 0x0080;
632 break;
633 case SND_SOC_DAIFMT_NB_IF:
634 iface |= 0x0010;
635 break;
4422b606
LG		 636 default:
637 return -EINVAL;
abadfc92
RP		 638 }
639
4422b606
LG		 640 wm8750_write(codec, WM8750_IFACE, iface);
641 return 0;
642}
643
644static int wm8750_pcm_hw_params(struct snd_pcm_substream *substream,
645 struct snd_pcm_hw_params *params)
646{
647 struct snd_soc_pcm_runtime *rtd = substream->private_data;
648 struct snd_soc_device *socdev = rtd->socdev;
649 struct snd_soc_codec *codec = socdev->codec;
650 struct wm8750_priv *wm8750 = codec->private_data;
651 u16 iface = wm8750_read_reg_cache(codec, WM8750_IFACE) & 0x1f3;
652 u16 srate = wm8750_read_reg_cache(codec, WM8750_SRATE) & 0x1c0;
653 int coeff = get_coeff(wm8750->sysclk, params_rate(params));
654
655 /* bit size */
656 switch (params_format(params)) {
657 case SNDRV_PCM_FORMAT_S16_LE:
abadfc92 658 break;
4422b606
LG		 659 case SNDRV_PCM_FORMAT_S20_3LE:
660 iface |= 0x0004;
abadfc92 661 break;
4422b606
LG		 662 case SNDRV_PCM_FORMAT_S24_LE:
663 iface |= 0x0008;
abadfc92 664 break;
4422b606
LG		 665 case SNDRV_PCM_FORMAT_S32_LE:
666 iface |= 0x000c;
abadfc92
RP		 667 break;
668 }
669
670 /* set iface & srate */
671 wm8750_write(codec, WM8750_IFACE, iface);
4422b606
LG		 672 if (coeff >= 0)
673 wm8750_write(codec, WM8750_SRATE, srate |
674 (coeff_div[coeff].sr << 1) | coeff_div[coeff].usb);
abadfc92
RP		 675
676 return 0;
677}
678
4422b606 679static int wm8750_mute(struct snd_soc_codec_dai *dai, int mute)
abadfc92 680{
4422b606 681 struct snd_soc_codec *codec = dai->codec;
abadfc92 682 u16 mute_reg = wm8750_read_reg_cache(codec, WM8750_ADCDAC) & 0xfff7;
4422b606 683
abadfc92
RP		 684 if (mute)
685 wm8750_write(codec, WM8750_ADCDAC, mute_reg | 0x8);
686 else
687 wm8750_write(codec, WM8750_ADCDAC, mute_reg);
688 return 0;
689}
690
691static int wm8750_dapm_event(struct snd_soc_codec *codec, int event)
692{
693 u16 pwr_reg = wm8750_read_reg_cache(codec, WM8750_PWR1) & 0xfe3e;
694
695 switch (event) {
696 case SNDRV_CTL_POWER_D0: /* full On */
697 /* set vmid to 50k and unmute dac */
698 wm8750_write(codec, WM8750_PWR1, pwr_reg | 0x00c0);
699 break;
700 case SNDRV_CTL_POWER_D1: /* partial On */
701 case SNDRV_CTL_POWER_D2: /* partial On */
702 /* set vmid to 5k for quick power up */
703 wm8750_write(codec, WM8750_PWR1, pwr_reg | 0x01c1);
704 break;
705 case SNDRV_CTL_POWER_D3hot: /* Off, with power */
706 /* mute dac and set vmid to 500k, enable VREF */
707 wm8750_write(codec, WM8750_PWR1, pwr_reg | 0x0141);
708 break;
709 case SNDRV_CTL_POWER_D3cold: /* Off, without power */
710 wm8750_write(codec, WM8750_PWR1, 0x0001);
711 break;
712 }
713 codec->dapm_state = event;
714 return 0;
715}
716
4422b606
LG		 717#define WM8750_RATES (SNDRV_PCM_RATE_8000 | SNDRV_PCM_RATE_11025 |\
718 SNDRV_PCM_RATE_16000 | SNDRV_PCM_RATE_22050 | SNDRV_PCM_RATE_44100 | \
719 SNDRV_PCM_RATE_48000 | SNDRV_PCM_RATE_88200 | SNDRV_PCM_RATE_96000)
720
721#define WM8750_FORMATS (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S20_3LE |\
722 SNDRV_PCM_FMTBIT_S24_LE)
723
abadfc92
RP		 724struct snd_soc_codec_dai wm8750_dai = {
725 .name = "WM8750",
726 .playback = {
727 .stream_name = "Playback",
728 .channels_min = 1,
729 .channels_max = 2,
4422b606
LG		 730 .rates = WM8750_RATES,
731 .formats = WM8750_FORMATS,},
abadfc92
RP		 732 .capture = {
733 .stream_name = "Capture",
734 .channels_min = 1,
735 .channels_max = 2,
4422b606
LG		 736 .rates = WM8750_RATES,
737 .formats = WM8750_FORMATS,},
abadfc92 738 .ops = {
4422b606 739 .hw_params = wm8750_pcm_hw_params,
abadfc92 740 },
4422b606
LG		 741 .dai_ops = {
742 .digital_mute = wm8750_mute,
743 .set_fmt = wm8750_set_dai_fmt,
744 .set_sysclk = wm8750_set_dai_sysclk,
abadfc92
RP		 745 },
746};
747EXPORT_SYMBOL_GPL(wm8750_dai);
748
1321b160 749static void wm8750_work(struct work_struct *work)
abadfc92 750{
1321b160
TI		 751 struct snd_soc_codec *codec =
752 container_of(work, struct snd_soc_codec, delayed_work.work);
abadfc92
RP		 753 wm8750_dapm_event(codec, codec->dapm_state);
754}
755
756static int wm8750_suspend(struct platform_device *pdev, pm_message_t state)
757{
758 struct snd_soc_device *socdev = platform_get_drvdata(pdev);
759 struct snd_soc_codec *codec = socdev->codec;
760
761 wm8750_dapm_event(codec, SNDRV_CTL_POWER_D3cold);
762 return 0;
763}
764
765static int wm8750_resume(struct platform_device *pdev)
766{
767 struct snd_soc_device *socdev = platform_get_drvdata(pdev);
768 struct snd_soc_codec *codec = socdev->codec;
769 int i;
770 u8 data[2];
771 u16 *cache = codec->reg_cache;
772
773 /* Sync reg_cache with the hardware */
774 for (i = 0; i < ARRAY_SIZE(wm8750_reg); i++) {
775 if (i == WM8750_RESET)
776 continue;
777 data[0] = (i << 1) | ((cache[i] >> 8) & 0x0001);
778 data[1] = cache[i] & 0x00ff;
779 codec->hw_write(codec->control_data, data, 2);
780 }
781
782 wm8750_dapm_event(codec, SNDRV_CTL_POWER_D3hot);
783
784 /* charge wm8750 caps */
785 if (codec->suspend_dapm_state == SNDRV_CTL_POWER_D0) {
786 wm8750_dapm_event(codec, SNDRV_CTL_POWER_D2);
787 codec->dapm_state = SNDRV_CTL_POWER_D0;
4422b606 788 schedule_delayed_work(&codec->delayed_work, msecs_to_jiffies(1000));
abadfc92
RP		 789 }
790
791 return 0;
792}
793
794/*
795 * initialise the WM8750 driver
796 * register the mixer and dsp interfaces with the kernel
797 */
798static int wm8750_init(struct snd_soc_device *socdev)
799{
800 struct snd_soc_codec *codec = socdev->codec;
801 int reg, ret = 0;
802
803 codec->name = "WM8750";
804 codec->owner = THIS_MODULE;
805 codec->read = wm8750_read_reg_cache;
806 codec->write = wm8750_write;
807 codec->dapm_event = wm8750_dapm_event;
808 codec->dai = &wm8750_dai;
809 codec->num_dai = 1;
810 codec->reg_cache_size = ARRAY_SIZE(wm8750_reg);
811
812 codec->reg_cache =
813 kzalloc(sizeof(u16) * ARRAY_SIZE(wm8750_reg), GFP_KERNEL);
814 if (codec->reg_cache == NULL)
815 return -ENOMEM;
816 memcpy(codec->reg_cache, wm8750_reg,
817 sizeof(u16) * ARRAY_SIZE(wm8750_reg));
818 codec->reg_cache_size = sizeof(u16) * ARRAY_SIZE(wm8750_reg);
819
820 wm8750_reset(codec);
821
822 /* register pcms */
823 ret = snd_soc_new_pcms(socdev, SNDRV_DEFAULT_IDX1, SNDRV_DEFAULT_STR1);
824 if (ret < 0) {
e35115a5
LG		 825 printk(KERN_ERR "wm8750: failed to create pcms\n");
826 goto pcm_err;
abadfc92
RP		 827 }
828
829 /* charge output caps */
830 wm8750_dapm_event(codec, SNDRV_CTL_POWER_D2);
831 codec->dapm_state = SNDRV_CTL_POWER_D3hot;
1321b160 832 schedule_delayed_work(&codec->delayed_work, msecs_to_jiffies(1000));
abadfc92
RP		 833
834 /* set the update bits */
835 reg = wm8750_read_reg_cache(codec, WM8750_LDAC);
836 wm8750_write(codec, WM8750_LDAC, reg | 0x0100);
837 reg = wm8750_read_reg_cache(codec, WM8750_RDAC);
838 wm8750_write(codec, WM8750_RDAC, reg | 0x0100);
839 reg = wm8750_read_reg_cache(codec, WM8750_LOUT1V);
840 wm8750_write(codec, WM8750_LOUT1V, reg | 0x0100);
841 reg = wm8750_read_reg_cache(codec, WM8750_ROUT1V);
842 wm8750_write(codec, WM8750_ROUT1V, reg | 0x0100);
843 reg = wm8750_read_reg_cache(codec, WM8750_LOUT2V);
844 wm8750_write(codec, WM8750_LOUT2V, reg | 0x0100);
845 reg = wm8750_read_reg_cache(codec, WM8750_ROUT2V);
846 wm8750_write(codec, WM8750_ROUT2V, reg | 0x0100);
847 reg = wm8750_read_reg_cache(codec, WM8750_LINVOL);
848 wm8750_write(codec, WM8750_LINVOL, reg | 0x0100);
849 reg = wm8750_read_reg_cache(codec, WM8750_RINVOL);
850 wm8750_write(codec, WM8750_RINVOL, reg | 0x0100);
851
852 wm8750_add_controls(codec);
853 wm8750_add_widgets(codec);
854 ret = snd_soc_register_card(socdev);
855 if (ret < 0) {
e35115a5
LG		 856 printk(KERN_ERR "wm8750: failed to register card\n");
857 goto card_err;
abadfc92 858 }
e35115a5 859 return ret;
abadfc92 860
e35115a5
LG		 861card_err:
862 snd_soc_free_pcms(socdev);
863 snd_soc_dapm_free(socdev);
864pcm_err:
865 kfree(codec->reg_cache);
abadfc92
RP		 866 return ret;
867}
868
869/* If the i2c layer weren't so broken, we could pass this kind of data
870 around */
871static struct snd_soc_device *wm8750_socdev;
872
873#if defined (CONFIG_I2C) || defined (CONFIG_I2C_MODULE)
874
875/*
876 * WM8731 2 wire address is determined by GPIO5
877 * state during powerup.
878 * low = 0x1a
879 * high = 0x1b
880 */
881static unsigned short normal_i2c[] = { 0, I2C_CLIENT_END };
882
883/* Magic definition of all other variables and things */
884I2C_CLIENT_INSMOD;
885
886static struct i2c_driver wm8750_i2c_driver;
887static struct i2c_client client_template;
888
889static int wm8750_codec_probe(struct i2c_adapter *adap, int addr, int kind)
890{
891 struct snd_soc_device *socdev = wm8750_socdev;
892 struct wm8750_setup_data *setup = socdev->codec_data;
893 struct snd_soc_codec *codec = socdev->codec;
894 struct i2c_client *i2c;
895 int ret;
896
897 if (addr != setup->i2c_address)
898 return -ENODEV;
899
900 client_template.adapter = adap;
901 client_template.addr = addr;
902
903 i2c = kzalloc(sizeof(struct i2c_client), GFP_KERNEL);
904 if (i2c == NULL) {
905 kfree(codec);
906 return -ENOMEM;
907 }
908 memcpy(i2c, &client_template, sizeof(struct i2c_client));
909 i2c_set_clientdata(i2c, codec);
910 codec->control_data = i2c;
911
912 ret = i2c_attach_client(i2c);
913 if (ret < 0) {
914 err("failed to attach codec at addr %x\n", addr);
915 goto err;
916 }
917
918 ret = wm8750_init(socdev);
919 if (ret < 0) {
920 err("failed to initialise WM8750\n");
921 goto err;
922 }
923 return ret;
924
925err:
926 kfree(codec);
927 kfree(i2c);
928 return ret;
929}
930
931static int wm8750_i2c_detach(struct i2c_client *client)
932{
933 struct snd_soc_codec *codec = i2c_get_clientdata(client);
934 i2c_detach_client(client);
935 kfree(codec->reg_cache);
936 kfree(client);
937 return 0;
938}
939
940static int wm8750_i2c_attach(struct i2c_adapter *adap)
941{
942 return i2c_probe(adap, &addr_data, wm8750_codec_probe);
943}
944
945/* corgi i2c codec control layer */
946static struct i2c_driver wm8750_i2c_driver = {
947 .driver = {
948 .name = "WM8750 I2C Codec",
949 .owner = THIS_MODULE,
950 },
951 .id = I2C_DRIVERID_WM8750,
952 .attach_adapter = wm8750_i2c_attach,
953 .detach_client = wm8750_i2c_detach,
954 .command = NULL,
955};
956
957static struct i2c_client client_template = {
958 .name = "WM8750",
959 .driver = &wm8750_i2c_driver,
960};
961#endif
962
963static int wm8750_probe(struct platform_device *pdev)
964{
965 struct snd_soc_device *socdev = platform_get_drvdata(pdev);
966 struct wm8750_setup_data *setup = socdev->codec_data;
967 struct snd_soc_codec *codec;
4422b606 968 struct wm8750_priv *wm8750;
abadfc92
RP		 969 int ret = 0;
970
971 info("WM8750 Audio Codec %s", WM8750_VERSION);
972 codec = kzalloc(sizeof(struct snd_soc_codec), GFP_KERNEL);
973 if (codec == NULL)
974 return -ENOMEM;
975
4422b606
LG		 976 wm8750 = kzalloc(sizeof(struct wm8750_priv), GFP_KERNEL);
977 if (wm8750 == NULL) {
978 kfree(codec);
979 return -ENOMEM;
980 }
981
982 codec->private_data = wm8750;
abadfc92
RP		 983 socdev->codec = codec;
984 mutex_init(&codec->mutex);
985 INIT_LIST_HEAD(&codec->dapm_widgets);
986 INIT_LIST_HEAD(&codec->dapm_paths);
987 wm8750_socdev = socdev;
1321b160 988 INIT_DELAYED_WORK(&codec->delayed_work, wm8750_work);
4422b606 989
abadfc92
RP		 990#if defined (CONFIG_I2C) || defined (CONFIG_I2C_MODULE)
991 if (setup->i2c_address) {
992 normal_i2c[0] = setup->i2c_address;
993 codec->hw_write = (hw_write_t)i2c_master_send;
994 ret = i2c_add_driver(&wm8750_i2c_driver);
995 if (ret != 0)
996 printk(KERN_ERR "can't add i2c driver");
997 }
998#else
999 /* Add other interfaces here */
1000#endif
1001
1002 return ret;
1003}
1004
4422b606
LG		 1005/*
1006 * This function forces any delayed work to be queued and run.
1007 */
1008static int run_delayed_work(struct delayed_work *dwork)
1009{
1010 int ret;
1011
1012 /* cancel any work waiting to be queued. */
1013 ret = cancel_delayed_work(dwork);
1014
1015 /* if there was any work waiting then we run it now and
1016 * wait for it's completion */
1017 if (ret) {
1018 schedule_delayed_work(dwork, 0);
1019 flush_scheduled_work();
1020 }
1021 return ret;
1022}
1023
abadfc92
RP		 1024/* power down chip */
1025static int wm8750_remove(struct platform_device *pdev)
1026{
1027 struct snd_soc_device *socdev = platform_get_drvdata(pdev);
1028 struct snd_soc_codec *codec = socdev->codec;
1029
1030 if (codec->control_data)
1031 wm8750_dapm_event(codec, SNDRV_CTL_POWER_D3cold);
4422b606 1032 run_delayed_work(&codec->delayed_work);
abadfc92
RP		 1033 snd_soc_free_pcms(socdev);
1034 snd_soc_dapm_free(socdev);
1035#if defined (CONFIG_I2C) || defined (CONFIG_I2C_MODULE)
1036 i2c_del_driver(&wm8750_i2c_driver);
1037#endif
4422b606 1038 kfree(codec->private_data);
abadfc92
RP		 1039 kfree(codec);
1040
1041 return 0;
1042}
1043
1044struct snd_soc_codec_device soc_codec_dev_wm8750 = {
1045 .probe = wm8750_probe,
1046 .remove = wm8750_remove,
1047 .suspend = wm8750_suspend,
1048 .resume = wm8750_resume,
1049};
1050
1051EXPORT_SYMBOL_GPL(soc_codec_dev_wm8750);
1052
1053MODULE_DESCRIPTION("ASoC WM8750 driver");
1054MODULE_AUTHOR("Liam Girdwood");
1055MODULE_LICENSE("GPL");
Linux kernel - Deliverables
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