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ALSA: ASoC - Fix module init entry for twl4030.c
[deliverable/linux.git] / sound / soc / codecs / wm8750.c
CommitLineData
abadfc92
RP		 1/*
2 * wm8750.c -- WM8750 ALSA SoC audio driver
3 *
4 * Copyright 2005 Openedhand Ltd.
5 *
6 * Author: Richard Purdie <richard@openedhand.com>
7 *
8 * Based on WM8753.c
9 *
10 * This program is free software; you can redistribute it and/or modify
11 * it under the terms of the GNU General Public License version 2 as
12 * published by the Free Software Foundation.
13 */
14
15#include <linux/module.h>
16#include <linux/moduleparam.h>
17#include <linux/init.h>
18#include <linux/delay.h>
19#include <linux/pm.h>
20#include <linux/i2c.h>
21#include <linux/platform_device.h>
2f3dfaf5 22#include <linux/spi/spi.h>
abadfc92
RP		 23#include <sound/core.h>
24#include <sound/pcm.h>
25#include <sound/pcm_params.h>
26#include <sound/soc.h>
27#include <sound/soc-dapm.h>
28#include <sound/initval.h>
29
30#include "wm8750.h"
31
4422b606 32#define WM8750_VERSION "0.12"
abadfc92 33
4422b606
LG		 34/* codec private data */
35struct wm8750_priv {
36 unsigned int sysclk;
37};
38
abadfc92
RP		 39/*
40 * wm8750 register cache
41 * We can't read the WM8750 register space when we
42 * are using 2 wire for device control, so we cache them instead.
43 */
44static const u16 wm8750_reg[] = {
45 0x0097, 0x0097, 0x0079, 0x0079, /* 0 */
46 0x0000, 0x0008, 0x0000, 0x000a, /* 4 */
47 0x0000, 0x0000, 0x00ff, 0x00ff, /* 8 */
48 0x000f, 0x000f, 0x0000, 0x0000, /* 12 */
49 0x0000, 0x007b, 0x0000, 0x0032, /* 16 */
50 0x0000, 0x00c3, 0x00c3, 0x00c0, /* 20 */
51 0x0000, 0x0000, 0x0000, 0x0000, /* 24 */
52 0x0000, 0x0000, 0x0000, 0x0000, /* 28 */
53 0x0000, 0x0000, 0x0050, 0x0050, /* 32 */
54 0x0050, 0x0050, 0x0050, 0x0050, /* 36 */
55 0x0079, 0x0079, 0x0079, /* 40 */
56};
57
abadfc92
RP		 58/*
59 * read wm8750 register cache
60 */
61static inline unsigned int wm8750_read_reg_cache(struct snd_soc_codec *codec,
62 unsigned int reg)
63{
64 u16 *cache = codec->reg_cache;
65 if (reg > WM8750_CACHE_REGNUM)
66 return -1;
67 return cache[reg];
68}
69
70/*
71 * write wm8750 register cache
72 */
73static inline void wm8750_write_reg_cache(struct snd_soc_codec *codec,
74 unsigned int reg, unsigned int value)
75{
76 u16 *cache = codec->reg_cache;
77 if (reg > WM8750_CACHE_REGNUM)
78 return;
79 cache[reg] = value;
80}
81
82static int wm8750_write(struct snd_soc_codec *codec, unsigned int reg,
83 unsigned int value)
84{
85 u8 data[2];
86
87 /* data is
88 * D15..D9 WM8753 register offset
89 * D8...D0 register data
90 */
91 data[0] = (reg << 1) | ((value >> 8) & 0x0001);
92 data[1] = value & 0x00ff;
93
42f3030f 94 wm8750_write_reg_cache(codec, reg, value);
abadfc92
RP		 95 if (codec->hw_write(codec->control_data, data, 2) == 2)
96 return 0;
97 else
98 return -EIO;
99}
100
101#define wm8750_reset(c) wm8750_write(c, WM8750_RESET, 0)
102
103/*
104 * WM8750 Controls
105 */
106static const char *wm8750_bass[] = {"Linear Control", "Adaptive Boost"};
107static const char *wm8750_bass_filter[] = { "130Hz @ 48kHz", "200Hz @ 48kHz" };
108static const char *wm8750_treble[] = {"8kHz", "4kHz"};
109static const char *wm8750_3d_lc[] = {"200Hz", "500Hz"};
110static const char *wm8750_3d_uc[] = {"2.2kHz", "1.5kHz"};
111static const char *wm8750_3d_func[] = {"Capture", "Playback"};
112static const char *wm8750_alc_func[] = {"Off", "Right", "Left", "Stereo"};
113static const char *wm8750_ng_type[] = {"Constant PGA Gain",
114 "Mute ADC Output"};
115static const char *wm8750_line_mux[] = {"Line 1", "Line 2", "Line 3", "PGA",
116 "Differential"};
117static const char *wm8750_pga_sel[] = {"Line 1", "Line 2", "Line 3",
118 "Differential"};
119static const char *wm8750_out3[] = {"VREF", "ROUT1 + Vol", "MonoOut",
120 "ROUT1"};
121static const char *wm8750_diff_sel[] = {"Line 1", "Line 2"};
122static const char *wm8750_adcpol[] = {"Normal", "L Invert", "R Invert",
123 "L + R Invert"};
124static const char *wm8750_deemph[] = {"None", "32Khz", "44.1Khz", "48Khz"};
125static const char *wm8750_mono_mux[] = {"Stereo", "Mono (Left)",
126 "Mono (Right)", "Digital Mono"};
127
128static const struct soc_enum wm8750_enum[] = {
129SOC_ENUM_SINGLE(WM8750_BASS, 7, 2, wm8750_bass),
130SOC_ENUM_SINGLE(WM8750_BASS, 6, 2, wm8750_bass_filter),
131SOC_ENUM_SINGLE(WM8750_TREBLE, 6, 2, wm8750_treble),
132SOC_ENUM_SINGLE(WM8750_3D, 5, 2, wm8750_3d_lc),
133SOC_ENUM_SINGLE(WM8750_3D, 6, 2, wm8750_3d_uc),
134SOC_ENUM_SINGLE(WM8750_3D, 7, 2, wm8750_3d_func),
135SOC_ENUM_SINGLE(WM8750_ALC1, 7, 4, wm8750_alc_func),
136SOC_ENUM_SINGLE(WM8750_NGATE, 1, 2, wm8750_ng_type),
137SOC_ENUM_SINGLE(WM8750_LOUTM1, 0, 5, wm8750_line_mux),
138SOC_ENUM_SINGLE(WM8750_ROUTM1, 0, 5, wm8750_line_mux),
139SOC_ENUM_SINGLE(WM8750_LADCIN, 6, 4, wm8750_pga_sel), /* 10 */
140SOC_ENUM_SINGLE(WM8750_RADCIN, 6, 4, wm8750_pga_sel),
141SOC_ENUM_SINGLE(WM8750_ADCTL2, 7, 4, wm8750_out3),
142SOC_ENUM_SINGLE(WM8750_ADCIN, 8, 2, wm8750_diff_sel),
143SOC_ENUM_SINGLE(WM8750_ADCDAC, 5, 4, wm8750_adcpol),
144SOC_ENUM_SINGLE(WM8750_ADCDAC, 1, 4, wm8750_deemph),
145SOC_ENUM_SINGLE(WM8750_ADCIN, 6, 4, wm8750_mono_mux), /* 16 */
146
147};
148
149static const struct snd_kcontrol_new wm8750_snd_controls[] = {
150
151SOC_DOUBLE_R("Capture Volume", WM8750_LINVOL, WM8750_RINVOL, 0, 63, 0),
152SOC_DOUBLE_R("Capture ZC Switch", WM8750_LINVOL, WM8750_RINVOL, 6, 1, 0),
153SOC_DOUBLE_R("Capture Switch", WM8750_LINVOL, WM8750_RINVOL, 7, 1, 1),
154
bd903b6e 155SOC_DOUBLE_R("Headphone Playback ZC Switch", WM8750_LOUT1V,
abadfc92 156 WM8750_ROUT1V, 7, 1, 0),
bd903b6e 157SOC_DOUBLE_R("Speaker Playback ZC Switch", WM8750_LOUT2V,
abadfc92
RP		 158 WM8750_ROUT2V, 7, 1, 0),
159
160SOC_ENUM("Playback De-emphasis", wm8750_enum[15]),
161
162SOC_ENUM("Capture Polarity", wm8750_enum[14]),
163SOC_SINGLE("Playback 6dB Attenuate", WM8750_ADCDAC, 7, 1, 0),
164SOC_SINGLE("Capture 6dB Attenuate", WM8750_ADCDAC, 8, 1, 0),
165
166SOC_DOUBLE_R("PCM Volume", WM8750_LDAC, WM8750_RDAC, 0, 255, 0),
167
168SOC_ENUM("Bass Boost", wm8750_enum[0]),
169SOC_ENUM("Bass Filter", wm8750_enum[1]),
170SOC_SINGLE("Bass Volume", WM8750_BASS, 0, 15, 1),
171
6a7b8cf4 172SOC_SINGLE("Treble Volume", WM8750_TREBLE, 0, 15, 1),
abadfc92
RP		 173SOC_ENUM("Treble Cut-off", wm8750_enum[2]),
174
175SOC_SINGLE("3D Switch", WM8750_3D, 0, 1, 0),
176SOC_SINGLE("3D Volume", WM8750_3D, 1, 15, 0),
177SOC_ENUM("3D Lower Cut-off", wm8750_enum[3]),
178SOC_ENUM("3D Upper Cut-off", wm8750_enum[4]),
179SOC_ENUM("3D Mode", wm8750_enum[5]),
180
181SOC_SINGLE("ALC Capture Target Volume", WM8750_ALC1, 0, 7, 0),
182SOC_SINGLE("ALC Capture Max Volume", WM8750_ALC1, 4, 7, 0),
183SOC_ENUM("ALC Capture Function", wm8750_enum[6]),
184SOC_SINGLE("ALC Capture ZC Switch", WM8750_ALC2, 7, 1, 0),
185SOC_SINGLE("ALC Capture Hold Time", WM8750_ALC2, 0, 15, 0),
186SOC_SINGLE("ALC Capture Decay Time", WM8750_ALC3, 4, 15, 0),
187SOC_SINGLE("ALC Capture Attack Time", WM8750_ALC3, 0, 15, 0),
188SOC_SINGLE("ALC Capture NG Threshold", WM8750_NGATE, 3, 31, 0),
189SOC_ENUM("ALC Capture NG Type", wm8750_enum[4]),
190SOC_SINGLE("ALC Capture NG Switch", WM8750_NGATE, 0, 1, 0),
191
192SOC_SINGLE("Left ADC Capture Volume", WM8750_LADC, 0, 255, 0),
193SOC_SINGLE("Right ADC Capture Volume", WM8750_RADC, 0, 255, 0),
194
195SOC_SINGLE("ZC Timeout Switch", WM8750_ADCTL1, 0, 1, 0),
196SOC_SINGLE("Playback Invert Switch", WM8750_ADCTL1, 1, 1, 0),
197
bd903b6e 198SOC_SINGLE("Right Speaker Playback Invert Switch", WM8750_ADCTL2, 4, 1, 0),
abadfc92
RP		 199
200/* Unimplemented */
201/* ADCDAC Bit 0 - ADCHPD */
202/* ADCDAC Bit 4 - HPOR */
203/* ADCTL1 Bit 2,3 - DATSEL */
204/* ADCTL1 Bit 4,5 - DMONOMIX */
205/* ADCTL1 Bit 6,7 - VSEL */
206/* ADCTL2 Bit 2 - LRCM */
207/* ADCTL2 Bit 3 - TRI */
208/* ADCTL3 Bit 5 - HPFLREN */
209/* ADCTL3 Bit 6 - VROI */
210/* ADCTL3 Bit 7,8 - ADCLRM */
211/* ADCIN Bit 4 - LDCM */
212/* ADCIN Bit 5 - RDCM */
213
214SOC_DOUBLE_R("Mic Boost", WM8750_LADCIN, WM8750_RADCIN, 4, 3, 0),
215
216SOC_DOUBLE_R("Bypass Left Playback Volume", WM8750_LOUTM1,
217 WM8750_LOUTM2, 4, 7, 1),
218SOC_DOUBLE_R("Bypass Right Playback Volume", WM8750_ROUTM1,
219 WM8750_ROUTM2, 4, 7, 1),
220SOC_DOUBLE_R("Bypass Mono Playback Volume", WM8750_MOUTM1,
221 WM8750_MOUTM2, 4, 7, 1),
222
223SOC_SINGLE("Mono Playback ZC Switch", WM8750_MOUTV, 7, 1, 0),
224
bd903b6e
LG		 225SOC_DOUBLE_R("Headphone Playback Volume", WM8750_LOUT1V, WM8750_ROUT1V,
226 0, 127, 0),
227SOC_DOUBLE_R("Speaker Playback Volume", WM8750_LOUT2V, WM8750_ROUT2V,
228 0, 127, 0),
abadfc92
RP		 229
230SOC_SINGLE("Mono Playback Volume", WM8750_MOUTV, 0, 127, 0),
231
232};
233
234/* add non dapm controls */
235static int wm8750_add_controls(struct snd_soc_codec *codec)
236{
237 int err, i;
238
239 for (i = 0; i < ARRAY_SIZE(wm8750_snd_controls); i++) {
240 err = snd_ctl_add(codec->card,
42f3030f
MB		 241 snd_soc_cnew(&wm8750_snd_controls[i],
242 codec, NULL));
abadfc92
RP		 243 if (err < 0)
244 return err;
245 }
246 return 0;
247}
248
249/*
250 * DAPM Controls
251 */
252
253/* Left Mixer */
254static const struct snd_kcontrol_new wm8750_left_mixer_controls[] = {
255SOC_DAPM_SINGLE("Playback Switch", WM8750_LOUTM1, 8, 1, 0),
256SOC_DAPM_SINGLE("Left Bypass Switch", WM8750_LOUTM1, 7, 1, 0),
257SOC_DAPM_SINGLE("Right Playback Switch", WM8750_LOUTM2, 8, 1, 0),
258SOC_DAPM_SINGLE("Right Bypass Switch", WM8750_LOUTM2, 7, 1, 0),
259};
260
261/* Right Mixer */
262static const struct snd_kcontrol_new wm8750_right_mixer_controls[] = {
263SOC_DAPM_SINGLE("Left Playback Switch", WM8750_ROUTM1, 8, 1, 0),
264SOC_DAPM_SINGLE("Left Bypass Switch", WM8750_ROUTM1, 7, 1, 0),
265SOC_DAPM_SINGLE("Playback Switch", WM8750_ROUTM2, 8, 1, 0),
266SOC_DAPM_SINGLE("Right Bypass Switch", WM8750_ROUTM2, 7, 1, 0),
267};
268
269/* Mono Mixer */
270static const struct snd_kcontrol_new wm8750_mono_mixer_controls[] = {
271SOC_DAPM_SINGLE("Left Playback Switch", WM8750_MOUTM1, 8, 1, 0),
272SOC_DAPM_SINGLE("Left Bypass Switch", WM8750_MOUTM1, 7, 1, 0),
273SOC_DAPM_SINGLE("Right Playback Switch", WM8750_MOUTM2, 8, 1, 0),
274SOC_DAPM_SINGLE("Right Bypass Switch", WM8750_MOUTM2, 7, 1, 0),
275};
276
277/* Left Line Mux */
278static const struct snd_kcontrol_new wm8750_left_line_controls =
279SOC_DAPM_ENUM("Route", wm8750_enum[8]);
280
281/* Right Line Mux */
282static const struct snd_kcontrol_new wm8750_right_line_controls =
283SOC_DAPM_ENUM("Route", wm8750_enum[9]);
284
285/* Left PGA Mux */
286static const struct snd_kcontrol_new wm8750_left_pga_controls =
287SOC_DAPM_ENUM("Route", wm8750_enum[10]);
288
289/* Right PGA Mux */
290static const struct snd_kcontrol_new wm8750_right_pga_controls =
291SOC_DAPM_ENUM("Route", wm8750_enum[11]);
292
293/* Out 3 Mux */
294static const struct snd_kcontrol_new wm8750_out3_controls =
295SOC_DAPM_ENUM("Route", wm8750_enum[12]);
296
297/* Differential Mux */
298static const struct snd_kcontrol_new wm8750_diffmux_controls =
299SOC_DAPM_ENUM("Route", wm8750_enum[13]);
300
301/* Mono ADC Mux */
302static const struct snd_kcontrol_new wm8750_monomux_controls =
303SOC_DAPM_ENUM("Route", wm8750_enum[16]);
304
305static const struct snd_soc_dapm_widget wm8750_dapm_widgets[] = {
306 SND_SOC_DAPM_MIXER("Left Mixer", SND_SOC_NOPM, 0, 0,
307 &wm8750_left_mixer_controls[0],
308 ARRAY_SIZE(wm8750_left_mixer_controls)),
309 SND_SOC_DAPM_MIXER("Right Mixer", SND_SOC_NOPM, 0, 0,
310 &wm8750_right_mixer_controls[0],
311 ARRAY_SIZE(wm8750_right_mixer_controls)),
312 SND_SOC_DAPM_MIXER("Mono Mixer", WM8750_PWR2, 2, 0,
313 &wm8750_mono_mixer_controls[0],
314 ARRAY_SIZE(wm8750_mono_mixer_controls)),
315
316 SND_SOC_DAPM_PGA("Right Out 2", WM8750_PWR2, 3, 0, NULL, 0),
317 SND_SOC_DAPM_PGA("Left Out 2", WM8750_PWR2, 4, 0, NULL, 0),
318 SND_SOC_DAPM_PGA("Right Out 1", WM8750_PWR2, 5, 0, NULL, 0),
319 SND_SOC_DAPM_PGA("Left Out 1", WM8750_PWR2, 6, 0, NULL, 0),
320 SND_SOC_DAPM_DAC("Right DAC", "Right Playback", WM8750_PWR2, 7, 0),
321 SND_SOC_DAPM_DAC("Left DAC", "Left Playback", WM8750_PWR2, 8, 0),
322
323 SND_SOC_DAPM_MICBIAS("Mic Bias", WM8750_PWR1, 1, 0),
324 SND_SOC_DAPM_ADC("Right ADC", "Right Capture", WM8750_PWR1, 2, 0),
325 SND_SOC_DAPM_ADC("Left ADC", "Left Capture", WM8750_PWR1, 3, 0),
326
327 SND_SOC_DAPM_MUX("Left PGA Mux", WM8750_PWR1, 5, 0,
328 &wm8750_left_pga_controls),
329 SND_SOC_DAPM_MUX("Right PGA Mux", WM8750_PWR1, 4, 0,
330 &wm8750_right_pga_controls),
331 SND_SOC_DAPM_MUX("Left Line Mux", SND_SOC_NOPM, 0, 0,
332 &wm8750_left_line_controls),
333 SND_SOC_DAPM_MUX("Right Line Mux", SND_SOC_NOPM, 0, 0,
334 &wm8750_right_line_controls),
335
336 SND_SOC_DAPM_MUX("Out3 Mux", SND_SOC_NOPM, 0, 0, &wm8750_out3_controls),
337 SND_SOC_DAPM_PGA("Out 3", WM8750_PWR2, 1, 0, NULL, 0),
338 SND_SOC_DAPM_PGA("Mono Out 1", WM8750_PWR2, 2, 0, NULL, 0),
339
340 SND_SOC_DAPM_MUX("Differential Mux", SND_SOC_NOPM, 0, 0,
341 &wm8750_diffmux_controls),
342 SND_SOC_DAPM_MUX("Left ADC Mux", SND_SOC_NOPM, 0, 0,
343 &wm8750_monomux_controls),
344 SND_SOC_DAPM_MUX("Right ADC Mux", SND_SOC_NOPM, 0, 0,
345 &wm8750_monomux_controls),
346
347 SND_SOC_DAPM_OUTPUT("LOUT1"),
348 SND_SOC_DAPM_OUTPUT("ROUT1"),
349 SND_SOC_DAPM_OUTPUT("LOUT2"),
350 SND_SOC_DAPM_OUTPUT("ROUT2"),
23ba79bd 351 SND_SOC_DAPM_OUTPUT("MONO1"),
abadfc92 352 SND_SOC_DAPM_OUTPUT("OUT3"),
04489eeb 353 SND_SOC_DAPM_OUTPUT("VREF"),
abadfc92
RP		 354
355 SND_SOC_DAPM_INPUT("LINPUT1"),
356 SND_SOC_DAPM_INPUT("LINPUT2"),
357 SND_SOC_DAPM_INPUT("LINPUT3"),
358 SND_SOC_DAPM_INPUT("RINPUT1"),
359 SND_SOC_DAPM_INPUT("RINPUT2"),
360 SND_SOC_DAPM_INPUT("RINPUT3"),
361};
362
a65f0568 363static const struct snd_soc_dapm_route audio_map[] = {
abadfc92
RP		 364 /* left mixer */
365 {"Left Mixer", "Playback Switch", "Left DAC"},
366 {"Left Mixer", "Left Bypass Switch", "Left Line Mux"},
367 {"Left Mixer", "Right Playback Switch", "Right DAC"},
368 {"Left Mixer", "Right Bypass Switch", "Right Line Mux"},
369
370 /* right mixer */
371 {"Right Mixer", "Left Playback Switch", "Left DAC"},
372 {"Right Mixer", "Left Bypass Switch", "Left Line Mux"},
373 {"Right Mixer", "Playback Switch", "Right DAC"},
374 {"Right Mixer", "Right Bypass Switch", "Right Line Mux"},
375
376 /* left out 1 */
377 {"Left Out 1", NULL, "Left Mixer"},
378 {"LOUT1", NULL, "Left Out 1"},
379
380 /* left out 2 */
381 {"Left Out 2", NULL, "Left Mixer"},
382 {"LOUT2", NULL, "Left Out 2"},
383
384 /* right out 1 */
385 {"Right Out 1", NULL, "Right Mixer"},
386 {"ROUT1", NULL, "Right Out 1"},
387
388 /* right out 2 */
389 {"Right Out 2", NULL, "Right Mixer"},
390 {"ROUT2", NULL, "Right Out 2"},
391
392 /* mono mixer */
393 {"Mono Mixer", "Left Playback Switch", "Left DAC"},
394 {"Mono Mixer", "Left Bypass Switch", "Left Line Mux"},
395 {"Mono Mixer", "Right Playback Switch", "Right DAC"},
396 {"Mono Mixer", "Right Bypass Switch", "Right Line Mux"},
397
398 /* mono out */
399 {"Mono Out 1", NULL, "Mono Mixer"},
400 {"MONO1", NULL, "Mono Out 1"},
401
402 /* out 3 */
403 {"Out3 Mux", "VREF", "VREF"},
404 {"Out3 Mux", "ROUT1 + Vol", "ROUT1"},
405 {"Out3 Mux", "ROUT1", "Right Mixer"},
406 {"Out3 Mux", "MonoOut", "MONO1"},
407 {"Out 3", NULL, "Out3 Mux"},
408 {"OUT3", NULL, "Out 3"},
409
410 /* Left Line Mux */
411 {"Left Line Mux", "Line 1", "LINPUT1"},
412 {"Left Line Mux", "Line 2", "LINPUT2"},
413 {"Left Line Mux", "Line 3", "LINPUT3"},
414 {"Left Line Mux", "PGA", "Left PGA Mux"},
415 {"Left Line Mux", "Differential", "Differential Mux"},
416
417 /* Right Line Mux */
418 {"Right Line Mux", "Line 1", "RINPUT1"},
419 {"Right Line Mux", "Line 2", "RINPUT2"},
420 {"Right Line Mux", "Line 3", "RINPUT3"},
421 {"Right Line Mux", "PGA", "Right PGA Mux"},
422 {"Right Line Mux", "Differential", "Differential Mux"},
423
424 /* Left PGA Mux */
425 {"Left PGA Mux", "Line 1", "LINPUT1"},
426 {"Left PGA Mux", "Line 2", "LINPUT2"},
427 {"Left PGA Mux", "Line 3", "LINPUT3"},
428 {"Left PGA Mux", "Differential", "Differential Mux"},
429
430 /* Right PGA Mux */
431 {"Right PGA Mux", "Line 1", "RINPUT1"},
432 {"Right PGA Mux", "Line 2", "RINPUT2"},
433 {"Right PGA Mux", "Line 3", "RINPUT3"},
434 {"Right PGA Mux", "Differential", "Differential Mux"},
435
436 /* Differential Mux */
437 {"Differential Mux", "Line 1", "LINPUT1"},
438 {"Differential Mux", "Line 1", "RINPUT1"},
439 {"Differential Mux", "Line 2", "LINPUT2"},
440 {"Differential Mux", "Line 2", "RINPUT2"},
441
442 /* Left ADC Mux */
443 {"Left ADC Mux", "Stereo", "Left PGA Mux"},
444 {"Left ADC Mux", "Mono (Left)", "Left PGA Mux"},
445 {"Left ADC Mux", "Digital Mono", "Left PGA Mux"},
446
447 /* Right ADC Mux */
448 {"Right ADC Mux", "Stereo", "Right PGA Mux"},
449 {"Right ADC Mux", "Mono (Right)", "Right PGA Mux"},
450 {"Right ADC Mux", "Digital Mono", "Right PGA Mux"},
451
452 /* ADC */
453 {"Left ADC", NULL, "Left ADC Mux"},
454 {"Right ADC", NULL, "Right ADC Mux"},
abadfc92
RP		 455};
456
457static int wm8750_add_widgets(struct snd_soc_codec *codec)
458{
a65f0568
MB		 459 snd_soc_dapm_new_controls(codec, wm8750_dapm_widgets,
460 ARRAY_SIZE(wm8750_dapm_widgets));
abadfc92 461
a65f0568 462 snd_soc_dapm_add_routes(codec, audio_map, ARRAY_SIZE(audio_map));
abadfc92
RP		 463
464 snd_soc_dapm_new_widgets(codec);
465 return 0;
466}
467
468struct _coeff_div {
469 u32 mclk;
470 u32 rate;
471 u16 fs;
472 u8 sr:5;
473 u8 usb:1;
474};
475
476/* codec hifi mclk clock divider coefficients */
477static const struct _coeff_div coeff_div[] = {
478 /* 8k */
479 {12288000, 8000, 1536, 0x6, 0x0},
480 {11289600, 8000, 1408, 0x16, 0x0},
481 {18432000, 8000, 2304, 0x7, 0x0},
482 {16934400, 8000, 2112, 0x17, 0x0},
483 {12000000, 8000, 1500, 0x6, 0x1},
484
485 /* 11.025k */
486 {11289600, 11025, 1024, 0x18, 0x0},
487 {16934400, 11025, 1536, 0x19, 0x0},
488 {12000000, 11025, 1088, 0x19, 0x1},
489
490 /* 16k */
491 {12288000, 16000, 768, 0xa, 0x0},
492 {18432000, 16000, 1152, 0xb, 0x0},
493 {12000000, 16000, 750, 0xa, 0x1},
494
495 /* 22.05k */
496 {11289600, 22050, 512, 0x1a, 0x0},
497 {16934400, 22050, 768, 0x1b, 0x0},
498 {12000000, 22050, 544, 0x1b, 0x1},
499
500 /* 32k */
501 {12288000, 32000, 384, 0xc, 0x0},
502 {18432000, 32000, 576, 0xd, 0x0},
503 {12000000, 32000, 375, 0xa, 0x1},
504
505 /* 44.1k */
506 {11289600, 44100, 256, 0x10, 0x0},
507 {16934400, 44100, 384, 0x11, 0x0},
508 {12000000, 44100, 272, 0x11, 0x1},
509
510 /* 48k */
511 {12288000, 48000, 256, 0x0, 0x0},
512 {18432000, 48000, 384, 0x1, 0x0},
513 {12000000, 48000, 250, 0x0, 0x1},
514
515 /* 88.2k */
516 {11289600, 88200, 128, 0x1e, 0x0},
517 {16934400, 88200, 192, 0x1f, 0x0},
518 {12000000, 88200, 136, 0x1f, 0x1},
519
520 /* 96k */
521 {12288000, 96000, 128, 0xe, 0x0},
522 {18432000, 96000, 192, 0xf, 0x0},
523 {12000000, 96000, 125, 0xe, 0x1},
524};
525
526static inline int get_coeff(int mclk, int rate)
527{
528 int i;
529
530 for (i = 0; i < ARRAY_SIZE(coeff_div); i++) {
531 if (coeff_div[i].rate == rate && coeff_div[i].mclk == mclk)
532 return i;
533 }
a71a468a
LG		 534
535 printk(KERN_ERR "wm8750: could not get coeff for mclk %d @ rate %d\n",
536 mclk, rate);
abadfc92
RP		 537 return -EINVAL;
538}
539
e550e17f 540static int wm8750_set_dai_sysclk(struct snd_soc_dai *codec_dai,
4422b606 541 int clk_id, unsigned int freq, int dir)
abadfc92 542{
4422b606
LG		 543 struct snd_soc_codec *codec = codec_dai->codec;
544 struct wm8750_priv *wm8750 = codec->private_data;
545
546 switch (freq) {
547 case 11289600:
548 case 12000000:
549 case 12288000:
550 case 16934400:
551 case 18432000:
552 wm8750->sysclk = freq;
553 return 0;
554 }
555 return -EINVAL;
abadfc92
RP		 556}
557
e550e17f 558static int wm8750_set_dai_fmt(struct snd_soc_dai *codec_dai,
4422b606 559 unsigned int fmt)
abadfc92 560{
4422b606
LG		 561 struct snd_soc_codec *codec = codec_dai->codec;
562 u16 iface = 0;
abadfc92
RP		 563
564 /* set master/slave audio interface */
4422b606 565 switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) {
abadfc92
RP		 566 case SND_SOC_DAIFMT_CBM_CFM:
567 iface = 0x0040;
568 break;
569 case SND_SOC_DAIFMT_CBS_CFS:
570 break;
4422b606
LG		 571 default:
572 return -EINVAL;
abadfc92
RP		 573 }
574
575 /* interface format */
4422b606 576 switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
abadfc92
RP		 577 case SND_SOC_DAIFMT_I2S:
578 iface |= 0x0002;
579 break;
580 case SND_SOC_DAIFMT_RIGHT_J:
581 break;
582 case SND_SOC_DAIFMT_LEFT_J:
583 iface |= 0x0001;
584 break;
585 case SND_SOC_DAIFMT_DSP_A:
586 iface |= 0x0003;
587 break;
588 case SND_SOC_DAIFMT_DSP_B:
589 iface |= 0x0013;
590 break;
4422b606
LG		 591 default:
592 return -EINVAL;
abadfc92
RP		 593 }
594
595 /* clock inversion */
4422b606 596 switch (fmt & SND_SOC_DAIFMT_INV_MASK) {
abadfc92
RP		 597 case SND_SOC_DAIFMT_NB_NF:
598 break;
599 case SND_SOC_DAIFMT_IB_IF:
600 iface |= 0x0090;
601 break;
602 case SND_SOC_DAIFMT_IB_NF:
603 iface |= 0x0080;
604 break;
605 case SND_SOC_DAIFMT_NB_IF:
606 iface |= 0x0010;
607 break;
4422b606
LG		 608 default:
609 return -EINVAL;
abadfc92
RP		 610 }
611
4422b606
LG		 612 wm8750_write(codec, WM8750_IFACE, iface);
613 return 0;
614}
615
616static int wm8750_pcm_hw_params(struct snd_pcm_substream *substream,
dee89c4d
MB		 617 struct snd_pcm_hw_params *params,
618 struct snd_soc_dai *dai)
4422b606
LG		 619{
620 struct snd_soc_pcm_runtime *rtd = substream->private_data;
621 struct snd_soc_device *socdev = rtd->socdev;
622 struct snd_soc_codec *codec = socdev->codec;
623 struct wm8750_priv *wm8750 = codec->private_data;
624 u16 iface = wm8750_read_reg_cache(codec, WM8750_IFACE) & 0x1f3;
625 u16 srate = wm8750_read_reg_cache(codec, WM8750_SRATE) & 0x1c0;
626 int coeff = get_coeff(wm8750->sysclk, params_rate(params));
627
628 /* bit size */
629 switch (params_format(params)) {
630 case SNDRV_PCM_FORMAT_S16_LE:
abadfc92 631 break;
4422b606
LG		 632 case SNDRV_PCM_FORMAT_S20_3LE:
633 iface |= 0x0004;
abadfc92 634 break;
4422b606
LG		 635 case SNDRV_PCM_FORMAT_S24_LE:
636 iface |= 0x0008;
abadfc92 637 break;
4422b606
LG		 638 case SNDRV_PCM_FORMAT_S32_LE:
639 iface |= 0x000c;
abadfc92
RP		 640 break;
641 }
642
643 /* set iface & srate */
644 wm8750_write(codec, WM8750_IFACE, iface);
4422b606
LG		 645 if (coeff >= 0)
646 wm8750_write(codec, WM8750_SRATE, srate |
647 (coeff_div[coeff].sr << 1) | coeff_div[coeff].usb);
abadfc92
RP		 648
649 return 0;
650}
651
e550e17f 652static int wm8750_mute(struct snd_soc_dai *dai, int mute)
abadfc92 653{
4422b606 654 struct snd_soc_codec *codec = dai->codec;
abadfc92 655 u16 mute_reg = wm8750_read_reg_cache(codec, WM8750_ADCDAC) & 0xfff7;
4422b606 656
abadfc92
RP		 657 if (mute)
658 wm8750_write(codec, WM8750_ADCDAC, mute_reg | 0x8);
659 else
660 wm8750_write(codec, WM8750_ADCDAC, mute_reg);
661 return 0;
662}
663
0be9898a
MB		 664static int wm8750_set_bias_level(struct snd_soc_codec *codec,
665 enum snd_soc_bias_level level)
abadfc92
RP		 666{
667 u16 pwr_reg = wm8750_read_reg_cache(codec, WM8750_PWR1) & 0xfe3e;
668
0be9898a
MB		 669 switch (level) {
670 case SND_SOC_BIAS_ON:
abadfc92
RP		 671 /* set vmid to 50k and unmute dac */
672 wm8750_write(codec, WM8750_PWR1, pwr_reg | 0x00c0);
673 break;
0be9898a 674 case SND_SOC_BIAS_PREPARE:
abadfc92
RP		 675 /* set vmid to 5k for quick power up */
676 wm8750_write(codec, WM8750_PWR1, pwr_reg | 0x01c1);
677 break;
0be9898a 678 case SND_SOC_BIAS_STANDBY:
abadfc92
RP		 679 /* mute dac and set vmid to 500k, enable VREF */
680 wm8750_write(codec, WM8750_PWR1, pwr_reg | 0x0141);
681 break;
0be9898a 682 case SND_SOC_BIAS_OFF:
abadfc92
RP		 683 wm8750_write(codec, WM8750_PWR1, 0x0001);
684 break;
685 }
0be9898a 686 codec->bias_level = level;
abadfc92
RP		 687 return 0;
688}
689
4422b606 690#define WM8750_RATES (SNDRV_PCM_RATE_8000 | SNDRV_PCM_RATE_11025 |\
42f3030f
MB		 691 SNDRV_PCM_RATE_16000 | SNDRV_PCM_RATE_22050 | SNDRV_PCM_RATE_44100 | \
692 SNDRV_PCM_RATE_48000 | SNDRV_PCM_RATE_88200 | SNDRV_PCM_RATE_96000)
4422b606
LG		 693
694#define WM8750_FORMATS (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S20_3LE |\
695 SNDRV_PCM_FMTBIT_S24_LE)
696
e550e17f 697struct snd_soc_dai wm8750_dai = {
abadfc92
RP		 698 .name = "WM8750",
699 .playback = {
700 .stream_name = "Playback",
701 .channels_min = 1,
702 .channels_max = 2,
4422b606
LG		 703 .rates = WM8750_RATES,
704 .formats = WM8750_FORMATS,},
abadfc92
RP		 705 .capture = {
706 .stream_name = "Capture",
707 .channels_min = 1,
708 .channels_max = 2,
4422b606
LG		 709 .rates = WM8750_RATES,
710 .formats = WM8750_FORMATS,},
abadfc92 711 .ops = {
4422b606 712 .hw_params = wm8750_pcm_hw_params,
4422b606
LG		 713 .digital_mute = wm8750_mute,
714 .set_fmt = wm8750_set_dai_fmt,
715 .set_sysclk = wm8750_set_dai_sysclk,
abadfc92
RP		 716 },
717};
718EXPORT_SYMBOL_GPL(wm8750_dai);
719
1321b160 720static void wm8750_work(struct work_struct *work)
abadfc92 721{
1321b160
TI		 722 struct snd_soc_codec *codec =
723 container_of(work, struct snd_soc_codec, delayed_work.work);
0be9898a 724 wm8750_set_bias_level(codec, codec->bias_level);
abadfc92
RP		 725}
726
727static int wm8750_suspend(struct platform_device *pdev, pm_message_t state)
728{
729 struct snd_soc_device *socdev = platform_get_drvdata(pdev);
730 struct snd_soc_codec *codec = socdev->codec;
731
0be9898a 732 wm8750_set_bias_level(codec, SND_SOC_BIAS_OFF);
abadfc92
RP		 733 return 0;
734}
735
736static int wm8750_resume(struct platform_device *pdev)
737{
738 struct snd_soc_device *socdev = platform_get_drvdata(pdev);
739 struct snd_soc_codec *codec = socdev->codec;
740 int i;
741 u8 data[2];
742 u16 *cache = codec->reg_cache;
743
744 /* Sync reg_cache with the hardware */
745 for (i = 0; i < ARRAY_SIZE(wm8750_reg); i++) {
746 if (i == WM8750_RESET)
747 continue;
748 data[0] = (i << 1) | ((cache[i] >> 8) & 0x0001);
749 data[1] = cache[i] & 0x00ff;
750 codec->hw_write(codec->control_data, data, 2);
751 }
752
0be9898a 753 wm8750_set_bias_level(codec, SND_SOC_BIAS_STANDBY);
abadfc92
RP		 754
755 /* charge wm8750 caps */
0be9898a
MB		 756 if (codec->suspend_bias_level == SND_SOC_BIAS_ON) {
757 wm8750_set_bias_level(codec, SND_SOC_BIAS_PREPARE);
758 codec->bias_level = SND_SOC_BIAS_ON;
42f3030f
MB		 759 schedule_delayed_work(&codec->delayed_work,
760 msecs_to_jiffies(1000));
abadfc92
RP		 761 }
762
763 return 0;
764}
765
766/*
767 * initialise the WM8750 driver
768 * register the mixer and dsp interfaces with the kernel
769 */
770static int wm8750_init(struct snd_soc_device *socdev)
771{
772 struct snd_soc_codec *codec = socdev->codec;
773 int reg, ret = 0;
774
775 codec->name = "WM8750";
776 codec->owner = THIS_MODULE;
777 codec->read = wm8750_read_reg_cache;
778 codec->write = wm8750_write;
0be9898a 779 codec->set_bias_level = wm8750_set_bias_level;
abadfc92
RP		 780 codec->dai = &wm8750_dai;
781 codec->num_dai = 1;
d751b233 782 codec->reg_cache_size = ARRAY_SIZE(wm8750_reg);
713fb939 783 codec->reg_cache = kmemdup(wm8750_reg, sizeof(wm8750_reg), GFP_KERNEL);
abadfc92
RP		 784 if (codec->reg_cache == NULL)
785 return -ENOMEM;
abadfc92
RP		 786
787 wm8750_reset(codec);
788
789 /* register pcms */
790 ret = snd_soc_new_pcms(socdev, SNDRV_DEFAULT_IDX1, SNDRV_DEFAULT_STR1);
791 if (ret < 0) {
e35115a5
LG		 792 printk(KERN_ERR "wm8750: failed to create pcms\n");
793 goto pcm_err;
abadfc92
RP		 794 }
795
796 /* charge output caps */
0be9898a
MB		 797 wm8750_set_bias_level(codec, SND_SOC_BIAS_PREPARE);
798 codec->bias_level = SND_SOC_BIAS_STANDBY;
1321b160 799 schedule_delayed_work(&codec->delayed_work, msecs_to_jiffies(1000));
abadfc92
RP		 800
801 /* set the update bits */
802 reg = wm8750_read_reg_cache(codec, WM8750_LDAC);
803 wm8750_write(codec, WM8750_LDAC, reg | 0x0100);
804 reg = wm8750_read_reg_cache(codec, WM8750_RDAC);
805 wm8750_write(codec, WM8750_RDAC, reg | 0x0100);
806 reg = wm8750_read_reg_cache(codec, WM8750_LOUT1V);
807 wm8750_write(codec, WM8750_LOUT1V, reg | 0x0100);
808 reg = wm8750_read_reg_cache(codec, WM8750_ROUT1V);
809 wm8750_write(codec, WM8750_ROUT1V, reg | 0x0100);
810 reg = wm8750_read_reg_cache(codec, WM8750_LOUT2V);
811 wm8750_write(codec, WM8750_LOUT2V, reg | 0x0100);
812 reg = wm8750_read_reg_cache(codec, WM8750_ROUT2V);
813 wm8750_write(codec, WM8750_ROUT2V, reg | 0x0100);
814 reg = wm8750_read_reg_cache(codec, WM8750_LINVOL);
815 wm8750_write(codec, WM8750_LINVOL, reg | 0x0100);
816 reg = wm8750_read_reg_cache(codec, WM8750_RINVOL);
817 wm8750_write(codec, WM8750_RINVOL, reg | 0x0100);
818
819 wm8750_add_controls(codec);
820 wm8750_add_widgets(codec);
968a6025 821 ret = snd_soc_init_card(socdev);
abadfc92 822 if (ret < 0) {
e35115a5
LG		 823 printk(KERN_ERR "wm8750: failed to register card\n");
824 goto card_err;
abadfc92 825 }
e35115a5 826 return ret;
abadfc92 827
e35115a5
LG		 828card_err:
829 snd_soc_free_pcms(socdev);
830 snd_soc_dapm_free(socdev);
831pcm_err:
832 kfree(codec->reg_cache);
abadfc92
RP		 833 return ret;
834}
835
836/* If the i2c layer weren't so broken, we could pass this kind of data
837 around */
838static struct snd_soc_device *wm8750_socdev;
839
42f3030f 840#if defined(CONFIG_I2C) || defined(CONFIG_I2C_MODULE)
abadfc92
RP		 841
842/*
2f3dfaf5 843 * WM8750 2 wire address is determined by GPIO5
abadfc92
RP		 844 * state during powerup.
845 * low = 0x1a
846 * high = 0x1b
847 */
abadfc92 848
ee1d0099
JD		 849static int wm8750_i2c_probe(struct i2c_client *i2c,
850 const struct i2c_device_id *id)
abadfc92
RP		 851{
852 struct snd_soc_device *socdev = wm8750_socdev;
abadfc92 853 struct snd_soc_codec *codec = socdev->codec;
abadfc92
RP		 854 int ret;
855
abadfc92
RP		 856 i2c_set_clientdata(i2c, codec);
857 codec->control_data = i2c;
858
abadfc92 859 ret = wm8750_init(socdev);
ee1d0099 860 if (ret < 0)
a5c95e90 861 pr_err("failed to initialise WM8750\n");
abadfc92 862
abadfc92
RP		 863 return ret;
864}
865
ee1d0099 866static int wm8750_i2c_remove(struct i2c_client *client)
abadfc92
RP		 867{
868 struct snd_soc_codec *codec = i2c_get_clientdata(client);
abadfc92 869 kfree(codec->reg_cache);
abadfc92
RP		 870 return 0;
871}
872
ee1d0099
JD		 873static const struct i2c_device_id wm8750_i2c_id[] = {
874 { "wm8750", 0 },
875 { }
876};
877MODULE_DEVICE_TABLE(i2c, wm8750_i2c_id);
abadfc92 878
abadfc92
RP		 879static struct i2c_driver wm8750_i2c_driver = {
880 .driver = {
881 .name = "WM8750 I2C Codec",
882 .owner = THIS_MODULE,
883 },
ee1d0099
JD		 884 .probe = wm8750_i2c_probe,
885 .remove = wm8750_i2c_remove,
886 .id_table = wm8750_i2c_id,
abadfc92
RP		 887};
888
ee1d0099
JD		 889static int wm8750_add_i2c_device(struct platform_device *pdev,
890 const struct wm8750_setup_data *setup)
891{
892 struct i2c_board_info info;
893 struct i2c_adapter *adapter;
894 struct i2c_client *client;
895 int ret;
896
897 ret = i2c_add_driver(&wm8750_i2c_driver);
898 if (ret != 0) {
899 dev_err(&pdev->dev, "can't add i2c driver\n");
900 return ret;
901 }
902
903 memset(&info, 0, sizeof(struct i2c_board_info));
904 info.addr = setup->i2c_address;
905 strlcpy(info.type, "wm8750", I2C_NAME_SIZE);
906
907 adapter = i2c_get_adapter(setup->i2c_bus);
908 if (!adapter) {
909 dev_err(&pdev->dev, "can't get i2c adapter %d\n",
910 setup->i2c_bus);
911 goto err_driver;
912 }
913
914 client = i2c_new_device(adapter, &info);
915 i2c_put_adapter(adapter);
916 if (!client) {
917 dev_err(&pdev->dev, "can't add i2c device at 0x%x\n",
918 (unsigned int)info.addr);
919 goto err_driver;
920 }
921
922 return 0;
923
924err_driver:
925 i2c_del_driver(&wm8750_i2c_driver);
926 return -ENODEV;
927}
abadfc92
RP		 928#endif
929
2f3dfaf5
MB		 930#if defined(CONFIG_SPI_MASTER)
931static int __devinit wm8750_spi_probe(struct spi_device *spi)
932{
933 struct snd_soc_device *socdev = wm8750_socdev;
934 struct snd_soc_codec *codec = socdev->codec;
935 int ret;
936
937 codec->control_data = spi;
938
939 ret = wm8750_init(socdev);
940 if (ret < 0)
941 dev_err(&spi->dev, "failed to initialise WM8750\n");
942
943 return ret;
944}
945
946static int __devexit wm8750_spi_remove(struct spi_device *spi)
947{
948 return 0;
949}
950
951static struct spi_driver wm8750_spi_driver = {
952 .driver = {
953 .name = "wm8750",
954 .bus = &spi_bus_type,
955 .owner = THIS_MODULE,
956 },
957 .probe = wm8750_spi_probe,
958 .remove = __devexit_p(wm8750_spi_remove),
959};
960
961static int wm8750_spi_write(struct spi_device *spi, const char *data, int len)
962{
963 struct spi_transfer t;
964 struct spi_message m;
965 u8 msg[2];
966
967 if (len <= 0)
968 return 0;
969
970 msg[0] = data[0];
971 msg[1] = data[1];
972
973 spi_message_init(&m);
974 memset(&t, 0, (sizeof t));
975
976 t.tx_buf = &msg[0];
977 t.len = len;
978
979 spi_message_add_tail(&t, &m);
980 spi_sync(spi, &m);
981
982 return len;
983}
984#endif
985
abadfc92
RP		 986static int wm8750_probe(struct platform_device *pdev)
987{
988 struct snd_soc_device *socdev = platform_get_drvdata(pdev);
989 struct wm8750_setup_data *setup = socdev->codec_data;
990 struct snd_soc_codec *codec;
4422b606 991 struct wm8750_priv *wm8750;
b7c9d852 992 int ret;
abadfc92 993
a5c95e90 994 pr_info("WM8750 Audio Codec %s", WM8750_VERSION);
abadfc92
RP		 995 codec = kzalloc(sizeof(struct snd_soc_codec), GFP_KERNEL);
996 if (codec == NULL)
997 return -ENOMEM;
998
4422b606
LG		 999 wm8750 = kzalloc(sizeof(struct wm8750_priv), GFP_KERNEL);
1000 if (wm8750 == NULL) {
1001 kfree(codec);
1002 return -ENOMEM;
1003 }
1004
1005 codec->private_data = wm8750;
abadfc92
RP		 1006 socdev->codec = codec;
1007 mutex_init(&codec->mutex);
1008 INIT_LIST_HEAD(&codec->dapm_widgets);
1009 INIT_LIST_HEAD(&codec->dapm_paths);
1010 wm8750_socdev = socdev;
1321b160 1011 INIT_DELAYED_WORK(&codec->delayed_work, wm8750_work);
42f3030f 1012
b7c9d852
MB		 1013 ret = -ENODEV;
1014
42f3030f 1015#if defined(CONFIG_I2C) || defined(CONFIG_I2C_MODULE)
abadfc92 1016 if (setup->i2c_address) {
abadfc92 1017 codec->hw_write = (hw_write_t)i2c_master_send;
ee1d0099 1018 ret = wm8750_add_i2c_device(pdev, setup);
abadfc92 1019 }
abadfc92 1020#endif
2f3dfaf5
MB		 1021#if defined(CONFIG_SPI_MASTER)
1022 if (setup->spi) {
1023 codec->hw_write = (hw_write_t)wm8750_spi_write;
1024 ret = spi_register_driver(&wm8750_spi_driver);
1025 if (ret != 0)
1026 printk(KERN_ERR "can't add spi driver");
1027 }
1028#endif
abadfc92 1029
3051e41a
JD		 1030 if (ret != 0) {
1031 kfree(codec->private_data);
1032 kfree(codec);
1033 }
abadfc92
RP		 1034 return ret;
1035}
1036
4422b606
LG		 1037/*
1038 * This function forces any delayed work to be queued and run.
1039 */
1040static int run_delayed_work(struct delayed_work *dwork)
1041{
1042 int ret;
1043
1044 /* cancel any work waiting to be queued. */
1045 ret = cancel_delayed_work(dwork);
1046
1047 /* if there was any work waiting then we run it now and
1048 * wait for it's completion */
1049 if (ret) {
1050 schedule_delayed_work(dwork, 0);
1051 flush_scheduled_work();
1052 }
1053 return ret;
1054}
1055
abadfc92
RP		 1056/* power down chip */
1057static int wm8750_remove(struct platform_device *pdev)
1058{
1059 struct snd_soc_device *socdev = platform_get_drvdata(pdev);
1060 struct snd_soc_codec *codec = socdev->codec;
1061
1062 if (codec->control_data)
0be9898a 1063 wm8750_set_bias_level(codec, SND_SOC_BIAS_OFF);
4422b606 1064 run_delayed_work(&codec->delayed_work);
abadfc92
RP		 1065 snd_soc_free_pcms(socdev);
1066 snd_soc_dapm_free(socdev);
42f3030f 1067#if defined(CONFIG_I2C) || defined(CONFIG_I2C_MODULE)
ee1d0099 1068 i2c_unregister_device(codec->control_data);
abadfc92 1069 i2c_del_driver(&wm8750_i2c_driver);
2f3dfaf5
MB		 1070#endif
1071#if defined(CONFIG_SPI_MASTER)
1072 spi_unregister_driver(&wm8750_spi_driver);
abadfc92 1073#endif
4422b606 1074 kfree(codec->private_data);
abadfc92
RP		 1075 kfree(codec);
1076
1077 return 0;
1078}
1079
1080struct snd_soc_codec_device soc_codec_dev_wm8750 = {
1081 .probe = wm8750_probe,
1082 .remove = wm8750_remove,
1083 .suspend = wm8750_suspend,
1084 .resume = wm8750_resume,
1085};
abadfc92
RP		 1086EXPORT_SYMBOL_GPL(soc_codec_dev_wm8750);
1087
64089b84
MB		 1088static int __devinit wm8750_modinit(void)
1089{
1090 return snd_soc_register_dai(&wm8750_dai);
1091}
1092module_init(wm8750_modinit);
1093
1094static void __exit wm8750_exit(void)
1095{
1096 snd_soc_unregister_dai(&wm8750_dai);
1097}
1098module_exit(wm8750_exit);
1099
abadfc92
RP		 1100MODULE_DESCRIPTION("ASoC WM8750 driver");
1101MODULE_AUTHOR("Liam Girdwood");
1102MODULE_LICENSE("GPL");
Linux kernel - Deliverables
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