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abadfc92 RP |
1 | /* |
2 | * wm8750.c -- WM8750 ALSA SoC audio driver | |
3 | * | |
4 | * Copyright 2005 Openedhand Ltd. | |
5 | * | |
6 | * Author: Richard Purdie <richard@openedhand.com> | |
7 | * | |
8 | * Based on WM8753.c | |
9 | * | |
10 | * This program is free software; you can redistribute it and/or modify | |
11 | * it under the terms of the GNU General Public License version 2 as | |
12 | * published by the Free Software Foundation. | |
13 | */ | |
14 | ||
15 | #include <linux/module.h> | |
16 | #include <linux/moduleparam.h> | |
17 | #include <linux/init.h> | |
18 | #include <linux/delay.h> | |
19 | #include <linux/pm.h> | |
20 | #include <linux/i2c.h> | |
21 | #include <linux/platform_device.h> | |
abadfc92 RP |
22 | #include <sound/core.h> |
23 | #include <sound/pcm.h> | |
24 | #include <sound/pcm_params.h> | |
25 | #include <sound/soc.h> | |
26 | #include <sound/soc-dapm.h> | |
27 | #include <sound/initval.h> | |
28 | ||
29 | #include "wm8750.h" | |
30 | ||
31 | #define AUDIO_NAME "WM8750" | |
4422b606 | 32 | #define WM8750_VERSION "0.12" |
abadfc92 | 33 | |
4422b606 LG |
34 | /* codec private data */ |
35 | struct wm8750_priv { | |
36 | unsigned int sysclk; | |
37 | }; | |
38 | ||
abadfc92 RP |
39 | /* |
40 | * wm8750 register cache | |
41 | * We can't read the WM8750 register space when we | |
42 | * are using 2 wire for device control, so we cache them instead. | |
43 | */ | |
44 | static const u16 wm8750_reg[] = { | |
45 | 0x0097, 0x0097, 0x0079, 0x0079, /* 0 */ | |
46 | 0x0000, 0x0008, 0x0000, 0x000a, /* 4 */ | |
47 | 0x0000, 0x0000, 0x00ff, 0x00ff, /* 8 */ | |
48 | 0x000f, 0x000f, 0x0000, 0x0000, /* 12 */ | |
49 | 0x0000, 0x007b, 0x0000, 0x0032, /* 16 */ | |
50 | 0x0000, 0x00c3, 0x00c3, 0x00c0, /* 20 */ | |
51 | 0x0000, 0x0000, 0x0000, 0x0000, /* 24 */ | |
52 | 0x0000, 0x0000, 0x0000, 0x0000, /* 28 */ | |
53 | 0x0000, 0x0000, 0x0050, 0x0050, /* 32 */ | |
54 | 0x0050, 0x0050, 0x0050, 0x0050, /* 36 */ | |
55 | 0x0079, 0x0079, 0x0079, /* 40 */ | |
56 | }; | |
57 | ||
abadfc92 RP |
58 | /* |
59 | * read wm8750 register cache | |
60 | */ | |
61 | static inline unsigned int wm8750_read_reg_cache(struct snd_soc_codec *codec, | |
62 | unsigned int reg) | |
63 | { | |
64 | u16 *cache = codec->reg_cache; | |
65 | if (reg > WM8750_CACHE_REGNUM) | |
66 | return -1; | |
67 | return cache[reg]; | |
68 | } | |
69 | ||
70 | /* | |
71 | * write wm8750 register cache | |
72 | */ | |
73 | static inline void wm8750_write_reg_cache(struct snd_soc_codec *codec, | |
74 | unsigned int reg, unsigned int value) | |
75 | { | |
76 | u16 *cache = codec->reg_cache; | |
77 | if (reg > WM8750_CACHE_REGNUM) | |
78 | return; | |
79 | cache[reg] = value; | |
80 | } | |
81 | ||
82 | static int wm8750_write(struct snd_soc_codec *codec, unsigned int reg, | |
83 | unsigned int value) | |
84 | { | |
85 | u8 data[2]; | |
86 | ||
87 | /* data is | |
88 | * D15..D9 WM8753 register offset | |
89 | * D8...D0 register data | |
90 | */ | |
91 | data[0] = (reg << 1) | ((value >> 8) & 0x0001); | |
92 | data[1] = value & 0x00ff; | |
93 | ||
42f3030f | 94 | wm8750_write_reg_cache(codec, reg, value); |
abadfc92 RP |
95 | if (codec->hw_write(codec->control_data, data, 2) == 2) |
96 | return 0; | |
97 | else | |
98 | return -EIO; | |
99 | } | |
100 | ||
101 | #define wm8750_reset(c) wm8750_write(c, WM8750_RESET, 0) | |
102 | ||
103 | /* | |
104 | * WM8750 Controls | |
105 | */ | |
106 | static const char *wm8750_bass[] = {"Linear Control", "Adaptive Boost"}; | |
107 | static const char *wm8750_bass_filter[] = { "130Hz @ 48kHz", "200Hz @ 48kHz" }; | |
108 | static const char *wm8750_treble[] = {"8kHz", "4kHz"}; | |
109 | static const char *wm8750_3d_lc[] = {"200Hz", "500Hz"}; | |
110 | static const char *wm8750_3d_uc[] = {"2.2kHz", "1.5kHz"}; | |
111 | static const char *wm8750_3d_func[] = {"Capture", "Playback"}; | |
112 | static const char *wm8750_alc_func[] = {"Off", "Right", "Left", "Stereo"}; | |
113 | static const char *wm8750_ng_type[] = {"Constant PGA Gain", | |
114 | "Mute ADC Output"}; | |
115 | static const char *wm8750_line_mux[] = {"Line 1", "Line 2", "Line 3", "PGA", | |
116 | "Differential"}; | |
117 | static const char *wm8750_pga_sel[] = {"Line 1", "Line 2", "Line 3", | |
118 | "Differential"}; | |
119 | static const char *wm8750_out3[] = {"VREF", "ROUT1 + Vol", "MonoOut", | |
120 | "ROUT1"}; | |
121 | static const char *wm8750_diff_sel[] = {"Line 1", "Line 2"}; | |
122 | static const char *wm8750_adcpol[] = {"Normal", "L Invert", "R Invert", | |
123 | "L + R Invert"}; | |
124 | static const char *wm8750_deemph[] = {"None", "32Khz", "44.1Khz", "48Khz"}; | |
125 | static const char *wm8750_mono_mux[] = {"Stereo", "Mono (Left)", | |
126 | "Mono (Right)", "Digital Mono"}; | |
127 | ||
128 | static const struct soc_enum wm8750_enum[] = { | |
129 | SOC_ENUM_SINGLE(WM8750_BASS, 7, 2, wm8750_bass), | |
130 | SOC_ENUM_SINGLE(WM8750_BASS, 6, 2, wm8750_bass_filter), | |
131 | SOC_ENUM_SINGLE(WM8750_TREBLE, 6, 2, wm8750_treble), | |
132 | SOC_ENUM_SINGLE(WM8750_3D, 5, 2, wm8750_3d_lc), | |
133 | SOC_ENUM_SINGLE(WM8750_3D, 6, 2, wm8750_3d_uc), | |
134 | SOC_ENUM_SINGLE(WM8750_3D, 7, 2, wm8750_3d_func), | |
135 | SOC_ENUM_SINGLE(WM8750_ALC1, 7, 4, wm8750_alc_func), | |
136 | SOC_ENUM_SINGLE(WM8750_NGATE, 1, 2, wm8750_ng_type), | |
137 | SOC_ENUM_SINGLE(WM8750_LOUTM1, 0, 5, wm8750_line_mux), | |
138 | SOC_ENUM_SINGLE(WM8750_ROUTM1, 0, 5, wm8750_line_mux), | |
139 | SOC_ENUM_SINGLE(WM8750_LADCIN, 6, 4, wm8750_pga_sel), /* 10 */ | |
140 | SOC_ENUM_SINGLE(WM8750_RADCIN, 6, 4, wm8750_pga_sel), | |
141 | SOC_ENUM_SINGLE(WM8750_ADCTL2, 7, 4, wm8750_out3), | |
142 | SOC_ENUM_SINGLE(WM8750_ADCIN, 8, 2, wm8750_diff_sel), | |
143 | SOC_ENUM_SINGLE(WM8750_ADCDAC, 5, 4, wm8750_adcpol), | |
144 | SOC_ENUM_SINGLE(WM8750_ADCDAC, 1, 4, wm8750_deemph), | |
145 | SOC_ENUM_SINGLE(WM8750_ADCIN, 6, 4, wm8750_mono_mux), /* 16 */ | |
146 | ||
147 | }; | |
148 | ||
149 | static const struct snd_kcontrol_new wm8750_snd_controls[] = { | |
150 | ||
151 | SOC_DOUBLE_R("Capture Volume", WM8750_LINVOL, WM8750_RINVOL, 0, 63, 0), | |
152 | SOC_DOUBLE_R("Capture ZC Switch", WM8750_LINVOL, WM8750_RINVOL, 6, 1, 0), | |
153 | SOC_DOUBLE_R("Capture Switch", WM8750_LINVOL, WM8750_RINVOL, 7, 1, 1), | |
154 | ||
bd903b6e | 155 | SOC_DOUBLE_R("Headphone Playback ZC Switch", WM8750_LOUT1V, |
abadfc92 | 156 | WM8750_ROUT1V, 7, 1, 0), |
bd903b6e | 157 | SOC_DOUBLE_R("Speaker Playback ZC Switch", WM8750_LOUT2V, |
abadfc92 RP |
158 | WM8750_ROUT2V, 7, 1, 0), |
159 | ||
160 | SOC_ENUM("Playback De-emphasis", wm8750_enum[15]), | |
161 | ||
162 | SOC_ENUM("Capture Polarity", wm8750_enum[14]), | |
163 | SOC_SINGLE("Playback 6dB Attenuate", WM8750_ADCDAC, 7, 1, 0), | |
164 | SOC_SINGLE("Capture 6dB Attenuate", WM8750_ADCDAC, 8, 1, 0), | |
165 | ||
166 | SOC_DOUBLE_R("PCM Volume", WM8750_LDAC, WM8750_RDAC, 0, 255, 0), | |
167 | ||
168 | SOC_ENUM("Bass Boost", wm8750_enum[0]), | |
169 | SOC_ENUM("Bass Filter", wm8750_enum[1]), | |
170 | SOC_SINGLE("Bass Volume", WM8750_BASS, 0, 15, 1), | |
171 | ||
6a7b8cf4 | 172 | SOC_SINGLE("Treble Volume", WM8750_TREBLE, 0, 15, 1), |
abadfc92 RP |
173 | SOC_ENUM("Treble Cut-off", wm8750_enum[2]), |
174 | ||
175 | SOC_SINGLE("3D Switch", WM8750_3D, 0, 1, 0), | |
176 | SOC_SINGLE("3D Volume", WM8750_3D, 1, 15, 0), | |
177 | SOC_ENUM("3D Lower Cut-off", wm8750_enum[3]), | |
178 | SOC_ENUM("3D Upper Cut-off", wm8750_enum[4]), | |
179 | SOC_ENUM("3D Mode", wm8750_enum[5]), | |
180 | ||
181 | SOC_SINGLE("ALC Capture Target Volume", WM8750_ALC1, 0, 7, 0), | |
182 | SOC_SINGLE("ALC Capture Max Volume", WM8750_ALC1, 4, 7, 0), | |
183 | SOC_ENUM("ALC Capture Function", wm8750_enum[6]), | |
184 | SOC_SINGLE("ALC Capture ZC Switch", WM8750_ALC2, 7, 1, 0), | |
185 | SOC_SINGLE("ALC Capture Hold Time", WM8750_ALC2, 0, 15, 0), | |
186 | SOC_SINGLE("ALC Capture Decay Time", WM8750_ALC3, 4, 15, 0), | |
187 | SOC_SINGLE("ALC Capture Attack Time", WM8750_ALC3, 0, 15, 0), | |
188 | SOC_SINGLE("ALC Capture NG Threshold", WM8750_NGATE, 3, 31, 0), | |
189 | SOC_ENUM("ALC Capture NG Type", wm8750_enum[4]), | |
190 | SOC_SINGLE("ALC Capture NG Switch", WM8750_NGATE, 0, 1, 0), | |
191 | ||
192 | SOC_SINGLE("Left ADC Capture Volume", WM8750_LADC, 0, 255, 0), | |
193 | SOC_SINGLE("Right ADC Capture Volume", WM8750_RADC, 0, 255, 0), | |
194 | ||
195 | SOC_SINGLE("ZC Timeout Switch", WM8750_ADCTL1, 0, 1, 0), | |
196 | SOC_SINGLE("Playback Invert Switch", WM8750_ADCTL1, 1, 1, 0), | |
197 | ||
bd903b6e | 198 | SOC_SINGLE("Right Speaker Playback Invert Switch", WM8750_ADCTL2, 4, 1, 0), |
abadfc92 RP |
199 | |
200 | /* Unimplemented */ | |
201 | /* ADCDAC Bit 0 - ADCHPD */ | |
202 | /* ADCDAC Bit 4 - HPOR */ | |
203 | /* ADCTL1 Bit 2,3 - DATSEL */ | |
204 | /* ADCTL1 Bit 4,5 - DMONOMIX */ | |
205 | /* ADCTL1 Bit 6,7 - VSEL */ | |
206 | /* ADCTL2 Bit 2 - LRCM */ | |
207 | /* ADCTL2 Bit 3 - TRI */ | |
208 | /* ADCTL3 Bit 5 - HPFLREN */ | |
209 | /* ADCTL3 Bit 6 - VROI */ | |
210 | /* ADCTL3 Bit 7,8 - ADCLRM */ | |
211 | /* ADCIN Bit 4 - LDCM */ | |
212 | /* ADCIN Bit 5 - RDCM */ | |
213 | ||
214 | SOC_DOUBLE_R("Mic Boost", WM8750_LADCIN, WM8750_RADCIN, 4, 3, 0), | |
215 | ||
216 | SOC_DOUBLE_R("Bypass Left Playback Volume", WM8750_LOUTM1, | |
217 | WM8750_LOUTM2, 4, 7, 1), | |
218 | SOC_DOUBLE_R("Bypass Right Playback Volume", WM8750_ROUTM1, | |
219 | WM8750_ROUTM2, 4, 7, 1), | |
220 | SOC_DOUBLE_R("Bypass Mono Playback Volume", WM8750_MOUTM1, | |
221 | WM8750_MOUTM2, 4, 7, 1), | |
222 | ||
223 | SOC_SINGLE("Mono Playback ZC Switch", WM8750_MOUTV, 7, 1, 0), | |
224 | ||
bd903b6e LG |
225 | SOC_DOUBLE_R("Headphone Playback Volume", WM8750_LOUT1V, WM8750_ROUT1V, |
226 | 0, 127, 0), | |
227 | SOC_DOUBLE_R("Speaker Playback Volume", WM8750_LOUT2V, WM8750_ROUT2V, | |
228 | 0, 127, 0), | |
abadfc92 RP |
229 | |
230 | SOC_SINGLE("Mono Playback Volume", WM8750_MOUTV, 0, 127, 0), | |
231 | ||
232 | }; | |
233 | ||
234 | /* add non dapm controls */ | |
235 | static int wm8750_add_controls(struct snd_soc_codec *codec) | |
236 | { | |
237 | int err, i; | |
238 | ||
239 | for (i = 0; i < ARRAY_SIZE(wm8750_snd_controls); i++) { | |
240 | err = snd_ctl_add(codec->card, | |
42f3030f MB |
241 | snd_soc_cnew(&wm8750_snd_controls[i], |
242 | codec, NULL)); | |
abadfc92 RP |
243 | if (err < 0) |
244 | return err; | |
245 | } | |
246 | return 0; | |
247 | } | |
248 | ||
249 | /* | |
250 | * DAPM Controls | |
251 | */ | |
252 | ||
253 | /* Left Mixer */ | |
254 | static const struct snd_kcontrol_new wm8750_left_mixer_controls[] = { | |
255 | SOC_DAPM_SINGLE("Playback Switch", WM8750_LOUTM1, 8, 1, 0), | |
256 | SOC_DAPM_SINGLE("Left Bypass Switch", WM8750_LOUTM1, 7, 1, 0), | |
257 | SOC_DAPM_SINGLE("Right Playback Switch", WM8750_LOUTM2, 8, 1, 0), | |
258 | SOC_DAPM_SINGLE("Right Bypass Switch", WM8750_LOUTM2, 7, 1, 0), | |
259 | }; | |
260 | ||
261 | /* Right Mixer */ | |
262 | static const struct snd_kcontrol_new wm8750_right_mixer_controls[] = { | |
263 | SOC_DAPM_SINGLE("Left Playback Switch", WM8750_ROUTM1, 8, 1, 0), | |
264 | SOC_DAPM_SINGLE("Left Bypass Switch", WM8750_ROUTM1, 7, 1, 0), | |
265 | SOC_DAPM_SINGLE("Playback Switch", WM8750_ROUTM2, 8, 1, 0), | |
266 | SOC_DAPM_SINGLE("Right Bypass Switch", WM8750_ROUTM2, 7, 1, 0), | |
267 | }; | |
268 | ||
269 | /* Mono Mixer */ | |
270 | static const struct snd_kcontrol_new wm8750_mono_mixer_controls[] = { | |
271 | SOC_DAPM_SINGLE("Left Playback Switch", WM8750_MOUTM1, 8, 1, 0), | |
272 | SOC_DAPM_SINGLE("Left Bypass Switch", WM8750_MOUTM1, 7, 1, 0), | |
273 | SOC_DAPM_SINGLE("Right Playback Switch", WM8750_MOUTM2, 8, 1, 0), | |
274 | SOC_DAPM_SINGLE("Right Bypass Switch", WM8750_MOUTM2, 7, 1, 0), | |
275 | }; | |
276 | ||
277 | /* Left Line Mux */ | |
278 | static const struct snd_kcontrol_new wm8750_left_line_controls = | |
279 | SOC_DAPM_ENUM("Route", wm8750_enum[8]); | |
280 | ||
281 | /* Right Line Mux */ | |
282 | static const struct snd_kcontrol_new wm8750_right_line_controls = | |
283 | SOC_DAPM_ENUM("Route", wm8750_enum[9]); | |
284 | ||
285 | /* Left PGA Mux */ | |
286 | static const struct snd_kcontrol_new wm8750_left_pga_controls = | |
287 | SOC_DAPM_ENUM("Route", wm8750_enum[10]); | |
288 | ||
289 | /* Right PGA Mux */ | |
290 | static const struct snd_kcontrol_new wm8750_right_pga_controls = | |
291 | SOC_DAPM_ENUM("Route", wm8750_enum[11]); | |
292 | ||
293 | /* Out 3 Mux */ | |
294 | static const struct snd_kcontrol_new wm8750_out3_controls = | |
295 | SOC_DAPM_ENUM("Route", wm8750_enum[12]); | |
296 | ||
297 | /* Differential Mux */ | |
298 | static const struct snd_kcontrol_new wm8750_diffmux_controls = | |
299 | SOC_DAPM_ENUM("Route", wm8750_enum[13]); | |
300 | ||
301 | /* Mono ADC Mux */ | |
302 | static const struct snd_kcontrol_new wm8750_monomux_controls = | |
303 | SOC_DAPM_ENUM("Route", wm8750_enum[16]); | |
304 | ||
305 | static const struct snd_soc_dapm_widget wm8750_dapm_widgets[] = { | |
306 | SND_SOC_DAPM_MIXER("Left Mixer", SND_SOC_NOPM, 0, 0, | |
307 | &wm8750_left_mixer_controls[0], | |
308 | ARRAY_SIZE(wm8750_left_mixer_controls)), | |
309 | SND_SOC_DAPM_MIXER("Right Mixer", SND_SOC_NOPM, 0, 0, | |
310 | &wm8750_right_mixer_controls[0], | |
311 | ARRAY_SIZE(wm8750_right_mixer_controls)), | |
312 | SND_SOC_DAPM_MIXER("Mono Mixer", WM8750_PWR2, 2, 0, | |
313 | &wm8750_mono_mixer_controls[0], | |
314 | ARRAY_SIZE(wm8750_mono_mixer_controls)), | |
315 | ||
316 | SND_SOC_DAPM_PGA("Right Out 2", WM8750_PWR2, 3, 0, NULL, 0), | |
317 | SND_SOC_DAPM_PGA("Left Out 2", WM8750_PWR2, 4, 0, NULL, 0), | |
318 | SND_SOC_DAPM_PGA("Right Out 1", WM8750_PWR2, 5, 0, NULL, 0), | |
319 | SND_SOC_DAPM_PGA("Left Out 1", WM8750_PWR2, 6, 0, NULL, 0), | |
320 | SND_SOC_DAPM_DAC("Right DAC", "Right Playback", WM8750_PWR2, 7, 0), | |
321 | SND_SOC_DAPM_DAC("Left DAC", "Left Playback", WM8750_PWR2, 8, 0), | |
322 | ||
323 | SND_SOC_DAPM_MICBIAS("Mic Bias", WM8750_PWR1, 1, 0), | |
324 | SND_SOC_DAPM_ADC("Right ADC", "Right Capture", WM8750_PWR1, 2, 0), | |
325 | SND_SOC_DAPM_ADC("Left ADC", "Left Capture", WM8750_PWR1, 3, 0), | |
326 | ||
327 | SND_SOC_DAPM_MUX("Left PGA Mux", WM8750_PWR1, 5, 0, | |
328 | &wm8750_left_pga_controls), | |
329 | SND_SOC_DAPM_MUX("Right PGA Mux", WM8750_PWR1, 4, 0, | |
330 | &wm8750_right_pga_controls), | |
331 | SND_SOC_DAPM_MUX("Left Line Mux", SND_SOC_NOPM, 0, 0, | |
332 | &wm8750_left_line_controls), | |
333 | SND_SOC_DAPM_MUX("Right Line Mux", SND_SOC_NOPM, 0, 0, | |
334 | &wm8750_right_line_controls), | |
335 | ||
336 | SND_SOC_DAPM_MUX("Out3 Mux", SND_SOC_NOPM, 0, 0, &wm8750_out3_controls), | |
337 | SND_SOC_DAPM_PGA("Out 3", WM8750_PWR2, 1, 0, NULL, 0), | |
338 | SND_SOC_DAPM_PGA("Mono Out 1", WM8750_PWR2, 2, 0, NULL, 0), | |
339 | ||
340 | SND_SOC_DAPM_MUX("Differential Mux", SND_SOC_NOPM, 0, 0, | |
341 | &wm8750_diffmux_controls), | |
342 | SND_SOC_DAPM_MUX("Left ADC Mux", SND_SOC_NOPM, 0, 0, | |
343 | &wm8750_monomux_controls), | |
344 | SND_SOC_DAPM_MUX("Right ADC Mux", SND_SOC_NOPM, 0, 0, | |
345 | &wm8750_monomux_controls), | |
346 | ||
347 | SND_SOC_DAPM_OUTPUT("LOUT1"), | |
348 | SND_SOC_DAPM_OUTPUT("ROUT1"), | |
349 | SND_SOC_DAPM_OUTPUT("LOUT2"), | |
350 | SND_SOC_DAPM_OUTPUT("ROUT2"), | |
23ba79bd | 351 | SND_SOC_DAPM_OUTPUT("MONO1"), |
abadfc92 | 352 | SND_SOC_DAPM_OUTPUT("OUT3"), |
04489eeb | 353 | SND_SOC_DAPM_OUTPUT("VREF"), |
abadfc92 RP |
354 | |
355 | SND_SOC_DAPM_INPUT("LINPUT1"), | |
356 | SND_SOC_DAPM_INPUT("LINPUT2"), | |
357 | SND_SOC_DAPM_INPUT("LINPUT3"), | |
358 | SND_SOC_DAPM_INPUT("RINPUT1"), | |
359 | SND_SOC_DAPM_INPUT("RINPUT2"), | |
360 | SND_SOC_DAPM_INPUT("RINPUT3"), | |
361 | }; | |
362 | ||
a65f0568 | 363 | static const struct snd_soc_dapm_route audio_map[] = { |
abadfc92 RP |
364 | /* left mixer */ |
365 | {"Left Mixer", "Playback Switch", "Left DAC"}, | |
366 | {"Left Mixer", "Left Bypass Switch", "Left Line Mux"}, | |
367 | {"Left Mixer", "Right Playback Switch", "Right DAC"}, | |
368 | {"Left Mixer", "Right Bypass Switch", "Right Line Mux"}, | |
369 | ||
370 | /* right mixer */ | |
371 | {"Right Mixer", "Left Playback Switch", "Left DAC"}, | |
372 | {"Right Mixer", "Left Bypass Switch", "Left Line Mux"}, | |
373 | {"Right Mixer", "Playback Switch", "Right DAC"}, | |
374 | {"Right Mixer", "Right Bypass Switch", "Right Line Mux"}, | |
375 | ||
376 | /* left out 1 */ | |
377 | {"Left Out 1", NULL, "Left Mixer"}, | |
378 | {"LOUT1", NULL, "Left Out 1"}, | |
379 | ||
380 | /* left out 2 */ | |
381 | {"Left Out 2", NULL, "Left Mixer"}, | |
382 | {"LOUT2", NULL, "Left Out 2"}, | |
383 | ||
384 | /* right out 1 */ | |
385 | {"Right Out 1", NULL, "Right Mixer"}, | |
386 | {"ROUT1", NULL, "Right Out 1"}, | |
387 | ||
388 | /* right out 2 */ | |
389 | {"Right Out 2", NULL, "Right Mixer"}, | |
390 | {"ROUT2", NULL, "Right Out 2"}, | |
391 | ||
392 | /* mono mixer */ | |
393 | {"Mono Mixer", "Left Playback Switch", "Left DAC"}, | |
394 | {"Mono Mixer", "Left Bypass Switch", "Left Line Mux"}, | |
395 | {"Mono Mixer", "Right Playback Switch", "Right DAC"}, | |
396 | {"Mono Mixer", "Right Bypass Switch", "Right Line Mux"}, | |
397 | ||
398 | /* mono out */ | |
399 | {"Mono Out 1", NULL, "Mono Mixer"}, | |
400 | {"MONO1", NULL, "Mono Out 1"}, | |
401 | ||
402 | /* out 3 */ | |
403 | {"Out3 Mux", "VREF", "VREF"}, | |
404 | {"Out3 Mux", "ROUT1 + Vol", "ROUT1"}, | |
405 | {"Out3 Mux", "ROUT1", "Right Mixer"}, | |
406 | {"Out3 Mux", "MonoOut", "MONO1"}, | |
407 | {"Out 3", NULL, "Out3 Mux"}, | |
408 | {"OUT3", NULL, "Out 3"}, | |
409 | ||
410 | /* Left Line Mux */ | |
411 | {"Left Line Mux", "Line 1", "LINPUT1"}, | |
412 | {"Left Line Mux", "Line 2", "LINPUT2"}, | |
413 | {"Left Line Mux", "Line 3", "LINPUT3"}, | |
414 | {"Left Line Mux", "PGA", "Left PGA Mux"}, | |
415 | {"Left Line Mux", "Differential", "Differential Mux"}, | |
416 | ||
417 | /* Right Line Mux */ | |
418 | {"Right Line Mux", "Line 1", "RINPUT1"}, | |
419 | {"Right Line Mux", "Line 2", "RINPUT2"}, | |
420 | {"Right Line Mux", "Line 3", "RINPUT3"}, | |
421 | {"Right Line Mux", "PGA", "Right PGA Mux"}, | |
422 | {"Right Line Mux", "Differential", "Differential Mux"}, | |
423 | ||
424 | /* Left PGA Mux */ | |
425 | {"Left PGA Mux", "Line 1", "LINPUT1"}, | |
426 | {"Left PGA Mux", "Line 2", "LINPUT2"}, | |
427 | {"Left PGA Mux", "Line 3", "LINPUT3"}, | |
428 | {"Left PGA Mux", "Differential", "Differential Mux"}, | |
429 | ||
430 | /* Right PGA Mux */ | |
431 | {"Right PGA Mux", "Line 1", "RINPUT1"}, | |
432 | {"Right PGA Mux", "Line 2", "RINPUT2"}, | |
433 | {"Right PGA Mux", "Line 3", "RINPUT3"}, | |
434 | {"Right PGA Mux", "Differential", "Differential Mux"}, | |
435 | ||
436 | /* Differential Mux */ | |
437 | {"Differential Mux", "Line 1", "LINPUT1"}, | |
438 | {"Differential Mux", "Line 1", "RINPUT1"}, | |
439 | {"Differential Mux", "Line 2", "LINPUT2"}, | |
440 | {"Differential Mux", "Line 2", "RINPUT2"}, | |
441 | ||
442 | /* Left ADC Mux */ | |
443 | {"Left ADC Mux", "Stereo", "Left PGA Mux"}, | |
444 | {"Left ADC Mux", "Mono (Left)", "Left PGA Mux"}, | |
445 | {"Left ADC Mux", "Digital Mono", "Left PGA Mux"}, | |
446 | ||
447 | /* Right ADC Mux */ | |
448 | {"Right ADC Mux", "Stereo", "Right PGA Mux"}, | |
449 | {"Right ADC Mux", "Mono (Right)", "Right PGA Mux"}, | |
450 | {"Right ADC Mux", "Digital Mono", "Right PGA Mux"}, | |
451 | ||
452 | /* ADC */ | |
453 | {"Left ADC", NULL, "Left ADC Mux"}, | |
454 | {"Right ADC", NULL, "Right ADC Mux"}, | |
abadfc92 RP |
455 | }; |
456 | ||
457 | static int wm8750_add_widgets(struct snd_soc_codec *codec) | |
458 | { | |
a65f0568 MB |
459 | snd_soc_dapm_new_controls(codec, wm8750_dapm_widgets, |
460 | ARRAY_SIZE(wm8750_dapm_widgets)); | |
abadfc92 | 461 | |
a65f0568 | 462 | snd_soc_dapm_add_routes(codec, audio_map, ARRAY_SIZE(audio_map)); |
abadfc92 RP |
463 | |
464 | snd_soc_dapm_new_widgets(codec); | |
465 | return 0; | |
466 | } | |
467 | ||
468 | struct _coeff_div { | |
469 | u32 mclk; | |
470 | u32 rate; | |
471 | u16 fs; | |
472 | u8 sr:5; | |
473 | u8 usb:1; | |
474 | }; | |
475 | ||
476 | /* codec hifi mclk clock divider coefficients */ | |
477 | static const struct _coeff_div coeff_div[] = { | |
478 | /* 8k */ | |
479 | {12288000, 8000, 1536, 0x6, 0x0}, | |
480 | {11289600, 8000, 1408, 0x16, 0x0}, | |
481 | {18432000, 8000, 2304, 0x7, 0x0}, | |
482 | {16934400, 8000, 2112, 0x17, 0x0}, | |
483 | {12000000, 8000, 1500, 0x6, 0x1}, | |
484 | ||
485 | /* 11.025k */ | |
486 | {11289600, 11025, 1024, 0x18, 0x0}, | |
487 | {16934400, 11025, 1536, 0x19, 0x0}, | |
488 | {12000000, 11025, 1088, 0x19, 0x1}, | |
489 | ||
490 | /* 16k */ | |
491 | {12288000, 16000, 768, 0xa, 0x0}, | |
492 | {18432000, 16000, 1152, 0xb, 0x0}, | |
493 | {12000000, 16000, 750, 0xa, 0x1}, | |
494 | ||
495 | /* 22.05k */ | |
496 | {11289600, 22050, 512, 0x1a, 0x0}, | |
497 | {16934400, 22050, 768, 0x1b, 0x0}, | |
498 | {12000000, 22050, 544, 0x1b, 0x1}, | |
499 | ||
500 | /* 32k */ | |
501 | {12288000, 32000, 384, 0xc, 0x0}, | |
502 | {18432000, 32000, 576, 0xd, 0x0}, | |
503 | {12000000, 32000, 375, 0xa, 0x1}, | |
504 | ||
505 | /* 44.1k */ | |
506 | {11289600, 44100, 256, 0x10, 0x0}, | |
507 | {16934400, 44100, 384, 0x11, 0x0}, | |
508 | {12000000, 44100, 272, 0x11, 0x1}, | |
509 | ||
510 | /* 48k */ | |
511 | {12288000, 48000, 256, 0x0, 0x0}, | |
512 | {18432000, 48000, 384, 0x1, 0x0}, | |
513 | {12000000, 48000, 250, 0x0, 0x1}, | |
514 | ||
515 | /* 88.2k */ | |
516 | {11289600, 88200, 128, 0x1e, 0x0}, | |
517 | {16934400, 88200, 192, 0x1f, 0x0}, | |
518 | {12000000, 88200, 136, 0x1f, 0x1}, | |
519 | ||
520 | /* 96k */ | |
521 | {12288000, 96000, 128, 0xe, 0x0}, | |
522 | {18432000, 96000, 192, 0xf, 0x0}, | |
523 | {12000000, 96000, 125, 0xe, 0x1}, | |
524 | }; | |
525 | ||
526 | static inline int get_coeff(int mclk, int rate) | |
527 | { | |
528 | int i; | |
529 | ||
530 | for (i = 0; i < ARRAY_SIZE(coeff_div); i++) { | |
531 | if (coeff_div[i].rate == rate && coeff_div[i].mclk == mclk) | |
532 | return i; | |
533 | } | |
a71a468a LG |
534 | |
535 | printk(KERN_ERR "wm8750: could not get coeff for mclk %d @ rate %d\n", | |
536 | mclk, rate); | |
abadfc92 RP |
537 | return -EINVAL; |
538 | } | |
539 | ||
e550e17f | 540 | static int wm8750_set_dai_sysclk(struct snd_soc_dai *codec_dai, |
4422b606 | 541 | int clk_id, unsigned int freq, int dir) |
abadfc92 | 542 | { |
4422b606 LG |
543 | struct snd_soc_codec *codec = codec_dai->codec; |
544 | struct wm8750_priv *wm8750 = codec->private_data; | |
545 | ||
546 | switch (freq) { | |
547 | case 11289600: | |
548 | case 12000000: | |
549 | case 12288000: | |
550 | case 16934400: | |
551 | case 18432000: | |
552 | wm8750->sysclk = freq; | |
553 | return 0; | |
554 | } | |
555 | return -EINVAL; | |
abadfc92 RP |
556 | } |
557 | ||
e550e17f | 558 | static int wm8750_set_dai_fmt(struct snd_soc_dai *codec_dai, |
4422b606 | 559 | unsigned int fmt) |
abadfc92 | 560 | { |
4422b606 LG |
561 | struct snd_soc_codec *codec = codec_dai->codec; |
562 | u16 iface = 0; | |
abadfc92 RP |
563 | |
564 | /* set master/slave audio interface */ | |
4422b606 | 565 | switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) { |
abadfc92 RP |
566 | case SND_SOC_DAIFMT_CBM_CFM: |
567 | iface = 0x0040; | |
568 | break; | |
569 | case SND_SOC_DAIFMT_CBS_CFS: | |
570 | break; | |
4422b606 LG |
571 | default: |
572 | return -EINVAL; | |
abadfc92 RP |
573 | } |
574 | ||
575 | /* interface format */ | |
4422b606 | 576 | switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) { |
abadfc92 RP |
577 | case SND_SOC_DAIFMT_I2S: |
578 | iface |= 0x0002; | |
579 | break; | |
580 | case SND_SOC_DAIFMT_RIGHT_J: | |
581 | break; | |
582 | case SND_SOC_DAIFMT_LEFT_J: | |
583 | iface |= 0x0001; | |
584 | break; | |
585 | case SND_SOC_DAIFMT_DSP_A: | |
586 | iface |= 0x0003; | |
587 | break; | |
588 | case SND_SOC_DAIFMT_DSP_B: | |
589 | iface |= 0x0013; | |
590 | break; | |
4422b606 LG |
591 | default: |
592 | return -EINVAL; | |
abadfc92 RP |
593 | } |
594 | ||
595 | /* clock inversion */ | |
4422b606 | 596 | switch (fmt & SND_SOC_DAIFMT_INV_MASK) { |
abadfc92 RP |
597 | case SND_SOC_DAIFMT_NB_NF: |
598 | break; | |
599 | case SND_SOC_DAIFMT_IB_IF: | |
600 | iface |= 0x0090; | |
601 | break; | |
602 | case SND_SOC_DAIFMT_IB_NF: | |
603 | iface |= 0x0080; | |
604 | break; | |
605 | case SND_SOC_DAIFMT_NB_IF: | |
606 | iface |= 0x0010; | |
607 | break; | |
4422b606 LG |
608 | default: |
609 | return -EINVAL; | |
abadfc92 RP |
610 | } |
611 | ||
4422b606 LG |
612 | wm8750_write(codec, WM8750_IFACE, iface); |
613 | return 0; | |
614 | } | |
615 | ||
616 | static int wm8750_pcm_hw_params(struct snd_pcm_substream *substream, | |
617 | struct snd_pcm_hw_params *params) | |
618 | { | |
619 | struct snd_soc_pcm_runtime *rtd = substream->private_data; | |
620 | struct snd_soc_device *socdev = rtd->socdev; | |
621 | struct snd_soc_codec *codec = socdev->codec; | |
622 | struct wm8750_priv *wm8750 = codec->private_data; | |
623 | u16 iface = wm8750_read_reg_cache(codec, WM8750_IFACE) & 0x1f3; | |
624 | u16 srate = wm8750_read_reg_cache(codec, WM8750_SRATE) & 0x1c0; | |
625 | int coeff = get_coeff(wm8750->sysclk, params_rate(params)); | |
626 | ||
627 | /* bit size */ | |
628 | switch (params_format(params)) { | |
629 | case SNDRV_PCM_FORMAT_S16_LE: | |
abadfc92 | 630 | break; |
4422b606 LG |
631 | case SNDRV_PCM_FORMAT_S20_3LE: |
632 | iface |= 0x0004; | |
abadfc92 | 633 | break; |
4422b606 LG |
634 | case SNDRV_PCM_FORMAT_S24_LE: |
635 | iface |= 0x0008; | |
abadfc92 | 636 | break; |
4422b606 LG |
637 | case SNDRV_PCM_FORMAT_S32_LE: |
638 | iface |= 0x000c; | |
abadfc92 RP |
639 | break; |
640 | } | |
641 | ||
642 | /* set iface & srate */ | |
643 | wm8750_write(codec, WM8750_IFACE, iface); | |
4422b606 LG |
644 | if (coeff >= 0) |
645 | wm8750_write(codec, WM8750_SRATE, srate | | |
646 | (coeff_div[coeff].sr << 1) | coeff_div[coeff].usb); | |
abadfc92 RP |
647 | |
648 | return 0; | |
649 | } | |
650 | ||
e550e17f | 651 | static int wm8750_mute(struct snd_soc_dai *dai, int mute) |
abadfc92 | 652 | { |
4422b606 | 653 | struct snd_soc_codec *codec = dai->codec; |
abadfc92 | 654 | u16 mute_reg = wm8750_read_reg_cache(codec, WM8750_ADCDAC) & 0xfff7; |
4422b606 | 655 | |
abadfc92 RP |
656 | if (mute) |
657 | wm8750_write(codec, WM8750_ADCDAC, mute_reg | 0x8); | |
658 | else | |
659 | wm8750_write(codec, WM8750_ADCDAC, mute_reg); | |
660 | return 0; | |
661 | } | |
662 | ||
0be9898a MB |
663 | static int wm8750_set_bias_level(struct snd_soc_codec *codec, |
664 | enum snd_soc_bias_level level) | |
abadfc92 RP |
665 | { |
666 | u16 pwr_reg = wm8750_read_reg_cache(codec, WM8750_PWR1) & 0xfe3e; | |
667 | ||
0be9898a MB |
668 | switch (level) { |
669 | case SND_SOC_BIAS_ON: | |
abadfc92 RP |
670 | /* set vmid to 50k and unmute dac */ |
671 | wm8750_write(codec, WM8750_PWR1, pwr_reg | 0x00c0); | |
672 | break; | |
0be9898a | 673 | case SND_SOC_BIAS_PREPARE: |
abadfc92 RP |
674 | /* set vmid to 5k for quick power up */ |
675 | wm8750_write(codec, WM8750_PWR1, pwr_reg | 0x01c1); | |
676 | break; | |
0be9898a | 677 | case SND_SOC_BIAS_STANDBY: |
abadfc92 RP |
678 | /* mute dac and set vmid to 500k, enable VREF */ |
679 | wm8750_write(codec, WM8750_PWR1, pwr_reg | 0x0141); | |
680 | break; | |
0be9898a | 681 | case SND_SOC_BIAS_OFF: |
abadfc92 RP |
682 | wm8750_write(codec, WM8750_PWR1, 0x0001); |
683 | break; | |
684 | } | |
0be9898a | 685 | codec->bias_level = level; |
abadfc92 RP |
686 | return 0; |
687 | } | |
688 | ||
4422b606 | 689 | #define WM8750_RATES (SNDRV_PCM_RATE_8000 | SNDRV_PCM_RATE_11025 |\ |
42f3030f MB |
690 | SNDRV_PCM_RATE_16000 | SNDRV_PCM_RATE_22050 | SNDRV_PCM_RATE_44100 | \ |
691 | SNDRV_PCM_RATE_48000 | SNDRV_PCM_RATE_88200 | SNDRV_PCM_RATE_96000) | |
4422b606 LG |
692 | |
693 | #define WM8750_FORMATS (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S20_3LE |\ | |
694 | SNDRV_PCM_FMTBIT_S24_LE) | |
695 | ||
e550e17f | 696 | struct snd_soc_dai wm8750_dai = { |
abadfc92 RP |
697 | .name = "WM8750", |
698 | .playback = { | |
699 | .stream_name = "Playback", | |
700 | .channels_min = 1, | |
701 | .channels_max = 2, | |
4422b606 LG |
702 | .rates = WM8750_RATES, |
703 | .formats = WM8750_FORMATS,}, | |
abadfc92 RP |
704 | .capture = { |
705 | .stream_name = "Capture", | |
706 | .channels_min = 1, | |
707 | .channels_max = 2, | |
4422b606 LG |
708 | .rates = WM8750_RATES, |
709 | .formats = WM8750_FORMATS,}, | |
abadfc92 | 710 | .ops = { |
4422b606 | 711 | .hw_params = wm8750_pcm_hw_params, |
abadfc92 | 712 | }, |
4422b606 LG |
713 | .dai_ops = { |
714 | .digital_mute = wm8750_mute, | |
715 | .set_fmt = wm8750_set_dai_fmt, | |
716 | .set_sysclk = wm8750_set_dai_sysclk, | |
abadfc92 RP |
717 | }, |
718 | }; | |
719 | EXPORT_SYMBOL_GPL(wm8750_dai); | |
720 | ||
1321b160 | 721 | static void wm8750_work(struct work_struct *work) |
abadfc92 | 722 | { |
1321b160 TI |
723 | struct snd_soc_codec *codec = |
724 | container_of(work, struct snd_soc_codec, delayed_work.work); | |
0be9898a | 725 | wm8750_set_bias_level(codec, codec->bias_level); |
abadfc92 RP |
726 | } |
727 | ||
728 | static int wm8750_suspend(struct platform_device *pdev, pm_message_t state) | |
729 | { | |
730 | struct snd_soc_device *socdev = platform_get_drvdata(pdev); | |
731 | struct snd_soc_codec *codec = socdev->codec; | |
732 | ||
0be9898a | 733 | wm8750_set_bias_level(codec, SND_SOC_BIAS_OFF); |
abadfc92 RP |
734 | return 0; |
735 | } | |
736 | ||
737 | static int wm8750_resume(struct platform_device *pdev) | |
738 | { | |
739 | struct snd_soc_device *socdev = platform_get_drvdata(pdev); | |
740 | struct snd_soc_codec *codec = socdev->codec; | |
741 | int i; | |
742 | u8 data[2]; | |
743 | u16 *cache = codec->reg_cache; | |
744 | ||
745 | /* Sync reg_cache with the hardware */ | |
746 | for (i = 0; i < ARRAY_SIZE(wm8750_reg); i++) { | |
747 | if (i == WM8750_RESET) | |
748 | continue; | |
749 | data[0] = (i << 1) | ((cache[i] >> 8) & 0x0001); | |
750 | data[1] = cache[i] & 0x00ff; | |
751 | codec->hw_write(codec->control_data, data, 2); | |
752 | } | |
753 | ||
0be9898a | 754 | wm8750_set_bias_level(codec, SND_SOC_BIAS_STANDBY); |
abadfc92 RP |
755 | |
756 | /* charge wm8750 caps */ | |
0be9898a MB |
757 | if (codec->suspend_bias_level == SND_SOC_BIAS_ON) { |
758 | wm8750_set_bias_level(codec, SND_SOC_BIAS_PREPARE); | |
759 | codec->bias_level = SND_SOC_BIAS_ON; | |
42f3030f MB |
760 | schedule_delayed_work(&codec->delayed_work, |
761 | msecs_to_jiffies(1000)); | |
abadfc92 RP |
762 | } |
763 | ||
764 | return 0; | |
765 | } | |
766 | ||
767 | /* | |
768 | * initialise the WM8750 driver | |
769 | * register the mixer and dsp interfaces with the kernel | |
770 | */ | |
771 | static int wm8750_init(struct snd_soc_device *socdev) | |
772 | { | |
773 | struct snd_soc_codec *codec = socdev->codec; | |
774 | int reg, ret = 0; | |
775 | ||
776 | codec->name = "WM8750"; | |
777 | codec->owner = THIS_MODULE; | |
778 | codec->read = wm8750_read_reg_cache; | |
779 | codec->write = wm8750_write; | |
0be9898a | 780 | codec->set_bias_level = wm8750_set_bias_level; |
abadfc92 RP |
781 | codec->dai = &wm8750_dai; |
782 | codec->num_dai = 1; | |
d751b233 | 783 | codec->reg_cache_size = ARRAY_SIZE(wm8750_reg); |
713fb939 | 784 | codec->reg_cache = kmemdup(wm8750_reg, sizeof(wm8750_reg), GFP_KERNEL); |
abadfc92 RP |
785 | if (codec->reg_cache == NULL) |
786 | return -ENOMEM; | |
abadfc92 RP |
787 | |
788 | wm8750_reset(codec); | |
789 | ||
790 | /* register pcms */ | |
791 | ret = snd_soc_new_pcms(socdev, SNDRV_DEFAULT_IDX1, SNDRV_DEFAULT_STR1); | |
792 | if (ret < 0) { | |
e35115a5 LG |
793 | printk(KERN_ERR "wm8750: failed to create pcms\n"); |
794 | goto pcm_err; | |
abadfc92 RP |
795 | } |
796 | ||
797 | /* charge output caps */ | |
0be9898a MB |
798 | wm8750_set_bias_level(codec, SND_SOC_BIAS_PREPARE); |
799 | codec->bias_level = SND_SOC_BIAS_STANDBY; | |
1321b160 | 800 | schedule_delayed_work(&codec->delayed_work, msecs_to_jiffies(1000)); |
abadfc92 RP |
801 | |
802 | /* set the update bits */ | |
803 | reg = wm8750_read_reg_cache(codec, WM8750_LDAC); | |
804 | wm8750_write(codec, WM8750_LDAC, reg | 0x0100); | |
805 | reg = wm8750_read_reg_cache(codec, WM8750_RDAC); | |
806 | wm8750_write(codec, WM8750_RDAC, reg | 0x0100); | |
807 | reg = wm8750_read_reg_cache(codec, WM8750_LOUT1V); | |
808 | wm8750_write(codec, WM8750_LOUT1V, reg | 0x0100); | |
809 | reg = wm8750_read_reg_cache(codec, WM8750_ROUT1V); | |
810 | wm8750_write(codec, WM8750_ROUT1V, reg | 0x0100); | |
811 | reg = wm8750_read_reg_cache(codec, WM8750_LOUT2V); | |
812 | wm8750_write(codec, WM8750_LOUT2V, reg | 0x0100); | |
813 | reg = wm8750_read_reg_cache(codec, WM8750_ROUT2V); | |
814 | wm8750_write(codec, WM8750_ROUT2V, reg | 0x0100); | |
815 | reg = wm8750_read_reg_cache(codec, WM8750_LINVOL); | |
816 | wm8750_write(codec, WM8750_LINVOL, reg | 0x0100); | |
817 | reg = wm8750_read_reg_cache(codec, WM8750_RINVOL); | |
818 | wm8750_write(codec, WM8750_RINVOL, reg | 0x0100); | |
819 | ||
820 | wm8750_add_controls(codec); | |
821 | wm8750_add_widgets(codec); | |
822 | ret = snd_soc_register_card(socdev); | |
823 | if (ret < 0) { | |
e35115a5 LG |
824 | printk(KERN_ERR "wm8750: failed to register card\n"); |
825 | goto card_err; | |
abadfc92 | 826 | } |
e35115a5 | 827 | return ret; |
abadfc92 | 828 | |
e35115a5 LG |
829 | card_err: |
830 | snd_soc_free_pcms(socdev); | |
831 | snd_soc_dapm_free(socdev); | |
832 | pcm_err: | |
833 | kfree(codec->reg_cache); | |
abadfc92 RP |
834 | return ret; |
835 | } | |
836 | ||
837 | /* If the i2c layer weren't so broken, we could pass this kind of data | |
838 | around */ | |
839 | static struct snd_soc_device *wm8750_socdev; | |
840 | ||
42f3030f | 841 | #if defined(CONFIG_I2C) || defined(CONFIG_I2C_MODULE) |
abadfc92 RP |
842 | |
843 | /* | |
844 | * WM8731 2 wire address is determined by GPIO5 | |
845 | * state during powerup. | |
846 | * low = 0x1a | |
847 | * high = 0x1b | |
848 | */ | |
abadfc92 | 849 | |
ee1d0099 JD |
850 | static int wm8750_i2c_probe(struct i2c_client *i2c, |
851 | const struct i2c_device_id *id) | |
abadfc92 RP |
852 | { |
853 | struct snd_soc_device *socdev = wm8750_socdev; | |
abadfc92 | 854 | struct snd_soc_codec *codec = socdev->codec; |
abadfc92 RP |
855 | int ret; |
856 | ||
abadfc92 RP |
857 | i2c_set_clientdata(i2c, codec); |
858 | codec->control_data = i2c; | |
859 | ||
abadfc92 | 860 | ret = wm8750_init(socdev); |
ee1d0099 | 861 | if (ret < 0) |
a5c95e90 | 862 | pr_err("failed to initialise WM8750\n"); |
abadfc92 | 863 | |
abadfc92 RP |
864 | return ret; |
865 | } | |
866 | ||
ee1d0099 | 867 | static int wm8750_i2c_remove(struct i2c_client *client) |
abadfc92 RP |
868 | { |
869 | struct snd_soc_codec *codec = i2c_get_clientdata(client); | |
abadfc92 | 870 | kfree(codec->reg_cache); |
abadfc92 RP |
871 | return 0; |
872 | } | |
873 | ||
ee1d0099 JD |
874 | static const struct i2c_device_id wm8750_i2c_id[] = { |
875 | { "wm8750", 0 }, | |
876 | { } | |
877 | }; | |
878 | MODULE_DEVICE_TABLE(i2c, wm8750_i2c_id); | |
abadfc92 | 879 | |
abadfc92 RP |
880 | static struct i2c_driver wm8750_i2c_driver = { |
881 | .driver = { | |
882 | .name = "WM8750 I2C Codec", | |
883 | .owner = THIS_MODULE, | |
884 | }, | |
ee1d0099 JD |
885 | .probe = wm8750_i2c_probe, |
886 | .remove = wm8750_i2c_remove, | |
887 | .id_table = wm8750_i2c_id, | |
abadfc92 RP |
888 | }; |
889 | ||
ee1d0099 JD |
890 | static int wm8750_add_i2c_device(struct platform_device *pdev, |
891 | const struct wm8750_setup_data *setup) | |
892 | { | |
893 | struct i2c_board_info info; | |
894 | struct i2c_adapter *adapter; | |
895 | struct i2c_client *client; | |
896 | int ret; | |
897 | ||
898 | ret = i2c_add_driver(&wm8750_i2c_driver); | |
899 | if (ret != 0) { | |
900 | dev_err(&pdev->dev, "can't add i2c driver\n"); | |
901 | return ret; | |
902 | } | |
903 | ||
904 | memset(&info, 0, sizeof(struct i2c_board_info)); | |
905 | info.addr = setup->i2c_address; | |
906 | strlcpy(info.type, "wm8750", I2C_NAME_SIZE); | |
907 | ||
908 | adapter = i2c_get_adapter(setup->i2c_bus); | |
909 | if (!adapter) { | |
910 | dev_err(&pdev->dev, "can't get i2c adapter %d\n", | |
911 | setup->i2c_bus); | |
912 | goto err_driver; | |
913 | } | |
914 | ||
915 | client = i2c_new_device(adapter, &info); | |
916 | i2c_put_adapter(adapter); | |
917 | if (!client) { | |
918 | dev_err(&pdev->dev, "can't add i2c device at 0x%x\n", | |
919 | (unsigned int)info.addr); | |
920 | goto err_driver; | |
921 | } | |
922 | ||
923 | return 0; | |
924 | ||
925 | err_driver: | |
926 | i2c_del_driver(&wm8750_i2c_driver); | |
927 | return -ENODEV; | |
928 | } | |
abadfc92 RP |
929 | #endif |
930 | ||
931 | static int wm8750_probe(struct platform_device *pdev) | |
932 | { | |
933 | struct snd_soc_device *socdev = platform_get_drvdata(pdev); | |
934 | struct wm8750_setup_data *setup = socdev->codec_data; | |
935 | struct snd_soc_codec *codec; | |
4422b606 | 936 | struct wm8750_priv *wm8750; |
b7c9d852 | 937 | int ret; |
abadfc92 | 938 | |
a5c95e90 | 939 | pr_info("WM8750 Audio Codec %s", WM8750_VERSION); |
abadfc92 RP |
940 | codec = kzalloc(sizeof(struct snd_soc_codec), GFP_KERNEL); |
941 | if (codec == NULL) | |
942 | return -ENOMEM; | |
943 | ||
4422b606 LG |
944 | wm8750 = kzalloc(sizeof(struct wm8750_priv), GFP_KERNEL); |
945 | if (wm8750 == NULL) { | |
946 | kfree(codec); | |
947 | return -ENOMEM; | |
948 | } | |
949 | ||
950 | codec->private_data = wm8750; | |
abadfc92 RP |
951 | socdev->codec = codec; |
952 | mutex_init(&codec->mutex); | |
953 | INIT_LIST_HEAD(&codec->dapm_widgets); | |
954 | INIT_LIST_HEAD(&codec->dapm_paths); | |
955 | wm8750_socdev = socdev; | |
1321b160 | 956 | INIT_DELAYED_WORK(&codec->delayed_work, wm8750_work); |
42f3030f | 957 | |
b7c9d852 MB |
958 | ret = -ENODEV; |
959 | ||
42f3030f | 960 | #if defined(CONFIG_I2C) || defined(CONFIG_I2C_MODULE) |
abadfc92 | 961 | if (setup->i2c_address) { |
abadfc92 | 962 | codec->hw_write = (hw_write_t)i2c_master_send; |
ee1d0099 | 963 | ret = wm8750_add_i2c_device(pdev, setup); |
abadfc92 | 964 | } |
abadfc92 RP |
965 | #endif |
966 | ||
3051e41a JD |
967 | if (ret != 0) { |
968 | kfree(codec->private_data); | |
969 | kfree(codec); | |
970 | } | |
abadfc92 RP |
971 | return ret; |
972 | } | |
973 | ||
4422b606 LG |
974 | /* |
975 | * This function forces any delayed work to be queued and run. | |
976 | */ | |
977 | static int run_delayed_work(struct delayed_work *dwork) | |
978 | { | |
979 | int ret; | |
980 | ||
981 | /* cancel any work waiting to be queued. */ | |
982 | ret = cancel_delayed_work(dwork); | |
983 | ||
984 | /* if there was any work waiting then we run it now and | |
985 | * wait for it's completion */ | |
986 | if (ret) { | |
987 | schedule_delayed_work(dwork, 0); | |
988 | flush_scheduled_work(); | |
989 | } | |
990 | return ret; | |
991 | } | |
992 | ||
abadfc92 RP |
993 | /* power down chip */ |
994 | static int wm8750_remove(struct platform_device *pdev) | |
995 | { | |
996 | struct snd_soc_device *socdev = platform_get_drvdata(pdev); | |
997 | struct snd_soc_codec *codec = socdev->codec; | |
998 | ||
999 | if (codec->control_data) | |
0be9898a | 1000 | wm8750_set_bias_level(codec, SND_SOC_BIAS_OFF); |
4422b606 | 1001 | run_delayed_work(&codec->delayed_work); |
abadfc92 RP |
1002 | snd_soc_free_pcms(socdev); |
1003 | snd_soc_dapm_free(socdev); | |
42f3030f | 1004 | #if defined(CONFIG_I2C) || defined(CONFIG_I2C_MODULE) |
ee1d0099 | 1005 | i2c_unregister_device(codec->control_data); |
abadfc92 RP |
1006 | i2c_del_driver(&wm8750_i2c_driver); |
1007 | #endif | |
4422b606 | 1008 | kfree(codec->private_data); |
abadfc92 RP |
1009 | kfree(codec); |
1010 | ||
1011 | return 0; | |
1012 | } | |
1013 | ||
1014 | struct snd_soc_codec_device soc_codec_dev_wm8750 = { | |
1015 | .probe = wm8750_probe, | |
1016 | .remove = wm8750_remove, | |
1017 | .suspend = wm8750_suspend, | |
1018 | .resume = wm8750_resume, | |
1019 | }; | |
abadfc92 RP |
1020 | EXPORT_SYMBOL_GPL(soc_codec_dev_wm8750); |
1021 | ||
1022 | MODULE_DESCRIPTION("ASoC WM8750 driver"); | |
1023 | MODULE_AUTHOR("Liam Girdwood"); | |
1024 | MODULE_LICENSE("GPL"); |