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ALSA: hda - delayed ELD repoll
[deliverable/linux.git] / sound / soc / codecs / wm8753.c
CommitLineData
1f53aee0
LG		 1/*
2 * wm8753.c -- WM8753 ALSA Soc Audio driver
3 *
4 * Copyright 2003 Wolfson Microelectronics PLC.
d331124d 5 * Author: Liam Girdwood <lrg@slimlogic.co.uk>
1f53aee0
LG		 6 *
7 * This program is free software; you can redistribute it and/or modify it
8 * under the terms of the GNU General Public License as published by the
9 * Free Software Foundation; either version 2 of the License, or (at your
10 * option) any later version.
11 *
12 * Notes:
13 * The WM8753 is a low power, high quality stereo codec with integrated PCM
14 * codec designed for portable digital telephony applications.
15 *
16 * Dual DAI:-
17 *
18 * This driver support 2 DAI PCM's. This makes the default PCM available for
19 * HiFi audio (e.g. MP3, ogg) playback/capture and the other PCM available for
20 * voice.
21 *
22 * Please note that the voice PCM can be connected directly to a Bluetooth
23 * codec or GSM modem and thus cannot be read or written to, although it is
24 * available to be configured with snd_hw_params(), etc and kcontrols in the
25 * normal alsa manner.
26 *
27 * Fast DAI switching:-
28 *
29 * The driver can now fast switch between the DAI configurations via a
30 * an alsa kcontrol. This allows the PCM to remain open.
31 *
32 */
33
34#include <linux/module.h>
35#include <linux/moduleparam.h>
1f53aee0
LG		 36#include <linux/kernel.h>
37#include <linux/init.h>
38#include <linux/delay.h>
39#include <linux/pm.h>
40#include <linux/i2c.h>
70e14122 41#include <linux/of_device.h>
1f53aee0 42#include <linux/platform_device.h>
dd0c0c80 43#include <linux/spi/spi.h>
5a0e3ad6 44#include <linux/slab.h>
1f53aee0
LG		 45#include <sound/core.h>
46#include <sound/pcm.h>
47#include <sound/pcm_params.h>
48#include <sound/soc.h>
1f53aee0 49#include <sound/initval.h>
2d6a4ac9 50#include <sound/tlv.h>
1f53aee0
LG		 51#include <asm/div64.h>
52
53#include "wm8753.h"
54
1f53aee0
LG		 55static int caps_charge = 2000;
56module_param(caps_charge, int, 0);
57MODULE_PARM_DESC(caps_charge, "WM8753 cap charge time (msecs)");
58
338ee253
LPC		 59static int wm8753_hifi_write_dai_fmt(struct snd_soc_codec *codec,
60 unsigned int fmt);
61static int wm8753_voice_write_dai_fmt(struct snd_soc_codec *codec,
62 unsigned int fmt);
1f53aee0 63
1f53aee0
LG		 64/*
65 * wm8753 register cache
66 * We can't read the WM8753 register space when we
67 * are using 2 wire for device control, so we cache them instead.
68 */
69static const u16 wm8753_reg[] = {
776065e3
LPC		 70 0x0000, 0x0008, 0x0000, 0x000a,
71 0x000a, 0x0033, 0x0000, 0x0007,
72 0x00ff, 0x00ff, 0x000f, 0x000f,
73 0x007b, 0x0000, 0x0032, 0x0000,
74 0x00c3, 0x00c3, 0x00c0, 0x0000,
1f53aee0
LG		 75 0x0000, 0x0000, 0x0000, 0x0000,
76 0x0000, 0x0000, 0x0000, 0x0000,
1f53aee0 77 0x0000, 0x0000, 0x0000, 0x0000,
776065e3
LPC		 78 0x0055, 0x0005, 0x0050, 0x0055,
79 0x0050, 0x0055, 0x0050, 0x0055,
80 0x0079, 0x0079, 0x0079, 0x0079,
81 0x0079, 0x0000, 0x0000, 0x0000,
82 0x0000, 0x0097, 0x0097, 0x0000,
83 0x0004, 0x0000, 0x0083, 0x0024,
84 0x01ba, 0x0000, 0x0083, 0x0024,
85 0x01ba, 0x0000, 0x0000, 0x0000
1f53aee0
LG		 86};
87
c2bac160
MB		 88/* codec private data */
89struct wm8753_priv {
f0fba2ad 90 enum snd_soc_control_type control_type;
c2bac160
MB		 91 unsigned int sysclk;
92 unsigned int pcmclk;
338ee253
LPC		 93
94 unsigned int voice_fmt;
95 unsigned int hifi_fmt;
96
f0fba2ad 97 int dai_func;
c2bac160
MB		 98};
99
776065e3 100#define wm8753_reset(c) snd_soc_write(c, WM8753_RESET, 0)
1f53aee0
LG		 101
102/*
103 * WM8753 Controls
104 */
105static const char *wm8753_base[] = {"Linear Control", "Adaptive Boost"};
106static const char *wm8753_base_filter[] =
107 {"130Hz @ 48kHz", "200Hz @ 48kHz", "100Hz @ 16kHz", "400Hz @ 48kHz",
108 "100Hz @ 8kHz", "200Hz @ 8kHz"};
109static const char *wm8753_treble[] = {"8kHz", "4kHz"};
110static const char *wm8753_alc_func[] = {"Off", "Right", "Left", "Stereo"};
111static const char *wm8753_ng_type[] = {"Constant PGA Gain", "Mute ADC Output"};
112static const char *wm8753_3d_func[] = {"Capture", "Playback"};
113static const char *wm8753_3d_uc[] = {"2.2kHz", "1.5kHz"};
114static const char *wm8753_3d_lc[] = {"200Hz", "500Hz"};
115static const char *wm8753_deemp[] = {"None", "32kHz", "44.1kHz", "48kHz"};
116static const char *wm8753_mono_mix[] = {"Stereo", "Left", "Right", "Mono"};
117static const char *wm8753_dac_phase[] = {"Non Inverted", "Inverted"};
118static const char *wm8753_line_mix[] = {"Line 1 + 2", "Line 1 - 2",
119 "Line 1", "Line 2"};
120static const char *wm8753_mono_mux[] = {"Line Mix", "Rx Mix"};
121static const char *wm8753_right_mux[] = {"Line 2", "Rx Mix"};
122static const char *wm8753_left_mux[] = {"Line 1", "Rx Mix"};
123static const char *wm8753_rxmsel[] = {"RXP - RXN", "RXP + RXN", "RXP", "RXN"};
124static const char *wm8753_sidetone_mux[] = {"Left PGA", "Mic 1", "Mic 2",
125 "Right PGA"};
126static const char *wm8753_mono2_src[] = {"Inverted Mono 1", "Left", "Right",
127 "Left + Right"};
128static const char *wm8753_out3[] = {"VREF", "ROUT2", "Left + Right"};
129static const char *wm8753_out4[] = {"VREF", "Capture ST", "LOUT2"};
130static const char *wm8753_radcsel[] = {"PGA", "Line or RXP-RXN", "Sidetone"};
131static const char *wm8753_ladcsel[] = {"PGA", "Line or RXP-RXN", "Line"};
132static const char *wm8753_mono_adc[] = {"Stereo", "Analogue Mix Left",
133 "Analogue Mix Right", "Digital Mono Mix"};
134static const char *wm8753_adc_hp[] = {"3.4Hz @ 48kHz", "82Hz @ 16k",
135 "82Hz @ 8kHz", "170Hz @ 8kHz"};
136static const char *wm8753_adc_filter[] = {"HiFi", "Voice"};
137static const char *wm8753_mic_sel[] = {"Mic 1", "Mic 2", "Mic 3"};
138static const char *wm8753_dai_mode[] = {"DAI 0", "DAI 1", "DAI 2", "DAI 3"};
139static const char *wm8753_dat_sel[] = {"Stereo", "Left ADC", "Right ADC",
140 "Channel Swap"};
ae092c9e 141static const char *wm8753_rout2_phase[] = {"Non Inverted", "Inverted"};
1f53aee0
LG		 142
143static const struct soc_enum wm8753_enum[] = {
144SOC_ENUM_SINGLE(WM8753_BASS, 7, 2, wm8753_base),
145SOC_ENUM_SINGLE(WM8753_BASS, 4, 6, wm8753_base_filter),
146SOC_ENUM_SINGLE(WM8753_TREBLE, 6, 2, wm8753_treble),
147SOC_ENUM_SINGLE(WM8753_ALC1, 7, 4, wm8753_alc_func),
148SOC_ENUM_SINGLE(WM8753_NGATE, 1, 2, wm8753_ng_type),
149SOC_ENUM_SINGLE(WM8753_3D, 7, 2, wm8753_3d_func),
150SOC_ENUM_SINGLE(WM8753_3D, 6, 2, wm8753_3d_uc),
151SOC_ENUM_SINGLE(WM8753_3D, 5, 2, wm8753_3d_lc),
152SOC_ENUM_SINGLE(WM8753_DAC, 1, 4, wm8753_deemp),
153SOC_ENUM_SINGLE(WM8753_DAC, 4, 4, wm8753_mono_mix),
154SOC_ENUM_SINGLE(WM8753_DAC, 6, 2, wm8753_dac_phase),
155SOC_ENUM_SINGLE(WM8753_INCTL1, 3, 4, wm8753_line_mix),
156SOC_ENUM_SINGLE(WM8753_INCTL1, 2, 2, wm8753_mono_mux),
157SOC_ENUM_SINGLE(WM8753_INCTL1, 1, 2, wm8753_right_mux),
158SOC_ENUM_SINGLE(WM8753_INCTL1, 0, 2, wm8753_left_mux),
159SOC_ENUM_SINGLE(WM8753_INCTL2, 6, 4, wm8753_rxmsel),
160SOC_ENUM_SINGLE(WM8753_INCTL2, 4, 4, wm8753_sidetone_mux),
161SOC_ENUM_SINGLE(WM8753_OUTCTL, 7, 4, wm8753_mono2_src),
162SOC_ENUM_SINGLE(WM8753_OUTCTL, 0, 3, wm8753_out3),
163SOC_ENUM_SINGLE(WM8753_ADCTL2, 7, 3, wm8753_out4),
164SOC_ENUM_SINGLE(WM8753_ADCIN, 2, 3, wm8753_radcsel),
165SOC_ENUM_SINGLE(WM8753_ADCIN, 0, 3, wm8753_ladcsel),
166SOC_ENUM_SINGLE(WM8753_ADCIN, 4, 4, wm8753_mono_adc),
167SOC_ENUM_SINGLE(WM8753_ADC, 2, 4, wm8753_adc_hp),
168SOC_ENUM_SINGLE(WM8753_ADC, 4, 2, wm8753_adc_filter),
169SOC_ENUM_SINGLE(WM8753_MICBIAS, 6, 3, wm8753_mic_sel),
170SOC_ENUM_SINGLE(WM8753_IOCTL, 2, 4, wm8753_dai_mode),
171SOC_ENUM_SINGLE(WM8753_ADC, 7, 4, wm8753_dat_sel),
ae092c9e 172SOC_ENUM_SINGLE(WM8753_OUTCTL, 2, 2, wm8753_rout2_phase),
1f53aee0
LG		 173};
174
175
176static int wm8753_get_dai(struct snd_kcontrol *kcontrol,
177 struct snd_ctl_elem_value *ucontrol)
178{
179 struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol);
338ee253 180 struct wm8753_priv *wm8753 = snd_soc_codec_get_drvdata(codec);
1f53aee0 181
338ee253 182 ucontrol->value.integer.value[0] = wm8753->dai_func;
1f53aee0
LG		 183 return 0;
184}
185
186static int wm8753_set_dai(struct snd_kcontrol *kcontrol,
187 struct snd_ctl_elem_value *ucontrol)
188{
189 struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol);
f0fba2ad 190 struct wm8753_priv *wm8753 = snd_soc_codec_get_drvdata(codec);
338ee253
LPC		 191 u16 ioctl;
192
193 if (codec->active)
194 return -EBUSY;
195
196 ioctl = snd_soc_read(codec, WM8753_IOCTL);
197
198 wm8753->dai_func = ucontrol->value.integer.value[0];
199
200 if (((ioctl >> 2) & 0x3) == wm8753->dai_func)
201 return 1;
202
203 ioctl = (ioctl & 0x1f3) | (wm8753->dai_func << 2);
204 snd_soc_write(codec, WM8753_IOCTL, ioctl);
1f53aee0 205
1f53aee0 206
338ee253
LPC		 207 wm8753_hifi_write_dai_fmt(codec, wm8753->hifi_fmt);
208 wm8753_voice_write_dai_fmt(codec, wm8753->voice_fmt);
1f53aee0 209
1f53aee0
LG		 210 return 1;
211}
212
2cc8c609
MM		 213static const DECLARE_TLV_DB_SCALE(rec_mix_tlv, -1500, 300, 0);
214static const DECLARE_TLV_DB_SCALE(mic_preamp_tlv, 1200, 600, 0);
215static const DECLARE_TLV_DB_SCALE(adc_tlv, -9750, 50, 1);
216static const DECLARE_TLV_DB_SCALE(dac_tlv, -12750, 50, 1);
217static const unsigned int out_tlv[] = {
218 TLV_DB_RANGE_HEAD(2),
219 /* 0000000 - 0101111 = "Analogue mute" */
220 0, 48, TLV_DB_SCALE_ITEM(-25500, 0, 0),
221 48, 127, TLV_DB_SCALE_ITEM(-7300, 100, 0),
222};
223static const DECLARE_TLV_DB_SCALE(mix_tlv, -1500, 300, 0);
224static const DECLARE_TLV_DB_SCALE(voice_mix_tlv, -1200, 300, 0);
225static const DECLARE_TLV_DB_SCALE(pga_tlv, -1725, 75, 0);
2d6a4ac9 226
1f53aee0 227static const struct snd_kcontrol_new wm8753_snd_controls[] = {
2cc8c609
MM		 228SOC_DOUBLE_R_TLV("PCM Volume", WM8753_LDAC, WM8753_RDAC, 0, 255, 0, dac_tlv),
229
230SOC_DOUBLE_R_TLV("ADC Capture Volume", WM8753_LADC, WM8753_RADC, 0, 255, 0,
231 adc_tlv),
232
233SOC_DOUBLE_R_TLV("Headphone Playback Volume", WM8753_LOUT1V, WM8753_ROUT1V,
234 0, 127, 0, out_tlv),
235SOC_DOUBLE_R_TLV("Speaker Playback Volume", WM8753_LOUT2V, WM8753_ROUT2V, 0,
236 127, 0, out_tlv),
237
238SOC_SINGLE_TLV("Mono Playback Volume", WM8753_MOUTV, 0, 127, 0, out_tlv),
239
240SOC_DOUBLE_R_TLV("Bypass Playback Volume", WM8753_LOUTM1, WM8753_ROUTM1, 4, 7,
241 1, mix_tlv),
242SOC_DOUBLE_R_TLV("Sidetone Playback Volume", WM8753_LOUTM2, WM8753_ROUTM2, 4,
243 7, 1, mix_tlv),
244SOC_DOUBLE_R_TLV("Voice Playback Volume", WM8753_LOUTM2, WM8753_ROUTM2, 0, 7,
245 1, voice_mix_tlv),
246
247SOC_DOUBLE_R("Headphone Playback ZC Switch", WM8753_LOUT1V, WM8753_ROUT1V, 7,
248 1, 0),
249SOC_DOUBLE_R("Speaker Playback ZC Switch", WM8753_LOUT2V, WM8753_ROUT2V, 7,
250 1, 0),
251
252SOC_SINGLE_TLV("Mono Bypass Playback Volume", WM8753_MOUTM1, 4, 7, 1, mix_tlv),
253SOC_SINGLE_TLV("Mono Sidetone Playback Volume", WM8753_MOUTM2, 4, 7, 1,
254 mix_tlv),
255SOC_SINGLE_TLV("Mono Voice Playback Volume", WM8753_MOUTM2, 0, 7, 1,
256 voice_mix_tlv),
1f53aee0
LG		 257SOC_SINGLE("Mono Playback ZC Switch", WM8753_MOUTV, 7, 1, 0),
258
259SOC_ENUM("Bass Boost", wm8753_enum[0]),
260SOC_ENUM("Bass Filter", wm8753_enum[1]),
261SOC_SINGLE("Bass Volume", WM8753_BASS, 0, 15, 1),
262
263SOC_SINGLE("Treble Volume", WM8753_TREBLE, 0, 15, 1),
264SOC_ENUM("Treble Cut-off", wm8753_enum[2]),
265
2cc8c609
MM		 266SOC_DOUBLE_TLV("Sidetone Capture Volume", WM8753_RECMIX1, 0, 4, 7, 1,
267 rec_mix_tlv),
268SOC_SINGLE_TLV("Voice Sidetone Capture Volume", WM8753_RECMIX2, 0, 7, 1,
269 rec_mix_tlv),
1f53aee0 270
2cc8c609
MM		 271SOC_DOUBLE_R_TLV("Capture Volume", WM8753_LINVOL, WM8753_RINVOL, 0, 63, 0,
272 pga_tlv),
1f53aee0
LG		 273SOC_DOUBLE_R("Capture ZC Switch", WM8753_LINVOL, WM8753_RINVOL, 6, 1, 0),
274SOC_DOUBLE_R("Capture Switch", WM8753_LINVOL, WM8753_RINVOL, 7, 1, 1),
275
276SOC_ENUM("Capture Filter Select", wm8753_enum[23]),
277SOC_ENUM("Capture Filter Cut-off", wm8753_enum[24]),
278SOC_SINGLE("Capture Filter Switch", WM8753_ADC, 0, 1, 1),
279
280SOC_SINGLE("ALC Capture Target Volume", WM8753_ALC1, 0, 7, 0),
281SOC_SINGLE("ALC Capture Max Volume", WM8753_ALC1, 4, 7, 0),
282SOC_ENUM("ALC Capture Function", wm8753_enum[3]),
283SOC_SINGLE("ALC Capture ZC Switch", WM8753_ALC2, 8, 1, 0),
284SOC_SINGLE("ALC Capture Hold Time", WM8753_ALC2, 0, 15, 1),
285SOC_SINGLE("ALC Capture Decay Time", WM8753_ALC3, 4, 15, 1),
286SOC_SINGLE("ALC Capture Attack Time", WM8753_ALC3, 0, 15, 0),
287SOC_SINGLE("ALC Capture NG Threshold", WM8753_NGATE, 3, 31, 0),
288SOC_ENUM("ALC Capture NG Type", wm8753_enum[4]),
289SOC_SINGLE("ALC Capture NG Switch", WM8753_NGATE, 0, 1, 0),
290
291SOC_ENUM("3D Function", wm8753_enum[5]),
292SOC_ENUM("3D Upper Cut-off", wm8753_enum[6]),
293SOC_ENUM("3D Lower Cut-off", wm8753_enum[7]),
294SOC_SINGLE("3D Volume", WM8753_3D, 1, 15, 0),
295SOC_SINGLE("3D Switch", WM8753_3D, 0, 1, 0),
296
297SOC_SINGLE("Capture 6dB Attenuate", WM8753_ADCTL1, 2, 1, 0),
298SOC_SINGLE("Playback 6dB Attenuate", WM8753_ADCTL1, 1, 1, 0),
299
300SOC_ENUM("De-emphasis", wm8753_enum[8]),
301SOC_ENUM("Playback Mono Mix", wm8753_enum[9]),
302SOC_ENUM("Playback Phase", wm8753_enum[10]),
303
2cc8c609
MM		 304SOC_SINGLE_TLV("Mic2 Capture Volume", WM8753_INCTL1, 7, 3, 0, mic_preamp_tlv),
305SOC_SINGLE_TLV("Mic1 Capture Volume", WM8753_INCTL1, 5, 3, 0, mic_preamp_tlv),
1f53aee0
LG		 306
307SOC_ENUM_EXT("DAI Mode", wm8753_enum[26], wm8753_get_dai, wm8753_set_dai),
308
309SOC_ENUM("ADC Data Select", wm8753_enum[27]),
ae092c9e 310SOC_ENUM("ROUT2 Phase", wm8753_enum[28]),
1f53aee0
LG		 311};
312
1f53aee0
LG		 313/*
314 * _DAPM_ Controls
315 */
316
317/* Left Mixer */
318static const struct snd_kcontrol_new wm8753_left_mixer_controls[] = {
319SOC_DAPM_SINGLE("Voice Playback Switch", WM8753_LOUTM2, 8, 1, 0),
320SOC_DAPM_SINGLE("Sidetone Playback Switch", WM8753_LOUTM2, 7, 1, 0),
321SOC_DAPM_SINGLE("Left Playback Switch", WM8753_LOUTM1, 8, 1, 0),
322SOC_DAPM_SINGLE("Bypass Playback Switch", WM8753_LOUTM1, 7, 1, 0),
323};
324
325/* Right mixer */
326static const struct snd_kcontrol_new wm8753_right_mixer_controls[] = {
327SOC_DAPM_SINGLE("Voice Playback Switch", WM8753_ROUTM2, 8, 1, 0),
328SOC_DAPM_SINGLE("Sidetone Playback Switch", WM8753_ROUTM2, 7, 1, 0),
329SOC_DAPM_SINGLE("Right Playback Switch", WM8753_ROUTM1, 8, 1, 0),
330SOC_DAPM_SINGLE("Bypass Playback Switch", WM8753_ROUTM1, 7, 1, 0),
331};
332
333/* Mono mixer */
334static const struct snd_kcontrol_new wm8753_mono_mixer_controls[] = {
335SOC_DAPM_SINGLE("Left Playback Switch", WM8753_MOUTM1, 8, 1, 0),
336SOC_DAPM_SINGLE("Right Playback Switch", WM8753_MOUTM2, 8, 1, 0),
337SOC_DAPM_SINGLE("Voice Playback Switch", WM8753_MOUTM2, 3, 1, 0),
338SOC_DAPM_SINGLE("Sidetone Playback Switch", WM8753_MOUTM2, 7, 1, 0),
339SOC_DAPM_SINGLE("Bypass Playback Switch", WM8753_MOUTM1, 7, 1, 0),
340};
341
342/* Mono 2 Mux */
343static const struct snd_kcontrol_new wm8753_mono2_controls =
344SOC_DAPM_ENUM("Route", wm8753_enum[17]);
345
346/* Out 3 Mux */
347static const struct snd_kcontrol_new wm8753_out3_controls =
348SOC_DAPM_ENUM("Route", wm8753_enum[18]);
349
350/* Out 4 Mux */
351static const struct snd_kcontrol_new wm8753_out4_controls =
352SOC_DAPM_ENUM("Route", wm8753_enum[19]);
353
354/* ADC Mono Mix */
355static const struct snd_kcontrol_new wm8753_adc_mono_controls =
356SOC_DAPM_ENUM("Route", wm8753_enum[22]);
357
358/* Record mixer */
359static const struct snd_kcontrol_new wm8753_record_mixer_controls[] = {
360SOC_DAPM_SINGLE("Voice Capture Switch", WM8753_RECMIX2, 3, 1, 0),
361SOC_DAPM_SINGLE("Left Capture Switch", WM8753_RECMIX1, 3, 1, 0),
362SOC_DAPM_SINGLE("Right Capture Switch", WM8753_RECMIX1, 7, 1, 0),
363};
364
365/* Left ADC mux */
366static const struct snd_kcontrol_new wm8753_adc_left_controls =
367SOC_DAPM_ENUM("Route", wm8753_enum[21]);
368
369/* Right ADC mux */
370static const struct snd_kcontrol_new wm8753_adc_right_controls =
371SOC_DAPM_ENUM("Route", wm8753_enum[20]);
372
373/* MIC mux */
374static const struct snd_kcontrol_new wm8753_mic_mux_controls =
375SOC_DAPM_ENUM("Route", wm8753_enum[16]);
376
377/* ALC mixer */
378static const struct snd_kcontrol_new wm8753_alc_mixer_controls[] = {
379SOC_DAPM_SINGLE("Line Capture Switch", WM8753_INCTL2, 3, 1, 0),
380SOC_DAPM_SINGLE("Mic2 Capture Switch", WM8753_INCTL2, 2, 1, 0),
381SOC_DAPM_SINGLE("Mic1 Capture Switch", WM8753_INCTL2, 1, 1, 0),
382SOC_DAPM_SINGLE("Rx Capture Switch", WM8753_INCTL2, 0, 1, 0),
383};
384
385/* Left Line mux */
386static const struct snd_kcontrol_new wm8753_line_left_controls =
387SOC_DAPM_ENUM("Route", wm8753_enum[14]);
388
389/* Right Line mux */
390static const struct snd_kcontrol_new wm8753_line_right_controls =
391SOC_DAPM_ENUM("Route", wm8753_enum[13]);
392
393/* Mono Line mux */
394static const struct snd_kcontrol_new wm8753_line_mono_controls =
395SOC_DAPM_ENUM("Route", wm8753_enum[12]);
396
397/* Line mux and mixer */
398static const struct snd_kcontrol_new wm8753_line_mux_mix_controls =
399SOC_DAPM_ENUM("Route", wm8753_enum[11]);
400
401/* Rx mux and mixer */
402static const struct snd_kcontrol_new wm8753_rx_mux_mix_controls =
403SOC_DAPM_ENUM("Route", wm8753_enum[15]);
404
405/* Mic Selector Mux */
406static const struct snd_kcontrol_new wm8753_mic_sel_mux_controls =
407SOC_DAPM_ENUM("Route", wm8753_enum[25]);
408
409static const struct snd_soc_dapm_widget wm8753_dapm_widgets[] = {
410SND_SOC_DAPM_MICBIAS("Mic Bias", WM8753_PWR1, 5, 0),
411SND_SOC_DAPM_MIXER("Left Mixer", WM8753_PWR4, 0, 0,
412 &wm8753_left_mixer_controls[0], ARRAY_SIZE(wm8753_left_mixer_controls)),
413SND_SOC_DAPM_PGA("Left Out 1", WM8753_PWR3, 8, 0, NULL, 0),
414SND_SOC_DAPM_PGA("Left Out 2", WM8753_PWR3, 6, 0, NULL, 0),
415SND_SOC_DAPM_DAC("Left DAC", "Left HiFi Playback", WM8753_PWR1, 3, 0),
416SND_SOC_DAPM_OUTPUT("LOUT1"),
417SND_SOC_DAPM_OUTPUT("LOUT2"),
418SND_SOC_DAPM_MIXER("Right Mixer", WM8753_PWR4, 1, 0,
419 &wm8753_right_mixer_controls[0], ARRAY_SIZE(wm8753_right_mixer_controls)),
420SND_SOC_DAPM_PGA("Right Out 1", WM8753_PWR3, 7, 0, NULL, 0),
421SND_SOC_DAPM_PGA("Right Out 2", WM8753_PWR3, 5, 0, NULL, 0),
422SND_SOC_DAPM_DAC("Right DAC", "Right HiFi Playback", WM8753_PWR1, 2, 0),
423SND_SOC_DAPM_OUTPUT("ROUT1"),
424SND_SOC_DAPM_OUTPUT("ROUT2"),
425SND_SOC_DAPM_MIXER("Mono Mixer", WM8753_PWR4, 2, 0,
426 &wm8753_mono_mixer_controls[0], ARRAY_SIZE(wm8753_mono_mixer_controls)),
427SND_SOC_DAPM_PGA("Mono Out 1", WM8753_PWR3, 2, 0, NULL, 0),
428SND_SOC_DAPM_PGA("Mono Out 2", WM8753_PWR3, 1, 0, NULL, 0),
429SND_SOC_DAPM_DAC("Voice DAC", "Voice Playback", WM8753_PWR1, 4, 0),
430SND_SOC_DAPM_OUTPUT("MONO1"),
431SND_SOC_DAPM_MUX("Mono 2 Mux", SND_SOC_NOPM, 0, 0, &wm8753_mono2_controls),
432SND_SOC_DAPM_OUTPUT("MONO2"),
433SND_SOC_DAPM_MIXER("Out3 Left + Right", -1, 0, 0, NULL, 0),
434SND_SOC_DAPM_MUX("Out3 Mux", SND_SOC_NOPM, 0, 0, &wm8753_out3_controls),
435SND_SOC_DAPM_PGA("Out 3", WM8753_PWR3, 4, 0, NULL, 0),
436SND_SOC_DAPM_OUTPUT("OUT3"),
437SND_SOC_DAPM_MUX("Out4 Mux", SND_SOC_NOPM, 0, 0, &wm8753_out4_controls),
438SND_SOC_DAPM_PGA("Out 4", WM8753_PWR3, 3, 0, NULL, 0),
439SND_SOC_DAPM_OUTPUT("OUT4"),
440SND_SOC_DAPM_MIXER("Playback Mixer", WM8753_PWR4, 3, 0,
441 &wm8753_record_mixer_controls[0],
442 ARRAY_SIZE(wm8753_record_mixer_controls)),
443SND_SOC_DAPM_ADC("Left ADC", "Left Capture", WM8753_PWR2, 3, 0),
444SND_SOC_DAPM_ADC("Right ADC", "Right Capture", WM8753_PWR2, 2, 0),
445SND_SOC_DAPM_MUX("Capture Left Mixer", SND_SOC_NOPM, 0, 0,
446 &wm8753_adc_mono_controls),
447SND_SOC_DAPM_MUX("Capture Right Mixer", SND_SOC_NOPM, 0, 0,
448 &wm8753_adc_mono_controls),
449SND_SOC_DAPM_MUX("Capture Left Mux", SND_SOC_NOPM, 0, 0,
450 &wm8753_adc_left_controls),
451SND_SOC_DAPM_MUX("Capture Right Mux", SND_SOC_NOPM, 0, 0,
452 &wm8753_adc_right_controls),
453SND_SOC_DAPM_MUX("Mic Sidetone Mux", SND_SOC_NOPM, 0, 0,
454 &wm8753_mic_mux_controls),
455SND_SOC_DAPM_PGA("Left Capture Volume", WM8753_PWR2, 5, 0, NULL, 0),
456SND_SOC_DAPM_PGA("Right Capture Volume", WM8753_PWR2, 4, 0, NULL, 0),
457SND_SOC_DAPM_MIXER("ALC Mixer", WM8753_PWR2, 6, 0,
458 &wm8753_alc_mixer_controls[0], ARRAY_SIZE(wm8753_alc_mixer_controls)),
459SND_SOC_DAPM_MUX("Line Left Mux", SND_SOC_NOPM, 0, 0,
460 &wm8753_line_left_controls),
461SND_SOC_DAPM_MUX("Line Right Mux", SND_SOC_NOPM, 0, 0,
462 &wm8753_line_right_controls),
463SND_SOC_DAPM_MUX("Line Mono Mux", SND_SOC_NOPM, 0, 0,
464 &wm8753_line_mono_controls),
465SND_SOC_DAPM_MUX("Line Mixer", WM8753_PWR2, 0, 0,
466 &wm8753_line_mux_mix_controls),
467SND_SOC_DAPM_MUX("Rx Mixer", WM8753_PWR2, 1, 0,
468 &wm8753_rx_mux_mix_controls),
469SND_SOC_DAPM_PGA("Mic 1 Volume", WM8753_PWR2, 8, 0, NULL, 0),
470SND_SOC_DAPM_PGA("Mic 2 Volume", WM8753_PWR2, 7, 0, NULL, 0),
471SND_SOC_DAPM_MUX("Mic Selection Mux", SND_SOC_NOPM, 0, 0,
472 &wm8753_mic_sel_mux_controls),
473SND_SOC_DAPM_INPUT("LINE1"),
474SND_SOC_DAPM_INPUT("LINE2"),
475SND_SOC_DAPM_INPUT("RXP"),
476SND_SOC_DAPM_INPUT("RXN"),
477SND_SOC_DAPM_INPUT("ACIN"),
478SND_SOC_DAPM_OUTPUT("ACOP"),
479SND_SOC_DAPM_INPUT("MIC1N"),
480SND_SOC_DAPM_INPUT("MIC1"),
481SND_SOC_DAPM_INPUT("MIC2N"),
482SND_SOC_DAPM_INPUT("MIC2"),
483SND_SOC_DAPM_VMID("VREF"),
484};
485
a65f0568 486static const struct snd_soc_dapm_route audio_map[] = {
1f53aee0
LG		 487 /* left mixer */
488 {"Left Mixer", "Left Playback Switch", "Left DAC"},
489 {"Left Mixer", "Voice Playback Switch", "Voice DAC"},
490 {"Left Mixer", "Sidetone Playback Switch", "Mic Sidetone Mux"},
491 {"Left Mixer", "Bypass Playback Switch", "Line Left Mux"},
492
493 /* right mixer */
494 {"Right Mixer", "Right Playback Switch", "Right DAC"},
495 {"Right Mixer", "Voice Playback Switch", "Voice DAC"},
496 {"Right Mixer", "Sidetone Playback Switch", "Mic Sidetone Mux"},
497 {"Right Mixer", "Bypass Playback Switch", "Line Right Mux"},
498
499 /* mono mixer */
500 {"Mono Mixer", "Voice Playback Switch", "Voice DAC"},
501 {"Mono Mixer", "Left Playback Switch", "Left DAC"},
502 {"Mono Mixer", "Right Playback Switch", "Right DAC"},
503 {"Mono Mixer", "Sidetone Playback Switch", "Mic Sidetone Mux"},
504 {"Mono Mixer", "Bypass Playback Switch", "Line Mono Mux"},
505
506 /* left out */
507 {"Left Out 1", NULL, "Left Mixer"},
508 {"Left Out 2", NULL, "Left Mixer"},
509 {"LOUT1", NULL, "Left Out 1"},
510 {"LOUT2", NULL, "Left Out 2"},
511
512 /* right out */
513 {"Right Out 1", NULL, "Right Mixer"},
514 {"Right Out 2", NULL, "Right Mixer"},
515 {"ROUT1", NULL, "Right Out 1"},
516 {"ROUT2", NULL, "Right Out 2"},
517
518 /* mono 1 out */
519 {"Mono Out 1", NULL, "Mono Mixer"},
520 {"MONO1", NULL, "Mono Out 1"},
521
522 /* mono 2 out */
523 {"Mono 2 Mux", "Left + Right", "Out3 Left + Right"},
524 {"Mono 2 Mux", "Inverted Mono 1", "MONO1"},
525 {"Mono 2 Mux", "Left", "Left Mixer"},
526 {"Mono 2 Mux", "Right", "Right Mixer"},
527 {"Mono Out 2", NULL, "Mono 2 Mux"},
528 {"MONO2", NULL, "Mono Out 2"},
529
530 /* out 3 */
531 {"Out3 Left + Right", NULL, "Left Mixer"},
532 {"Out3 Left + Right", NULL, "Right Mixer"},
533 {"Out3 Mux", "VREF", "VREF"},
534 {"Out3 Mux", "Left + Right", "Out3 Left + Right"},
535 {"Out3 Mux", "ROUT2", "ROUT2"},
536 {"Out 3", NULL, "Out3 Mux"},
537 {"OUT3", NULL, "Out 3"},
538
539 /* out 4 */
540 {"Out4 Mux", "VREF", "VREF"},
4037314a 541 {"Out4 Mux", "Capture ST", "Playback Mixer"},
1f53aee0
LG		 542 {"Out4 Mux", "LOUT2", "LOUT2"},
543 {"Out 4", NULL, "Out4 Mux"},
544 {"OUT4", NULL, "Out 4"},
545
546 /* record mixer */
547 {"Playback Mixer", "Left Capture Switch", "Left Mixer"},
548 {"Playback Mixer", "Voice Capture Switch", "Mono Mixer"},
549 {"Playback Mixer", "Right Capture Switch", "Right Mixer"},
550
551 /* Mic/SideTone Mux */
552 {"Mic Sidetone Mux", "Left PGA", "Left Capture Volume"},
553 {"Mic Sidetone Mux", "Right PGA", "Right Capture Volume"},
554 {"Mic Sidetone Mux", "Mic 1", "Mic 1 Volume"},
555 {"Mic Sidetone Mux", "Mic 2", "Mic 2 Volume"},
556
557 /* Capture Left Mux */
558 {"Capture Left Mux", "PGA", "Left Capture Volume"},
559 {"Capture Left Mux", "Line or RXP-RXN", "Line Left Mux"},
560 {"Capture Left Mux", "Line", "LINE1"},
561
562 /* Capture Right Mux */
563 {"Capture Right Mux", "PGA", "Right Capture Volume"},
564 {"Capture Right Mux", "Line or RXP-RXN", "Line Right Mux"},
4037314a 565 {"Capture Right Mux", "Sidetone", "Playback Mixer"},
1f53aee0
LG		 566
567 /* Mono Capture mixer-mux */
568 {"Capture Right Mixer", "Stereo", "Capture Right Mux"},
877ae707 569 {"Capture Left Mixer", "Stereo", "Capture Left Mux"},
1f53aee0
LG		 570 {"Capture Left Mixer", "Analogue Mix Left", "Capture Left Mux"},
571 {"Capture Left Mixer", "Analogue Mix Left", "Capture Right Mux"},
572 {"Capture Right Mixer", "Analogue Mix Right", "Capture Left Mux"},
573 {"Capture Right Mixer", "Analogue Mix Right", "Capture Right Mux"},
574 {"Capture Left Mixer", "Digital Mono Mix", "Capture Left Mux"},
575 {"Capture Left Mixer", "Digital Mono Mix", "Capture Right Mux"},
576 {"Capture Right Mixer", "Digital Mono Mix", "Capture Left Mux"},
577 {"Capture Right Mixer", "Digital Mono Mix", "Capture Right Mux"},
578
579 /* ADC */
580 {"Left ADC", NULL, "Capture Left Mixer"},
581 {"Right ADC", NULL, "Capture Right Mixer"},
582
583 /* Left Capture Volume */
584 {"Left Capture Volume", NULL, "ACIN"},
585
586 /* Right Capture Volume */
587 {"Right Capture Volume", NULL, "Mic 2 Volume"},
588
589 /* ALC Mixer */
590 {"ALC Mixer", "Line Capture Switch", "Line Mixer"},
591 {"ALC Mixer", "Mic2 Capture Switch", "Mic 2 Volume"},
592 {"ALC Mixer", "Mic1 Capture Switch", "Mic 1 Volume"},
593 {"ALC Mixer", "Rx Capture Switch", "Rx Mixer"},
594
595 /* Line Left Mux */
596 {"Line Left Mux", "Line 1", "LINE1"},
597 {"Line Left Mux", "Rx Mix", "Rx Mixer"},
598
599 /* Line Right Mux */
600 {"Line Right Mux", "Line 2", "LINE2"},
601 {"Line Right Mux", "Rx Mix", "Rx Mixer"},
602
603 /* Line Mono Mux */
604 {"Line Mono Mux", "Line Mix", "Line Mixer"},
605 {"Line Mono Mux", "Rx Mix", "Rx Mixer"},
606
607 /* Line Mixer/Mux */
608 {"Line Mixer", "Line 1 + 2", "LINE1"},
609 {"Line Mixer", "Line 1 - 2", "LINE1"},
610 {"Line Mixer", "Line 1 + 2", "LINE2"},
611 {"Line Mixer", "Line 1 - 2", "LINE2"},
612 {"Line Mixer", "Line 1", "LINE1"},
613 {"Line Mixer", "Line 2", "LINE2"},
614
615 /* Rx Mixer/Mux */
616 {"Rx Mixer", "RXP - RXN", "RXP"},
617 {"Rx Mixer", "RXP + RXN", "RXP"},
618 {"Rx Mixer", "RXP - RXN", "RXN"},
619 {"Rx Mixer", "RXP + RXN", "RXN"},
620 {"Rx Mixer", "RXP", "RXP"},
621 {"Rx Mixer", "RXN", "RXN"},
622
623 /* Mic 1 Volume */
624 {"Mic 1 Volume", NULL, "MIC1N"},
625 {"Mic 1 Volume", NULL, "Mic Selection Mux"},
626
627 /* Mic 2 Volume */
628 {"Mic 2 Volume", NULL, "MIC2N"},
629 {"Mic 2 Volume", NULL, "MIC2"},
630
631 /* Mic Selector Mux */
632 {"Mic Selection Mux", "Mic 1", "MIC1"},
633 {"Mic Selection Mux", "Mic 2", "MIC2N"},
634 {"Mic Selection Mux", "Mic 3", "MIC2"},
635
636 /* ACOP */
637 {"ACOP", NULL, "ALC Mixer"},
1f53aee0
LG		 638};
639
640static int wm8753_add_widgets(struct snd_soc_codec *codec)
641{
ce6120cc 642 struct snd_soc_dapm_context *dapm = &codec->dapm;
1f53aee0 643
ce6120cc
LG		 644 snd_soc_dapm_new_controls(dapm, wm8753_dapm_widgets,
645 ARRAY_SIZE(wm8753_dapm_widgets));
646 snd_soc_dapm_add_routes(dapm, audio_map, ARRAY_SIZE(audio_map));
1f53aee0 647
1f53aee0
LG		 648 return 0;
649}
650
651/* PLL divisors */
652struct _pll_div {
653 u32 div2:1;
654 u32 n:4;
655 u32 k:24;
656};
657
658/* The size in bits of the pll divide multiplied by 10
659 * to allow rounding later */
660#define FIXED_PLL_SIZE ((1 << 22) * 10)
661
662static void pll_factors(struct _pll_div *pll_div, unsigned int target,
663 unsigned int source)
664{
665 u64 Kpart;
666 unsigned int K, Ndiv, Nmod;
667
668 Ndiv = target / source;
669 if (Ndiv < 6) {
670 source >>= 1;
671 pll_div->div2 = 1;
672 Ndiv = target / source;
673 } else
674 pll_div->div2 = 0;
675
676 if ((Ndiv < 6) || (Ndiv > 12))
677 printk(KERN_WARNING
449bd54d 678 "wm8753: unsupported N = %u\n", Ndiv);
1f53aee0
LG		 679
680 pll_div->n = Ndiv;
681 Nmod = target % source;
682 Kpart = FIXED_PLL_SIZE * (long long)Nmod;
683
684 do_div(Kpart, source);
685
686 K = Kpart & 0xFFFFFFFF;
687
688 /* Check if we need to round */
689 if ((K % 10) >= 5)
690 K += 5;
691
692 /* Move down to proper range now rounding is done */
693 K /= 10;
694
695 pll_div->k = K;
696}
697
85488037
MB		 698static int wm8753_set_dai_pll(struct snd_soc_dai *codec_dai, int pll_id,
699 int source, unsigned int freq_in, unsigned int freq_out)
1f53aee0
LG		 700{
701 u16 reg, enable;
702 int offset;
703 struct snd_soc_codec *codec = codec_dai->codec;
704
705 if (pll_id < WM8753_PLL1 || pll_id > WM8753_PLL2)
706 return -ENODEV;
707
708 if (pll_id == WM8753_PLL1) {
709 offset = 0;
710 enable = 0x10;
776065e3 711 reg = snd_soc_read(codec, WM8753_CLOCK) & 0xffef;
1f53aee0
LG		 712 } else {
713 offset = 4;
714 enable = 0x8;
776065e3 715 reg = snd_soc_read(codec, WM8753_CLOCK) & 0xfff7;
1f53aee0
LG		 716 }
717
718 if (!freq_in || !freq_out) {
719 /* disable PLL */
776065e3
LPC		 720 snd_soc_write(codec, WM8753_PLL1CTL1 + offset, 0x0026);
721 snd_soc_write(codec, WM8753_CLOCK, reg);
1f53aee0
LG		 722 return 0;
723 } else {
724 u16 value = 0;
725 struct _pll_div pll_div;
726
727 pll_factors(&pll_div, freq_out * 8, freq_in);
728
729 /* set up N and K PLL divisor ratios */
730 /* bits 8:5 = PLL_N, bits 3:0 = PLL_K[21:18] */
731 value = (pll_div.n << 5) + ((pll_div.k & 0x3c0000) >> 18);
776065e3 732 snd_soc_write(codec, WM8753_PLL1CTL2 + offset, value);
1f53aee0
LG		 733
734 /* bits 8:0 = PLL_K[17:9] */
735 value = (pll_div.k & 0x03fe00) >> 9;
776065e3 736 snd_soc_write(codec, WM8753_PLL1CTL3 + offset, value);
1f53aee0
LG		 737
738 /* bits 8:0 = PLL_K[8:0] */
739 value = pll_div.k & 0x0001ff;
776065e3 740 snd_soc_write(codec, WM8753_PLL1CTL4 + offset, value);
1f53aee0
LG		 741
742 /* set PLL as input and enable */
776065e3 743 snd_soc_write(codec, WM8753_PLL1CTL1 + offset, 0x0027 |
1f53aee0 744 (pll_div.div2 << 3));
776065e3 745 snd_soc_write(codec, WM8753_CLOCK, reg | enable);
1f53aee0
LG		 746 }
747 return 0;
748}
749
750struct _coeff_div {
751 u32 mclk;
752 u32 rate;
753 u8 sr:5;
754 u8 usb:1;
755};
756
757/* codec hifi mclk (after PLL) clock divider coefficients */
758static const struct _coeff_div coeff_div[] = {
759 /* 8k */
760 {12288000, 8000, 0x6, 0x0},
761 {11289600, 8000, 0x16, 0x0},
762 {18432000, 8000, 0x7, 0x0},
763 {16934400, 8000, 0x17, 0x0},
764 {12000000, 8000, 0x6, 0x1},
765
766 /* 11.025k */
767 {11289600, 11025, 0x18, 0x0},
768 {16934400, 11025, 0x19, 0x0},
769 {12000000, 11025, 0x19, 0x1},
770
771 /* 16k */
772 {12288000, 16000, 0xa, 0x0},
773 {18432000, 16000, 0xb, 0x0},
774 {12000000, 16000, 0xa, 0x1},
775
776 /* 22.05k */
777 {11289600, 22050, 0x1a, 0x0},
778 {16934400, 22050, 0x1b, 0x0},
779 {12000000, 22050, 0x1b, 0x1},
780
781 /* 32k */
782 {12288000, 32000, 0xc, 0x0},
783 {18432000, 32000, 0xd, 0x0},
784 {12000000, 32000, 0xa, 0x1},
785
786 /* 44.1k */
787 {11289600, 44100, 0x10, 0x0},
788 {16934400, 44100, 0x11, 0x0},
789 {12000000, 44100, 0x11, 0x1},
790
791 /* 48k */
792 {12288000, 48000, 0x0, 0x0},
793 {18432000, 48000, 0x1, 0x0},
794 {12000000, 48000, 0x0, 0x1},
795
796 /* 88.2k */
797 {11289600, 88200, 0x1e, 0x0},
798 {16934400, 88200, 0x1f, 0x0},
799 {12000000, 88200, 0x1f, 0x1},
800
801 /* 96k */
802 {12288000, 96000, 0xe, 0x0},
803 {18432000, 96000, 0xf, 0x0},
804 {12000000, 96000, 0xe, 0x1},
805};
806
807static int get_coeff(int mclk, int rate)
808{
809 int i;
810
811 for (i = 0; i < ARRAY_SIZE(coeff_div); i++) {
812 if (coeff_div[i].rate == rate && coeff_div[i].mclk == mclk)
813 return i;
814 }
815 return -EINVAL;
816}
817
818/*
819 * Clock after PLL and dividers
820 */
e550e17f 821static int wm8753_set_dai_sysclk(struct snd_soc_dai *codec_dai,
1f53aee0
LG		 822 int clk_id, unsigned int freq, int dir)
823{
824 struct snd_soc_codec *codec = codec_dai->codec;
b2c812e2 825 struct wm8753_priv *wm8753 = snd_soc_codec_get_drvdata(codec);
1f53aee0
LG		 826
827 switch (freq) {
828 case 11289600:
829 case 12000000:
830 case 12288000:
831 case 16934400:
832 case 18432000:
833 if (clk_id == WM8753_MCLK) {
834 wm8753->sysclk = freq;
835 return 0;
836 } else if (clk_id == WM8753_PCMCLK) {
837 wm8753->pcmclk = freq;
838 return 0;
839 }
840 break;
841 }
842 return -EINVAL;
843}
844
845/*
846 * Set's ADC and Voice DAC format.
847 */
338ee253 848static int wm8753_vdac_adc_set_dai_fmt(struct snd_soc_codec *codec,
1f53aee0
LG		 849 unsigned int fmt)
850{
776065e3 851 u16 voice = snd_soc_read(codec, WM8753_PCM) & 0x01ec;
1f53aee0
LG		 852
853 /* interface format */
854 switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
855 case SND_SOC_DAIFMT_I2S:
856 voice |= 0x0002;
857 break;
858 case SND_SOC_DAIFMT_RIGHT_J:
859 break;
860 case SND_SOC_DAIFMT_LEFT_J:
861 voice |= 0x0001;
862 break;
863 case SND_SOC_DAIFMT_DSP_A:
864 voice |= 0x0003;
865 break;
866 case SND_SOC_DAIFMT_DSP_B:
867 voice |= 0x0013;
868 break;
869 default:
870 return -EINVAL;
871 }
872
776065e3 873 snd_soc_write(codec, WM8753_PCM, voice);
1f53aee0
LG		 874 return 0;
875}
876
877/*
878 * Set PCM DAI bit size and sample rate.
879 */
880static int wm8753_pcm_hw_params(struct snd_pcm_substream *substream,
dee89c4d
MB		 881 struct snd_pcm_hw_params *params,
882 struct snd_soc_dai *dai)
1f53aee0
LG		 883{
884 struct snd_soc_pcm_runtime *rtd = substream->private_data;
f0fba2ad 885 struct snd_soc_codec *codec = rtd->codec;
b2c812e2 886 struct wm8753_priv *wm8753 = snd_soc_codec_get_drvdata(codec);
776065e3
LPC		 887 u16 voice = snd_soc_read(codec, WM8753_PCM) & 0x01f3;
888 u16 srate = snd_soc_read(codec, WM8753_SRATE1) & 0x017f;
1f53aee0
LG		 889
890 /* bit size */
891 switch (params_format(params)) {
892 case SNDRV_PCM_FORMAT_S16_LE:
893 break;
894 case SNDRV_PCM_FORMAT_S20_3LE:
895 voice |= 0x0004;
896 break;
897 case SNDRV_PCM_FORMAT_S24_LE:
898 voice |= 0x0008;
899 break;
900 case SNDRV_PCM_FORMAT_S32_LE:
901 voice |= 0x000c;
902 break;
903 }
904
905 /* sample rate */
906 if (params_rate(params) * 384 == wm8753->pcmclk)
907 srate |= 0x80;
776065e3 908 snd_soc_write(codec, WM8753_SRATE1, srate);
1f53aee0 909
776065e3 910 snd_soc_write(codec, WM8753_PCM, voice);
1f53aee0
LG		 911 return 0;
912}
913
914/*
915 * Set's PCM dai fmt and BCLK.
916 */
338ee253 917static int wm8753_pcm_set_dai_fmt(struct snd_soc_codec *codec,
1f53aee0
LG		 918 unsigned int fmt)
919{
1f53aee0
LG		 920 u16 voice, ioctl;
921
776065e3
LPC		 922 voice = snd_soc_read(codec, WM8753_PCM) & 0x011f;
923 ioctl = snd_soc_read(codec, WM8753_IOCTL) & 0x015d;
1f53aee0
LG		 924
925 /* set master/slave audio interface */
926 switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) {
927 case SND_SOC_DAIFMT_CBS_CFS:
928 break;
929 case SND_SOC_DAIFMT_CBM_CFM:
930 ioctl |= 0x2;
931 case SND_SOC_DAIFMT_CBM_CFS:
932 voice |= 0x0040;
933 break;
934 default:
935 return -EINVAL;
936 }
937
938 /* clock inversion */
939 switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
940 case SND_SOC_DAIFMT_DSP_A:
941 case SND_SOC_DAIFMT_DSP_B:
942 /* frame inversion not valid for DSP modes */
943 switch (fmt & SND_SOC_DAIFMT_INV_MASK) {
944 case SND_SOC_DAIFMT_NB_NF:
945 break;
946 case SND_SOC_DAIFMT_IB_NF:
947 voice |= 0x0080;
948 break;
949 default:
950 return -EINVAL;
951 }
952 break;
953 case SND_SOC_DAIFMT_I2S:
954 case SND_SOC_DAIFMT_RIGHT_J:
955 case SND_SOC_DAIFMT_LEFT_J:
956 voice &= ~0x0010;
957 switch (fmt & SND_SOC_DAIFMT_INV_MASK) {
958 case SND_SOC_DAIFMT_NB_NF:
959 break;
960 case SND_SOC_DAIFMT_IB_IF:
961 voice |= 0x0090;
962 break;
963 case SND_SOC_DAIFMT_IB_NF:
964 voice |= 0x0080;
965 break;
966 case SND_SOC_DAIFMT_NB_IF:
967 voice |= 0x0010;
968 break;
969 default:
970 return -EINVAL;
971 }
972 break;
973 default:
974 return -EINVAL;
975 }
976
776065e3
LPC		 977 snd_soc_write(codec, WM8753_PCM, voice);
978 snd_soc_write(codec, WM8753_IOCTL, ioctl);
1f53aee0
LG		 979 return 0;
980}
981
e550e17f 982static int wm8753_set_dai_clkdiv(struct snd_soc_dai *codec_dai,
1f53aee0
LG		 983 int div_id, int div)
984{
985 struct snd_soc_codec *codec = codec_dai->codec;
986 u16 reg;
987
988 switch (div_id) {
989 case WM8753_PCMDIV:
776065e3
LPC		 990 reg = snd_soc_read(codec, WM8753_CLOCK) & 0x003f;
991 snd_soc_write(codec, WM8753_CLOCK, reg | div);
1f53aee0
LG		 992 break;
993 case WM8753_BCLKDIV:
776065e3
LPC		 994 reg = snd_soc_read(codec, WM8753_SRATE2) & 0x01c7;
995 snd_soc_write(codec, WM8753_SRATE2, reg | div);
1f53aee0
LG		 996 break;
997 case WM8753_VXCLKDIV:
776065e3
LPC		 998 reg = snd_soc_read(codec, WM8753_SRATE2) & 0x003f;
999 snd_soc_write(codec, WM8753_SRATE2, reg | div);
1f53aee0
LG		 1000 break;
1001 default:
1002 return -EINVAL;
1003 }
1004 return 0;
1005}
1006
1007/*
1008 * Set's HiFi DAC format.
1009 */
338ee253 1010static int wm8753_hdac_set_dai_fmt(struct snd_soc_codec *codec,
1f53aee0
LG		 1011 unsigned int fmt)
1012{
776065e3 1013 u16 hifi = snd_soc_read(codec, WM8753_HIFI) & 0x01e0;
1f53aee0
LG		 1014
1015 /* interface format */
1016 switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
1017 case SND_SOC_DAIFMT_I2S:
1018 hifi |= 0x0002;
1019 break;
1020 case SND_SOC_DAIFMT_RIGHT_J:
1021 break;
1022 case SND_SOC_DAIFMT_LEFT_J:
1023 hifi |= 0x0001;
1024 break;
1025 case SND_SOC_DAIFMT_DSP_A:
1026 hifi |= 0x0003;
1027 break;
1028 case SND_SOC_DAIFMT_DSP_B:
1029 hifi |= 0x0013;
1030 break;
1031 default:
1032 return -EINVAL;
1033 }
1034
776065e3 1035 snd_soc_write(codec, WM8753_HIFI, hifi);
1f53aee0
LG		 1036 return 0;
1037}
1038
1039/*
1040 * Set's I2S DAI format.
1041 */
338ee253 1042static int wm8753_i2s_set_dai_fmt(struct snd_soc_codec *codec,
1f53aee0
LG		 1043 unsigned int fmt)
1044{
1f53aee0
LG		 1045 u16 ioctl, hifi;
1046
776065e3
LPC		 1047 hifi = snd_soc_read(codec, WM8753_HIFI) & 0x011f;
1048 ioctl = snd_soc_read(codec, WM8753_IOCTL) & 0x00ae;
1f53aee0
LG		 1049
1050 /* set master/slave audio interface */
1051 switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) {
1052 case SND_SOC_DAIFMT_CBS_CFS:
1053 break;
1054 case SND_SOC_DAIFMT_CBM_CFM:
1055 ioctl |= 0x1;
1056 case SND_SOC_DAIFMT_CBM_CFS:
1057 hifi |= 0x0040;
1058 break;
1059 default:
1060 return -EINVAL;
1061 }
1062
1063 /* clock inversion */
1064 switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
1065 case SND_SOC_DAIFMT_DSP_A:
1066 case SND_SOC_DAIFMT_DSP_B:
1067 /* frame inversion not valid for DSP modes */
1068 switch (fmt & SND_SOC_DAIFMT_INV_MASK) {
1069 case SND_SOC_DAIFMT_NB_NF:
1070 break;
1071 case SND_SOC_DAIFMT_IB_NF:
1072 hifi |= 0x0080;
1073 break;
1074 default:
1075 return -EINVAL;
1076 }
1077 break;
1078 case SND_SOC_DAIFMT_I2S:
1079 case SND_SOC_DAIFMT_RIGHT_J:
1080 case SND_SOC_DAIFMT_LEFT_J:
1081 hifi &= ~0x0010;
1082 switch (fmt & SND_SOC_DAIFMT_INV_MASK) {
1083 case SND_SOC_DAIFMT_NB_NF:
1084 break;
1085 case SND_SOC_DAIFMT_IB_IF:
1086 hifi |= 0x0090;
1087 break;
1088 case SND_SOC_DAIFMT_IB_NF:
1089 hifi |= 0x0080;
1090 break;
1091 case SND_SOC_DAIFMT_NB_IF:
1092 hifi |= 0x0010;
1093 break;
1094 default:
1095 return -EINVAL;
1096 }
1097 break;
1098 default:
1099 return -EINVAL;
1100 }
1101
776065e3
LPC		 1102 snd_soc_write(codec, WM8753_HIFI, hifi);
1103 snd_soc_write(codec, WM8753_IOCTL, ioctl);
1f53aee0
LG		 1104 return 0;
1105}
1106
1107/*
1108 * Set PCM DAI bit size and sample rate.
1109 */
1110static int wm8753_i2s_hw_params(struct snd_pcm_substream *substream,
dee89c4d
MB		 1111 struct snd_pcm_hw_params *params,
1112 struct snd_soc_dai *dai)
1f53aee0
LG		 1113{
1114 struct snd_soc_pcm_runtime *rtd = substream->private_data;
f0fba2ad 1115 struct snd_soc_codec *codec = rtd->codec;
b2c812e2 1116 struct wm8753_priv *wm8753 = snd_soc_codec_get_drvdata(codec);
776065e3
LPC		 1117 u16 srate = snd_soc_read(codec, WM8753_SRATE1) & 0x01c0;
1118 u16 hifi = snd_soc_read(codec, WM8753_HIFI) & 0x01f3;
1f53aee0
LG		 1119 int coeff;
1120
1121 /* is digital filter coefficient valid ? */
1122 coeff = get_coeff(wm8753->sysclk, params_rate(params));
1123 if (coeff < 0) {
1124 printk(KERN_ERR "wm8753 invalid MCLK or rate\n");
1125 return coeff;
1126 }
776065e3 1127 snd_soc_write(codec, WM8753_SRATE1, srate | (coeff_div[coeff].sr << 1) |
1f53aee0
LG		 1128 coeff_div[coeff].usb);
1129
1130 /* bit size */
1131 switch (params_format(params)) {
1132 case SNDRV_PCM_FORMAT_S16_LE:
1133 break;
1134 case SNDRV_PCM_FORMAT_S20_3LE:
1135 hifi |= 0x0004;
1136 break;
1137 case SNDRV_PCM_FORMAT_S24_LE:
1138 hifi |= 0x0008;
1139 break;
1140 case SNDRV_PCM_FORMAT_S32_LE:
1141 hifi |= 0x000c;
1142 break;
1143 }
1144
776065e3 1145 snd_soc_write(codec, WM8753_HIFI, hifi);
1f53aee0
LG		 1146 return 0;
1147}
1148
338ee253 1149static int wm8753_mode1v_set_dai_fmt(struct snd_soc_codec *codec,
1f53aee0
LG		 1150 unsigned int fmt)
1151{
1f53aee0
LG		 1152 u16 clock;
1153
1154 /* set clk source as pcmclk */
776065e3
LPC		 1155 clock = snd_soc_read(codec, WM8753_CLOCK) & 0xfffb;
1156 snd_soc_write(codec, WM8753_CLOCK, clock);
1f53aee0 1157
338ee253 1158 return wm8753_vdac_adc_set_dai_fmt(codec, fmt);
1f53aee0
LG		 1159}
1160
338ee253 1161static int wm8753_mode1h_set_dai_fmt(struct snd_soc_codec *codec,
1f53aee0
LG		 1162 unsigned int fmt)
1163{
338ee253 1164 return wm8753_hdac_set_dai_fmt(codec, fmt);
1f53aee0
LG		 1165}
1166
338ee253 1167static int wm8753_mode2_set_dai_fmt(struct snd_soc_codec *codec,
1f53aee0
LG		 1168 unsigned int fmt)
1169{
1f53aee0
LG		 1170 u16 clock;
1171
1172 /* set clk source as pcmclk */
776065e3
LPC		 1173 clock = snd_soc_read(codec, WM8753_CLOCK) & 0xfffb;
1174 snd_soc_write(codec, WM8753_CLOCK, clock);
1f53aee0 1175
338ee253 1176 return wm8753_vdac_adc_set_dai_fmt(codec, fmt);
1f53aee0
LG		 1177}
1178
338ee253 1179static int wm8753_mode3_4_set_dai_fmt(struct snd_soc_codec *codec,
1f53aee0
LG		 1180 unsigned int fmt)
1181{
1f53aee0
LG		 1182 u16 clock;
1183
1184 /* set clk source as mclk */
776065e3
LPC		 1185 clock = snd_soc_read(codec, WM8753_CLOCK) & 0xfffb;
1186 snd_soc_write(codec, WM8753_CLOCK, clock | 0x4);
1f53aee0 1187
338ee253 1188 if (wm8753_hdac_set_dai_fmt(codec, fmt) < 0)
1f53aee0 1189 return -EINVAL;
338ee253 1190 return wm8753_vdac_adc_set_dai_fmt(codec, fmt);
1f53aee0
LG		 1191}
1192
338ee253
LPC		 1193static int wm8753_hifi_write_dai_fmt(struct snd_soc_codec *codec,
1194 unsigned int fmt)
1195{
1196 struct wm8753_priv *wm8753 = snd_soc_codec_get_drvdata(codec);
1197 int ret = 0;
1198
1199 switch (wm8753->dai_func) {
1200 case 0:
1201 ret = wm8753_mode1h_set_dai_fmt(codec, fmt);
1202 break;
1203 case 1:
1204 ret = wm8753_mode2_set_dai_fmt(codec, fmt);
1205 break;
1206 case 2:
1207 case 3:
1208 ret = wm8753_mode3_4_set_dai_fmt(codec, fmt);
1209 break;
1210 default:
1211 break;
1212 }
1213 if (ret)
1214 return ret;
1215
1216 return wm8753_i2s_set_dai_fmt(codec, fmt);
1217}
1218
1219static int wm8753_hifi_set_dai_fmt(struct snd_soc_dai *codec_dai,
1220 unsigned int fmt)
1221{
1222 struct snd_soc_codec *codec = codec_dai->codec;
1223 struct wm8753_priv *wm8753 = snd_soc_codec_get_drvdata(codec);
1224
1225 wm8753->hifi_fmt = fmt;
1226
1227 return wm8753_hifi_write_dai_fmt(codec, fmt);
1228};
1229
1230static int wm8753_voice_write_dai_fmt(struct snd_soc_codec *codec,
1231 unsigned int fmt)
1232{
1233 struct wm8753_priv *wm8753 = snd_soc_codec_get_drvdata(codec);
1234 int ret = 0;
1235
1236 if (wm8753->dai_func != 0)
1237 return 0;
1238
1239 ret = wm8753_mode1v_set_dai_fmt(codec, fmt);
1240 if (ret)
1241 return ret;
1242 ret = wm8753_pcm_set_dai_fmt(codec, fmt);
1243 if (ret)
1244 return ret;
1245
1246 return 0;
1247};
1248
1249static int wm8753_voice_set_dai_fmt(struct snd_soc_dai *codec_dai,
1250 unsigned int fmt)
1251{
1252 struct snd_soc_codec *codec = codec_dai->codec;
1253 struct wm8753_priv *wm8753 = snd_soc_codec_get_drvdata(codec);
1254
1255 wm8753->voice_fmt = fmt;
1256
1257 return wm8753_voice_write_dai_fmt(codec, fmt);
1258};
1259
e550e17f 1260static int wm8753_mute(struct snd_soc_dai *dai, int mute)
1f53aee0
LG		 1261{
1262 struct snd_soc_codec *codec = dai->codec;
776065e3 1263 u16 mute_reg = snd_soc_read(codec, WM8753_DAC) & 0xfff7;
f0fba2ad 1264 struct wm8753_priv *wm8753 = snd_soc_codec_get_drvdata(codec);
1f53aee0
LG		 1265
1266 /* the digital mute covers the HiFi and Voice DAC's on the WM8753.
1267 * make sure we check if they are not both active when we mute */
f0fba2ad
LG		 1268 if (mute && wm8753->dai_func == 1) {
1269 if (!codec->active)
776065e3 1270 snd_soc_write(codec, WM8753_DAC, mute_reg | 0x8);
1f53aee0
LG		 1271 } else {
1272 if (mute)
776065e3 1273 snd_soc_write(codec, WM8753_DAC, mute_reg | 0x8);
1f53aee0 1274 else
776065e3 1275 snd_soc_write(codec, WM8753_DAC, mute_reg);
1f53aee0
LG		 1276 }
1277
1278 return 0;
1279}
1280
0be9898a
MB		 1281static int wm8753_set_bias_level(struct snd_soc_codec *codec,
1282 enum snd_soc_bias_level level)
1f53aee0 1283{
776065e3 1284 u16 pwr_reg = snd_soc_read(codec, WM8753_PWR1) & 0xfe3e;
1f53aee0 1285
0be9898a
MB		 1286 switch (level) {
1287 case SND_SOC_BIAS_ON:
1f53aee0 1288 /* set vmid to 50k and unmute dac */
776065e3 1289 snd_soc_write(codec, WM8753_PWR1, pwr_reg | 0x00c0);
1f53aee0 1290 break;
0be9898a 1291 case SND_SOC_BIAS_PREPARE:
1f53aee0 1292 /* set vmid to 5k for quick power up */
776065e3 1293 snd_soc_write(codec, WM8753_PWR1, pwr_reg | 0x01c1);
1f53aee0 1294 break;
0be9898a 1295 case SND_SOC_BIAS_STANDBY:
1f53aee0 1296 /* mute dac and set vmid to 500k, enable VREF */
776065e3 1297 snd_soc_write(codec, WM8753_PWR1, pwr_reg | 0x0141);
1f53aee0 1298 break;
0be9898a 1299 case SND_SOC_BIAS_OFF:
776065e3 1300 snd_soc_write(codec, WM8753_PWR1, 0x0001);
1f53aee0
LG		 1301 break;
1302 }
ce6120cc 1303 codec->dapm.bias_level = level;
1f53aee0
LG		 1304 return 0;
1305}
1306
1307#define WM8753_RATES (SNDRV_PCM_RATE_8000 | SNDRV_PCM_RATE_11025 |\
60fc684a
MB		 1308 SNDRV_PCM_RATE_16000 | SNDRV_PCM_RATE_22050 |\
1309 SNDRV_PCM_RATE_44100 | SNDRV_PCM_RATE_48000 |\
1310 SNDRV_PCM_RATE_88200 | SNDRV_PCM_RATE_96000)
1f53aee0
LG		 1311
1312#define WM8753_FORMATS (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S20_3LE |\
1313 SNDRV_PCM_FMTBIT_S24_LE)
1314
1315/*
25985edc 1316 * The WM8753 supports up to 4 different and mutually exclusive DAI
1f53aee0
LG		 1317 * configurations. This gives 2 PCM's available for use, hifi and voice.
1318 * NOTE: The Voice PCM cannot play or capture audio to the CPU as it's DAI
1319 * is connected between the wm8753 and a BT codec or GSM modem.
1320 *
1321 * 1. Voice over PCM DAI - HIFI DAC over HIFI DAI
1322 * 2. Voice over HIFI DAI - HIFI disabled
1323 * 3. Voice disabled - HIFI over HIFI
1324 * 4. Voice disabled - HIFI over HIFI, uses voice DAI LRC for capture
1325 */
338ee253 1326static struct snd_soc_dai_ops wm8753_dai_ops_hifi_mode = {
6335d055
EM		 1327 .hw_params = wm8753_i2s_hw_params,
1328 .digital_mute = wm8753_mute,
338ee253 1329 .set_fmt = wm8753_hifi_set_dai_fmt,
6335d055
EM		 1330 .set_clkdiv = wm8753_set_dai_clkdiv,
1331 .set_pll = wm8753_set_dai_pll,
1332 .set_sysclk = wm8753_set_dai_sysclk,
1333};
1334
338ee253 1335static struct snd_soc_dai_ops wm8753_dai_ops_voice_mode = {
6335d055
EM		 1336 .hw_params = wm8753_pcm_hw_params,
1337 .digital_mute = wm8753_mute,
338ee253 1338 .set_fmt = wm8753_voice_set_dai_fmt,
6335d055
EM		 1339 .set_clkdiv = wm8753_set_dai_clkdiv,
1340 .set_pll = wm8753_set_dai_pll,
1341 .set_sysclk = wm8753_set_dai_sysclk,
1342};
1343
338ee253 1344static struct snd_soc_dai_driver wm8753_dai[] = {
1f53aee0 1345/* DAI HiFi mode 1 */
f0fba2ad 1346{ .name = "wm8753-hifi",
1f53aee0
LG		 1347 .playback = {
1348 .stream_name = "HiFi Playback",
1349 .channels_min = 1,
1350 .channels_max = 2,
1351 .rates = WM8753_RATES,
338ee253
LPC		 1352 .formats = WM8753_FORMATS
1353 },
1f53aee0
LG		 1354 .capture = { /* dummy for fast DAI switching */
1355 .stream_name = "Capture",
1356 .channels_min = 1,
1357 .channels_max = 2,
1358 .rates = WM8753_RATES,
338ee253
LPC		 1359 .formats = WM8753_FORMATS
1360 },
1361 .ops = &wm8753_dai_ops_hifi_mode,
1f53aee0
LG		 1362},
1363/* DAI Voice mode 1 */
f0fba2ad 1364{ .name = "wm8753-voice",
1f53aee0
LG		 1365 .playback = {
1366 .stream_name = "Voice Playback",
1367 .channels_min = 1,
1368 .channels_max = 1,
1369 .rates = WM8753_RATES,
338ee253
LPC		 1370 .formats = WM8753_FORMATS,
1371 },
1f53aee0
LG		 1372 .capture = {
1373 .stream_name = "Capture",
1374 .channels_min = 1,
1375 .channels_max = 2,
1376 .rates = WM8753_RATES,
338ee253 1377 .formats = WM8753_FORMATS,
9e70c1f0 1378 },
338ee253
LPC		 1379 .ops = &wm8753_dai_ops_voice_mode,
1380},
9e70c1f0 1381};
1f53aee0 1382
1f53aee0
LG		 1383static void wm8753_work(struct work_struct *work)
1384{
ce6120cc
LG		 1385 struct snd_soc_dapm_context *dapm =
1386 container_of(work, struct snd_soc_dapm_context,
1387 delayed_work.work);
1388 struct snd_soc_codec *codec = dapm->codec;
1389 wm8753_set_bias_level(codec, dapm->bias_level);
1f53aee0
LG		 1390}
1391
f0fba2ad 1392static int wm8753_suspend(struct snd_soc_codec *codec, pm_message_t state)
1f53aee0 1393{
0be9898a 1394 wm8753_set_bias_level(codec, SND_SOC_BIAS_OFF);
1f53aee0
LG		 1395 return 0;
1396}
1397
f0fba2ad 1398static int wm8753_resume(struct snd_soc_codec *codec)
1f53aee0 1399{
776065e3 1400 u16 *reg_cache = codec->reg_cache;
1f53aee0 1401 int i;
1f53aee0 1402
1f53aee0 1403 /* Sync reg_cache with the hardware */
776065e3
LPC		 1404 for (i = 1; i < ARRAY_SIZE(wm8753_reg); i++) {
1405 if (i == WM8753_RESET)
1f53aee0 1406 continue;
e611bd82
MB		 1407
1408 /* No point in writing hardware default values back */
776065e3 1409 if (reg_cache[i] == wm8753_reg[i])
e611bd82
MB		 1410 continue;
1411
776065e3 1412 snd_soc_write(codec, i, reg_cache[i]);
1f53aee0
LG		 1413 }
1414
0be9898a 1415 wm8753_set_bias_level(codec, SND_SOC_BIAS_STANDBY);
1f53aee0
LG		 1416
1417 /* charge wm8753 caps */
ce6120cc 1418 if (codec->dapm.suspend_bias_level == SND_SOC_BIAS_ON) {
0be9898a 1419 wm8753_set_bias_level(codec, SND_SOC_BIAS_PREPARE);
ce6120cc
LG		 1420 codec->dapm.bias_level = SND_SOC_BIAS_ON;
1421 schedule_delayed_work(&codec->dapm.delayed_work,
1f53aee0
LG		 1422 msecs_to_jiffies(caps_charge));
1423 }
1424
1425 return 0;
1426}
1427
f0fba2ad 1428static int wm8753_probe(struct snd_soc_codec *codec)
1f53aee0 1429{
f0fba2ad 1430 struct wm8753_priv *wm8753 = snd_soc_codec_get_drvdata(codec);
776065e3 1431 int ret;
1f53aee0 1432
ce6120cc 1433 INIT_DELAYED_WORK(&codec->dapm.delayed_work, wm8753_work);
c2bac160 1434
f0fba2ad
LG		 1435 ret = snd_soc_codec_set_cache_io(codec, 7, 9, wm8753->control_type);
1436 if (ret < 0) {
1437 dev_err(codec->dev, "Failed to set cache I/O: %d\n", ret);
1438 return ret;
c2bac160
MB		 1439 }
1440
c2bac160
MB		 1441 ret = wm8753_reset(codec);
1442 if (ret < 0) {
f0fba2ad
LG		 1443 dev_err(codec->dev, "Failed to issue reset: %d\n", ret);
1444 return ret;
c2bac160
MB		 1445 }
1446
f0fba2ad
LG		 1447 wm8753_set_bias_level(codec, SND_SOC_BIAS_STANDBY);
1448 wm8753->dai_func = 0;
1449
c2bac160
MB		 1450 /* charge output caps */
1451 wm8753_set_bias_level(codec, SND_SOC_BIAS_PREPARE);
ce6120cc 1452 schedule_delayed_work(&codec->dapm.delayed_work,
c2bac160
MB		 1453 msecs_to_jiffies(caps_charge));
1454
1455 /* set the update bits */
776065e3
LPC		 1456 snd_soc_update_bits(codec, WM8753_LDAC, 0x0100, 0x0100);
1457 snd_soc_update_bits(codec, WM8753_RDAC, 0x0100, 0x0100);
21d17dd2
AL		 1458 snd_soc_update_bits(codec, WM8753_LADC, 0x0100, 0x0100);
1459 snd_soc_update_bits(codec, WM8753_RADC, 0x0100, 0x0100);
776065e3
LPC		 1460 snd_soc_update_bits(codec, WM8753_LOUT1V, 0x0100, 0x0100);
1461 snd_soc_update_bits(codec, WM8753_ROUT1V, 0x0100, 0x0100);
1462 snd_soc_update_bits(codec, WM8753_LOUT2V, 0x0100, 0x0100);
1463 snd_soc_update_bits(codec, WM8753_ROUT2V, 0x0100, 0x0100);
1464 snd_soc_update_bits(codec, WM8753_LINVOL, 0x0100, 0x0100);
1465 snd_soc_update_bits(codec, WM8753_RINVOL, 0x0100, 0x0100);
c2bac160 1466
f0fba2ad
LG		 1467 snd_soc_add_controls(codec, wm8753_snd_controls,
1468 ARRAY_SIZE(wm8753_snd_controls));
1469 wm8753_add_widgets(codec);
c2bac160
MB		 1470
1471 return 0;
c2bac160
MB		 1472}
1473
f0fba2ad
LG		 1474/* power down chip */
1475static int wm8753_remove(struct snd_soc_codec *codec)
c2bac160 1476{
fdea0571 1477 flush_delayed_work_sync(&codec->dapm.delayed_work);
f0fba2ad
LG		 1478 wm8753_set_bias_level(codec, SND_SOC_BIAS_OFF);
1479
1480 return 0;
c2bac160
MB		 1481}
1482
f0fba2ad
LG		 1483static struct snd_soc_codec_driver soc_codec_dev_wm8753 = {
1484 .probe = wm8753_probe,
1485 .remove = wm8753_remove,
1486 .suspend = wm8753_suspend,
1487 .resume = wm8753_resume,
1488 .set_bias_level = wm8753_set_bias_level,
e5eec34c 1489 .reg_cache_size = ARRAY_SIZE(wm8753_reg),
f0fba2ad
LG		 1490 .reg_word_size = sizeof(u16),
1491 .reg_cache_default = wm8753_reg,
1492};
69e169da 1493
70e14122
MB		 1494static const struct of_device_id wm8753_of_match[] = {
1495 { .compatible = "wlf,wm8753", },
1496 { }
1497};
1498MODULE_DEVICE_TABLE(of, wm8753_of_match);
1499
f0fba2ad
LG		 1500#if defined(CONFIG_SPI_MASTER)
1501static int __devinit wm8753_spi_probe(struct spi_device *spi)
69e169da 1502{
c2bac160 1503 struct wm8753_priv *wm8753;
f0fba2ad 1504 int ret;
69e169da 1505
c2bac160
MB		 1506 wm8753 = kzalloc(sizeof(struct wm8753_priv), GFP_KERNEL);
1507 if (wm8753 == NULL)
1508 return -ENOMEM;
69e169da 1509
f0fba2ad
LG		 1510 wm8753->control_type = SND_SOC_SPI;
1511 spi_set_drvdata(spi, wm8753);
c2bac160 1512
f0fba2ad
LG		 1513 ret = snd_soc_register_codec(&spi->dev,
1514 &soc_codec_dev_wm8753, wm8753_dai, ARRAY_SIZE(wm8753_dai));
1515 if (ret < 0)
1516 kfree(wm8753);
1517 return ret;
69e169da
MB		 1518}
1519
f0fba2ad 1520static int __devexit wm8753_spi_remove(struct spi_device *spi)
69e169da 1521{
f0fba2ad
LG		 1522 snd_soc_unregister_codec(&spi->dev);
1523 kfree(spi_get_drvdata(spi));
1524 return 0;
69e169da
MB		 1525}
1526
f0fba2ad 1527static struct spi_driver wm8753_spi_driver = {
69e169da 1528 .driver = {
63010634 1529 .name = "wm8753",
f0fba2ad 1530 .owner = THIS_MODULE,
70e14122 1531 .of_match_table = wm8753_of_match,
69e169da 1532 },
f0fba2ad
LG		 1533 .probe = wm8753_spi_probe,
1534 .remove = __devexit_p(wm8753_spi_remove),
69e169da 1535};
f0fba2ad 1536#endif /* CONFIG_SPI_MASTER */
69e169da 1537
f0fba2ad
LG		 1538#if defined(CONFIG_I2C) || defined(CONFIG_I2C_MODULE)
1539static __devinit int wm8753_i2c_probe(struct i2c_client *i2c,
1540 const struct i2c_device_id *id)
69e169da 1541{
c2bac160 1542 struct wm8753_priv *wm8753;
f0fba2ad 1543 int ret;
c2bac160
MB		 1544
1545 wm8753 = kzalloc(sizeof(struct wm8753_priv), GFP_KERNEL);
1546 if (wm8753 == NULL)
1547 return -ENOMEM;
69e169da 1548
f0fba2ad 1549 i2c_set_clientdata(i2c, wm8753);
f0fba2ad 1550 wm8753->control_type = SND_SOC_I2C;
69e169da 1551
f0fba2ad
LG		 1552 ret = snd_soc_register_codec(&i2c->dev,
1553 &soc_codec_dev_wm8753, wm8753_dai, ARRAY_SIZE(wm8753_dai));
1554 if (ret < 0)
1555 kfree(wm8753);
1556 return ret;
69e169da
MB		 1557}
1558
f0fba2ad 1559static __devexit int wm8753_i2c_remove(struct i2c_client *client)
69e169da 1560{
f0fba2ad
LG		 1561 snd_soc_unregister_codec(&client->dev);
1562 kfree(i2c_get_clientdata(client));
69e169da
MB		 1563 return 0;
1564}
1565
f0fba2ad
LG		 1566static const struct i2c_device_id wm8753_i2c_id[] = {
1567 { "wm8753", 0 },
1568 { }
1569};
1570MODULE_DEVICE_TABLE(i2c, wm8753_i2c_id);
1571
1572static struct i2c_driver wm8753_i2c_driver = {
69e169da 1573 .driver = {
63010634 1574 .name = "wm8753",
f0fba2ad 1575 .owner = THIS_MODULE,
70e14122 1576 .of_match_table = wm8753_of_match,
69e169da 1577 },
f0fba2ad
LG		 1578 .probe = wm8753_i2c_probe,
1579 .remove = __devexit_p(wm8753_i2c_remove),
1580 .id_table = wm8753_i2c_id,
69e169da
MB		 1581};
1582#endif
1583
c9b3a40f 1584static int __init wm8753_modinit(void)
64089b84 1585{
f0fba2ad 1586 int ret = 0;
c2bac160
MB		 1587#if defined(CONFIG_I2C) || defined(CONFIG_I2C_MODULE)
1588 ret = i2c_add_driver(&wm8753_i2c_driver);
f0fba2ad
LG		 1589 if (ret != 0) {
1590 printk(KERN_ERR "Failed to register wm8753 I2C driver: %d\n",
1591 ret);
1592 }
c2bac160
MB		 1593#endif
1594#if defined(CONFIG_SPI_MASTER)
1595 ret = spi_register_driver(&wm8753_spi_driver);
f0fba2ad
LG		 1596 if (ret != 0) {
1597 printk(KERN_ERR "Failed to register wm8753 SPI driver: %d\n",
1598 ret);
1599 }
c2bac160 1600#endif
f0fba2ad 1601 return ret;
64089b84
MB		 1602}
1603module_init(wm8753_modinit);
1604
1605static void __exit wm8753_exit(void)
1606{
c2bac160
MB		 1607#if defined(CONFIG_I2C) || defined(CONFIG_I2C_MODULE)
1608 i2c_del_driver(&wm8753_i2c_driver);
1609#endif
1610#if defined(CONFIG_SPI_MASTER)
1611 spi_unregister_driver(&wm8753_spi_driver);
1612#endif
64089b84
MB		 1613}
1614module_exit(wm8753_exit);
1615
1f53aee0
LG		 1616MODULE_DESCRIPTION("ASoC WM8753 driver");
1617MODULE_AUTHOR("Liam Girdwood");
1618MODULE_LICENSE("GPL");
Linux kernel - Deliverables
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