projects / deliverable / linux.git / blame
| Commit | Line | Data |
|---|---|---|
| 0b5e92c5 JC |
1 | /* |
| 2 | * wm8940.h -- WM8940 Soc Audio driver | |
| 3 | * | |
| 4 | * This program is free software; you can redistribute it and/or modify | |
| 5 | * it under the terms of the GNU General Public License version 2 as | |
| 6 | * published by the Free Software Foundation. | |
| 7 | */ | |
| 8 | ||
| 9 | #ifndef _WM8940_H | |
| 10 | #define _WM8940_H | |
| 11 | ||
| 12 | struct wm8940_setup_data { | |
| 13 | /* Vref to analogue output resistance */ | |
| 14 | #define WM8940_VROI_1K 0 | |
| 15 | #define WM8940_VROI_30K 1 | |
| 16 | unsigned int vroi:1; | |
| 17 | }; | |
| 0b5e92c5 JC |
18 | |
| 19 | /* WM8940 register space */ | |
| 20 | #define WM8940_SOFTRESET 0x00 | |
| 21 | #define WM8940_POWER1 0x01 | |
| 22 | #define WM8940_POWER2 0x02 | |
| 23 | #define WM8940_POWER3 0x03 | |
| 24 | #define WM8940_IFACE 0x04 | |
| 25 | #define WM8940_COMPANDINGCTL 0x05 | |
| 26 | #define WM8940_CLOCK 0x06 | |
| 27 | #define WM8940_ADDCNTRL 0x07 | |
| 28 | #define WM8940_GPIO 0x08 | |
| 29 | #define WM8940_CTLINT 0x09 | |
| 30 | #define WM8940_DAC 0x0A | |
| 31 | #define WM8940_DACVOL 0x0B | |
| 32 | ||
| 33 | #define WM8940_ADC 0x0E | |
| 34 | #define WM8940_ADCVOL 0x0F | |
| 35 | #define WM8940_NOTCH1 0x10 | |
| 36 | #define WM8940_NOTCH2 0x11 | |
| 37 | #define WM8940_NOTCH3 0x12 | |
| 38 | #define WM8940_NOTCH4 0x13 | |
| 39 | #define WM8940_NOTCH5 0x14 | |
| 40 | #define WM8940_NOTCH6 0x15 | |
| 41 | #define WM8940_NOTCH7 0x16 | |
| 42 | #define WM8940_NOTCH8 0x17 | |
| 43 | #define WM8940_DACLIM1 0x18 | |
| 44 | #define WM8940_DACLIM2 0x19 | |
| 45 | ||
| 46 | #define WM8940_ALC1 0x20 | |
| 47 | #define WM8940_ALC2 0x21 | |
| 48 | #define WM8940_ALC3 0x22 | |
| 49 | #define WM8940_NOISEGATE 0x23 | |
| 50 | #define WM8940_PLLN 0x24 | |
| 51 | #define WM8940_PLLK1 0x25 | |
| 52 | #define WM8940_PLLK2 0x26 | |
| 53 | #define WM8940_PLLK3 0x27 | |
| 54 | ||
| 55 | #define WM8940_ALC4 0x2A | |
| 56 | ||
| 57 | #define WM8940_INPUTCTL 0x2C | |
| 58 | #define WM8940_PGAGAIN 0x2D | |
| 59 | ||
| 60 | #define WM8940_ADCBOOST 0x2F | |
| 61 | ||
| 62 | #define WM8940_OUTPUTCTL 0x31 | |
| 63 | #define WM8940_SPKMIX 0x32 | |
| 64 | ||
| 65 | #define WM8940_SPKVOL 0x36 | |
| 66 | ||
| 67 | #define WM8940_MONOMIX 0x38 | |
| 68 | ||
| 69 | #define WM8940_CACHEREGNUM 0x57 | |
| 70 | ||
| 71 | ||
| 72 | /* Clock divider Id's */ | |
| 73 | #define WM8940_BCLKDIV 0 | |
| 74 | #define WM8940_MCLKDIV 1 | |
| 75 | #define WM8940_OPCLKDIV 2 | |
| 76 | ||
| 77 | /* MCLK clock dividers */ | |
| 78 | #define WM8940_MCLKDIV_1 0 | |
| 79 | #define WM8940_MCLKDIV_1_5 1 | |
| 80 | #define WM8940_MCLKDIV_2 2 | |
| 81 | #define WM8940_MCLKDIV_3 3 | |
| 82 | #define WM8940_MCLKDIV_4 4 | |
| 83 | #define WM8940_MCLKDIV_6 5 | |
| 84 | #define WM8940_MCLKDIV_8 6 | |
| 85 | #define WM8940_MCLKDIV_12 7 | |
| 86 | ||
| 87 | /* BCLK clock dividers */ | |
| 88 | #define WM8940_BCLKDIV_1 0 | |
| 89 | #define WM8940_BCLKDIV_2 1 | |
| 90 | #define WM8940_BCLKDIV_4 2 | |
| 91 | #define WM8940_BCLKDIV_8 3 | |
| 92 | #define WM8940_BCLKDIV_16 4 | |
| 93 | #define WM8940_BCLKDIV_32 5 | |
| 94 | ||
| 95 | /* PLL Out Dividers */ | |
| 96 | #define WM8940_OPCLKDIV_1 0 | |
| 97 | #define WM8940_OPCLKDIV_2 1 | |
| 98 | #define WM8940_OPCLKDIV_3 2 | |
| 99 | #define WM8940_OPCLKDIV_4 3 | |
| 100 | ||
| 101 | #endif /* _WM8940_H */ | |
| 102 |