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2159ad93 MB |
1 | /* |
2 | * wm_adsp.c -- Wolfson ADSP support | |
3 | * | |
4 | * Copyright 2012 Wolfson Microelectronics plc | |
5 | * | |
6 | * Author: Mark Brown <broonie@opensource.wolfsonmicro.com> | |
7 | * | |
8 | * This program is free software; you can redistribute it and/or modify | |
9 | * it under the terms of the GNU General Public License version 2 as | |
10 | * published by the Free Software Foundation. | |
11 | */ | |
12 | ||
13 | #include <linux/module.h> | |
14 | #include <linux/moduleparam.h> | |
15 | #include <linux/init.h> | |
16 | #include <linux/delay.h> | |
17 | #include <linux/firmware.h> | |
cf17c83c | 18 | #include <linux/list.h> |
2159ad93 MB |
19 | #include <linux/pm.h> |
20 | #include <linux/pm_runtime.h> | |
21 | #include <linux/regmap.h> | |
973838a0 | 22 | #include <linux/regulator/consumer.h> |
2159ad93 | 23 | #include <linux/slab.h> |
cdcd7f72 | 24 | #include <linux/vmalloc.h> |
6ab2b7b4 | 25 | #include <linux/workqueue.h> |
f9f55e31 | 26 | #include <linux/debugfs.h> |
2159ad93 MB |
27 | #include <sound/core.h> |
28 | #include <sound/pcm.h> | |
29 | #include <sound/pcm_params.h> | |
30 | #include <sound/soc.h> | |
31 | #include <sound/jack.h> | |
32 | #include <sound/initval.h> | |
33 | #include <sound/tlv.h> | |
34 | ||
35 | #include <linux/mfd/arizona/registers.h> | |
36 | ||
dc91428a | 37 | #include "arizona.h" |
2159ad93 MB |
38 | #include "wm_adsp.h" |
39 | ||
40 | #define adsp_crit(_dsp, fmt, ...) \ | |
41 | dev_crit(_dsp->dev, "DSP%d: " fmt, _dsp->num, ##__VA_ARGS__) | |
42 | #define adsp_err(_dsp, fmt, ...) \ | |
43 | dev_err(_dsp->dev, "DSP%d: " fmt, _dsp->num, ##__VA_ARGS__) | |
44 | #define adsp_warn(_dsp, fmt, ...) \ | |
45 | dev_warn(_dsp->dev, "DSP%d: " fmt, _dsp->num, ##__VA_ARGS__) | |
46 | #define adsp_info(_dsp, fmt, ...) \ | |
47 | dev_info(_dsp->dev, "DSP%d: " fmt, _dsp->num, ##__VA_ARGS__) | |
48 | #define adsp_dbg(_dsp, fmt, ...) \ | |
49 | dev_dbg(_dsp->dev, "DSP%d: " fmt, _dsp->num, ##__VA_ARGS__) | |
50 | ||
51 | #define ADSP1_CONTROL_1 0x00 | |
52 | #define ADSP1_CONTROL_2 0x02 | |
53 | #define ADSP1_CONTROL_3 0x03 | |
54 | #define ADSP1_CONTROL_4 0x04 | |
55 | #define ADSP1_CONTROL_5 0x06 | |
56 | #define ADSP1_CONTROL_6 0x07 | |
57 | #define ADSP1_CONTROL_7 0x08 | |
58 | #define ADSP1_CONTROL_8 0x09 | |
59 | #define ADSP1_CONTROL_9 0x0A | |
60 | #define ADSP1_CONTROL_10 0x0B | |
61 | #define ADSP1_CONTROL_11 0x0C | |
62 | #define ADSP1_CONTROL_12 0x0D | |
63 | #define ADSP1_CONTROL_13 0x0F | |
64 | #define ADSP1_CONTROL_14 0x10 | |
65 | #define ADSP1_CONTROL_15 0x11 | |
66 | #define ADSP1_CONTROL_16 0x12 | |
67 | #define ADSP1_CONTROL_17 0x13 | |
68 | #define ADSP1_CONTROL_18 0x14 | |
69 | #define ADSP1_CONTROL_19 0x16 | |
70 | #define ADSP1_CONTROL_20 0x17 | |
71 | #define ADSP1_CONTROL_21 0x18 | |
72 | #define ADSP1_CONTROL_22 0x1A | |
73 | #define ADSP1_CONTROL_23 0x1B | |
74 | #define ADSP1_CONTROL_24 0x1C | |
75 | #define ADSP1_CONTROL_25 0x1E | |
76 | #define ADSP1_CONTROL_26 0x20 | |
77 | #define ADSP1_CONTROL_27 0x21 | |
78 | #define ADSP1_CONTROL_28 0x22 | |
79 | #define ADSP1_CONTROL_29 0x23 | |
80 | #define ADSP1_CONTROL_30 0x24 | |
81 | #define ADSP1_CONTROL_31 0x26 | |
82 | ||
83 | /* | |
84 | * ADSP1 Control 19 | |
85 | */ | |
86 | #define ADSP1_WDMA_BUFFER_LENGTH_MASK 0x00FF /* DSP1_WDMA_BUFFER_LENGTH - [7:0] */ | |
87 | #define ADSP1_WDMA_BUFFER_LENGTH_SHIFT 0 /* DSP1_WDMA_BUFFER_LENGTH - [7:0] */ | |
88 | #define ADSP1_WDMA_BUFFER_LENGTH_WIDTH 8 /* DSP1_WDMA_BUFFER_LENGTH - [7:0] */ | |
89 | ||
90 | ||
91 | /* | |
92 | * ADSP1 Control 30 | |
93 | */ | |
94 | #define ADSP1_DBG_CLK_ENA 0x0008 /* DSP1_DBG_CLK_ENA */ | |
95 | #define ADSP1_DBG_CLK_ENA_MASK 0x0008 /* DSP1_DBG_CLK_ENA */ | |
96 | #define ADSP1_DBG_CLK_ENA_SHIFT 3 /* DSP1_DBG_CLK_ENA */ | |
97 | #define ADSP1_DBG_CLK_ENA_WIDTH 1 /* DSP1_DBG_CLK_ENA */ | |
98 | #define ADSP1_SYS_ENA 0x0004 /* DSP1_SYS_ENA */ | |
99 | #define ADSP1_SYS_ENA_MASK 0x0004 /* DSP1_SYS_ENA */ | |
100 | #define ADSP1_SYS_ENA_SHIFT 2 /* DSP1_SYS_ENA */ | |
101 | #define ADSP1_SYS_ENA_WIDTH 1 /* DSP1_SYS_ENA */ | |
102 | #define ADSP1_CORE_ENA 0x0002 /* DSP1_CORE_ENA */ | |
103 | #define ADSP1_CORE_ENA_MASK 0x0002 /* DSP1_CORE_ENA */ | |
104 | #define ADSP1_CORE_ENA_SHIFT 1 /* DSP1_CORE_ENA */ | |
105 | #define ADSP1_CORE_ENA_WIDTH 1 /* DSP1_CORE_ENA */ | |
106 | #define ADSP1_START 0x0001 /* DSP1_START */ | |
107 | #define ADSP1_START_MASK 0x0001 /* DSP1_START */ | |
108 | #define ADSP1_START_SHIFT 0 /* DSP1_START */ | |
109 | #define ADSP1_START_WIDTH 1 /* DSP1_START */ | |
110 | ||
94e205bf CR |
111 | /* |
112 | * ADSP1 Control 31 | |
113 | */ | |
114 | #define ADSP1_CLK_SEL_MASK 0x0007 /* CLK_SEL_ENA */ | |
115 | #define ADSP1_CLK_SEL_SHIFT 0 /* CLK_SEL_ENA */ | |
116 | #define ADSP1_CLK_SEL_WIDTH 3 /* CLK_SEL_ENA */ | |
117 | ||
2d30b575 MB |
118 | #define ADSP2_CONTROL 0x0 |
119 | #define ADSP2_CLOCKING 0x1 | |
120 | #define ADSP2_STATUS1 0x4 | |
121 | #define ADSP2_WDMA_CONFIG_1 0x30 | |
122 | #define ADSP2_WDMA_CONFIG_2 0x31 | |
123 | #define ADSP2_RDMA_CONFIG_1 0x34 | |
2159ad93 | 124 | |
10337b07 RF |
125 | #define ADSP2_SCRATCH0 0x40 |
126 | #define ADSP2_SCRATCH1 0x41 | |
127 | #define ADSP2_SCRATCH2 0x42 | |
128 | #define ADSP2_SCRATCH3 0x43 | |
129 | ||
2159ad93 MB |
130 | /* |
131 | * ADSP2 Control | |
132 | */ | |
133 | ||
134 | #define ADSP2_MEM_ENA 0x0010 /* DSP1_MEM_ENA */ | |
135 | #define ADSP2_MEM_ENA_MASK 0x0010 /* DSP1_MEM_ENA */ | |
136 | #define ADSP2_MEM_ENA_SHIFT 4 /* DSP1_MEM_ENA */ | |
137 | #define ADSP2_MEM_ENA_WIDTH 1 /* DSP1_MEM_ENA */ | |
138 | #define ADSP2_SYS_ENA 0x0004 /* DSP1_SYS_ENA */ | |
139 | #define ADSP2_SYS_ENA_MASK 0x0004 /* DSP1_SYS_ENA */ | |
140 | #define ADSP2_SYS_ENA_SHIFT 2 /* DSP1_SYS_ENA */ | |
141 | #define ADSP2_SYS_ENA_WIDTH 1 /* DSP1_SYS_ENA */ | |
142 | #define ADSP2_CORE_ENA 0x0002 /* DSP1_CORE_ENA */ | |
143 | #define ADSP2_CORE_ENA_MASK 0x0002 /* DSP1_CORE_ENA */ | |
144 | #define ADSP2_CORE_ENA_SHIFT 1 /* DSP1_CORE_ENA */ | |
145 | #define ADSP2_CORE_ENA_WIDTH 1 /* DSP1_CORE_ENA */ | |
146 | #define ADSP2_START 0x0001 /* DSP1_START */ | |
147 | #define ADSP2_START_MASK 0x0001 /* DSP1_START */ | |
148 | #define ADSP2_START_SHIFT 0 /* DSP1_START */ | |
149 | #define ADSP2_START_WIDTH 1 /* DSP1_START */ | |
150 | ||
973838a0 MB |
151 | /* |
152 | * ADSP2 clocking | |
153 | */ | |
154 | #define ADSP2_CLK_SEL_MASK 0x0007 /* CLK_SEL_ENA */ | |
155 | #define ADSP2_CLK_SEL_SHIFT 0 /* CLK_SEL_ENA */ | |
156 | #define ADSP2_CLK_SEL_WIDTH 3 /* CLK_SEL_ENA */ | |
157 | ||
2159ad93 MB |
158 | /* |
159 | * ADSP2 Status 1 | |
160 | */ | |
161 | #define ADSP2_RAM_RDY 0x0001 | |
162 | #define ADSP2_RAM_RDY_MASK 0x0001 | |
163 | #define ADSP2_RAM_RDY_SHIFT 0 | |
164 | #define ADSP2_RAM_RDY_WIDTH 1 | |
165 | ||
cf17c83c MB |
166 | struct wm_adsp_buf { |
167 | struct list_head list; | |
168 | void *buf; | |
169 | }; | |
170 | ||
171 | static struct wm_adsp_buf *wm_adsp_buf_alloc(const void *src, size_t len, | |
172 | struct list_head *list) | |
173 | { | |
174 | struct wm_adsp_buf *buf = kzalloc(sizeof(*buf), GFP_KERNEL); | |
175 | ||
176 | if (buf == NULL) | |
177 | return NULL; | |
178 | ||
cdcd7f72 | 179 | buf->buf = vmalloc(len); |
cf17c83c | 180 | if (!buf->buf) { |
cdcd7f72 | 181 | vfree(buf); |
cf17c83c MB |
182 | return NULL; |
183 | } | |
cdcd7f72 | 184 | memcpy(buf->buf, src, len); |
cf17c83c MB |
185 | |
186 | if (list) | |
187 | list_add_tail(&buf->list, list); | |
188 | ||
189 | return buf; | |
190 | } | |
191 | ||
192 | static void wm_adsp_buf_free(struct list_head *list) | |
193 | { | |
194 | while (!list_empty(list)) { | |
195 | struct wm_adsp_buf *buf = list_first_entry(list, | |
196 | struct wm_adsp_buf, | |
197 | list); | |
198 | list_del(&buf->list); | |
cdcd7f72 | 199 | vfree(buf->buf); |
cf17c83c MB |
200 | kfree(buf); |
201 | } | |
202 | } | |
203 | ||
04d1300f CK |
204 | #define WM_ADSP_FW_MBC_VSS 0 |
205 | #define WM_ADSP_FW_HIFI 1 | |
206 | #define WM_ADSP_FW_TX 2 | |
207 | #define WM_ADSP_FW_TX_SPK 3 | |
208 | #define WM_ADSP_FW_RX 4 | |
209 | #define WM_ADSP_FW_RX_ANC 5 | |
210 | #define WM_ADSP_FW_CTRL 6 | |
211 | #define WM_ADSP_FW_ASR 7 | |
212 | #define WM_ADSP_FW_TRACE 8 | |
213 | #define WM_ADSP_FW_SPK_PROT 9 | |
214 | #define WM_ADSP_FW_MISC 10 | |
215 | ||
216 | #define WM_ADSP_NUM_FW 11 | |
dd84f925 | 217 | |
1023dbd9 | 218 | static const char *wm_adsp_fw_text[WM_ADSP_NUM_FW] = { |
04d1300f CK |
219 | [WM_ADSP_FW_MBC_VSS] = "MBC/VSS", |
220 | [WM_ADSP_FW_HIFI] = "MasterHiFi", | |
221 | [WM_ADSP_FW_TX] = "Tx", | |
222 | [WM_ADSP_FW_TX_SPK] = "Tx Speaker", | |
223 | [WM_ADSP_FW_RX] = "Rx", | |
224 | [WM_ADSP_FW_RX_ANC] = "Rx ANC", | |
225 | [WM_ADSP_FW_CTRL] = "Voice Ctrl", | |
226 | [WM_ADSP_FW_ASR] = "ASR Assist", | |
227 | [WM_ADSP_FW_TRACE] = "Dbg Trace", | |
228 | [WM_ADSP_FW_SPK_PROT] = "Protection", | |
229 | [WM_ADSP_FW_MISC] = "Misc", | |
1023dbd9 MB |
230 | }; |
231 | ||
2cd19bdb CK |
232 | struct wm_adsp_system_config_xm_hdr { |
233 | __be32 sys_enable; | |
234 | __be32 fw_id; | |
235 | __be32 fw_rev; | |
236 | __be32 boot_status; | |
237 | __be32 watchdog; | |
238 | __be32 dma_buffer_size; | |
239 | __be32 rdma[6]; | |
240 | __be32 wdma[8]; | |
241 | __be32 build_job_name[3]; | |
242 | __be32 build_job_number; | |
243 | }; | |
244 | ||
245 | struct wm_adsp_alg_xm_struct { | |
246 | __be32 magic; | |
247 | __be32 smoothing; | |
248 | __be32 threshold; | |
249 | __be32 host_buf_ptr; | |
250 | __be32 start_seq; | |
251 | __be32 high_water_mark; | |
252 | __be32 low_water_mark; | |
253 | __be64 smoothed_power; | |
254 | }; | |
255 | ||
256 | struct wm_adsp_buffer { | |
257 | __be32 X_buf_base; /* XM base addr of first X area */ | |
258 | __be32 X_buf_size; /* Size of 1st X area in words */ | |
259 | __be32 X_buf_base2; /* XM base addr of 2nd X area */ | |
260 | __be32 X_buf_brk; /* Total X size in words */ | |
261 | __be32 Y_buf_base; /* YM base addr of Y area */ | |
262 | __be32 wrap; /* Total size X and Y in words */ | |
263 | __be32 high_water_mark; /* Point at which IRQ is asserted */ | |
264 | __be32 irq_count; /* bits 1-31 count IRQ assertions */ | |
265 | __be32 irq_ack; /* acked IRQ count, bit 0 enables IRQ */ | |
266 | __be32 next_write_index; /* word index of next write */ | |
267 | __be32 next_read_index; /* word index of next read */ | |
268 | __be32 error; /* error if any */ | |
269 | __be32 oldest_block_index; /* word index of oldest surviving */ | |
270 | __be32 requested_rewind; /* how many blocks rewind was done */ | |
271 | __be32 reserved_space; /* internal */ | |
272 | __be32 min_free; /* min free space since stream start */ | |
273 | __be32 blocks_written[2]; /* total blocks written (64 bit) */ | |
274 | __be32 words_written[2]; /* total words written (64 bit) */ | |
275 | }; | |
276 | ||
277 | struct wm_adsp_compr_buf { | |
278 | struct wm_adsp *dsp; | |
279 | ||
280 | struct wm_adsp_buffer_region *regions; | |
281 | u32 host_buf_ptr; | |
565ace46 CK |
282 | |
283 | u32 error; | |
284 | u32 irq_count; | |
285 | int read_index; | |
286 | int avail; | |
2cd19bdb CK |
287 | }; |
288 | ||
406abc95 CK |
289 | struct wm_adsp_compr { |
290 | struct wm_adsp *dsp; | |
95fe9597 | 291 | struct wm_adsp_compr_buf *buf; |
406abc95 CK |
292 | |
293 | struct snd_compr_stream *stream; | |
294 | struct snd_compressed_buffer size; | |
565ace46 | 295 | |
83a40ce9 | 296 | u32 *raw_buf; |
565ace46 | 297 | unsigned int copied_total; |
da2b3358 CK |
298 | |
299 | unsigned int sample_rate; | |
406abc95 CK |
300 | }; |
301 | ||
302 | #define WM_ADSP_DATA_WORD_SIZE 3 | |
303 | ||
304 | #define WM_ADSP_MIN_FRAGMENTS 1 | |
305 | #define WM_ADSP_MAX_FRAGMENTS 256 | |
306 | #define WM_ADSP_MIN_FRAGMENT_SIZE (64 * WM_ADSP_DATA_WORD_SIZE) | |
307 | #define WM_ADSP_MAX_FRAGMENT_SIZE (4096 * WM_ADSP_DATA_WORD_SIZE) | |
308 | ||
2cd19bdb CK |
309 | #define WM_ADSP_ALG_XM_STRUCT_MAGIC 0x49aec7 |
310 | ||
311 | #define HOST_BUFFER_FIELD(field) \ | |
312 | (offsetof(struct wm_adsp_buffer, field) / sizeof(__be32)) | |
313 | ||
314 | #define ALG_XM_FIELD(field) \ | |
315 | (offsetof(struct wm_adsp_alg_xm_struct, field) / sizeof(__be32)) | |
316 | ||
317 | static int wm_adsp_buffer_init(struct wm_adsp *dsp); | |
318 | static int wm_adsp_buffer_free(struct wm_adsp *dsp); | |
319 | ||
320 | struct wm_adsp_buffer_region { | |
321 | unsigned int offset; | |
322 | unsigned int cumulative_size; | |
323 | unsigned int mem_type; | |
324 | unsigned int base_addr; | |
325 | }; | |
326 | ||
327 | struct wm_adsp_buffer_region_def { | |
328 | unsigned int mem_type; | |
329 | unsigned int base_offset; | |
330 | unsigned int size_offset; | |
331 | }; | |
332 | ||
333 | static struct wm_adsp_buffer_region_def ez2control_regions[] = { | |
334 | { | |
335 | .mem_type = WMFW_ADSP2_XM, | |
336 | .base_offset = HOST_BUFFER_FIELD(X_buf_base), | |
337 | .size_offset = HOST_BUFFER_FIELD(X_buf_size), | |
338 | }, | |
339 | { | |
340 | .mem_type = WMFW_ADSP2_XM, | |
341 | .base_offset = HOST_BUFFER_FIELD(X_buf_base2), | |
342 | .size_offset = HOST_BUFFER_FIELD(X_buf_brk), | |
343 | }, | |
344 | { | |
345 | .mem_type = WMFW_ADSP2_YM, | |
346 | .base_offset = HOST_BUFFER_FIELD(Y_buf_base), | |
347 | .size_offset = HOST_BUFFER_FIELD(wrap), | |
348 | }, | |
349 | }; | |
350 | ||
406abc95 CK |
351 | struct wm_adsp_fw_caps { |
352 | u32 id; | |
353 | struct snd_codec_desc desc; | |
2cd19bdb CK |
354 | int num_regions; |
355 | struct wm_adsp_buffer_region_def *region_defs; | |
406abc95 CK |
356 | }; |
357 | ||
358 | static const struct wm_adsp_fw_caps ez2control_caps[] = { | |
359 | { | |
360 | .id = SND_AUDIOCODEC_BESPOKE, | |
361 | .desc = { | |
362 | .max_ch = 1, | |
363 | .sample_rates = { 16000 }, | |
364 | .num_sample_rates = 1, | |
365 | .formats = SNDRV_PCM_FMTBIT_S16_LE, | |
366 | }, | |
2cd19bdb CK |
367 | .num_regions = ARRAY_SIZE(ez2control_regions), |
368 | .region_defs = ez2control_regions, | |
406abc95 CK |
369 | }, |
370 | }; | |
371 | ||
372 | static const struct { | |
1023dbd9 | 373 | const char *file; |
406abc95 CK |
374 | int compr_direction; |
375 | int num_caps; | |
376 | const struct wm_adsp_fw_caps *caps; | |
1023dbd9 | 377 | } wm_adsp_fw[WM_ADSP_NUM_FW] = { |
04d1300f CK |
378 | [WM_ADSP_FW_MBC_VSS] = { .file = "mbc-vss" }, |
379 | [WM_ADSP_FW_HIFI] = { .file = "hifi" }, | |
380 | [WM_ADSP_FW_TX] = { .file = "tx" }, | |
381 | [WM_ADSP_FW_TX_SPK] = { .file = "tx-spk" }, | |
382 | [WM_ADSP_FW_RX] = { .file = "rx" }, | |
383 | [WM_ADSP_FW_RX_ANC] = { .file = "rx-anc" }, | |
406abc95 CK |
384 | [WM_ADSP_FW_CTRL] = { |
385 | .file = "ctrl", | |
386 | .compr_direction = SND_COMPRESS_CAPTURE, | |
387 | .num_caps = ARRAY_SIZE(ez2control_caps), | |
388 | .caps = ez2control_caps, | |
389 | }, | |
04d1300f CK |
390 | [WM_ADSP_FW_ASR] = { .file = "asr" }, |
391 | [WM_ADSP_FW_TRACE] = { .file = "trace" }, | |
392 | [WM_ADSP_FW_SPK_PROT] = { .file = "spk-prot" }, | |
393 | [WM_ADSP_FW_MISC] = { .file = "misc" }, | |
1023dbd9 MB |
394 | }; |
395 | ||
6ab2b7b4 DP |
396 | struct wm_coeff_ctl_ops { |
397 | int (*xget)(struct snd_kcontrol *kcontrol, | |
398 | struct snd_ctl_elem_value *ucontrol); | |
399 | int (*xput)(struct snd_kcontrol *kcontrol, | |
400 | struct snd_ctl_elem_value *ucontrol); | |
401 | int (*xinfo)(struct snd_kcontrol *kcontrol, | |
402 | struct snd_ctl_elem_info *uinfo); | |
403 | }; | |
404 | ||
6ab2b7b4 DP |
405 | struct wm_coeff_ctl { |
406 | const char *name; | |
2323736d | 407 | const char *fw_name; |
3809f001 | 408 | struct wm_adsp_alg_region alg_region; |
6ab2b7b4 | 409 | struct wm_coeff_ctl_ops ops; |
3809f001 | 410 | struct wm_adsp *dsp; |
6ab2b7b4 DP |
411 | unsigned int enabled:1; |
412 | struct list_head list; | |
413 | void *cache; | |
2323736d | 414 | unsigned int offset; |
6ab2b7b4 | 415 | size_t len; |
0c2e3f34 | 416 | unsigned int set:1; |
6ab2b7b4 | 417 | struct snd_kcontrol *kcontrol; |
26c22a19 | 418 | unsigned int flags; |
6ab2b7b4 DP |
419 | }; |
420 | ||
f9f55e31 RF |
421 | #ifdef CONFIG_DEBUG_FS |
422 | static void wm_adsp_debugfs_save_wmfwname(struct wm_adsp *dsp, const char *s) | |
423 | { | |
424 | char *tmp = kasprintf(GFP_KERNEL, "%s\n", s); | |
425 | ||
f9f55e31 RF |
426 | kfree(dsp->wmfw_file_name); |
427 | dsp->wmfw_file_name = tmp; | |
f9f55e31 RF |
428 | } |
429 | ||
430 | static void wm_adsp_debugfs_save_binname(struct wm_adsp *dsp, const char *s) | |
431 | { | |
432 | char *tmp = kasprintf(GFP_KERNEL, "%s\n", s); | |
433 | ||
f9f55e31 RF |
434 | kfree(dsp->bin_file_name); |
435 | dsp->bin_file_name = tmp; | |
f9f55e31 RF |
436 | } |
437 | ||
438 | static void wm_adsp_debugfs_clear(struct wm_adsp *dsp) | |
439 | { | |
f9f55e31 RF |
440 | kfree(dsp->wmfw_file_name); |
441 | kfree(dsp->bin_file_name); | |
442 | dsp->wmfw_file_name = NULL; | |
443 | dsp->bin_file_name = NULL; | |
f9f55e31 RF |
444 | } |
445 | ||
446 | static ssize_t wm_adsp_debugfs_wmfw_read(struct file *file, | |
447 | char __user *user_buf, | |
448 | size_t count, loff_t *ppos) | |
449 | { | |
450 | struct wm_adsp *dsp = file->private_data; | |
451 | ssize_t ret; | |
452 | ||
078e7183 | 453 | mutex_lock(&dsp->pwr_lock); |
f9f55e31 RF |
454 | |
455 | if (!dsp->wmfw_file_name || !dsp->running) | |
456 | ret = 0; | |
457 | else | |
458 | ret = simple_read_from_buffer(user_buf, count, ppos, | |
459 | dsp->wmfw_file_name, | |
460 | strlen(dsp->wmfw_file_name)); | |
461 | ||
078e7183 | 462 | mutex_unlock(&dsp->pwr_lock); |
f9f55e31 RF |
463 | return ret; |
464 | } | |
465 | ||
466 | static ssize_t wm_adsp_debugfs_bin_read(struct file *file, | |
467 | char __user *user_buf, | |
468 | size_t count, loff_t *ppos) | |
469 | { | |
470 | struct wm_adsp *dsp = file->private_data; | |
471 | ssize_t ret; | |
472 | ||
078e7183 | 473 | mutex_lock(&dsp->pwr_lock); |
f9f55e31 RF |
474 | |
475 | if (!dsp->bin_file_name || !dsp->running) | |
476 | ret = 0; | |
477 | else | |
478 | ret = simple_read_from_buffer(user_buf, count, ppos, | |
479 | dsp->bin_file_name, | |
480 | strlen(dsp->bin_file_name)); | |
481 | ||
078e7183 | 482 | mutex_unlock(&dsp->pwr_lock); |
f9f55e31 RF |
483 | return ret; |
484 | } | |
485 | ||
486 | static const struct { | |
487 | const char *name; | |
488 | const struct file_operations fops; | |
489 | } wm_adsp_debugfs_fops[] = { | |
490 | { | |
491 | .name = "wmfw_file_name", | |
492 | .fops = { | |
493 | .open = simple_open, | |
494 | .read = wm_adsp_debugfs_wmfw_read, | |
495 | }, | |
496 | }, | |
497 | { | |
498 | .name = "bin_file_name", | |
499 | .fops = { | |
500 | .open = simple_open, | |
501 | .read = wm_adsp_debugfs_bin_read, | |
502 | }, | |
503 | }, | |
504 | }; | |
505 | ||
506 | static void wm_adsp2_init_debugfs(struct wm_adsp *dsp, | |
507 | struct snd_soc_codec *codec) | |
508 | { | |
509 | struct dentry *root = NULL; | |
510 | char *root_name; | |
511 | int i; | |
512 | ||
513 | if (!codec->component.debugfs_root) { | |
514 | adsp_err(dsp, "No codec debugfs root\n"); | |
515 | goto err; | |
516 | } | |
517 | ||
518 | root_name = kmalloc(PAGE_SIZE, GFP_KERNEL); | |
519 | if (!root_name) | |
520 | goto err; | |
521 | ||
522 | snprintf(root_name, PAGE_SIZE, "dsp%d", dsp->num); | |
523 | root = debugfs_create_dir(root_name, codec->component.debugfs_root); | |
524 | kfree(root_name); | |
525 | ||
526 | if (!root) | |
527 | goto err; | |
528 | ||
529 | if (!debugfs_create_bool("running", S_IRUGO, root, &dsp->running)) | |
530 | goto err; | |
531 | ||
532 | if (!debugfs_create_x32("fw_id", S_IRUGO, root, &dsp->fw_id)) | |
533 | goto err; | |
534 | ||
535 | if (!debugfs_create_x32("fw_version", S_IRUGO, root, | |
536 | &dsp->fw_id_version)) | |
537 | goto err; | |
538 | ||
539 | for (i = 0; i < ARRAY_SIZE(wm_adsp_debugfs_fops); ++i) { | |
540 | if (!debugfs_create_file(wm_adsp_debugfs_fops[i].name, | |
541 | S_IRUGO, root, dsp, | |
542 | &wm_adsp_debugfs_fops[i].fops)) | |
543 | goto err; | |
544 | } | |
545 | ||
546 | dsp->debugfs_root = root; | |
547 | return; | |
548 | ||
549 | err: | |
550 | debugfs_remove_recursive(root); | |
551 | adsp_err(dsp, "Failed to create debugfs\n"); | |
552 | } | |
553 | ||
554 | static void wm_adsp2_cleanup_debugfs(struct wm_adsp *dsp) | |
555 | { | |
556 | wm_adsp_debugfs_clear(dsp); | |
557 | debugfs_remove_recursive(dsp->debugfs_root); | |
558 | } | |
559 | #else | |
560 | static inline void wm_adsp2_init_debugfs(struct wm_adsp *dsp, | |
561 | struct snd_soc_codec *codec) | |
562 | { | |
563 | } | |
564 | ||
565 | static inline void wm_adsp2_cleanup_debugfs(struct wm_adsp *dsp) | |
566 | { | |
567 | } | |
568 | ||
569 | static inline void wm_adsp_debugfs_save_wmfwname(struct wm_adsp *dsp, | |
570 | const char *s) | |
571 | { | |
572 | } | |
573 | ||
574 | static inline void wm_adsp_debugfs_save_binname(struct wm_adsp *dsp, | |
575 | const char *s) | |
576 | { | |
577 | } | |
578 | ||
579 | static inline void wm_adsp_debugfs_clear(struct wm_adsp *dsp) | |
580 | { | |
581 | } | |
582 | #endif | |
583 | ||
1023dbd9 MB |
584 | static int wm_adsp_fw_get(struct snd_kcontrol *kcontrol, |
585 | struct snd_ctl_elem_value *ucontrol) | |
586 | { | |
ea53bf77 | 587 | struct snd_soc_codec *codec = snd_soc_kcontrol_codec(kcontrol); |
1023dbd9 | 588 | struct soc_enum *e = (struct soc_enum *)kcontrol->private_value; |
3809f001 | 589 | struct wm_adsp *dsp = snd_soc_codec_get_drvdata(codec); |
1023dbd9 | 590 | |
3809f001 | 591 | ucontrol->value.integer.value[0] = dsp[e->shift_l].fw; |
1023dbd9 MB |
592 | |
593 | return 0; | |
594 | } | |
595 | ||
596 | static int wm_adsp_fw_put(struct snd_kcontrol *kcontrol, | |
597 | struct snd_ctl_elem_value *ucontrol) | |
598 | { | |
ea53bf77 | 599 | struct snd_soc_codec *codec = snd_soc_kcontrol_codec(kcontrol); |
1023dbd9 | 600 | struct soc_enum *e = (struct soc_enum *)kcontrol->private_value; |
3809f001 | 601 | struct wm_adsp *dsp = snd_soc_codec_get_drvdata(codec); |
d27c5e15 | 602 | int ret = 0; |
1023dbd9 | 603 | |
3809f001 | 604 | if (ucontrol->value.integer.value[0] == dsp[e->shift_l].fw) |
1023dbd9 MB |
605 | return 0; |
606 | ||
607 | if (ucontrol->value.integer.value[0] >= WM_ADSP_NUM_FW) | |
608 | return -EINVAL; | |
609 | ||
d27c5e15 CK |
610 | mutex_lock(&dsp[e->shift_l].pwr_lock); |
611 | ||
406abc95 | 612 | if (dsp[e->shift_l].running || dsp[e->shift_l].compr) |
d27c5e15 CK |
613 | ret = -EBUSY; |
614 | else | |
615 | dsp[e->shift_l].fw = ucontrol->value.integer.value[0]; | |
1023dbd9 | 616 | |
d27c5e15 | 617 | mutex_unlock(&dsp[e->shift_l].pwr_lock); |
1023dbd9 | 618 | |
d27c5e15 | 619 | return ret; |
1023dbd9 MB |
620 | } |
621 | ||
622 | static const struct soc_enum wm_adsp_fw_enum[] = { | |
623 | SOC_ENUM_SINGLE(0, 0, ARRAY_SIZE(wm_adsp_fw_text), wm_adsp_fw_text), | |
624 | SOC_ENUM_SINGLE(0, 1, ARRAY_SIZE(wm_adsp_fw_text), wm_adsp_fw_text), | |
625 | SOC_ENUM_SINGLE(0, 2, ARRAY_SIZE(wm_adsp_fw_text), wm_adsp_fw_text), | |
626 | SOC_ENUM_SINGLE(0, 3, ARRAY_SIZE(wm_adsp_fw_text), wm_adsp_fw_text), | |
627 | }; | |
628 | ||
336d0442 | 629 | const struct snd_kcontrol_new wm_adsp_fw_controls[] = { |
1023dbd9 MB |
630 | SOC_ENUM_EXT("DSP1 Firmware", wm_adsp_fw_enum[0], |
631 | wm_adsp_fw_get, wm_adsp_fw_put), | |
632 | SOC_ENUM_EXT("DSP2 Firmware", wm_adsp_fw_enum[1], | |
633 | wm_adsp_fw_get, wm_adsp_fw_put), | |
634 | SOC_ENUM_EXT("DSP3 Firmware", wm_adsp_fw_enum[2], | |
635 | wm_adsp_fw_get, wm_adsp_fw_put), | |
336d0442 RF |
636 | SOC_ENUM_EXT("DSP4 Firmware", wm_adsp_fw_enum[3], |
637 | wm_adsp_fw_get, wm_adsp_fw_put), | |
b6ed61cf | 638 | }; |
336d0442 | 639 | EXPORT_SYMBOL_GPL(wm_adsp_fw_controls); |
2159ad93 MB |
640 | |
641 | static struct wm_adsp_region const *wm_adsp_find_region(struct wm_adsp *dsp, | |
642 | int type) | |
643 | { | |
644 | int i; | |
645 | ||
646 | for (i = 0; i < dsp->num_mems; i++) | |
647 | if (dsp->mem[i].type == type) | |
648 | return &dsp->mem[i]; | |
649 | ||
650 | return NULL; | |
651 | } | |
652 | ||
3809f001 | 653 | static unsigned int wm_adsp_region_to_reg(struct wm_adsp_region const *mem, |
45b9ee72 MB |
654 | unsigned int offset) |
655 | { | |
3809f001 | 656 | if (WARN_ON(!mem)) |
6c452bda | 657 | return offset; |
3809f001 | 658 | switch (mem->type) { |
45b9ee72 | 659 | case WMFW_ADSP1_PM: |
3809f001 | 660 | return mem->base + (offset * 3); |
45b9ee72 | 661 | case WMFW_ADSP1_DM: |
3809f001 | 662 | return mem->base + (offset * 2); |
45b9ee72 | 663 | case WMFW_ADSP2_XM: |
3809f001 | 664 | return mem->base + (offset * 2); |
45b9ee72 | 665 | case WMFW_ADSP2_YM: |
3809f001 | 666 | return mem->base + (offset * 2); |
45b9ee72 | 667 | case WMFW_ADSP1_ZM: |
3809f001 | 668 | return mem->base + (offset * 2); |
45b9ee72 | 669 | default: |
6c452bda | 670 | WARN(1, "Unknown memory region type"); |
45b9ee72 MB |
671 | return offset; |
672 | } | |
673 | } | |
674 | ||
10337b07 RF |
675 | static void wm_adsp2_show_fw_status(struct wm_adsp *dsp) |
676 | { | |
677 | u16 scratch[4]; | |
678 | int ret; | |
679 | ||
680 | ret = regmap_raw_read(dsp->regmap, dsp->base + ADSP2_SCRATCH0, | |
681 | scratch, sizeof(scratch)); | |
682 | if (ret) { | |
683 | adsp_err(dsp, "Failed to read SCRATCH regs: %d\n", ret); | |
684 | return; | |
685 | } | |
686 | ||
687 | adsp_dbg(dsp, "FW SCRATCH 0:0x%x 1:0x%x 2:0x%x 3:0x%x\n", | |
688 | be16_to_cpu(scratch[0]), | |
689 | be16_to_cpu(scratch[1]), | |
690 | be16_to_cpu(scratch[2]), | |
691 | be16_to_cpu(scratch[3])); | |
692 | } | |
693 | ||
7585a5b0 | 694 | static int wm_coeff_info(struct snd_kcontrol *kctl, |
6ab2b7b4 DP |
695 | struct snd_ctl_elem_info *uinfo) |
696 | { | |
7585a5b0 | 697 | struct wm_coeff_ctl *ctl = (struct wm_coeff_ctl *)kctl->private_value; |
6ab2b7b4 DP |
698 | |
699 | uinfo->type = SNDRV_CTL_ELEM_TYPE_BYTES; | |
700 | uinfo->count = ctl->len; | |
701 | return 0; | |
702 | } | |
703 | ||
c9f8dd71 | 704 | static int wm_coeff_write_control(struct wm_coeff_ctl *ctl, |
6ab2b7b4 DP |
705 | const void *buf, size_t len) |
706 | { | |
3809f001 | 707 | struct wm_adsp_alg_region *alg_region = &ctl->alg_region; |
6ab2b7b4 | 708 | const struct wm_adsp_region *mem; |
3809f001 | 709 | struct wm_adsp *dsp = ctl->dsp; |
6ab2b7b4 DP |
710 | void *scratch; |
711 | int ret; | |
712 | unsigned int reg; | |
713 | ||
3809f001 | 714 | mem = wm_adsp_find_region(dsp, alg_region->type); |
6ab2b7b4 | 715 | if (!mem) { |
3809f001 CK |
716 | adsp_err(dsp, "No base for region %x\n", |
717 | alg_region->type); | |
6ab2b7b4 DP |
718 | return -EINVAL; |
719 | } | |
720 | ||
2323736d | 721 | reg = ctl->alg_region.base + ctl->offset; |
6ab2b7b4 DP |
722 | reg = wm_adsp_region_to_reg(mem, reg); |
723 | ||
724 | scratch = kmemdup(buf, ctl->len, GFP_KERNEL | GFP_DMA); | |
725 | if (!scratch) | |
726 | return -ENOMEM; | |
727 | ||
3809f001 | 728 | ret = regmap_raw_write(dsp->regmap, reg, scratch, |
6ab2b7b4 DP |
729 | ctl->len); |
730 | if (ret) { | |
3809f001 | 731 | adsp_err(dsp, "Failed to write %zu bytes to %x: %d\n", |
43bc3bf6 | 732 | ctl->len, reg, ret); |
6ab2b7b4 DP |
733 | kfree(scratch); |
734 | return ret; | |
735 | } | |
3809f001 | 736 | adsp_dbg(dsp, "Wrote %zu bytes to %x\n", ctl->len, reg); |
6ab2b7b4 DP |
737 | |
738 | kfree(scratch); | |
739 | ||
740 | return 0; | |
741 | } | |
742 | ||
7585a5b0 | 743 | static int wm_coeff_put(struct snd_kcontrol *kctl, |
6ab2b7b4 DP |
744 | struct snd_ctl_elem_value *ucontrol) |
745 | { | |
7585a5b0 | 746 | struct wm_coeff_ctl *ctl = (struct wm_coeff_ctl *)kctl->private_value; |
6ab2b7b4 | 747 | char *p = ucontrol->value.bytes.data; |
168d10e7 CK |
748 | int ret = 0; |
749 | ||
750 | mutex_lock(&ctl->dsp->pwr_lock); | |
6ab2b7b4 DP |
751 | |
752 | memcpy(ctl->cache, p, ctl->len); | |
753 | ||
65d17a9c | 754 | ctl->set = 1; |
168d10e7 CK |
755 | if (ctl->enabled) |
756 | ret = wm_coeff_write_control(ctl, p, ctl->len); | |
6ab2b7b4 | 757 | |
168d10e7 CK |
758 | mutex_unlock(&ctl->dsp->pwr_lock); |
759 | ||
760 | return ret; | |
6ab2b7b4 DP |
761 | } |
762 | ||
c9f8dd71 | 763 | static int wm_coeff_read_control(struct wm_coeff_ctl *ctl, |
6ab2b7b4 DP |
764 | void *buf, size_t len) |
765 | { | |
3809f001 | 766 | struct wm_adsp_alg_region *alg_region = &ctl->alg_region; |
6ab2b7b4 | 767 | const struct wm_adsp_region *mem; |
3809f001 | 768 | struct wm_adsp *dsp = ctl->dsp; |
6ab2b7b4 DP |
769 | void *scratch; |
770 | int ret; | |
771 | unsigned int reg; | |
772 | ||
3809f001 | 773 | mem = wm_adsp_find_region(dsp, alg_region->type); |
6ab2b7b4 | 774 | if (!mem) { |
3809f001 CK |
775 | adsp_err(dsp, "No base for region %x\n", |
776 | alg_region->type); | |
6ab2b7b4 DP |
777 | return -EINVAL; |
778 | } | |
779 | ||
2323736d | 780 | reg = ctl->alg_region.base + ctl->offset; |
6ab2b7b4 DP |
781 | reg = wm_adsp_region_to_reg(mem, reg); |
782 | ||
783 | scratch = kmalloc(ctl->len, GFP_KERNEL | GFP_DMA); | |
784 | if (!scratch) | |
785 | return -ENOMEM; | |
786 | ||
3809f001 | 787 | ret = regmap_raw_read(dsp->regmap, reg, scratch, ctl->len); |
6ab2b7b4 | 788 | if (ret) { |
3809f001 | 789 | adsp_err(dsp, "Failed to read %zu bytes from %x: %d\n", |
43bc3bf6 | 790 | ctl->len, reg, ret); |
6ab2b7b4 DP |
791 | kfree(scratch); |
792 | return ret; | |
793 | } | |
3809f001 | 794 | adsp_dbg(dsp, "Read %zu bytes from %x\n", ctl->len, reg); |
6ab2b7b4 DP |
795 | |
796 | memcpy(buf, scratch, ctl->len); | |
797 | kfree(scratch); | |
798 | ||
799 | return 0; | |
800 | } | |
801 | ||
7585a5b0 | 802 | static int wm_coeff_get(struct snd_kcontrol *kctl, |
6ab2b7b4 DP |
803 | struct snd_ctl_elem_value *ucontrol) |
804 | { | |
7585a5b0 | 805 | struct wm_coeff_ctl *ctl = (struct wm_coeff_ctl *)kctl->private_value; |
6ab2b7b4 | 806 | char *p = ucontrol->value.bytes.data; |
168d10e7 CK |
807 | int ret = 0; |
808 | ||
809 | mutex_lock(&ctl->dsp->pwr_lock); | |
6ab2b7b4 | 810 | |
26c22a19 CK |
811 | if (ctl->flags & WMFW_CTL_FLAG_VOLATILE) { |
812 | if (ctl->enabled) | |
168d10e7 | 813 | ret = wm_coeff_read_control(ctl, p, ctl->len); |
26c22a19 | 814 | else |
168d10e7 CK |
815 | ret = -EPERM; |
816 | } else { | |
bc1765d6 CK |
817 | if (!ctl->flags && ctl->enabled) |
818 | ret = wm_coeff_read_control(ctl, ctl->cache, ctl->len); | |
819 | ||
168d10e7 | 820 | memcpy(p, ctl->cache, ctl->len); |
26c22a19 CK |
821 | } |
822 | ||
168d10e7 | 823 | mutex_unlock(&ctl->dsp->pwr_lock); |
26c22a19 | 824 | |
168d10e7 | 825 | return ret; |
6ab2b7b4 DP |
826 | } |
827 | ||
6ab2b7b4 | 828 | struct wmfw_ctl_work { |
3809f001 | 829 | struct wm_adsp *dsp; |
6ab2b7b4 DP |
830 | struct wm_coeff_ctl *ctl; |
831 | struct work_struct work; | |
832 | }; | |
833 | ||
3809f001 | 834 | static int wmfw_add_ctl(struct wm_adsp *dsp, struct wm_coeff_ctl *ctl) |
6ab2b7b4 DP |
835 | { |
836 | struct snd_kcontrol_new *kcontrol; | |
837 | int ret; | |
838 | ||
92bb4c32 | 839 | if (!ctl || !ctl->name) |
6ab2b7b4 DP |
840 | return -EINVAL; |
841 | ||
842 | kcontrol = kzalloc(sizeof(*kcontrol), GFP_KERNEL); | |
843 | if (!kcontrol) | |
844 | return -ENOMEM; | |
845 | kcontrol->iface = SNDRV_CTL_ELEM_IFACE_MIXER; | |
846 | ||
847 | kcontrol->name = ctl->name; | |
848 | kcontrol->info = wm_coeff_info; | |
849 | kcontrol->get = wm_coeff_get; | |
850 | kcontrol->put = wm_coeff_put; | |
851 | kcontrol->private_value = (unsigned long)ctl; | |
852 | ||
26c22a19 CK |
853 | if (ctl->flags) { |
854 | if (ctl->flags & WMFW_CTL_FLAG_WRITEABLE) | |
855 | kcontrol->access |= SNDRV_CTL_ELEM_ACCESS_WRITE; | |
856 | if (ctl->flags & WMFW_CTL_FLAG_READABLE) | |
857 | kcontrol->access |= SNDRV_CTL_ELEM_ACCESS_READ; | |
858 | if (ctl->flags & WMFW_CTL_FLAG_VOLATILE) | |
859 | kcontrol->access |= SNDRV_CTL_ELEM_ACCESS_VOLATILE; | |
cc815c4b CK |
860 | } else { |
861 | kcontrol->access = SNDRV_CTL_ELEM_ACCESS_READWRITE; | |
862 | kcontrol->access |= SNDRV_CTL_ELEM_ACCESS_VOLATILE; | |
26c22a19 CK |
863 | } |
864 | ||
7d00cd97 | 865 | ret = snd_soc_add_card_controls(dsp->card, kcontrol, 1); |
6ab2b7b4 DP |
866 | if (ret < 0) |
867 | goto err_kcontrol; | |
868 | ||
869 | kfree(kcontrol); | |
870 | ||
7d00cd97 | 871 | ctl->kcontrol = snd_soc_card_get_kcontrol(dsp->card, ctl->name); |
81ad93ec | 872 | |
6ab2b7b4 DP |
873 | return 0; |
874 | ||
875 | err_kcontrol: | |
876 | kfree(kcontrol); | |
877 | return ret; | |
878 | } | |
879 | ||
b21acc1c CK |
880 | static int wm_coeff_init_control_caches(struct wm_adsp *dsp) |
881 | { | |
882 | struct wm_coeff_ctl *ctl; | |
883 | int ret; | |
884 | ||
885 | list_for_each_entry(ctl, &dsp->ctl_list, list) { | |
886 | if (!ctl->enabled || ctl->set) | |
887 | continue; | |
26c22a19 CK |
888 | if (ctl->flags & WMFW_CTL_FLAG_VOLATILE) |
889 | continue; | |
890 | ||
7d00cd97 | 891 | ret = wm_coeff_read_control(ctl, ctl->cache, ctl->len); |
b21acc1c CK |
892 | if (ret < 0) |
893 | return ret; | |
894 | } | |
895 | ||
896 | return 0; | |
897 | } | |
898 | ||
899 | static int wm_coeff_sync_controls(struct wm_adsp *dsp) | |
900 | { | |
901 | struct wm_coeff_ctl *ctl; | |
902 | int ret; | |
903 | ||
904 | list_for_each_entry(ctl, &dsp->ctl_list, list) { | |
905 | if (!ctl->enabled) | |
906 | continue; | |
26c22a19 | 907 | if (ctl->set && !(ctl->flags & WMFW_CTL_FLAG_VOLATILE)) { |
7d00cd97 | 908 | ret = wm_coeff_write_control(ctl, ctl->cache, ctl->len); |
b21acc1c CK |
909 | if (ret < 0) |
910 | return ret; | |
911 | } | |
912 | } | |
913 | ||
914 | return 0; | |
915 | } | |
916 | ||
917 | static void wm_adsp_ctl_work(struct work_struct *work) | |
918 | { | |
919 | struct wmfw_ctl_work *ctl_work = container_of(work, | |
920 | struct wmfw_ctl_work, | |
921 | work); | |
922 | ||
923 | wmfw_add_ctl(ctl_work->dsp, ctl_work->ctl); | |
924 | kfree(ctl_work); | |
925 | } | |
926 | ||
927 | static int wm_adsp_create_control(struct wm_adsp *dsp, | |
928 | const struct wm_adsp_alg_region *alg_region, | |
2323736d | 929 | unsigned int offset, unsigned int len, |
26c22a19 CK |
930 | const char *subname, unsigned int subname_len, |
931 | unsigned int flags) | |
b21acc1c CK |
932 | { |
933 | struct wm_coeff_ctl *ctl; | |
934 | struct wmfw_ctl_work *ctl_work; | |
935 | char name[SNDRV_CTL_ELEM_ID_NAME_MAXLEN]; | |
936 | char *region_name; | |
937 | int ret; | |
938 | ||
26c22a19 CK |
939 | if (flags & WMFW_CTL_FLAG_SYS) |
940 | return 0; | |
941 | ||
b21acc1c CK |
942 | switch (alg_region->type) { |
943 | case WMFW_ADSP1_PM: | |
944 | region_name = "PM"; | |
945 | break; | |
946 | case WMFW_ADSP1_DM: | |
947 | region_name = "DM"; | |
948 | break; | |
949 | case WMFW_ADSP2_XM: | |
950 | region_name = "XM"; | |
951 | break; | |
952 | case WMFW_ADSP2_YM: | |
953 | region_name = "YM"; | |
954 | break; | |
955 | case WMFW_ADSP1_ZM: | |
956 | region_name = "ZM"; | |
957 | break; | |
958 | default: | |
2323736d | 959 | adsp_err(dsp, "Unknown region type: %d\n", alg_region->type); |
b21acc1c CK |
960 | return -EINVAL; |
961 | } | |
962 | ||
cb5b57a9 CK |
963 | switch (dsp->fw_ver) { |
964 | case 0: | |
965 | case 1: | |
966 | snprintf(name, SNDRV_CTL_ELEM_ID_NAME_MAXLEN, "DSP%d %s %x", | |
967 | dsp->num, region_name, alg_region->alg); | |
968 | break; | |
969 | default: | |
970 | ret = snprintf(name, SNDRV_CTL_ELEM_ID_NAME_MAXLEN, | |
971 | "DSP%d%c %.12s %x", dsp->num, *region_name, | |
972 | wm_adsp_fw_text[dsp->fw], alg_region->alg); | |
973 | ||
974 | /* Truncate the subname from the start if it is too long */ | |
975 | if (subname) { | |
976 | int avail = SNDRV_CTL_ELEM_ID_NAME_MAXLEN - ret - 2; | |
977 | int skip = 0; | |
978 | ||
979 | if (subname_len > avail) | |
980 | skip = subname_len - avail; | |
981 | ||
982 | snprintf(name + ret, | |
983 | SNDRV_CTL_ELEM_ID_NAME_MAXLEN - ret, " %.*s", | |
984 | subname_len - skip, subname + skip); | |
985 | } | |
986 | break; | |
987 | } | |
b21acc1c | 988 | |
7585a5b0 | 989 | list_for_each_entry(ctl, &dsp->ctl_list, list) { |
b21acc1c CK |
990 | if (!strcmp(ctl->name, name)) { |
991 | if (!ctl->enabled) | |
992 | ctl->enabled = 1; | |
993 | return 0; | |
994 | } | |
995 | } | |
996 | ||
997 | ctl = kzalloc(sizeof(*ctl), GFP_KERNEL); | |
998 | if (!ctl) | |
999 | return -ENOMEM; | |
2323736d | 1000 | ctl->fw_name = wm_adsp_fw_text[dsp->fw]; |
b21acc1c CK |
1001 | ctl->alg_region = *alg_region; |
1002 | ctl->name = kmemdup(name, strlen(name) + 1, GFP_KERNEL); | |
1003 | if (!ctl->name) { | |
1004 | ret = -ENOMEM; | |
1005 | goto err_ctl; | |
1006 | } | |
1007 | ctl->enabled = 1; | |
1008 | ctl->set = 0; | |
1009 | ctl->ops.xget = wm_coeff_get; | |
1010 | ctl->ops.xput = wm_coeff_put; | |
1011 | ctl->dsp = dsp; | |
1012 | ||
26c22a19 | 1013 | ctl->flags = flags; |
2323736d | 1014 | ctl->offset = offset; |
b21acc1c CK |
1015 | if (len > 512) { |
1016 | adsp_warn(dsp, "Truncating control %s from %d\n", | |
1017 | ctl->name, len); | |
1018 | len = 512; | |
1019 | } | |
1020 | ctl->len = len; | |
1021 | ctl->cache = kzalloc(ctl->len, GFP_KERNEL); | |
1022 | if (!ctl->cache) { | |
1023 | ret = -ENOMEM; | |
1024 | goto err_ctl_name; | |
1025 | } | |
1026 | ||
2323736d CK |
1027 | list_add(&ctl->list, &dsp->ctl_list); |
1028 | ||
b21acc1c CK |
1029 | ctl_work = kzalloc(sizeof(*ctl_work), GFP_KERNEL); |
1030 | if (!ctl_work) { | |
1031 | ret = -ENOMEM; | |
1032 | goto err_ctl_cache; | |
1033 | } | |
1034 | ||
1035 | ctl_work->dsp = dsp; | |
1036 | ctl_work->ctl = ctl; | |
1037 | INIT_WORK(&ctl_work->work, wm_adsp_ctl_work); | |
1038 | schedule_work(&ctl_work->work); | |
1039 | ||
1040 | return 0; | |
1041 | ||
1042 | err_ctl_cache: | |
1043 | kfree(ctl->cache); | |
1044 | err_ctl_name: | |
1045 | kfree(ctl->name); | |
1046 | err_ctl: | |
1047 | kfree(ctl); | |
1048 | ||
1049 | return ret; | |
1050 | } | |
1051 | ||
2323736d CK |
1052 | struct wm_coeff_parsed_alg { |
1053 | int id; | |
1054 | const u8 *name; | |
1055 | int name_len; | |
1056 | int ncoeff; | |
1057 | }; | |
1058 | ||
1059 | struct wm_coeff_parsed_coeff { | |
1060 | int offset; | |
1061 | int mem_type; | |
1062 | const u8 *name; | |
1063 | int name_len; | |
1064 | int ctl_type; | |
1065 | int flags; | |
1066 | int len; | |
1067 | }; | |
1068 | ||
cb5b57a9 CK |
1069 | static int wm_coeff_parse_string(int bytes, const u8 **pos, const u8 **str) |
1070 | { | |
1071 | int length; | |
1072 | ||
1073 | switch (bytes) { | |
1074 | case 1: | |
1075 | length = **pos; | |
1076 | break; | |
1077 | case 2: | |
8299ee81 | 1078 | length = le16_to_cpu(*((__le16 *)*pos)); |
cb5b57a9 CK |
1079 | break; |
1080 | default: | |
1081 | return 0; | |
1082 | } | |
1083 | ||
1084 | if (str) | |
1085 | *str = *pos + bytes; | |
1086 | ||
1087 | *pos += ((length + bytes) + 3) & ~0x03; | |
1088 | ||
1089 | return length; | |
1090 | } | |
1091 | ||
1092 | static int wm_coeff_parse_int(int bytes, const u8 **pos) | |
1093 | { | |
1094 | int val = 0; | |
1095 | ||
1096 | switch (bytes) { | |
1097 | case 2: | |
8299ee81 | 1098 | val = le16_to_cpu(*((__le16 *)*pos)); |
cb5b57a9 CK |
1099 | break; |
1100 | case 4: | |
8299ee81 | 1101 | val = le32_to_cpu(*((__le32 *)*pos)); |
cb5b57a9 CK |
1102 | break; |
1103 | default: | |
1104 | break; | |
1105 | } | |
1106 | ||
1107 | *pos += bytes; | |
1108 | ||
1109 | return val; | |
1110 | } | |
1111 | ||
2323736d CK |
1112 | static inline void wm_coeff_parse_alg(struct wm_adsp *dsp, const u8 **data, |
1113 | struct wm_coeff_parsed_alg *blk) | |
1114 | { | |
1115 | const struct wmfw_adsp_alg_data *raw; | |
1116 | ||
cb5b57a9 CK |
1117 | switch (dsp->fw_ver) { |
1118 | case 0: | |
1119 | case 1: | |
1120 | raw = (const struct wmfw_adsp_alg_data *)*data; | |
1121 | *data = raw->data; | |
2323736d | 1122 | |
cb5b57a9 CK |
1123 | blk->id = le32_to_cpu(raw->id); |
1124 | blk->name = raw->name; | |
1125 | blk->name_len = strlen(raw->name); | |
1126 | blk->ncoeff = le32_to_cpu(raw->ncoeff); | |
1127 | break; | |
1128 | default: | |
1129 | blk->id = wm_coeff_parse_int(sizeof(raw->id), data); | |
1130 | blk->name_len = wm_coeff_parse_string(sizeof(u8), data, | |
1131 | &blk->name); | |
1132 | wm_coeff_parse_string(sizeof(u16), data, NULL); | |
1133 | blk->ncoeff = wm_coeff_parse_int(sizeof(raw->ncoeff), data); | |
1134 | break; | |
1135 | } | |
2323736d CK |
1136 | |
1137 | adsp_dbg(dsp, "Algorithm ID: %#x\n", blk->id); | |
1138 | adsp_dbg(dsp, "Algorithm name: %.*s\n", blk->name_len, blk->name); | |
1139 | adsp_dbg(dsp, "# of coefficient descriptors: %#x\n", blk->ncoeff); | |
1140 | } | |
1141 | ||
1142 | static inline void wm_coeff_parse_coeff(struct wm_adsp *dsp, const u8 **data, | |
1143 | struct wm_coeff_parsed_coeff *blk) | |
1144 | { | |
1145 | const struct wmfw_adsp_coeff_data *raw; | |
cb5b57a9 CK |
1146 | const u8 *tmp; |
1147 | int length; | |
2323736d | 1148 | |
cb5b57a9 CK |
1149 | switch (dsp->fw_ver) { |
1150 | case 0: | |
1151 | case 1: | |
1152 | raw = (const struct wmfw_adsp_coeff_data *)*data; | |
1153 | *data = *data + sizeof(raw->hdr) + le32_to_cpu(raw->hdr.size); | |
1154 | ||
1155 | blk->offset = le16_to_cpu(raw->hdr.offset); | |
1156 | blk->mem_type = le16_to_cpu(raw->hdr.type); | |
1157 | blk->name = raw->name; | |
1158 | blk->name_len = strlen(raw->name); | |
1159 | blk->ctl_type = le16_to_cpu(raw->ctl_type); | |
1160 | blk->flags = le16_to_cpu(raw->flags); | |
1161 | blk->len = le32_to_cpu(raw->len); | |
1162 | break; | |
1163 | default: | |
1164 | tmp = *data; | |
1165 | blk->offset = wm_coeff_parse_int(sizeof(raw->hdr.offset), &tmp); | |
1166 | blk->mem_type = wm_coeff_parse_int(sizeof(raw->hdr.type), &tmp); | |
1167 | length = wm_coeff_parse_int(sizeof(raw->hdr.size), &tmp); | |
1168 | blk->name_len = wm_coeff_parse_string(sizeof(u8), &tmp, | |
1169 | &blk->name); | |
1170 | wm_coeff_parse_string(sizeof(u8), &tmp, NULL); | |
1171 | wm_coeff_parse_string(sizeof(u16), &tmp, NULL); | |
1172 | blk->ctl_type = wm_coeff_parse_int(sizeof(raw->ctl_type), &tmp); | |
1173 | blk->flags = wm_coeff_parse_int(sizeof(raw->flags), &tmp); | |
1174 | blk->len = wm_coeff_parse_int(sizeof(raw->len), &tmp); | |
1175 | ||
1176 | *data = *data + sizeof(raw->hdr) + length; | |
1177 | break; | |
1178 | } | |
2323736d CK |
1179 | |
1180 | adsp_dbg(dsp, "\tCoefficient type: %#x\n", blk->mem_type); | |
1181 | adsp_dbg(dsp, "\tCoefficient offset: %#x\n", blk->offset); | |
1182 | adsp_dbg(dsp, "\tCoefficient name: %.*s\n", blk->name_len, blk->name); | |
1183 | adsp_dbg(dsp, "\tCoefficient flags: %#x\n", blk->flags); | |
1184 | adsp_dbg(dsp, "\tALSA control type: %#x\n", blk->ctl_type); | |
1185 | adsp_dbg(dsp, "\tALSA control len: %#x\n", blk->len); | |
1186 | } | |
1187 | ||
1188 | static int wm_adsp_parse_coeff(struct wm_adsp *dsp, | |
1189 | const struct wmfw_region *region) | |
1190 | { | |
1191 | struct wm_adsp_alg_region alg_region = {}; | |
1192 | struct wm_coeff_parsed_alg alg_blk; | |
1193 | struct wm_coeff_parsed_coeff coeff_blk; | |
1194 | const u8 *data = region->data; | |
1195 | int i, ret; | |
1196 | ||
1197 | wm_coeff_parse_alg(dsp, &data, &alg_blk); | |
1198 | for (i = 0; i < alg_blk.ncoeff; i++) { | |
1199 | wm_coeff_parse_coeff(dsp, &data, &coeff_blk); | |
1200 | ||
1201 | switch (coeff_blk.ctl_type) { | |
1202 | case SNDRV_CTL_ELEM_TYPE_BYTES: | |
1203 | break; | |
1204 | default: | |
1205 | adsp_err(dsp, "Unknown control type: %d\n", | |
1206 | coeff_blk.ctl_type); | |
1207 | return -EINVAL; | |
1208 | } | |
1209 | ||
1210 | alg_region.type = coeff_blk.mem_type; | |
1211 | alg_region.alg = alg_blk.id; | |
1212 | ||
1213 | ret = wm_adsp_create_control(dsp, &alg_region, | |
1214 | coeff_blk.offset, | |
1215 | coeff_blk.len, | |
1216 | coeff_blk.name, | |
26c22a19 CK |
1217 | coeff_blk.name_len, |
1218 | coeff_blk.flags); | |
2323736d CK |
1219 | if (ret < 0) |
1220 | adsp_err(dsp, "Failed to create control: %.*s, %d\n", | |
1221 | coeff_blk.name_len, coeff_blk.name, ret); | |
1222 | } | |
1223 | ||
1224 | return 0; | |
1225 | } | |
1226 | ||
2159ad93 MB |
1227 | static int wm_adsp_load(struct wm_adsp *dsp) |
1228 | { | |
cf17c83c | 1229 | LIST_HEAD(buf_list); |
2159ad93 MB |
1230 | const struct firmware *firmware; |
1231 | struct regmap *regmap = dsp->regmap; | |
1232 | unsigned int pos = 0; | |
1233 | const struct wmfw_header *header; | |
1234 | const struct wmfw_adsp1_sizes *adsp1_sizes; | |
1235 | const struct wmfw_adsp2_sizes *adsp2_sizes; | |
1236 | const struct wmfw_footer *footer; | |
1237 | const struct wmfw_region *region; | |
1238 | const struct wm_adsp_region *mem; | |
1239 | const char *region_name; | |
1240 | char *file, *text; | |
cf17c83c | 1241 | struct wm_adsp_buf *buf; |
2159ad93 MB |
1242 | unsigned int reg; |
1243 | int regions = 0; | |
1244 | int ret, offset, type, sizes; | |
1245 | ||
1246 | file = kzalloc(PAGE_SIZE, GFP_KERNEL); | |
1247 | if (file == NULL) | |
1248 | return -ENOMEM; | |
1249 | ||
1023dbd9 MB |
1250 | snprintf(file, PAGE_SIZE, "%s-dsp%d-%s.wmfw", dsp->part, dsp->num, |
1251 | wm_adsp_fw[dsp->fw].file); | |
2159ad93 MB |
1252 | file[PAGE_SIZE - 1] = '\0'; |
1253 | ||
1254 | ret = request_firmware(&firmware, file, dsp->dev); | |
1255 | if (ret != 0) { | |
1256 | adsp_err(dsp, "Failed to request '%s'\n", file); | |
1257 | goto out; | |
1258 | } | |
1259 | ret = -EINVAL; | |
1260 | ||
1261 | pos = sizeof(*header) + sizeof(*adsp1_sizes) + sizeof(*footer); | |
1262 | if (pos >= firmware->size) { | |
1263 | adsp_err(dsp, "%s: file too short, %zu bytes\n", | |
1264 | file, firmware->size); | |
1265 | goto out_fw; | |
1266 | } | |
1267 | ||
7585a5b0 | 1268 | header = (void *)&firmware->data[0]; |
2159ad93 MB |
1269 | |
1270 | if (memcmp(&header->magic[0], "WMFW", 4) != 0) { | |
1271 | adsp_err(dsp, "%s: invalid magic\n", file); | |
1272 | goto out_fw; | |
1273 | } | |
1274 | ||
2323736d CK |
1275 | switch (header->ver) { |
1276 | case 0: | |
c61e59fe CK |
1277 | adsp_warn(dsp, "%s: Depreciated file format %d\n", |
1278 | file, header->ver); | |
1279 | break; | |
2323736d | 1280 | case 1: |
cb5b57a9 | 1281 | case 2: |
2323736d CK |
1282 | break; |
1283 | default: | |
2159ad93 MB |
1284 | adsp_err(dsp, "%s: unknown file format %d\n", |
1285 | file, header->ver); | |
1286 | goto out_fw; | |
1287 | } | |
2323736d | 1288 | |
3626992a | 1289 | adsp_info(dsp, "Firmware version: %d\n", header->ver); |
2323736d | 1290 | dsp->fw_ver = header->ver; |
2159ad93 MB |
1291 | |
1292 | if (header->core != dsp->type) { | |
1293 | adsp_err(dsp, "%s: invalid core %d != %d\n", | |
1294 | file, header->core, dsp->type); | |
1295 | goto out_fw; | |
1296 | } | |
1297 | ||
1298 | switch (dsp->type) { | |
1299 | case WMFW_ADSP1: | |
1300 | pos = sizeof(*header) + sizeof(*adsp1_sizes) + sizeof(*footer); | |
1301 | adsp1_sizes = (void *)&(header[1]); | |
1302 | footer = (void *)&(adsp1_sizes[1]); | |
1303 | sizes = sizeof(*adsp1_sizes); | |
1304 | ||
1305 | adsp_dbg(dsp, "%s: %d DM, %d PM, %d ZM\n", | |
1306 | file, le32_to_cpu(adsp1_sizes->dm), | |
1307 | le32_to_cpu(adsp1_sizes->pm), | |
1308 | le32_to_cpu(adsp1_sizes->zm)); | |
1309 | break; | |
1310 | ||
1311 | case WMFW_ADSP2: | |
1312 | pos = sizeof(*header) + sizeof(*adsp2_sizes) + sizeof(*footer); | |
1313 | adsp2_sizes = (void *)&(header[1]); | |
1314 | footer = (void *)&(adsp2_sizes[1]); | |
1315 | sizes = sizeof(*adsp2_sizes); | |
1316 | ||
1317 | adsp_dbg(dsp, "%s: %d XM, %d YM %d PM, %d ZM\n", | |
1318 | file, le32_to_cpu(adsp2_sizes->xm), | |
1319 | le32_to_cpu(adsp2_sizes->ym), | |
1320 | le32_to_cpu(adsp2_sizes->pm), | |
1321 | le32_to_cpu(adsp2_sizes->zm)); | |
1322 | break; | |
1323 | ||
1324 | default: | |
6c452bda | 1325 | WARN(1, "Unknown DSP type"); |
2159ad93 MB |
1326 | goto out_fw; |
1327 | } | |
1328 | ||
1329 | if (le32_to_cpu(header->len) != sizeof(*header) + | |
1330 | sizes + sizeof(*footer)) { | |
1331 | adsp_err(dsp, "%s: unexpected header length %d\n", | |
1332 | file, le32_to_cpu(header->len)); | |
1333 | goto out_fw; | |
1334 | } | |
1335 | ||
1336 | adsp_dbg(dsp, "%s: timestamp %llu\n", file, | |
1337 | le64_to_cpu(footer->timestamp)); | |
1338 | ||
1339 | while (pos < firmware->size && | |
1340 | pos - firmware->size > sizeof(*region)) { | |
1341 | region = (void *)&(firmware->data[pos]); | |
1342 | region_name = "Unknown"; | |
1343 | reg = 0; | |
1344 | text = NULL; | |
1345 | offset = le32_to_cpu(region->offset) & 0xffffff; | |
1346 | type = be32_to_cpu(region->type) & 0xff; | |
1347 | mem = wm_adsp_find_region(dsp, type); | |
7585a5b0 | 1348 | |
2159ad93 MB |
1349 | switch (type) { |
1350 | case WMFW_NAME_TEXT: | |
1351 | region_name = "Firmware name"; | |
1352 | text = kzalloc(le32_to_cpu(region->len) + 1, | |
1353 | GFP_KERNEL); | |
1354 | break; | |
2323736d CK |
1355 | case WMFW_ALGORITHM_DATA: |
1356 | region_name = "Algorithm"; | |
1357 | ret = wm_adsp_parse_coeff(dsp, region); | |
1358 | if (ret != 0) | |
1359 | goto out_fw; | |
1360 | break; | |
2159ad93 MB |
1361 | case WMFW_INFO_TEXT: |
1362 | region_name = "Information"; | |
1363 | text = kzalloc(le32_to_cpu(region->len) + 1, | |
1364 | GFP_KERNEL); | |
1365 | break; | |
1366 | case WMFW_ABSOLUTE: | |
1367 | region_name = "Absolute"; | |
1368 | reg = offset; | |
1369 | break; | |
1370 | case WMFW_ADSP1_PM: | |
2159ad93 | 1371 | region_name = "PM"; |
45b9ee72 | 1372 | reg = wm_adsp_region_to_reg(mem, offset); |
2159ad93 MB |
1373 | break; |
1374 | case WMFW_ADSP1_DM: | |
2159ad93 | 1375 | region_name = "DM"; |
45b9ee72 | 1376 | reg = wm_adsp_region_to_reg(mem, offset); |
2159ad93 MB |
1377 | break; |
1378 | case WMFW_ADSP2_XM: | |
2159ad93 | 1379 | region_name = "XM"; |
45b9ee72 | 1380 | reg = wm_adsp_region_to_reg(mem, offset); |
2159ad93 MB |
1381 | break; |
1382 | case WMFW_ADSP2_YM: | |
2159ad93 | 1383 | region_name = "YM"; |
45b9ee72 | 1384 | reg = wm_adsp_region_to_reg(mem, offset); |
2159ad93 MB |
1385 | break; |
1386 | case WMFW_ADSP1_ZM: | |
2159ad93 | 1387 | region_name = "ZM"; |
45b9ee72 | 1388 | reg = wm_adsp_region_to_reg(mem, offset); |
2159ad93 MB |
1389 | break; |
1390 | default: | |
1391 | adsp_warn(dsp, | |
1392 | "%s.%d: Unknown region type %x at %d(%x)\n", | |
1393 | file, regions, type, pos, pos); | |
1394 | break; | |
1395 | } | |
1396 | ||
1397 | adsp_dbg(dsp, "%s.%d: %d bytes at %d in %s\n", file, | |
1398 | regions, le32_to_cpu(region->len), offset, | |
1399 | region_name); | |
1400 | ||
1401 | if (text) { | |
1402 | memcpy(text, region->data, le32_to_cpu(region->len)); | |
1403 | adsp_info(dsp, "%s: %s\n", file, text); | |
1404 | kfree(text); | |
1405 | } | |
1406 | ||
1407 | if (reg) { | |
cdcd7f72 CK |
1408 | buf = wm_adsp_buf_alloc(region->data, |
1409 | le32_to_cpu(region->len), | |
1410 | &buf_list); | |
1411 | if (!buf) { | |
1412 | adsp_err(dsp, "Out of memory\n"); | |
1413 | ret = -ENOMEM; | |
1414 | goto out_fw; | |
1415 | } | |
c1a7898d | 1416 | |
cdcd7f72 CK |
1417 | ret = regmap_raw_write_async(regmap, reg, buf->buf, |
1418 | le32_to_cpu(region->len)); | |
1419 | if (ret != 0) { | |
1420 | adsp_err(dsp, | |
1421 | "%s.%d: Failed to write %d bytes at %d in %s: %d\n", | |
1422 | file, regions, | |
1423 | le32_to_cpu(region->len), offset, | |
1424 | region_name, ret); | |
1425 | goto out_fw; | |
2159ad93 MB |
1426 | } |
1427 | } | |
1428 | ||
1429 | pos += le32_to_cpu(region->len) + sizeof(*region); | |
1430 | regions++; | |
1431 | } | |
cf17c83c MB |
1432 | |
1433 | ret = regmap_async_complete(regmap); | |
1434 | if (ret != 0) { | |
1435 | adsp_err(dsp, "Failed to complete async write: %d\n", ret); | |
1436 | goto out_fw; | |
1437 | } | |
1438 | ||
2159ad93 MB |
1439 | if (pos > firmware->size) |
1440 | adsp_warn(dsp, "%s.%d: %zu bytes at end of file\n", | |
1441 | file, regions, pos - firmware->size); | |
1442 | ||
f9f55e31 RF |
1443 | wm_adsp_debugfs_save_wmfwname(dsp, file); |
1444 | ||
2159ad93 | 1445 | out_fw: |
cf17c83c MB |
1446 | regmap_async_complete(regmap); |
1447 | wm_adsp_buf_free(&buf_list); | |
2159ad93 MB |
1448 | release_firmware(firmware); |
1449 | out: | |
1450 | kfree(file); | |
1451 | ||
1452 | return ret; | |
1453 | } | |
1454 | ||
2323736d CK |
1455 | static void wm_adsp_ctl_fixup_base(struct wm_adsp *dsp, |
1456 | const struct wm_adsp_alg_region *alg_region) | |
1457 | { | |
1458 | struct wm_coeff_ctl *ctl; | |
1459 | ||
1460 | list_for_each_entry(ctl, &dsp->ctl_list, list) { | |
1461 | if (ctl->fw_name == wm_adsp_fw_text[dsp->fw] && | |
1462 | alg_region->alg == ctl->alg_region.alg && | |
1463 | alg_region->type == ctl->alg_region.type) { | |
1464 | ctl->alg_region.base = alg_region->base; | |
1465 | } | |
1466 | } | |
1467 | } | |
1468 | ||
3809f001 | 1469 | static void *wm_adsp_read_algs(struct wm_adsp *dsp, size_t n_algs, |
b618a185 | 1470 | unsigned int pos, unsigned int len) |
db40517c | 1471 | { |
b618a185 CK |
1472 | void *alg; |
1473 | int ret; | |
db40517c | 1474 | __be32 val; |
db40517c | 1475 | |
3809f001 | 1476 | if (n_algs == 0) { |
b618a185 CK |
1477 | adsp_err(dsp, "No algorithms\n"); |
1478 | return ERR_PTR(-EINVAL); | |
db40517c MB |
1479 | } |
1480 | ||
3809f001 CK |
1481 | if (n_algs > 1024) { |
1482 | adsp_err(dsp, "Algorithm count %zx excessive\n", n_algs); | |
b618a185 CK |
1483 | return ERR_PTR(-EINVAL); |
1484 | } | |
db40517c | 1485 | |
b618a185 CK |
1486 | /* Read the terminator first to validate the length */ |
1487 | ret = regmap_raw_read(dsp->regmap, pos + len, &val, sizeof(val)); | |
1488 | if (ret != 0) { | |
1489 | adsp_err(dsp, "Failed to read algorithm list end: %d\n", | |
1490 | ret); | |
1491 | return ERR_PTR(ret); | |
1492 | } | |
db40517c | 1493 | |
b618a185 CK |
1494 | if (be32_to_cpu(val) != 0xbedead) |
1495 | adsp_warn(dsp, "Algorithm list end %x 0x%x != 0xbeadead\n", | |
1496 | pos + len, be32_to_cpu(val)); | |
d62f4bc6 | 1497 | |
b618a185 CK |
1498 | alg = kzalloc(len * 2, GFP_KERNEL | GFP_DMA); |
1499 | if (!alg) | |
1500 | return ERR_PTR(-ENOMEM); | |
db40517c | 1501 | |
b618a185 CK |
1502 | ret = regmap_raw_read(dsp->regmap, pos, alg, len * 2); |
1503 | if (ret != 0) { | |
7d00cd97 | 1504 | adsp_err(dsp, "Failed to read algorithm list: %d\n", ret); |
b618a185 CK |
1505 | kfree(alg); |
1506 | return ERR_PTR(ret); | |
1507 | } | |
ac50009f | 1508 | |
b618a185 CK |
1509 | return alg; |
1510 | } | |
ac50009f | 1511 | |
14197095 CK |
1512 | static struct wm_adsp_alg_region * |
1513 | wm_adsp_find_alg_region(struct wm_adsp *dsp, int type, unsigned int id) | |
1514 | { | |
1515 | struct wm_adsp_alg_region *alg_region; | |
1516 | ||
1517 | list_for_each_entry(alg_region, &dsp->alg_regions, list) { | |
1518 | if (id == alg_region->alg && type == alg_region->type) | |
1519 | return alg_region; | |
1520 | } | |
1521 | ||
1522 | return NULL; | |
1523 | } | |
1524 | ||
d9d20e17 CK |
1525 | static struct wm_adsp_alg_region *wm_adsp_create_region(struct wm_adsp *dsp, |
1526 | int type, __be32 id, | |
1527 | __be32 base) | |
1528 | { | |
1529 | struct wm_adsp_alg_region *alg_region; | |
1530 | ||
1531 | alg_region = kzalloc(sizeof(*alg_region), GFP_KERNEL); | |
1532 | if (!alg_region) | |
1533 | return ERR_PTR(-ENOMEM); | |
1534 | ||
1535 | alg_region->type = type; | |
1536 | alg_region->alg = be32_to_cpu(id); | |
1537 | alg_region->base = be32_to_cpu(base); | |
1538 | ||
1539 | list_add_tail(&alg_region->list, &dsp->alg_regions); | |
1540 | ||
2323736d CK |
1541 | if (dsp->fw_ver > 0) |
1542 | wm_adsp_ctl_fixup_base(dsp, alg_region); | |
1543 | ||
d9d20e17 CK |
1544 | return alg_region; |
1545 | } | |
1546 | ||
b618a185 CK |
1547 | static int wm_adsp1_setup_algs(struct wm_adsp *dsp) |
1548 | { | |
1549 | struct wmfw_adsp1_id_hdr adsp1_id; | |
1550 | struct wmfw_adsp1_alg_hdr *adsp1_alg; | |
3809f001 | 1551 | struct wm_adsp_alg_region *alg_region; |
b618a185 CK |
1552 | const struct wm_adsp_region *mem; |
1553 | unsigned int pos, len; | |
3809f001 | 1554 | size_t n_algs; |
b618a185 | 1555 | int i, ret; |
db40517c | 1556 | |
b618a185 CK |
1557 | mem = wm_adsp_find_region(dsp, WMFW_ADSP1_DM); |
1558 | if (WARN_ON(!mem)) | |
1559 | return -EINVAL; | |
1560 | ||
1561 | ret = regmap_raw_read(dsp->regmap, mem->base, &adsp1_id, | |
1562 | sizeof(adsp1_id)); | |
1563 | if (ret != 0) { | |
1564 | adsp_err(dsp, "Failed to read algorithm info: %d\n", | |
1565 | ret); | |
1566 | return ret; | |
1567 | } | |
db40517c | 1568 | |
3809f001 | 1569 | n_algs = be32_to_cpu(adsp1_id.n_algs); |
b618a185 CK |
1570 | dsp->fw_id = be32_to_cpu(adsp1_id.fw.id); |
1571 | adsp_info(dsp, "Firmware: %x v%d.%d.%d, %zu algorithms\n", | |
1572 | dsp->fw_id, | |
1573 | (be32_to_cpu(adsp1_id.fw.ver) & 0xff0000) >> 16, | |
1574 | (be32_to_cpu(adsp1_id.fw.ver) & 0xff00) >> 8, | |
1575 | be32_to_cpu(adsp1_id.fw.ver) & 0xff, | |
3809f001 | 1576 | n_algs); |
b618a185 | 1577 | |
d9d20e17 CK |
1578 | alg_region = wm_adsp_create_region(dsp, WMFW_ADSP1_ZM, |
1579 | adsp1_id.fw.id, adsp1_id.zm); | |
1580 | if (IS_ERR(alg_region)) | |
1581 | return PTR_ERR(alg_region); | |
d62f4bc6 | 1582 | |
d9d20e17 CK |
1583 | alg_region = wm_adsp_create_region(dsp, WMFW_ADSP1_DM, |
1584 | adsp1_id.fw.id, adsp1_id.dm); | |
1585 | if (IS_ERR(alg_region)) | |
1586 | return PTR_ERR(alg_region); | |
db40517c | 1587 | |
b618a185 | 1588 | pos = sizeof(adsp1_id) / 2; |
3809f001 | 1589 | len = (sizeof(*adsp1_alg) * n_algs) / 2; |
b618a185 | 1590 | |
3809f001 | 1591 | adsp1_alg = wm_adsp_read_algs(dsp, n_algs, mem->base + pos, len); |
b618a185 CK |
1592 | if (IS_ERR(adsp1_alg)) |
1593 | return PTR_ERR(adsp1_alg); | |
1594 | ||
3809f001 | 1595 | for (i = 0; i < n_algs; i++) { |
b618a185 CK |
1596 | adsp_info(dsp, "%d: ID %x v%d.%d.%d DM@%x ZM@%x\n", |
1597 | i, be32_to_cpu(adsp1_alg[i].alg.id), | |
1598 | (be32_to_cpu(adsp1_alg[i].alg.ver) & 0xff0000) >> 16, | |
1599 | (be32_to_cpu(adsp1_alg[i].alg.ver) & 0xff00) >> 8, | |
1600 | be32_to_cpu(adsp1_alg[i].alg.ver) & 0xff, | |
1601 | be32_to_cpu(adsp1_alg[i].dm), | |
1602 | be32_to_cpu(adsp1_alg[i].zm)); | |
ac50009f | 1603 | |
d9d20e17 CK |
1604 | alg_region = wm_adsp_create_region(dsp, WMFW_ADSP1_DM, |
1605 | adsp1_alg[i].alg.id, | |
1606 | adsp1_alg[i].dm); | |
1607 | if (IS_ERR(alg_region)) { | |
1608 | ret = PTR_ERR(alg_region); | |
b618a185 CK |
1609 | goto out; |
1610 | } | |
2323736d CK |
1611 | if (dsp->fw_ver == 0) { |
1612 | if (i + 1 < n_algs) { | |
1613 | len = be32_to_cpu(adsp1_alg[i + 1].dm); | |
1614 | len -= be32_to_cpu(adsp1_alg[i].dm); | |
1615 | len *= 4; | |
1616 | wm_adsp_create_control(dsp, alg_region, 0, | |
26c22a19 | 1617 | len, NULL, 0, 0); |
2323736d CK |
1618 | } else { |
1619 | adsp_warn(dsp, "Missing length info for region DM with ID %x\n", | |
1620 | be32_to_cpu(adsp1_alg[i].alg.id)); | |
1621 | } | |
b618a185 | 1622 | } |
ac50009f | 1623 | |
d9d20e17 CK |
1624 | alg_region = wm_adsp_create_region(dsp, WMFW_ADSP1_ZM, |
1625 | adsp1_alg[i].alg.id, | |
1626 | adsp1_alg[i].zm); | |
1627 | if (IS_ERR(alg_region)) { | |
1628 | ret = PTR_ERR(alg_region); | |
b618a185 CK |
1629 | goto out; |
1630 | } | |
2323736d CK |
1631 | if (dsp->fw_ver == 0) { |
1632 | if (i + 1 < n_algs) { | |
1633 | len = be32_to_cpu(adsp1_alg[i + 1].zm); | |
1634 | len -= be32_to_cpu(adsp1_alg[i].zm); | |
1635 | len *= 4; | |
1636 | wm_adsp_create_control(dsp, alg_region, 0, | |
26c22a19 | 1637 | len, NULL, 0, 0); |
2323736d CK |
1638 | } else { |
1639 | adsp_warn(dsp, "Missing length info for region ZM with ID %x\n", | |
1640 | be32_to_cpu(adsp1_alg[i].alg.id)); | |
1641 | } | |
b618a185 | 1642 | } |
db40517c MB |
1643 | } |
1644 | ||
b618a185 CK |
1645 | out: |
1646 | kfree(adsp1_alg); | |
1647 | return ret; | |
1648 | } | |
db40517c | 1649 | |
b618a185 CK |
1650 | static int wm_adsp2_setup_algs(struct wm_adsp *dsp) |
1651 | { | |
1652 | struct wmfw_adsp2_id_hdr adsp2_id; | |
1653 | struct wmfw_adsp2_alg_hdr *adsp2_alg; | |
3809f001 | 1654 | struct wm_adsp_alg_region *alg_region; |
b618a185 CK |
1655 | const struct wm_adsp_region *mem; |
1656 | unsigned int pos, len; | |
3809f001 | 1657 | size_t n_algs; |
b618a185 CK |
1658 | int i, ret; |
1659 | ||
1660 | mem = wm_adsp_find_region(dsp, WMFW_ADSP2_XM); | |
1661 | if (WARN_ON(!mem)) | |
d62f4bc6 | 1662 | return -EINVAL; |
d62f4bc6 | 1663 | |
b618a185 CK |
1664 | ret = regmap_raw_read(dsp->regmap, mem->base, &adsp2_id, |
1665 | sizeof(adsp2_id)); | |
db40517c | 1666 | if (ret != 0) { |
b618a185 CK |
1667 | adsp_err(dsp, "Failed to read algorithm info: %d\n", |
1668 | ret); | |
db40517c MB |
1669 | return ret; |
1670 | } | |
1671 | ||
3809f001 | 1672 | n_algs = be32_to_cpu(adsp2_id.n_algs); |
b618a185 | 1673 | dsp->fw_id = be32_to_cpu(adsp2_id.fw.id); |
f9f55e31 | 1674 | dsp->fw_id_version = be32_to_cpu(adsp2_id.fw.ver); |
b618a185 CK |
1675 | adsp_info(dsp, "Firmware: %x v%d.%d.%d, %zu algorithms\n", |
1676 | dsp->fw_id, | |
f9f55e31 RF |
1677 | (dsp->fw_id_version & 0xff0000) >> 16, |
1678 | (dsp->fw_id_version & 0xff00) >> 8, | |
1679 | dsp->fw_id_version & 0xff, | |
3809f001 | 1680 | n_algs); |
b618a185 | 1681 | |
d9d20e17 CK |
1682 | alg_region = wm_adsp_create_region(dsp, WMFW_ADSP2_XM, |
1683 | adsp2_id.fw.id, adsp2_id.xm); | |
1684 | if (IS_ERR(alg_region)) | |
1685 | return PTR_ERR(alg_region); | |
db40517c | 1686 | |
d9d20e17 CK |
1687 | alg_region = wm_adsp_create_region(dsp, WMFW_ADSP2_YM, |
1688 | adsp2_id.fw.id, adsp2_id.ym); | |
1689 | if (IS_ERR(alg_region)) | |
1690 | return PTR_ERR(alg_region); | |
db40517c | 1691 | |
d9d20e17 CK |
1692 | alg_region = wm_adsp_create_region(dsp, WMFW_ADSP2_ZM, |
1693 | adsp2_id.fw.id, adsp2_id.zm); | |
1694 | if (IS_ERR(alg_region)) | |
1695 | return PTR_ERR(alg_region); | |
db40517c | 1696 | |
b618a185 | 1697 | pos = sizeof(adsp2_id) / 2; |
3809f001 | 1698 | len = (sizeof(*adsp2_alg) * n_algs) / 2; |
db40517c | 1699 | |
3809f001 | 1700 | adsp2_alg = wm_adsp_read_algs(dsp, n_algs, mem->base + pos, len); |
b618a185 CK |
1701 | if (IS_ERR(adsp2_alg)) |
1702 | return PTR_ERR(adsp2_alg); | |
471f4885 | 1703 | |
3809f001 | 1704 | for (i = 0; i < n_algs; i++) { |
b618a185 CK |
1705 | adsp_info(dsp, |
1706 | "%d: ID %x v%d.%d.%d XM@%x YM@%x ZM@%x\n", | |
1707 | i, be32_to_cpu(adsp2_alg[i].alg.id), | |
1708 | (be32_to_cpu(adsp2_alg[i].alg.ver) & 0xff0000) >> 16, | |
1709 | (be32_to_cpu(adsp2_alg[i].alg.ver) & 0xff00) >> 8, | |
1710 | be32_to_cpu(adsp2_alg[i].alg.ver) & 0xff, | |
1711 | be32_to_cpu(adsp2_alg[i].xm), | |
1712 | be32_to_cpu(adsp2_alg[i].ym), | |
1713 | be32_to_cpu(adsp2_alg[i].zm)); | |
db40517c | 1714 | |
d9d20e17 CK |
1715 | alg_region = wm_adsp_create_region(dsp, WMFW_ADSP2_XM, |
1716 | adsp2_alg[i].alg.id, | |
1717 | adsp2_alg[i].xm); | |
1718 | if (IS_ERR(alg_region)) { | |
1719 | ret = PTR_ERR(alg_region); | |
b618a185 CK |
1720 | goto out; |
1721 | } | |
2323736d CK |
1722 | if (dsp->fw_ver == 0) { |
1723 | if (i + 1 < n_algs) { | |
1724 | len = be32_to_cpu(adsp2_alg[i + 1].xm); | |
1725 | len -= be32_to_cpu(adsp2_alg[i].xm); | |
1726 | len *= 4; | |
1727 | wm_adsp_create_control(dsp, alg_region, 0, | |
26c22a19 | 1728 | len, NULL, 0, 0); |
2323736d CK |
1729 | } else { |
1730 | adsp_warn(dsp, "Missing length info for region XM with ID %x\n", | |
1731 | be32_to_cpu(adsp2_alg[i].alg.id)); | |
1732 | } | |
b618a185 | 1733 | } |
471f4885 | 1734 | |
d9d20e17 CK |
1735 | alg_region = wm_adsp_create_region(dsp, WMFW_ADSP2_YM, |
1736 | adsp2_alg[i].alg.id, | |
1737 | adsp2_alg[i].ym); | |
1738 | if (IS_ERR(alg_region)) { | |
1739 | ret = PTR_ERR(alg_region); | |
b618a185 CK |
1740 | goto out; |
1741 | } | |
2323736d CK |
1742 | if (dsp->fw_ver == 0) { |
1743 | if (i + 1 < n_algs) { | |
1744 | len = be32_to_cpu(adsp2_alg[i + 1].ym); | |
1745 | len -= be32_to_cpu(adsp2_alg[i].ym); | |
1746 | len *= 4; | |
1747 | wm_adsp_create_control(dsp, alg_region, 0, | |
26c22a19 | 1748 | len, NULL, 0, 0); |
2323736d CK |
1749 | } else { |
1750 | adsp_warn(dsp, "Missing length info for region YM with ID %x\n", | |
1751 | be32_to_cpu(adsp2_alg[i].alg.id)); | |
1752 | } | |
b618a185 | 1753 | } |
471f4885 | 1754 | |
d9d20e17 CK |
1755 | alg_region = wm_adsp_create_region(dsp, WMFW_ADSP2_ZM, |
1756 | adsp2_alg[i].alg.id, | |
1757 | adsp2_alg[i].zm); | |
1758 | if (IS_ERR(alg_region)) { | |
1759 | ret = PTR_ERR(alg_region); | |
b618a185 CK |
1760 | goto out; |
1761 | } | |
2323736d CK |
1762 | if (dsp->fw_ver == 0) { |
1763 | if (i + 1 < n_algs) { | |
1764 | len = be32_to_cpu(adsp2_alg[i + 1].zm); | |
1765 | len -= be32_to_cpu(adsp2_alg[i].zm); | |
1766 | len *= 4; | |
1767 | wm_adsp_create_control(dsp, alg_region, 0, | |
26c22a19 | 1768 | len, NULL, 0, 0); |
2323736d CK |
1769 | } else { |
1770 | adsp_warn(dsp, "Missing length info for region ZM with ID %x\n", | |
1771 | be32_to_cpu(adsp2_alg[i].alg.id)); | |
1772 | } | |
db40517c MB |
1773 | } |
1774 | } | |
1775 | ||
1776 | out: | |
b618a185 | 1777 | kfree(adsp2_alg); |
db40517c MB |
1778 | return ret; |
1779 | } | |
1780 | ||
2159ad93 MB |
1781 | static int wm_adsp_load_coeff(struct wm_adsp *dsp) |
1782 | { | |
cf17c83c | 1783 | LIST_HEAD(buf_list); |
2159ad93 MB |
1784 | struct regmap *regmap = dsp->regmap; |
1785 | struct wmfw_coeff_hdr *hdr; | |
1786 | struct wmfw_coeff_item *blk; | |
1787 | const struct firmware *firmware; | |
471f4885 MB |
1788 | const struct wm_adsp_region *mem; |
1789 | struct wm_adsp_alg_region *alg_region; | |
2159ad93 MB |
1790 | const char *region_name; |
1791 | int ret, pos, blocks, type, offset, reg; | |
1792 | char *file; | |
cf17c83c | 1793 | struct wm_adsp_buf *buf; |
2159ad93 MB |
1794 | |
1795 | file = kzalloc(PAGE_SIZE, GFP_KERNEL); | |
1796 | if (file == NULL) | |
1797 | return -ENOMEM; | |
1798 | ||
1023dbd9 MB |
1799 | snprintf(file, PAGE_SIZE, "%s-dsp%d-%s.bin", dsp->part, dsp->num, |
1800 | wm_adsp_fw[dsp->fw].file); | |
2159ad93 MB |
1801 | file[PAGE_SIZE - 1] = '\0'; |
1802 | ||
1803 | ret = request_firmware(&firmware, file, dsp->dev); | |
1804 | if (ret != 0) { | |
1805 | adsp_warn(dsp, "Failed to request '%s'\n", file); | |
1806 | ret = 0; | |
1807 | goto out; | |
1808 | } | |
1809 | ret = -EINVAL; | |
1810 | ||
1811 | if (sizeof(*hdr) >= firmware->size) { | |
1812 | adsp_err(dsp, "%s: file too short, %zu bytes\n", | |
1813 | file, firmware->size); | |
1814 | goto out_fw; | |
1815 | } | |
1816 | ||
7585a5b0 | 1817 | hdr = (void *)&firmware->data[0]; |
2159ad93 MB |
1818 | if (memcmp(hdr->magic, "WMDR", 4) != 0) { |
1819 | adsp_err(dsp, "%s: invalid magic\n", file); | |
a4cdbec7 | 1820 | goto out_fw; |
2159ad93 MB |
1821 | } |
1822 | ||
c712326d MB |
1823 | switch (be32_to_cpu(hdr->rev) & 0xff) { |
1824 | case 1: | |
1825 | break; | |
1826 | default: | |
1827 | adsp_err(dsp, "%s: Unsupported coefficient file format %d\n", | |
1828 | file, be32_to_cpu(hdr->rev) & 0xff); | |
1829 | ret = -EINVAL; | |
1830 | goto out_fw; | |
1831 | } | |
1832 | ||
2159ad93 MB |
1833 | adsp_dbg(dsp, "%s: v%d.%d.%d\n", file, |
1834 | (le32_to_cpu(hdr->ver) >> 16) & 0xff, | |
1835 | (le32_to_cpu(hdr->ver) >> 8) & 0xff, | |
1836 | le32_to_cpu(hdr->ver) & 0xff); | |
1837 | ||
1838 | pos = le32_to_cpu(hdr->len); | |
1839 | ||
1840 | blocks = 0; | |
1841 | while (pos < firmware->size && | |
1842 | pos - firmware->size > sizeof(*blk)) { | |
7585a5b0 | 1843 | blk = (void *)(&firmware->data[pos]); |
2159ad93 | 1844 | |
c712326d MB |
1845 | type = le16_to_cpu(blk->type); |
1846 | offset = le16_to_cpu(blk->offset); | |
2159ad93 MB |
1847 | |
1848 | adsp_dbg(dsp, "%s.%d: %x v%d.%d.%d\n", | |
1849 | file, blocks, le32_to_cpu(blk->id), | |
1850 | (le32_to_cpu(blk->ver) >> 16) & 0xff, | |
1851 | (le32_to_cpu(blk->ver) >> 8) & 0xff, | |
1852 | le32_to_cpu(blk->ver) & 0xff); | |
1853 | adsp_dbg(dsp, "%s.%d: %d bytes at 0x%x in %x\n", | |
1854 | file, blocks, le32_to_cpu(blk->len), offset, type); | |
1855 | ||
1856 | reg = 0; | |
1857 | region_name = "Unknown"; | |
1858 | switch (type) { | |
c712326d MB |
1859 | case (WMFW_NAME_TEXT << 8): |
1860 | case (WMFW_INFO_TEXT << 8): | |
2159ad93 | 1861 | break; |
c712326d | 1862 | case (WMFW_ABSOLUTE << 8): |
f395a218 MB |
1863 | /* |
1864 | * Old files may use this for global | |
1865 | * coefficients. | |
1866 | */ | |
1867 | if (le32_to_cpu(blk->id) == dsp->fw_id && | |
1868 | offset == 0) { | |
1869 | region_name = "global coefficients"; | |
1870 | mem = wm_adsp_find_region(dsp, type); | |
1871 | if (!mem) { | |
1872 | adsp_err(dsp, "No ZM\n"); | |
1873 | break; | |
1874 | } | |
1875 | reg = wm_adsp_region_to_reg(mem, 0); | |
1876 | ||
1877 | } else { | |
1878 | region_name = "register"; | |
1879 | reg = offset; | |
1880 | } | |
2159ad93 | 1881 | break; |
471f4885 MB |
1882 | |
1883 | case WMFW_ADSP1_DM: | |
1884 | case WMFW_ADSP1_ZM: | |
1885 | case WMFW_ADSP2_XM: | |
1886 | case WMFW_ADSP2_YM: | |
1887 | adsp_dbg(dsp, "%s.%d: %d bytes in %x for %x\n", | |
1888 | file, blocks, le32_to_cpu(blk->len), | |
1889 | type, le32_to_cpu(blk->id)); | |
1890 | ||
1891 | mem = wm_adsp_find_region(dsp, type); | |
1892 | if (!mem) { | |
1893 | adsp_err(dsp, "No base for region %x\n", type); | |
1894 | break; | |
1895 | } | |
1896 | ||
14197095 CK |
1897 | alg_region = wm_adsp_find_alg_region(dsp, type, |
1898 | le32_to_cpu(blk->id)); | |
1899 | if (alg_region) { | |
1900 | reg = alg_region->base; | |
1901 | reg = wm_adsp_region_to_reg(mem, reg); | |
1902 | reg += offset; | |
1903 | } else { | |
471f4885 MB |
1904 | adsp_err(dsp, "No %x for algorithm %x\n", |
1905 | type, le32_to_cpu(blk->id)); | |
14197095 | 1906 | } |
471f4885 MB |
1907 | break; |
1908 | ||
2159ad93 | 1909 | default: |
25c62f7e MB |
1910 | adsp_err(dsp, "%s.%d: Unknown region type %x at %d\n", |
1911 | file, blocks, type, pos); | |
2159ad93 MB |
1912 | break; |
1913 | } | |
1914 | ||
1915 | if (reg) { | |
cf17c83c MB |
1916 | buf = wm_adsp_buf_alloc(blk->data, |
1917 | le32_to_cpu(blk->len), | |
1918 | &buf_list); | |
a76fefab MB |
1919 | if (!buf) { |
1920 | adsp_err(dsp, "Out of memory\n"); | |
f4b82812 WY |
1921 | ret = -ENOMEM; |
1922 | goto out_fw; | |
a76fefab MB |
1923 | } |
1924 | ||
20da6d5a MB |
1925 | adsp_dbg(dsp, "%s.%d: Writing %d bytes at %x\n", |
1926 | file, blocks, le32_to_cpu(blk->len), | |
1927 | reg); | |
cf17c83c MB |
1928 | ret = regmap_raw_write_async(regmap, reg, buf->buf, |
1929 | le32_to_cpu(blk->len)); | |
2159ad93 MB |
1930 | if (ret != 0) { |
1931 | adsp_err(dsp, | |
43bc3bf6 DP |
1932 | "%s.%d: Failed to write to %x in %s: %d\n", |
1933 | file, blocks, reg, region_name, ret); | |
2159ad93 MB |
1934 | } |
1935 | } | |
1936 | ||
be951017 | 1937 | pos += (le32_to_cpu(blk->len) + sizeof(*blk) + 3) & ~0x03; |
2159ad93 MB |
1938 | blocks++; |
1939 | } | |
1940 | ||
cf17c83c MB |
1941 | ret = regmap_async_complete(regmap); |
1942 | if (ret != 0) | |
1943 | adsp_err(dsp, "Failed to complete async write: %d\n", ret); | |
1944 | ||
2159ad93 MB |
1945 | if (pos > firmware->size) |
1946 | adsp_warn(dsp, "%s.%d: %zu bytes at end of file\n", | |
1947 | file, blocks, pos - firmware->size); | |
1948 | ||
f9f55e31 RF |
1949 | wm_adsp_debugfs_save_binname(dsp, file); |
1950 | ||
2159ad93 | 1951 | out_fw: |
9da7a5a9 | 1952 | regmap_async_complete(regmap); |
2159ad93 | 1953 | release_firmware(firmware); |
cf17c83c | 1954 | wm_adsp_buf_free(&buf_list); |
2159ad93 MB |
1955 | out: |
1956 | kfree(file); | |
f4b82812 | 1957 | return ret; |
2159ad93 MB |
1958 | } |
1959 | ||
3809f001 | 1960 | int wm_adsp1_init(struct wm_adsp *dsp) |
5e7a7a22 | 1961 | { |
3809f001 | 1962 | INIT_LIST_HEAD(&dsp->alg_regions); |
5e7a7a22 | 1963 | |
078e7183 CK |
1964 | mutex_init(&dsp->pwr_lock); |
1965 | ||
5e7a7a22 MB |
1966 | return 0; |
1967 | } | |
1968 | EXPORT_SYMBOL_GPL(wm_adsp1_init); | |
1969 | ||
2159ad93 MB |
1970 | int wm_adsp1_event(struct snd_soc_dapm_widget *w, |
1971 | struct snd_kcontrol *kcontrol, | |
1972 | int event) | |
1973 | { | |
72718517 | 1974 | struct snd_soc_codec *codec = snd_soc_dapm_to_codec(w->dapm); |
2159ad93 MB |
1975 | struct wm_adsp *dsps = snd_soc_codec_get_drvdata(codec); |
1976 | struct wm_adsp *dsp = &dsps[w->shift]; | |
b0101b4f | 1977 | struct wm_adsp_alg_region *alg_region; |
6ab2b7b4 | 1978 | struct wm_coeff_ctl *ctl; |
2159ad93 | 1979 | int ret; |
7585a5b0 | 1980 | unsigned int val; |
2159ad93 | 1981 | |
00200107 | 1982 | dsp->card = codec->component.card; |
92bb4c32 | 1983 | |
078e7183 CK |
1984 | mutex_lock(&dsp->pwr_lock); |
1985 | ||
2159ad93 MB |
1986 | switch (event) { |
1987 | case SND_SOC_DAPM_POST_PMU: | |
1988 | regmap_update_bits(dsp->regmap, dsp->base + ADSP1_CONTROL_30, | |
1989 | ADSP1_SYS_ENA, ADSP1_SYS_ENA); | |
1990 | ||
94e205bf CR |
1991 | /* |
1992 | * For simplicity set the DSP clock rate to be the | |
1993 | * SYSCLK rate rather than making it configurable. | |
1994 | */ | |
7585a5b0 | 1995 | if (dsp->sysclk_reg) { |
94e205bf CR |
1996 | ret = regmap_read(dsp->regmap, dsp->sysclk_reg, &val); |
1997 | if (ret != 0) { | |
1998 | adsp_err(dsp, "Failed to read SYSCLK state: %d\n", | |
1999 | ret); | |
078e7183 | 2000 | goto err_mutex; |
94e205bf CR |
2001 | } |
2002 | ||
7d00cd97 | 2003 | val = (val & dsp->sysclk_mask) >> dsp->sysclk_shift; |
94e205bf CR |
2004 | |
2005 | ret = regmap_update_bits(dsp->regmap, | |
2006 | dsp->base + ADSP1_CONTROL_31, | |
2007 | ADSP1_CLK_SEL_MASK, val); | |
2008 | if (ret != 0) { | |
2009 | adsp_err(dsp, "Failed to set clock rate: %d\n", | |
2010 | ret); | |
078e7183 | 2011 | goto err_mutex; |
94e205bf CR |
2012 | } |
2013 | } | |
2014 | ||
2159ad93 MB |
2015 | ret = wm_adsp_load(dsp); |
2016 | if (ret != 0) | |
078e7183 | 2017 | goto err_ena; |
2159ad93 | 2018 | |
b618a185 | 2019 | ret = wm_adsp1_setup_algs(dsp); |
db40517c | 2020 | if (ret != 0) |
078e7183 | 2021 | goto err_ena; |
db40517c | 2022 | |
2159ad93 MB |
2023 | ret = wm_adsp_load_coeff(dsp); |
2024 | if (ret != 0) | |
078e7183 | 2025 | goto err_ena; |
2159ad93 | 2026 | |
0c2e3f34 | 2027 | /* Initialize caches for enabled and unset controls */ |
81ad93ec | 2028 | ret = wm_coeff_init_control_caches(dsp); |
6ab2b7b4 | 2029 | if (ret != 0) |
078e7183 | 2030 | goto err_ena; |
6ab2b7b4 | 2031 | |
0c2e3f34 | 2032 | /* Sync set controls */ |
81ad93ec | 2033 | ret = wm_coeff_sync_controls(dsp); |
6ab2b7b4 | 2034 | if (ret != 0) |
078e7183 | 2035 | goto err_ena; |
6ab2b7b4 | 2036 | |
2159ad93 MB |
2037 | /* Start the core running */ |
2038 | regmap_update_bits(dsp->regmap, dsp->base + ADSP1_CONTROL_30, | |
2039 | ADSP1_CORE_ENA | ADSP1_START, | |
2040 | ADSP1_CORE_ENA | ADSP1_START); | |
2041 | break; | |
2042 | ||
2043 | case SND_SOC_DAPM_PRE_PMD: | |
2044 | /* Halt the core */ | |
2045 | regmap_update_bits(dsp->regmap, dsp->base + ADSP1_CONTROL_30, | |
2046 | ADSP1_CORE_ENA | ADSP1_START, 0); | |
2047 | ||
2048 | regmap_update_bits(dsp->regmap, dsp->base + ADSP1_CONTROL_19, | |
2049 | ADSP1_WDMA_BUFFER_LENGTH_MASK, 0); | |
2050 | ||
2051 | regmap_update_bits(dsp->regmap, dsp->base + ADSP1_CONTROL_30, | |
2052 | ADSP1_SYS_ENA, 0); | |
6ab2b7b4 | 2053 | |
81ad93ec | 2054 | list_for_each_entry(ctl, &dsp->ctl_list, list) |
6ab2b7b4 | 2055 | ctl->enabled = 0; |
b0101b4f DP |
2056 | |
2057 | while (!list_empty(&dsp->alg_regions)) { | |
2058 | alg_region = list_first_entry(&dsp->alg_regions, | |
2059 | struct wm_adsp_alg_region, | |
2060 | list); | |
2061 | list_del(&alg_region->list); | |
2062 | kfree(alg_region); | |
2063 | } | |
2159ad93 MB |
2064 | break; |
2065 | ||
2066 | default: | |
2067 | break; | |
2068 | } | |
2069 | ||
078e7183 CK |
2070 | mutex_unlock(&dsp->pwr_lock); |
2071 | ||
2159ad93 MB |
2072 | return 0; |
2073 | ||
078e7183 | 2074 | err_ena: |
2159ad93 MB |
2075 | regmap_update_bits(dsp->regmap, dsp->base + ADSP1_CONTROL_30, |
2076 | ADSP1_SYS_ENA, 0); | |
078e7183 CK |
2077 | err_mutex: |
2078 | mutex_unlock(&dsp->pwr_lock); | |
2079 | ||
2159ad93 MB |
2080 | return ret; |
2081 | } | |
2082 | EXPORT_SYMBOL_GPL(wm_adsp1_event); | |
2083 | ||
2084 | static int wm_adsp2_ena(struct wm_adsp *dsp) | |
2085 | { | |
2086 | unsigned int val; | |
2087 | int ret, count; | |
2088 | ||
1552c325 MB |
2089 | ret = regmap_update_bits_async(dsp->regmap, dsp->base + ADSP2_CONTROL, |
2090 | ADSP2_SYS_ENA, ADSP2_SYS_ENA); | |
2159ad93 MB |
2091 | if (ret != 0) |
2092 | return ret; | |
2093 | ||
2094 | /* Wait for the RAM to start, should be near instantaneous */ | |
939fd1e8 | 2095 | for (count = 0; count < 10; ++count) { |
7d00cd97 | 2096 | ret = regmap_read(dsp->regmap, dsp->base + ADSP2_STATUS1, &val); |
2159ad93 MB |
2097 | if (ret != 0) |
2098 | return ret; | |
939fd1e8 CK |
2099 | |
2100 | if (val & ADSP2_RAM_RDY) | |
2101 | break; | |
2102 | ||
2103 | msleep(1); | |
2104 | } | |
2159ad93 MB |
2105 | |
2106 | if (!(val & ADSP2_RAM_RDY)) { | |
2107 | adsp_err(dsp, "Failed to start DSP RAM\n"); | |
2108 | return -EBUSY; | |
2109 | } | |
2110 | ||
2111 | adsp_dbg(dsp, "RAM ready after %d polls\n", count); | |
2159ad93 MB |
2112 | |
2113 | return 0; | |
2114 | } | |
2115 | ||
18b1a902 | 2116 | static void wm_adsp2_boot_work(struct work_struct *work) |
2159ad93 | 2117 | { |
d8a64d6a CK |
2118 | struct wm_adsp *dsp = container_of(work, |
2119 | struct wm_adsp, | |
2120 | boot_work); | |
2159ad93 | 2121 | int ret; |
d8a64d6a | 2122 | unsigned int val; |
2159ad93 | 2123 | |
078e7183 CK |
2124 | mutex_lock(&dsp->pwr_lock); |
2125 | ||
d8a64d6a CK |
2126 | /* |
2127 | * For simplicity set the DSP clock rate to be the | |
2128 | * SYSCLK rate rather than making it configurable. | |
2129 | */ | |
2130 | ret = regmap_read(dsp->regmap, ARIZONA_SYSTEM_CLOCK_1, &val); | |
2131 | if (ret != 0) { | |
2132 | adsp_err(dsp, "Failed to read SYSCLK state: %d\n", ret); | |
078e7183 | 2133 | goto err_mutex; |
d8a64d6a CK |
2134 | } |
2135 | val = (val & ARIZONA_SYSCLK_FREQ_MASK) | |
2136 | >> ARIZONA_SYSCLK_FREQ_SHIFT; | |
92bb4c32 | 2137 | |
d8a64d6a CK |
2138 | ret = regmap_update_bits_async(dsp->regmap, |
2139 | dsp->base + ADSP2_CLOCKING, | |
2140 | ADSP2_CLK_SEL_MASK, val); | |
2141 | if (ret != 0) { | |
2142 | adsp_err(dsp, "Failed to set clock rate: %d\n", ret); | |
078e7183 | 2143 | goto err_mutex; |
d8a64d6a | 2144 | } |
dd49e2c8 | 2145 | |
d8a64d6a CK |
2146 | ret = wm_adsp2_ena(dsp); |
2147 | if (ret != 0) | |
078e7183 | 2148 | goto err_mutex; |
2159ad93 | 2149 | |
d8a64d6a CK |
2150 | ret = wm_adsp_load(dsp); |
2151 | if (ret != 0) | |
078e7183 | 2152 | goto err_ena; |
2159ad93 | 2153 | |
b618a185 | 2154 | ret = wm_adsp2_setup_algs(dsp); |
d8a64d6a | 2155 | if (ret != 0) |
078e7183 | 2156 | goto err_ena; |
db40517c | 2157 | |
d8a64d6a CK |
2158 | ret = wm_adsp_load_coeff(dsp); |
2159 | if (ret != 0) | |
078e7183 | 2160 | goto err_ena; |
2159ad93 | 2161 | |
d8a64d6a CK |
2162 | /* Initialize caches for enabled and unset controls */ |
2163 | ret = wm_coeff_init_control_caches(dsp); | |
2164 | if (ret != 0) | |
078e7183 | 2165 | goto err_ena; |
6ab2b7b4 | 2166 | |
d8a64d6a CK |
2167 | /* Sync set controls */ |
2168 | ret = wm_coeff_sync_controls(dsp); | |
2169 | if (ret != 0) | |
078e7183 | 2170 | goto err_ena; |
d8a64d6a | 2171 | |
d8a64d6a CK |
2172 | dsp->running = true; |
2173 | ||
078e7183 CK |
2174 | mutex_unlock(&dsp->pwr_lock); |
2175 | ||
d8a64d6a | 2176 | return; |
6ab2b7b4 | 2177 | |
078e7183 | 2178 | err_ena: |
d8a64d6a CK |
2179 | regmap_update_bits(dsp->regmap, dsp->base + ADSP2_CONTROL, |
2180 | ADSP2_SYS_ENA | ADSP2_CORE_ENA | ADSP2_START, 0); | |
078e7183 CK |
2181 | err_mutex: |
2182 | mutex_unlock(&dsp->pwr_lock); | |
d8a64d6a CK |
2183 | } |
2184 | ||
12db5edd CK |
2185 | int wm_adsp2_early_event(struct snd_soc_dapm_widget *w, |
2186 | struct snd_kcontrol *kcontrol, int event) | |
2187 | { | |
72718517 | 2188 | struct snd_soc_codec *codec = snd_soc_dapm_to_codec(w->dapm); |
12db5edd CK |
2189 | struct wm_adsp *dsps = snd_soc_codec_get_drvdata(codec); |
2190 | struct wm_adsp *dsp = &dsps[w->shift]; | |
2191 | ||
00200107 | 2192 | dsp->card = codec->component.card; |
12db5edd CK |
2193 | |
2194 | switch (event) { | |
2195 | case SND_SOC_DAPM_PRE_PMU: | |
2196 | queue_work(system_unbound_wq, &dsp->boot_work); | |
2197 | break; | |
2198 | default: | |
2199 | break; | |
cab27258 | 2200 | } |
12db5edd CK |
2201 | |
2202 | return 0; | |
2203 | } | |
2204 | EXPORT_SYMBOL_GPL(wm_adsp2_early_event); | |
2205 | ||
d8a64d6a CK |
2206 | int wm_adsp2_event(struct snd_soc_dapm_widget *w, |
2207 | struct snd_kcontrol *kcontrol, int event) | |
2208 | { | |
72718517 | 2209 | struct snd_soc_codec *codec = snd_soc_dapm_to_codec(w->dapm); |
d8a64d6a CK |
2210 | struct wm_adsp *dsps = snd_soc_codec_get_drvdata(codec); |
2211 | struct wm_adsp *dsp = &dsps[w->shift]; | |
2212 | struct wm_adsp_alg_region *alg_region; | |
2213 | struct wm_coeff_ctl *ctl; | |
2214 | int ret; | |
2215 | ||
d8a64d6a CK |
2216 | switch (event) { |
2217 | case SND_SOC_DAPM_POST_PMU: | |
d8a64d6a CK |
2218 | flush_work(&dsp->boot_work); |
2219 | ||
2220 | if (!dsp->running) | |
2221 | return -EIO; | |
6ab2b7b4 | 2222 | |
d8a64d6a CK |
2223 | ret = regmap_update_bits(dsp->regmap, |
2224 | dsp->base + ADSP2_CONTROL, | |
00e4c3b6 CK |
2225 | ADSP2_CORE_ENA | ADSP2_START, |
2226 | ADSP2_CORE_ENA | ADSP2_START); | |
2159ad93 MB |
2227 | if (ret != 0) |
2228 | goto err; | |
2cd19bdb CK |
2229 | |
2230 | if (wm_adsp_fw[dsp->fw].num_caps != 0) | |
2231 | ret = wm_adsp_buffer_init(dsp); | |
2232 | ||
2159ad93 MB |
2233 | break; |
2234 | ||
2235 | case SND_SOC_DAPM_PRE_PMD: | |
10337b07 RF |
2236 | /* Log firmware state, it can be useful for analysis */ |
2237 | wm_adsp2_show_fw_status(dsp); | |
2238 | ||
078e7183 CK |
2239 | mutex_lock(&dsp->pwr_lock); |
2240 | ||
f9f55e31 RF |
2241 | wm_adsp_debugfs_clear(dsp); |
2242 | ||
2243 | dsp->fw_id = 0; | |
2244 | dsp->fw_id_version = 0; | |
1023dbd9 MB |
2245 | dsp->running = false; |
2246 | ||
2159ad93 | 2247 | regmap_update_bits(dsp->regmap, dsp->base + ADSP2_CONTROL, |
a7f9be7e MB |
2248 | ADSP2_SYS_ENA | ADSP2_CORE_ENA | |
2249 | ADSP2_START, 0); | |
973838a0 | 2250 | |
2d30b575 MB |
2251 | /* Make sure DMAs are quiesced */ |
2252 | regmap_write(dsp->regmap, dsp->base + ADSP2_WDMA_CONFIG_1, 0); | |
2253 | regmap_write(dsp->regmap, dsp->base + ADSP2_WDMA_CONFIG_2, 0); | |
2254 | regmap_write(dsp->regmap, dsp->base + ADSP2_RDMA_CONFIG_1, 0); | |
2255 | ||
81ad93ec | 2256 | list_for_each_entry(ctl, &dsp->ctl_list, list) |
6ab2b7b4 | 2257 | ctl->enabled = 0; |
6ab2b7b4 | 2258 | |
471f4885 MB |
2259 | while (!list_empty(&dsp->alg_regions)) { |
2260 | alg_region = list_first_entry(&dsp->alg_regions, | |
2261 | struct wm_adsp_alg_region, | |
2262 | list); | |
2263 | list_del(&alg_region->list); | |
2264 | kfree(alg_region); | |
2265 | } | |
ddbc5efe | 2266 | |
2cd19bdb CK |
2267 | if (wm_adsp_fw[dsp->fw].num_caps != 0) |
2268 | wm_adsp_buffer_free(dsp); | |
2269 | ||
078e7183 CK |
2270 | mutex_unlock(&dsp->pwr_lock); |
2271 | ||
ddbc5efe | 2272 | adsp_dbg(dsp, "Shutdown complete\n"); |
2159ad93 MB |
2273 | break; |
2274 | ||
2275 | default: | |
2276 | break; | |
2277 | } | |
2278 | ||
2279 | return 0; | |
2280 | err: | |
2281 | regmap_update_bits(dsp->regmap, dsp->base + ADSP2_CONTROL, | |
a7f9be7e | 2282 | ADSP2_SYS_ENA | ADSP2_CORE_ENA | ADSP2_START, 0); |
2159ad93 MB |
2283 | return ret; |
2284 | } | |
2285 | EXPORT_SYMBOL_GPL(wm_adsp2_event); | |
973838a0 | 2286 | |
f5e2ce92 RF |
2287 | int wm_adsp2_codec_probe(struct wm_adsp *dsp, struct snd_soc_codec *codec) |
2288 | { | |
f9f55e31 RF |
2289 | wm_adsp2_init_debugfs(dsp, codec); |
2290 | ||
218e5087 | 2291 | return snd_soc_add_codec_controls(codec, |
336d0442 RF |
2292 | &wm_adsp_fw_controls[dsp->num - 1], |
2293 | 1); | |
f5e2ce92 RF |
2294 | } |
2295 | EXPORT_SYMBOL_GPL(wm_adsp2_codec_probe); | |
2296 | ||
2297 | int wm_adsp2_codec_remove(struct wm_adsp *dsp, struct snd_soc_codec *codec) | |
2298 | { | |
f9f55e31 RF |
2299 | wm_adsp2_cleanup_debugfs(dsp); |
2300 | ||
f5e2ce92 RF |
2301 | return 0; |
2302 | } | |
2303 | EXPORT_SYMBOL_GPL(wm_adsp2_codec_remove); | |
2304 | ||
81ac58b1 | 2305 | int wm_adsp2_init(struct wm_adsp *dsp) |
973838a0 MB |
2306 | { |
2307 | int ret; | |
2308 | ||
10a2b662 MB |
2309 | /* |
2310 | * Disable the DSP memory by default when in reset for a small | |
2311 | * power saving. | |
2312 | */ | |
3809f001 | 2313 | ret = regmap_update_bits(dsp->regmap, dsp->base + ADSP2_CONTROL, |
10a2b662 MB |
2314 | ADSP2_MEM_ENA, 0); |
2315 | if (ret != 0) { | |
3809f001 | 2316 | adsp_err(dsp, "Failed to clear memory retention: %d\n", ret); |
10a2b662 MB |
2317 | return ret; |
2318 | } | |
2319 | ||
3809f001 CK |
2320 | INIT_LIST_HEAD(&dsp->alg_regions); |
2321 | INIT_LIST_HEAD(&dsp->ctl_list); | |
2322 | INIT_WORK(&dsp->boot_work, wm_adsp2_boot_work); | |
6ab2b7b4 | 2323 | |
078e7183 CK |
2324 | mutex_init(&dsp->pwr_lock); |
2325 | ||
973838a0 MB |
2326 | return 0; |
2327 | } | |
2328 | EXPORT_SYMBOL_GPL(wm_adsp2_init); | |
0a37c6ef | 2329 | |
406abc95 CK |
2330 | int wm_adsp_compr_open(struct wm_adsp *dsp, struct snd_compr_stream *stream) |
2331 | { | |
2332 | struct wm_adsp_compr *compr; | |
2333 | int ret = 0; | |
2334 | ||
2335 | mutex_lock(&dsp->pwr_lock); | |
2336 | ||
2337 | if (wm_adsp_fw[dsp->fw].num_caps == 0) { | |
2338 | adsp_err(dsp, "Firmware does not support compressed API\n"); | |
2339 | ret = -ENXIO; | |
2340 | goto out; | |
2341 | } | |
2342 | ||
2343 | if (wm_adsp_fw[dsp->fw].compr_direction != stream->direction) { | |
2344 | adsp_err(dsp, "Firmware does not support stream direction\n"); | |
2345 | ret = -EINVAL; | |
2346 | goto out; | |
2347 | } | |
2348 | ||
95fe9597 CK |
2349 | if (dsp->compr) { |
2350 | /* It is expect this limitation will be removed in future */ | |
2351 | adsp_err(dsp, "Only a single stream supported per DSP\n"); | |
2352 | ret = -EBUSY; | |
2353 | goto out; | |
2354 | } | |
2355 | ||
406abc95 CK |
2356 | compr = kzalloc(sizeof(*compr), GFP_KERNEL); |
2357 | if (!compr) { | |
2358 | ret = -ENOMEM; | |
2359 | goto out; | |
2360 | } | |
2361 | ||
2362 | compr->dsp = dsp; | |
2363 | compr->stream = stream; | |
2364 | ||
2365 | dsp->compr = compr; | |
2366 | ||
2367 | stream->runtime->private_data = compr; | |
2368 | ||
2369 | out: | |
2370 | mutex_unlock(&dsp->pwr_lock); | |
2371 | ||
2372 | return ret; | |
2373 | } | |
2374 | EXPORT_SYMBOL_GPL(wm_adsp_compr_open); | |
2375 | ||
2376 | int wm_adsp_compr_free(struct snd_compr_stream *stream) | |
2377 | { | |
2378 | struct wm_adsp_compr *compr = stream->runtime->private_data; | |
2379 | struct wm_adsp *dsp = compr->dsp; | |
2380 | ||
2381 | mutex_lock(&dsp->pwr_lock); | |
2382 | ||
2383 | dsp->compr = NULL; | |
2384 | ||
83a40ce9 | 2385 | kfree(compr->raw_buf); |
406abc95 CK |
2386 | kfree(compr); |
2387 | ||
2388 | mutex_unlock(&dsp->pwr_lock); | |
2389 | ||
2390 | return 0; | |
2391 | } | |
2392 | EXPORT_SYMBOL_GPL(wm_adsp_compr_free); | |
2393 | ||
2394 | static int wm_adsp_compr_check_params(struct snd_compr_stream *stream, | |
2395 | struct snd_compr_params *params) | |
2396 | { | |
2397 | struct wm_adsp_compr *compr = stream->runtime->private_data; | |
2398 | struct wm_adsp *dsp = compr->dsp; | |
2399 | const struct wm_adsp_fw_caps *caps; | |
2400 | const struct snd_codec_desc *desc; | |
2401 | int i, j; | |
2402 | ||
2403 | if (params->buffer.fragment_size < WM_ADSP_MIN_FRAGMENT_SIZE || | |
2404 | params->buffer.fragment_size > WM_ADSP_MAX_FRAGMENT_SIZE || | |
2405 | params->buffer.fragments < WM_ADSP_MIN_FRAGMENTS || | |
2406 | params->buffer.fragments > WM_ADSP_MAX_FRAGMENTS || | |
2407 | params->buffer.fragment_size % WM_ADSP_DATA_WORD_SIZE) { | |
2408 | adsp_err(dsp, "Invalid buffer fragsize=%d fragments=%d\n", | |
2409 | params->buffer.fragment_size, | |
2410 | params->buffer.fragments); | |
2411 | ||
2412 | return -EINVAL; | |
2413 | } | |
2414 | ||
2415 | for (i = 0; i < wm_adsp_fw[dsp->fw].num_caps; i++) { | |
2416 | caps = &wm_adsp_fw[dsp->fw].caps[i]; | |
2417 | desc = &caps->desc; | |
2418 | ||
2419 | if (caps->id != params->codec.id) | |
2420 | continue; | |
2421 | ||
2422 | if (stream->direction == SND_COMPRESS_PLAYBACK) { | |
2423 | if (desc->max_ch < params->codec.ch_out) | |
2424 | continue; | |
2425 | } else { | |
2426 | if (desc->max_ch < params->codec.ch_in) | |
2427 | continue; | |
2428 | } | |
2429 | ||
2430 | if (!(desc->formats & (1 << params->codec.format))) | |
2431 | continue; | |
2432 | ||
2433 | for (j = 0; j < desc->num_sample_rates; ++j) | |
2434 | if (desc->sample_rates[j] == params->codec.sample_rate) | |
2435 | return 0; | |
2436 | } | |
2437 | ||
2438 | adsp_err(dsp, "Invalid params id=%u ch=%u,%u rate=%u fmt=%u\n", | |
2439 | params->codec.id, params->codec.ch_in, params->codec.ch_out, | |
2440 | params->codec.sample_rate, params->codec.format); | |
2441 | return -EINVAL; | |
2442 | } | |
2443 | ||
565ace46 CK |
2444 | static inline unsigned int wm_adsp_compr_frag_words(struct wm_adsp_compr *compr) |
2445 | { | |
2446 | return compr->size.fragment_size / WM_ADSP_DATA_WORD_SIZE; | |
2447 | } | |
2448 | ||
406abc95 CK |
2449 | int wm_adsp_compr_set_params(struct snd_compr_stream *stream, |
2450 | struct snd_compr_params *params) | |
2451 | { | |
2452 | struct wm_adsp_compr *compr = stream->runtime->private_data; | |
83a40ce9 | 2453 | unsigned int size; |
406abc95 CK |
2454 | int ret; |
2455 | ||
2456 | ret = wm_adsp_compr_check_params(stream, params); | |
2457 | if (ret) | |
2458 | return ret; | |
2459 | ||
2460 | compr->size = params->buffer; | |
2461 | ||
2462 | adsp_dbg(compr->dsp, "fragment_size=%d fragments=%d\n", | |
2463 | compr->size.fragment_size, compr->size.fragments); | |
2464 | ||
83a40ce9 CK |
2465 | size = wm_adsp_compr_frag_words(compr) * sizeof(*compr->raw_buf); |
2466 | compr->raw_buf = kmalloc(size, GFP_DMA | GFP_KERNEL); | |
2467 | if (!compr->raw_buf) | |
2468 | return -ENOMEM; | |
2469 | ||
da2b3358 CK |
2470 | compr->sample_rate = params->codec.sample_rate; |
2471 | ||
406abc95 CK |
2472 | return 0; |
2473 | } | |
2474 | EXPORT_SYMBOL_GPL(wm_adsp_compr_set_params); | |
2475 | ||
2476 | int wm_adsp_compr_get_caps(struct snd_compr_stream *stream, | |
2477 | struct snd_compr_caps *caps) | |
2478 | { | |
2479 | struct wm_adsp_compr *compr = stream->runtime->private_data; | |
2480 | int fw = compr->dsp->fw; | |
2481 | int i; | |
2482 | ||
2483 | if (wm_adsp_fw[fw].caps) { | |
2484 | for (i = 0; i < wm_adsp_fw[fw].num_caps; i++) | |
2485 | caps->codecs[i] = wm_adsp_fw[fw].caps[i].id; | |
2486 | ||
2487 | caps->num_codecs = i; | |
2488 | caps->direction = wm_adsp_fw[fw].compr_direction; | |
2489 | ||
2490 | caps->min_fragment_size = WM_ADSP_MIN_FRAGMENT_SIZE; | |
2491 | caps->max_fragment_size = WM_ADSP_MAX_FRAGMENT_SIZE; | |
2492 | caps->min_fragments = WM_ADSP_MIN_FRAGMENTS; | |
2493 | caps->max_fragments = WM_ADSP_MAX_FRAGMENTS; | |
2494 | } | |
2495 | ||
2496 | return 0; | |
2497 | } | |
2498 | EXPORT_SYMBOL_GPL(wm_adsp_compr_get_caps); | |
2499 | ||
2cd19bdb CK |
2500 | static int wm_adsp_read_data_block(struct wm_adsp *dsp, int mem_type, |
2501 | unsigned int mem_addr, | |
2502 | unsigned int num_words, u32 *data) | |
2503 | { | |
2504 | struct wm_adsp_region const *mem = wm_adsp_find_region(dsp, mem_type); | |
2505 | unsigned int i, reg; | |
2506 | int ret; | |
2507 | ||
2508 | if (!mem) | |
2509 | return -EINVAL; | |
2510 | ||
2511 | reg = wm_adsp_region_to_reg(mem, mem_addr); | |
2512 | ||
2513 | ret = regmap_raw_read(dsp->regmap, reg, data, | |
2514 | sizeof(*data) * num_words); | |
2515 | if (ret < 0) | |
2516 | return ret; | |
2517 | ||
2518 | for (i = 0; i < num_words; ++i) | |
2519 | data[i] = be32_to_cpu(data[i]) & 0x00ffffffu; | |
2520 | ||
2521 | return 0; | |
2522 | } | |
2523 | ||
2524 | static inline int wm_adsp_read_data_word(struct wm_adsp *dsp, int mem_type, | |
2525 | unsigned int mem_addr, u32 *data) | |
2526 | { | |
2527 | return wm_adsp_read_data_block(dsp, mem_type, mem_addr, 1, data); | |
2528 | } | |
2529 | ||
2530 | static int wm_adsp_write_data_word(struct wm_adsp *dsp, int mem_type, | |
2531 | unsigned int mem_addr, u32 data) | |
2532 | { | |
2533 | struct wm_adsp_region const *mem = wm_adsp_find_region(dsp, mem_type); | |
2534 | unsigned int reg; | |
2535 | ||
2536 | if (!mem) | |
2537 | return -EINVAL; | |
2538 | ||
2539 | reg = wm_adsp_region_to_reg(mem, mem_addr); | |
2540 | ||
2541 | data = cpu_to_be32(data & 0x00ffffffu); | |
2542 | ||
2543 | return regmap_raw_write(dsp->regmap, reg, &data, sizeof(data)); | |
2544 | } | |
2545 | ||
2546 | static inline int wm_adsp_buffer_read(struct wm_adsp_compr_buf *buf, | |
2547 | unsigned int field_offset, u32 *data) | |
2548 | { | |
2549 | return wm_adsp_read_data_word(buf->dsp, WMFW_ADSP2_XM, | |
2550 | buf->host_buf_ptr + field_offset, data); | |
2551 | } | |
2552 | ||
2553 | static inline int wm_adsp_buffer_write(struct wm_adsp_compr_buf *buf, | |
2554 | unsigned int field_offset, u32 data) | |
2555 | { | |
2556 | return wm_adsp_write_data_word(buf->dsp, WMFW_ADSP2_XM, | |
2557 | buf->host_buf_ptr + field_offset, data); | |
2558 | } | |
2559 | ||
2560 | static int wm_adsp_buffer_locate(struct wm_adsp_compr_buf *buf) | |
2561 | { | |
2562 | struct wm_adsp_alg_region *alg_region; | |
2563 | struct wm_adsp *dsp = buf->dsp; | |
2564 | u32 xmalg, addr, magic; | |
2565 | int i, ret; | |
2566 | ||
2567 | alg_region = wm_adsp_find_alg_region(dsp, WMFW_ADSP2_XM, dsp->fw_id); | |
2568 | xmalg = sizeof(struct wm_adsp_system_config_xm_hdr) / sizeof(__be32); | |
2569 | ||
2570 | addr = alg_region->base + xmalg + ALG_XM_FIELD(magic); | |
2571 | ret = wm_adsp_read_data_word(dsp, WMFW_ADSP2_XM, addr, &magic); | |
2572 | if (ret < 0) | |
2573 | return ret; | |
2574 | ||
2575 | if (magic != WM_ADSP_ALG_XM_STRUCT_MAGIC) | |
2576 | return -EINVAL; | |
2577 | ||
2578 | addr = alg_region->base + xmalg + ALG_XM_FIELD(host_buf_ptr); | |
2579 | for (i = 0; i < 5; ++i) { | |
2580 | ret = wm_adsp_read_data_word(dsp, WMFW_ADSP2_XM, addr, | |
2581 | &buf->host_buf_ptr); | |
2582 | if (ret < 0) | |
2583 | return ret; | |
2584 | ||
2585 | if (buf->host_buf_ptr) | |
2586 | break; | |
2587 | ||
2588 | usleep_range(1000, 2000); | |
2589 | } | |
2590 | ||
2591 | if (!buf->host_buf_ptr) | |
2592 | return -EIO; | |
2593 | ||
2594 | adsp_dbg(dsp, "host_buf_ptr=%x\n", buf->host_buf_ptr); | |
2595 | ||
2596 | return 0; | |
2597 | } | |
2598 | ||
2599 | static int wm_adsp_buffer_populate(struct wm_adsp_compr_buf *buf) | |
2600 | { | |
2601 | const struct wm_adsp_fw_caps *caps = wm_adsp_fw[buf->dsp->fw].caps; | |
2602 | struct wm_adsp_buffer_region *region; | |
2603 | u32 offset = 0; | |
2604 | int i, ret; | |
2605 | ||
2606 | for (i = 0; i < caps->num_regions; ++i) { | |
2607 | region = &buf->regions[i]; | |
2608 | ||
2609 | region->offset = offset; | |
2610 | region->mem_type = caps->region_defs[i].mem_type; | |
2611 | ||
2612 | ret = wm_adsp_buffer_read(buf, caps->region_defs[i].base_offset, | |
2613 | ®ion->base_addr); | |
2614 | if (ret < 0) | |
2615 | return ret; | |
2616 | ||
2617 | ret = wm_adsp_buffer_read(buf, caps->region_defs[i].size_offset, | |
2618 | &offset); | |
2619 | if (ret < 0) | |
2620 | return ret; | |
2621 | ||
2622 | region->cumulative_size = offset; | |
2623 | ||
2624 | adsp_dbg(buf->dsp, | |
2625 | "region=%d type=%d base=%04x off=%04x size=%04x\n", | |
2626 | i, region->mem_type, region->base_addr, | |
2627 | region->offset, region->cumulative_size); | |
2628 | } | |
2629 | ||
2630 | return 0; | |
2631 | } | |
2632 | ||
2633 | static int wm_adsp_buffer_init(struct wm_adsp *dsp) | |
2634 | { | |
2635 | struct wm_adsp_compr_buf *buf; | |
2636 | int ret; | |
2637 | ||
2638 | buf = kzalloc(sizeof(*buf), GFP_KERNEL); | |
2639 | if (!buf) | |
2640 | return -ENOMEM; | |
2641 | ||
2642 | buf->dsp = dsp; | |
565ace46 CK |
2643 | buf->read_index = -1; |
2644 | buf->irq_count = 0xFFFFFFFF; | |
2cd19bdb CK |
2645 | |
2646 | ret = wm_adsp_buffer_locate(buf); | |
2647 | if (ret < 0) { | |
2648 | adsp_err(dsp, "Failed to acquire host buffer: %d\n", ret); | |
2649 | goto err_buffer; | |
2650 | } | |
2651 | ||
2652 | buf->regions = kcalloc(wm_adsp_fw[dsp->fw].caps->num_regions, | |
2653 | sizeof(*buf->regions), GFP_KERNEL); | |
2654 | if (!buf->regions) { | |
2655 | ret = -ENOMEM; | |
2656 | goto err_buffer; | |
2657 | } | |
2658 | ||
2659 | ret = wm_adsp_buffer_populate(buf); | |
2660 | if (ret < 0) { | |
2661 | adsp_err(dsp, "Failed to populate host buffer: %d\n", ret); | |
2662 | goto err_regions; | |
2663 | } | |
2664 | ||
2665 | dsp->buffer = buf; | |
2666 | ||
2667 | return 0; | |
2668 | ||
2669 | err_regions: | |
2670 | kfree(buf->regions); | |
2671 | err_buffer: | |
2672 | kfree(buf); | |
2673 | return ret; | |
2674 | } | |
2675 | ||
2676 | static int wm_adsp_buffer_free(struct wm_adsp *dsp) | |
2677 | { | |
2678 | if (dsp->buffer) { | |
2679 | kfree(dsp->buffer->regions); | |
2680 | kfree(dsp->buffer); | |
2681 | ||
2682 | dsp->buffer = NULL; | |
2683 | } | |
2684 | ||
2685 | return 0; | |
2686 | } | |
2687 | ||
95fe9597 CK |
2688 | static inline int wm_adsp_compr_attached(struct wm_adsp_compr *compr) |
2689 | { | |
2690 | return compr->buf != NULL; | |
2691 | } | |
2692 | ||
2693 | static int wm_adsp_compr_attach(struct wm_adsp_compr *compr) | |
2694 | { | |
2695 | /* | |
2696 | * Note this will be more complex once each DSP can support multiple | |
2697 | * streams | |
2698 | */ | |
2699 | if (!compr->dsp->buffer) | |
2700 | return -EINVAL; | |
2701 | ||
2702 | compr->buf = compr->dsp->buffer; | |
2703 | ||
2704 | return 0; | |
2705 | } | |
2706 | ||
2707 | int wm_adsp_compr_trigger(struct snd_compr_stream *stream, int cmd) | |
2708 | { | |
2709 | struct wm_adsp_compr *compr = stream->runtime->private_data; | |
2710 | struct wm_adsp *dsp = compr->dsp; | |
2711 | int ret = 0; | |
2712 | ||
2713 | adsp_dbg(dsp, "Trigger: %d\n", cmd); | |
2714 | ||
2715 | mutex_lock(&dsp->pwr_lock); | |
2716 | ||
2717 | switch (cmd) { | |
2718 | case SNDRV_PCM_TRIGGER_START: | |
2719 | if (wm_adsp_compr_attached(compr)) | |
2720 | break; | |
2721 | ||
2722 | ret = wm_adsp_compr_attach(compr); | |
2723 | if (ret < 0) { | |
2724 | adsp_err(dsp, "Failed to link buffer and stream: %d\n", | |
2725 | ret); | |
2726 | break; | |
2727 | } | |
565ace46 CK |
2728 | |
2729 | /* Trigger the IRQ at one fragment of data */ | |
2730 | ret = wm_adsp_buffer_write(compr->buf, | |
2731 | HOST_BUFFER_FIELD(high_water_mark), | |
2732 | wm_adsp_compr_frag_words(compr)); | |
2733 | if (ret < 0) { | |
2734 | adsp_err(dsp, "Failed to set high water mark: %d\n", | |
2735 | ret); | |
2736 | break; | |
2737 | } | |
95fe9597 CK |
2738 | break; |
2739 | case SNDRV_PCM_TRIGGER_STOP: | |
2740 | break; | |
2741 | default: | |
2742 | ret = -EINVAL; | |
2743 | break; | |
2744 | } | |
2745 | ||
2746 | mutex_unlock(&dsp->pwr_lock); | |
2747 | ||
2748 | return ret; | |
2749 | } | |
2750 | EXPORT_SYMBOL_GPL(wm_adsp_compr_trigger); | |
2751 | ||
565ace46 CK |
2752 | static inline int wm_adsp_buffer_size(struct wm_adsp_compr_buf *buf) |
2753 | { | |
2754 | int last_region = wm_adsp_fw[buf->dsp->fw].caps->num_regions - 1; | |
2755 | ||
2756 | return buf->regions[last_region].cumulative_size; | |
2757 | } | |
2758 | ||
2759 | static int wm_adsp_buffer_update_avail(struct wm_adsp_compr_buf *buf) | |
2760 | { | |
2761 | u32 next_read_index, next_write_index; | |
2762 | int write_index, read_index, avail; | |
2763 | int ret; | |
2764 | ||
2765 | /* Only sync read index if we haven't already read a valid index */ | |
2766 | if (buf->read_index < 0) { | |
2767 | ret = wm_adsp_buffer_read(buf, | |
2768 | HOST_BUFFER_FIELD(next_read_index), | |
2769 | &next_read_index); | |
2770 | if (ret < 0) | |
2771 | return ret; | |
2772 | ||
2773 | read_index = sign_extend32(next_read_index, 23); | |
2774 | ||
2775 | if (read_index < 0) { | |
2776 | adsp_dbg(buf->dsp, "Avail check on unstarted stream\n"); | |
2777 | return 0; | |
2778 | } | |
2779 | ||
2780 | buf->read_index = read_index; | |
2781 | } | |
2782 | ||
2783 | ret = wm_adsp_buffer_read(buf, HOST_BUFFER_FIELD(next_write_index), | |
2784 | &next_write_index); | |
2785 | if (ret < 0) | |
2786 | return ret; | |
2787 | ||
2788 | write_index = sign_extend32(next_write_index, 23); | |
2789 | ||
2790 | avail = write_index - buf->read_index; | |
2791 | if (avail < 0) | |
2792 | avail += wm_adsp_buffer_size(buf); | |
2793 | ||
2794 | adsp_dbg(buf->dsp, "readindex=0x%x, writeindex=0x%x, avail=%d\n", | |
2795 | buf->read_index, write_index, avail); | |
2796 | ||
2797 | buf->avail = avail; | |
2798 | ||
2799 | return 0; | |
2800 | } | |
2801 | ||
2802 | int wm_adsp_compr_handle_irq(struct wm_adsp *dsp) | |
2803 | { | |
2804 | struct wm_adsp_compr_buf *buf = dsp->buffer; | |
83a40ce9 | 2805 | struct wm_adsp_compr *compr = dsp->compr; |
565ace46 CK |
2806 | int ret = 0; |
2807 | ||
2808 | mutex_lock(&dsp->pwr_lock); | |
2809 | ||
2810 | if (!buf) { | |
2811 | adsp_err(dsp, "Spurious buffer IRQ\n"); | |
2812 | ret = -ENODEV; | |
2813 | goto out; | |
2814 | } | |
2815 | ||
2816 | adsp_dbg(dsp, "Handling buffer IRQ\n"); | |
2817 | ||
2818 | ret = wm_adsp_buffer_read(buf, HOST_BUFFER_FIELD(error), &buf->error); | |
2819 | if (ret < 0) { | |
2820 | adsp_err(dsp, "Failed to check buffer error: %d\n", ret); | |
2821 | goto out; | |
2822 | } | |
2823 | if (buf->error != 0) { | |
2824 | adsp_err(dsp, "Buffer error occurred: %d\n", buf->error); | |
2825 | ret = -EIO; | |
2826 | goto out; | |
2827 | } | |
2828 | ||
2829 | ret = wm_adsp_buffer_read(buf, HOST_BUFFER_FIELD(irq_count), | |
2830 | &buf->irq_count); | |
2831 | if (ret < 0) { | |
2832 | adsp_err(dsp, "Failed to get irq_count: %d\n", ret); | |
2833 | goto out; | |
2834 | } | |
2835 | ||
2836 | ret = wm_adsp_buffer_update_avail(buf); | |
2837 | if (ret < 0) { | |
2838 | adsp_err(dsp, "Error reading avail: %d\n", ret); | |
2839 | goto out; | |
2840 | } | |
2841 | ||
c7dae7c4 | 2842 | if (compr && compr->stream) |
83a40ce9 CK |
2843 | snd_compr_fragment_elapsed(compr->stream); |
2844 | ||
565ace46 CK |
2845 | out: |
2846 | mutex_unlock(&dsp->pwr_lock); | |
2847 | ||
2848 | return ret; | |
2849 | } | |
2850 | EXPORT_SYMBOL_GPL(wm_adsp_compr_handle_irq); | |
2851 | ||
2852 | static int wm_adsp_buffer_reenable_irq(struct wm_adsp_compr_buf *buf) | |
2853 | { | |
2854 | if (buf->irq_count & 0x01) | |
2855 | return 0; | |
2856 | ||
2857 | adsp_dbg(buf->dsp, "Enable IRQ(0x%x) for next fragment\n", | |
2858 | buf->irq_count); | |
2859 | ||
2860 | buf->irq_count |= 0x01; | |
2861 | ||
2862 | return wm_adsp_buffer_write(buf, HOST_BUFFER_FIELD(irq_ack), | |
2863 | buf->irq_count); | |
2864 | } | |
2865 | ||
2866 | int wm_adsp_compr_pointer(struct snd_compr_stream *stream, | |
2867 | struct snd_compr_tstamp *tstamp) | |
2868 | { | |
2869 | struct wm_adsp_compr *compr = stream->runtime->private_data; | |
2870 | struct wm_adsp_compr_buf *buf = compr->buf; | |
2871 | struct wm_adsp *dsp = compr->dsp; | |
2872 | int ret = 0; | |
2873 | ||
2874 | adsp_dbg(dsp, "Pointer request\n"); | |
2875 | ||
2876 | mutex_lock(&dsp->pwr_lock); | |
2877 | ||
2878 | if (!compr->buf) { | |
2879 | ret = -ENXIO; | |
2880 | goto out; | |
2881 | } | |
2882 | ||
2883 | if (compr->buf->error) { | |
2884 | ret = -EIO; | |
2885 | goto out; | |
2886 | } | |
2887 | ||
2888 | if (buf->avail < wm_adsp_compr_frag_words(compr)) { | |
2889 | ret = wm_adsp_buffer_update_avail(buf); | |
2890 | if (ret < 0) { | |
2891 | adsp_err(dsp, "Error reading avail: %d\n", ret); | |
2892 | goto out; | |
2893 | } | |
2894 | ||
2895 | /* | |
2896 | * If we really have less than 1 fragment available tell the | |
2897 | * DSP to inform us once a whole fragment is available. | |
2898 | */ | |
2899 | if (buf->avail < wm_adsp_compr_frag_words(compr)) { | |
2900 | ret = wm_adsp_buffer_reenable_irq(buf); | |
2901 | if (ret < 0) { | |
2902 | adsp_err(dsp, | |
2903 | "Failed to re-enable buffer IRQ: %d\n", | |
2904 | ret); | |
2905 | goto out; | |
2906 | } | |
2907 | } | |
2908 | } | |
2909 | ||
2910 | tstamp->copied_total = compr->copied_total; | |
2911 | tstamp->copied_total += buf->avail * WM_ADSP_DATA_WORD_SIZE; | |
da2b3358 | 2912 | tstamp->sampling_rate = compr->sample_rate; |
565ace46 CK |
2913 | |
2914 | out: | |
2915 | mutex_unlock(&dsp->pwr_lock); | |
2916 | ||
2917 | return ret; | |
2918 | } | |
2919 | EXPORT_SYMBOL_GPL(wm_adsp_compr_pointer); | |
2920 | ||
83a40ce9 CK |
2921 | static int wm_adsp_buffer_capture_block(struct wm_adsp_compr *compr, int target) |
2922 | { | |
2923 | struct wm_adsp_compr_buf *buf = compr->buf; | |
2924 | u8 *pack_in = (u8 *)compr->raw_buf; | |
2925 | u8 *pack_out = (u8 *)compr->raw_buf; | |
2926 | unsigned int adsp_addr; | |
2927 | int mem_type, nwords, max_read; | |
2928 | int i, j, ret; | |
2929 | ||
2930 | /* Calculate read parameters */ | |
2931 | for (i = 0; i < wm_adsp_fw[buf->dsp->fw].caps->num_regions; ++i) | |
2932 | if (buf->read_index < buf->regions[i].cumulative_size) | |
2933 | break; | |
2934 | ||
2935 | if (i == wm_adsp_fw[buf->dsp->fw].caps->num_regions) | |
2936 | return -EINVAL; | |
2937 | ||
2938 | mem_type = buf->regions[i].mem_type; | |
2939 | adsp_addr = buf->regions[i].base_addr + | |
2940 | (buf->read_index - buf->regions[i].offset); | |
2941 | ||
2942 | max_read = wm_adsp_compr_frag_words(compr); | |
2943 | nwords = buf->regions[i].cumulative_size - buf->read_index; | |
2944 | ||
2945 | if (nwords > target) | |
2946 | nwords = target; | |
2947 | if (nwords > buf->avail) | |
2948 | nwords = buf->avail; | |
2949 | if (nwords > max_read) | |
2950 | nwords = max_read; | |
2951 | if (!nwords) | |
2952 | return 0; | |
2953 | ||
2954 | /* Read data from DSP */ | |
2955 | ret = wm_adsp_read_data_block(buf->dsp, mem_type, adsp_addr, | |
2956 | nwords, compr->raw_buf); | |
2957 | if (ret < 0) | |
2958 | return ret; | |
2959 | ||
2960 | /* Remove the padding bytes from the data read from the DSP */ | |
2961 | for (i = 0; i < nwords; i++) { | |
2962 | for (j = 0; j < WM_ADSP_DATA_WORD_SIZE; j++) | |
2963 | *pack_out++ = *pack_in++; | |
2964 | ||
2965 | pack_in += sizeof(*(compr->raw_buf)) - WM_ADSP_DATA_WORD_SIZE; | |
2966 | } | |
2967 | ||
2968 | /* update read index to account for words read */ | |
2969 | buf->read_index += nwords; | |
2970 | if (buf->read_index == wm_adsp_buffer_size(buf)) | |
2971 | buf->read_index = 0; | |
2972 | ||
2973 | ret = wm_adsp_buffer_write(buf, HOST_BUFFER_FIELD(next_read_index), | |
2974 | buf->read_index); | |
2975 | if (ret < 0) | |
2976 | return ret; | |
2977 | ||
2978 | /* update avail to account for words read */ | |
2979 | buf->avail -= nwords; | |
2980 | ||
2981 | return nwords; | |
2982 | } | |
2983 | ||
2984 | static int wm_adsp_compr_read(struct wm_adsp_compr *compr, | |
2985 | char __user *buf, size_t count) | |
2986 | { | |
2987 | struct wm_adsp *dsp = compr->dsp; | |
2988 | int ntotal = 0; | |
2989 | int nwords, nbytes; | |
2990 | ||
2991 | adsp_dbg(dsp, "Requested read of %zu bytes\n", count); | |
2992 | ||
2993 | if (!compr->buf) | |
2994 | return -ENXIO; | |
2995 | ||
2996 | if (compr->buf->error) | |
2997 | return -EIO; | |
2998 | ||
2999 | count /= WM_ADSP_DATA_WORD_SIZE; | |
3000 | ||
3001 | do { | |
3002 | nwords = wm_adsp_buffer_capture_block(compr, count); | |
3003 | if (nwords < 0) { | |
3004 | adsp_err(dsp, "Failed to capture block: %d\n", nwords); | |
3005 | return nwords; | |
3006 | } | |
3007 | ||
3008 | nbytes = nwords * WM_ADSP_DATA_WORD_SIZE; | |
3009 | ||
3010 | adsp_dbg(dsp, "Read %d bytes\n", nbytes); | |
3011 | ||
3012 | if (copy_to_user(buf + ntotal, compr->raw_buf, nbytes)) { | |
3013 | adsp_err(dsp, "Failed to copy data to user: %d, %d\n", | |
3014 | ntotal, nbytes); | |
3015 | return -EFAULT; | |
3016 | } | |
3017 | ||
3018 | count -= nwords; | |
3019 | ntotal += nbytes; | |
3020 | } while (nwords > 0 && count > 0); | |
3021 | ||
3022 | compr->copied_total += ntotal; | |
3023 | ||
3024 | return ntotal; | |
3025 | } | |
3026 | ||
3027 | int wm_adsp_compr_copy(struct snd_compr_stream *stream, char __user *buf, | |
3028 | size_t count) | |
3029 | { | |
3030 | struct wm_adsp_compr *compr = stream->runtime->private_data; | |
3031 | struct wm_adsp *dsp = compr->dsp; | |
3032 | int ret; | |
3033 | ||
3034 | mutex_lock(&dsp->pwr_lock); | |
3035 | ||
3036 | if (stream->direction == SND_COMPRESS_CAPTURE) | |
3037 | ret = wm_adsp_compr_read(compr, buf, count); | |
3038 | else | |
3039 | ret = -ENOTSUPP; | |
3040 | ||
3041 | mutex_unlock(&dsp->pwr_lock); | |
3042 | ||
3043 | return ret; | |
3044 | } | |
3045 | EXPORT_SYMBOL_GPL(wm_adsp_compr_copy); | |
3046 | ||
0a37c6ef | 3047 | MODULE_LICENSE("GPL v2"); |