Commit | Line | Data |
---|---|---|
d255b095 JK |
1 | /* |
2 | * skl-message.c - HDA DSP interface for FW registration, Pipe and Module | |
3 | * configurations | |
4 | * | |
5 | * Copyright (C) 2015 Intel Corp | |
6 | * Author:Rafal Redzimski <rafal.f.redzimski@intel.com> | |
7 | * Jeeja KP <jeeja.kp@intel.com> | |
8 | * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ | |
9 | * | |
10 | * This program is free software; you can redistribute it and/or modify | |
11 | * it under the terms of the GNU General Public License as version 2, as | |
12 | * published by the Free Software Foundation. | |
13 | * | |
14 | * This program is distributed in the hope that it will be useful, but | |
15 | * WITHOUT ANY WARRANTY; without even the implied warranty of | |
16 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU | |
17 | * General Public License for more details. | |
18 | */ | |
19 | ||
20 | #include <linux/slab.h> | |
21 | #include <linux/pci.h> | |
22 | #include <sound/core.h> | |
23 | #include <sound/pcm.h> | |
24 | #include "skl-sst-dsp.h" | |
25 | #include "skl-sst-ipc.h" | |
26 | #include "skl.h" | |
27 | #include "../common/sst-dsp.h" | |
28 | #include "../common/sst-dsp-priv.h" | |
23db472b JK |
29 | #include "skl-topology.h" |
30 | #include "skl-tplg-interface.h" | |
d255b095 JK |
31 | |
32 | static int skl_alloc_dma_buf(struct device *dev, | |
33 | struct snd_dma_buffer *dmab, size_t size) | |
34 | { | |
35 | struct hdac_ext_bus *ebus = dev_get_drvdata(dev); | |
36 | struct hdac_bus *bus = ebus_to_hbus(ebus); | |
37 | ||
38 | if (!bus) | |
39 | return -ENODEV; | |
40 | ||
41 | return bus->io_ops->dma_alloc_pages(bus, SNDRV_DMA_TYPE_DEV, size, dmab); | |
42 | } | |
43 | ||
44 | static int skl_free_dma_buf(struct device *dev, struct snd_dma_buffer *dmab) | |
45 | { | |
46 | struct hdac_ext_bus *ebus = dev_get_drvdata(dev); | |
47 | struct hdac_bus *bus = ebus_to_hbus(ebus); | |
48 | ||
49 | if (!bus) | |
50 | return -ENODEV; | |
51 | ||
52 | bus->io_ops->dma_free_pages(bus, dmab); | |
53 | ||
54 | return 0; | |
55 | } | |
56 | ||
4e10996b JK |
57 | #define NOTIFICATION_PARAM_ID 3 |
58 | #define NOTIFICATION_MASK 0xf | |
59 | ||
60 | /* disable notfication for underruns/overruns from firmware module */ | |
61 | static void skl_dsp_enable_notification(struct skl_sst *ctx, bool enable) | |
62 | { | |
63 | struct notification_mask mask; | |
64 | struct skl_ipc_large_config_msg msg = {0}; | |
65 | ||
66 | mask.notify = NOTIFICATION_MASK; | |
67 | mask.enable = enable; | |
68 | ||
69 | msg.large_param_id = NOTIFICATION_PARAM_ID; | |
70 | msg.param_data_size = sizeof(mask); | |
71 | ||
72 | skl_ipc_set_large_config(&ctx->ipc, &msg, (u32 *)&mask); | |
73 | } | |
74 | ||
d255b095 JK |
75 | int skl_init_dsp(struct skl *skl) |
76 | { | |
77 | void __iomem *mmio_base; | |
78 | struct hdac_ext_bus *ebus = &skl->ebus; | |
79 | struct hdac_bus *bus = ebus_to_hbus(ebus); | |
80 | int irq = bus->irq; | |
81 | struct skl_dsp_loader_ops loader_ops; | |
82 | int ret; | |
83 | ||
84 | loader_ops.alloc_dma_buf = skl_alloc_dma_buf; | |
85 | loader_ops.free_dma_buf = skl_free_dma_buf; | |
86 | ||
87 | /* enable ppcap interrupt */ | |
88 | snd_hdac_ext_bus_ppcap_enable(&skl->ebus, true); | |
89 | snd_hdac_ext_bus_ppcap_int_enable(&skl->ebus, true); | |
90 | ||
91 | /* read the BAR of the ADSP MMIO */ | |
92 | mmio_base = pci_ioremap_bar(skl->pci, 4); | |
93 | if (mmio_base == NULL) { | |
94 | dev_err(bus->dev, "ioremap error\n"); | |
95 | return -ENXIO; | |
96 | } | |
97 | ||
98 | ret = skl_sst_dsp_init(bus->dev, mmio_base, irq, | |
aecf6fd8 | 99 | skl->fw_name, loader_ops, &skl->skl_sst); |
2ac454ff JK |
100 | if (ret < 0) |
101 | return ret; | |
102 | ||
4e10996b | 103 | skl_dsp_enable_notification(skl->skl_sst, false); |
d255b095 JK |
104 | dev_dbg(bus->dev, "dsp registration status=%d\n", ret); |
105 | ||
106 | return ret; | |
107 | } | |
108 | ||
109 | void skl_free_dsp(struct skl *skl) | |
110 | { | |
111 | struct hdac_ext_bus *ebus = &skl->ebus; | |
112 | struct hdac_bus *bus = ebus_to_hbus(ebus); | |
113 | struct skl_sst *ctx = skl->skl_sst; | |
114 | ||
115 | /* disable ppcap interrupt */ | |
116 | snd_hdac_ext_bus_ppcap_int_enable(&skl->ebus, false); | |
117 | ||
118 | skl_sst_dsp_cleanup(bus->dev, ctx); | |
119 | if (ctx->dsp->addr.lpe) | |
120 | iounmap(ctx->dsp->addr.lpe); | |
121 | } | |
122 | ||
123 | int skl_suspend_dsp(struct skl *skl) | |
124 | { | |
125 | struct skl_sst *ctx = skl->skl_sst; | |
126 | int ret; | |
127 | ||
128 | /* if ppcap is not supported return 0 */ | |
129 | if (!skl->ebus.ppcap) | |
130 | return 0; | |
131 | ||
132 | ret = skl_dsp_sleep(ctx->dsp); | |
133 | if (ret < 0) | |
134 | return ret; | |
135 | ||
136 | /* disable ppcap interrupt */ | |
137 | snd_hdac_ext_bus_ppcap_int_enable(&skl->ebus, false); | |
138 | snd_hdac_ext_bus_ppcap_enable(&skl->ebus, false); | |
139 | ||
140 | return 0; | |
141 | } | |
142 | ||
143 | int skl_resume_dsp(struct skl *skl) | |
144 | { | |
145 | struct skl_sst *ctx = skl->skl_sst; | |
4e10996b | 146 | int ret; |
d255b095 JK |
147 | |
148 | /* if ppcap is not supported return 0 */ | |
149 | if (!skl->ebus.ppcap) | |
150 | return 0; | |
151 | ||
152 | /* enable ppcap interrupt */ | |
153 | snd_hdac_ext_bus_ppcap_enable(&skl->ebus, true); | |
154 | snd_hdac_ext_bus_ppcap_int_enable(&skl->ebus, true); | |
155 | ||
4e10996b JK |
156 | ret = skl_dsp_wake(ctx->dsp); |
157 | if (ret < 0) | |
158 | return ret; | |
159 | ||
160 | skl_dsp_enable_notification(skl->skl_sst, false); | |
161 | return ret; | |
d255b095 | 162 | } |
23db472b JK |
163 | |
164 | enum skl_bitdepth skl_get_bit_depth(int params) | |
165 | { | |
166 | switch (params) { | |
167 | case 8: | |
168 | return SKL_DEPTH_8BIT; | |
169 | ||
170 | case 16: | |
171 | return SKL_DEPTH_16BIT; | |
172 | ||
173 | case 24: | |
174 | return SKL_DEPTH_24BIT; | |
175 | ||
176 | case 32: | |
177 | return SKL_DEPTH_32BIT; | |
178 | ||
179 | default: | |
180 | return SKL_DEPTH_INVALID; | |
181 | ||
182 | } | |
183 | } | |
184 | ||
23db472b JK |
185 | /* |
186 | * Each module in DSP expects a base module configuration, which consists of | |
187 | * PCM format information, which we calculate in driver and resource values | |
188 | * which are read from widget information passed through topology binary | |
189 | * This is send when we create a module with INIT_INSTANCE IPC msg | |
190 | */ | |
191 | static void skl_set_base_module_format(struct skl_sst *ctx, | |
192 | struct skl_module_cfg *mconfig, | |
193 | struct skl_base_cfg *base_cfg) | |
194 | { | |
4cd9899f | 195 | struct skl_module_fmt *format = &mconfig->in_fmt[0]; |
23db472b JK |
196 | |
197 | base_cfg->audio_fmt.number_of_channels = (u8)format->channels; | |
198 | ||
199 | base_cfg->audio_fmt.s_freq = format->s_freq; | |
200 | base_cfg->audio_fmt.bit_depth = format->bit_depth; | |
201 | base_cfg->audio_fmt.valid_bit_depth = format->valid_bit_depth; | |
202 | base_cfg->audio_fmt.ch_cfg = format->ch_cfg; | |
203 | ||
204 | dev_dbg(ctx->dev, "bit_depth=%x valid_bd=%x ch_config=%x\n", | |
205 | format->bit_depth, format->valid_bit_depth, | |
206 | format->ch_cfg); | |
207 | ||
3e81f1a3 | 208 | base_cfg->audio_fmt.channel_map = format->ch_map; |
23db472b | 209 | |
3e81f1a3 | 210 | base_cfg->audio_fmt.interleaving = format->interleaving_style; |
23db472b JK |
211 | |
212 | base_cfg->cps = mconfig->mcps; | |
213 | base_cfg->ibs = mconfig->ibs; | |
214 | base_cfg->obs = mconfig->obs; | |
b18c458d | 215 | base_cfg->is_pages = mconfig->mem_pages; |
23db472b JK |
216 | } |
217 | ||
218 | /* | |
219 | * Copies copier capabilities into copier module and updates copier module | |
220 | * config size. | |
221 | */ | |
222 | static void skl_copy_copier_caps(struct skl_module_cfg *mconfig, | |
223 | struct skl_cpr_cfg *cpr_mconfig) | |
224 | { | |
225 | if (mconfig->formats_config.caps_size == 0) | |
226 | return; | |
227 | ||
228 | memcpy(cpr_mconfig->gtw_cfg.config_data, | |
229 | mconfig->formats_config.caps, | |
230 | mconfig->formats_config.caps_size); | |
231 | ||
232 | cpr_mconfig->gtw_cfg.config_length = | |
233 | (mconfig->formats_config.caps_size) / 4; | |
234 | } | |
235 | ||
bfa764ac | 236 | #define SKL_NON_GATEWAY_CPR_NODE_ID 0xFFFFFFFF |
23db472b JK |
237 | /* |
238 | * Calculate the gatewat settings required for copier module, type of | |
239 | * gateway and index of gateway to use | |
240 | */ | |
241 | static void skl_setup_cpr_gateway_cfg(struct skl_sst *ctx, | |
242 | struct skl_module_cfg *mconfig, | |
243 | struct skl_cpr_cfg *cpr_mconfig) | |
244 | { | |
245 | union skl_connector_node_id node_id = {0}; | |
d7b18813 | 246 | union skl_ssp_dma_node ssp_node = {0}; |
23db472b JK |
247 | struct skl_pipe_params *params = mconfig->pipe->p_params; |
248 | ||
249 | switch (mconfig->dev_type) { | |
250 | case SKL_DEVICE_BT: | |
251 | node_id.node.dma_type = | |
252 | (SKL_CONN_SOURCE == mconfig->hw_conn_type) ? | |
253 | SKL_DMA_I2S_LINK_OUTPUT_CLASS : | |
254 | SKL_DMA_I2S_LINK_INPUT_CLASS; | |
255 | node_id.node.vindex = params->host_dma_id + | |
256 | (mconfig->vbus_id << 3); | |
257 | break; | |
258 | ||
259 | case SKL_DEVICE_I2S: | |
260 | node_id.node.dma_type = | |
261 | (SKL_CONN_SOURCE == mconfig->hw_conn_type) ? | |
262 | SKL_DMA_I2S_LINK_OUTPUT_CLASS : | |
263 | SKL_DMA_I2S_LINK_INPUT_CLASS; | |
d7b18813 JK |
264 | ssp_node.dma_node.time_slot_index = mconfig->time_slot; |
265 | ssp_node.dma_node.i2s_instance = mconfig->vbus_id; | |
266 | node_id.node.vindex = ssp_node.val; | |
23db472b JK |
267 | break; |
268 | ||
269 | case SKL_DEVICE_DMIC: | |
270 | node_id.node.dma_type = SKL_DMA_DMIC_LINK_INPUT_CLASS; | |
271 | node_id.node.vindex = mconfig->vbus_id + | |
272 | (mconfig->time_slot); | |
273 | break; | |
274 | ||
275 | case SKL_DEVICE_HDALINK: | |
276 | node_id.node.dma_type = | |
277 | (SKL_CONN_SOURCE == mconfig->hw_conn_type) ? | |
278 | SKL_DMA_HDA_LINK_OUTPUT_CLASS : | |
279 | SKL_DMA_HDA_LINK_INPUT_CLASS; | |
280 | node_id.node.vindex = params->link_dma_id; | |
281 | break; | |
282 | ||
bfa764ac | 283 | case SKL_DEVICE_HDAHOST: |
23db472b JK |
284 | node_id.node.dma_type = |
285 | (SKL_CONN_SOURCE == mconfig->hw_conn_type) ? | |
286 | SKL_DMA_HDA_HOST_OUTPUT_CLASS : | |
287 | SKL_DMA_HDA_HOST_INPUT_CLASS; | |
288 | node_id.node.vindex = params->host_dma_id; | |
289 | break; | |
bfa764ac JK |
290 | |
291 | default: | |
292 | cpr_mconfig->gtw_cfg.node_id = SKL_NON_GATEWAY_CPR_NODE_ID; | |
293 | cpr_mconfig->cpr_feature_mask = 0; | |
294 | return; | |
23db472b JK |
295 | } |
296 | ||
297 | cpr_mconfig->gtw_cfg.node_id = node_id.val; | |
298 | ||
299 | if (SKL_CONN_SOURCE == mconfig->hw_conn_type) | |
300 | cpr_mconfig->gtw_cfg.dma_buffer_size = 2 * mconfig->obs; | |
301 | else | |
302 | cpr_mconfig->gtw_cfg.dma_buffer_size = 2 * mconfig->ibs; | |
303 | ||
304 | cpr_mconfig->cpr_feature_mask = 0; | |
305 | cpr_mconfig->gtw_cfg.config_length = 0; | |
306 | ||
307 | skl_copy_copier_caps(mconfig, cpr_mconfig); | |
308 | } | |
309 | ||
310 | static void skl_setup_out_format(struct skl_sst *ctx, | |
311 | struct skl_module_cfg *mconfig, | |
312 | struct skl_audio_data_format *out_fmt) | |
313 | { | |
4cd9899f | 314 | struct skl_module_fmt *format = &mconfig->out_fmt[0]; |
23db472b JK |
315 | |
316 | out_fmt->number_of_channels = (u8)format->channels; | |
317 | out_fmt->s_freq = format->s_freq; | |
318 | out_fmt->bit_depth = format->bit_depth; | |
319 | out_fmt->valid_bit_depth = format->valid_bit_depth; | |
320 | out_fmt->ch_cfg = format->ch_cfg; | |
321 | ||
3e81f1a3 JK |
322 | out_fmt->channel_map = format->ch_map; |
323 | out_fmt->interleaving = format->interleaving_style; | |
324 | out_fmt->sample_type = format->sample_type; | |
23db472b JK |
325 | |
326 | dev_dbg(ctx->dev, "copier out format chan=%d fre=%d bitdepth=%d\n", | |
327 | out_fmt->number_of_channels, format->s_freq, format->bit_depth); | |
328 | } | |
329 | ||
a0ffe48b HS |
330 | /* |
331 | * DSP needs SRC module for frequency conversion, SRC takes base module | |
332 | * configuration and the target frequency as extra parameter passed as src | |
333 | * config | |
334 | */ | |
335 | static void skl_set_src_format(struct skl_sst *ctx, | |
336 | struct skl_module_cfg *mconfig, | |
337 | struct skl_src_module_cfg *src_mconfig) | |
338 | { | |
4cd9899f | 339 | struct skl_module_fmt *fmt = &mconfig->out_fmt[0]; |
a0ffe48b HS |
340 | |
341 | skl_set_base_module_format(ctx, mconfig, | |
342 | (struct skl_base_cfg *)src_mconfig); | |
343 | ||
344 | src_mconfig->src_cfg = fmt->s_freq; | |
345 | } | |
346 | ||
347 | /* | |
348 | * DSP needs updown module to do channel conversion. updown module take base | |
349 | * module configuration and channel configuration | |
350 | * It also take coefficients and now we have defaults applied here | |
351 | */ | |
352 | static void skl_set_updown_mixer_format(struct skl_sst *ctx, | |
353 | struct skl_module_cfg *mconfig, | |
354 | struct skl_up_down_mixer_cfg *mixer_mconfig) | |
355 | { | |
4cd9899f | 356 | struct skl_module_fmt *fmt = &mconfig->out_fmt[0]; |
a0ffe48b HS |
357 | int i = 0; |
358 | ||
359 | skl_set_base_module_format(ctx, mconfig, | |
360 | (struct skl_base_cfg *)mixer_mconfig); | |
361 | mixer_mconfig->out_ch_cfg = fmt->ch_cfg; | |
362 | ||
363 | /* Select F/W default coefficient */ | |
364 | mixer_mconfig->coeff_sel = 0x0; | |
365 | ||
366 | /* User coeff, don't care since we are selecting F/W defaults */ | |
367 | for (i = 0; i < UP_DOWN_MIXER_MAX_COEFF; i++) | |
368 | mixer_mconfig->coeff[i] = 0xDEADBEEF; | |
369 | } | |
370 | ||
23db472b JK |
371 | /* |
372 | * 'copier' is DSP internal module which copies data from Host DMA (HDA host | |
373 | * dma) or link (hda link, SSP, PDM) | |
374 | * Here we calculate the copier module parameters, like PCM format, output | |
375 | * format, gateway settings | |
376 | * copier_module_config is sent as input buffer with INIT_INSTANCE IPC msg | |
377 | */ | |
378 | static void skl_set_copier_format(struct skl_sst *ctx, | |
379 | struct skl_module_cfg *mconfig, | |
380 | struct skl_cpr_cfg *cpr_mconfig) | |
381 | { | |
382 | struct skl_audio_data_format *out_fmt = &cpr_mconfig->out_fmt; | |
383 | struct skl_base_cfg *base_cfg = (struct skl_base_cfg *)cpr_mconfig; | |
384 | ||
385 | skl_set_base_module_format(ctx, mconfig, base_cfg); | |
386 | ||
387 | skl_setup_out_format(ctx, mconfig, out_fmt); | |
388 | skl_setup_cpr_gateway_cfg(ctx, mconfig, cpr_mconfig); | |
389 | } | |
390 | ||
399b210b JK |
391 | /* |
392 | * Algo module are DSP pre processing modules. Algo module take base module | |
393 | * configuration and params | |
394 | */ | |
395 | ||
396 | static void skl_set_algo_format(struct skl_sst *ctx, | |
397 | struct skl_module_cfg *mconfig, | |
398 | struct skl_algo_cfg *algo_mcfg) | |
399 | { | |
400 | struct skl_base_cfg *base_cfg = (struct skl_base_cfg *)algo_mcfg; | |
401 | ||
402 | skl_set_base_module_format(ctx, mconfig, base_cfg); | |
403 | ||
404 | if (mconfig->formats_config.caps_size == 0) | |
405 | return; | |
406 | ||
407 | memcpy(algo_mcfg->params, | |
408 | mconfig->formats_config.caps, | |
409 | mconfig->formats_config.caps_size); | |
410 | ||
411 | } | |
412 | ||
fd18110f D |
413 | /* |
414 | * Mic select module allows selecting one or many input channels, thus | |
415 | * acting as a demux. | |
416 | * | |
417 | * Mic select module take base module configuration and out-format | |
418 | * configuration | |
419 | */ | |
420 | static void skl_set_base_outfmt_format(struct skl_sst *ctx, | |
421 | struct skl_module_cfg *mconfig, | |
422 | struct skl_base_outfmt_cfg *base_outfmt_mcfg) | |
423 | { | |
424 | struct skl_audio_data_format *out_fmt = &base_outfmt_mcfg->out_fmt; | |
425 | struct skl_base_cfg *base_cfg = | |
426 | (struct skl_base_cfg *)base_outfmt_mcfg; | |
427 | ||
428 | skl_set_base_module_format(ctx, mconfig, base_cfg); | |
429 | skl_setup_out_format(ctx, mconfig, out_fmt); | |
430 | } | |
431 | ||
23db472b JK |
432 | static u16 skl_get_module_param_size(struct skl_sst *ctx, |
433 | struct skl_module_cfg *mconfig) | |
434 | { | |
435 | u16 param_size; | |
436 | ||
437 | switch (mconfig->m_type) { | |
438 | case SKL_MODULE_TYPE_COPIER: | |
439 | param_size = sizeof(struct skl_cpr_cfg); | |
440 | param_size += mconfig->formats_config.caps_size; | |
441 | return param_size; | |
442 | ||
a0ffe48b HS |
443 | case SKL_MODULE_TYPE_SRCINT: |
444 | return sizeof(struct skl_src_module_cfg); | |
445 | ||
446 | case SKL_MODULE_TYPE_UPDWMIX: | |
447 | return sizeof(struct skl_up_down_mixer_cfg); | |
448 | ||
399b210b JK |
449 | case SKL_MODULE_TYPE_ALGO: |
450 | param_size = sizeof(struct skl_base_cfg); | |
451 | param_size += mconfig->formats_config.caps_size; | |
452 | return param_size; | |
453 | ||
fd18110f D |
454 | case SKL_MODULE_TYPE_BASE_OUTFMT: |
455 | return sizeof(struct skl_base_outfmt_cfg); | |
456 | ||
23db472b JK |
457 | default: |
458 | /* | |
459 | * return only base cfg when no specific module type is | |
460 | * specified | |
461 | */ | |
462 | return sizeof(struct skl_base_cfg); | |
463 | } | |
464 | ||
465 | return 0; | |
466 | } | |
467 | ||
468 | /* | |
a0ffe48b HS |
469 | * DSP firmware supports various modules like copier, SRC, updown etc. |
470 | * These modules required various parameters to be calculated and sent for | |
471 | * the module initialization to DSP. By default a generic module needs only | |
472 | * base module format configuration | |
23db472b | 473 | */ |
a0ffe48b | 474 | |
23db472b JK |
475 | static int skl_set_module_format(struct skl_sst *ctx, |
476 | struct skl_module_cfg *module_config, | |
477 | u16 *module_config_size, | |
478 | void **param_data) | |
479 | { | |
480 | u16 param_size; | |
481 | ||
482 | param_size = skl_get_module_param_size(ctx, module_config); | |
483 | ||
484 | *param_data = kzalloc(param_size, GFP_KERNEL); | |
485 | if (NULL == *param_data) | |
486 | return -ENOMEM; | |
487 | ||
488 | *module_config_size = param_size; | |
489 | ||
490 | switch (module_config->m_type) { | |
491 | case SKL_MODULE_TYPE_COPIER: | |
492 | skl_set_copier_format(ctx, module_config, *param_data); | |
493 | break; | |
494 | ||
a0ffe48b HS |
495 | case SKL_MODULE_TYPE_SRCINT: |
496 | skl_set_src_format(ctx, module_config, *param_data); | |
497 | break; | |
498 | ||
499 | case SKL_MODULE_TYPE_UPDWMIX: | |
500 | skl_set_updown_mixer_format(ctx, module_config, *param_data); | |
501 | break; | |
502 | ||
399b210b JK |
503 | case SKL_MODULE_TYPE_ALGO: |
504 | skl_set_algo_format(ctx, module_config, *param_data); | |
505 | break; | |
506 | ||
fd18110f D |
507 | case SKL_MODULE_TYPE_BASE_OUTFMT: |
508 | skl_set_base_outfmt_format(ctx, module_config, *param_data); | |
509 | break; | |
510 | ||
23db472b JK |
511 | default: |
512 | skl_set_base_module_format(ctx, module_config, *param_data); | |
513 | break; | |
514 | ||
515 | } | |
516 | ||
517 | dev_dbg(ctx->dev, "Module type=%d config size: %d bytes\n", | |
518 | module_config->id.module_id, param_size); | |
519 | print_hex_dump(KERN_DEBUG, "Module params:", DUMP_PREFIX_OFFSET, 8, 4, | |
520 | *param_data, param_size, false); | |
521 | return 0; | |
522 | } | |
523 | ||
524 | static int skl_get_queue_index(struct skl_module_pin *mpin, | |
525 | struct skl_module_inst_id id, int max) | |
526 | { | |
527 | int i; | |
528 | ||
529 | for (i = 0; i < max; i++) { | |
530 | if (mpin[i].id.module_id == id.module_id && | |
531 | mpin[i].id.instance_id == id.instance_id) | |
532 | return i; | |
533 | } | |
534 | ||
535 | return -EINVAL; | |
536 | } | |
537 | ||
538 | /* | |
539 | * Allocates queue for each module. | |
540 | * if dynamic, the pin_index is allocated 0 to max_pin. | |
541 | * In static, the pin_index is fixed based on module_id and instance id | |
542 | */ | |
543 | static int skl_alloc_queue(struct skl_module_pin *mpin, | |
4f745708 | 544 | struct skl_module_cfg *tgt_cfg, int max) |
23db472b JK |
545 | { |
546 | int i; | |
4f745708 | 547 | struct skl_module_inst_id id = tgt_cfg->id; |
23db472b JK |
548 | /* |
549 | * if pin in dynamic, find first free pin | |
550 | * otherwise find match module and instance id pin as topology will | |
551 | * ensure a unique pin is assigned to this so no need to | |
552 | * allocate/free | |
553 | */ | |
554 | for (i = 0; i < max; i++) { | |
555 | if (mpin[i].is_dynamic) { | |
4f745708 JK |
556 | if (!mpin[i].in_use && |
557 | mpin[i].pin_state == SKL_PIN_UNBIND) { | |
558 | ||
23db472b JK |
559 | mpin[i].in_use = true; |
560 | mpin[i].id.module_id = id.module_id; | |
561 | mpin[i].id.instance_id = id.instance_id; | |
4f745708 | 562 | mpin[i].tgt_mcfg = tgt_cfg; |
23db472b JK |
563 | return i; |
564 | } | |
565 | } else { | |
566 | if (mpin[i].id.module_id == id.module_id && | |
4f745708 JK |
567 | mpin[i].id.instance_id == id.instance_id && |
568 | mpin[i].pin_state == SKL_PIN_UNBIND) { | |
569 | ||
570 | mpin[i].tgt_mcfg = tgt_cfg; | |
23db472b | 571 | return i; |
4f745708 | 572 | } |
23db472b JK |
573 | } |
574 | } | |
575 | ||
576 | return -EINVAL; | |
577 | } | |
578 | ||
579 | static void skl_free_queue(struct skl_module_pin *mpin, int q_index) | |
580 | { | |
581 | if (mpin[q_index].is_dynamic) { | |
582 | mpin[q_index].in_use = false; | |
583 | mpin[q_index].id.module_id = 0; | |
584 | mpin[q_index].id.instance_id = 0; | |
585 | } | |
4f745708 JK |
586 | mpin[q_index].pin_state = SKL_PIN_UNBIND; |
587 | mpin[q_index].tgt_mcfg = NULL; | |
588 | } | |
589 | ||
590 | /* Module state will be set to unint, if all the out pin state is UNBIND */ | |
591 | ||
592 | static void skl_clear_module_state(struct skl_module_pin *mpin, int max, | |
593 | struct skl_module_cfg *mcfg) | |
594 | { | |
595 | int i; | |
596 | bool found = false; | |
597 | ||
598 | for (i = 0; i < max; i++) { | |
599 | if (mpin[i].pin_state == SKL_PIN_UNBIND) | |
600 | continue; | |
601 | found = true; | |
602 | break; | |
603 | } | |
604 | ||
605 | if (!found) | |
606 | mcfg->m_state = SKL_MODULE_UNINIT; | |
607 | return; | |
23db472b | 608 | } |
beb73b26 JK |
609 | |
610 | /* | |
611 | * A module needs to be instanataited in DSP. A mdoule is present in a | |
612 | * collection of module referred as a PIPE. | |
613 | * We first calculate the module format, based on module type and then | |
614 | * invoke the DSP by sending IPC INIT_INSTANCE using ipc helper | |
615 | */ | |
616 | int skl_init_module(struct skl_sst *ctx, | |
9939a9c3 | 617 | struct skl_module_cfg *mconfig) |
beb73b26 JK |
618 | { |
619 | u16 module_config_size = 0; | |
620 | void *param_data = NULL; | |
621 | int ret; | |
622 | struct skl_ipc_init_instance_msg msg; | |
623 | ||
624 | dev_dbg(ctx->dev, "%s: module_id = %d instance=%d\n", __func__, | |
625 | mconfig->id.module_id, mconfig->id.instance_id); | |
626 | ||
627 | if (mconfig->pipe->state != SKL_PIPE_CREATED) { | |
628 | dev_err(ctx->dev, "Pipe not created state= %d pipe_id= %d\n", | |
629 | mconfig->pipe->state, mconfig->pipe->ppl_id); | |
630 | return -EIO; | |
631 | } | |
632 | ||
633 | ret = skl_set_module_format(ctx, mconfig, | |
634 | &module_config_size, ¶m_data); | |
635 | if (ret < 0) { | |
636 | dev_err(ctx->dev, "Failed to set module format ret=%d\n", ret); | |
637 | return ret; | |
638 | } | |
639 | ||
640 | msg.module_id = mconfig->id.module_id; | |
641 | msg.instance_id = mconfig->id.instance_id; | |
642 | msg.ppl_instance_id = mconfig->pipe->ppl_id; | |
643 | msg.param_data_size = module_config_size; | |
644 | msg.core_id = mconfig->core_id; | |
645 | ||
646 | ret = skl_ipc_init_instance(&ctx->ipc, &msg, param_data); | |
647 | if (ret < 0) { | |
648 | dev_err(ctx->dev, "Failed to init instance ret=%d\n", ret); | |
649 | kfree(param_data); | |
650 | return ret; | |
651 | } | |
652 | mconfig->m_state = SKL_MODULE_INIT_DONE; | |
653 | ||
654 | return ret; | |
655 | } | |
656 | ||
657 | static void skl_dump_bind_info(struct skl_sst *ctx, struct skl_module_cfg | |
658 | *src_module, struct skl_module_cfg *dst_module) | |
659 | { | |
660 | dev_dbg(ctx->dev, "%s: src module_id = %d src_instance=%d\n", | |
661 | __func__, src_module->id.module_id, src_module->id.instance_id); | |
662 | dev_dbg(ctx->dev, "%s: dst_module=%d dst_instacne=%d\n", __func__, | |
663 | dst_module->id.module_id, dst_module->id.instance_id); | |
664 | ||
665 | dev_dbg(ctx->dev, "src_module state = %d dst module state = %d\n", | |
666 | src_module->m_state, dst_module->m_state); | |
667 | } | |
668 | ||
669 | /* | |
670 | * On module freeup, we need to unbind the module with modules | |
671 | * it is already bind. | |
672 | * Find the pin allocated and unbind then using bind_unbind IPC | |
673 | */ | |
674 | int skl_unbind_modules(struct skl_sst *ctx, | |
675 | struct skl_module_cfg *src_mcfg, | |
676 | struct skl_module_cfg *dst_mcfg) | |
677 | { | |
678 | int ret; | |
679 | struct skl_ipc_bind_unbind_msg msg; | |
680 | struct skl_module_inst_id src_id = src_mcfg->id; | |
681 | struct skl_module_inst_id dst_id = dst_mcfg->id; | |
682 | int in_max = dst_mcfg->max_in_queue; | |
683 | int out_max = src_mcfg->max_out_queue; | |
4f745708 | 684 | int src_index, dst_index, src_pin_state, dst_pin_state; |
beb73b26 JK |
685 | |
686 | skl_dump_bind_info(ctx, src_mcfg, dst_mcfg); | |
687 | ||
beb73b26 JK |
688 | /* get src queue index */ |
689 | src_index = skl_get_queue_index(src_mcfg->m_out_pin, dst_id, out_max); | |
690 | if (src_index < 0) | |
691 | return -EINVAL; | |
692 | ||
4f745708 | 693 | msg.src_queue = src_index; |
beb73b26 JK |
694 | |
695 | /* get dst queue index */ | |
696 | dst_index = skl_get_queue_index(dst_mcfg->m_in_pin, src_id, in_max); | |
697 | if (dst_index < 0) | |
698 | return -EINVAL; | |
699 | ||
4f745708 JK |
700 | msg.dst_queue = dst_index; |
701 | ||
702 | src_pin_state = src_mcfg->m_out_pin[src_index].pin_state; | |
703 | dst_pin_state = dst_mcfg->m_in_pin[dst_index].pin_state; | |
704 | ||
705 | if (src_pin_state != SKL_PIN_BIND_DONE || | |
706 | dst_pin_state != SKL_PIN_BIND_DONE) | |
707 | return 0; | |
beb73b26 JK |
708 | |
709 | msg.module_id = src_mcfg->id.module_id; | |
710 | msg.instance_id = src_mcfg->id.instance_id; | |
711 | msg.dst_module_id = dst_mcfg->id.module_id; | |
712 | msg.dst_instance_id = dst_mcfg->id.instance_id; | |
713 | msg.bind = false; | |
714 | ||
715 | ret = skl_ipc_bind_unbind(&ctx->ipc, &msg); | |
716 | if (!ret) { | |
beb73b26 JK |
717 | /* free queue only if unbind is success */ |
718 | skl_free_queue(src_mcfg->m_out_pin, src_index); | |
719 | skl_free_queue(dst_mcfg->m_in_pin, dst_index); | |
4f745708 JK |
720 | |
721 | /* | |
722 | * check only if src module bind state, bind is | |
723 | * always from src -> sink | |
724 | */ | |
725 | skl_clear_module_state(src_mcfg->m_out_pin, out_max, src_mcfg); | |
beb73b26 JK |
726 | } |
727 | ||
728 | return ret; | |
729 | } | |
730 | ||
731 | /* | |
732 | * Once a module is instantiated it need to be 'bind' with other modules in | |
733 | * the pipeline. For binding we need to find the module pins which are bind | |
734 | * together | |
735 | * This function finds the pins and then sends bund_unbind IPC message to | |
736 | * DSP using IPC helper | |
737 | */ | |
738 | int skl_bind_modules(struct skl_sst *ctx, | |
739 | struct skl_module_cfg *src_mcfg, | |
740 | struct skl_module_cfg *dst_mcfg) | |
741 | { | |
742 | int ret; | |
743 | struct skl_ipc_bind_unbind_msg msg; | |
beb73b26 JK |
744 | int in_max = dst_mcfg->max_in_queue; |
745 | int out_max = src_mcfg->max_out_queue; | |
746 | int src_index, dst_index; | |
747 | ||
748 | skl_dump_bind_info(ctx, src_mcfg, dst_mcfg); | |
749 | ||
750 | if (src_mcfg->m_state < SKL_MODULE_INIT_DONE && | |
751 | dst_mcfg->m_state < SKL_MODULE_INIT_DONE) | |
752 | return 0; | |
753 | ||
4f745708 | 754 | src_index = skl_alloc_queue(src_mcfg->m_out_pin, dst_mcfg, out_max); |
beb73b26 JK |
755 | if (src_index < 0) |
756 | return -EINVAL; | |
757 | ||
4f745708 JK |
758 | msg.src_queue = src_index; |
759 | dst_index = skl_alloc_queue(dst_mcfg->m_in_pin, src_mcfg, in_max); | |
beb73b26 JK |
760 | if (dst_index < 0) { |
761 | skl_free_queue(src_mcfg->m_out_pin, src_index); | |
762 | return -EINVAL; | |
763 | } | |
764 | ||
4f745708 | 765 | msg.dst_queue = dst_index; |
beb73b26 JK |
766 | |
767 | dev_dbg(ctx->dev, "src queue = %d dst queue =%d\n", | |
768 | msg.src_queue, msg.dst_queue); | |
769 | ||
770 | msg.module_id = src_mcfg->id.module_id; | |
771 | msg.instance_id = src_mcfg->id.instance_id; | |
772 | msg.dst_module_id = dst_mcfg->id.module_id; | |
773 | msg.dst_instance_id = dst_mcfg->id.instance_id; | |
774 | msg.bind = true; | |
775 | ||
776 | ret = skl_ipc_bind_unbind(&ctx->ipc, &msg); | |
777 | ||
778 | if (!ret) { | |
779 | src_mcfg->m_state = SKL_MODULE_BIND_DONE; | |
4f745708 JK |
780 | src_mcfg->m_out_pin[src_index].pin_state = SKL_PIN_BIND_DONE; |
781 | dst_mcfg->m_in_pin[dst_index].pin_state = SKL_PIN_BIND_DONE; | |
beb73b26 JK |
782 | } else { |
783 | /* error case , if IPC fails, clear the queue index */ | |
784 | skl_free_queue(src_mcfg->m_out_pin, src_index); | |
785 | skl_free_queue(dst_mcfg->m_in_pin, dst_index); | |
786 | } | |
787 | ||
788 | return ret; | |
789 | } | |
c9b1e834 JK |
790 | |
791 | static int skl_set_pipe_state(struct skl_sst *ctx, struct skl_pipe *pipe, | |
792 | enum skl_ipc_pipeline_state state) | |
793 | { | |
794 | dev_dbg(ctx->dev, "%s: pipe_satate = %d\n", __func__, state); | |
795 | ||
796 | return skl_ipc_set_pipeline_state(&ctx->ipc, pipe->ppl_id, state); | |
797 | } | |
798 | ||
799 | /* | |
800 | * A pipeline is a collection of modules. Before a module in instantiated a | |
801 | * pipeline needs to be created for it. | |
802 | * This function creates pipeline, by sending create pipeline IPC messages | |
803 | * to FW | |
804 | */ | |
805 | int skl_create_pipeline(struct skl_sst *ctx, struct skl_pipe *pipe) | |
806 | { | |
807 | int ret; | |
808 | ||
809 | dev_dbg(ctx->dev, "%s: pipe_id = %d\n", __func__, pipe->ppl_id); | |
810 | ||
811 | ret = skl_ipc_create_pipeline(&ctx->ipc, pipe->memory_pages, | |
812 | pipe->pipe_priority, pipe->ppl_id); | |
813 | if (ret < 0) { | |
814 | dev_err(ctx->dev, "Failed to create pipeline\n"); | |
815 | return ret; | |
816 | } | |
817 | ||
818 | pipe->state = SKL_PIPE_CREATED; | |
819 | ||
820 | return 0; | |
821 | } | |
822 | ||
823 | /* | |
824 | * A pipeline needs to be deleted on cleanup. If a pipeline is running, then | |
825 | * pause the pipeline first and then delete it | |
826 | * The pipe delete is done by sending delete pipeline IPC. DSP will stop the | |
827 | * DMA engines and releases resources | |
828 | */ | |
829 | int skl_delete_pipe(struct skl_sst *ctx, struct skl_pipe *pipe) | |
830 | { | |
831 | int ret; | |
832 | ||
833 | dev_dbg(ctx->dev, "%s: pipe = %d\n", __func__, pipe->ppl_id); | |
834 | ||
835 | /* If pipe is not started, do not try to stop the pipe in FW. */ | |
836 | if (pipe->state > SKL_PIPE_STARTED) { | |
837 | ret = skl_set_pipe_state(ctx, pipe, PPL_PAUSED); | |
838 | if (ret < 0) { | |
839 | dev_err(ctx->dev, "Failed to stop pipeline\n"); | |
840 | return ret; | |
841 | } | |
842 | ||
843 | pipe->state = SKL_PIPE_PAUSED; | |
844 | } else { | |
845 | /* If pipe was not created in FW, do not try to delete it */ | |
846 | if (pipe->state < SKL_PIPE_CREATED) | |
847 | return 0; | |
848 | ||
849 | ret = skl_ipc_delete_pipeline(&ctx->ipc, pipe->ppl_id); | |
850 | if (ret < 0) | |
851 | dev_err(ctx->dev, "Failed to delete pipeline\n"); | |
852 | } | |
853 | ||
854 | return ret; | |
855 | } | |
856 | ||
857 | /* | |
858 | * A pipeline is also a scheduling entity in DSP which can be run, stopped | |
859 | * For processing data the pipe need to be run by sending IPC set pipe state | |
860 | * to DSP | |
861 | */ | |
862 | int skl_run_pipe(struct skl_sst *ctx, struct skl_pipe *pipe) | |
863 | { | |
864 | int ret; | |
865 | ||
866 | dev_dbg(ctx->dev, "%s: pipe = %d\n", __func__, pipe->ppl_id); | |
867 | ||
868 | /* If pipe was not created in FW, do not try to pause or delete */ | |
869 | if (pipe->state < SKL_PIPE_CREATED) | |
870 | return 0; | |
871 | ||
872 | /* Pipe has to be paused before it is started */ | |
873 | ret = skl_set_pipe_state(ctx, pipe, PPL_PAUSED); | |
874 | if (ret < 0) { | |
875 | dev_err(ctx->dev, "Failed to pause pipe\n"); | |
876 | return ret; | |
877 | } | |
878 | ||
879 | pipe->state = SKL_PIPE_PAUSED; | |
880 | ||
881 | ret = skl_set_pipe_state(ctx, pipe, PPL_RUNNING); | |
882 | if (ret < 0) { | |
883 | dev_err(ctx->dev, "Failed to start pipe\n"); | |
884 | return ret; | |
885 | } | |
886 | ||
887 | pipe->state = SKL_PIPE_STARTED; | |
888 | ||
889 | return 0; | |
890 | } | |
891 | ||
892 | /* | |
893 | * Stop the pipeline by sending set pipe state IPC | |
894 | * DSP doesnt implement stop so we always send pause message | |
895 | */ | |
896 | int skl_stop_pipe(struct skl_sst *ctx, struct skl_pipe *pipe) | |
897 | { | |
898 | int ret; | |
899 | ||
900 | dev_dbg(ctx->dev, "In %s pipe=%d\n", __func__, pipe->ppl_id); | |
901 | ||
902 | /* If pipe was not created in FW, do not try to pause or delete */ | |
903 | if (pipe->state < SKL_PIPE_PAUSED) | |
904 | return 0; | |
905 | ||
906 | ret = skl_set_pipe_state(ctx, pipe, PPL_PAUSED); | |
907 | if (ret < 0) { | |
908 | dev_dbg(ctx->dev, "Failed to stop pipe\n"); | |
909 | return ret; | |
910 | } | |
911 | ||
912 | pipe->state = SKL_PIPE_CREATED; | |
913 | ||
914 | return 0; | |
915 | } | |
9939a9c3 JK |
916 | |
917 | /* Algo parameter set helper function */ | |
918 | int skl_set_module_params(struct skl_sst *ctx, u32 *params, int size, | |
919 | u32 param_id, struct skl_module_cfg *mcfg) | |
920 | { | |
921 | struct skl_ipc_large_config_msg msg; | |
922 | ||
923 | msg.module_id = mcfg->id.module_id; | |
924 | msg.instance_id = mcfg->id.instance_id; | |
925 | msg.param_data_size = size; | |
926 | msg.large_param_id = param_id; | |
927 | ||
928 | return skl_ipc_set_large_config(&ctx->ipc, &msg, params); | |
929 | } |