[deliverable/linux.git] / sound / soc / omap / omap-pcm.c

/*
 * omap-pcm.c  --  ALSA PCM interface for the OMAP SoC
 *
 * Copyright (C) 2008 Nokia Corporation
 *
 * Contact: Jarkko Nikula <jarkko.nikula@bitmer.com>
 *          Peter Ujfalusi <peter.ujfalusi@ti.com>
 *
 * This program is free software; you can redistribute it and/or
 * modify it under the terms of the GNU General Public License
 * version 2 as published by the Free Software Foundation.
 *
 * This program is distributed in the hope that it will be useful, but
 * WITHOUT ANY WARRANTY; without even the implied warranty of
 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
 * General Public License for more details.
 *
 * You should have received a copy of the GNU General Public License
 * along with this program; if not, write to the Free Software
 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA
 * 02110-1301 USA
 *
 */

#include <linux/dma-mapping.h>
#include <linux/slab.h>
#include <sound/core.h>
#include <sound/pcm.h>
#include <sound/pcm_params.h>
#include <sound/soc.h>

#include <plat/dma.h>
#include "omap-pcm.h"

static const struct snd_pcm_hardware omap_pcm_hardware = {
	.info			= SNDRV_PCM_INFO_MMAP |
				  SNDRV_PCM_INFO_MMAP_VALID |
				  SNDRV_PCM_INFO_INTERLEAVED |
				  SNDRV_PCM_INFO_PAUSE |
				  SNDRV_PCM_INFO_RESUME |
				  SNDRV_PCM_INFO_NO_PERIOD_WAKEUP,
	.formats		= SNDRV_PCM_FMTBIT_S16_LE |
				  SNDRV_PCM_FMTBIT_S32_LE,
	.period_bytes_min	= 32,
	.period_bytes_max	= 64 * 1024,
	.periods_min		= 2,
	.periods_max		= 255,
	.buffer_bytes_max	= 128 * 1024,
};

struct omap_runtime_data {
	spinlock_t			lock;
	struct omap_pcm_dma_data	*dma_data;
	int				dma_ch;
	int				period_index;
};

static void omap_pcm_dma_irq(int ch, u16 stat, void *data)
{
	struct snd_pcm_substream *substream = data;
	struct snd_pcm_runtime *runtime = substream->runtime;
	struct omap_runtime_data *prtd = runtime->private_data;
	unsigned long flags;

	if ((cpu_is_omap1510())) {
		/*
		 * OMAP1510 doesn't fully support DMA progress counter
		 * and there is no software emulation implemented yet,
		 * so have to maintain our own progress counters
		 * that can be used by omap_pcm_pointer() instead.
		 */
		spin_lock_irqsave(&prtd->lock, flags);
		if ((stat == OMAP_DMA_LAST_IRQ) &&
				(prtd->period_index == runtime->periods - 1)) {
			/* we are in sync, do nothing */
			spin_unlock_irqrestore(&prtd->lock, flags);
			return;
		}
		if (prtd->period_index >= 0) {
			if (stat & OMAP_DMA_BLOCK_IRQ) {
				/* end of buffer reached, loop back */
				prtd->period_index = 0;
			} else if (stat & OMAP_DMA_LAST_IRQ) {
				/* update the counter for the last period */
				prtd->period_index = runtime->periods - 1;
			} else if (++prtd->period_index >= runtime->periods) {
				/* end of buffer missed? loop back */
				prtd->period_index = 0;
			}
		}
		spin_unlock_irqrestore(&prtd->lock, flags);
	}

	snd_pcm_period_elapsed(substream);
}

/* this may get called several times by oss emulation */
static int omap_pcm_hw_params(struct snd_pcm_substream *substream,
			      struct snd_pcm_hw_params *params)
{
	struct snd_pcm_runtime *runtime = substream->runtime;
	struct snd_soc_pcm_runtime *rtd = substream->private_data;
	struct omap_runtime_data *prtd = runtime->private_data;
	struct omap_pcm_dma_data *dma_data;

	int err = 0;

	dma_data = snd_soc_dai_get_dma_data(rtd->cpu_dai, substream);

	/* return if this is a bufferless transfer e.g.
	 * codec <--> BT codec or GSM modem -- lg FIXME */
	if (!dma_data)
		return 0;

	snd_pcm_set_runtime_buffer(substream, &substream->dma_buffer);
	runtime->dma_bytes = params_buffer_bytes(params);

	if (prtd->dma_data)
		return 0;
	prtd->dma_data = dma_data;
	err = omap_request_dma(dma_data->dma_req, dma_data->name,
			       omap_pcm_dma_irq, substream, &prtd->dma_ch);
	if (!err) {
		/*
		 * Link channel with itself so DMA doesn't need any
		 * reprogramming while looping the buffer
		 */
		omap_dma_link_lch(prtd->dma_ch, prtd->dma_ch);
	}

	return err;
}

static int omap_pcm_hw_free(struct snd_pcm_substream *substream)
{
	struct snd_pcm_runtime *runtime = substream->runtime;
	struct omap_runtime_data *prtd = runtime->private_data;

	if (prtd->dma_data == NULL)
		return 0;

	omap_dma_unlink_lch(prtd->dma_ch, prtd->dma_ch);
	omap_free_dma(prtd->dma_ch);
	prtd->dma_data = NULL;

	snd_pcm_set_runtime_buffer(substream, NULL);

	return 0;
}

static int omap_pcm_prepare(struct snd_pcm_substream *substream)
{
	struct snd_pcm_runtime *runtime = substream->runtime;
	struct omap_runtime_data *prtd = runtime->private_data;
	struct omap_pcm_dma_data *dma_data = prtd->dma_data;
	struct omap_dma_channel_params dma_params;
	int bytes;

	/* return if this is a bufferless transfer e.g.
	 * codec <--> BT codec or GSM modem -- lg FIXME */
	if (!prtd->dma_data)
		return 0;

	memset(&dma_params, 0, sizeof(dma_params));
	dma_params.data_type			= dma_data->data_type;
	dma_params.trigger			= dma_data->dma_req;
	dma_params.sync_mode			= dma_data->sync_mode;
	if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) {
		dma_params.src_amode		= OMAP_DMA_AMODE_POST_INC;
		dma_params.dst_amode		= OMAP_DMA_AMODE_CONSTANT;
		dma_params.src_or_dst_synch	= OMAP_DMA_DST_SYNC;
		dma_params.src_start		= runtime->dma_addr;
		dma_params.dst_start		= dma_data->port_addr;
		dma_params.dst_port		= OMAP_DMA_PORT_MPUI;
		dma_params.dst_fi		= dma_data->packet_size;
	} else {
		dma_params.src_amode		= OMAP_DMA_AMODE_CONSTANT;
		dma_params.dst_amode		= OMAP_DMA_AMODE_POST_INC;
		dma_params.src_or_dst_synch	= OMAP_DMA_SRC_SYNC;
		dma_params.src_start		= dma_data->port_addr;
		dma_params.dst_start		= runtime->dma_addr;
		dma_params.src_port		= OMAP_DMA_PORT_MPUI;
		dma_params.src_fi		= dma_data->packet_size;
	}
	/*
	 * Set DMA transfer frame size equal to ALSA period size and frame
	 * count as no. of ALSA periods. Then with DMA frame interrupt enabled,
	 * we can transfer the whole ALSA buffer with single DMA transfer but
	 * still can get an interrupt at each period bounary
	 */
	bytes = snd_pcm_lib_period_bytes(substream);
	dma_params.elem_count	= bytes >> dma_data->data_type;
	dma_params.frame_count	= runtime->periods;
	omap_set_dma_params(prtd->dma_ch, &dma_params);

	if ((cpu_is_omap1510()))
		omap_enable_dma_irq(prtd->dma_ch, OMAP_DMA_FRAME_IRQ |
			      OMAP_DMA_LAST_IRQ | OMAP_DMA_BLOCK_IRQ);
	else if (!substream->runtime->no_period_wakeup)
		omap_enable_dma_irq(prtd->dma_ch, OMAP_DMA_FRAME_IRQ);
	else {
		/*
		 * No period wakeup:
		 * we need to disable BLOCK_IRQ, which is enabled by the omap
		 * dma core at request dma time.
		 */
		omap_disable_dma_irq(prtd->dma_ch, OMAP_DMA_BLOCK_IRQ);
	}

	if (!(cpu_class_is_omap1())) {
		omap_set_dma_src_burst_mode(prtd->dma_ch,
						OMAP_DMA_DATA_BURST_16);
		omap_set_dma_dest_burst_mode(prtd->dma_ch,
						OMAP_DMA_DATA_BURST_16);
	}

	return 0;
}

static int omap_pcm_trigger(struct snd_pcm_substream *substream, int cmd)
{
	struct snd_pcm_runtime *runtime = substream->runtime;
	struct omap_runtime_data *prtd = runtime->private_data;
	struct omap_pcm_dma_data *dma_data = prtd->dma_data;
	unsigned long flags;
	int ret = 0;

	spin_lock_irqsave(&prtd->lock, flags);
	switch (cmd) {
	case SNDRV_PCM_TRIGGER_START:
	case SNDRV_PCM_TRIGGER_RESUME:
	case SNDRV_PCM_TRIGGER_PAUSE_RELEASE:
		prtd->period_index = 0;
		/* Configure McBSP internal buffer usage */
		if (dma_data->set_threshold)
			dma_data->set_threshold(substream);

		omap_start_dma(prtd->dma_ch);
		break;

	case SNDRV_PCM_TRIGGER_STOP:
	case SNDRV_PCM_TRIGGER_SUSPEND:
	case SNDRV_PCM_TRIGGER_PAUSE_PUSH:
		prtd->period_index = -1;
		omap_stop_dma(prtd->dma_ch);
		break;
	default:
		ret = -EINVAL;
	}
	spin_unlock_irqrestore(&prtd->lock, flags);

	return ret;
}

static snd_pcm_uframes_t omap_pcm_pointer(struct snd_pcm_substream *substream)
{
	struct snd_pcm_runtime *runtime = substream->runtime;
	struct omap_runtime_data *prtd = runtime->private_data;
	dma_addr_t ptr;
	snd_pcm_uframes_t offset;

	if (cpu_is_omap1510()) {
		offset = prtd->period_index * runtime->period_size;
	} else if (substream->stream == SNDRV_PCM_STREAM_CAPTURE) {
		ptr = omap_get_dma_dst_pos(prtd->dma_ch);
		offset = bytes_to_frames(runtime, ptr - runtime->dma_addr);
	} else {
		ptr = omap_get_dma_src_pos(prtd->dma_ch);
		offset = bytes_to_frames(runtime, ptr - runtime->dma_addr);
	}

	if (offset >= runtime->buffer_size)
		offset = 0;

	return offset;
}

static int omap_pcm_open(struct snd_pcm_substream *substream)
{
	struct snd_pcm_runtime *runtime = substream->runtime;
	struct omap_runtime_data *prtd;
	int ret;

	snd_soc_set_runtime_hwparams(substream, &omap_pcm_hardware);

	/* Ensure that buffer size is a multiple of period size */
	ret = snd_pcm_hw_constraint_integer(runtime,
					    SNDRV_PCM_HW_PARAM_PERIODS);
	if (ret < 0)
		goto out;

	prtd = kzalloc(sizeof(*prtd), GFP_KERNEL);
	if (prtd == NULL) {
		ret = -ENOMEM;
		goto out;
	}
	spin_lock_init(&prtd->lock);
	runtime->private_data = prtd;

out:
	return ret;
}

static int omap_pcm_close(struct snd_pcm_substream *substream)
{
	struct snd_pcm_runtime *runtime = substream->runtime;

	kfree(runtime->private_data);
	return 0;
}

static int omap_pcm_mmap(struct snd_pcm_substream *substream,
	struct vm_area_struct *vma)
{
	struct snd_pcm_runtime *runtime = substream->runtime;

	return dma_mmap_writecombine(substream->pcm->card->dev, vma,
				     runtime->dma_area,
				     runtime->dma_addr,
				     runtime->dma_bytes);
}

static struct snd_pcm_ops omap_pcm_ops = {
	.open		= omap_pcm_open,
	.close		= omap_pcm_close,
	.ioctl		= snd_pcm_lib_ioctl,
	.hw_params	= omap_pcm_hw_params,
	.hw_free	= omap_pcm_hw_free,
	.prepare	= omap_pcm_prepare,
	.trigger	= omap_pcm_trigger,
	.pointer	= omap_pcm_pointer,
	.mmap		= omap_pcm_mmap,
};

static u64 omap_pcm_dmamask = DMA_BIT_MASK(64);

static int omap_pcm_preallocate_dma_buffer(struct snd_pcm *pcm,
	int stream)
{
	struct snd_pcm_substream *substream = pcm->streams[stream].substream;
	struct snd_dma_buffer *buf = &substream->dma_buffer;
	size_t size = omap_pcm_hardware.buffer_bytes_max;

	buf->dev.type = SNDRV_DMA_TYPE_DEV;
	buf->dev.dev = pcm->card->dev;
	buf->private_data = NULL;
	buf->area = dma_alloc_writecombine(pcm->card->dev, size,
					   &buf->addr, GFP_KERNEL);
	if (!buf->area)
		return -ENOMEM;

	buf->bytes = size;
	return 0;
}

static void omap_pcm_free_dma_buffers(struct snd_pcm *pcm)
{
	struct snd_pcm_substream *substream;
	struct snd_dma_buffer *buf;
	int stream;

	for (stream = 0; stream < 2; stream++) {
		substream = pcm->streams[stream].substream;
		if (!substream)
			continue;

		buf = &substream->dma_buffer;
		if (!buf->area)
			continue;

		dma_free_writecombine(pcm->card->dev, buf->bytes,
				      buf->area, buf->addr);
		buf->area = NULL;
	}
}

static int omap_pcm_new(struct snd_soc_pcm_runtime *rtd)
{
	struct snd_card *card = rtd->card->snd_card;
	struct snd_soc_dai *dai = rtd->cpu_dai;
	struct snd_pcm *pcm = rtd->pcm;
	int ret = 0;

	if (!card->dev->dma_mask)
		card->dev->dma_mask = &omap_pcm_dmamask;
	if (!card->dev->coherent_dma_mask)
		card->dev->coherent_dma_mask = DMA_BIT_MASK(64);

	if (dai->driver->playback.channels_min) {
		ret = omap_pcm_preallocate_dma_buffer(pcm,
			SNDRV_PCM_STREAM_PLAYBACK);
		if (ret)
			goto out;
	}

	if (dai->driver->capture.channels_min) {
		ret = omap_pcm_preallocate_dma_buffer(pcm,
			SNDRV_PCM_STREAM_CAPTURE);
		if (ret)
			goto out;
	}

out:
	return ret;
}

static struct snd_soc_platform_driver omap_soc_platform = {
	.ops		= &omap_pcm_ops,
	.pcm_new	= omap_pcm_new,
	.pcm_free	= omap_pcm_free_dma_buffers,
};

static __devinit int omap_pcm_probe(struct platform_device *pdev)
{
	return snd_soc_register_platform(&pdev->dev,
			&omap_soc_platform);
}

static int __devexit omap_pcm_remove(struct platform_device *pdev)
{
	snd_soc_unregister_platform(&pdev->dev);
	return 0;
}

static struct platform_driver omap_pcm_driver = {
	.driver = {
			.name = "omap-pcm-audio",
			.owner = THIS_MODULE,
	},

	.probe = omap_pcm_probe,
	.remove = __devexit_p(omap_pcm_remove),
};

static int __init snd_omap_pcm_init(void)
{
	return platform_driver_register(&omap_pcm_driver);
}
module_init(snd_omap_pcm_init);

static void __exit snd_omap_pcm_exit(void)
{
	platform_driver_unregister(&omap_pcm_driver);
}
module_exit(snd_omap_pcm_exit);

MODULE_AUTHOR("Jarkko Nikula <jarkko.nikula@bitmer.com>");
MODULE_DESCRIPTION("OMAP PCM DMA module");
MODULE_LICENSE("GPL");
Commit	Line	Data
2e74796a JN	1	/*
	2	* omap-pcm.c -- ALSA PCM interface for the OMAP SoC
	3	*
	4	* Copyright (C) 2008 Nokia Corporation
	5	*
7ec41ee5	6	* Contact: Jarkko Nikula <jarkko.nikula@bitmer.com>
1c7687b9	7	* Peter Ujfalusi <peter.ujfalusi@ti.com>
2e74796a JN	8	*
	9	* This program is free software; you can redistribute it and/or
	10	* modify it under the terms of the GNU General Public License
	11	* version 2 as published by the Free Software Foundation.
	12	*
	13	* This program is distributed in the hope that it will be useful, but
	14	* WITHOUT ANY WARRANTY; without even the implied warranty of
	15	* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
	16	* General Public License for more details.
	17	*
	18	* You should have received a copy of the GNU General Public License
	19	* along with this program; if not, write to the Free Software
	20	* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA
	21	* 02110-1301 USA
	22	*
	23	*/
	24
	25	#include <linux/dma-mapping.h>
5a0e3ad6	26	#include <linux/slab.h>
2e74796a JN	27	#include <sound/core.h>
	28	#include <sound/pcm.h>
	29	#include <sound/pcm_params.h>
	30	#include <sound/soc.h>
	31
ce491cf8	32	#include <plat/dma.h>
2e74796a JN	33	#include "omap-pcm.h"
	34
	35	static const struct snd_pcm_hardware omap_pcm_hardware = {
	36	.info = SNDRV_PCM_INFO_MMAP \|
	37	SNDRV_PCM_INFO_MMAP_VALID \|
	38	SNDRV_PCM_INFO_INTERLEAVED \|
	39	SNDRV_PCM_INFO_PAUSE \|
b4173824 PU	40	SNDRV_PCM_INFO_RESUME \|
b4173824 PU	41	SNDRV_PCM_INFO_NO_PERIOD_WAKEUP,
e17dd32f MLC	42	.formats = SNDRV_PCM_FMTBIT_S16_LE \|
e17dd32f MLC	43	SNDRV_PCM_FMTBIT_S32_LE,
2e74796a JN	44	.period_bytes_min = 32,
	45	.period_bytes_max = 64 * 1024,
	46	.periods_min = 2,
	47	.periods_max = 255,
	48	.buffer_bytes_max = 128 * 1024,
	49	};
	50
	51	struct omap_runtime_data {
	52	spinlock_t lock;
	53	struct omap_pcm_dma_data *dma_data;
	54	int dma_ch;
	55	int period_index;
	56	};
	57
	58	static void omap_pcm_dma_irq(int ch, u16 stat, void *data)
	59	{
	60	struct snd_pcm_substream *substream = data;
	61	struct snd_pcm_runtime *runtime = substream->runtime;
	62	struct omap_runtime_data *prtd = runtime->private_data;
	63	unsigned long flags;
	64
b5442a75	65	if ((cpu_is_omap1510())) {
2e74796a	66	/*
64844a6a JK	67	* OMAP1510 doesn't fully support DMA progress counter
64844a6a JK	68	* and there is no software emulation implemented yet,
b5442a75	69	* so have to maintain our own progress counters
64844a6a	70	* that can be used by omap_pcm_pointer() instead.
2e74796a JN	71	*/
2e74796a JN	72	spin_lock_irqsave(&prtd->lock, flags);
471e3dec JK	73	if ((stat == OMAP_DMA_LAST_IRQ) &&
	74	(prtd->period_index == runtime->periods - 1)) {
	75	/* we are in sync, do nothing */
	76	spin_unlock_irqrestore(&prtd->lock, flags);
	77	return;
	78	}
2e74796a	79	if (prtd->period_index >= 0) {
471e3dec JK	80	if (stat & OMAP_DMA_BLOCK_IRQ) {
	81	/* end of buffer reached, loop back */
	82	prtd->period_index = 0;
	83	} else if (stat & OMAP_DMA_LAST_IRQ) {
	84	/* update the counter for the last period */
	85	prtd->period_index = runtime->periods - 1;
	86	} else if (++prtd->period_index >= runtime->periods) {
	87	/* end of buffer missed? loop back */
2e74796a	88	prtd->period_index = 0;
2e74796a JN	89	}
	90	}
	91	spin_unlock_irqrestore(&prtd->lock, flags);
	92	}
	93
	94	snd_pcm_period_elapsed(substream);
	95	}
	96
	97	/* this may get called several times by oss emulation */
	98	static int omap_pcm_hw_params(struct snd_pcm_substream *substream,
	99	struct snd_pcm_hw_params *params)
	100	{
	101	struct snd_pcm_runtime *runtime = substream->runtime;
	102	struct snd_soc_pcm_runtime *rtd = substream->private_data;
	103	struct omap_runtime_data *prtd = runtime->private_data;
5f712b2b	104	struct omap_pcm_dma_data *dma_data;
f0fba2ad	105
2e74796a JN	106	int err = 0;
2e74796a JN	107
f0fba2ad	108	dma_data = snd_soc_dai_get_dma_data(rtd->cpu_dai, substream);
5f712b2b	109
1b4246a1 JS	110	/* return if this is a bufferless transfer e.g.
1b4246a1 JS	111	* codec <--> BT codec or GSM modem -- lg FIXME */
2e74796a	112	if (!dma_data)
1b4246a1	113	return 0;
2e74796a JN	114
	115	snd_pcm_set_runtime_buffer(substream, &substream->dma_buffer);
	116	runtime->dma_bytes = params_buffer_bytes(params);
	117
	118	if (prtd->dma_data)
	119	return 0;
	120	prtd->dma_data = dma_data;
	121	err = omap_request_dma(dma_data->dma_req, dma_data->name,
	122	omap_pcm_dma_irq, substream, &prtd->dma_ch);
64844a6a	123	if (!err) {
2e74796a JN	124	/*
	125	* Link channel with itself so DMA doesn't need any
	126	* reprogramming while looping the buffer
	127	*/
	128	omap_dma_link_lch(prtd->dma_ch, prtd->dma_ch);
	129	}
	130
	131	return err;
	132	}
	133
	134	static int omap_pcm_hw_free(struct snd_pcm_substream *substream)
	135	{
	136	struct snd_pcm_runtime *runtime = substream->runtime;
	137	struct omap_runtime_data *prtd = runtime->private_data;
	138
	139	if (prtd->dma_data == NULL)
	140	return 0;
	141
64844a6a	142	omap_dma_unlink_lch(prtd->dma_ch, prtd->dma_ch);
2e74796a JN	143	omap_free_dma(prtd->dma_ch);
	144	prtd->dma_data = NULL;
	145
	146	snd_pcm_set_runtime_buffer(substream, NULL);
	147
	148	return 0;
	149	}
	150
	151	static int omap_pcm_prepare(struct snd_pcm_substream *substream)
	152	{
	153	struct snd_pcm_runtime *runtime = substream->runtime;
	154	struct omap_runtime_data *prtd = runtime->private_data;
	155	struct omap_pcm_dma_data *dma_data = prtd->dma_data;
	156	struct omap_dma_channel_params dma_params;
e17dd32f	157	int bytes;
2e74796a	158
1b4246a1 JS	159	/* return if this is a bufferless transfer e.g.
	160	* codec <--> BT codec or GSM modem -- lg FIXME */
	161	if (!prtd->dma_data)
	162	return 0;
	163
2e74796a	164	memset(&dma_params, 0, sizeof(dma_params));
e17dd32f	165	dma_params.data_type = dma_data->data_type;
2e74796a	166	dma_params.trigger = dma_data->dma_req;
caebc0cb	167	dma_params.sync_mode = dma_data->sync_mode;
2e74796a JN	168	if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) {
	169	dma_params.src_amode = OMAP_DMA_AMODE_POST_INC;
	170	dma_params.dst_amode = OMAP_DMA_AMODE_CONSTANT;
	171	dma_params.src_or_dst_synch = OMAP_DMA_DST_SYNC;
	172	dma_params.src_start = runtime->dma_addr;
	173	dma_params.dst_start = dma_data->port_addr;
9d37484c	174	dma_params.dst_port = OMAP_DMA_PORT_MPUI;
e17dd32f	175	dma_params.dst_fi = dma_data->packet_size;
2e74796a JN	176	} else {
	177	dma_params.src_amode = OMAP_DMA_AMODE_CONSTANT;
	178	dma_params.dst_amode = OMAP_DMA_AMODE_POST_INC;
	179	dma_params.src_or_dst_synch = OMAP_DMA_SRC_SYNC;
	180	dma_params.src_start = dma_data->port_addr;
	181	dma_params.dst_start = runtime->dma_addr;
9d37484c	182	dma_params.src_port = OMAP_DMA_PORT_MPUI;
e17dd32f	183	dma_params.src_fi = dma_data->packet_size;
2e74796a JN	184	}
	185	/*
	186	* Set DMA transfer frame size equal to ALSA period size and frame
	187	* count as no. of ALSA periods. Then with DMA frame interrupt enabled,
	188	* we can transfer the whole ALSA buffer with single DMA transfer but
	189	* still can get an interrupt at each period bounary
	190	*/
e17dd32f MLC	191	bytes = snd_pcm_lib_period_bytes(substream);
e17dd32f MLC	192	dma_params.elem_count = bytes >> dma_data->data_type;
2e74796a JN	193	dma_params.frame_count = runtime->periods;
	194	omap_set_dma_params(prtd->dma_ch, &dma_params);
	195
b5442a75	196	if ((cpu_is_omap1510()))
471e3dec JK	197	omap_enable_dma_irq(prtd->dma_ch, OMAP_DMA_FRAME_IRQ \|
471e3dec JK	198	OMAP_DMA_LAST_IRQ \| OMAP_DMA_BLOCK_IRQ);
b4173824	199	else if (!substream->runtime->no_period_wakeup)
471e3dec	200	omap_enable_dma_irq(prtd->dma_ch, OMAP_DMA_FRAME_IRQ);
b1b6cffe PU	201	else {
	202	/*
	203	* No period wakeup:
	204	* we need to disable BLOCK_IRQ, which is enabled by the omap
	205	* dma core at request dma time.
	206	*/
	207	omap_disable_dma_irq(prtd->dma_ch, OMAP_DMA_BLOCK_IRQ);
	208	}
2e74796a	209
4d187fb8 JK	210	if (!(cpu_class_is_omap1())) {
	211	omap_set_dma_src_burst_mode(prtd->dma_ch,
	212	OMAP_DMA_DATA_BURST_16);
	213	omap_set_dma_dest_burst_mode(prtd->dma_ch,
	214	OMAP_DMA_DATA_BURST_16);
	215	}
9599d485	216
2e74796a JN	217	return 0;
	218	}
	219
	220	static int omap_pcm_trigger(struct snd_pcm_substream *substream, int cmd)
	221	{
	222	struct snd_pcm_runtime *runtime = substream->runtime;
	223	struct omap_runtime_data *prtd = runtime->private_data;
caebc0cb	224	struct omap_pcm_dma_data *dma_data = prtd->dma_data;
21dff434	225	unsigned long flags;
2e74796a JN	226	int ret = 0;
2e74796a JN	227
21dff434	228	spin_lock_irqsave(&prtd->lock, flags);
2e74796a JN	229	switch (cmd) {
	230	case SNDRV_PCM_TRIGGER_START:
	231	case SNDRV_PCM_TRIGGER_RESUME:
	232	case SNDRV_PCM_TRIGGER_PAUSE_RELEASE:
	233	prtd->period_index = 0;
caebc0cb EV	234	/* Configure McBSP internal buffer usage */
	235	if (dma_data->set_threshold)
	236	dma_data->set_threshold(substream);
	237
2e74796a JN	238	omap_start_dma(prtd->dma_ch);
	239	break;
	240
	241	case SNDRV_PCM_TRIGGER_STOP:
	242	case SNDRV_PCM_TRIGGER_SUSPEND:
	243	case SNDRV_PCM_TRIGGER_PAUSE_PUSH:
	244	prtd->period_index = -1;
	245	omap_stop_dma(prtd->dma_ch);
	246	break;
	247	default:
	248	ret = -EINVAL;
	249	}
21dff434	250	spin_unlock_irqrestore(&prtd->lock, flags);
2e74796a JN	251
	252	return ret;
	253	}
	254
	255	static snd_pcm_uframes_t omap_pcm_pointer(struct snd_pcm_substream *substream)
	256	{
	257	struct snd_pcm_runtime *runtime = substream->runtime;
	258	struct omap_runtime_data *prtd = runtime->private_data;
	259	dma_addr_t ptr;
	260	snd_pcm_uframes_t offset;
	261
b5442a75 JK	262	if (cpu_is_omap1510()) {
	263	offset = prtd->period_index * runtime->period_size;
	264	} else if (substream->stream == SNDRV_PCM_STREAM_CAPTURE) {
2e74796a	265	ptr = omap_get_dma_dst_pos(prtd->dma_ch);
1bdd7419	266	offset = bytes_to_frames(runtime, ptr - runtime->dma_addr);
b5442a75	267	} else {
1bdd7419 JK	268	ptr = omap_get_dma_src_pos(prtd->dma_ch);
1bdd7419 JK	269	offset = bytes_to_frames(runtime, ptr - runtime->dma_addr);
b5442a75	270	}
2e74796a	271
2e74796a JN	272	if (offset >= runtime->buffer_size)
	273	offset = 0;
	274
	275	return offset;
	276	}
	277
	278	static int omap_pcm_open(struct snd_pcm_substream *substream)
	279	{
	280	struct snd_pcm_runtime *runtime = substream->runtime;
	281	struct omap_runtime_data *prtd;
	282	int ret;
	283
	284	snd_soc_set_runtime_hwparams(substream, &omap_pcm_hardware);
	285
	286	/* Ensure that buffer size is a multiple of period size */
	287	ret = snd_pcm_hw_constraint_integer(runtime,
	288	SNDRV_PCM_HW_PARAM_PERIODS);
	289	if (ret < 0)
	290	goto out;
	291
19b3f316	292	prtd = kzalloc(sizeof(*prtd), GFP_KERNEL);
2e74796a JN	293	if (prtd == NULL) {
	294	ret = -ENOMEM;
	295	goto out;
	296	}
	297	spin_lock_init(&prtd->lock);
	298	runtime->private_data = prtd;
	299
	300	out:
	301	return ret;
	302	}
	303
	304	static int omap_pcm_close(struct snd_pcm_substream *substream)
	305	{
	306	struct snd_pcm_runtime *runtime = substream->runtime;
	307
	308	kfree(runtime->private_data);
	309	return 0;
	310	}
	311
	312	static int omap_pcm_mmap(struct snd_pcm_substream *substream,
	313	struct vm_area_struct *vma)
	314	{
	315	struct snd_pcm_runtime *runtime = substream->runtime;
	316
	317	return dma_mmap_writecombine(substream->pcm->card->dev, vma,
	318	runtime->dma_area,
	319	runtime->dma_addr,
	320	runtime->dma_bytes);
	321	}
	322
b2a19d02	323	static struct snd_pcm_ops omap_pcm_ops = {
2e74796a JN	324	.open = omap_pcm_open,
	325	.close = omap_pcm_close,
	326	.ioctl = snd_pcm_lib_ioctl,
	327	.hw_params = omap_pcm_hw_params,
	328	.hw_free = omap_pcm_hw_free,
	329	.prepare = omap_pcm_prepare,
	330	.trigger = omap_pcm_trigger,
	331	.pointer = omap_pcm_pointer,
	332	.mmap = omap_pcm_mmap,
	333	};
	334
a152ff24	335	static u64 omap_pcm_dmamask = DMA_BIT_MASK(64);
2e74796a JN	336
	337	static int omap_pcm_preallocate_dma_buffer(struct snd_pcm *pcm,
	338	int stream)
	339	{
	340	struct snd_pcm_substream *substream = pcm->streams[stream].substream;
	341	struct snd_dma_buffer *buf = &substream->dma_buffer;
	342	size_t size = omap_pcm_hardware.buffer_bytes_max;
	343
	344	buf->dev.type = SNDRV_DMA_TYPE_DEV;
	345	buf->dev.dev = pcm->card->dev;
	346	buf->private_data = NULL;
	347	buf->area = dma_alloc_writecombine(pcm->card->dev, size,
	348	&buf->addr, GFP_KERNEL);
	349	if (!buf->area)
	350	return -ENOMEM;
	351
	352	buf->bytes = size;
	353	return 0;
	354	}
	355
	356	static void omap_pcm_free_dma_buffers(struct snd_pcm *pcm)
	357	{
	358	struct snd_pcm_substream *substream;
	359	struct snd_dma_buffer *buf;
	360	int stream;
	361
	362	for (stream = 0; stream < 2; stream++) {
	363	substream = pcm->streams[stream].substream;
	364	if (!substream)
	365	continue;
	366
	367	buf = &substream->dma_buffer;
	368	if (!buf->area)
	369	continue;
	370
	371	dma_free_writecombine(pcm->card->dev, buf->bytes,
	372	buf->area, buf->addr);
	373	buf->area = NULL;
	374	}
	375	}
	376
552d1ef6	377	static int omap_pcm_new(struct snd_soc_pcm_runtime *rtd)
2e74796a	378	{
552d1ef6 LG	379	struct snd_card *card = rtd->card->snd_card;
	380	struct snd_soc_dai *dai = rtd->cpu_dai;
	381	struct snd_pcm *pcm = rtd->pcm;
2e74796a JN	382	int ret = 0;
	383
	384	if (!card->dev->dma_mask)
	385	card->dev->dma_mask = &omap_pcm_dmamask;
	386	if (!card->dev->coherent_dma_mask)
a152ff24	387	card->dev->coherent_dma_mask = DMA_BIT_MASK(64);
2e74796a	388
f0fba2ad	389	if (dai->driver->playback.channels_min) {
2e74796a JN	390	ret = omap_pcm_preallocate_dma_buffer(pcm,
	391	SNDRV_PCM_STREAM_PLAYBACK);
	392	if (ret)
	393	goto out;
	394	}
	395
f0fba2ad	396	if (dai->driver->capture.channels_min) {
2e74796a JN	397	ret = omap_pcm_preallocate_dma_buffer(pcm,
	398	SNDRV_PCM_STREAM_CAPTURE);
	399	if (ret)
	400	goto out;
	401	}
	402
	403	out:
	404	return ret;
	405	}
	406
f0fba2ad LG	407	static struct snd_soc_platform_driver omap_soc_platform = {
f0fba2ad LG	408	.ops = &omap_pcm_ops,
2e74796a JN	409	.pcm_new = omap_pcm_new,
	410	.pcm_free = omap_pcm_free_dma_buffers,
	411	};
2e74796a	412
f0fba2ad LG	413	static __devinit int omap_pcm_probe(struct platform_device *pdev)
	414	{
	415	return snd_soc_register_platform(&pdev->dev,
	416	&omap_soc_platform);
	417	}
	418
	419	static int __devexit omap_pcm_remove(struct platform_device *pdev)
	420	{
	421	snd_soc_unregister_platform(&pdev->dev);
	422	return 0;
	423	}
	424
	425	static struct platform_driver omap_pcm_driver = {
	426	.driver = {
	427	.name = "omap-pcm-audio",
	428	.owner = THIS_MODULE,
	429	},
	430
	431	.probe = omap_pcm_probe,
	432	.remove = __devexit_p(omap_pcm_remove),
	433	};
	434
	435	static int __init snd_omap_pcm_init(void)
958e792c	436	{
f0fba2ad	437	return platform_driver_register(&omap_pcm_driver);
958e792c	438	}
f0fba2ad	439	module_init(snd_omap_pcm_init);
958e792c	440
f0fba2ad	441	static void __exit snd_omap_pcm_exit(void)
958e792c	442	{
f0fba2ad	443	platform_driver_unregister(&omap_pcm_driver);
958e792c	444	}
f0fba2ad	445	module_exit(snd_omap_pcm_exit);
958e792c	446
7ec41ee5	447	MODULE_AUTHOR("Jarkko Nikula <jarkko.nikula@bitmer.com>");
2e74796a JN	448	MODULE_DESCRIPTION("OMAP PCM DMA module");
2e74796a JN	449	MODULE_LICENSE("GPL");