Merge branches 'pm-domains', 'powercap' and 'pm-tools'
[deliverable/linux.git] / sound / soc / tegra / tegra20_das.c
CommitLineData
f0d8af4f 1/*
ef280d39 2 * tegra20_das.c - Tegra20 DAS driver
f0d8af4f
SW
3 *
4 * Author: Stephen Warren <swarren@nvidia.com>
5 * Copyright (C) 2010 - NVIDIA, Inc.
6 *
7 * This program is free software; you can redistribute it and/or
8 * modify it under the terms of the GNU General Public License
9 * version 2 as published by the Free Software Foundation.
10 *
11 * This program is distributed in the hope that it will be useful, but
12 * WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
14 * General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA
19 * 02110-1301 USA
20 *
21 */
22
f0d8af4f 23#include <linux/device.h>
7613c508
SW
24#include <linux/io.h>
25#include <linux/module.h>
f0d8af4f 26#include <linux/platform_device.h>
7203a625 27#include <linux/regmap.h>
f0d8af4f 28#include <linux/slab.h>
f0d8af4f 29#include <sound/soc.h>
ef280d39 30#include "tegra20_das.h"
f0d8af4f 31
896637ac 32#define DRV_NAME "tegra20-das"
f0d8af4f 33
896637ac 34static struct tegra20_das *das;
f0d8af4f 35
896637ac 36static inline void tegra20_das_write(u32 reg, u32 val)
f0d8af4f 37{
7203a625 38 regmap_write(das->regmap, reg, val);
f0d8af4f
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39}
40
896637ac 41static inline u32 tegra20_das_read(u32 reg)
f0d8af4f 42{
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43 u32 val;
44 regmap_read(das->regmap, reg, &val);
45 return val;
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46}
47
896637ac 48int tegra20_das_connect_dap_to_dac(int dap, int dac)
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49{
50 u32 addr;
51 u32 reg;
52
53 if (!das)
54 return -ENODEV;
55
896637ac
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56 addr = TEGRA20_DAS_DAP_CTRL_SEL +
57 (dap * TEGRA20_DAS_DAP_CTRL_SEL_STRIDE);
58 reg = dac << TEGRA20_DAS_DAP_CTRL_SEL_DAP_CTRL_SEL_P;
f0d8af4f 59
896637ac 60 tegra20_das_write(addr, reg);
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61
62 return 0;
63}
896637ac 64EXPORT_SYMBOL_GPL(tegra20_das_connect_dap_to_dac);
f0d8af4f 65
896637ac
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66int tegra20_das_connect_dap_to_dap(int dap, int otherdap, int master,
67 int sdata1rx, int sdata2rx)
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68{
69 u32 addr;
70 u32 reg;
71
72 if (!das)
73 return -ENODEV;
74
896637ac
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75 addr = TEGRA20_DAS_DAP_CTRL_SEL +
76 (dap * TEGRA20_DAS_DAP_CTRL_SEL_STRIDE);
77 reg = otherdap << TEGRA20_DAS_DAP_CTRL_SEL_DAP_CTRL_SEL_P |
78 !!sdata2rx << TEGRA20_DAS_DAP_CTRL_SEL_DAP_SDATA2_TX_RX_P |
79 !!sdata1rx << TEGRA20_DAS_DAP_CTRL_SEL_DAP_SDATA1_TX_RX_P |
80 !!master << TEGRA20_DAS_DAP_CTRL_SEL_DAP_MS_SEL_P;
f0d8af4f 81
896637ac 82 tegra20_das_write(addr, reg);
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83
84 return 0;
85}
896637ac 86EXPORT_SYMBOL_GPL(tegra20_das_connect_dap_to_dap);
f0d8af4f 87
896637ac 88int tegra20_das_connect_dac_to_dap(int dac, int dap)
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89{
90 u32 addr;
91 u32 reg;
92
93 if (!das)
94 return -ENODEV;
95
896637ac
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96 addr = TEGRA20_DAS_DAC_INPUT_DATA_CLK_SEL +
97 (dac * TEGRA20_DAS_DAC_INPUT_DATA_CLK_SEL_STRIDE);
98 reg = dap << TEGRA20_DAS_DAC_INPUT_DATA_CLK_SEL_DAC_CLK_SEL_P |
99 dap << TEGRA20_DAS_DAC_INPUT_DATA_CLK_SEL_DAC_SDATA1_SEL_P |
100 dap << TEGRA20_DAS_DAC_INPUT_DATA_CLK_SEL_DAC_SDATA2_SEL_P;
f0d8af4f 101
896637ac 102 tegra20_das_write(addr, reg);
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103
104 return 0;
105}
896637ac 106EXPORT_SYMBOL_GPL(tegra20_das_connect_dac_to_dap);
f0d8af4f 107
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108#define LAST_REG(name) \
109 (TEGRA20_DAS_##name + \
110 (TEGRA20_DAS_##name##_STRIDE * (TEGRA20_DAS_##name##_COUNT - 1)))
f0d8af4f 111
7203a625 112static bool tegra20_das_wr_rd_reg(struct device *dev, unsigned int reg)
f0d8af4f 113{
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114 if ((reg >= TEGRA20_DAS_DAP_CTRL_SEL) &&
115 (reg <= LAST_REG(DAP_CTRL_SEL)))
116 return true;
117 if ((reg >= TEGRA20_DAS_DAC_INPUT_DATA_CLK_SEL) &&
118 (reg <= LAST_REG(DAC_INPUT_DATA_CLK_SEL)))
119 return true;
120
121 return false;
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122}
123
7203a625
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124static const struct regmap_config tegra20_das_regmap_config = {
125 .reg_bits = 32,
126 .reg_stride = 4,
127 .val_bits = 32,
128 .max_register = LAST_REG(DAC_INPUT_DATA_CLK_SEL),
129 .writeable_reg = tegra20_das_wr_rd_reg,
130 .readable_reg = tegra20_das_wr_rd_reg,
591d14f0 131 .cache_type = REGCACHE_FLAT,
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132};
133
4652a0d0 134static int tegra20_das_probe(struct platform_device *pdev)
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135{
136 struct resource *res, *region;
7203a625 137 void __iomem *regs;
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138 int ret = 0;
139
140 if (das)
141 return -ENODEV;
142
896637ac 143 das = devm_kzalloc(&pdev->dev, sizeof(struct tegra20_das), GFP_KERNEL);
f0d8af4f 144 if (!das) {
896637ac 145 dev_err(&pdev->dev, "Can't allocate tegra20_das\n");
f0d8af4f 146 ret = -ENOMEM;
f2296d7b 147 goto err;
f0d8af4f
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148 }
149 das->dev = &pdev->dev;
150
151 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
152 if (!res) {
153 dev_err(&pdev->dev, "No memory resource\n");
154 ret = -ENODEV;
f2296d7b 155 goto err;
f0d8af4f
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156 }
157
f2296d7b
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158 region = devm_request_mem_region(&pdev->dev, res->start,
159 resource_size(res), pdev->name);
f0d8af4f
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160 if (!region) {
161 dev_err(&pdev->dev, "Memory region already claimed\n");
162 ret = -EBUSY;
f2296d7b 163 goto err;
f0d8af4f
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164 }
165
7203a625
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166 regs = devm_ioremap(&pdev->dev, res->start, resource_size(res));
167 if (!regs) {
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168 dev_err(&pdev->dev, "ioremap failed\n");
169 ret = -ENOMEM;
f2296d7b 170 goto err;
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171 }
172
7203a625
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173 das->regmap = devm_regmap_init_mmio(&pdev->dev, regs,
174 &tegra20_das_regmap_config);
175 if (IS_ERR(das->regmap)) {
176 dev_err(&pdev->dev, "regmap init failed\n");
177 ret = PTR_ERR(das->regmap);
178 goto err;
179 }
180
896637ac
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181 ret = tegra20_das_connect_dap_to_dac(TEGRA20_DAS_DAP_ID_1,
182 TEGRA20_DAS_DAP_SEL_DAC1);
7b9b5e11
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183 if (ret) {
184 dev_err(&pdev->dev, "Can't set up DAS DAP connection\n");
185 goto err;
186 }
896637ac
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187 ret = tegra20_das_connect_dac_to_dap(TEGRA20_DAS_DAC_ID_1,
188 TEGRA20_DAS_DAC_SEL_DAP1);
7b9b5e11
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189 if (ret) {
190 dev_err(&pdev->dev, "Can't set up DAS DAC connection\n");
191 goto err;
192 }
193
15fab585
LS
194 ret = tegra20_das_connect_dap_to_dac(TEGRA20_DAS_DAP_ID_3,
195 TEGRA20_DAS_DAP_SEL_DAC3);
196 if (ret) {
197 dev_err(&pdev->dev, "Can't set up DAS DAP connection\n");
198 goto err;
199 }
200 ret = tegra20_das_connect_dac_to_dap(TEGRA20_DAS_DAC_ID_3,
201 TEGRA20_DAS_DAC_SEL_DAP3);
202 if (ret) {
203 dev_err(&pdev->dev, "Can't set up DAS DAC connection\n");
204 goto err;
205 }
206
f0d8af4f
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207 platform_set_drvdata(pdev, das);
208
209 return 0;
210
f2296d7b 211err:
01840bbe 212 das = NULL;
f0d8af4f
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213 return ret;
214}
215
4652a0d0 216static int tegra20_das_remove(struct platform_device *pdev)
f0d8af4f 217{
f0d8af4f
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218 if (!das)
219 return -ENODEV;
220
01840bbe 221 das = NULL;
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222
223 return 0;
224}
225
f6e65744 226static const struct of_device_id tegra20_das_of_match[] = {
186bcda6
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227 { .compatible = "nvidia,tegra20-das", },
228 {},
229};
230
896637ac
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231static struct platform_driver tegra20_das_driver = {
232 .probe = tegra20_das_probe,
4652a0d0 233 .remove = tegra20_das_remove,
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234 .driver = {
235 .name = DRV_NAME,
896637ac 236 .of_match_table = tegra20_das_of_match,
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237 },
238};
896637ac 239module_platform_driver(tegra20_das_driver);
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240
241MODULE_AUTHOR("Stephen Warren <swarren@nvidia.com>");
896637ac 242MODULE_DESCRIPTION("Tegra20 DAS driver");
f0d8af4f 243MODULE_LICENSE("GPL");
8eb34207 244MODULE_ALIAS("platform:" DRV_NAME);
896637ac 245MODULE_DEVICE_TABLE(of, tegra20_das_of_match);
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