[deliverable/linux.git] / sound / soc / tegra / tegra20_das.c

/*
 * tegra20_das.c - Tegra20 DAS driver
 *
 * Author: Stephen Warren <swarren@nvidia.com>
 * Copyright (C) 2010 - NVIDIA, Inc.
 *
 * This program is free software; you can redistribute it and/or
 * modify it under the terms of the GNU General Public License
 * version 2 as published by the Free Software Foundation.
 *
 * This program is distributed in the hope that it will be useful, but
 * WITHOUT ANY WARRANTY; without even the implied warranty of
 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
 * General Public License for more details.
 *
 * You should have received a copy of the GNU General Public License
 * along with this program; if not, write to the Free Software
 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA
 * 02110-1301 USA
 *
 */

#include <linux/device.h>
#include <linux/io.h>
#include <linux/module.h>
#include <linux/platform_device.h>
#include <linux/regmap.h>
#include <linux/slab.h>
#include <sound/soc.h>
#include "tegra20_das.h"

#define DRV_NAME "tegra20-das"

static struct tegra20_das *das;

static inline void tegra20_das_write(u32 reg, u32 val)
{
	regmap_write(das->regmap, reg, val);
}

static inline u32 tegra20_das_read(u32 reg)
{
	u32 val;
	regmap_read(das->regmap, reg, &val);
	return val;
}

int tegra20_das_connect_dap_to_dac(int dap, int dac)
{
	u32 addr;
	u32 reg;

	if (!das)
		return -ENODEV;

	addr = TEGRA20_DAS_DAP_CTRL_SEL +
		(dap * TEGRA20_DAS_DAP_CTRL_SEL_STRIDE);
	reg = dac << TEGRA20_DAS_DAP_CTRL_SEL_DAP_CTRL_SEL_P;

	tegra20_das_write(addr, reg);

	return 0;
}
EXPORT_SYMBOL_GPL(tegra20_das_connect_dap_to_dac);

int tegra20_das_connect_dap_to_dap(int dap, int otherdap, int master,
				   int sdata1rx, int sdata2rx)
{
	u32 addr;
	u32 reg;

	if (!das)
		return -ENODEV;

	addr = TEGRA20_DAS_DAP_CTRL_SEL +
		(dap * TEGRA20_DAS_DAP_CTRL_SEL_STRIDE);
	reg = otherdap << TEGRA20_DAS_DAP_CTRL_SEL_DAP_CTRL_SEL_P |
		!!sdata2rx << TEGRA20_DAS_DAP_CTRL_SEL_DAP_SDATA2_TX_RX_P |
		!!sdata1rx << TEGRA20_DAS_DAP_CTRL_SEL_DAP_SDATA1_TX_RX_P |
		!!master << TEGRA20_DAS_DAP_CTRL_SEL_DAP_MS_SEL_P;

	tegra20_das_write(addr, reg);

	return 0;
}
EXPORT_SYMBOL_GPL(tegra20_das_connect_dap_to_dap);

int tegra20_das_connect_dac_to_dap(int dac, int dap)
{
	u32 addr;
	u32 reg;

	if (!das)
		return -ENODEV;

	addr = TEGRA20_DAS_DAC_INPUT_DATA_CLK_SEL +
		(dac * TEGRA20_DAS_DAC_INPUT_DATA_CLK_SEL_STRIDE);
	reg = dap << TEGRA20_DAS_DAC_INPUT_DATA_CLK_SEL_DAC_CLK_SEL_P |
		dap << TEGRA20_DAS_DAC_INPUT_DATA_CLK_SEL_DAC_SDATA1_SEL_P |
		dap << TEGRA20_DAS_DAC_INPUT_DATA_CLK_SEL_DAC_SDATA2_SEL_P;

	tegra20_das_write(addr, reg);

	return 0;
}
EXPORT_SYMBOL_GPL(tegra20_das_connect_dac_to_dap);

#define LAST_REG(name) \
	(TEGRA20_DAS_##name + \
	 (TEGRA20_DAS_##name##_STRIDE * (TEGRA20_DAS_##name##_COUNT - 1)))

static bool tegra20_das_wr_rd_reg(struct device *dev, unsigned int reg)
{
	if ((reg >= TEGRA20_DAS_DAP_CTRL_SEL) &&
	    (reg <= LAST_REG(DAP_CTRL_SEL)))
		return true;
	if ((reg >= TEGRA20_DAS_DAC_INPUT_DATA_CLK_SEL) &&
	    (reg <= LAST_REG(DAC_INPUT_DATA_CLK_SEL)))
		return true;

	return false;
}

static const struct regmap_config tegra20_das_regmap_config = {
	.reg_bits = 32,
	.reg_stride = 4,
	.val_bits = 32,
	.max_register = LAST_REG(DAC_INPUT_DATA_CLK_SEL),
	.writeable_reg = tegra20_das_wr_rd_reg,
	.readable_reg = tegra20_das_wr_rd_reg,
	.cache_type = REGCACHE_FLAT,
};

static int tegra20_das_probe(struct platform_device *pdev)
{
	struct resource *res;
	void __iomem *regs;
	int ret = 0;

	if (das)
		return -ENODEV;

	das = devm_kzalloc(&pdev->dev, sizeof(struct tegra20_das), GFP_KERNEL);
	if (!das) {
		dev_err(&pdev->dev, "Can't allocate tegra20_das\n");
		ret = -ENOMEM;
		goto err;
	}
	das->dev = &pdev->dev;

	res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
	regs = devm_ioremap_resource(&pdev->dev, res);
	if (IS_ERR(regs)) {
		ret = PTR_ERR(regs);
		goto err;
	}

	das->regmap = devm_regmap_init_mmio(&pdev->dev, regs,
					    &tegra20_das_regmap_config);
	if (IS_ERR(das->regmap)) {
		dev_err(&pdev->dev, "regmap init failed\n");
		ret = PTR_ERR(das->regmap);
		goto err;
	}

	ret = tegra20_das_connect_dap_to_dac(TEGRA20_DAS_DAP_ID_1,
					     TEGRA20_DAS_DAP_SEL_DAC1);
	if (ret) {
		dev_err(&pdev->dev, "Can't set up DAS DAP connection\n");
		goto err;
	}
	ret = tegra20_das_connect_dac_to_dap(TEGRA20_DAS_DAC_ID_1,
					     TEGRA20_DAS_DAC_SEL_DAP1);
	if (ret) {
		dev_err(&pdev->dev, "Can't set up DAS DAC connection\n");
		goto err;
	}

	ret = tegra20_das_connect_dap_to_dac(TEGRA20_DAS_DAP_ID_3,
					     TEGRA20_DAS_DAP_SEL_DAC3);
	if (ret) {
		dev_err(&pdev->dev, "Can't set up DAS DAP connection\n");
		goto err;
	}
	ret = tegra20_das_connect_dac_to_dap(TEGRA20_DAS_DAC_ID_3,
					     TEGRA20_DAS_DAC_SEL_DAP3);
	if (ret) {
		dev_err(&pdev->dev, "Can't set up DAS DAC connection\n");
		goto err;
	}

	platform_set_drvdata(pdev, das);

	return 0;

err:
	das = NULL;
	return ret;
}

static int tegra20_das_remove(struct platform_device *pdev)
{
	if (!das)
		return -ENODEV;

	das = NULL;

	return 0;
}

static const struct of_device_id tegra20_das_of_match[] = {
	{ .compatible = "nvidia,tegra20-das", },
	{},
};

static struct platform_driver tegra20_das_driver = {
	.probe = tegra20_das_probe,
	.remove = tegra20_das_remove,
	.driver = {
		.name = DRV_NAME,
		.of_match_table = tegra20_das_of_match,
	},
};
module_platform_driver(tegra20_das_driver);

MODULE_AUTHOR("Stephen Warren <swarren@nvidia.com>");
MODULE_DESCRIPTION("Tegra20 DAS driver");
MODULE_LICENSE("GPL");
MODULE_ALIAS("platform:" DRV_NAME);
MODULE_DEVICE_TABLE(of, tegra20_das_of_match);
Commit	Line	Data
f0d8af4f	1	/*
ef280d39	2	* tegra20_das.c - Tegra20 DAS driver
f0d8af4f SW	3	*
	4	* Author: Stephen Warren <swarren@nvidia.com>
	5	* Copyright (C) 2010 - NVIDIA, Inc.
	6	*
	7	* This program is free software; you can redistribute it and/or
	8	* modify it under the terms of the GNU General Public License
	9	* version 2 as published by the Free Software Foundation.
	10	*
	11	* This program is distributed in the hope that it will be useful, but
	12	* WITHOUT ANY WARRANTY; without even the implied warranty of
	13	* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
	14	* General Public License for more details.
	15	*
	16	* You should have received a copy of the GNU General Public License
	17	* along with this program; if not, write to the Free Software
	18	* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA
	19	* 02110-1301 USA
	20	*
	21	*/
	22
f0d8af4f	23	#include <linux/device.h>
7613c508 SW	24	#include <linux/io.h>
7613c508 SW	25	#include <linux/module.h>
f0d8af4f	26	#include <linux/platform_device.h>
7203a625	27	#include <linux/regmap.h>
f0d8af4f	28	#include <linux/slab.h>
f0d8af4f	29	#include <sound/soc.h>
ef280d39	30	#include "tegra20_das.h"
f0d8af4f	31
896637ac	32	#define DRV_NAME "tegra20-das"
f0d8af4f	33
896637ac	34	static struct tegra20_das *das;
f0d8af4f	35
896637ac	36	static inline void tegra20_das_write(u32 reg, u32 val)
f0d8af4f	37	{
7203a625	38	regmap_write(das->regmap, reg, val);
f0d8af4f SW	39	}
f0d8af4f SW	40
896637ac	41	static inline u32 tegra20_das_read(u32 reg)
f0d8af4f	42	{
7203a625 SW	43	u32 val;
	44	regmap_read(das->regmap, reg, &val);
	45	return val;
f0d8af4f SW	46	}
f0d8af4f SW	47
896637ac	48	int tegra20_das_connect_dap_to_dac(int dap, int dac)
f0d8af4f SW	49	{
	50	u32 addr;
	51	u32 reg;
	52
	53	if (!das)
	54	return -ENODEV;
	55
896637ac SW	56	addr = TEGRA20_DAS_DAP_CTRL_SEL +
	57	(dap * TEGRA20_DAS_DAP_CTRL_SEL_STRIDE);
	58	reg = dac << TEGRA20_DAS_DAP_CTRL_SEL_DAP_CTRL_SEL_P;
f0d8af4f	59
896637ac	60	tegra20_das_write(addr, reg);
f0d8af4f SW	61
	62	return 0;
	63	}
896637ac	64	EXPORT_SYMBOL_GPL(tegra20_das_connect_dap_to_dac);
f0d8af4f	65
896637ac SW	66	int tegra20_das_connect_dap_to_dap(int dap, int otherdap, int master,
896637ac SW	67	int sdata1rx, int sdata2rx)
f0d8af4f SW	68	{
	69	u32 addr;
	70	u32 reg;
	71
	72	if (!das)
	73	return -ENODEV;
	74
896637ac SW	75	addr = TEGRA20_DAS_DAP_CTRL_SEL +
	76	(dap * TEGRA20_DAS_DAP_CTRL_SEL_STRIDE);
	77	reg = otherdap << TEGRA20_DAS_DAP_CTRL_SEL_DAP_CTRL_SEL_P \|
	78	!!sdata2rx << TEGRA20_DAS_DAP_CTRL_SEL_DAP_SDATA2_TX_RX_P \|
	79	!!sdata1rx << TEGRA20_DAS_DAP_CTRL_SEL_DAP_SDATA1_TX_RX_P \|
	80	!!master << TEGRA20_DAS_DAP_CTRL_SEL_DAP_MS_SEL_P;
f0d8af4f	81
896637ac	82	tegra20_das_write(addr, reg);
f0d8af4f SW	83
	84	return 0;
	85	}
896637ac	86	EXPORT_SYMBOL_GPL(tegra20_das_connect_dap_to_dap);
f0d8af4f	87
896637ac	88	int tegra20_das_connect_dac_to_dap(int dac, int dap)
f0d8af4f SW	89	{
	90	u32 addr;
	91	u32 reg;
	92
	93	if (!das)
	94	return -ENODEV;
	95
896637ac SW	96	addr = TEGRA20_DAS_DAC_INPUT_DATA_CLK_SEL +
	97	(dac * TEGRA20_DAS_DAC_INPUT_DATA_CLK_SEL_STRIDE);
	98	reg = dap << TEGRA20_DAS_DAC_INPUT_DATA_CLK_SEL_DAC_CLK_SEL_P \|
	99	dap << TEGRA20_DAS_DAC_INPUT_DATA_CLK_SEL_DAC_SDATA1_SEL_P \|
	100	dap << TEGRA20_DAS_DAC_INPUT_DATA_CLK_SEL_DAC_SDATA2_SEL_P;
f0d8af4f	101
896637ac	102	tegra20_das_write(addr, reg);
f0d8af4f SW	103
	104	return 0;
	105	}
896637ac	106	EXPORT_SYMBOL_GPL(tegra20_das_connect_dac_to_dap);
f0d8af4f	107
7203a625 SW	108	#define LAST_REG(name) \
	109	(TEGRA20_DAS_##name + \
	110	(TEGRA20_DAS_##name##_STRIDE * (TEGRA20_DAS_##name##_COUNT - 1)))
f0d8af4f	111
7203a625	112	static bool tegra20_das_wr_rd_reg(struct device *dev, unsigned int reg)
f0d8af4f	113	{
7203a625 SW	114	if ((reg >= TEGRA20_DAS_DAP_CTRL_SEL) &&
	115	(reg <= LAST_REG(DAP_CTRL_SEL)))
	116	return true;
	117	if ((reg >= TEGRA20_DAS_DAC_INPUT_DATA_CLK_SEL) &&
	118	(reg <= LAST_REG(DAC_INPUT_DATA_CLK_SEL)))
	119	return true;
	120
	121	return false;
f0d8af4f SW	122	}
f0d8af4f SW	123
7203a625 SW	124	static const struct regmap_config tegra20_das_regmap_config = {
	125	.reg_bits = 32,
	126	.reg_stride = 4,
	127	.val_bits = 32,
	128	.max_register = LAST_REG(DAC_INPUT_DATA_CLK_SEL),
	129	.writeable_reg = tegra20_das_wr_rd_reg,
	130	.readable_reg = tegra20_das_wr_rd_reg,
591d14f0	131	.cache_type = REGCACHE_FLAT,
f0d8af4f SW	132	};
f0d8af4f SW	133
4652a0d0	134	static int tegra20_das_probe(struct platform_device *pdev)
f0d8af4f	135	{
f57ddcdf	136	struct resource *res;
7203a625	137	void __iomem *regs;
f0d8af4f SW	138	int ret = 0;
	139
	140	if (das)
	141	return -ENODEV;
	142
896637ac	143	das = devm_kzalloc(&pdev->dev, sizeof(struct tegra20_das), GFP_KERNEL);
f0d8af4f	144	if (!das) {
896637ac	145	dev_err(&pdev->dev, "Can't allocate tegra20_das\n");
f0d8af4f	146	ret = -ENOMEM;
f2296d7b	147	goto err;
f0d8af4f SW	148	}
	149	das->dev = &pdev->dev;
	150
	151	res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
f57ddcdf AL	152	regs = devm_ioremap_resource(&pdev->dev, res);
	153	if (IS_ERR(regs)) {
	154	ret = PTR_ERR(regs);
f2296d7b	155	goto err;
f0d8af4f SW	156	}
f0d8af4f SW	157
7203a625 SW	158	das->regmap = devm_regmap_init_mmio(&pdev->dev, regs,
	159	&tegra20_das_regmap_config);
	160	if (IS_ERR(das->regmap)) {
	161	dev_err(&pdev->dev, "regmap init failed\n");
	162	ret = PTR_ERR(das->regmap);
	163	goto err;
	164	}
	165
896637ac SW	166	ret = tegra20_das_connect_dap_to_dac(TEGRA20_DAS_DAP_ID_1,
896637ac SW	167	TEGRA20_DAS_DAP_SEL_DAC1);
7b9b5e11 SW	168	if (ret) {
	169	dev_err(&pdev->dev, "Can't set up DAS DAP connection\n");
	170	goto err;
	171	}
896637ac SW	172	ret = tegra20_das_connect_dac_to_dap(TEGRA20_DAS_DAC_ID_1,
896637ac SW	173	TEGRA20_DAS_DAC_SEL_DAP1);
7b9b5e11 SW	174	if (ret) {
	175	dev_err(&pdev->dev, "Can't set up DAS DAC connection\n");
	176	goto err;
	177	}
	178
15fab585 LS	179	ret = tegra20_das_connect_dap_to_dac(TEGRA20_DAS_DAP_ID_3,
	180	TEGRA20_DAS_DAP_SEL_DAC3);
	181	if (ret) {
	182	dev_err(&pdev->dev, "Can't set up DAS DAP connection\n");
	183	goto err;
	184	}
	185	ret = tegra20_das_connect_dac_to_dap(TEGRA20_DAS_DAC_ID_3,
	186	TEGRA20_DAS_DAC_SEL_DAP3);
	187	if (ret) {
	188	dev_err(&pdev->dev, "Can't set up DAS DAC connection\n");
	189	goto err;
	190	}
	191
f0d8af4f SW	192	platform_set_drvdata(pdev, das);
	193
	194	return 0;
	195
f2296d7b	196	err:
01840bbe	197	das = NULL;
f0d8af4f SW	198	return ret;
	199	}
	200
4652a0d0	201	static int tegra20_das_remove(struct platform_device *pdev)
f0d8af4f	202	{
f0d8af4f SW	203	if (!das)
	204	return -ENODEV;
	205
01840bbe	206	das = NULL;
f0d8af4f SW	207
	208	return 0;
	209	}
	210
f6e65744	211	static const struct of_device_id tegra20_das_of_match[] = {
186bcda6 SW	212	{ .compatible = "nvidia,tegra20-das", },
	213	{},
	214	};
	215
896637ac SW	216	static struct platform_driver tegra20_das_driver = {
896637ac SW	217	.probe = tegra20_das_probe,
4652a0d0	218	.remove = tegra20_das_remove,
f0d8af4f SW	219	.driver = {
f0d8af4f SW	220	.name = DRV_NAME,
896637ac	221	.of_match_table = tegra20_das_of_match,
f0d8af4f SW	222	},
f0d8af4f SW	223	};
896637ac	224	module_platform_driver(tegra20_das_driver);
f0d8af4f SW	225
f0d8af4f SW	226	MODULE_AUTHOR("Stephen Warren <swarren@nvidia.com>");
896637ac	227	MODULE_DESCRIPTION("Tegra20 DAS driver");
f0d8af4f	228	MODULE_LICENSE("GPL");
8eb34207	229	MODULE_ALIAS("platform:" DRV_NAME);
896637ac	230	MODULE_DEVICE_TABLE(of, tegra20_das_of_match);