[deliverable/linux.git] / sound / soc / tegra / tegra_pcm.c

/*
 * tegra_pcm.c - Tegra PCM driver
 *
 * Author: Stephen Warren <swarren@nvidia.com>
 * Copyright (C) 2010,2012 - NVIDIA, Inc.
 *
 * Based on code copyright/by:
 *
 * Copyright (c) 2009-2010, NVIDIA Corporation.
 * Scott Peterson <speterson@nvidia.com>
 * Vijay Mali <vmali@nvidia.com>
 *
 * Copyright (C) 2010 Google, Inc.
 * Iliyan Malchev <malchev@google.com>
 *
 * This program is free software; you can redistribute it and/or
 * modify it under the terms of the GNU General Public License
 * version 2 as published by the Free Software Foundation.
 *
 * This program is distributed in the hope that it will be useful, but
 * WITHOUT ANY WARRANTY; without even the implied warranty of
 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
 * General Public License for more details.
 *
 * You should have received a copy of the GNU General Public License
 * along with this program; if not, write to the Free Software
 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA
 * 02110-1301 USA
 *
 */

#include <linux/dma-mapping.h>
#include <linux/module.h>
#include <linux/slab.h>
#include <sound/core.h>
#include <sound/pcm.h>
#include <sound/pcm_params.h>
#include <sound/soc.h>
#include <sound/dmaengine_pcm.h>

#include "tegra_pcm.h"

static const struct snd_pcm_hardware tegra_pcm_hardware = {
	.info			= SNDRV_PCM_INFO_MMAP |
				  SNDRV_PCM_INFO_MMAP_VALID |
				  SNDRV_PCM_INFO_PAUSE |
				  SNDRV_PCM_INFO_RESUME |
				  SNDRV_PCM_INFO_INTERLEAVED,
	.formats		= SNDRV_PCM_FMTBIT_S16_LE,
	.channels_min		= 2,
	.channels_max		= 2,
	.period_bytes_min	= 1024,
	.period_bytes_max	= PAGE_SIZE,
	.periods_min		= 2,
	.periods_max		= 8,
	.buffer_bytes_max	= PAGE_SIZE * 8,
	.fifo_size		= 4,
};

static int tegra_pcm_open(struct snd_pcm_substream *substream)
{
	struct snd_soc_pcm_runtime *rtd = substream->private_data;
	struct device *dev = rtd->platform->dev;
	int ret;

	/* Set HW params now that initialization is complete */
	snd_soc_set_runtime_hwparams(substream, &tegra_pcm_hardware);

	ret = snd_dmaengine_pcm_open(substream, NULL, NULL);
	if (ret) {
		dev_err(dev, "dmaengine pcm open failed with err %d\n", ret);
		return ret;
	}

	return 0;
}

static int tegra_pcm_hw_params(struct snd_pcm_substream *substream,
				struct snd_pcm_hw_params *params)
{
	struct snd_soc_pcm_runtime *rtd = substream->private_data;
	struct device *dev = rtd->platform->dev;
	struct dma_chan *chan = snd_dmaengine_pcm_get_chan(substream);
	struct dma_slave_config slave_config;
	int ret;

	ret = snd_hwparams_to_dma_slave_config(substream, params,
						&slave_config);
	if (ret) {
		dev_err(dev, "hw params config failed with err %d\n", ret);
		return ret;
	}

	snd_dmaengine_pcm_set_config_from_dai_data(substream,
			snd_soc_dai_get_dma_data(rtd->cpu_dai, substream),
			&slave_config);

	ret = dmaengine_slave_config(chan, &slave_config);
	if (ret < 0) {
		dev_err(dev, "dma slave config failed with err %d\n", ret);
		return ret;
	}

	snd_pcm_set_runtime_buffer(substream, &substream->dma_buffer);
	return 0;
}

static int tegra_pcm_hw_free(struct snd_pcm_substream *substream)
{
	snd_pcm_set_runtime_buffer(substream, NULL);
	return 0;
}

static int tegra_pcm_trigger(struct snd_pcm_substream *substream, int cmd)
{
	switch (cmd) {
	case SNDRV_PCM_TRIGGER_START:
	case SNDRV_PCM_TRIGGER_RESUME:
	case SNDRV_PCM_TRIGGER_PAUSE_RELEASE:
		return snd_dmaengine_pcm_trigger(substream,
					SNDRV_PCM_TRIGGER_START);

	case SNDRV_PCM_TRIGGER_STOP:
	case SNDRV_PCM_TRIGGER_SUSPEND:
	case SNDRV_PCM_TRIGGER_PAUSE_PUSH:
		return snd_dmaengine_pcm_trigger(substream,
					SNDRV_PCM_TRIGGER_STOP);
	default:
		return -EINVAL;
	}
	return 0;
}

static int tegra_pcm_mmap(struct snd_pcm_substream *substream,
				struct vm_area_struct *vma)
{
	struct snd_pcm_runtime *runtime = substream->runtime;

	return dma_mmap_writecombine(substream->pcm->card->dev, vma,
					runtime->dma_area,
					runtime->dma_addr,
					runtime->dma_bytes);
}

static struct snd_pcm_ops tegra_pcm_ops = {
	.open		= tegra_pcm_open,
	.close		= snd_dmaengine_pcm_close,
	.ioctl		= snd_pcm_lib_ioctl,
	.hw_params	= tegra_pcm_hw_params,
	.hw_free	= tegra_pcm_hw_free,
	.trigger	= tegra_pcm_trigger,
	.pointer	= snd_dmaengine_pcm_pointer,
	.mmap		= tegra_pcm_mmap,
};

static int tegra_pcm_preallocate_dma_buffer(struct snd_pcm *pcm, int stream)
{
	struct snd_pcm_substream *substream = pcm->streams[stream].substream;
	struct snd_dma_buffer *buf = &substream->dma_buffer;
	size_t size = tegra_pcm_hardware.buffer_bytes_max;

	buf->area = dma_alloc_writecombine(pcm->card->dev, size,
						&buf->addr, GFP_KERNEL);
	if (!buf->area)
		return -ENOMEM;

	buf->dev.type = SNDRV_DMA_TYPE_DEV;
	buf->dev.dev = pcm->card->dev;
	buf->private_data = NULL;
	buf->bytes = size;

	return 0;
}

static void tegra_pcm_deallocate_dma_buffer(struct snd_pcm *pcm, int stream)
{
	struct snd_pcm_substream *substream;
	struct snd_dma_buffer *buf;

	substream = pcm->streams[stream].substream;
	if (!substream)
		return;

	buf = &substream->dma_buffer;
	if (!buf->area)
		return;

	dma_free_writecombine(pcm->card->dev, buf->bytes,
				buf->area, buf->addr);
	buf->area = NULL;
}

static u64 tegra_dma_mask = DMA_BIT_MASK(32);

static int tegra_pcm_new(struct snd_soc_pcm_runtime *rtd)
{
	struct snd_card *card = rtd->card->snd_card;
	struct snd_pcm *pcm = rtd->pcm;
	int ret = 0;

	if (!card->dev->dma_mask)
		card->dev->dma_mask = &tegra_dma_mask;
	if (!card->dev->coherent_dma_mask)
		card->dev->coherent_dma_mask = DMA_BIT_MASK(32);

	if (pcm->streams[SNDRV_PCM_STREAM_PLAYBACK].substream) {
		ret = tegra_pcm_preallocate_dma_buffer(pcm,
						SNDRV_PCM_STREAM_PLAYBACK);
		if (ret)
			goto err;
	}

	if (pcm->streams[SNDRV_PCM_STREAM_CAPTURE].substream) {
		ret = tegra_pcm_preallocate_dma_buffer(pcm,
						SNDRV_PCM_STREAM_CAPTURE);
		if (ret)
			goto err_free_play;
	}

	return 0;

err_free_play:
	tegra_pcm_deallocate_dma_buffer(pcm, SNDRV_PCM_STREAM_PLAYBACK);
err:
	return ret;
}

static void tegra_pcm_free(struct snd_pcm *pcm)
{
	tegra_pcm_deallocate_dma_buffer(pcm, SNDRV_PCM_STREAM_CAPTURE);
	tegra_pcm_deallocate_dma_buffer(pcm, SNDRV_PCM_STREAM_PLAYBACK);
}

static struct snd_soc_platform_driver tegra_pcm_platform = {
	.ops		= &tegra_pcm_ops,
	.pcm_new	= tegra_pcm_new,
	.pcm_free	= tegra_pcm_free,
};

int tegra_pcm_platform_register(struct device *dev)
{
	return snd_soc_register_platform(dev, &tegra_pcm_platform);
}
EXPORT_SYMBOL_GPL(tegra_pcm_platform_register);

void tegra_pcm_platform_unregister(struct device *dev)
{
	snd_soc_unregister_platform(dev);
}
EXPORT_SYMBOL_GPL(tegra_pcm_platform_unregister);

MODULE_AUTHOR("Stephen Warren <swarren@nvidia.com>");
MODULE_DESCRIPTION("Tegra PCM ASoC driver");
MODULE_LICENSE("GPL");
Commit	Line	Data
7605eb5b SW	1	/*
	2	* tegra_pcm.c - Tegra PCM driver
	3	*
	4	* Author: Stephen Warren <swarren@nvidia.com>
518de86b	5	* Copyright (C) 2010,2012 - NVIDIA, Inc.
7605eb5b SW	6	*
	7	* Based on code copyright/by:
	8	*
	9	* Copyright (c) 2009-2010, NVIDIA Corporation.
	10	* Scott Peterson <speterson@nvidia.com>
	11	* Vijay Mali <vmali@nvidia.com>
	12	*
	13	* Copyright (C) 2010 Google, Inc.
	14	* Iliyan Malchev <malchev@google.com>
	15	*
	16	* This program is free software; you can redistribute it and/or
	17	* modify it under the terms of the GNU General Public License
	18	* version 2 as published by the Free Software Foundation.
	19	*
	20	* This program is distributed in the hope that it will be useful, but
	21	* WITHOUT ANY WARRANTY; without even the implied warranty of
	22	* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
	23	* General Public License for more details.
	24	*
	25	* You should have received a copy of the GNU General Public License
	26	* along with this program; if not, write to the Free Software
	27	* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA
	28	* 02110-1301 USA
	29	*
	30	*/
	31
7605eb5b	32	#include <linux/dma-mapping.h>
7613c508	33	#include <linux/module.h>
7605eb5b SW	34	#include <linux/slab.h>
	35	#include <sound/core.h>
	36	#include <sound/pcm.h>
	37	#include <sound/pcm_params.h>
	38	#include <sound/soc.h>
df79f55d	39	#include <sound/dmaengine_pcm.h>
7605eb5b SW	40
	41	#include "tegra_pcm.h"
	42
	43	static const struct snd_pcm_hardware tegra_pcm_hardware = {
	44	.info = SNDRV_PCM_INFO_MMAP \|
	45	SNDRV_PCM_INFO_MMAP_VALID \|
	46	SNDRV_PCM_INFO_PAUSE \|
	47	SNDRV_PCM_INFO_RESUME \|
	48	SNDRV_PCM_INFO_INTERLEAVED,
	49	.formats = SNDRV_PCM_FMTBIT_S16_LE,
	50	.channels_min = 2,
	51	.channels_max = 2,
	52	.period_bytes_min = 1024,
	53	.period_bytes_max = PAGE_SIZE,
	54	.periods_min = 2,
	55	.periods_max = 8,
	56	.buffer_bytes_max = PAGE_SIZE * 8,
	57	.fifo_size = 4,
	58	};
	59
df79f55d LD	60	static int tegra_pcm_open(struct snd_pcm_substream *substream)
	61	{
	62	struct snd_soc_pcm_runtime *rtd = substream->private_data;
	63	struct device *dev = rtd->platform->dev;
	64	int ret;
	65
	66	/* Set HW params now that initialization is complete */
	67	snd_soc_set_runtime_hwparams(substream, &tegra_pcm_hardware);
	68
	69	ret = snd_dmaengine_pcm_open(substream, NULL, NULL);
	70	if (ret) {
	71	dev_err(dev, "dmaengine pcm open failed with err %d\n", ret);
	72	return ret;
	73	}
	74
	75	return 0;
	76	}
	77
df79f55d LD	78	static int tegra_pcm_hw_params(struct snd_pcm_substream *substream,
	79	struct snd_pcm_hw_params *params)
	80	{
	81	struct snd_soc_pcm_runtime *rtd = substream->private_data;
	82	struct device *dev = rtd->platform->dev;
	83	struct dma_chan *chan = snd_dmaengine_pcm_get_chan(substream);
df79f55d LD	84	struct dma_slave_config slave_config;
	85	int ret;
	86
df79f55d LD	87	ret = snd_hwparams_to_dma_slave_config(substream, params,
	88	&slave_config);
	89	if (ret) {
	90	dev_err(dev, "hw params config failed with err %d\n", ret);
	91	return ret;
	92	}
	93
3489d506 LPC	94	snd_dmaengine_pcm_set_config_from_dai_data(substream,
	95	snd_soc_dai_get_dma_data(rtd->cpu_dai, substream),
	96	&slave_config);
df79f55d LD	97
	98	ret = dmaengine_slave_config(chan, &slave_config);
	99	if (ret < 0) {
	100	dev_err(dev, "dma slave config failed with err %d\n", ret);
	101	return ret;
	102	}
	103
	104	snd_pcm_set_runtime_buffer(substream, &substream->dma_buffer);
	105	return 0;
	106	}
	107
	108	static int tegra_pcm_hw_free(struct snd_pcm_substream *substream)
	109	{
	110	snd_pcm_set_runtime_buffer(substream, NULL);
	111	return 0;
	112	}
	113
	114	static int tegra_pcm_trigger(struct snd_pcm_substream *substream, int cmd)
	115	{
	116	switch (cmd) {
	117	case SNDRV_PCM_TRIGGER_START:
	118	case SNDRV_PCM_TRIGGER_RESUME:
	119	case SNDRV_PCM_TRIGGER_PAUSE_RELEASE:
	120	return snd_dmaengine_pcm_trigger(substream,
	121	SNDRV_PCM_TRIGGER_START);
	122
	123	case SNDRV_PCM_TRIGGER_STOP:
	124	case SNDRV_PCM_TRIGGER_SUSPEND:
	125	case SNDRV_PCM_TRIGGER_PAUSE_PUSH:
	126	return snd_dmaengine_pcm_trigger(substream,
	127	SNDRV_PCM_TRIGGER_STOP);
	128	default:
	129	return -EINVAL;
	130	}
	131	return 0;
	132	}
	133
	134	static int tegra_pcm_mmap(struct snd_pcm_substream *substream,
	135	struct vm_area_struct *vma)
	136	{
	137	struct snd_pcm_runtime *runtime = substream->runtime;
	138
	139	return dma_mmap_writecombine(substream->pcm->card->dev, vma,
	140	runtime->dma_area,
	141	runtime->dma_addr,
	142	runtime->dma_bytes);
	143	}
	144
	145	static struct snd_pcm_ops tegra_pcm_ops = {
	146	.open = tegra_pcm_open,
3021bd38	147	.close = snd_dmaengine_pcm_close,
df79f55d LD	148	.ioctl = snd_pcm_lib_ioctl,
	149	.hw_params = tegra_pcm_hw_params,
	150	.hw_free = tegra_pcm_hw_free,
	151	.trigger = tegra_pcm_trigger,
	152	.pointer = snd_dmaengine_pcm_pointer,
	153	.mmap = tegra_pcm_mmap,
	154	};
7605eb5b SW	155
	156	static int tegra_pcm_preallocate_dma_buffer(struct snd_pcm *pcm, int stream)
	157	{
	158	struct snd_pcm_substream *substream = pcm->streams[stream].substream;
	159	struct snd_dma_buffer *buf = &substream->dma_buffer;
	160	size_t size = tegra_pcm_hardware.buffer_bytes_max;
	161
	162	buf->area = dma_alloc_writecombine(pcm->card->dev, size,
	163	&buf->addr, GFP_KERNEL);
	164	if (!buf->area)
	165	return -ENOMEM;
	166
	167	buf->dev.type = SNDRV_DMA_TYPE_DEV;
	168	buf->dev.dev = pcm->card->dev;
	169	buf->private_data = NULL;
	170	buf->bytes = size;
	171
	172	return 0;
	173	}
	174
	175	static void tegra_pcm_deallocate_dma_buffer(struct snd_pcm *pcm, int stream)
	176	{
a96edd59 SW	177	struct snd_pcm_substream *substream;
	178	struct snd_dma_buffer *buf;
	179
	180	substream = pcm->streams[stream].substream;
	181	if (!substream)
	182	return;
7605eb5b	183
a96edd59	184	buf = &substream->dma_buffer;
7605eb5b SW	185	if (!buf->area)
	186	return;
	187
	188	dma_free_writecombine(pcm->card->dev, buf->bytes,
	189	buf->area, buf->addr);
	190	buf->area = NULL;
	191	}
	192
	193	static u64 tegra_dma_mask = DMA_BIT_MASK(32);
	194
552d1ef6	195	static int tegra_pcm_new(struct snd_soc_pcm_runtime *rtd)
7605eb5b	196	{
552d1ef6	197	struct snd_card *card = rtd->card->snd_card;
552d1ef6	198	struct snd_pcm *pcm = rtd->pcm;
7605eb5b SW	199	int ret = 0;
	200
	201	if (!card->dev->dma_mask)
	202	card->dev->dma_mask = &tegra_dma_mask;
	203	if (!card->dev->coherent_dma_mask)
350e16d5	204	card->dev->coherent_dma_mask = DMA_BIT_MASK(32);
7605eb5b	205
25e9e756	206	if (pcm->streams[SNDRV_PCM_STREAM_PLAYBACK].substream) {
7605eb5b SW	207	ret = tegra_pcm_preallocate_dma_buffer(pcm,
	208	SNDRV_PCM_STREAM_PLAYBACK);
	209	if (ret)
	210	goto err;
	211	}
	212
25e9e756	213	if (pcm->streams[SNDRV_PCM_STREAM_CAPTURE].substream) {
7605eb5b SW	214	ret = tegra_pcm_preallocate_dma_buffer(pcm,
	215	SNDRV_PCM_STREAM_CAPTURE);
	216	if (ret)
	217	goto err_free_play;
	218	}
	219
	220	return 0;
	221
	222	err_free_play:
	223	tegra_pcm_deallocate_dma_buffer(pcm, SNDRV_PCM_STREAM_PLAYBACK);
	224	err:
	225	return ret;
	226	}
	227
	228	static void tegra_pcm_free(struct snd_pcm *pcm)
	229	{
	230	tegra_pcm_deallocate_dma_buffer(pcm, SNDRV_PCM_STREAM_CAPTURE);
	231	tegra_pcm_deallocate_dma_buffer(pcm, SNDRV_PCM_STREAM_PLAYBACK);
	232	}
	233
01840bbe	234	static struct snd_soc_platform_driver tegra_pcm_platform = {
7605eb5b SW	235	.ops = &tegra_pcm_ops,
	236	.pcm_new = tegra_pcm_new,
	237	.pcm_free = tegra_pcm_free,
	238	};
	239
4652a0d0	240	int tegra_pcm_platform_register(struct device *dev)
7605eb5b	241	{
518de86b	242	return snd_soc_register_platform(dev, &tegra_pcm_platform);
7605eb5b	243	}
518de86b	244	EXPORT_SYMBOL_GPL(tegra_pcm_platform_register);
7605eb5b	245
4652a0d0	246	void tegra_pcm_platform_unregister(struct device *dev)
7605eb5b	247	{
518de86b	248	snd_soc_unregister_platform(dev);
7605eb5b	249	}
518de86b	250	EXPORT_SYMBOL_GPL(tegra_pcm_platform_unregister);
7605eb5b SW	251
	252	MODULE_AUTHOR("Stephen Warren <swarren@nvidia.com>");
	253	MODULE_DESCRIPTION("Tegra PCM ASoC driver");
	254	MODULE_LICENSE("GPL");