Merge branch 'for-3.17/drivers' of git://git.kernel.dk/linux-block
[deliverable/linux.git] / tools / perf / util / evsel.c
CommitLineData
f8a95309
ACM
1/*
2 * Copyright (C) 2011, Red Hat Inc, Arnaldo Carvalho de Melo <acme@redhat.com>
3 *
4 * Parts came from builtin-{top,stat,record}.c, see those files for further
5 * copyright notes.
6 *
7 * Released under the GPL v2. (and only v2, not any later version)
8 */
9
936be503 10#include <byteswap.h>
0f6a3015 11#include <linux/bitops.h>
553873e1 12#include <api/fs/debugfs.h>
4e319027
RR
13#include <traceevent/event-parse.h>
14#include <linux/hw_breakpoint.h>
15#include <linux/perf_event.h>
bec19672 16#include <sys/resource.h>
4e319027 17#include "asm/bug.h"
69aad6f1 18#include "evsel.h"
70082dd9 19#include "evlist.h"
69aad6f1 20#include "util.h"
86bd5e86 21#include "cpumap.h"
fd78260b 22#include "thread_map.h"
12864b31 23#include "target.h"
26d33022 24#include "perf_regs.h"
e3e1a54f 25#include "debug.h"
97978b3e 26#include "trace-event.h"
69aad6f1 27
594ac61a
ACM
28static struct {
29 bool sample_id_all;
30 bool exclude_guest;
5c5e854b 31 bool mmap2;
57480d2c 32 bool cloexec;
594ac61a
ACM
33} perf_missing_features;
34
c52b12ed
ACM
35#define FD(e, x, y) (*(int *)xyarray__entry(e->fd, x, y))
36
75562573 37int __perf_evsel__sample_size(u64 sample_type)
c2a70653
ACM
38{
39 u64 mask = sample_type & PERF_SAMPLE_MASK;
40 int size = 0;
41 int i;
42
43 for (i = 0; i < 64; i++) {
44 if (mask & (1ULL << i))
45 size++;
46 }
47
48 size *= sizeof(u64);
49
50 return size;
51}
52
75562573
AH
53/**
54 * __perf_evsel__calc_id_pos - calculate id_pos.
55 * @sample_type: sample type
56 *
57 * This function returns the position of the event id (PERF_SAMPLE_ID or
58 * PERF_SAMPLE_IDENTIFIER) in a sample event i.e. in the array of struct
59 * sample_event.
60 */
61static int __perf_evsel__calc_id_pos(u64 sample_type)
62{
63 int idx = 0;
64
65 if (sample_type & PERF_SAMPLE_IDENTIFIER)
66 return 0;
67
68 if (!(sample_type & PERF_SAMPLE_ID))
69 return -1;
70
71 if (sample_type & PERF_SAMPLE_IP)
72 idx += 1;
73
74 if (sample_type & PERF_SAMPLE_TID)
75 idx += 1;
76
77 if (sample_type & PERF_SAMPLE_TIME)
78 idx += 1;
79
80 if (sample_type & PERF_SAMPLE_ADDR)
81 idx += 1;
82
83 return idx;
84}
85
86/**
87 * __perf_evsel__calc_is_pos - calculate is_pos.
88 * @sample_type: sample type
89 *
90 * This function returns the position (counting backwards) of the event id
91 * (PERF_SAMPLE_ID or PERF_SAMPLE_IDENTIFIER) in a non-sample event i.e. if
92 * sample_id_all is used there is an id sample appended to non-sample events.
93 */
94static int __perf_evsel__calc_is_pos(u64 sample_type)
95{
96 int idx = 1;
97
98 if (sample_type & PERF_SAMPLE_IDENTIFIER)
99 return 1;
100
101 if (!(sample_type & PERF_SAMPLE_ID))
102 return -1;
103
104 if (sample_type & PERF_SAMPLE_CPU)
105 idx += 1;
106
107 if (sample_type & PERF_SAMPLE_STREAM_ID)
108 idx += 1;
109
110 return idx;
111}
112
113void perf_evsel__calc_id_pos(struct perf_evsel *evsel)
114{
115 evsel->id_pos = __perf_evsel__calc_id_pos(evsel->attr.sample_type);
116 evsel->is_pos = __perf_evsel__calc_is_pos(evsel->attr.sample_type);
117}
118
4bf9ce1b 119void hists__init(struct hists *hists)
0e2a5f10
ACM
120{
121 memset(hists, 0, sizeof(*hists));
122 hists->entries_in_array[0] = hists->entries_in_array[1] = RB_ROOT;
123 hists->entries_in = &hists->entries_in_array[0];
124 hists->entries_collapsed = RB_ROOT;
125 hists->entries = RB_ROOT;
126 pthread_mutex_init(&hists->lock, NULL);
127}
128
7be5ebe8
ACM
129void __perf_evsel__set_sample_bit(struct perf_evsel *evsel,
130 enum perf_event_sample_format bit)
131{
132 if (!(evsel->attr.sample_type & bit)) {
133 evsel->attr.sample_type |= bit;
134 evsel->sample_size += sizeof(u64);
75562573 135 perf_evsel__calc_id_pos(evsel);
7be5ebe8
ACM
136 }
137}
138
139void __perf_evsel__reset_sample_bit(struct perf_evsel *evsel,
140 enum perf_event_sample_format bit)
141{
142 if (evsel->attr.sample_type & bit) {
143 evsel->attr.sample_type &= ~bit;
144 evsel->sample_size -= sizeof(u64);
75562573 145 perf_evsel__calc_id_pos(evsel);
7be5ebe8
ACM
146 }
147}
148
75562573
AH
149void perf_evsel__set_sample_id(struct perf_evsel *evsel,
150 bool can_sample_identifier)
7a5a5ca5 151{
75562573
AH
152 if (can_sample_identifier) {
153 perf_evsel__reset_sample_bit(evsel, ID);
154 perf_evsel__set_sample_bit(evsel, IDENTIFIER);
155 } else {
156 perf_evsel__set_sample_bit(evsel, ID);
157 }
7a5a5ca5
ACM
158 evsel->attr.read_format |= PERF_FORMAT_ID;
159}
160
ef1d1af2
ACM
161void perf_evsel__init(struct perf_evsel *evsel,
162 struct perf_event_attr *attr, int idx)
163{
164 evsel->idx = idx;
165 evsel->attr = *attr;
2cfda562 166 evsel->leader = evsel;
410136f5
SE
167 evsel->unit = "";
168 evsel->scale = 1.0;
ef1d1af2 169 INIT_LIST_HEAD(&evsel->node);
1980c2eb 170 hists__init(&evsel->hists);
bde09467 171 evsel->sample_size = __perf_evsel__sample_size(attr->sample_type);
75562573 172 perf_evsel__calc_id_pos(evsel);
ef1d1af2
ACM
173}
174
ef503831 175struct perf_evsel *perf_evsel__new_idx(struct perf_event_attr *attr, int idx)
69aad6f1
ACM
176{
177 struct perf_evsel *evsel = zalloc(sizeof(*evsel));
178
ef1d1af2
ACM
179 if (evsel != NULL)
180 perf_evsel__init(evsel, attr, idx);
69aad6f1
ACM
181
182 return evsel;
183}
184
ef503831 185struct perf_evsel *perf_evsel__newtp_idx(const char *sys, const char *name, int idx)
efd2b924
ACM
186{
187 struct perf_evsel *evsel = zalloc(sizeof(*evsel));
188
189 if (evsel != NULL) {
190 struct perf_event_attr attr = {
0b80f8b3
ACM
191 .type = PERF_TYPE_TRACEPOINT,
192 .sample_type = (PERF_SAMPLE_RAW | PERF_SAMPLE_TIME |
193 PERF_SAMPLE_CPU | PERF_SAMPLE_PERIOD),
efd2b924
ACM
194 };
195
e48ffe2b
ACM
196 if (asprintf(&evsel->name, "%s:%s", sys, name) < 0)
197 goto out_free;
198
97978b3e 199 evsel->tp_format = trace_event__tp_format(sys, name);
efd2b924
ACM
200 if (evsel->tp_format == NULL)
201 goto out_free;
202
0b80f8b3 203 event_attr_init(&attr);
efd2b924 204 attr.config = evsel->tp_format->id;
0b80f8b3 205 attr.sample_period = 1;
efd2b924 206 perf_evsel__init(evsel, &attr, idx);
efd2b924
ACM
207 }
208
209 return evsel;
210
211out_free:
74cf249d 212 zfree(&evsel->name);
efd2b924
ACM
213 free(evsel);
214 return NULL;
215}
216
8ad7013b 217const char *perf_evsel__hw_names[PERF_COUNT_HW_MAX] = {
c410431c
ACM
218 "cycles",
219 "instructions",
220 "cache-references",
221 "cache-misses",
222 "branches",
223 "branch-misses",
224 "bus-cycles",
225 "stalled-cycles-frontend",
226 "stalled-cycles-backend",
227 "ref-cycles",
228};
229
dd4f5223 230static const char *__perf_evsel__hw_name(u64 config)
c410431c
ACM
231{
232 if (config < PERF_COUNT_HW_MAX && perf_evsel__hw_names[config])
233 return perf_evsel__hw_names[config];
234
235 return "unknown-hardware";
236}
237
27f18617 238static int perf_evsel__add_modifiers(struct perf_evsel *evsel, char *bf, size_t size)
c410431c 239{
27f18617 240 int colon = 0, r = 0;
c410431c 241 struct perf_event_attr *attr = &evsel->attr;
c410431c
ACM
242 bool exclude_guest_default = false;
243
244#define MOD_PRINT(context, mod) do { \
245 if (!attr->exclude_##context) { \
27f18617 246 if (!colon) colon = ++r; \
c410431c
ACM
247 r += scnprintf(bf + r, size - r, "%c", mod); \
248 } } while(0)
249
250 if (attr->exclude_kernel || attr->exclude_user || attr->exclude_hv) {
251 MOD_PRINT(kernel, 'k');
252 MOD_PRINT(user, 'u');
253 MOD_PRINT(hv, 'h');
254 exclude_guest_default = true;
255 }
256
257 if (attr->precise_ip) {
258 if (!colon)
27f18617 259 colon = ++r;
c410431c
ACM
260 r += scnprintf(bf + r, size - r, "%.*s", attr->precise_ip, "ppp");
261 exclude_guest_default = true;
262 }
263
264 if (attr->exclude_host || attr->exclude_guest == exclude_guest_default) {
265 MOD_PRINT(host, 'H');
266 MOD_PRINT(guest, 'G');
267 }
268#undef MOD_PRINT
269 if (colon)
27f18617 270 bf[colon - 1] = ':';
c410431c
ACM
271 return r;
272}
273
27f18617
ACM
274static int perf_evsel__hw_name(struct perf_evsel *evsel, char *bf, size_t size)
275{
276 int r = scnprintf(bf, size, "%s", __perf_evsel__hw_name(evsel->attr.config));
277 return r + perf_evsel__add_modifiers(evsel, bf + r, size - r);
278}
279
8ad7013b 280const char *perf_evsel__sw_names[PERF_COUNT_SW_MAX] = {
335c2f5d
ACM
281 "cpu-clock",
282 "task-clock",
283 "page-faults",
284 "context-switches",
8ad7013b 285 "cpu-migrations",
335c2f5d
ACM
286 "minor-faults",
287 "major-faults",
288 "alignment-faults",
289 "emulation-faults",
d22d1a2a 290 "dummy",
335c2f5d
ACM
291};
292
dd4f5223 293static const char *__perf_evsel__sw_name(u64 config)
335c2f5d
ACM
294{
295 if (config < PERF_COUNT_SW_MAX && perf_evsel__sw_names[config])
296 return perf_evsel__sw_names[config];
297 return "unknown-software";
298}
299
300static int perf_evsel__sw_name(struct perf_evsel *evsel, char *bf, size_t size)
301{
302 int r = scnprintf(bf, size, "%s", __perf_evsel__sw_name(evsel->attr.config));
303 return r + perf_evsel__add_modifiers(evsel, bf + r, size - r);
304}
305
287e74aa
JO
306static int __perf_evsel__bp_name(char *bf, size_t size, u64 addr, u64 type)
307{
308 int r;
309
310 r = scnprintf(bf, size, "mem:0x%" PRIx64 ":", addr);
311
312 if (type & HW_BREAKPOINT_R)
313 r += scnprintf(bf + r, size - r, "r");
314
315 if (type & HW_BREAKPOINT_W)
316 r += scnprintf(bf + r, size - r, "w");
317
318 if (type & HW_BREAKPOINT_X)
319 r += scnprintf(bf + r, size - r, "x");
320
321 return r;
322}
323
324static int perf_evsel__bp_name(struct perf_evsel *evsel, char *bf, size_t size)
325{
326 struct perf_event_attr *attr = &evsel->attr;
327 int r = __perf_evsel__bp_name(bf, size, attr->bp_addr, attr->bp_type);
328 return r + perf_evsel__add_modifiers(evsel, bf + r, size - r);
329}
330
0b668bc9
ACM
331const char *perf_evsel__hw_cache[PERF_COUNT_HW_CACHE_MAX]
332 [PERF_EVSEL__MAX_ALIASES] = {
333 { "L1-dcache", "l1-d", "l1d", "L1-data", },
334 { "L1-icache", "l1-i", "l1i", "L1-instruction", },
335 { "LLC", "L2", },
336 { "dTLB", "d-tlb", "Data-TLB", },
337 { "iTLB", "i-tlb", "Instruction-TLB", },
338 { "branch", "branches", "bpu", "btb", "bpc", },
339 { "node", },
340};
341
342const char *perf_evsel__hw_cache_op[PERF_COUNT_HW_CACHE_OP_MAX]
343 [PERF_EVSEL__MAX_ALIASES] = {
344 { "load", "loads", "read", },
345 { "store", "stores", "write", },
346 { "prefetch", "prefetches", "speculative-read", "speculative-load", },
347};
348
349const char *perf_evsel__hw_cache_result[PERF_COUNT_HW_CACHE_RESULT_MAX]
350 [PERF_EVSEL__MAX_ALIASES] = {
351 { "refs", "Reference", "ops", "access", },
352 { "misses", "miss", },
353};
354
355#define C(x) PERF_COUNT_HW_CACHE_##x
356#define CACHE_READ (1 << C(OP_READ))
357#define CACHE_WRITE (1 << C(OP_WRITE))
358#define CACHE_PREFETCH (1 << C(OP_PREFETCH))
359#define COP(x) (1 << x)
360
361/*
362 * cache operartion stat
363 * L1I : Read and prefetch only
364 * ITLB and BPU : Read-only
365 */
366static unsigned long perf_evsel__hw_cache_stat[C(MAX)] = {
367 [C(L1D)] = (CACHE_READ | CACHE_WRITE | CACHE_PREFETCH),
368 [C(L1I)] = (CACHE_READ | CACHE_PREFETCH),
369 [C(LL)] = (CACHE_READ | CACHE_WRITE | CACHE_PREFETCH),
370 [C(DTLB)] = (CACHE_READ | CACHE_WRITE | CACHE_PREFETCH),
371 [C(ITLB)] = (CACHE_READ),
372 [C(BPU)] = (CACHE_READ),
373 [C(NODE)] = (CACHE_READ | CACHE_WRITE | CACHE_PREFETCH),
374};
375
376bool perf_evsel__is_cache_op_valid(u8 type, u8 op)
377{
378 if (perf_evsel__hw_cache_stat[type] & COP(op))
379 return true; /* valid */
380 else
381 return false; /* invalid */
382}
383
384int __perf_evsel__hw_cache_type_op_res_name(u8 type, u8 op, u8 result,
385 char *bf, size_t size)
386{
387 if (result) {
388 return scnprintf(bf, size, "%s-%s-%s", perf_evsel__hw_cache[type][0],
389 perf_evsel__hw_cache_op[op][0],
390 perf_evsel__hw_cache_result[result][0]);
391 }
392
393 return scnprintf(bf, size, "%s-%s", perf_evsel__hw_cache[type][0],
394 perf_evsel__hw_cache_op[op][1]);
395}
396
dd4f5223 397static int __perf_evsel__hw_cache_name(u64 config, char *bf, size_t size)
0b668bc9
ACM
398{
399 u8 op, result, type = (config >> 0) & 0xff;
400 const char *err = "unknown-ext-hardware-cache-type";
401
402 if (type > PERF_COUNT_HW_CACHE_MAX)
403 goto out_err;
404
405 op = (config >> 8) & 0xff;
406 err = "unknown-ext-hardware-cache-op";
407 if (op > PERF_COUNT_HW_CACHE_OP_MAX)
408 goto out_err;
409
410 result = (config >> 16) & 0xff;
411 err = "unknown-ext-hardware-cache-result";
412 if (result > PERF_COUNT_HW_CACHE_RESULT_MAX)
413 goto out_err;
414
415 err = "invalid-cache";
416 if (!perf_evsel__is_cache_op_valid(type, op))
417 goto out_err;
418
419 return __perf_evsel__hw_cache_type_op_res_name(type, op, result, bf, size);
420out_err:
421 return scnprintf(bf, size, "%s", err);
422}
423
424static int perf_evsel__hw_cache_name(struct perf_evsel *evsel, char *bf, size_t size)
425{
426 int ret = __perf_evsel__hw_cache_name(evsel->attr.config, bf, size);
427 return ret + perf_evsel__add_modifiers(evsel, bf + ret, size - ret);
428}
429
6eef3d9c
ACM
430static int perf_evsel__raw_name(struct perf_evsel *evsel, char *bf, size_t size)
431{
432 int ret = scnprintf(bf, size, "raw 0x%" PRIx64, evsel->attr.config);
433 return ret + perf_evsel__add_modifiers(evsel, bf + ret, size - ret);
434}
435
7289f83c 436const char *perf_evsel__name(struct perf_evsel *evsel)
a4460836 437{
7289f83c 438 char bf[128];
a4460836 439
7289f83c
ACM
440 if (evsel->name)
441 return evsel->name;
c410431c
ACM
442
443 switch (evsel->attr.type) {
444 case PERF_TYPE_RAW:
6eef3d9c 445 perf_evsel__raw_name(evsel, bf, sizeof(bf));
c410431c
ACM
446 break;
447
448 case PERF_TYPE_HARDWARE:
7289f83c 449 perf_evsel__hw_name(evsel, bf, sizeof(bf));
c410431c 450 break;
0b668bc9
ACM
451
452 case PERF_TYPE_HW_CACHE:
7289f83c 453 perf_evsel__hw_cache_name(evsel, bf, sizeof(bf));
0b668bc9
ACM
454 break;
455
335c2f5d 456 case PERF_TYPE_SOFTWARE:
7289f83c 457 perf_evsel__sw_name(evsel, bf, sizeof(bf));
335c2f5d
ACM
458 break;
459
a4460836 460 case PERF_TYPE_TRACEPOINT:
7289f83c 461 scnprintf(bf, sizeof(bf), "%s", "unknown tracepoint");
a4460836
ACM
462 break;
463
287e74aa
JO
464 case PERF_TYPE_BREAKPOINT:
465 perf_evsel__bp_name(evsel, bf, sizeof(bf));
466 break;
467
c410431c 468 default:
ca1b1457
RR
469 scnprintf(bf, sizeof(bf), "unknown attr type: %d",
470 evsel->attr.type);
a4460836 471 break;
c410431c
ACM
472 }
473
7289f83c
ACM
474 evsel->name = strdup(bf);
475
476 return evsel->name ?: "unknown";
c410431c
ACM
477}
478
717e263f
NK
479const char *perf_evsel__group_name(struct perf_evsel *evsel)
480{
481 return evsel->group_name ?: "anon group";
482}
483
484int perf_evsel__group_desc(struct perf_evsel *evsel, char *buf, size_t size)
485{
486 int ret;
487 struct perf_evsel *pos;
488 const char *group_name = perf_evsel__group_name(evsel);
489
490 ret = scnprintf(buf, size, "%s", group_name);
491
492 ret += scnprintf(buf + ret, size - ret, " { %s",
493 perf_evsel__name(evsel));
494
495 for_each_group_member(pos, evsel)
496 ret += scnprintf(buf + ret, size - ret, ", %s",
497 perf_evsel__name(pos));
498
499 ret += scnprintf(buf + ret, size - ret, " }");
500
501 return ret;
502}
503
6bedfab6
JO
504static void
505perf_evsel__config_callgraph(struct perf_evsel *evsel,
506 struct record_opts *opts)
507{
508 bool function = perf_evsel__is_function_event(evsel);
509 struct perf_event_attr *attr = &evsel->attr;
510
511 perf_evsel__set_sample_bit(evsel, CALLCHAIN);
512
513 if (opts->call_graph == CALLCHAIN_DWARF) {
514 if (!function) {
515 perf_evsel__set_sample_bit(evsel, REGS_USER);
516 perf_evsel__set_sample_bit(evsel, STACK_USER);
517 attr->sample_regs_user = PERF_REGS_MASK;
518 attr->sample_stack_user = opts->stack_dump_size;
519 attr->exclude_callchain_user = 1;
520 } else {
521 pr_info("Cannot use DWARF unwind for function trace event,"
522 " falling back to framepointers.\n");
523 }
524 }
525
526 if (function) {
527 pr_info("Disabling user space callchains for function trace event.\n");
528 attr->exclude_callchain_user = 1;
529 }
530}
531
774cb499
JO
532/*
533 * The enable_on_exec/disabled value strategy:
534 *
535 * 1) For any type of traced program:
536 * - all independent events and group leaders are disabled
537 * - all group members are enabled
538 *
539 * Group members are ruled by group leaders. They need to
540 * be enabled, because the group scheduling relies on that.
541 *
542 * 2) For traced programs executed by perf:
543 * - all independent events and group leaders have
544 * enable_on_exec set
545 * - we don't specifically enable or disable any event during
546 * the record command
547 *
548 * Independent events and group leaders are initially disabled
549 * and get enabled by exec. Group members are ruled by group
550 * leaders as stated in 1).
551 *
552 * 3) For traced programs attached by perf (pid/tid):
553 * - we specifically enable or disable all events during
554 * the record command
555 *
556 * When attaching events to already running traced we
557 * enable/disable events specifically, as there's no
558 * initial traced exec call.
559 */
b4006796 560void perf_evsel__config(struct perf_evsel *evsel, struct record_opts *opts)
0f82ebc4 561{
3c176311 562 struct perf_evsel *leader = evsel->leader;
0f82ebc4
ACM
563 struct perf_event_attr *attr = &evsel->attr;
564 int track = !evsel->idx; /* only the first counter needs these */
3aa5939d 565 bool per_cpu = opts->target.default_per_cpu && !opts->target.per_thread;
0f82ebc4 566
594ac61a 567 attr->sample_id_all = perf_missing_features.sample_id_all ? 0 : 1;
0f82ebc4 568 attr->inherit = !opts->no_inherit;
0f82ebc4 569
7be5ebe8
ACM
570 perf_evsel__set_sample_bit(evsel, IP);
571 perf_evsel__set_sample_bit(evsel, TID);
0f82ebc4 572
3c176311
JO
573 if (evsel->sample_read) {
574 perf_evsel__set_sample_bit(evsel, READ);
575
576 /*
577 * We need ID even in case of single event, because
578 * PERF_SAMPLE_READ process ID specific data.
579 */
75562573 580 perf_evsel__set_sample_id(evsel, false);
3c176311
JO
581
582 /*
583 * Apply group format only if we belong to group
584 * with more than one members.
585 */
586 if (leader->nr_members > 1) {
587 attr->read_format |= PERF_FORMAT_GROUP;
588 attr->inherit = 0;
589 }
590 }
591
0f82ebc4 592 /*
17314e23 593 * We default some events to have a default interval. But keep
0f82ebc4
ACM
594 * it a weak assumption overridable by the user.
595 */
17314e23 596 if (!attr->sample_period || (opts->user_freq != UINT_MAX ||
0f82ebc4
ACM
597 opts->user_interval != ULLONG_MAX)) {
598 if (opts->freq) {
7be5ebe8 599 perf_evsel__set_sample_bit(evsel, PERIOD);
0f82ebc4
ACM
600 attr->freq = 1;
601 attr->sample_freq = opts->freq;
602 } else {
603 attr->sample_period = opts->default_interval;
604 }
605 }
606
3c176311
JO
607 /*
608 * Disable sampling for all group members other
609 * than leader in case leader 'leads' the sampling.
610 */
611 if ((leader != evsel) && leader->sample_read) {
612 attr->sample_freq = 0;
613 attr->sample_period = 0;
614 }
615
0f82ebc4
ACM
616 if (opts->no_samples)
617 attr->sample_freq = 0;
618
619 if (opts->inherit_stat)
620 attr->inherit_stat = 1;
621
622 if (opts->sample_address) {
7be5ebe8 623 perf_evsel__set_sample_bit(evsel, ADDR);
0f82ebc4
ACM
624 attr->mmap_data = track;
625 }
626
6ff1ce76 627 if (opts->call_graph_enabled && !evsel->no_aux_samples)
6bedfab6 628 perf_evsel__config_callgraph(evsel, opts);
26d33022 629
3aa5939d 630 if (target__has_cpu(&opts->target))
7be5ebe8 631 perf_evsel__set_sample_bit(evsel, CPU);
0f82ebc4 632
3e76ac78 633 if (opts->period)
7be5ebe8 634 perf_evsel__set_sample_bit(evsel, PERIOD);
3e76ac78 635
594ac61a 636 if (!perf_missing_features.sample_id_all &&
d67356e7 637 (opts->sample_time || !opts->no_inherit ||
3aa5939d 638 target__has_cpu(&opts->target) || per_cpu))
7be5ebe8 639 perf_evsel__set_sample_bit(evsel, TIME);
0f82ebc4 640
6ff1ce76 641 if (opts->raw_samples && !evsel->no_aux_samples) {
7be5ebe8
ACM
642 perf_evsel__set_sample_bit(evsel, TIME);
643 perf_evsel__set_sample_bit(evsel, RAW);
644 perf_evsel__set_sample_bit(evsel, CPU);
0f82ebc4
ACM
645 }
646
ccf49bfc 647 if (opts->sample_address)
1e7ed5ec 648 perf_evsel__set_sample_bit(evsel, DATA_SRC);
ccf49bfc 649
509051ea 650 if (opts->no_buffering) {
0f82ebc4
ACM
651 attr->watermark = 0;
652 attr->wakeup_events = 1;
653 }
6ff1ce76 654 if (opts->branch_stack && !evsel->no_aux_samples) {
7be5ebe8 655 perf_evsel__set_sample_bit(evsel, BRANCH_STACK);
bdfebd84
RAV
656 attr->branch_sample_type = opts->branch_stack;
657 }
0f82ebc4 658
05484298 659 if (opts->sample_weight)
1e7ed5ec 660 perf_evsel__set_sample_bit(evsel, WEIGHT);
05484298 661
5c5e854b 662 attr->mmap = track;
a5a5ba72 663 attr->mmap2 = track && !perf_missing_features.mmap2;
5c5e854b 664 attr->comm = track;
0f82ebc4 665
475eeab9 666 if (opts->sample_transaction)
1e7ed5ec 667 perf_evsel__set_sample_bit(evsel, TRANSACTION);
475eeab9 668
774cb499
JO
669 /*
670 * XXX see the function comment above
671 *
672 * Disabling only independent events or group leaders,
673 * keeping group members enabled.
674 */
823254ed 675 if (perf_evsel__is_group_leader(evsel))
774cb499
JO
676 attr->disabled = 1;
677
678 /*
679 * Setting enable_on_exec for independent events and
680 * group leaders for traced executed by perf.
681 */
6619a53e
AK
682 if (target__none(&opts->target) && perf_evsel__is_group_leader(evsel) &&
683 !opts->initial_delay)
0f82ebc4 684 attr->enable_on_exec = 1;
2afd2bcf
AH
685
686 if (evsel->immediate) {
687 attr->disabled = 0;
688 attr->enable_on_exec = 0;
689 }
0f82ebc4
ACM
690}
691
69aad6f1
ACM
692int perf_evsel__alloc_fd(struct perf_evsel *evsel, int ncpus, int nthreads)
693{
4af4c955 694 int cpu, thread;
69aad6f1 695 evsel->fd = xyarray__new(ncpus, nthreads, sizeof(int));
4af4c955
DA
696
697 if (evsel->fd) {
698 for (cpu = 0; cpu < ncpus; cpu++) {
699 for (thread = 0; thread < nthreads; thread++) {
700 FD(evsel, cpu, thread) = -1;
701 }
702 }
703 }
704
69aad6f1
ACM
705 return evsel->fd != NULL ? 0 : -ENOMEM;
706}
707
e2407bef
AK
708static int perf_evsel__run_ioctl(struct perf_evsel *evsel, int ncpus, int nthreads,
709 int ioc, void *arg)
745cefc5
ACM
710{
711 int cpu, thread;
712
713 for (cpu = 0; cpu < ncpus; cpu++) {
714 for (thread = 0; thread < nthreads; thread++) {
715 int fd = FD(evsel, cpu, thread),
e2407bef 716 err = ioctl(fd, ioc, arg);
745cefc5
ACM
717
718 if (err)
719 return err;
720 }
721 }
722
723 return 0;
724}
725
e2407bef
AK
726int perf_evsel__set_filter(struct perf_evsel *evsel, int ncpus, int nthreads,
727 const char *filter)
728{
729 return perf_evsel__run_ioctl(evsel, ncpus, nthreads,
730 PERF_EVENT_IOC_SET_FILTER,
731 (void *)filter);
732}
733
734int perf_evsel__enable(struct perf_evsel *evsel, int ncpus, int nthreads)
735{
736 return perf_evsel__run_ioctl(evsel, ncpus, nthreads,
737 PERF_EVENT_IOC_ENABLE,
738 0);
739}
740
70db7533
ACM
741int perf_evsel__alloc_id(struct perf_evsel *evsel, int ncpus, int nthreads)
742{
a91e5431
ACM
743 evsel->sample_id = xyarray__new(ncpus, nthreads, sizeof(struct perf_sample_id));
744 if (evsel->sample_id == NULL)
745 return -ENOMEM;
746
747 evsel->id = zalloc(ncpus * nthreads * sizeof(u64));
748 if (evsel->id == NULL) {
749 xyarray__delete(evsel->sample_id);
750 evsel->sample_id = NULL;
751 return -ENOMEM;
752 }
753
754 return 0;
70db7533
ACM
755}
756
a7e191c3
FD
757void perf_evsel__reset_counts(struct perf_evsel *evsel, int ncpus)
758{
759 memset(evsel->counts, 0, (sizeof(*evsel->counts) +
760 (ncpus * sizeof(struct perf_counts_values))));
761}
762
c52b12ed
ACM
763int perf_evsel__alloc_counts(struct perf_evsel *evsel, int ncpus)
764{
765 evsel->counts = zalloc((sizeof(*evsel->counts) +
766 (ncpus * sizeof(struct perf_counts_values))));
767 return evsel->counts != NULL ? 0 : -ENOMEM;
768}
769
69aad6f1
ACM
770void perf_evsel__free_fd(struct perf_evsel *evsel)
771{
772 xyarray__delete(evsel->fd);
773 evsel->fd = NULL;
774}
775
70db7533
ACM
776void perf_evsel__free_id(struct perf_evsel *evsel)
777{
a91e5431
ACM
778 xyarray__delete(evsel->sample_id);
779 evsel->sample_id = NULL;
04662523 780 zfree(&evsel->id);
70db7533
ACM
781}
782
c52b12ed
ACM
783void perf_evsel__close_fd(struct perf_evsel *evsel, int ncpus, int nthreads)
784{
785 int cpu, thread;
786
787 for (cpu = 0; cpu < ncpus; cpu++)
788 for (thread = 0; thread < nthreads; ++thread) {
789 close(FD(evsel, cpu, thread));
790 FD(evsel, cpu, thread) = -1;
791 }
792}
793
43f8e76e
NK
794void perf_evsel__free_counts(struct perf_evsel *evsel)
795{
74cf249d 796 zfree(&evsel->counts);
43f8e76e
NK
797}
798
ef1d1af2 799void perf_evsel__exit(struct perf_evsel *evsel)
69aad6f1
ACM
800{
801 assert(list_empty(&evsel->node));
736b05a0
NK
802 perf_evsel__free_fd(evsel);
803 perf_evsel__free_id(evsel);
ef1d1af2
ACM
804}
805
806void perf_evsel__delete(struct perf_evsel *evsel)
807{
808 perf_evsel__exit(evsel);
023695d9 809 close_cgroup(evsel->cgrp);
74cf249d 810 zfree(&evsel->group_name);
e48ffe2b 811 if (evsel->tp_format)
efd2b924 812 pevent_free_format(evsel->tp_format);
74cf249d 813 zfree(&evsel->name);
69aad6f1
ACM
814 free(evsel);
815}
c52b12ed 816
c7a79c47
SE
817static inline void compute_deltas(struct perf_evsel *evsel,
818 int cpu,
819 struct perf_counts_values *count)
820{
821 struct perf_counts_values tmp;
822
823 if (!evsel->prev_raw_counts)
824 return;
825
826 if (cpu == -1) {
827 tmp = evsel->prev_raw_counts->aggr;
828 evsel->prev_raw_counts->aggr = *count;
829 } else {
830 tmp = evsel->prev_raw_counts->cpu[cpu];
831 evsel->prev_raw_counts->cpu[cpu] = *count;
832 }
833
834 count->val = count->val - tmp.val;
835 count->ena = count->ena - tmp.ena;
836 count->run = count->run - tmp.run;
837}
838
c52b12ed
ACM
839int __perf_evsel__read_on_cpu(struct perf_evsel *evsel,
840 int cpu, int thread, bool scale)
841{
842 struct perf_counts_values count;
843 size_t nv = scale ? 3 : 1;
844
845 if (FD(evsel, cpu, thread) < 0)
846 return -EINVAL;
847
4eed11d5
ACM
848 if (evsel->counts == NULL && perf_evsel__alloc_counts(evsel, cpu + 1) < 0)
849 return -ENOMEM;
850
c52b12ed
ACM
851 if (readn(FD(evsel, cpu, thread), &count, nv * sizeof(u64)) < 0)
852 return -errno;
853
c7a79c47
SE
854 compute_deltas(evsel, cpu, &count);
855
c52b12ed
ACM
856 if (scale) {
857 if (count.run == 0)
858 count.val = 0;
859 else if (count.run < count.ena)
860 count.val = (u64)((double)count.val * count.ena / count.run + 0.5);
861 } else
862 count.ena = count.run = 0;
863
864 evsel->counts->cpu[cpu] = count;
865 return 0;
866}
867
868int __perf_evsel__read(struct perf_evsel *evsel,
869 int ncpus, int nthreads, bool scale)
870{
871 size_t nv = scale ? 3 : 1;
872 int cpu, thread;
873 struct perf_counts_values *aggr = &evsel->counts->aggr, count;
874
52bcd994 875 aggr->val = aggr->ena = aggr->run = 0;
c52b12ed
ACM
876
877 for (cpu = 0; cpu < ncpus; cpu++) {
878 for (thread = 0; thread < nthreads; thread++) {
879 if (FD(evsel, cpu, thread) < 0)
880 continue;
881
882 if (readn(FD(evsel, cpu, thread),
883 &count, nv * sizeof(u64)) < 0)
884 return -errno;
885
886 aggr->val += count.val;
887 if (scale) {
888 aggr->ena += count.ena;
889 aggr->run += count.run;
890 }
891 }
892 }
893
c7a79c47
SE
894 compute_deltas(evsel, -1, aggr);
895
c52b12ed
ACM
896 evsel->counts->scaled = 0;
897 if (scale) {
898 if (aggr->run == 0) {
899 evsel->counts->scaled = -1;
900 aggr->val = 0;
901 return 0;
902 }
903
904 if (aggr->run < aggr->ena) {
905 evsel->counts->scaled = 1;
906 aggr->val = (u64)((double)aggr->val * aggr->ena / aggr->run + 0.5);
907 }
908 } else
909 aggr->ena = aggr->run = 0;
910
911 return 0;
912}
48290609 913
6a4bb04c
JO
914static int get_group_fd(struct perf_evsel *evsel, int cpu, int thread)
915{
916 struct perf_evsel *leader = evsel->leader;
917 int fd;
918
823254ed 919 if (perf_evsel__is_group_leader(evsel))
6a4bb04c
JO
920 return -1;
921
922 /*
923 * Leader must be already processed/open,
924 * if not it's a bug.
925 */
926 BUG_ON(!leader->fd);
927
928 fd = FD(leader, cpu, thread);
929 BUG_ON(fd == -1);
930
931 return fd;
932}
933
e3e1a54f
AH
934#define __PRINT_ATTR(fmt, cast, field) \
935 fprintf(fp, " %-19s "fmt"\n", #field, cast attr->field)
936
937#define PRINT_ATTR_U32(field) __PRINT_ATTR("%u" , , field)
938#define PRINT_ATTR_X32(field) __PRINT_ATTR("%#x", , field)
939#define PRINT_ATTR_U64(field) __PRINT_ATTR("%" PRIu64, (uint64_t), field)
940#define PRINT_ATTR_X64(field) __PRINT_ATTR("%#"PRIx64, (uint64_t), field)
941
942#define PRINT_ATTR2N(name1, field1, name2, field2) \
943 fprintf(fp, " %-19s %u %-19s %u\n", \
944 name1, attr->field1, name2, attr->field2)
945
946#define PRINT_ATTR2(field1, field2) \
947 PRINT_ATTR2N(#field1, field1, #field2, field2)
948
949static size_t perf_event_attr__fprintf(struct perf_event_attr *attr, FILE *fp)
950{
951 size_t ret = 0;
952
953 ret += fprintf(fp, "%.60s\n", graph_dotted_line);
954 ret += fprintf(fp, "perf_event_attr:\n");
955
956 ret += PRINT_ATTR_U32(type);
957 ret += PRINT_ATTR_U32(size);
958 ret += PRINT_ATTR_X64(config);
959 ret += PRINT_ATTR_U64(sample_period);
960 ret += PRINT_ATTR_U64(sample_freq);
961 ret += PRINT_ATTR_X64(sample_type);
962 ret += PRINT_ATTR_X64(read_format);
963
964 ret += PRINT_ATTR2(disabled, inherit);
965 ret += PRINT_ATTR2(pinned, exclusive);
966 ret += PRINT_ATTR2(exclude_user, exclude_kernel);
967 ret += PRINT_ATTR2(exclude_hv, exclude_idle);
968 ret += PRINT_ATTR2(mmap, comm);
022c50d0 969 ret += PRINT_ATTR2(mmap2, comm_exec);
e3e1a54f
AH
970 ret += PRINT_ATTR2(freq, inherit_stat);
971 ret += PRINT_ATTR2(enable_on_exec, task);
972 ret += PRINT_ATTR2(watermark, precise_ip);
973 ret += PRINT_ATTR2(mmap_data, sample_id_all);
974 ret += PRINT_ATTR2(exclude_host, exclude_guest);
975 ret += PRINT_ATTR2N("excl.callchain_kern", exclude_callchain_kernel,
976 "excl.callchain_user", exclude_callchain_user);
977
978 ret += PRINT_ATTR_U32(wakeup_events);
979 ret += PRINT_ATTR_U32(wakeup_watermark);
980 ret += PRINT_ATTR_X32(bp_type);
981 ret += PRINT_ATTR_X64(bp_addr);
982 ret += PRINT_ATTR_X64(config1);
983 ret += PRINT_ATTR_U64(bp_len);
984 ret += PRINT_ATTR_X64(config2);
985 ret += PRINT_ATTR_X64(branch_sample_type);
986 ret += PRINT_ATTR_X64(sample_regs_user);
987 ret += PRINT_ATTR_U32(sample_stack_user);
988
989 ret += fprintf(fp, "%.60s\n", graph_dotted_line);
990
991 return ret;
992}
993
0252208e 994static int __perf_evsel__open(struct perf_evsel *evsel, struct cpu_map *cpus,
6a4bb04c 995 struct thread_map *threads)
48290609 996{
0252208e 997 int cpu, thread;
57480d2c 998 unsigned long flags = PERF_FLAG_FD_CLOEXEC;
727ab04e 999 int pid = -1, err;
bec19672 1000 enum { NO_CHANGE, SET_TO_MAX, INCREASED_MAX } set_rlimit = NO_CHANGE;
48290609 1001
0252208e
ACM
1002 if (evsel->fd == NULL &&
1003 perf_evsel__alloc_fd(evsel, cpus->nr, threads->nr) < 0)
727ab04e 1004 return -ENOMEM;
4eed11d5 1005
023695d9 1006 if (evsel->cgrp) {
57480d2c 1007 flags |= PERF_FLAG_PID_CGROUP;
023695d9
SE
1008 pid = evsel->cgrp->fd;
1009 }
1010
594ac61a 1011fallback_missing_features:
57480d2c
YD
1012 if (perf_missing_features.cloexec)
1013 flags &= ~(unsigned long)PERF_FLAG_FD_CLOEXEC;
5c5e854b
SE
1014 if (perf_missing_features.mmap2)
1015 evsel->attr.mmap2 = 0;
594ac61a
ACM
1016 if (perf_missing_features.exclude_guest)
1017 evsel->attr.exclude_guest = evsel->attr.exclude_host = 0;
1018retry_sample_id:
1019 if (perf_missing_features.sample_id_all)
1020 evsel->attr.sample_id_all = 0;
1021
e3e1a54f
AH
1022 if (verbose >= 2)
1023 perf_event_attr__fprintf(&evsel->attr, stderr);
1024
86bd5e86 1025 for (cpu = 0; cpu < cpus->nr; cpu++) {
9d04f178 1026
0252208e 1027 for (thread = 0; thread < threads->nr; thread++) {
6a4bb04c 1028 int group_fd;
023695d9
SE
1029
1030 if (!evsel->cgrp)
1031 pid = threads->map[thread];
1032
6a4bb04c 1033 group_fd = get_group_fd(evsel, cpu, thread);
bec19672 1034retry_open:
a33f6efc 1035 pr_debug2("sys_perf_event_open: pid %d cpu %d group_fd %d flags %#lx\n",
e3e1a54f
AH
1036 pid, cpus->map[cpu], group_fd, flags);
1037
0252208e 1038 FD(evsel, cpu, thread) = sys_perf_event_open(&evsel->attr,
023695d9 1039 pid,
f08199d3 1040 cpus->map[cpu],
023695d9 1041 group_fd, flags);
727ab04e
ACM
1042 if (FD(evsel, cpu, thread) < 0) {
1043 err = -errno;
a33f6efc 1044 pr_debug2("sys_perf_event_open failed, error %d\n",
f852fd62 1045 err);
594ac61a 1046 goto try_fallback;
727ab04e 1047 }
bec19672 1048 set_rlimit = NO_CHANGE;
0252208e 1049 }
48290609
ACM
1050 }
1051
1052 return 0;
1053
594ac61a 1054try_fallback:
bec19672
AK
1055 /*
1056 * perf stat needs between 5 and 22 fds per CPU. When we run out
1057 * of them try to increase the limits.
1058 */
1059 if (err == -EMFILE && set_rlimit < INCREASED_MAX) {
1060 struct rlimit l;
1061 int old_errno = errno;
1062
1063 if (getrlimit(RLIMIT_NOFILE, &l) == 0) {
1064 if (set_rlimit == NO_CHANGE)
1065 l.rlim_cur = l.rlim_max;
1066 else {
1067 l.rlim_cur = l.rlim_max + 1000;
1068 l.rlim_max = l.rlim_cur;
1069 }
1070 if (setrlimit(RLIMIT_NOFILE, &l) == 0) {
1071 set_rlimit++;
1072 errno = old_errno;
1073 goto retry_open;
1074 }
1075 }
1076 errno = old_errno;
1077 }
1078
594ac61a
ACM
1079 if (err != -EINVAL || cpu > 0 || thread > 0)
1080 goto out_close;
1081
57480d2c
YD
1082 if (!perf_missing_features.cloexec && (flags & PERF_FLAG_FD_CLOEXEC)) {
1083 perf_missing_features.cloexec = true;
1084 goto fallback_missing_features;
1085 } else if (!perf_missing_features.mmap2 && evsel->attr.mmap2) {
5c5e854b
SE
1086 perf_missing_features.mmap2 = true;
1087 goto fallback_missing_features;
1088 } else if (!perf_missing_features.exclude_guest &&
1089 (evsel->attr.exclude_guest || evsel->attr.exclude_host)) {
594ac61a
ACM
1090 perf_missing_features.exclude_guest = true;
1091 goto fallback_missing_features;
1092 } else if (!perf_missing_features.sample_id_all) {
1093 perf_missing_features.sample_id_all = true;
1094 goto retry_sample_id;
1095 }
1096
48290609 1097out_close:
0252208e
ACM
1098 do {
1099 while (--thread >= 0) {
1100 close(FD(evsel, cpu, thread));
1101 FD(evsel, cpu, thread) = -1;
1102 }
1103 thread = threads->nr;
1104 } while (--cpu >= 0);
727ab04e
ACM
1105 return err;
1106}
1107
1108void perf_evsel__close(struct perf_evsel *evsel, int ncpus, int nthreads)
1109{
1110 if (evsel->fd == NULL)
1111 return;
1112
1113 perf_evsel__close_fd(evsel, ncpus, nthreads);
1114 perf_evsel__free_fd(evsel);
48290609
ACM
1115}
1116
0252208e
ACM
1117static struct {
1118 struct cpu_map map;
1119 int cpus[1];
1120} empty_cpu_map = {
1121 .map.nr = 1,
1122 .cpus = { -1, },
1123};
1124
1125static struct {
1126 struct thread_map map;
1127 int threads[1];
1128} empty_thread_map = {
1129 .map.nr = 1,
1130 .threads = { -1, },
1131};
1132
f08199d3 1133int perf_evsel__open(struct perf_evsel *evsel, struct cpu_map *cpus,
6a4bb04c 1134 struct thread_map *threads)
48290609 1135{
0252208e
ACM
1136 if (cpus == NULL) {
1137 /* Work around old compiler warnings about strict aliasing */
1138 cpus = &empty_cpu_map.map;
48290609
ACM
1139 }
1140
0252208e
ACM
1141 if (threads == NULL)
1142 threads = &empty_thread_map.map;
48290609 1143
6a4bb04c 1144 return __perf_evsel__open(evsel, cpus, threads);
48290609
ACM
1145}
1146
f08199d3 1147int perf_evsel__open_per_cpu(struct perf_evsel *evsel,
6a4bb04c 1148 struct cpu_map *cpus)
48290609 1149{
6a4bb04c 1150 return __perf_evsel__open(evsel, cpus, &empty_thread_map.map);
0252208e 1151}
48290609 1152
f08199d3 1153int perf_evsel__open_per_thread(struct perf_evsel *evsel,
6a4bb04c 1154 struct thread_map *threads)
0252208e 1155{
6a4bb04c 1156 return __perf_evsel__open(evsel, &empty_cpu_map.map, threads);
48290609 1157}
70082dd9 1158
0807d2d8
ACM
1159static int perf_evsel__parse_id_sample(const struct perf_evsel *evsel,
1160 const union perf_event *event,
1161 struct perf_sample *sample)
d0dd74e8 1162{
0807d2d8 1163 u64 type = evsel->attr.sample_type;
d0dd74e8 1164 const u64 *array = event->sample.array;
0807d2d8 1165 bool swapped = evsel->needs_swap;
37073f9e 1166 union u64_swap u;
d0dd74e8
ACM
1167
1168 array += ((event->header.size -
1169 sizeof(event->header)) / sizeof(u64)) - 1;
1170
75562573
AH
1171 if (type & PERF_SAMPLE_IDENTIFIER) {
1172 sample->id = *array;
1173 array--;
1174 }
1175
d0dd74e8 1176 if (type & PERF_SAMPLE_CPU) {
37073f9e
JO
1177 u.val64 = *array;
1178 if (swapped) {
1179 /* undo swap of u64, then swap on individual u32s */
1180 u.val64 = bswap_64(u.val64);
1181 u.val32[0] = bswap_32(u.val32[0]);
1182 }
1183
1184 sample->cpu = u.val32[0];
d0dd74e8
ACM
1185 array--;
1186 }
1187
1188 if (type & PERF_SAMPLE_STREAM_ID) {
1189 sample->stream_id = *array;
1190 array--;
1191 }
1192
1193 if (type & PERF_SAMPLE_ID) {
1194 sample->id = *array;
1195 array--;
1196 }
1197
1198 if (type & PERF_SAMPLE_TIME) {
1199 sample->time = *array;
1200 array--;
1201 }
1202
1203 if (type & PERF_SAMPLE_TID) {
37073f9e
JO
1204 u.val64 = *array;
1205 if (swapped) {
1206 /* undo swap of u64, then swap on individual u32s */
1207 u.val64 = bswap_64(u.val64);
1208 u.val32[0] = bswap_32(u.val32[0]);
1209 u.val32[1] = bswap_32(u.val32[1]);
1210 }
1211
1212 sample->pid = u.val32[0];
1213 sample->tid = u.val32[1];
dd44bc6b 1214 array--;
d0dd74e8
ACM
1215 }
1216
1217 return 0;
1218}
1219
03b6ea9b
AH
1220static inline bool overflow(const void *endp, u16 max_size, const void *offset,
1221 u64 size)
98e1da90 1222{
03b6ea9b
AH
1223 return size > max_size || offset + size > endp;
1224}
98e1da90 1225
03b6ea9b
AH
1226#define OVERFLOW_CHECK(offset, size, max_size) \
1227 do { \
1228 if (overflow(endp, (max_size), (offset), (size))) \
1229 return -EFAULT; \
1230 } while (0)
98e1da90 1231
03b6ea9b
AH
1232#define OVERFLOW_CHECK_u64(offset) \
1233 OVERFLOW_CHECK(offset, sizeof(u64), sizeof(u64))
98e1da90 1234
a3f698fe 1235int perf_evsel__parse_sample(struct perf_evsel *evsel, union perf_event *event,
0807d2d8 1236 struct perf_sample *data)
d0dd74e8 1237{
a3f698fe 1238 u64 type = evsel->attr.sample_type;
0807d2d8 1239 bool swapped = evsel->needs_swap;
d0dd74e8 1240 const u64 *array;
03b6ea9b
AH
1241 u16 max_size = event->header.size;
1242 const void *endp = (void *)event + max_size;
1243 u64 sz;
d0dd74e8 1244
936be503
DA
1245 /*
1246 * used for cross-endian analysis. See git commit 65014ab3
1247 * for why this goofiness is needed.
1248 */
6a11f92e 1249 union u64_swap u;
936be503 1250
f3bda2c9 1251 memset(data, 0, sizeof(*data));
d0dd74e8
ACM
1252 data->cpu = data->pid = data->tid = -1;
1253 data->stream_id = data->id = data->time = -1ULL;
bc529086 1254 data->period = evsel->attr.sample_period;
05484298 1255 data->weight = 0;
d0dd74e8
ACM
1256
1257 if (event->header.type != PERF_RECORD_SAMPLE) {
a3f698fe 1258 if (!evsel->attr.sample_id_all)
d0dd74e8 1259 return 0;
0807d2d8 1260 return perf_evsel__parse_id_sample(evsel, event, data);
d0dd74e8
ACM
1261 }
1262
1263 array = event->sample.array;
1264
03b6ea9b
AH
1265 /*
1266 * The evsel's sample_size is based on PERF_SAMPLE_MASK which includes
1267 * up to PERF_SAMPLE_PERIOD. After that overflow() must be used to
1268 * check the format does not go past the end of the event.
1269 */
a3f698fe 1270 if (evsel->sample_size + sizeof(event->header) > event->header.size)
a2854124
FW
1271 return -EFAULT;
1272
75562573
AH
1273 data->id = -1ULL;
1274 if (type & PERF_SAMPLE_IDENTIFIER) {
1275 data->id = *array;
1276 array++;
1277 }
1278
d0dd74e8 1279 if (type & PERF_SAMPLE_IP) {
ef89325f 1280 data->ip = *array;
d0dd74e8
ACM
1281 array++;
1282 }
1283
1284 if (type & PERF_SAMPLE_TID) {
936be503
DA
1285 u.val64 = *array;
1286 if (swapped) {
1287 /* undo swap of u64, then swap on individual u32s */
1288 u.val64 = bswap_64(u.val64);
1289 u.val32[0] = bswap_32(u.val32[0]);
1290 u.val32[1] = bswap_32(u.val32[1]);
1291 }
1292
1293 data->pid = u.val32[0];
1294 data->tid = u.val32[1];
d0dd74e8
ACM
1295 array++;
1296 }
1297
1298 if (type & PERF_SAMPLE_TIME) {
1299 data->time = *array;
1300 array++;
1301 }
1302
7cec0922 1303 data->addr = 0;
d0dd74e8
ACM
1304 if (type & PERF_SAMPLE_ADDR) {
1305 data->addr = *array;
1306 array++;
1307 }
1308
d0dd74e8
ACM
1309 if (type & PERF_SAMPLE_ID) {
1310 data->id = *array;
1311 array++;
1312 }
1313
1314 if (type & PERF_SAMPLE_STREAM_ID) {
1315 data->stream_id = *array;
1316 array++;
1317 }
1318
1319 if (type & PERF_SAMPLE_CPU) {
936be503
DA
1320
1321 u.val64 = *array;
1322 if (swapped) {
1323 /* undo swap of u64, then swap on individual u32s */
1324 u.val64 = bswap_64(u.val64);
1325 u.val32[0] = bswap_32(u.val32[0]);
1326 }
1327
1328 data->cpu = u.val32[0];
d0dd74e8
ACM
1329 array++;
1330 }
1331
1332 if (type & PERF_SAMPLE_PERIOD) {
1333 data->period = *array;
1334 array++;
1335 }
1336
1337 if (type & PERF_SAMPLE_READ) {
9ede473c
JO
1338 u64 read_format = evsel->attr.read_format;
1339
03b6ea9b 1340 OVERFLOW_CHECK_u64(array);
9ede473c
JO
1341 if (read_format & PERF_FORMAT_GROUP)
1342 data->read.group.nr = *array;
1343 else
1344 data->read.one.value = *array;
1345
1346 array++;
1347
1348 if (read_format & PERF_FORMAT_TOTAL_TIME_ENABLED) {
03b6ea9b 1349 OVERFLOW_CHECK_u64(array);
9ede473c
JO
1350 data->read.time_enabled = *array;
1351 array++;
1352 }
1353
1354 if (read_format & PERF_FORMAT_TOTAL_TIME_RUNNING) {
03b6ea9b 1355 OVERFLOW_CHECK_u64(array);
9ede473c
JO
1356 data->read.time_running = *array;
1357 array++;
1358 }
1359
1360 /* PERF_FORMAT_ID is forced for PERF_SAMPLE_READ */
1361 if (read_format & PERF_FORMAT_GROUP) {
03b6ea9b
AH
1362 const u64 max_group_nr = UINT64_MAX /
1363 sizeof(struct sample_read_value);
1364
1365 if (data->read.group.nr > max_group_nr)
1366 return -EFAULT;
1367 sz = data->read.group.nr *
1368 sizeof(struct sample_read_value);
1369 OVERFLOW_CHECK(array, sz, max_size);
1370 data->read.group.values =
1371 (struct sample_read_value *)array;
1372 array = (void *)array + sz;
9ede473c 1373 } else {
03b6ea9b 1374 OVERFLOW_CHECK_u64(array);
9ede473c
JO
1375 data->read.one.id = *array;
1376 array++;
1377 }
d0dd74e8
ACM
1378 }
1379
1380 if (type & PERF_SAMPLE_CALLCHAIN) {
03b6ea9b 1381 const u64 max_callchain_nr = UINT64_MAX / sizeof(u64);
98e1da90 1382
03b6ea9b
AH
1383 OVERFLOW_CHECK_u64(array);
1384 data->callchain = (struct ip_callchain *)array++;
1385 if (data->callchain->nr > max_callchain_nr)
98e1da90 1386 return -EFAULT;
03b6ea9b
AH
1387 sz = data->callchain->nr * sizeof(u64);
1388 OVERFLOW_CHECK(array, sz, max_size);
1389 array = (void *)array + sz;
d0dd74e8
ACM
1390 }
1391
1392 if (type & PERF_SAMPLE_RAW) {
03b6ea9b 1393 OVERFLOW_CHECK_u64(array);
936be503
DA
1394 u.val64 = *array;
1395 if (WARN_ONCE(swapped,
1396 "Endianness of raw data not corrected!\n")) {
1397 /* undo swap of u64, then swap on individual u32s */
1398 u.val64 = bswap_64(u.val64);
1399 u.val32[0] = bswap_32(u.val32[0]);
1400 u.val32[1] = bswap_32(u.val32[1]);
1401 }
936be503 1402 data->raw_size = u.val32[0];
03b6ea9b 1403 array = (void *)array + sizeof(u32);
98e1da90 1404
03b6ea9b
AH
1405 OVERFLOW_CHECK(array, data->raw_size, max_size);
1406 data->raw_data = (void *)array;
1407 array = (void *)array + data->raw_size;
d0dd74e8
ACM
1408 }
1409
b5387528 1410 if (type & PERF_SAMPLE_BRANCH_STACK) {
03b6ea9b
AH
1411 const u64 max_branch_nr = UINT64_MAX /
1412 sizeof(struct branch_entry);
b5387528 1413
03b6ea9b
AH
1414 OVERFLOW_CHECK_u64(array);
1415 data->branch_stack = (struct branch_stack *)array++;
b5387528 1416
03b6ea9b
AH
1417 if (data->branch_stack->nr > max_branch_nr)
1418 return -EFAULT;
b5387528 1419 sz = data->branch_stack->nr * sizeof(struct branch_entry);
03b6ea9b
AH
1420 OVERFLOW_CHECK(array, sz, max_size);
1421 array = (void *)array + sz;
b5387528 1422 }
0f6a3015
JO
1423
1424 if (type & PERF_SAMPLE_REGS_USER) {
03b6ea9b 1425 OVERFLOW_CHECK_u64(array);
5b95a4a3
AH
1426 data->user_regs.abi = *array;
1427 array++;
0f6a3015 1428
5b95a4a3 1429 if (data->user_regs.abi) {
352ea45a 1430 u64 mask = evsel->attr.sample_regs_user;
03b6ea9b 1431
352ea45a 1432 sz = hweight_long(mask) * sizeof(u64);
03b6ea9b 1433 OVERFLOW_CHECK(array, sz, max_size);
352ea45a 1434 data->user_regs.mask = mask;
0f6a3015 1435 data->user_regs.regs = (u64 *)array;
03b6ea9b 1436 array = (void *)array + sz;
0f6a3015
JO
1437 }
1438 }
1439
1440 if (type & PERF_SAMPLE_STACK_USER) {
03b6ea9b
AH
1441 OVERFLOW_CHECK_u64(array);
1442 sz = *array++;
0f6a3015
JO
1443
1444 data->user_stack.offset = ((char *)(array - 1)
1445 - (char *) event);
1446
03b6ea9b 1447 if (!sz) {
0f6a3015
JO
1448 data->user_stack.size = 0;
1449 } else {
03b6ea9b 1450 OVERFLOW_CHECK(array, sz, max_size);
0f6a3015 1451 data->user_stack.data = (char *)array;
03b6ea9b
AH
1452 array = (void *)array + sz;
1453 OVERFLOW_CHECK_u64(array);
54bd2692 1454 data->user_stack.size = *array++;
a65cb4b9
JO
1455 if (WARN_ONCE(data->user_stack.size > sz,
1456 "user stack dump failure\n"))
1457 return -EFAULT;
0f6a3015
JO
1458 }
1459 }
1460
05484298
AK
1461 data->weight = 0;
1462 if (type & PERF_SAMPLE_WEIGHT) {
03b6ea9b 1463 OVERFLOW_CHECK_u64(array);
05484298
AK
1464 data->weight = *array;
1465 array++;
1466 }
1467
98a3b32c
SE
1468 data->data_src = PERF_MEM_DATA_SRC_NONE;
1469 if (type & PERF_SAMPLE_DATA_SRC) {
03b6ea9b 1470 OVERFLOW_CHECK_u64(array);
98a3b32c
SE
1471 data->data_src = *array;
1472 array++;
1473 }
1474
475eeab9
AK
1475 data->transaction = 0;
1476 if (type & PERF_SAMPLE_TRANSACTION) {
87b95524 1477 OVERFLOW_CHECK_u64(array);
475eeab9
AK
1478 data->transaction = *array;
1479 array++;
1480 }
1481
d0dd74e8
ACM
1482 return 0;
1483}
74eec26f 1484
b1cf6f65 1485size_t perf_event__sample_event_size(const struct perf_sample *sample, u64 type,
352ea45a 1486 u64 read_format)
b1cf6f65
AH
1487{
1488 size_t sz, result = sizeof(struct sample_event);
1489
1490 if (type & PERF_SAMPLE_IDENTIFIER)
1491 result += sizeof(u64);
1492
1493 if (type & PERF_SAMPLE_IP)
1494 result += sizeof(u64);
1495
1496 if (type & PERF_SAMPLE_TID)
1497 result += sizeof(u64);
1498
1499 if (type & PERF_SAMPLE_TIME)
1500 result += sizeof(u64);
1501
1502 if (type & PERF_SAMPLE_ADDR)
1503 result += sizeof(u64);
1504
1505 if (type & PERF_SAMPLE_ID)
1506 result += sizeof(u64);
1507
1508 if (type & PERF_SAMPLE_STREAM_ID)
1509 result += sizeof(u64);
1510
1511 if (type & PERF_SAMPLE_CPU)
1512 result += sizeof(u64);
1513
1514 if (type & PERF_SAMPLE_PERIOD)
1515 result += sizeof(u64);
1516
1517 if (type & PERF_SAMPLE_READ) {
1518 result += sizeof(u64);
1519 if (read_format & PERF_FORMAT_TOTAL_TIME_ENABLED)
1520 result += sizeof(u64);
1521 if (read_format & PERF_FORMAT_TOTAL_TIME_RUNNING)
1522 result += sizeof(u64);
1523 /* PERF_FORMAT_ID is forced for PERF_SAMPLE_READ */
1524 if (read_format & PERF_FORMAT_GROUP) {
1525 sz = sample->read.group.nr *
1526 sizeof(struct sample_read_value);
1527 result += sz;
1528 } else {
1529 result += sizeof(u64);
1530 }
1531 }
1532
1533 if (type & PERF_SAMPLE_CALLCHAIN) {
1534 sz = (sample->callchain->nr + 1) * sizeof(u64);
1535 result += sz;
1536 }
1537
1538 if (type & PERF_SAMPLE_RAW) {
1539 result += sizeof(u32);
1540 result += sample->raw_size;
1541 }
1542
1543 if (type & PERF_SAMPLE_BRANCH_STACK) {
1544 sz = sample->branch_stack->nr * sizeof(struct branch_entry);
1545 sz += sizeof(u64);
1546 result += sz;
1547 }
1548
1549 if (type & PERF_SAMPLE_REGS_USER) {
1550 if (sample->user_regs.abi) {
1551 result += sizeof(u64);
352ea45a 1552 sz = hweight_long(sample->user_regs.mask) * sizeof(u64);
b1cf6f65
AH
1553 result += sz;
1554 } else {
1555 result += sizeof(u64);
1556 }
1557 }
1558
1559 if (type & PERF_SAMPLE_STACK_USER) {
1560 sz = sample->user_stack.size;
1561 result += sizeof(u64);
1562 if (sz) {
1563 result += sz;
1564 result += sizeof(u64);
1565 }
1566 }
1567
1568 if (type & PERF_SAMPLE_WEIGHT)
1569 result += sizeof(u64);
1570
1571 if (type & PERF_SAMPLE_DATA_SRC)
1572 result += sizeof(u64);
1573
42d88910
AH
1574 if (type & PERF_SAMPLE_TRANSACTION)
1575 result += sizeof(u64);
1576
b1cf6f65
AH
1577 return result;
1578}
1579
74eec26f 1580int perf_event__synthesize_sample(union perf_event *event, u64 type,
352ea45a 1581 u64 read_format,
74eec26f
AV
1582 const struct perf_sample *sample,
1583 bool swapped)
1584{
1585 u64 *array;
d03f2170 1586 size_t sz;
74eec26f
AV
1587 /*
1588 * used for cross-endian analysis. See git commit 65014ab3
1589 * for why this goofiness is needed.
1590 */
6a11f92e 1591 union u64_swap u;
74eec26f
AV
1592
1593 array = event->sample.array;
1594
75562573
AH
1595 if (type & PERF_SAMPLE_IDENTIFIER) {
1596 *array = sample->id;
1597 array++;
1598 }
1599
74eec26f 1600 if (type & PERF_SAMPLE_IP) {
ef89325f 1601 *array = sample->ip;
74eec26f
AV
1602 array++;
1603 }
1604
1605 if (type & PERF_SAMPLE_TID) {
1606 u.val32[0] = sample->pid;
1607 u.val32[1] = sample->tid;
1608 if (swapped) {
1609 /*
a3f698fe 1610 * Inverse of what is done in perf_evsel__parse_sample
74eec26f
AV
1611 */
1612 u.val32[0] = bswap_32(u.val32[0]);
1613 u.val32[1] = bswap_32(u.val32[1]);
1614 u.val64 = bswap_64(u.val64);
1615 }
1616
1617 *array = u.val64;
1618 array++;
1619 }
1620
1621 if (type & PERF_SAMPLE_TIME) {
1622 *array = sample->time;
1623 array++;
1624 }
1625
1626 if (type & PERF_SAMPLE_ADDR) {
1627 *array = sample->addr;
1628 array++;
1629 }
1630
1631 if (type & PERF_SAMPLE_ID) {
1632 *array = sample->id;
1633 array++;
1634 }
1635
1636 if (type & PERF_SAMPLE_STREAM_ID) {
1637 *array = sample->stream_id;
1638 array++;
1639 }
1640
1641 if (type & PERF_SAMPLE_CPU) {
1642 u.val32[0] = sample->cpu;
1643 if (swapped) {
1644 /*
a3f698fe 1645 * Inverse of what is done in perf_evsel__parse_sample
74eec26f
AV
1646 */
1647 u.val32[0] = bswap_32(u.val32[0]);
1648 u.val64 = bswap_64(u.val64);
1649 }
1650 *array = u.val64;
1651 array++;
1652 }
1653
1654 if (type & PERF_SAMPLE_PERIOD) {
1655 *array = sample->period;
1656 array++;
1657 }
1658
d03f2170
AH
1659 if (type & PERF_SAMPLE_READ) {
1660 if (read_format & PERF_FORMAT_GROUP)
1661 *array = sample->read.group.nr;
1662 else
1663 *array = sample->read.one.value;
1664 array++;
1665
1666 if (read_format & PERF_FORMAT_TOTAL_TIME_ENABLED) {
1667 *array = sample->read.time_enabled;
1668 array++;
1669 }
1670
1671 if (read_format & PERF_FORMAT_TOTAL_TIME_RUNNING) {
1672 *array = sample->read.time_running;
1673 array++;
1674 }
1675
1676 /* PERF_FORMAT_ID is forced for PERF_SAMPLE_READ */
1677 if (read_format & PERF_FORMAT_GROUP) {
1678 sz = sample->read.group.nr *
1679 sizeof(struct sample_read_value);
1680 memcpy(array, sample->read.group.values, sz);
1681 array = (void *)array + sz;
1682 } else {
1683 *array = sample->read.one.id;
1684 array++;
1685 }
1686 }
1687
1688 if (type & PERF_SAMPLE_CALLCHAIN) {
1689 sz = (sample->callchain->nr + 1) * sizeof(u64);
1690 memcpy(array, sample->callchain, sz);
1691 array = (void *)array + sz;
1692 }
1693
1694 if (type & PERF_SAMPLE_RAW) {
1695 u.val32[0] = sample->raw_size;
1696 if (WARN_ONCE(swapped,
1697 "Endianness of raw data not corrected!\n")) {
1698 /*
1699 * Inverse of what is done in perf_evsel__parse_sample
1700 */
1701 u.val32[0] = bswap_32(u.val32[0]);
1702 u.val32[1] = bswap_32(u.val32[1]);
1703 u.val64 = bswap_64(u.val64);
1704 }
1705 *array = u.val64;
1706 array = (void *)array + sizeof(u32);
1707
1708 memcpy(array, sample->raw_data, sample->raw_size);
1709 array = (void *)array + sample->raw_size;
1710 }
1711
1712 if (type & PERF_SAMPLE_BRANCH_STACK) {
1713 sz = sample->branch_stack->nr * sizeof(struct branch_entry);
1714 sz += sizeof(u64);
1715 memcpy(array, sample->branch_stack, sz);
1716 array = (void *)array + sz;
1717 }
1718
1719 if (type & PERF_SAMPLE_REGS_USER) {
1720 if (sample->user_regs.abi) {
1721 *array++ = sample->user_regs.abi;
352ea45a 1722 sz = hweight_long(sample->user_regs.mask) * sizeof(u64);
d03f2170
AH
1723 memcpy(array, sample->user_regs.regs, sz);
1724 array = (void *)array + sz;
1725 } else {
1726 *array++ = 0;
1727 }
1728 }
1729
1730 if (type & PERF_SAMPLE_STACK_USER) {
1731 sz = sample->user_stack.size;
1732 *array++ = sz;
1733 if (sz) {
1734 memcpy(array, sample->user_stack.data, sz);
1735 array = (void *)array + sz;
1736 *array++ = sz;
1737 }
1738 }
1739
1740 if (type & PERF_SAMPLE_WEIGHT) {
1741 *array = sample->weight;
1742 array++;
1743 }
1744
1745 if (type & PERF_SAMPLE_DATA_SRC) {
1746 *array = sample->data_src;
1747 array++;
1748 }
1749
42d88910
AH
1750 if (type & PERF_SAMPLE_TRANSACTION) {
1751 *array = sample->transaction;
1752 array++;
1753 }
1754
74eec26f
AV
1755 return 0;
1756}
5555ded4 1757
efd2b924
ACM
1758struct format_field *perf_evsel__field(struct perf_evsel *evsel, const char *name)
1759{
1760 return pevent_find_field(evsel->tp_format, name);
1761}
1762
5d2074ea 1763void *perf_evsel__rawptr(struct perf_evsel *evsel, struct perf_sample *sample,
5555ded4
ACM
1764 const char *name)
1765{
efd2b924 1766 struct format_field *field = perf_evsel__field(evsel, name);
5555ded4
ACM
1767 int offset;
1768
efd2b924
ACM
1769 if (!field)
1770 return NULL;
5555ded4
ACM
1771
1772 offset = field->offset;
1773
1774 if (field->flags & FIELD_IS_DYNAMIC) {
1775 offset = *(int *)(sample->raw_data + field->offset);
1776 offset &= 0xffff;
1777 }
1778
1779 return sample->raw_data + offset;
1780}
1781
1782u64 perf_evsel__intval(struct perf_evsel *evsel, struct perf_sample *sample,
1783 const char *name)
1784{
efd2b924 1785 struct format_field *field = perf_evsel__field(evsel, name);
e6b6f679
ACM
1786 void *ptr;
1787 u64 value;
5555ded4 1788
efd2b924
ACM
1789 if (!field)
1790 return 0;
5555ded4 1791
e6b6f679 1792 ptr = sample->raw_data + field->offset;
5555ded4 1793
e6b6f679
ACM
1794 switch (field->size) {
1795 case 1:
1796 return *(u8 *)ptr;
1797 case 2:
1798 value = *(u16 *)ptr;
1799 break;
1800 case 4:
1801 value = *(u32 *)ptr;
1802 break;
1803 case 8:
1804 value = *(u64 *)ptr;
1805 break;
1806 default:
1807 return 0;
1808 }
1809
1810 if (!evsel->needs_swap)
1811 return value;
1812
1813 switch (field->size) {
1814 case 2:
1815 return bswap_16(value);
1816 case 4:
1817 return bswap_32(value);
1818 case 8:
1819 return bswap_64(value);
1820 default:
1821 return 0;
1822 }
1823
1824 return 0;
5555ded4 1825}
0698aedd
ACM
1826
1827static int comma_fprintf(FILE *fp, bool *first, const char *fmt, ...)
1828{
1829 va_list args;
1830 int ret = 0;
1831
1832 if (!*first) {
1833 ret += fprintf(fp, ",");
1834 } else {
1835 ret += fprintf(fp, ":");
1836 *first = false;
1837 }
1838
1839 va_start(args, fmt);
1840 ret += vfprintf(fp, fmt, args);
1841 va_end(args);
1842 return ret;
1843}
1844
1845static int __if_fprintf(FILE *fp, bool *first, const char *field, u64 value)
1846{
1847 if (value == 0)
1848 return 0;
1849
1850 return comma_fprintf(fp, first, " %s: %" PRIu64, field, value);
1851}
1852
1853#define if_print(field) printed += __if_fprintf(fp, &first, #field, evsel->attr.field)
1854
c79a4393
ACM
1855struct bit_names {
1856 int bit;
1857 const char *name;
1858};
1859
1860static int bits__fprintf(FILE *fp, const char *field, u64 value,
1861 struct bit_names *bits, bool *first)
1862{
1863 int i = 0, printed = comma_fprintf(fp, first, " %s: ", field);
1864 bool first_bit = true;
1865
1866 do {
1867 if (value & bits[i].bit) {
1868 printed += fprintf(fp, "%s%s", first_bit ? "" : "|", bits[i].name);
1869 first_bit = false;
1870 }
1871 } while (bits[++i].name != NULL);
1872
1873 return printed;
1874}
1875
1876static int sample_type__fprintf(FILE *fp, bool *first, u64 value)
1877{
1878#define bit_name(n) { PERF_SAMPLE_##n, #n }
1879 struct bit_names bits[] = {
1880 bit_name(IP), bit_name(TID), bit_name(TIME), bit_name(ADDR),
1881 bit_name(READ), bit_name(CALLCHAIN), bit_name(ID), bit_name(CPU),
1882 bit_name(PERIOD), bit_name(STREAM_ID), bit_name(RAW),
1883 bit_name(BRANCH_STACK), bit_name(REGS_USER), bit_name(STACK_USER),
75562573 1884 bit_name(IDENTIFIER),
c79a4393
ACM
1885 { .name = NULL, }
1886 };
1887#undef bit_name
1888 return bits__fprintf(fp, "sample_type", value, bits, first);
1889}
1890
1891static int read_format__fprintf(FILE *fp, bool *first, u64 value)
1892{
1893#define bit_name(n) { PERF_FORMAT_##n, #n }
1894 struct bit_names bits[] = {
1895 bit_name(TOTAL_TIME_ENABLED), bit_name(TOTAL_TIME_RUNNING),
1896 bit_name(ID), bit_name(GROUP),
1897 { .name = NULL, }
1898 };
1899#undef bit_name
1900 return bits__fprintf(fp, "read_format", value, bits, first);
1901}
1902
0698aedd
ACM
1903int perf_evsel__fprintf(struct perf_evsel *evsel,
1904 struct perf_attr_details *details, FILE *fp)
1905{
1906 bool first = true;
e6ab07d0
NK
1907 int printed = 0;
1908
e35ef355 1909 if (details->event_group) {
e6ab07d0
NK
1910 struct perf_evsel *pos;
1911
1912 if (!perf_evsel__is_group_leader(evsel))
1913 return 0;
1914
1915 if (evsel->nr_members > 1)
1916 printed += fprintf(fp, "%s{", evsel->group_name ?: "");
1917
1918 printed += fprintf(fp, "%s", perf_evsel__name(evsel));
1919 for_each_group_member(pos, evsel)
1920 printed += fprintf(fp, ",%s", perf_evsel__name(pos));
1921
1922 if (evsel->nr_members > 1)
1923 printed += fprintf(fp, "}");
1924 goto out;
1925 }
1926
1927 printed += fprintf(fp, "%s", perf_evsel__name(evsel));
0698aedd
ACM
1928
1929 if (details->verbose || details->freq) {
1930 printed += comma_fprintf(fp, &first, " sample_freq=%" PRIu64,
1931 (u64)evsel->attr.sample_freq);
1932 }
1933
1934 if (details->verbose) {
1935 if_print(type);
1936 if_print(config);
1937 if_print(config1);
1938 if_print(config2);
1939 if_print(size);
c79a4393
ACM
1940 printed += sample_type__fprintf(fp, &first, evsel->attr.sample_type);
1941 if (evsel->attr.read_format)
1942 printed += read_format__fprintf(fp, &first, evsel->attr.read_format);
0698aedd
ACM
1943 if_print(disabled);
1944 if_print(inherit);
1945 if_print(pinned);
1946 if_print(exclusive);
1947 if_print(exclude_user);
1948 if_print(exclude_kernel);
1949 if_print(exclude_hv);
1950 if_print(exclude_idle);
1951 if_print(mmap);
5c5e854b 1952 if_print(mmap2);
0698aedd 1953 if_print(comm);
022c50d0 1954 if_print(comm_exec);
0698aedd
ACM
1955 if_print(freq);
1956 if_print(inherit_stat);
1957 if_print(enable_on_exec);
1958 if_print(task);
1959 if_print(watermark);
1960 if_print(precise_ip);
1961 if_print(mmap_data);
1962 if_print(sample_id_all);
1963 if_print(exclude_host);
1964 if_print(exclude_guest);
1965 if_print(__reserved_1);
1966 if_print(wakeup_events);
1967 if_print(bp_type);
1968 if_print(branch_sample_type);
1969 }
e6ab07d0 1970out:
0698aedd
ACM
1971 fputc('\n', fp);
1972 return ++printed;
1973}
c0a54341
ACM
1974
1975bool perf_evsel__fallback(struct perf_evsel *evsel, int err,
1976 char *msg, size_t msgsize)
1977{
2b821cce 1978 if ((err == ENOENT || err == ENXIO || err == ENODEV) &&
c0a54341
ACM
1979 evsel->attr.type == PERF_TYPE_HARDWARE &&
1980 evsel->attr.config == PERF_COUNT_HW_CPU_CYCLES) {
1981 /*
1982 * If it's cycles then fall back to hrtimer based
1983 * cpu-clock-tick sw counter, which is always available even if
1984 * no PMU support.
1985 *
1986 * PPC returns ENXIO until 2.6.37 (behavior changed with commit
1987 * b0a873e).
1988 */
1989 scnprintf(msg, msgsize, "%s",
1990"The cycles event is not supported, trying to fall back to cpu-clock-ticks");
1991
1992 evsel->attr.type = PERF_TYPE_SOFTWARE;
1993 evsel->attr.config = PERF_COUNT_SW_CPU_CLOCK;
1994
04662523 1995 zfree(&evsel->name);
c0a54341
ACM
1996 return true;
1997 }
1998
1999 return false;
2000}
56e52e85 2001
602ad878 2002int perf_evsel__open_strerror(struct perf_evsel *evsel, struct target *target,
56e52e85
ACM
2003 int err, char *msg, size_t size)
2004{
2005 switch (err) {
2006 case EPERM:
2007 case EACCES:
b69e63a4 2008 return scnprintf(msg, size,
56e52e85
ACM
2009 "You may not have permission to collect %sstats.\n"
2010 "Consider tweaking /proc/sys/kernel/perf_event_paranoid:\n"
2011 " -1 - Not paranoid at all\n"
2012 " 0 - Disallow raw tracepoint access for unpriv\n"
2013 " 1 - Disallow cpu events for unpriv\n"
2014 " 2 - Disallow kernel profiling for unpriv",
2015 target->system_wide ? "system-wide " : "");
2016 case ENOENT:
2017 return scnprintf(msg, size, "The %s event is not supported.",
2018 perf_evsel__name(evsel));
2019 case EMFILE:
2020 return scnprintf(msg, size, "%s",
2021 "Too many events are opened.\n"
2022 "Try again after reducing the number of events.");
2023 case ENODEV:
2024 if (target->cpu_list)
2025 return scnprintf(msg, size, "%s",
2026 "No such device - did you specify an out-of-range profile CPU?\n");
2027 break;
2028 case EOPNOTSUPP:
2029 if (evsel->attr.precise_ip)
2030 return scnprintf(msg, size, "%s",
2031 "\'precise\' request may not be supported. Try removing 'p' modifier.");
2032#if defined(__i386__) || defined(__x86_64__)
2033 if (evsel->attr.type == PERF_TYPE_HARDWARE)
2034 return scnprintf(msg, size, "%s",
2035 "No hardware sampling interrupt available.\n"
2036 "No APIC? If so then you can boot the kernel with the \"lapic\" boot parameter to force-enable it.");
2037#endif
2038 break;
2039 default:
2040 break;
2041 }
2042
2043 return scnprintf(msg, size,
2044 "The sys_perf_event_open() syscall returned with %d (%s) for event (%s). \n"
2045 "/bin/dmesg may provide additional information.\n"
2046 "No CONFIG_PERF_EVENTS=y kernel support configured?\n",
2047 err, strerror(err), perf_evsel__name(evsel));
2048}
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