Commit | Line | Data |
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f8a95309 ACM |
1 | /* |
2 | * Copyright (C) 2011, Red Hat Inc, Arnaldo Carvalho de Melo <acme@redhat.com> | |
3 | * | |
4 | * Parts came from builtin-{top,stat,record}.c, see those files for further | |
5 | * copyright notes. | |
6 | * | |
7 | * Released under the GPL v2. (and only v2, not any later version) | |
8 | */ | |
9 | ||
936be503 | 10 | #include <byteswap.h> |
0f6a3015 | 11 | #include <linux/bitops.h> |
553873e1 | 12 | #include <api/fs/debugfs.h> |
4e319027 RR |
13 | #include <traceevent/event-parse.h> |
14 | #include <linux/hw_breakpoint.h> | |
15 | #include <linux/perf_event.h> | |
bec19672 | 16 | #include <sys/resource.h> |
4e319027 | 17 | #include "asm/bug.h" |
8f651eae | 18 | #include "callchain.h" |
f14d5707 | 19 | #include "cgroup.h" |
69aad6f1 | 20 | #include "evsel.h" |
70082dd9 | 21 | #include "evlist.h" |
69aad6f1 | 22 | #include "util.h" |
86bd5e86 | 23 | #include "cpumap.h" |
fd78260b | 24 | #include "thread_map.h" |
12864b31 | 25 | #include "target.h" |
26d33022 | 26 | #include "perf_regs.h" |
e3e1a54f | 27 | #include "debug.h" |
97978b3e | 28 | #include "trace-event.h" |
a9a3a4d9 | 29 | #include "stat.h" |
69aad6f1 | 30 | |
594ac61a ACM |
31 | static struct { |
32 | bool sample_id_all; | |
33 | bool exclude_guest; | |
5c5e854b | 34 | bool mmap2; |
57480d2c | 35 | bool cloexec; |
814c8c38 PZ |
36 | bool clockid; |
37 | bool clockid_wrong; | |
594ac61a ACM |
38 | } perf_missing_features; |
39 | ||
814c8c38 PZ |
40 | static clockid_t clockid; |
41 | ||
ce8ccff5 ACM |
42 | static int perf_evsel__no_extra_init(struct perf_evsel *evsel __maybe_unused) |
43 | { | |
44 | return 0; | |
45 | } | |
46 | ||
47 | static void perf_evsel__no_extra_fini(struct perf_evsel *evsel __maybe_unused) | |
48 | { | |
49 | } | |
50 | ||
51 | static struct { | |
52 | size_t size; | |
53 | int (*init)(struct perf_evsel *evsel); | |
54 | void (*fini)(struct perf_evsel *evsel); | |
55 | } perf_evsel__object = { | |
56 | .size = sizeof(struct perf_evsel), | |
57 | .init = perf_evsel__no_extra_init, | |
58 | .fini = perf_evsel__no_extra_fini, | |
59 | }; | |
60 | ||
61 | int perf_evsel__object_config(size_t object_size, | |
62 | int (*init)(struct perf_evsel *evsel), | |
63 | void (*fini)(struct perf_evsel *evsel)) | |
64 | { | |
65 | ||
66 | if (object_size == 0) | |
67 | goto set_methods; | |
68 | ||
69 | if (perf_evsel__object.size > object_size) | |
70 | return -EINVAL; | |
71 | ||
72 | perf_evsel__object.size = object_size; | |
73 | ||
74 | set_methods: | |
75 | if (init != NULL) | |
76 | perf_evsel__object.init = init; | |
77 | ||
78 | if (fini != NULL) | |
79 | perf_evsel__object.fini = fini; | |
80 | ||
81 | return 0; | |
82 | } | |
83 | ||
c52b12ed ACM |
84 | #define FD(e, x, y) (*(int *)xyarray__entry(e->fd, x, y)) |
85 | ||
75562573 | 86 | int __perf_evsel__sample_size(u64 sample_type) |
c2a70653 ACM |
87 | { |
88 | u64 mask = sample_type & PERF_SAMPLE_MASK; | |
89 | int size = 0; | |
90 | int i; | |
91 | ||
92 | for (i = 0; i < 64; i++) { | |
93 | if (mask & (1ULL << i)) | |
94 | size++; | |
95 | } | |
96 | ||
97 | size *= sizeof(u64); | |
98 | ||
99 | return size; | |
100 | } | |
101 | ||
75562573 AH |
102 | /** |
103 | * __perf_evsel__calc_id_pos - calculate id_pos. | |
104 | * @sample_type: sample type | |
105 | * | |
106 | * This function returns the position of the event id (PERF_SAMPLE_ID or | |
107 | * PERF_SAMPLE_IDENTIFIER) in a sample event i.e. in the array of struct | |
108 | * sample_event. | |
109 | */ | |
110 | static int __perf_evsel__calc_id_pos(u64 sample_type) | |
111 | { | |
112 | int idx = 0; | |
113 | ||
114 | if (sample_type & PERF_SAMPLE_IDENTIFIER) | |
115 | return 0; | |
116 | ||
117 | if (!(sample_type & PERF_SAMPLE_ID)) | |
118 | return -1; | |
119 | ||
120 | if (sample_type & PERF_SAMPLE_IP) | |
121 | idx += 1; | |
122 | ||
123 | if (sample_type & PERF_SAMPLE_TID) | |
124 | idx += 1; | |
125 | ||
126 | if (sample_type & PERF_SAMPLE_TIME) | |
127 | idx += 1; | |
128 | ||
129 | if (sample_type & PERF_SAMPLE_ADDR) | |
130 | idx += 1; | |
131 | ||
132 | return idx; | |
133 | } | |
134 | ||
135 | /** | |
136 | * __perf_evsel__calc_is_pos - calculate is_pos. | |
137 | * @sample_type: sample type | |
138 | * | |
139 | * This function returns the position (counting backwards) of the event id | |
140 | * (PERF_SAMPLE_ID or PERF_SAMPLE_IDENTIFIER) in a non-sample event i.e. if | |
141 | * sample_id_all is used there is an id sample appended to non-sample events. | |
142 | */ | |
143 | static int __perf_evsel__calc_is_pos(u64 sample_type) | |
144 | { | |
145 | int idx = 1; | |
146 | ||
147 | if (sample_type & PERF_SAMPLE_IDENTIFIER) | |
148 | return 1; | |
149 | ||
150 | if (!(sample_type & PERF_SAMPLE_ID)) | |
151 | return -1; | |
152 | ||
153 | if (sample_type & PERF_SAMPLE_CPU) | |
154 | idx += 1; | |
155 | ||
156 | if (sample_type & PERF_SAMPLE_STREAM_ID) | |
157 | idx += 1; | |
158 | ||
159 | return idx; | |
160 | } | |
161 | ||
162 | void perf_evsel__calc_id_pos(struct perf_evsel *evsel) | |
163 | { | |
164 | evsel->id_pos = __perf_evsel__calc_id_pos(evsel->attr.sample_type); | |
165 | evsel->is_pos = __perf_evsel__calc_is_pos(evsel->attr.sample_type); | |
166 | } | |
167 | ||
7be5ebe8 ACM |
168 | void __perf_evsel__set_sample_bit(struct perf_evsel *evsel, |
169 | enum perf_event_sample_format bit) | |
170 | { | |
171 | if (!(evsel->attr.sample_type & bit)) { | |
172 | evsel->attr.sample_type |= bit; | |
173 | evsel->sample_size += sizeof(u64); | |
75562573 | 174 | perf_evsel__calc_id_pos(evsel); |
7be5ebe8 ACM |
175 | } |
176 | } | |
177 | ||
178 | void __perf_evsel__reset_sample_bit(struct perf_evsel *evsel, | |
179 | enum perf_event_sample_format bit) | |
180 | { | |
181 | if (evsel->attr.sample_type & bit) { | |
182 | evsel->attr.sample_type &= ~bit; | |
183 | evsel->sample_size -= sizeof(u64); | |
75562573 | 184 | perf_evsel__calc_id_pos(evsel); |
7be5ebe8 ACM |
185 | } |
186 | } | |
187 | ||
75562573 AH |
188 | void perf_evsel__set_sample_id(struct perf_evsel *evsel, |
189 | bool can_sample_identifier) | |
7a5a5ca5 | 190 | { |
75562573 AH |
191 | if (can_sample_identifier) { |
192 | perf_evsel__reset_sample_bit(evsel, ID); | |
193 | perf_evsel__set_sample_bit(evsel, IDENTIFIER); | |
194 | } else { | |
195 | perf_evsel__set_sample_bit(evsel, ID); | |
196 | } | |
7a5a5ca5 ACM |
197 | evsel->attr.read_format |= PERF_FORMAT_ID; |
198 | } | |
199 | ||
ef1d1af2 ACM |
200 | void perf_evsel__init(struct perf_evsel *evsel, |
201 | struct perf_event_attr *attr, int idx) | |
202 | { | |
203 | evsel->idx = idx; | |
60b0896c | 204 | evsel->tracking = !idx; |
ef1d1af2 | 205 | evsel->attr = *attr; |
2cfda562 | 206 | evsel->leader = evsel; |
410136f5 SE |
207 | evsel->unit = ""; |
208 | evsel->scale = 1.0; | |
ef1d1af2 | 209 | INIT_LIST_HEAD(&evsel->node); |
ce8ccff5 | 210 | perf_evsel__object.init(evsel); |
bde09467 | 211 | evsel->sample_size = __perf_evsel__sample_size(attr->sample_type); |
75562573 | 212 | perf_evsel__calc_id_pos(evsel); |
ef1d1af2 ACM |
213 | } |
214 | ||
ef503831 | 215 | struct perf_evsel *perf_evsel__new_idx(struct perf_event_attr *attr, int idx) |
69aad6f1 | 216 | { |
ce8ccff5 | 217 | struct perf_evsel *evsel = zalloc(perf_evsel__object.size); |
69aad6f1 | 218 | |
ef1d1af2 ACM |
219 | if (evsel != NULL) |
220 | perf_evsel__init(evsel, attr, idx); | |
69aad6f1 ACM |
221 | |
222 | return evsel; | |
223 | } | |
224 | ||
ef503831 | 225 | struct perf_evsel *perf_evsel__newtp_idx(const char *sys, const char *name, int idx) |
efd2b924 | 226 | { |
ce8ccff5 | 227 | struct perf_evsel *evsel = zalloc(perf_evsel__object.size); |
efd2b924 ACM |
228 | |
229 | if (evsel != NULL) { | |
230 | struct perf_event_attr attr = { | |
0b80f8b3 ACM |
231 | .type = PERF_TYPE_TRACEPOINT, |
232 | .sample_type = (PERF_SAMPLE_RAW | PERF_SAMPLE_TIME | | |
233 | PERF_SAMPLE_CPU | PERF_SAMPLE_PERIOD), | |
efd2b924 ACM |
234 | }; |
235 | ||
e48ffe2b ACM |
236 | if (asprintf(&evsel->name, "%s:%s", sys, name) < 0) |
237 | goto out_free; | |
238 | ||
97978b3e | 239 | evsel->tp_format = trace_event__tp_format(sys, name); |
efd2b924 ACM |
240 | if (evsel->tp_format == NULL) |
241 | goto out_free; | |
242 | ||
0b80f8b3 | 243 | event_attr_init(&attr); |
efd2b924 | 244 | attr.config = evsel->tp_format->id; |
0b80f8b3 | 245 | attr.sample_period = 1; |
efd2b924 | 246 | perf_evsel__init(evsel, &attr, idx); |
efd2b924 ACM |
247 | } |
248 | ||
249 | return evsel; | |
250 | ||
251 | out_free: | |
74cf249d | 252 | zfree(&evsel->name); |
efd2b924 ACM |
253 | free(evsel); |
254 | return NULL; | |
255 | } | |
256 | ||
8ad7013b | 257 | const char *perf_evsel__hw_names[PERF_COUNT_HW_MAX] = { |
c410431c ACM |
258 | "cycles", |
259 | "instructions", | |
260 | "cache-references", | |
261 | "cache-misses", | |
262 | "branches", | |
263 | "branch-misses", | |
264 | "bus-cycles", | |
265 | "stalled-cycles-frontend", | |
266 | "stalled-cycles-backend", | |
267 | "ref-cycles", | |
268 | }; | |
269 | ||
dd4f5223 | 270 | static const char *__perf_evsel__hw_name(u64 config) |
c410431c ACM |
271 | { |
272 | if (config < PERF_COUNT_HW_MAX && perf_evsel__hw_names[config]) | |
273 | return perf_evsel__hw_names[config]; | |
274 | ||
275 | return "unknown-hardware"; | |
276 | } | |
277 | ||
27f18617 | 278 | static int perf_evsel__add_modifiers(struct perf_evsel *evsel, char *bf, size_t size) |
c410431c | 279 | { |
27f18617 | 280 | int colon = 0, r = 0; |
c410431c | 281 | struct perf_event_attr *attr = &evsel->attr; |
c410431c ACM |
282 | bool exclude_guest_default = false; |
283 | ||
284 | #define MOD_PRINT(context, mod) do { \ | |
285 | if (!attr->exclude_##context) { \ | |
27f18617 | 286 | if (!colon) colon = ++r; \ |
c410431c ACM |
287 | r += scnprintf(bf + r, size - r, "%c", mod); \ |
288 | } } while(0) | |
289 | ||
290 | if (attr->exclude_kernel || attr->exclude_user || attr->exclude_hv) { | |
291 | MOD_PRINT(kernel, 'k'); | |
292 | MOD_PRINT(user, 'u'); | |
293 | MOD_PRINT(hv, 'h'); | |
294 | exclude_guest_default = true; | |
295 | } | |
296 | ||
297 | if (attr->precise_ip) { | |
298 | if (!colon) | |
27f18617 | 299 | colon = ++r; |
c410431c ACM |
300 | r += scnprintf(bf + r, size - r, "%.*s", attr->precise_ip, "ppp"); |
301 | exclude_guest_default = true; | |
302 | } | |
303 | ||
304 | if (attr->exclude_host || attr->exclude_guest == exclude_guest_default) { | |
305 | MOD_PRINT(host, 'H'); | |
306 | MOD_PRINT(guest, 'G'); | |
307 | } | |
308 | #undef MOD_PRINT | |
309 | if (colon) | |
27f18617 | 310 | bf[colon - 1] = ':'; |
c410431c ACM |
311 | return r; |
312 | } | |
313 | ||
27f18617 ACM |
314 | static int perf_evsel__hw_name(struct perf_evsel *evsel, char *bf, size_t size) |
315 | { | |
316 | int r = scnprintf(bf, size, "%s", __perf_evsel__hw_name(evsel->attr.config)); | |
317 | return r + perf_evsel__add_modifiers(evsel, bf + r, size - r); | |
318 | } | |
319 | ||
8ad7013b | 320 | const char *perf_evsel__sw_names[PERF_COUNT_SW_MAX] = { |
335c2f5d ACM |
321 | "cpu-clock", |
322 | "task-clock", | |
323 | "page-faults", | |
324 | "context-switches", | |
8ad7013b | 325 | "cpu-migrations", |
335c2f5d ACM |
326 | "minor-faults", |
327 | "major-faults", | |
328 | "alignment-faults", | |
329 | "emulation-faults", | |
d22d1a2a | 330 | "dummy", |
335c2f5d ACM |
331 | }; |
332 | ||
dd4f5223 | 333 | static const char *__perf_evsel__sw_name(u64 config) |
335c2f5d ACM |
334 | { |
335 | if (config < PERF_COUNT_SW_MAX && perf_evsel__sw_names[config]) | |
336 | return perf_evsel__sw_names[config]; | |
337 | return "unknown-software"; | |
338 | } | |
339 | ||
340 | static int perf_evsel__sw_name(struct perf_evsel *evsel, char *bf, size_t size) | |
341 | { | |
342 | int r = scnprintf(bf, size, "%s", __perf_evsel__sw_name(evsel->attr.config)); | |
343 | return r + perf_evsel__add_modifiers(evsel, bf + r, size - r); | |
344 | } | |
345 | ||
287e74aa JO |
346 | static int __perf_evsel__bp_name(char *bf, size_t size, u64 addr, u64 type) |
347 | { | |
348 | int r; | |
349 | ||
350 | r = scnprintf(bf, size, "mem:0x%" PRIx64 ":", addr); | |
351 | ||
352 | if (type & HW_BREAKPOINT_R) | |
353 | r += scnprintf(bf + r, size - r, "r"); | |
354 | ||
355 | if (type & HW_BREAKPOINT_W) | |
356 | r += scnprintf(bf + r, size - r, "w"); | |
357 | ||
358 | if (type & HW_BREAKPOINT_X) | |
359 | r += scnprintf(bf + r, size - r, "x"); | |
360 | ||
361 | return r; | |
362 | } | |
363 | ||
364 | static int perf_evsel__bp_name(struct perf_evsel *evsel, char *bf, size_t size) | |
365 | { | |
366 | struct perf_event_attr *attr = &evsel->attr; | |
367 | int r = __perf_evsel__bp_name(bf, size, attr->bp_addr, attr->bp_type); | |
368 | return r + perf_evsel__add_modifiers(evsel, bf + r, size - r); | |
369 | } | |
370 | ||
0b668bc9 ACM |
371 | const char *perf_evsel__hw_cache[PERF_COUNT_HW_CACHE_MAX] |
372 | [PERF_EVSEL__MAX_ALIASES] = { | |
373 | { "L1-dcache", "l1-d", "l1d", "L1-data", }, | |
374 | { "L1-icache", "l1-i", "l1i", "L1-instruction", }, | |
375 | { "LLC", "L2", }, | |
376 | { "dTLB", "d-tlb", "Data-TLB", }, | |
377 | { "iTLB", "i-tlb", "Instruction-TLB", }, | |
378 | { "branch", "branches", "bpu", "btb", "bpc", }, | |
379 | { "node", }, | |
380 | }; | |
381 | ||
382 | const char *perf_evsel__hw_cache_op[PERF_COUNT_HW_CACHE_OP_MAX] | |
383 | [PERF_EVSEL__MAX_ALIASES] = { | |
384 | { "load", "loads", "read", }, | |
385 | { "store", "stores", "write", }, | |
386 | { "prefetch", "prefetches", "speculative-read", "speculative-load", }, | |
387 | }; | |
388 | ||
389 | const char *perf_evsel__hw_cache_result[PERF_COUNT_HW_CACHE_RESULT_MAX] | |
390 | [PERF_EVSEL__MAX_ALIASES] = { | |
391 | { "refs", "Reference", "ops", "access", }, | |
392 | { "misses", "miss", }, | |
393 | }; | |
394 | ||
395 | #define C(x) PERF_COUNT_HW_CACHE_##x | |
396 | #define CACHE_READ (1 << C(OP_READ)) | |
397 | #define CACHE_WRITE (1 << C(OP_WRITE)) | |
398 | #define CACHE_PREFETCH (1 << C(OP_PREFETCH)) | |
399 | #define COP(x) (1 << x) | |
400 | ||
401 | /* | |
402 | * cache operartion stat | |
403 | * L1I : Read and prefetch only | |
404 | * ITLB and BPU : Read-only | |
405 | */ | |
406 | static unsigned long perf_evsel__hw_cache_stat[C(MAX)] = { | |
407 | [C(L1D)] = (CACHE_READ | CACHE_WRITE | CACHE_PREFETCH), | |
408 | [C(L1I)] = (CACHE_READ | CACHE_PREFETCH), | |
409 | [C(LL)] = (CACHE_READ | CACHE_WRITE | CACHE_PREFETCH), | |
410 | [C(DTLB)] = (CACHE_READ | CACHE_WRITE | CACHE_PREFETCH), | |
411 | [C(ITLB)] = (CACHE_READ), | |
412 | [C(BPU)] = (CACHE_READ), | |
413 | [C(NODE)] = (CACHE_READ | CACHE_WRITE | CACHE_PREFETCH), | |
414 | }; | |
415 | ||
416 | bool perf_evsel__is_cache_op_valid(u8 type, u8 op) | |
417 | { | |
418 | if (perf_evsel__hw_cache_stat[type] & COP(op)) | |
419 | return true; /* valid */ | |
420 | else | |
421 | return false; /* invalid */ | |
422 | } | |
423 | ||
424 | int __perf_evsel__hw_cache_type_op_res_name(u8 type, u8 op, u8 result, | |
425 | char *bf, size_t size) | |
426 | { | |
427 | if (result) { | |
428 | return scnprintf(bf, size, "%s-%s-%s", perf_evsel__hw_cache[type][0], | |
429 | perf_evsel__hw_cache_op[op][0], | |
430 | perf_evsel__hw_cache_result[result][0]); | |
431 | } | |
432 | ||
433 | return scnprintf(bf, size, "%s-%s", perf_evsel__hw_cache[type][0], | |
434 | perf_evsel__hw_cache_op[op][1]); | |
435 | } | |
436 | ||
dd4f5223 | 437 | static int __perf_evsel__hw_cache_name(u64 config, char *bf, size_t size) |
0b668bc9 ACM |
438 | { |
439 | u8 op, result, type = (config >> 0) & 0xff; | |
440 | const char *err = "unknown-ext-hardware-cache-type"; | |
441 | ||
442 | if (type > PERF_COUNT_HW_CACHE_MAX) | |
443 | goto out_err; | |
444 | ||
445 | op = (config >> 8) & 0xff; | |
446 | err = "unknown-ext-hardware-cache-op"; | |
447 | if (op > PERF_COUNT_HW_CACHE_OP_MAX) | |
448 | goto out_err; | |
449 | ||
450 | result = (config >> 16) & 0xff; | |
451 | err = "unknown-ext-hardware-cache-result"; | |
452 | if (result > PERF_COUNT_HW_CACHE_RESULT_MAX) | |
453 | goto out_err; | |
454 | ||
455 | err = "invalid-cache"; | |
456 | if (!perf_evsel__is_cache_op_valid(type, op)) | |
457 | goto out_err; | |
458 | ||
459 | return __perf_evsel__hw_cache_type_op_res_name(type, op, result, bf, size); | |
460 | out_err: | |
461 | return scnprintf(bf, size, "%s", err); | |
462 | } | |
463 | ||
464 | static int perf_evsel__hw_cache_name(struct perf_evsel *evsel, char *bf, size_t size) | |
465 | { | |
466 | int ret = __perf_evsel__hw_cache_name(evsel->attr.config, bf, size); | |
467 | return ret + perf_evsel__add_modifiers(evsel, bf + ret, size - ret); | |
468 | } | |
469 | ||
6eef3d9c ACM |
470 | static int perf_evsel__raw_name(struct perf_evsel *evsel, char *bf, size_t size) |
471 | { | |
472 | int ret = scnprintf(bf, size, "raw 0x%" PRIx64, evsel->attr.config); | |
473 | return ret + perf_evsel__add_modifiers(evsel, bf + ret, size - ret); | |
474 | } | |
475 | ||
7289f83c | 476 | const char *perf_evsel__name(struct perf_evsel *evsel) |
a4460836 | 477 | { |
7289f83c | 478 | char bf[128]; |
a4460836 | 479 | |
7289f83c ACM |
480 | if (evsel->name) |
481 | return evsel->name; | |
c410431c ACM |
482 | |
483 | switch (evsel->attr.type) { | |
484 | case PERF_TYPE_RAW: | |
6eef3d9c | 485 | perf_evsel__raw_name(evsel, bf, sizeof(bf)); |
c410431c ACM |
486 | break; |
487 | ||
488 | case PERF_TYPE_HARDWARE: | |
7289f83c | 489 | perf_evsel__hw_name(evsel, bf, sizeof(bf)); |
c410431c | 490 | break; |
0b668bc9 ACM |
491 | |
492 | case PERF_TYPE_HW_CACHE: | |
7289f83c | 493 | perf_evsel__hw_cache_name(evsel, bf, sizeof(bf)); |
0b668bc9 ACM |
494 | break; |
495 | ||
335c2f5d | 496 | case PERF_TYPE_SOFTWARE: |
7289f83c | 497 | perf_evsel__sw_name(evsel, bf, sizeof(bf)); |
335c2f5d ACM |
498 | break; |
499 | ||
a4460836 | 500 | case PERF_TYPE_TRACEPOINT: |
7289f83c | 501 | scnprintf(bf, sizeof(bf), "%s", "unknown tracepoint"); |
a4460836 ACM |
502 | break; |
503 | ||
287e74aa JO |
504 | case PERF_TYPE_BREAKPOINT: |
505 | perf_evsel__bp_name(evsel, bf, sizeof(bf)); | |
506 | break; | |
507 | ||
c410431c | 508 | default: |
ca1b1457 RR |
509 | scnprintf(bf, sizeof(bf), "unknown attr type: %d", |
510 | evsel->attr.type); | |
a4460836 | 511 | break; |
c410431c ACM |
512 | } |
513 | ||
7289f83c ACM |
514 | evsel->name = strdup(bf); |
515 | ||
516 | return evsel->name ?: "unknown"; | |
c410431c ACM |
517 | } |
518 | ||
717e263f NK |
519 | const char *perf_evsel__group_name(struct perf_evsel *evsel) |
520 | { | |
521 | return evsel->group_name ?: "anon group"; | |
522 | } | |
523 | ||
524 | int perf_evsel__group_desc(struct perf_evsel *evsel, char *buf, size_t size) | |
525 | { | |
526 | int ret; | |
527 | struct perf_evsel *pos; | |
528 | const char *group_name = perf_evsel__group_name(evsel); | |
529 | ||
530 | ret = scnprintf(buf, size, "%s", group_name); | |
531 | ||
532 | ret += scnprintf(buf + ret, size - ret, " { %s", | |
533 | perf_evsel__name(evsel)); | |
534 | ||
535 | for_each_group_member(pos, evsel) | |
536 | ret += scnprintf(buf + ret, size - ret, ", %s", | |
537 | perf_evsel__name(pos)); | |
538 | ||
539 | ret += scnprintf(buf + ret, size - ret, " }"); | |
540 | ||
541 | return ret; | |
542 | } | |
543 | ||
6bedfab6 | 544 | static void |
aad2b21c KL |
545 | perf_evsel__config_callgraph(struct perf_evsel *evsel, |
546 | struct record_opts *opts) | |
6bedfab6 JO |
547 | { |
548 | bool function = perf_evsel__is_function_event(evsel); | |
549 | struct perf_event_attr *attr = &evsel->attr; | |
550 | ||
551 | perf_evsel__set_sample_bit(evsel, CALLCHAIN); | |
552 | ||
aad2b21c KL |
553 | if (callchain_param.record_mode == CALLCHAIN_LBR) { |
554 | if (!opts->branch_stack) { | |
555 | if (attr->exclude_user) { | |
556 | pr_warning("LBR callstack option is only available " | |
557 | "to get user callchain information. " | |
558 | "Falling back to framepointers.\n"); | |
559 | } else { | |
560 | perf_evsel__set_sample_bit(evsel, BRANCH_STACK); | |
561 | attr->branch_sample_type = PERF_SAMPLE_BRANCH_USER | | |
562 | PERF_SAMPLE_BRANCH_CALL_STACK; | |
563 | } | |
564 | } else | |
565 | pr_warning("Cannot use LBR callstack with branch stack. " | |
566 | "Falling back to framepointers.\n"); | |
567 | } | |
568 | ||
72a128aa | 569 | if (callchain_param.record_mode == CALLCHAIN_DWARF) { |
6bedfab6 JO |
570 | if (!function) { |
571 | perf_evsel__set_sample_bit(evsel, REGS_USER); | |
572 | perf_evsel__set_sample_bit(evsel, STACK_USER); | |
573 | attr->sample_regs_user = PERF_REGS_MASK; | |
72a128aa | 574 | attr->sample_stack_user = callchain_param.dump_size; |
6bedfab6 JO |
575 | attr->exclude_callchain_user = 1; |
576 | } else { | |
577 | pr_info("Cannot use DWARF unwind for function trace event," | |
578 | " falling back to framepointers.\n"); | |
579 | } | |
580 | } | |
581 | ||
582 | if (function) { | |
583 | pr_info("Disabling user space callchains for function trace event.\n"); | |
584 | attr->exclude_callchain_user = 1; | |
585 | } | |
586 | } | |
587 | ||
774cb499 JO |
588 | /* |
589 | * The enable_on_exec/disabled value strategy: | |
590 | * | |
591 | * 1) For any type of traced program: | |
592 | * - all independent events and group leaders are disabled | |
593 | * - all group members are enabled | |
594 | * | |
595 | * Group members are ruled by group leaders. They need to | |
596 | * be enabled, because the group scheduling relies on that. | |
597 | * | |
598 | * 2) For traced programs executed by perf: | |
599 | * - all independent events and group leaders have | |
600 | * enable_on_exec set | |
601 | * - we don't specifically enable or disable any event during | |
602 | * the record command | |
603 | * | |
604 | * Independent events and group leaders are initially disabled | |
605 | * and get enabled by exec. Group members are ruled by group | |
606 | * leaders as stated in 1). | |
607 | * | |
608 | * 3) For traced programs attached by perf (pid/tid): | |
609 | * - we specifically enable or disable all events during | |
610 | * the record command | |
611 | * | |
612 | * When attaching events to already running traced we | |
613 | * enable/disable events specifically, as there's no | |
614 | * initial traced exec call. | |
615 | */ | |
b4006796 | 616 | void perf_evsel__config(struct perf_evsel *evsel, struct record_opts *opts) |
0f82ebc4 | 617 | { |
3c176311 | 618 | struct perf_evsel *leader = evsel->leader; |
0f82ebc4 | 619 | struct perf_event_attr *attr = &evsel->attr; |
60b0896c | 620 | int track = evsel->tracking; |
3aa5939d | 621 | bool per_cpu = opts->target.default_per_cpu && !opts->target.per_thread; |
0f82ebc4 | 622 | |
594ac61a | 623 | attr->sample_id_all = perf_missing_features.sample_id_all ? 0 : 1; |
0f82ebc4 | 624 | attr->inherit = !opts->no_inherit; |
0f82ebc4 | 625 | |
7be5ebe8 ACM |
626 | perf_evsel__set_sample_bit(evsel, IP); |
627 | perf_evsel__set_sample_bit(evsel, TID); | |
0f82ebc4 | 628 | |
3c176311 JO |
629 | if (evsel->sample_read) { |
630 | perf_evsel__set_sample_bit(evsel, READ); | |
631 | ||
632 | /* | |
633 | * We need ID even in case of single event, because | |
634 | * PERF_SAMPLE_READ process ID specific data. | |
635 | */ | |
75562573 | 636 | perf_evsel__set_sample_id(evsel, false); |
3c176311 JO |
637 | |
638 | /* | |
639 | * Apply group format only if we belong to group | |
640 | * with more than one members. | |
641 | */ | |
642 | if (leader->nr_members > 1) { | |
643 | attr->read_format |= PERF_FORMAT_GROUP; | |
644 | attr->inherit = 0; | |
645 | } | |
646 | } | |
647 | ||
0f82ebc4 | 648 | /* |
17314e23 | 649 | * We default some events to have a default interval. But keep |
0f82ebc4 ACM |
650 | * it a weak assumption overridable by the user. |
651 | */ | |
17314e23 | 652 | if (!attr->sample_period || (opts->user_freq != UINT_MAX || |
0f82ebc4 ACM |
653 | opts->user_interval != ULLONG_MAX)) { |
654 | if (opts->freq) { | |
7be5ebe8 | 655 | perf_evsel__set_sample_bit(evsel, PERIOD); |
0f82ebc4 ACM |
656 | attr->freq = 1; |
657 | attr->sample_freq = opts->freq; | |
658 | } else { | |
659 | attr->sample_period = opts->default_interval; | |
660 | } | |
661 | } | |
662 | ||
3c176311 JO |
663 | /* |
664 | * Disable sampling for all group members other | |
665 | * than leader in case leader 'leads' the sampling. | |
666 | */ | |
667 | if ((leader != evsel) && leader->sample_read) { | |
668 | attr->sample_freq = 0; | |
669 | attr->sample_period = 0; | |
670 | } | |
671 | ||
0f82ebc4 ACM |
672 | if (opts->no_samples) |
673 | attr->sample_freq = 0; | |
674 | ||
675 | if (opts->inherit_stat) | |
676 | attr->inherit_stat = 1; | |
677 | ||
678 | if (opts->sample_address) { | |
7be5ebe8 | 679 | perf_evsel__set_sample_bit(evsel, ADDR); |
0f82ebc4 ACM |
680 | attr->mmap_data = track; |
681 | } | |
682 | ||
f140373b JO |
683 | /* |
684 | * We don't allow user space callchains for function trace | |
685 | * event, due to issues with page faults while tracing page | |
686 | * fault handler and its overall trickiness nature. | |
687 | */ | |
688 | if (perf_evsel__is_function_event(evsel)) | |
689 | evsel->attr.exclude_callchain_user = 1; | |
690 | ||
72a128aa | 691 | if (callchain_param.enabled && !evsel->no_aux_samples) |
aad2b21c | 692 | perf_evsel__config_callgraph(evsel, opts); |
26d33022 | 693 | |
6a21c0b5 SE |
694 | if (opts->sample_intr_regs) { |
695 | attr->sample_regs_intr = PERF_REGS_MASK; | |
696 | perf_evsel__set_sample_bit(evsel, REGS_INTR); | |
697 | } | |
698 | ||
3aa5939d | 699 | if (target__has_cpu(&opts->target)) |
7be5ebe8 | 700 | perf_evsel__set_sample_bit(evsel, CPU); |
0f82ebc4 | 701 | |
3e76ac78 | 702 | if (opts->period) |
7be5ebe8 | 703 | perf_evsel__set_sample_bit(evsel, PERIOD); |
3e76ac78 | 704 | |
8affc2b8 AK |
705 | /* |
706 | * When the user explicitely disabled time don't force it here. | |
707 | */ | |
708 | if (opts->sample_time && | |
709 | (!perf_missing_features.sample_id_all && | |
710 | (!opts->no_inherit || target__has_cpu(&opts->target) || per_cpu))) | |
7be5ebe8 | 711 | perf_evsel__set_sample_bit(evsel, TIME); |
0f82ebc4 | 712 | |
6ff1ce76 | 713 | if (opts->raw_samples && !evsel->no_aux_samples) { |
7be5ebe8 ACM |
714 | perf_evsel__set_sample_bit(evsel, TIME); |
715 | perf_evsel__set_sample_bit(evsel, RAW); | |
716 | perf_evsel__set_sample_bit(evsel, CPU); | |
0f82ebc4 ACM |
717 | } |
718 | ||
ccf49bfc | 719 | if (opts->sample_address) |
1e7ed5ec | 720 | perf_evsel__set_sample_bit(evsel, DATA_SRC); |
ccf49bfc | 721 | |
509051ea | 722 | if (opts->no_buffering) { |
0f82ebc4 ACM |
723 | attr->watermark = 0; |
724 | attr->wakeup_events = 1; | |
725 | } | |
6ff1ce76 | 726 | if (opts->branch_stack && !evsel->no_aux_samples) { |
7be5ebe8 | 727 | perf_evsel__set_sample_bit(evsel, BRANCH_STACK); |
bdfebd84 RAV |
728 | attr->branch_sample_type = opts->branch_stack; |
729 | } | |
0f82ebc4 | 730 | |
05484298 | 731 | if (opts->sample_weight) |
1e7ed5ec | 732 | perf_evsel__set_sample_bit(evsel, WEIGHT); |
05484298 | 733 | |
62e503b7 | 734 | attr->task = track; |
5c5e854b | 735 | attr->mmap = track; |
a5a5ba72 | 736 | attr->mmap2 = track && !perf_missing_features.mmap2; |
5c5e854b | 737 | attr->comm = track; |
0f82ebc4 | 738 | |
475eeab9 | 739 | if (opts->sample_transaction) |
1e7ed5ec | 740 | perf_evsel__set_sample_bit(evsel, TRANSACTION); |
475eeab9 | 741 | |
85c273d2 AK |
742 | if (opts->running_time) { |
743 | evsel->attr.read_format |= | |
744 | PERF_FORMAT_TOTAL_TIME_ENABLED | | |
745 | PERF_FORMAT_TOTAL_TIME_RUNNING; | |
746 | } | |
747 | ||
774cb499 JO |
748 | /* |
749 | * XXX see the function comment above | |
750 | * | |
751 | * Disabling only independent events or group leaders, | |
752 | * keeping group members enabled. | |
753 | */ | |
823254ed | 754 | if (perf_evsel__is_group_leader(evsel)) |
774cb499 JO |
755 | attr->disabled = 1; |
756 | ||
757 | /* | |
758 | * Setting enable_on_exec for independent events and | |
759 | * group leaders for traced executed by perf. | |
760 | */ | |
6619a53e AK |
761 | if (target__none(&opts->target) && perf_evsel__is_group_leader(evsel) && |
762 | !opts->initial_delay) | |
0f82ebc4 | 763 | attr->enable_on_exec = 1; |
2afd2bcf AH |
764 | |
765 | if (evsel->immediate) { | |
766 | attr->disabled = 0; | |
767 | attr->enable_on_exec = 0; | |
768 | } | |
814c8c38 PZ |
769 | |
770 | clockid = opts->clockid; | |
771 | if (opts->use_clockid) { | |
772 | attr->use_clockid = 1; | |
773 | attr->clockid = opts->clockid; | |
774 | } | |
0f82ebc4 ACM |
775 | } |
776 | ||
8885846f | 777 | static int perf_evsel__alloc_fd(struct perf_evsel *evsel, int ncpus, int nthreads) |
69aad6f1 | 778 | { |
4af4c955 | 779 | int cpu, thread; |
bf8e8f4b AH |
780 | |
781 | if (evsel->system_wide) | |
782 | nthreads = 1; | |
783 | ||
69aad6f1 | 784 | evsel->fd = xyarray__new(ncpus, nthreads, sizeof(int)); |
4af4c955 DA |
785 | |
786 | if (evsel->fd) { | |
787 | for (cpu = 0; cpu < ncpus; cpu++) { | |
788 | for (thread = 0; thread < nthreads; thread++) { | |
789 | FD(evsel, cpu, thread) = -1; | |
790 | } | |
791 | } | |
792 | } | |
793 | ||
69aad6f1 ACM |
794 | return evsel->fd != NULL ? 0 : -ENOMEM; |
795 | } | |
796 | ||
e2407bef AK |
797 | static int perf_evsel__run_ioctl(struct perf_evsel *evsel, int ncpus, int nthreads, |
798 | int ioc, void *arg) | |
745cefc5 ACM |
799 | { |
800 | int cpu, thread; | |
801 | ||
bf8e8f4b AH |
802 | if (evsel->system_wide) |
803 | nthreads = 1; | |
804 | ||
745cefc5 ACM |
805 | for (cpu = 0; cpu < ncpus; cpu++) { |
806 | for (thread = 0; thread < nthreads; thread++) { | |
807 | int fd = FD(evsel, cpu, thread), | |
e2407bef | 808 | err = ioctl(fd, ioc, arg); |
745cefc5 ACM |
809 | |
810 | if (err) | |
811 | return err; | |
812 | } | |
813 | } | |
814 | ||
815 | return 0; | |
816 | } | |
817 | ||
e2407bef AK |
818 | int perf_evsel__set_filter(struct perf_evsel *evsel, int ncpus, int nthreads, |
819 | const char *filter) | |
820 | { | |
821 | return perf_evsel__run_ioctl(evsel, ncpus, nthreads, | |
822 | PERF_EVENT_IOC_SET_FILTER, | |
823 | (void *)filter); | |
824 | } | |
825 | ||
826 | int perf_evsel__enable(struct perf_evsel *evsel, int ncpus, int nthreads) | |
827 | { | |
828 | return perf_evsel__run_ioctl(evsel, ncpus, nthreads, | |
829 | PERF_EVENT_IOC_ENABLE, | |
830 | 0); | |
831 | } | |
832 | ||
70db7533 ACM |
833 | int perf_evsel__alloc_id(struct perf_evsel *evsel, int ncpus, int nthreads) |
834 | { | |
8d9cbd8f VG |
835 | if (ncpus == 0 || nthreads == 0) |
836 | return 0; | |
837 | ||
bf8e8f4b AH |
838 | if (evsel->system_wide) |
839 | nthreads = 1; | |
840 | ||
a91e5431 ACM |
841 | evsel->sample_id = xyarray__new(ncpus, nthreads, sizeof(struct perf_sample_id)); |
842 | if (evsel->sample_id == NULL) | |
843 | return -ENOMEM; | |
844 | ||
845 | evsel->id = zalloc(ncpus * nthreads * sizeof(u64)); | |
846 | if (evsel->id == NULL) { | |
847 | xyarray__delete(evsel->sample_id); | |
848 | evsel->sample_id = NULL; | |
849 | return -ENOMEM; | |
850 | } | |
851 | ||
852 | return 0; | |
70db7533 ACM |
853 | } |
854 | ||
8885846f | 855 | static void perf_evsel__free_fd(struct perf_evsel *evsel) |
69aad6f1 ACM |
856 | { |
857 | xyarray__delete(evsel->fd); | |
858 | evsel->fd = NULL; | |
859 | } | |
860 | ||
8885846f | 861 | static void perf_evsel__free_id(struct perf_evsel *evsel) |
70db7533 | 862 | { |
a91e5431 ACM |
863 | xyarray__delete(evsel->sample_id); |
864 | evsel->sample_id = NULL; | |
04662523 | 865 | zfree(&evsel->id); |
70db7533 ACM |
866 | } |
867 | ||
c52b12ed ACM |
868 | void perf_evsel__close_fd(struct perf_evsel *evsel, int ncpus, int nthreads) |
869 | { | |
870 | int cpu, thread; | |
871 | ||
bf8e8f4b AH |
872 | if (evsel->system_wide) |
873 | nthreads = 1; | |
874 | ||
c52b12ed ACM |
875 | for (cpu = 0; cpu < ncpus; cpu++) |
876 | for (thread = 0; thread < nthreads; ++thread) { | |
877 | close(FD(evsel, cpu, thread)); | |
878 | FD(evsel, cpu, thread) = -1; | |
879 | } | |
880 | } | |
881 | ||
ef1d1af2 | 882 | void perf_evsel__exit(struct perf_evsel *evsel) |
69aad6f1 ACM |
883 | { |
884 | assert(list_empty(&evsel->node)); | |
736b05a0 NK |
885 | perf_evsel__free_fd(evsel); |
886 | perf_evsel__free_id(evsel); | |
597e48c1 | 887 | close_cgroup(evsel->cgrp); |
f30a79b0 | 888 | cpu_map__put(evsel->cpus); |
578e91ec | 889 | thread_map__put(evsel->threads); |
597e48c1 | 890 | zfree(&evsel->group_name); |
597e48c1 | 891 | zfree(&evsel->name); |
ce8ccff5 | 892 | perf_evsel__object.fini(evsel); |
ef1d1af2 ACM |
893 | } |
894 | ||
895 | void perf_evsel__delete(struct perf_evsel *evsel) | |
896 | { | |
897 | perf_evsel__exit(evsel); | |
69aad6f1 ACM |
898 | free(evsel); |
899 | } | |
c52b12ed | 900 | |
a6fa0038 | 901 | void perf_evsel__compute_deltas(struct perf_evsel *evsel, int cpu, int thread, |
857a94a2 | 902 | struct perf_counts_values *count) |
c7a79c47 SE |
903 | { |
904 | struct perf_counts_values tmp; | |
905 | ||
906 | if (!evsel->prev_raw_counts) | |
907 | return; | |
908 | ||
909 | if (cpu == -1) { | |
910 | tmp = evsel->prev_raw_counts->aggr; | |
911 | evsel->prev_raw_counts->aggr = *count; | |
912 | } else { | |
a6fa0038 JO |
913 | tmp = *perf_counts(evsel->prev_raw_counts, cpu, thread); |
914 | *perf_counts(evsel->prev_raw_counts, cpu, thread) = *count; | |
c7a79c47 SE |
915 | } |
916 | ||
917 | count->val = count->val - tmp.val; | |
918 | count->ena = count->ena - tmp.ena; | |
919 | count->run = count->run - tmp.run; | |
920 | } | |
921 | ||
13112bbf JO |
922 | void perf_counts_values__scale(struct perf_counts_values *count, |
923 | bool scale, s8 *pscaled) | |
924 | { | |
925 | s8 scaled = 0; | |
926 | ||
927 | if (scale) { | |
928 | if (count->run == 0) { | |
929 | scaled = -1; | |
930 | count->val = 0; | |
931 | } else if (count->run < count->ena) { | |
932 | scaled = 1; | |
933 | count->val = (u64)((double) count->val * count->ena / count->run + 0.5); | |
934 | } | |
935 | } else | |
936 | count->ena = count->run = 0; | |
937 | ||
938 | if (pscaled) | |
939 | *pscaled = scaled; | |
940 | } | |
941 | ||
f99f4719 JO |
942 | int perf_evsel__read(struct perf_evsel *evsel, int cpu, int thread, |
943 | struct perf_counts_values *count) | |
944 | { | |
945 | memset(count, 0, sizeof(*count)); | |
946 | ||
947 | if (FD(evsel, cpu, thread) < 0) | |
948 | return -EINVAL; | |
949 | ||
950 | if (readn(FD(evsel, cpu, thread), count, sizeof(*count)) < 0) | |
951 | return -errno; | |
952 | ||
953 | return 0; | |
954 | } | |
955 | ||
c52b12ed ACM |
956 | int __perf_evsel__read_on_cpu(struct perf_evsel *evsel, |
957 | int cpu, int thread, bool scale) | |
958 | { | |
959 | struct perf_counts_values count; | |
960 | size_t nv = scale ? 3 : 1; | |
961 | ||
962 | if (FD(evsel, cpu, thread) < 0) | |
963 | return -EINVAL; | |
964 | ||
a6fa0038 | 965 | if (evsel->counts == NULL && perf_evsel__alloc_counts(evsel, cpu + 1, thread + 1) < 0) |
4eed11d5 ACM |
966 | return -ENOMEM; |
967 | ||
c52b12ed ACM |
968 | if (readn(FD(evsel, cpu, thread), &count, nv * sizeof(u64)) < 0) |
969 | return -errno; | |
970 | ||
a6fa0038 | 971 | perf_evsel__compute_deltas(evsel, cpu, thread, &count); |
13112bbf | 972 | perf_counts_values__scale(&count, scale, NULL); |
a6fa0038 | 973 | *perf_counts(evsel->counts, cpu, thread) = count; |
c52b12ed ACM |
974 | return 0; |
975 | } | |
976 | ||
6a4bb04c JO |
977 | static int get_group_fd(struct perf_evsel *evsel, int cpu, int thread) |
978 | { | |
979 | struct perf_evsel *leader = evsel->leader; | |
980 | int fd; | |
981 | ||
823254ed | 982 | if (perf_evsel__is_group_leader(evsel)) |
6a4bb04c JO |
983 | return -1; |
984 | ||
985 | /* | |
986 | * Leader must be already processed/open, | |
987 | * if not it's a bug. | |
988 | */ | |
989 | BUG_ON(!leader->fd); | |
990 | ||
991 | fd = FD(leader, cpu, thread); | |
992 | BUG_ON(fd == -1); | |
993 | ||
994 | return fd; | |
995 | } | |
996 | ||
2c5e8c52 PZ |
997 | struct bit_names { |
998 | int bit; | |
999 | const char *name; | |
1000 | }; | |
1001 | ||
1002 | static void __p_bits(char *buf, size_t size, u64 value, struct bit_names *bits) | |
1003 | { | |
1004 | bool first_bit = true; | |
1005 | int i = 0; | |
1006 | ||
1007 | do { | |
1008 | if (value & bits[i].bit) { | |
1009 | buf += scnprintf(buf, size, "%s%s", first_bit ? "" : "|", bits[i].name); | |
1010 | first_bit = false; | |
1011 | } | |
1012 | } while (bits[++i].name != NULL); | |
1013 | } | |
1014 | ||
1015 | static void __p_sample_type(char *buf, size_t size, u64 value) | |
1016 | { | |
1017 | #define bit_name(n) { PERF_SAMPLE_##n, #n } | |
1018 | struct bit_names bits[] = { | |
1019 | bit_name(IP), bit_name(TID), bit_name(TIME), bit_name(ADDR), | |
1020 | bit_name(READ), bit_name(CALLCHAIN), bit_name(ID), bit_name(CPU), | |
1021 | bit_name(PERIOD), bit_name(STREAM_ID), bit_name(RAW), | |
1022 | bit_name(BRANCH_STACK), bit_name(REGS_USER), bit_name(STACK_USER), | |
1023 | bit_name(IDENTIFIER), bit_name(REGS_INTR), | |
1024 | { .name = NULL, } | |
1025 | }; | |
1026 | #undef bit_name | |
1027 | __p_bits(buf, size, value, bits); | |
1028 | } | |
1029 | ||
1030 | static void __p_read_format(char *buf, size_t size, u64 value) | |
1031 | { | |
1032 | #define bit_name(n) { PERF_FORMAT_##n, #n } | |
1033 | struct bit_names bits[] = { | |
1034 | bit_name(TOTAL_TIME_ENABLED), bit_name(TOTAL_TIME_RUNNING), | |
1035 | bit_name(ID), bit_name(GROUP), | |
1036 | { .name = NULL, } | |
1037 | }; | |
1038 | #undef bit_name | |
1039 | __p_bits(buf, size, value, bits); | |
1040 | } | |
1041 | ||
1042 | #define BUF_SIZE 1024 | |
1043 | ||
7310aed7 | 1044 | #define p_hex(val) snprintf(buf, BUF_SIZE, "%#"PRIx64, (uint64_t)(val)) |
2c5e8c52 PZ |
1045 | #define p_unsigned(val) snprintf(buf, BUF_SIZE, "%"PRIu64, (uint64_t)(val)) |
1046 | #define p_signed(val) snprintf(buf, BUF_SIZE, "%"PRId64, (int64_t)(val)) | |
1047 | #define p_sample_type(val) __p_sample_type(buf, BUF_SIZE, val) | |
1048 | #define p_read_format(val) __p_read_format(buf, BUF_SIZE, val) | |
1049 | ||
1050 | #define PRINT_ATTRn(_n, _f, _p) \ | |
1051 | do { \ | |
1052 | if (attr->_f) { \ | |
1053 | _p(attr->_f); \ | |
1054 | ret += attr__fprintf(fp, _n, buf, priv);\ | |
1055 | } \ | |
1056 | } while (0) | |
1057 | ||
1058 | #define PRINT_ATTRf(_f, _p) PRINT_ATTRn(#_f, _f, _p) | |
1059 | ||
1060 | int perf_event_attr__fprintf(FILE *fp, struct perf_event_attr *attr, | |
1061 | attr__fprintf_f attr__fprintf, void *priv) | |
1062 | { | |
1063 | char buf[BUF_SIZE]; | |
1064 | int ret = 0; | |
1065 | ||
1066 | PRINT_ATTRf(type, p_unsigned); | |
1067 | PRINT_ATTRf(size, p_unsigned); | |
1068 | PRINT_ATTRf(config, p_hex); | |
1069 | PRINT_ATTRn("{ sample_period, sample_freq }", sample_period, p_unsigned); | |
1070 | PRINT_ATTRf(sample_type, p_sample_type); | |
1071 | PRINT_ATTRf(read_format, p_read_format); | |
1072 | ||
1073 | PRINT_ATTRf(disabled, p_unsigned); | |
1074 | PRINT_ATTRf(inherit, p_unsigned); | |
1075 | PRINT_ATTRf(pinned, p_unsigned); | |
1076 | PRINT_ATTRf(exclusive, p_unsigned); | |
1077 | PRINT_ATTRf(exclude_user, p_unsigned); | |
1078 | PRINT_ATTRf(exclude_kernel, p_unsigned); | |
1079 | PRINT_ATTRf(exclude_hv, p_unsigned); | |
1080 | PRINT_ATTRf(exclude_idle, p_unsigned); | |
1081 | PRINT_ATTRf(mmap, p_unsigned); | |
1082 | PRINT_ATTRf(comm, p_unsigned); | |
1083 | PRINT_ATTRf(freq, p_unsigned); | |
1084 | PRINT_ATTRf(inherit_stat, p_unsigned); | |
1085 | PRINT_ATTRf(enable_on_exec, p_unsigned); | |
1086 | PRINT_ATTRf(task, p_unsigned); | |
1087 | PRINT_ATTRf(watermark, p_unsigned); | |
1088 | PRINT_ATTRf(precise_ip, p_unsigned); | |
1089 | PRINT_ATTRf(mmap_data, p_unsigned); | |
1090 | PRINT_ATTRf(sample_id_all, p_unsigned); | |
1091 | PRINT_ATTRf(exclude_host, p_unsigned); | |
1092 | PRINT_ATTRf(exclude_guest, p_unsigned); | |
1093 | PRINT_ATTRf(exclude_callchain_kernel, p_unsigned); | |
1094 | PRINT_ATTRf(exclude_callchain_user, p_unsigned); | |
1095 | PRINT_ATTRf(mmap2, p_unsigned); | |
1096 | PRINT_ATTRf(comm_exec, p_unsigned); | |
1097 | PRINT_ATTRf(use_clockid, p_unsigned); | |
1098 | ||
1099 | PRINT_ATTRn("{ wakeup_events, wakeup_watermark }", wakeup_events, p_unsigned); | |
1100 | PRINT_ATTRf(bp_type, p_unsigned); | |
1101 | PRINT_ATTRn("{ bp_addr, config1 }", bp_addr, p_hex); | |
1102 | PRINT_ATTRn("{ bp_len, config2 }", bp_len, p_hex); | |
1103 | PRINT_ATTRf(sample_regs_user, p_hex); | |
1104 | PRINT_ATTRf(sample_stack_user, p_unsigned); | |
1105 | PRINT_ATTRf(clockid, p_signed); | |
1106 | PRINT_ATTRf(sample_regs_intr, p_hex); | |
70d73de4 | 1107 | PRINT_ATTRf(aux_watermark, p_unsigned); |
e3e1a54f AH |
1108 | |
1109 | return ret; | |
1110 | } | |
1111 | ||
2c5e8c52 PZ |
1112 | static int __open_attr__fprintf(FILE *fp, const char *name, const char *val, |
1113 | void *priv __attribute__((unused))) | |
1114 | { | |
1115 | return fprintf(fp, " %-32s %s\n", name, val); | |
1116 | } | |
1117 | ||
0252208e | 1118 | static int __perf_evsel__open(struct perf_evsel *evsel, struct cpu_map *cpus, |
6a4bb04c | 1119 | struct thread_map *threads) |
48290609 | 1120 | { |
bf8e8f4b | 1121 | int cpu, thread, nthreads; |
57480d2c | 1122 | unsigned long flags = PERF_FLAG_FD_CLOEXEC; |
727ab04e | 1123 | int pid = -1, err; |
bec19672 | 1124 | enum { NO_CHANGE, SET_TO_MAX, INCREASED_MAX } set_rlimit = NO_CHANGE; |
48290609 | 1125 | |
bf8e8f4b AH |
1126 | if (evsel->system_wide) |
1127 | nthreads = 1; | |
1128 | else | |
1129 | nthreads = threads->nr; | |
1130 | ||
0252208e | 1131 | if (evsel->fd == NULL && |
bf8e8f4b | 1132 | perf_evsel__alloc_fd(evsel, cpus->nr, nthreads) < 0) |
727ab04e | 1133 | return -ENOMEM; |
4eed11d5 | 1134 | |
023695d9 | 1135 | if (evsel->cgrp) { |
57480d2c | 1136 | flags |= PERF_FLAG_PID_CGROUP; |
023695d9 SE |
1137 | pid = evsel->cgrp->fd; |
1138 | } | |
1139 | ||
594ac61a | 1140 | fallback_missing_features: |
814c8c38 PZ |
1141 | if (perf_missing_features.clockid_wrong) |
1142 | evsel->attr.clockid = CLOCK_MONOTONIC; /* should always work */ | |
1143 | if (perf_missing_features.clockid) { | |
1144 | evsel->attr.use_clockid = 0; | |
1145 | evsel->attr.clockid = 0; | |
1146 | } | |
57480d2c YD |
1147 | if (perf_missing_features.cloexec) |
1148 | flags &= ~(unsigned long)PERF_FLAG_FD_CLOEXEC; | |
5c5e854b SE |
1149 | if (perf_missing_features.mmap2) |
1150 | evsel->attr.mmap2 = 0; | |
594ac61a ACM |
1151 | if (perf_missing_features.exclude_guest) |
1152 | evsel->attr.exclude_guest = evsel->attr.exclude_host = 0; | |
1153 | retry_sample_id: | |
1154 | if (perf_missing_features.sample_id_all) | |
1155 | evsel->attr.sample_id_all = 0; | |
1156 | ||
2c5e8c52 PZ |
1157 | if (verbose >= 2) { |
1158 | fprintf(stderr, "%.60s\n", graph_dotted_line); | |
1159 | fprintf(stderr, "perf_event_attr:\n"); | |
1160 | perf_event_attr__fprintf(stderr, &evsel->attr, __open_attr__fprintf, NULL); | |
1161 | fprintf(stderr, "%.60s\n", graph_dotted_line); | |
1162 | } | |
e3e1a54f | 1163 | |
86bd5e86 | 1164 | for (cpu = 0; cpu < cpus->nr; cpu++) { |
9d04f178 | 1165 | |
bf8e8f4b | 1166 | for (thread = 0; thread < nthreads; thread++) { |
6a4bb04c | 1167 | int group_fd; |
023695d9 | 1168 | |
bf8e8f4b | 1169 | if (!evsel->cgrp && !evsel->system_wide) |
e13798c7 | 1170 | pid = thread_map__pid(threads, thread); |
023695d9 | 1171 | |
6a4bb04c | 1172 | group_fd = get_group_fd(evsel, cpu, thread); |
bec19672 | 1173 | retry_open: |
a33f6efc | 1174 | pr_debug2("sys_perf_event_open: pid %d cpu %d group_fd %d flags %#lx\n", |
e3e1a54f AH |
1175 | pid, cpus->map[cpu], group_fd, flags); |
1176 | ||
0252208e | 1177 | FD(evsel, cpu, thread) = sys_perf_event_open(&evsel->attr, |
023695d9 | 1178 | pid, |
f08199d3 | 1179 | cpus->map[cpu], |
023695d9 | 1180 | group_fd, flags); |
727ab04e ACM |
1181 | if (FD(evsel, cpu, thread) < 0) { |
1182 | err = -errno; | |
a33f6efc | 1183 | pr_debug2("sys_perf_event_open failed, error %d\n", |
f852fd62 | 1184 | err); |
594ac61a | 1185 | goto try_fallback; |
727ab04e | 1186 | } |
bec19672 | 1187 | set_rlimit = NO_CHANGE; |
814c8c38 PZ |
1188 | |
1189 | /* | |
1190 | * If we succeeded but had to kill clockid, fail and | |
1191 | * have perf_evsel__open_strerror() print us a nice | |
1192 | * error. | |
1193 | */ | |
1194 | if (perf_missing_features.clockid || | |
1195 | perf_missing_features.clockid_wrong) { | |
1196 | err = -EINVAL; | |
1197 | goto out_close; | |
1198 | } | |
0252208e | 1199 | } |
48290609 ACM |
1200 | } |
1201 | ||
1202 | return 0; | |
1203 | ||
594ac61a | 1204 | try_fallback: |
bec19672 AK |
1205 | /* |
1206 | * perf stat needs between 5 and 22 fds per CPU. When we run out | |
1207 | * of them try to increase the limits. | |
1208 | */ | |
1209 | if (err == -EMFILE && set_rlimit < INCREASED_MAX) { | |
1210 | struct rlimit l; | |
1211 | int old_errno = errno; | |
1212 | ||
1213 | if (getrlimit(RLIMIT_NOFILE, &l) == 0) { | |
1214 | if (set_rlimit == NO_CHANGE) | |
1215 | l.rlim_cur = l.rlim_max; | |
1216 | else { | |
1217 | l.rlim_cur = l.rlim_max + 1000; | |
1218 | l.rlim_max = l.rlim_cur; | |
1219 | } | |
1220 | if (setrlimit(RLIMIT_NOFILE, &l) == 0) { | |
1221 | set_rlimit++; | |
1222 | errno = old_errno; | |
1223 | goto retry_open; | |
1224 | } | |
1225 | } | |
1226 | errno = old_errno; | |
1227 | } | |
1228 | ||
594ac61a ACM |
1229 | if (err != -EINVAL || cpu > 0 || thread > 0) |
1230 | goto out_close; | |
1231 | ||
814c8c38 PZ |
1232 | /* |
1233 | * Must probe features in the order they were added to the | |
1234 | * perf_event_attr interface. | |
1235 | */ | |
1236 | if (!perf_missing_features.clockid_wrong && evsel->attr.use_clockid) { | |
1237 | perf_missing_features.clockid_wrong = true; | |
1238 | goto fallback_missing_features; | |
1239 | } else if (!perf_missing_features.clockid && evsel->attr.use_clockid) { | |
1240 | perf_missing_features.clockid = true; | |
1241 | goto fallback_missing_features; | |
1242 | } else if (!perf_missing_features.cloexec && (flags & PERF_FLAG_FD_CLOEXEC)) { | |
57480d2c YD |
1243 | perf_missing_features.cloexec = true; |
1244 | goto fallback_missing_features; | |
1245 | } else if (!perf_missing_features.mmap2 && evsel->attr.mmap2) { | |
5c5e854b SE |
1246 | perf_missing_features.mmap2 = true; |
1247 | goto fallback_missing_features; | |
1248 | } else if (!perf_missing_features.exclude_guest && | |
1249 | (evsel->attr.exclude_guest || evsel->attr.exclude_host)) { | |
594ac61a ACM |
1250 | perf_missing_features.exclude_guest = true; |
1251 | goto fallback_missing_features; | |
1252 | } else if (!perf_missing_features.sample_id_all) { | |
1253 | perf_missing_features.sample_id_all = true; | |
1254 | goto retry_sample_id; | |
1255 | } | |
1256 | ||
48290609 | 1257 | out_close: |
0252208e ACM |
1258 | do { |
1259 | while (--thread >= 0) { | |
1260 | close(FD(evsel, cpu, thread)); | |
1261 | FD(evsel, cpu, thread) = -1; | |
1262 | } | |
bf8e8f4b | 1263 | thread = nthreads; |
0252208e | 1264 | } while (--cpu >= 0); |
727ab04e ACM |
1265 | return err; |
1266 | } | |
1267 | ||
1268 | void perf_evsel__close(struct perf_evsel *evsel, int ncpus, int nthreads) | |
1269 | { | |
1270 | if (evsel->fd == NULL) | |
1271 | return; | |
1272 | ||
1273 | perf_evsel__close_fd(evsel, ncpus, nthreads); | |
1274 | perf_evsel__free_fd(evsel); | |
48290609 ACM |
1275 | } |
1276 | ||
0252208e ACM |
1277 | static struct { |
1278 | struct cpu_map map; | |
1279 | int cpus[1]; | |
1280 | } empty_cpu_map = { | |
1281 | .map.nr = 1, | |
1282 | .cpus = { -1, }, | |
1283 | }; | |
1284 | ||
1285 | static struct { | |
1286 | struct thread_map map; | |
1287 | int threads[1]; | |
1288 | } empty_thread_map = { | |
1289 | .map.nr = 1, | |
1290 | .threads = { -1, }, | |
1291 | }; | |
1292 | ||
f08199d3 | 1293 | int perf_evsel__open(struct perf_evsel *evsel, struct cpu_map *cpus, |
6a4bb04c | 1294 | struct thread_map *threads) |
48290609 | 1295 | { |
0252208e ACM |
1296 | if (cpus == NULL) { |
1297 | /* Work around old compiler warnings about strict aliasing */ | |
1298 | cpus = &empty_cpu_map.map; | |
48290609 ACM |
1299 | } |
1300 | ||
0252208e ACM |
1301 | if (threads == NULL) |
1302 | threads = &empty_thread_map.map; | |
48290609 | 1303 | |
6a4bb04c | 1304 | return __perf_evsel__open(evsel, cpus, threads); |
48290609 ACM |
1305 | } |
1306 | ||
f08199d3 | 1307 | int perf_evsel__open_per_cpu(struct perf_evsel *evsel, |
6a4bb04c | 1308 | struct cpu_map *cpus) |
48290609 | 1309 | { |
6a4bb04c | 1310 | return __perf_evsel__open(evsel, cpus, &empty_thread_map.map); |
0252208e | 1311 | } |
48290609 | 1312 | |
f08199d3 | 1313 | int perf_evsel__open_per_thread(struct perf_evsel *evsel, |
6a4bb04c | 1314 | struct thread_map *threads) |
0252208e | 1315 | { |
6a4bb04c | 1316 | return __perf_evsel__open(evsel, &empty_cpu_map.map, threads); |
48290609 | 1317 | } |
70082dd9 | 1318 | |
0807d2d8 ACM |
1319 | static int perf_evsel__parse_id_sample(const struct perf_evsel *evsel, |
1320 | const union perf_event *event, | |
1321 | struct perf_sample *sample) | |
d0dd74e8 | 1322 | { |
0807d2d8 | 1323 | u64 type = evsel->attr.sample_type; |
d0dd74e8 | 1324 | const u64 *array = event->sample.array; |
0807d2d8 | 1325 | bool swapped = evsel->needs_swap; |
37073f9e | 1326 | union u64_swap u; |
d0dd74e8 ACM |
1327 | |
1328 | array += ((event->header.size - | |
1329 | sizeof(event->header)) / sizeof(u64)) - 1; | |
1330 | ||
75562573 AH |
1331 | if (type & PERF_SAMPLE_IDENTIFIER) { |
1332 | sample->id = *array; | |
1333 | array--; | |
1334 | } | |
1335 | ||
d0dd74e8 | 1336 | if (type & PERF_SAMPLE_CPU) { |
37073f9e JO |
1337 | u.val64 = *array; |
1338 | if (swapped) { | |
1339 | /* undo swap of u64, then swap on individual u32s */ | |
1340 | u.val64 = bswap_64(u.val64); | |
1341 | u.val32[0] = bswap_32(u.val32[0]); | |
1342 | } | |
1343 | ||
1344 | sample->cpu = u.val32[0]; | |
d0dd74e8 ACM |
1345 | array--; |
1346 | } | |
1347 | ||
1348 | if (type & PERF_SAMPLE_STREAM_ID) { | |
1349 | sample->stream_id = *array; | |
1350 | array--; | |
1351 | } | |
1352 | ||
1353 | if (type & PERF_SAMPLE_ID) { | |
1354 | sample->id = *array; | |
1355 | array--; | |
1356 | } | |
1357 | ||
1358 | if (type & PERF_SAMPLE_TIME) { | |
1359 | sample->time = *array; | |
1360 | array--; | |
1361 | } | |
1362 | ||
1363 | if (type & PERF_SAMPLE_TID) { | |
37073f9e JO |
1364 | u.val64 = *array; |
1365 | if (swapped) { | |
1366 | /* undo swap of u64, then swap on individual u32s */ | |
1367 | u.val64 = bswap_64(u.val64); | |
1368 | u.val32[0] = bswap_32(u.val32[0]); | |
1369 | u.val32[1] = bswap_32(u.val32[1]); | |
1370 | } | |
1371 | ||
1372 | sample->pid = u.val32[0]; | |
1373 | sample->tid = u.val32[1]; | |
dd44bc6b | 1374 | array--; |
d0dd74e8 ACM |
1375 | } |
1376 | ||
1377 | return 0; | |
1378 | } | |
1379 | ||
03b6ea9b AH |
1380 | static inline bool overflow(const void *endp, u16 max_size, const void *offset, |
1381 | u64 size) | |
98e1da90 | 1382 | { |
03b6ea9b AH |
1383 | return size > max_size || offset + size > endp; |
1384 | } | |
98e1da90 | 1385 | |
03b6ea9b AH |
1386 | #define OVERFLOW_CHECK(offset, size, max_size) \ |
1387 | do { \ | |
1388 | if (overflow(endp, (max_size), (offset), (size))) \ | |
1389 | return -EFAULT; \ | |
1390 | } while (0) | |
98e1da90 | 1391 | |
03b6ea9b AH |
1392 | #define OVERFLOW_CHECK_u64(offset) \ |
1393 | OVERFLOW_CHECK(offset, sizeof(u64), sizeof(u64)) | |
98e1da90 | 1394 | |
a3f698fe | 1395 | int perf_evsel__parse_sample(struct perf_evsel *evsel, union perf_event *event, |
0807d2d8 | 1396 | struct perf_sample *data) |
d0dd74e8 | 1397 | { |
a3f698fe | 1398 | u64 type = evsel->attr.sample_type; |
0807d2d8 | 1399 | bool swapped = evsel->needs_swap; |
d0dd74e8 | 1400 | const u64 *array; |
03b6ea9b AH |
1401 | u16 max_size = event->header.size; |
1402 | const void *endp = (void *)event + max_size; | |
1403 | u64 sz; | |
d0dd74e8 | 1404 | |
936be503 DA |
1405 | /* |
1406 | * used for cross-endian analysis. See git commit 65014ab3 | |
1407 | * for why this goofiness is needed. | |
1408 | */ | |
6a11f92e | 1409 | union u64_swap u; |
936be503 | 1410 | |
f3bda2c9 | 1411 | memset(data, 0, sizeof(*data)); |
d0dd74e8 ACM |
1412 | data->cpu = data->pid = data->tid = -1; |
1413 | data->stream_id = data->id = data->time = -1ULL; | |
bc529086 | 1414 | data->period = evsel->attr.sample_period; |
05484298 | 1415 | data->weight = 0; |
d0dd74e8 ACM |
1416 | |
1417 | if (event->header.type != PERF_RECORD_SAMPLE) { | |
a3f698fe | 1418 | if (!evsel->attr.sample_id_all) |
d0dd74e8 | 1419 | return 0; |
0807d2d8 | 1420 | return perf_evsel__parse_id_sample(evsel, event, data); |
d0dd74e8 ACM |
1421 | } |
1422 | ||
1423 | array = event->sample.array; | |
1424 | ||
03b6ea9b AH |
1425 | /* |
1426 | * The evsel's sample_size is based on PERF_SAMPLE_MASK which includes | |
1427 | * up to PERF_SAMPLE_PERIOD. After that overflow() must be used to | |
1428 | * check the format does not go past the end of the event. | |
1429 | */ | |
a3f698fe | 1430 | if (evsel->sample_size + sizeof(event->header) > event->header.size) |
a2854124 FW |
1431 | return -EFAULT; |
1432 | ||
75562573 AH |
1433 | data->id = -1ULL; |
1434 | if (type & PERF_SAMPLE_IDENTIFIER) { | |
1435 | data->id = *array; | |
1436 | array++; | |
1437 | } | |
1438 | ||
d0dd74e8 | 1439 | if (type & PERF_SAMPLE_IP) { |
ef89325f | 1440 | data->ip = *array; |
d0dd74e8 ACM |
1441 | array++; |
1442 | } | |
1443 | ||
1444 | if (type & PERF_SAMPLE_TID) { | |
936be503 DA |
1445 | u.val64 = *array; |
1446 | if (swapped) { | |
1447 | /* undo swap of u64, then swap on individual u32s */ | |
1448 | u.val64 = bswap_64(u.val64); | |
1449 | u.val32[0] = bswap_32(u.val32[0]); | |
1450 | u.val32[1] = bswap_32(u.val32[1]); | |
1451 | } | |
1452 | ||
1453 | data->pid = u.val32[0]; | |
1454 | data->tid = u.val32[1]; | |
d0dd74e8 ACM |
1455 | array++; |
1456 | } | |
1457 | ||
1458 | if (type & PERF_SAMPLE_TIME) { | |
1459 | data->time = *array; | |
1460 | array++; | |
1461 | } | |
1462 | ||
7cec0922 | 1463 | data->addr = 0; |
d0dd74e8 ACM |
1464 | if (type & PERF_SAMPLE_ADDR) { |
1465 | data->addr = *array; | |
1466 | array++; | |
1467 | } | |
1468 | ||
d0dd74e8 ACM |
1469 | if (type & PERF_SAMPLE_ID) { |
1470 | data->id = *array; | |
1471 | array++; | |
1472 | } | |
1473 | ||
1474 | if (type & PERF_SAMPLE_STREAM_ID) { | |
1475 | data->stream_id = *array; | |
1476 | array++; | |
1477 | } | |
1478 | ||
1479 | if (type & PERF_SAMPLE_CPU) { | |
936be503 DA |
1480 | |
1481 | u.val64 = *array; | |
1482 | if (swapped) { | |
1483 | /* undo swap of u64, then swap on individual u32s */ | |
1484 | u.val64 = bswap_64(u.val64); | |
1485 | u.val32[0] = bswap_32(u.val32[0]); | |
1486 | } | |
1487 | ||
1488 | data->cpu = u.val32[0]; | |
d0dd74e8 ACM |
1489 | array++; |
1490 | } | |
1491 | ||
1492 | if (type & PERF_SAMPLE_PERIOD) { | |
1493 | data->period = *array; | |
1494 | array++; | |
1495 | } | |
1496 | ||
1497 | if (type & PERF_SAMPLE_READ) { | |
9ede473c JO |
1498 | u64 read_format = evsel->attr.read_format; |
1499 | ||
03b6ea9b | 1500 | OVERFLOW_CHECK_u64(array); |
9ede473c JO |
1501 | if (read_format & PERF_FORMAT_GROUP) |
1502 | data->read.group.nr = *array; | |
1503 | else | |
1504 | data->read.one.value = *array; | |
1505 | ||
1506 | array++; | |
1507 | ||
1508 | if (read_format & PERF_FORMAT_TOTAL_TIME_ENABLED) { | |
03b6ea9b | 1509 | OVERFLOW_CHECK_u64(array); |
9ede473c JO |
1510 | data->read.time_enabled = *array; |
1511 | array++; | |
1512 | } | |
1513 | ||
1514 | if (read_format & PERF_FORMAT_TOTAL_TIME_RUNNING) { | |
03b6ea9b | 1515 | OVERFLOW_CHECK_u64(array); |
9ede473c JO |
1516 | data->read.time_running = *array; |
1517 | array++; | |
1518 | } | |
1519 | ||
1520 | /* PERF_FORMAT_ID is forced for PERF_SAMPLE_READ */ | |
1521 | if (read_format & PERF_FORMAT_GROUP) { | |
03b6ea9b AH |
1522 | const u64 max_group_nr = UINT64_MAX / |
1523 | sizeof(struct sample_read_value); | |
1524 | ||
1525 | if (data->read.group.nr > max_group_nr) | |
1526 | return -EFAULT; | |
1527 | sz = data->read.group.nr * | |
1528 | sizeof(struct sample_read_value); | |
1529 | OVERFLOW_CHECK(array, sz, max_size); | |
1530 | data->read.group.values = | |
1531 | (struct sample_read_value *)array; | |
1532 | array = (void *)array + sz; | |
9ede473c | 1533 | } else { |
03b6ea9b | 1534 | OVERFLOW_CHECK_u64(array); |
9ede473c JO |
1535 | data->read.one.id = *array; |
1536 | array++; | |
1537 | } | |
d0dd74e8 ACM |
1538 | } |
1539 | ||
1540 | if (type & PERF_SAMPLE_CALLCHAIN) { | |
03b6ea9b | 1541 | const u64 max_callchain_nr = UINT64_MAX / sizeof(u64); |
98e1da90 | 1542 | |
03b6ea9b AH |
1543 | OVERFLOW_CHECK_u64(array); |
1544 | data->callchain = (struct ip_callchain *)array++; | |
1545 | if (data->callchain->nr > max_callchain_nr) | |
98e1da90 | 1546 | return -EFAULT; |
03b6ea9b AH |
1547 | sz = data->callchain->nr * sizeof(u64); |
1548 | OVERFLOW_CHECK(array, sz, max_size); | |
1549 | array = (void *)array + sz; | |
d0dd74e8 ACM |
1550 | } |
1551 | ||
1552 | if (type & PERF_SAMPLE_RAW) { | |
03b6ea9b | 1553 | OVERFLOW_CHECK_u64(array); |
936be503 DA |
1554 | u.val64 = *array; |
1555 | if (WARN_ONCE(swapped, | |
1556 | "Endianness of raw data not corrected!\n")) { | |
1557 | /* undo swap of u64, then swap on individual u32s */ | |
1558 | u.val64 = bswap_64(u.val64); | |
1559 | u.val32[0] = bswap_32(u.val32[0]); | |
1560 | u.val32[1] = bswap_32(u.val32[1]); | |
1561 | } | |
936be503 | 1562 | data->raw_size = u.val32[0]; |
03b6ea9b | 1563 | array = (void *)array + sizeof(u32); |
98e1da90 | 1564 | |
03b6ea9b AH |
1565 | OVERFLOW_CHECK(array, data->raw_size, max_size); |
1566 | data->raw_data = (void *)array; | |
1567 | array = (void *)array + data->raw_size; | |
d0dd74e8 ACM |
1568 | } |
1569 | ||
b5387528 | 1570 | if (type & PERF_SAMPLE_BRANCH_STACK) { |
03b6ea9b AH |
1571 | const u64 max_branch_nr = UINT64_MAX / |
1572 | sizeof(struct branch_entry); | |
b5387528 | 1573 | |
03b6ea9b AH |
1574 | OVERFLOW_CHECK_u64(array); |
1575 | data->branch_stack = (struct branch_stack *)array++; | |
b5387528 | 1576 | |
03b6ea9b AH |
1577 | if (data->branch_stack->nr > max_branch_nr) |
1578 | return -EFAULT; | |
b5387528 | 1579 | sz = data->branch_stack->nr * sizeof(struct branch_entry); |
03b6ea9b AH |
1580 | OVERFLOW_CHECK(array, sz, max_size); |
1581 | array = (void *)array + sz; | |
b5387528 | 1582 | } |
0f6a3015 JO |
1583 | |
1584 | if (type & PERF_SAMPLE_REGS_USER) { | |
03b6ea9b | 1585 | OVERFLOW_CHECK_u64(array); |
5b95a4a3 AH |
1586 | data->user_regs.abi = *array; |
1587 | array++; | |
0f6a3015 | 1588 | |
5b95a4a3 | 1589 | if (data->user_regs.abi) { |
352ea45a | 1590 | u64 mask = evsel->attr.sample_regs_user; |
03b6ea9b | 1591 | |
352ea45a | 1592 | sz = hweight_long(mask) * sizeof(u64); |
03b6ea9b | 1593 | OVERFLOW_CHECK(array, sz, max_size); |
352ea45a | 1594 | data->user_regs.mask = mask; |
0f6a3015 | 1595 | data->user_regs.regs = (u64 *)array; |
03b6ea9b | 1596 | array = (void *)array + sz; |
0f6a3015 JO |
1597 | } |
1598 | } | |
1599 | ||
1600 | if (type & PERF_SAMPLE_STACK_USER) { | |
03b6ea9b AH |
1601 | OVERFLOW_CHECK_u64(array); |
1602 | sz = *array++; | |
0f6a3015 JO |
1603 | |
1604 | data->user_stack.offset = ((char *)(array - 1) | |
1605 | - (char *) event); | |
1606 | ||
03b6ea9b | 1607 | if (!sz) { |
0f6a3015 JO |
1608 | data->user_stack.size = 0; |
1609 | } else { | |
03b6ea9b | 1610 | OVERFLOW_CHECK(array, sz, max_size); |
0f6a3015 | 1611 | data->user_stack.data = (char *)array; |
03b6ea9b AH |
1612 | array = (void *)array + sz; |
1613 | OVERFLOW_CHECK_u64(array); | |
54bd2692 | 1614 | data->user_stack.size = *array++; |
a65cb4b9 JO |
1615 | if (WARN_ONCE(data->user_stack.size > sz, |
1616 | "user stack dump failure\n")) | |
1617 | return -EFAULT; | |
0f6a3015 JO |
1618 | } |
1619 | } | |
1620 | ||
05484298 AK |
1621 | data->weight = 0; |
1622 | if (type & PERF_SAMPLE_WEIGHT) { | |
03b6ea9b | 1623 | OVERFLOW_CHECK_u64(array); |
05484298 AK |
1624 | data->weight = *array; |
1625 | array++; | |
1626 | } | |
1627 | ||
98a3b32c SE |
1628 | data->data_src = PERF_MEM_DATA_SRC_NONE; |
1629 | if (type & PERF_SAMPLE_DATA_SRC) { | |
03b6ea9b | 1630 | OVERFLOW_CHECK_u64(array); |
98a3b32c SE |
1631 | data->data_src = *array; |
1632 | array++; | |
1633 | } | |
1634 | ||
475eeab9 AK |
1635 | data->transaction = 0; |
1636 | if (type & PERF_SAMPLE_TRANSACTION) { | |
87b95524 | 1637 | OVERFLOW_CHECK_u64(array); |
475eeab9 AK |
1638 | data->transaction = *array; |
1639 | array++; | |
1640 | } | |
1641 | ||
6a21c0b5 SE |
1642 | data->intr_regs.abi = PERF_SAMPLE_REGS_ABI_NONE; |
1643 | if (type & PERF_SAMPLE_REGS_INTR) { | |
1644 | OVERFLOW_CHECK_u64(array); | |
1645 | data->intr_regs.abi = *array; | |
1646 | array++; | |
1647 | ||
1648 | if (data->intr_regs.abi != PERF_SAMPLE_REGS_ABI_NONE) { | |
1649 | u64 mask = evsel->attr.sample_regs_intr; | |
1650 | ||
1651 | sz = hweight_long(mask) * sizeof(u64); | |
1652 | OVERFLOW_CHECK(array, sz, max_size); | |
1653 | data->intr_regs.mask = mask; | |
1654 | data->intr_regs.regs = (u64 *)array; | |
1655 | array = (void *)array + sz; | |
1656 | } | |
1657 | } | |
1658 | ||
d0dd74e8 ACM |
1659 | return 0; |
1660 | } | |
74eec26f | 1661 | |
b1cf6f65 | 1662 | size_t perf_event__sample_event_size(const struct perf_sample *sample, u64 type, |
352ea45a | 1663 | u64 read_format) |
b1cf6f65 AH |
1664 | { |
1665 | size_t sz, result = sizeof(struct sample_event); | |
1666 | ||
1667 | if (type & PERF_SAMPLE_IDENTIFIER) | |
1668 | result += sizeof(u64); | |
1669 | ||
1670 | if (type & PERF_SAMPLE_IP) | |
1671 | result += sizeof(u64); | |
1672 | ||
1673 | if (type & PERF_SAMPLE_TID) | |
1674 | result += sizeof(u64); | |
1675 | ||
1676 | if (type & PERF_SAMPLE_TIME) | |
1677 | result += sizeof(u64); | |
1678 | ||
1679 | if (type & PERF_SAMPLE_ADDR) | |
1680 | result += sizeof(u64); | |
1681 | ||
1682 | if (type & PERF_SAMPLE_ID) | |
1683 | result += sizeof(u64); | |
1684 | ||
1685 | if (type & PERF_SAMPLE_STREAM_ID) | |
1686 | result += sizeof(u64); | |
1687 | ||
1688 | if (type & PERF_SAMPLE_CPU) | |
1689 | result += sizeof(u64); | |
1690 | ||
1691 | if (type & PERF_SAMPLE_PERIOD) | |
1692 | result += sizeof(u64); | |
1693 | ||
1694 | if (type & PERF_SAMPLE_READ) { | |
1695 | result += sizeof(u64); | |
1696 | if (read_format & PERF_FORMAT_TOTAL_TIME_ENABLED) | |
1697 | result += sizeof(u64); | |
1698 | if (read_format & PERF_FORMAT_TOTAL_TIME_RUNNING) | |
1699 | result += sizeof(u64); | |
1700 | /* PERF_FORMAT_ID is forced for PERF_SAMPLE_READ */ | |
1701 | if (read_format & PERF_FORMAT_GROUP) { | |
1702 | sz = sample->read.group.nr * | |
1703 | sizeof(struct sample_read_value); | |
1704 | result += sz; | |
1705 | } else { | |
1706 | result += sizeof(u64); | |
1707 | } | |
1708 | } | |
1709 | ||
1710 | if (type & PERF_SAMPLE_CALLCHAIN) { | |
1711 | sz = (sample->callchain->nr + 1) * sizeof(u64); | |
1712 | result += sz; | |
1713 | } | |
1714 | ||
1715 | if (type & PERF_SAMPLE_RAW) { | |
1716 | result += sizeof(u32); | |
1717 | result += sample->raw_size; | |
1718 | } | |
1719 | ||
1720 | if (type & PERF_SAMPLE_BRANCH_STACK) { | |
1721 | sz = sample->branch_stack->nr * sizeof(struct branch_entry); | |
1722 | sz += sizeof(u64); | |
1723 | result += sz; | |
1724 | } | |
1725 | ||
1726 | if (type & PERF_SAMPLE_REGS_USER) { | |
1727 | if (sample->user_regs.abi) { | |
1728 | result += sizeof(u64); | |
352ea45a | 1729 | sz = hweight_long(sample->user_regs.mask) * sizeof(u64); |
b1cf6f65 AH |
1730 | result += sz; |
1731 | } else { | |
1732 | result += sizeof(u64); | |
1733 | } | |
1734 | } | |
1735 | ||
1736 | if (type & PERF_SAMPLE_STACK_USER) { | |
1737 | sz = sample->user_stack.size; | |
1738 | result += sizeof(u64); | |
1739 | if (sz) { | |
1740 | result += sz; | |
1741 | result += sizeof(u64); | |
1742 | } | |
1743 | } | |
1744 | ||
1745 | if (type & PERF_SAMPLE_WEIGHT) | |
1746 | result += sizeof(u64); | |
1747 | ||
1748 | if (type & PERF_SAMPLE_DATA_SRC) | |
1749 | result += sizeof(u64); | |
1750 | ||
42d88910 AH |
1751 | if (type & PERF_SAMPLE_TRANSACTION) |
1752 | result += sizeof(u64); | |
1753 | ||
6a21c0b5 SE |
1754 | if (type & PERF_SAMPLE_REGS_INTR) { |
1755 | if (sample->intr_regs.abi) { | |
1756 | result += sizeof(u64); | |
1757 | sz = hweight_long(sample->intr_regs.mask) * sizeof(u64); | |
1758 | result += sz; | |
1759 | } else { | |
1760 | result += sizeof(u64); | |
1761 | } | |
1762 | } | |
1763 | ||
b1cf6f65 AH |
1764 | return result; |
1765 | } | |
1766 | ||
74eec26f | 1767 | int perf_event__synthesize_sample(union perf_event *event, u64 type, |
352ea45a | 1768 | u64 read_format, |
74eec26f AV |
1769 | const struct perf_sample *sample, |
1770 | bool swapped) | |
1771 | { | |
1772 | u64 *array; | |
d03f2170 | 1773 | size_t sz; |
74eec26f AV |
1774 | /* |
1775 | * used for cross-endian analysis. See git commit 65014ab3 | |
1776 | * for why this goofiness is needed. | |
1777 | */ | |
6a11f92e | 1778 | union u64_swap u; |
74eec26f AV |
1779 | |
1780 | array = event->sample.array; | |
1781 | ||
75562573 AH |
1782 | if (type & PERF_SAMPLE_IDENTIFIER) { |
1783 | *array = sample->id; | |
1784 | array++; | |
1785 | } | |
1786 | ||
74eec26f | 1787 | if (type & PERF_SAMPLE_IP) { |
ef89325f | 1788 | *array = sample->ip; |
74eec26f AV |
1789 | array++; |
1790 | } | |
1791 | ||
1792 | if (type & PERF_SAMPLE_TID) { | |
1793 | u.val32[0] = sample->pid; | |
1794 | u.val32[1] = sample->tid; | |
1795 | if (swapped) { | |
1796 | /* | |
a3f698fe | 1797 | * Inverse of what is done in perf_evsel__parse_sample |
74eec26f AV |
1798 | */ |
1799 | u.val32[0] = bswap_32(u.val32[0]); | |
1800 | u.val32[1] = bswap_32(u.val32[1]); | |
1801 | u.val64 = bswap_64(u.val64); | |
1802 | } | |
1803 | ||
1804 | *array = u.val64; | |
1805 | array++; | |
1806 | } | |
1807 | ||
1808 | if (type & PERF_SAMPLE_TIME) { | |
1809 | *array = sample->time; | |
1810 | array++; | |
1811 | } | |
1812 | ||
1813 | if (type & PERF_SAMPLE_ADDR) { | |
1814 | *array = sample->addr; | |
1815 | array++; | |
1816 | } | |
1817 | ||
1818 | if (type & PERF_SAMPLE_ID) { | |
1819 | *array = sample->id; | |
1820 | array++; | |
1821 | } | |
1822 | ||
1823 | if (type & PERF_SAMPLE_STREAM_ID) { | |
1824 | *array = sample->stream_id; | |
1825 | array++; | |
1826 | } | |
1827 | ||
1828 | if (type & PERF_SAMPLE_CPU) { | |
1829 | u.val32[0] = sample->cpu; | |
1830 | if (swapped) { | |
1831 | /* | |
a3f698fe | 1832 | * Inverse of what is done in perf_evsel__parse_sample |
74eec26f AV |
1833 | */ |
1834 | u.val32[0] = bswap_32(u.val32[0]); | |
1835 | u.val64 = bswap_64(u.val64); | |
1836 | } | |
1837 | *array = u.val64; | |
1838 | array++; | |
1839 | } | |
1840 | ||
1841 | if (type & PERF_SAMPLE_PERIOD) { | |
1842 | *array = sample->period; | |
1843 | array++; | |
1844 | } | |
1845 | ||
d03f2170 AH |
1846 | if (type & PERF_SAMPLE_READ) { |
1847 | if (read_format & PERF_FORMAT_GROUP) | |
1848 | *array = sample->read.group.nr; | |
1849 | else | |
1850 | *array = sample->read.one.value; | |
1851 | array++; | |
1852 | ||
1853 | if (read_format & PERF_FORMAT_TOTAL_TIME_ENABLED) { | |
1854 | *array = sample->read.time_enabled; | |
1855 | array++; | |
1856 | } | |
1857 | ||
1858 | if (read_format & PERF_FORMAT_TOTAL_TIME_RUNNING) { | |
1859 | *array = sample->read.time_running; | |
1860 | array++; | |
1861 | } | |
1862 | ||
1863 | /* PERF_FORMAT_ID is forced for PERF_SAMPLE_READ */ | |
1864 | if (read_format & PERF_FORMAT_GROUP) { | |
1865 | sz = sample->read.group.nr * | |
1866 | sizeof(struct sample_read_value); | |
1867 | memcpy(array, sample->read.group.values, sz); | |
1868 | array = (void *)array + sz; | |
1869 | } else { | |
1870 | *array = sample->read.one.id; | |
1871 | array++; | |
1872 | } | |
1873 | } | |
1874 | ||
1875 | if (type & PERF_SAMPLE_CALLCHAIN) { | |
1876 | sz = (sample->callchain->nr + 1) * sizeof(u64); | |
1877 | memcpy(array, sample->callchain, sz); | |
1878 | array = (void *)array + sz; | |
1879 | } | |
1880 | ||
1881 | if (type & PERF_SAMPLE_RAW) { | |
1882 | u.val32[0] = sample->raw_size; | |
1883 | if (WARN_ONCE(swapped, | |
1884 | "Endianness of raw data not corrected!\n")) { | |
1885 | /* | |
1886 | * Inverse of what is done in perf_evsel__parse_sample | |
1887 | */ | |
1888 | u.val32[0] = bswap_32(u.val32[0]); | |
1889 | u.val32[1] = bswap_32(u.val32[1]); | |
1890 | u.val64 = bswap_64(u.val64); | |
1891 | } | |
1892 | *array = u.val64; | |
1893 | array = (void *)array + sizeof(u32); | |
1894 | ||
1895 | memcpy(array, sample->raw_data, sample->raw_size); | |
1896 | array = (void *)array + sample->raw_size; | |
1897 | } | |
1898 | ||
1899 | if (type & PERF_SAMPLE_BRANCH_STACK) { | |
1900 | sz = sample->branch_stack->nr * sizeof(struct branch_entry); | |
1901 | sz += sizeof(u64); | |
1902 | memcpy(array, sample->branch_stack, sz); | |
1903 | array = (void *)array + sz; | |
1904 | } | |
1905 | ||
1906 | if (type & PERF_SAMPLE_REGS_USER) { | |
1907 | if (sample->user_regs.abi) { | |
1908 | *array++ = sample->user_regs.abi; | |
352ea45a | 1909 | sz = hweight_long(sample->user_regs.mask) * sizeof(u64); |
d03f2170 AH |
1910 | memcpy(array, sample->user_regs.regs, sz); |
1911 | array = (void *)array + sz; | |
1912 | } else { | |
1913 | *array++ = 0; | |
1914 | } | |
1915 | } | |
1916 | ||
1917 | if (type & PERF_SAMPLE_STACK_USER) { | |
1918 | sz = sample->user_stack.size; | |
1919 | *array++ = sz; | |
1920 | if (sz) { | |
1921 | memcpy(array, sample->user_stack.data, sz); | |
1922 | array = (void *)array + sz; | |
1923 | *array++ = sz; | |
1924 | } | |
1925 | } | |
1926 | ||
1927 | if (type & PERF_SAMPLE_WEIGHT) { | |
1928 | *array = sample->weight; | |
1929 | array++; | |
1930 | } | |
1931 | ||
1932 | if (type & PERF_SAMPLE_DATA_SRC) { | |
1933 | *array = sample->data_src; | |
1934 | array++; | |
1935 | } | |
1936 | ||
42d88910 AH |
1937 | if (type & PERF_SAMPLE_TRANSACTION) { |
1938 | *array = sample->transaction; | |
1939 | array++; | |
1940 | } | |
1941 | ||
6a21c0b5 SE |
1942 | if (type & PERF_SAMPLE_REGS_INTR) { |
1943 | if (sample->intr_regs.abi) { | |
1944 | *array++ = sample->intr_regs.abi; | |
1945 | sz = hweight_long(sample->intr_regs.mask) * sizeof(u64); | |
1946 | memcpy(array, sample->intr_regs.regs, sz); | |
1947 | array = (void *)array + sz; | |
1948 | } else { | |
1949 | *array++ = 0; | |
1950 | } | |
1951 | } | |
1952 | ||
74eec26f AV |
1953 | return 0; |
1954 | } | |
5555ded4 | 1955 | |
efd2b924 ACM |
1956 | struct format_field *perf_evsel__field(struct perf_evsel *evsel, const char *name) |
1957 | { | |
1958 | return pevent_find_field(evsel->tp_format, name); | |
1959 | } | |
1960 | ||
5d2074ea | 1961 | void *perf_evsel__rawptr(struct perf_evsel *evsel, struct perf_sample *sample, |
5555ded4 ACM |
1962 | const char *name) |
1963 | { | |
efd2b924 | 1964 | struct format_field *field = perf_evsel__field(evsel, name); |
5555ded4 ACM |
1965 | int offset; |
1966 | ||
efd2b924 ACM |
1967 | if (!field) |
1968 | return NULL; | |
5555ded4 ACM |
1969 | |
1970 | offset = field->offset; | |
1971 | ||
1972 | if (field->flags & FIELD_IS_DYNAMIC) { | |
1973 | offset = *(int *)(sample->raw_data + field->offset); | |
1974 | offset &= 0xffff; | |
1975 | } | |
1976 | ||
1977 | return sample->raw_data + offset; | |
1978 | } | |
1979 | ||
1980 | u64 perf_evsel__intval(struct perf_evsel *evsel, struct perf_sample *sample, | |
1981 | const char *name) | |
1982 | { | |
efd2b924 | 1983 | struct format_field *field = perf_evsel__field(evsel, name); |
e6b6f679 ACM |
1984 | void *ptr; |
1985 | u64 value; | |
5555ded4 | 1986 | |
efd2b924 ACM |
1987 | if (!field) |
1988 | return 0; | |
5555ded4 | 1989 | |
e6b6f679 | 1990 | ptr = sample->raw_data + field->offset; |
5555ded4 | 1991 | |
e6b6f679 ACM |
1992 | switch (field->size) { |
1993 | case 1: | |
1994 | return *(u8 *)ptr; | |
1995 | case 2: | |
1996 | value = *(u16 *)ptr; | |
1997 | break; | |
1998 | case 4: | |
1999 | value = *(u32 *)ptr; | |
2000 | break; | |
2001 | case 8: | |
e94eedab | 2002 | memcpy(&value, ptr, sizeof(u64)); |
e6b6f679 ACM |
2003 | break; |
2004 | default: | |
2005 | return 0; | |
2006 | } | |
2007 | ||
2008 | if (!evsel->needs_swap) | |
2009 | return value; | |
2010 | ||
2011 | switch (field->size) { | |
2012 | case 2: | |
2013 | return bswap_16(value); | |
2014 | case 4: | |
2015 | return bswap_32(value); | |
2016 | case 8: | |
2017 | return bswap_64(value); | |
2018 | default: | |
2019 | return 0; | |
2020 | } | |
2021 | ||
2022 | return 0; | |
5555ded4 | 2023 | } |
0698aedd ACM |
2024 | |
2025 | static int comma_fprintf(FILE *fp, bool *first, const char *fmt, ...) | |
2026 | { | |
2027 | va_list args; | |
2028 | int ret = 0; | |
2029 | ||
2030 | if (!*first) { | |
2031 | ret += fprintf(fp, ","); | |
2032 | } else { | |
2033 | ret += fprintf(fp, ":"); | |
2034 | *first = false; | |
2035 | } | |
2036 | ||
2037 | va_start(args, fmt); | |
2038 | ret += vfprintf(fp, fmt, args); | |
2039 | va_end(args); | |
2040 | return ret; | |
2041 | } | |
2042 | ||
2c5e8c52 | 2043 | static int __print_attr__fprintf(FILE *fp, const char *name, const char *val, void *priv) |
c79a4393 | 2044 | { |
2c5e8c52 | 2045 | return comma_fprintf(fp, (bool *)priv, " %s: %s", name, val); |
c79a4393 ACM |
2046 | } |
2047 | ||
0698aedd ACM |
2048 | int perf_evsel__fprintf(struct perf_evsel *evsel, |
2049 | struct perf_attr_details *details, FILE *fp) | |
2050 | { | |
2051 | bool first = true; | |
e6ab07d0 NK |
2052 | int printed = 0; |
2053 | ||
e35ef355 | 2054 | if (details->event_group) { |
e6ab07d0 NK |
2055 | struct perf_evsel *pos; |
2056 | ||
2057 | if (!perf_evsel__is_group_leader(evsel)) | |
2058 | return 0; | |
2059 | ||
2060 | if (evsel->nr_members > 1) | |
2061 | printed += fprintf(fp, "%s{", evsel->group_name ?: ""); | |
2062 | ||
2063 | printed += fprintf(fp, "%s", perf_evsel__name(evsel)); | |
2064 | for_each_group_member(pos, evsel) | |
2065 | printed += fprintf(fp, ",%s", perf_evsel__name(pos)); | |
2066 | ||
2067 | if (evsel->nr_members > 1) | |
2068 | printed += fprintf(fp, "}"); | |
2069 | goto out; | |
2070 | } | |
2071 | ||
2072 | printed += fprintf(fp, "%s", perf_evsel__name(evsel)); | |
0698aedd | 2073 | |
2c5e8c52 PZ |
2074 | if (details->verbose) { |
2075 | printed += perf_event_attr__fprintf(fp, &evsel->attr, | |
2076 | __print_attr__fprintf, &first); | |
2077 | } else if (details->freq) { | |
0698aedd ACM |
2078 | printed += comma_fprintf(fp, &first, " sample_freq=%" PRIu64, |
2079 | (u64)evsel->attr.sample_freq); | |
2080 | } | |
e6ab07d0 | 2081 | out: |
0698aedd ACM |
2082 | fputc('\n', fp); |
2083 | return ++printed; | |
2084 | } | |
c0a54341 ACM |
2085 | |
2086 | bool perf_evsel__fallback(struct perf_evsel *evsel, int err, | |
2087 | char *msg, size_t msgsize) | |
2088 | { | |
2b821cce | 2089 | if ((err == ENOENT || err == ENXIO || err == ENODEV) && |
c0a54341 ACM |
2090 | evsel->attr.type == PERF_TYPE_HARDWARE && |
2091 | evsel->attr.config == PERF_COUNT_HW_CPU_CYCLES) { | |
2092 | /* | |
2093 | * If it's cycles then fall back to hrtimer based | |
2094 | * cpu-clock-tick sw counter, which is always available even if | |
2095 | * no PMU support. | |
2096 | * | |
2097 | * PPC returns ENXIO until 2.6.37 (behavior changed with commit | |
2098 | * b0a873e). | |
2099 | */ | |
2100 | scnprintf(msg, msgsize, "%s", | |
2101 | "The cycles event is not supported, trying to fall back to cpu-clock-ticks"); | |
2102 | ||
2103 | evsel->attr.type = PERF_TYPE_SOFTWARE; | |
2104 | evsel->attr.config = PERF_COUNT_SW_CPU_CLOCK; | |
2105 | ||
04662523 | 2106 | zfree(&evsel->name); |
c0a54341 ACM |
2107 | return true; |
2108 | } | |
2109 | ||
2110 | return false; | |
2111 | } | |
56e52e85 | 2112 | |
602ad878 | 2113 | int perf_evsel__open_strerror(struct perf_evsel *evsel, struct target *target, |
56e52e85 ACM |
2114 | int err, char *msg, size_t size) |
2115 | { | |
6e81c74c MH |
2116 | char sbuf[STRERR_BUFSIZE]; |
2117 | ||
56e52e85 ACM |
2118 | switch (err) { |
2119 | case EPERM: | |
2120 | case EACCES: | |
b69e63a4 | 2121 | return scnprintf(msg, size, |
56e52e85 ACM |
2122 | "You may not have permission to collect %sstats.\n" |
2123 | "Consider tweaking /proc/sys/kernel/perf_event_paranoid:\n" | |
2124 | " -1 - Not paranoid at all\n" | |
2125 | " 0 - Disallow raw tracepoint access for unpriv\n" | |
2126 | " 1 - Disallow cpu events for unpriv\n" | |
2127 | " 2 - Disallow kernel profiling for unpriv", | |
2128 | target->system_wide ? "system-wide " : ""); | |
2129 | case ENOENT: | |
2130 | return scnprintf(msg, size, "The %s event is not supported.", | |
2131 | perf_evsel__name(evsel)); | |
2132 | case EMFILE: | |
2133 | return scnprintf(msg, size, "%s", | |
2134 | "Too many events are opened.\n" | |
18ffdfe8 JO |
2135 | "Probably the maximum number of open file descriptors has been reached.\n" |
2136 | "Hint: Try again after reducing the number of events.\n" | |
2137 | "Hint: Try increasing the limit with 'ulimit -n <limit>'"); | |
56e52e85 ACM |
2138 | case ENODEV: |
2139 | if (target->cpu_list) | |
2140 | return scnprintf(msg, size, "%s", | |
2141 | "No such device - did you specify an out-of-range profile CPU?\n"); | |
2142 | break; | |
2143 | case EOPNOTSUPP: | |
2144 | if (evsel->attr.precise_ip) | |
2145 | return scnprintf(msg, size, "%s", | |
2146 | "\'precise\' request may not be supported. Try removing 'p' modifier."); | |
2147 | #if defined(__i386__) || defined(__x86_64__) | |
2148 | if (evsel->attr.type == PERF_TYPE_HARDWARE) | |
2149 | return scnprintf(msg, size, "%s", | |
2150 | "No hardware sampling interrupt available.\n" | |
2151 | "No APIC? If so then you can boot the kernel with the \"lapic\" boot parameter to force-enable it."); | |
2152 | #endif | |
2153 | break; | |
63914aca JO |
2154 | case EBUSY: |
2155 | if (find_process("oprofiled")) | |
2156 | return scnprintf(msg, size, | |
2157 | "The PMU counters are busy/taken by another profiler.\n" | |
2158 | "We found oprofile daemon running, please stop it and try again."); | |
2159 | break; | |
814c8c38 PZ |
2160 | case EINVAL: |
2161 | if (perf_missing_features.clockid) | |
2162 | return scnprintf(msg, size, "clockid feature not supported."); | |
2163 | if (perf_missing_features.clockid_wrong) | |
2164 | return scnprintf(msg, size, "wrong clockid (%d).", clockid); | |
2165 | break; | |
56e52e85 ACM |
2166 | default: |
2167 | break; | |
2168 | } | |
2169 | ||
2170 | return scnprintf(msg, size, | |
6e81c74c | 2171 | "The sys_perf_event_open() syscall returned with %d (%s) for event (%s).\n" |
56e52e85 ACM |
2172 | "/bin/dmesg may provide additional information.\n" |
2173 | "No CONFIG_PERF_EVENTS=y kernel support configured?\n", | |
6e81c74c MH |
2174 | err, strerror_r(err, sbuf, sizeof(sbuf)), |
2175 | perf_evsel__name(evsel)); | |
56e52e85 | 2176 | } |