Commit | Line | Data |
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f8a95309 ACM |
1 | /* |
2 | * Copyright (C) 2011, Red Hat Inc, Arnaldo Carvalho de Melo <acme@redhat.com> | |
3 | * | |
4 | * Parts came from builtin-{top,stat,record}.c, see those files for further | |
5 | * copyright notes. | |
6 | * | |
7 | * Released under the GPL v2. (and only v2, not any later version) | |
8 | */ | |
9 | ||
936be503 | 10 | #include <byteswap.h> |
0f6a3015 | 11 | #include <linux/bitops.h> |
936be503 | 12 | #include "asm/bug.h" |
efd2b924 | 13 | #include "debugfs.h" |
5555ded4 | 14 | #include "event-parse.h" |
69aad6f1 | 15 | #include "evsel.h" |
70082dd9 | 16 | #include "evlist.h" |
69aad6f1 | 17 | #include "util.h" |
86bd5e86 | 18 | #include "cpumap.h" |
fd78260b | 19 | #include "thread_map.h" |
12864b31 | 20 | #include "target.h" |
d2709c7c DH |
21 | #include <linux/hw_breakpoint.h> |
22 | #include <linux/perf_event.h> | |
26d33022 | 23 | #include "perf_regs.h" |
69aad6f1 | 24 | |
c52b12ed ACM |
25 | #define FD(e, x, y) (*(int *)xyarray__entry(e->fd, x, y)) |
26 | ||
bde09467 | 27 | static int __perf_evsel__sample_size(u64 sample_type) |
c2a70653 ACM |
28 | { |
29 | u64 mask = sample_type & PERF_SAMPLE_MASK; | |
30 | int size = 0; | |
31 | int i; | |
32 | ||
33 | for (i = 0; i < 64; i++) { | |
34 | if (mask & (1ULL << i)) | |
35 | size++; | |
36 | } | |
37 | ||
38 | size *= sizeof(u64); | |
39 | ||
40 | return size; | |
41 | } | |
42 | ||
4bf9ce1b | 43 | void hists__init(struct hists *hists) |
0e2a5f10 ACM |
44 | { |
45 | memset(hists, 0, sizeof(*hists)); | |
46 | hists->entries_in_array[0] = hists->entries_in_array[1] = RB_ROOT; | |
47 | hists->entries_in = &hists->entries_in_array[0]; | |
48 | hists->entries_collapsed = RB_ROOT; | |
49 | hists->entries = RB_ROOT; | |
50 | pthread_mutex_init(&hists->lock, NULL); | |
51 | } | |
52 | ||
7be5ebe8 ACM |
53 | void __perf_evsel__set_sample_bit(struct perf_evsel *evsel, |
54 | enum perf_event_sample_format bit) | |
55 | { | |
56 | if (!(evsel->attr.sample_type & bit)) { | |
57 | evsel->attr.sample_type |= bit; | |
58 | evsel->sample_size += sizeof(u64); | |
59 | } | |
60 | } | |
61 | ||
62 | void __perf_evsel__reset_sample_bit(struct perf_evsel *evsel, | |
63 | enum perf_event_sample_format bit) | |
64 | { | |
65 | if (evsel->attr.sample_type & bit) { | |
66 | evsel->attr.sample_type &= ~bit; | |
67 | evsel->sample_size -= sizeof(u64); | |
68 | } | |
69 | } | |
70 | ||
ef1d1af2 ACM |
71 | void perf_evsel__init(struct perf_evsel *evsel, |
72 | struct perf_event_attr *attr, int idx) | |
73 | { | |
74 | evsel->idx = idx; | |
75 | evsel->attr = *attr; | |
2cfda562 | 76 | evsel->leader = evsel; |
ef1d1af2 | 77 | INIT_LIST_HEAD(&evsel->node); |
1980c2eb | 78 | hists__init(&evsel->hists); |
bde09467 | 79 | evsel->sample_size = __perf_evsel__sample_size(attr->sample_type); |
ef1d1af2 ACM |
80 | } |
81 | ||
23a2f3ab | 82 | struct perf_evsel *perf_evsel__new(struct perf_event_attr *attr, int idx) |
69aad6f1 ACM |
83 | { |
84 | struct perf_evsel *evsel = zalloc(sizeof(*evsel)); | |
85 | ||
ef1d1af2 ACM |
86 | if (evsel != NULL) |
87 | perf_evsel__init(evsel, attr, idx); | |
69aad6f1 ACM |
88 | |
89 | return evsel; | |
90 | } | |
91 | ||
201b7334 | 92 | struct event_format *event_format__new(const char *sys, const char *name) |
efd2b924 ACM |
93 | { |
94 | int fd, n; | |
95 | char *filename; | |
96 | void *bf = NULL, *nbf; | |
97 | size_t size = 0, alloc_size = 0; | |
98 | struct event_format *format = NULL; | |
99 | ||
100 | if (asprintf(&filename, "%s/%s/%s/format", tracing_events_path, sys, name) < 0) | |
101 | goto out; | |
102 | ||
103 | fd = open(filename, O_RDONLY); | |
104 | if (fd < 0) | |
105 | goto out_free_filename; | |
106 | ||
107 | do { | |
108 | if (size == alloc_size) { | |
109 | alloc_size += BUFSIZ; | |
110 | nbf = realloc(bf, alloc_size); | |
111 | if (nbf == NULL) | |
112 | goto out_free_bf; | |
113 | bf = nbf; | |
114 | } | |
115 | ||
116 | n = read(fd, bf + size, BUFSIZ); | |
117 | if (n < 0) | |
118 | goto out_free_bf; | |
119 | size += n; | |
120 | } while (n > 0); | |
121 | ||
122 | pevent_parse_format(&format, bf, size, sys); | |
123 | ||
124 | out_free_bf: | |
125 | free(bf); | |
126 | close(fd); | |
127 | out_free_filename: | |
128 | free(filename); | |
129 | out: | |
130 | return format; | |
131 | } | |
132 | ||
133 | struct perf_evsel *perf_evsel__newtp(const char *sys, const char *name, int idx) | |
134 | { | |
135 | struct perf_evsel *evsel = zalloc(sizeof(*evsel)); | |
136 | ||
137 | if (evsel != NULL) { | |
138 | struct perf_event_attr attr = { | |
0b80f8b3 ACM |
139 | .type = PERF_TYPE_TRACEPOINT, |
140 | .sample_type = (PERF_SAMPLE_RAW | PERF_SAMPLE_TIME | | |
141 | PERF_SAMPLE_CPU | PERF_SAMPLE_PERIOD), | |
efd2b924 ACM |
142 | }; |
143 | ||
e48ffe2b ACM |
144 | if (asprintf(&evsel->name, "%s:%s", sys, name) < 0) |
145 | goto out_free; | |
146 | ||
efd2b924 ACM |
147 | evsel->tp_format = event_format__new(sys, name); |
148 | if (evsel->tp_format == NULL) | |
149 | goto out_free; | |
150 | ||
0b80f8b3 | 151 | event_attr_init(&attr); |
efd2b924 | 152 | attr.config = evsel->tp_format->id; |
0b80f8b3 | 153 | attr.sample_period = 1; |
efd2b924 | 154 | perf_evsel__init(evsel, &attr, idx); |
efd2b924 ACM |
155 | } |
156 | ||
157 | return evsel; | |
158 | ||
159 | out_free: | |
e48ffe2b | 160 | free(evsel->name); |
efd2b924 ACM |
161 | free(evsel); |
162 | return NULL; | |
163 | } | |
164 | ||
8ad7013b | 165 | const char *perf_evsel__hw_names[PERF_COUNT_HW_MAX] = { |
c410431c ACM |
166 | "cycles", |
167 | "instructions", | |
168 | "cache-references", | |
169 | "cache-misses", | |
170 | "branches", | |
171 | "branch-misses", | |
172 | "bus-cycles", | |
173 | "stalled-cycles-frontend", | |
174 | "stalled-cycles-backend", | |
175 | "ref-cycles", | |
176 | }; | |
177 | ||
dd4f5223 | 178 | static const char *__perf_evsel__hw_name(u64 config) |
c410431c ACM |
179 | { |
180 | if (config < PERF_COUNT_HW_MAX && perf_evsel__hw_names[config]) | |
181 | return perf_evsel__hw_names[config]; | |
182 | ||
183 | return "unknown-hardware"; | |
184 | } | |
185 | ||
27f18617 | 186 | static int perf_evsel__add_modifiers(struct perf_evsel *evsel, char *bf, size_t size) |
c410431c | 187 | { |
27f18617 | 188 | int colon = 0, r = 0; |
c410431c | 189 | struct perf_event_attr *attr = &evsel->attr; |
c410431c ACM |
190 | bool exclude_guest_default = false; |
191 | ||
192 | #define MOD_PRINT(context, mod) do { \ | |
193 | if (!attr->exclude_##context) { \ | |
27f18617 | 194 | if (!colon) colon = ++r; \ |
c410431c ACM |
195 | r += scnprintf(bf + r, size - r, "%c", mod); \ |
196 | } } while(0) | |
197 | ||
198 | if (attr->exclude_kernel || attr->exclude_user || attr->exclude_hv) { | |
199 | MOD_PRINT(kernel, 'k'); | |
200 | MOD_PRINT(user, 'u'); | |
201 | MOD_PRINT(hv, 'h'); | |
202 | exclude_guest_default = true; | |
203 | } | |
204 | ||
205 | if (attr->precise_ip) { | |
206 | if (!colon) | |
27f18617 | 207 | colon = ++r; |
c410431c ACM |
208 | r += scnprintf(bf + r, size - r, "%.*s", attr->precise_ip, "ppp"); |
209 | exclude_guest_default = true; | |
210 | } | |
211 | ||
212 | if (attr->exclude_host || attr->exclude_guest == exclude_guest_default) { | |
213 | MOD_PRINT(host, 'H'); | |
214 | MOD_PRINT(guest, 'G'); | |
215 | } | |
216 | #undef MOD_PRINT | |
217 | if (colon) | |
27f18617 | 218 | bf[colon - 1] = ':'; |
c410431c ACM |
219 | return r; |
220 | } | |
221 | ||
27f18617 ACM |
222 | static int perf_evsel__hw_name(struct perf_evsel *evsel, char *bf, size_t size) |
223 | { | |
224 | int r = scnprintf(bf, size, "%s", __perf_evsel__hw_name(evsel->attr.config)); | |
225 | return r + perf_evsel__add_modifiers(evsel, bf + r, size - r); | |
226 | } | |
227 | ||
8ad7013b | 228 | const char *perf_evsel__sw_names[PERF_COUNT_SW_MAX] = { |
335c2f5d ACM |
229 | "cpu-clock", |
230 | "task-clock", | |
231 | "page-faults", | |
232 | "context-switches", | |
8ad7013b | 233 | "cpu-migrations", |
335c2f5d ACM |
234 | "minor-faults", |
235 | "major-faults", | |
236 | "alignment-faults", | |
237 | "emulation-faults", | |
238 | }; | |
239 | ||
dd4f5223 | 240 | static const char *__perf_evsel__sw_name(u64 config) |
335c2f5d ACM |
241 | { |
242 | if (config < PERF_COUNT_SW_MAX && perf_evsel__sw_names[config]) | |
243 | return perf_evsel__sw_names[config]; | |
244 | return "unknown-software"; | |
245 | } | |
246 | ||
247 | static int perf_evsel__sw_name(struct perf_evsel *evsel, char *bf, size_t size) | |
248 | { | |
249 | int r = scnprintf(bf, size, "%s", __perf_evsel__sw_name(evsel->attr.config)); | |
250 | return r + perf_evsel__add_modifiers(evsel, bf + r, size - r); | |
251 | } | |
252 | ||
287e74aa JO |
253 | static int __perf_evsel__bp_name(char *bf, size_t size, u64 addr, u64 type) |
254 | { | |
255 | int r; | |
256 | ||
257 | r = scnprintf(bf, size, "mem:0x%" PRIx64 ":", addr); | |
258 | ||
259 | if (type & HW_BREAKPOINT_R) | |
260 | r += scnprintf(bf + r, size - r, "r"); | |
261 | ||
262 | if (type & HW_BREAKPOINT_W) | |
263 | r += scnprintf(bf + r, size - r, "w"); | |
264 | ||
265 | if (type & HW_BREAKPOINT_X) | |
266 | r += scnprintf(bf + r, size - r, "x"); | |
267 | ||
268 | return r; | |
269 | } | |
270 | ||
271 | static int perf_evsel__bp_name(struct perf_evsel *evsel, char *bf, size_t size) | |
272 | { | |
273 | struct perf_event_attr *attr = &evsel->attr; | |
274 | int r = __perf_evsel__bp_name(bf, size, attr->bp_addr, attr->bp_type); | |
275 | return r + perf_evsel__add_modifiers(evsel, bf + r, size - r); | |
276 | } | |
277 | ||
0b668bc9 ACM |
278 | const char *perf_evsel__hw_cache[PERF_COUNT_HW_CACHE_MAX] |
279 | [PERF_EVSEL__MAX_ALIASES] = { | |
280 | { "L1-dcache", "l1-d", "l1d", "L1-data", }, | |
281 | { "L1-icache", "l1-i", "l1i", "L1-instruction", }, | |
282 | { "LLC", "L2", }, | |
283 | { "dTLB", "d-tlb", "Data-TLB", }, | |
284 | { "iTLB", "i-tlb", "Instruction-TLB", }, | |
285 | { "branch", "branches", "bpu", "btb", "bpc", }, | |
286 | { "node", }, | |
287 | }; | |
288 | ||
289 | const char *perf_evsel__hw_cache_op[PERF_COUNT_HW_CACHE_OP_MAX] | |
290 | [PERF_EVSEL__MAX_ALIASES] = { | |
291 | { "load", "loads", "read", }, | |
292 | { "store", "stores", "write", }, | |
293 | { "prefetch", "prefetches", "speculative-read", "speculative-load", }, | |
294 | }; | |
295 | ||
296 | const char *perf_evsel__hw_cache_result[PERF_COUNT_HW_CACHE_RESULT_MAX] | |
297 | [PERF_EVSEL__MAX_ALIASES] = { | |
298 | { "refs", "Reference", "ops", "access", }, | |
299 | { "misses", "miss", }, | |
300 | }; | |
301 | ||
302 | #define C(x) PERF_COUNT_HW_CACHE_##x | |
303 | #define CACHE_READ (1 << C(OP_READ)) | |
304 | #define CACHE_WRITE (1 << C(OP_WRITE)) | |
305 | #define CACHE_PREFETCH (1 << C(OP_PREFETCH)) | |
306 | #define COP(x) (1 << x) | |
307 | ||
308 | /* | |
309 | * cache operartion stat | |
310 | * L1I : Read and prefetch only | |
311 | * ITLB and BPU : Read-only | |
312 | */ | |
313 | static unsigned long perf_evsel__hw_cache_stat[C(MAX)] = { | |
314 | [C(L1D)] = (CACHE_READ | CACHE_WRITE | CACHE_PREFETCH), | |
315 | [C(L1I)] = (CACHE_READ | CACHE_PREFETCH), | |
316 | [C(LL)] = (CACHE_READ | CACHE_WRITE | CACHE_PREFETCH), | |
317 | [C(DTLB)] = (CACHE_READ | CACHE_WRITE | CACHE_PREFETCH), | |
318 | [C(ITLB)] = (CACHE_READ), | |
319 | [C(BPU)] = (CACHE_READ), | |
320 | [C(NODE)] = (CACHE_READ | CACHE_WRITE | CACHE_PREFETCH), | |
321 | }; | |
322 | ||
323 | bool perf_evsel__is_cache_op_valid(u8 type, u8 op) | |
324 | { | |
325 | if (perf_evsel__hw_cache_stat[type] & COP(op)) | |
326 | return true; /* valid */ | |
327 | else | |
328 | return false; /* invalid */ | |
329 | } | |
330 | ||
331 | int __perf_evsel__hw_cache_type_op_res_name(u8 type, u8 op, u8 result, | |
332 | char *bf, size_t size) | |
333 | { | |
334 | if (result) { | |
335 | return scnprintf(bf, size, "%s-%s-%s", perf_evsel__hw_cache[type][0], | |
336 | perf_evsel__hw_cache_op[op][0], | |
337 | perf_evsel__hw_cache_result[result][0]); | |
338 | } | |
339 | ||
340 | return scnprintf(bf, size, "%s-%s", perf_evsel__hw_cache[type][0], | |
341 | perf_evsel__hw_cache_op[op][1]); | |
342 | } | |
343 | ||
dd4f5223 | 344 | static int __perf_evsel__hw_cache_name(u64 config, char *bf, size_t size) |
0b668bc9 ACM |
345 | { |
346 | u8 op, result, type = (config >> 0) & 0xff; | |
347 | const char *err = "unknown-ext-hardware-cache-type"; | |
348 | ||
349 | if (type > PERF_COUNT_HW_CACHE_MAX) | |
350 | goto out_err; | |
351 | ||
352 | op = (config >> 8) & 0xff; | |
353 | err = "unknown-ext-hardware-cache-op"; | |
354 | if (op > PERF_COUNT_HW_CACHE_OP_MAX) | |
355 | goto out_err; | |
356 | ||
357 | result = (config >> 16) & 0xff; | |
358 | err = "unknown-ext-hardware-cache-result"; | |
359 | if (result > PERF_COUNT_HW_CACHE_RESULT_MAX) | |
360 | goto out_err; | |
361 | ||
362 | err = "invalid-cache"; | |
363 | if (!perf_evsel__is_cache_op_valid(type, op)) | |
364 | goto out_err; | |
365 | ||
366 | return __perf_evsel__hw_cache_type_op_res_name(type, op, result, bf, size); | |
367 | out_err: | |
368 | return scnprintf(bf, size, "%s", err); | |
369 | } | |
370 | ||
371 | static int perf_evsel__hw_cache_name(struct perf_evsel *evsel, char *bf, size_t size) | |
372 | { | |
373 | int ret = __perf_evsel__hw_cache_name(evsel->attr.config, bf, size); | |
374 | return ret + perf_evsel__add_modifiers(evsel, bf + ret, size - ret); | |
375 | } | |
376 | ||
6eef3d9c ACM |
377 | static int perf_evsel__raw_name(struct perf_evsel *evsel, char *bf, size_t size) |
378 | { | |
379 | int ret = scnprintf(bf, size, "raw 0x%" PRIx64, evsel->attr.config); | |
380 | return ret + perf_evsel__add_modifiers(evsel, bf + ret, size - ret); | |
381 | } | |
382 | ||
7289f83c | 383 | const char *perf_evsel__name(struct perf_evsel *evsel) |
a4460836 | 384 | { |
7289f83c | 385 | char bf[128]; |
a4460836 | 386 | |
7289f83c ACM |
387 | if (evsel->name) |
388 | return evsel->name; | |
c410431c ACM |
389 | |
390 | switch (evsel->attr.type) { | |
391 | case PERF_TYPE_RAW: | |
6eef3d9c | 392 | perf_evsel__raw_name(evsel, bf, sizeof(bf)); |
c410431c ACM |
393 | break; |
394 | ||
395 | case PERF_TYPE_HARDWARE: | |
7289f83c | 396 | perf_evsel__hw_name(evsel, bf, sizeof(bf)); |
c410431c | 397 | break; |
0b668bc9 ACM |
398 | |
399 | case PERF_TYPE_HW_CACHE: | |
7289f83c | 400 | perf_evsel__hw_cache_name(evsel, bf, sizeof(bf)); |
0b668bc9 ACM |
401 | break; |
402 | ||
335c2f5d | 403 | case PERF_TYPE_SOFTWARE: |
7289f83c | 404 | perf_evsel__sw_name(evsel, bf, sizeof(bf)); |
335c2f5d ACM |
405 | break; |
406 | ||
a4460836 | 407 | case PERF_TYPE_TRACEPOINT: |
7289f83c | 408 | scnprintf(bf, sizeof(bf), "%s", "unknown tracepoint"); |
a4460836 ACM |
409 | break; |
410 | ||
287e74aa JO |
411 | case PERF_TYPE_BREAKPOINT: |
412 | perf_evsel__bp_name(evsel, bf, sizeof(bf)); | |
413 | break; | |
414 | ||
c410431c | 415 | default: |
ca1b1457 RR |
416 | scnprintf(bf, sizeof(bf), "unknown attr type: %d", |
417 | evsel->attr.type); | |
a4460836 | 418 | break; |
c410431c ACM |
419 | } |
420 | ||
7289f83c ACM |
421 | evsel->name = strdup(bf); |
422 | ||
423 | return evsel->name ?: "unknown"; | |
c410431c ACM |
424 | } |
425 | ||
774cb499 JO |
426 | /* |
427 | * The enable_on_exec/disabled value strategy: | |
428 | * | |
429 | * 1) For any type of traced program: | |
430 | * - all independent events and group leaders are disabled | |
431 | * - all group members are enabled | |
432 | * | |
433 | * Group members are ruled by group leaders. They need to | |
434 | * be enabled, because the group scheduling relies on that. | |
435 | * | |
436 | * 2) For traced programs executed by perf: | |
437 | * - all independent events and group leaders have | |
438 | * enable_on_exec set | |
439 | * - we don't specifically enable or disable any event during | |
440 | * the record command | |
441 | * | |
442 | * Independent events and group leaders are initially disabled | |
443 | * and get enabled by exec. Group members are ruled by group | |
444 | * leaders as stated in 1). | |
445 | * | |
446 | * 3) For traced programs attached by perf (pid/tid): | |
447 | * - we specifically enable or disable all events during | |
448 | * the record command | |
449 | * | |
450 | * When attaching events to already running traced we | |
451 | * enable/disable events specifically, as there's no | |
452 | * initial traced exec call. | |
453 | */ | |
cac21425 JO |
454 | void perf_evsel__config(struct perf_evsel *evsel, |
455 | struct perf_record_opts *opts) | |
0f82ebc4 ACM |
456 | { |
457 | struct perf_event_attr *attr = &evsel->attr; | |
458 | int track = !evsel->idx; /* only the first counter needs these */ | |
459 | ||
808e1226 | 460 | attr->sample_id_all = opts->sample_id_all_missing ? 0 : 1; |
0f82ebc4 ACM |
461 | attr->inherit = !opts->no_inherit; |
462 | attr->read_format = PERF_FORMAT_TOTAL_TIME_ENABLED | | |
463 | PERF_FORMAT_TOTAL_TIME_RUNNING | | |
464 | PERF_FORMAT_ID; | |
465 | ||
7be5ebe8 ACM |
466 | perf_evsel__set_sample_bit(evsel, IP); |
467 | perf_evsel__set_sample_bit(evsel, TID); | |
0f82ebc4 ACM |
468 | |
469 | /* | |
470 | * We default some events to a 1 default interval. But keep | |
471 | * it a weak assumption overridable by the user. | |
472 | */ | |
473 | if (!attr->sample_period || (opts->user_freq != UINT_MAX && | |
474 | opts->user_interval != ULLONG_MAX)) { | |
475 | if (opts->freq) { | |
7be5ebe8 | 476 | perf_evsel__set_sample_bit(evsel, PERIOD); |
0f82ebc4 ACM |
477 | attr->freq = 1; |
478 | attr->sample_freq = opts->freq; | |
479 | } else { | |
480 | attr->sample_period = opts->default_interval; | |
481 | } | |
482 | } | |
483 | ||
484 | if (opts->no_samples) | |
485 | attr->sample_freq = 0; | |
486 | ||
487 | if (opts->inherit_stat) | |
488 | attr->inherit_stat = 1; | |
489 | ||
490 | if (opts->sample_address) { | |
7be5ebe8 | 491 | perf_evsel__set_sample_bit(evsel, ADDR); |
0f82ebc4 ACM |
492 | attr->mmap_data = track; |
493 | } | |
494 | ||
26d33022 | 495 | if (opts->call_graph) { |
7be5ebe8 | 496 | perf_evsel__set_sample_bit(evsel, CALLCHAIN); |
0f82ebc4 | 497 | |
26d33022 | 498 | if (opts->call_graph == CALLCHAIN_DWARF) { |
7be5ebe8 ACM |
499 | perf_evsel__set_sample_bit(evsel, REGS_USER); |
500 | perf_evsel__set_sample_bit(evsel, STACK_USER); | |
26d33022 JO |
501 | attr->sample_regs_user = PERF_REGS_MASK; |
502 | attr->sample_stack_user = opts->stack_dump_size; | |
503 | attr->exclude_callchain_user = 1; | |
504 | } | |
505 | } | |
506 | ||
e40ee742 | 507 | if (perf_target__has_cpu(&opts->target)) |
7be5ebe8 | 508 | perf_evsel__set_sample_bit(evsel, CPU); |
0f82ebc4 | 509 | |
3e76ac78 | 510 | if (opts->period) |
7be5ebe8 | 511 | perf_evsel__set_sample_bit(evsel, PERIOD); |
3e76ac78 | 512 | |
808e1226 | 513 | if (!opts->sample_id_all_missing && |
d67356e7 | 514 | (opts->sample_time || !opts->no_inherit || |
aa22dd49 | 515 | perf_target__has_cpu(&opts->target))) |
7be5ebe8 | 516 | perf_evsel__set_sample_bit(evsel, TIME); |
0f82ebc4 ACM |
517 | |
518 | if (opts->raw_samples) { | |
7be5ebe8 ACM |
519 | perf_evsel__set_sample_bit(evsel, TIME); |
520 | perf_evsel__set_sample_bit(evsel, RAW); | |
521 | perf_evsel__set_sample_bit(evsel, CPU); | |
0f82ebc4 ACM |
522 | } |
523 | ||
524 | if (opts->no_delay) { | |
525 | attr->watermark = 0; | |
526 | attr->wakeup_events = 1; | |
527 | } | |
bdfebd84 | 528 | if (opts->branch_stack) { |
7be5ebe8 | 529 | perf_evsel__set_sample_bit(evsel, BRANCH_STACK); |
bdfebd84 RAV |
530 | attr->branch_sample_type = opts->branch_stack; |
531 | } | |
0f82ebc4 ACM |
532 | |
533 | attr->mmap = track; | |
534 | attr->comm = track; | |
535 | ||
774cb499 JO |
536 | /* |
537 | * XXX see the function comment above | |
538 | * | |
539 | * Disabling only independent events or group leaders, | |
540 | * keeping group members enabled. | |
541 | */ | |
823254ed | 542 | if (perf_evsel__is_group_leader(evsel)) |
774cb499 JO |
543 | attr->disabled = 1; |
544 | ||
545 | /* | |
546 | * Setting enable_on_exec for independent events and | |
547 | * group leaders for traced executed by perf. | |
548 | */ | |
823254ed | 549 | if (perf_target__none(&opts->target) && perf_evsel__is_group_leader(evsel)) |
0f82ebc4 | 550 | attr->enable_on_exec = 1; |
0f82ebc4 ACM |
551 | } |
552 | ||
69aad6f1 ACM |
553 | int perf_evsel__alloc_fd(struct perf_evsel *evsel, int ncpus, int nthreads) |
554 | { | |
4af4c955 | 555 | int cpu, thread; |
69aad6f1 | 556 | evsel->fd = xyarray__new(ncpus, nthreads, sizeof(int)); |
4af4c955 DA |
557 | |
558 | if (evsel->fd) { | |
559 | for (cpu = 0; cpu < ncpus; cpu++) { | |
560 | for (thread = 0; thread < nthreads; thread++) { | |
561 | FD(evsel, cpu, thread) = -1; | |
562 | } | |
563 | } | |
564 | } | |
565 | ||
69aad6f1 ACM |
566 | return evsel->fd != NULL ? 0 : -ENOMEM; |
567 | } | |
568 | ||
745cefc5 ACM |
569 | int perf_evsel__set_filter(struct perf_evsel *evsel, int ncpus, int nthreads, |
570 | const char *filter) | |
571 | { | |
572 | int cpu, thread; | |
573 | ||
574 | for (cpu = 0; cpu < ncpus; cpu++) { | |
575 | for (thread = 0; thread < nthreads; thread++) { | |
576 | int fd = FD(evsel, cpu, thread), | |
577 | err = ioctl(fd, PERF_EVENT_IOC_SET_FILTER, filter); | |
578 | ||
579 | if (err) | |
580 | return err; | |
581 | } | |
582 | } | |
583 | ||
584 | return 0; | |
585 | } | |
586 | ||
70db7533 ACM |
587 | int perf_evsel__alloc_id(struct perf_evsel *evsel, int ncpus, int nthreads) |
588 | { | |
a91e5431 ACM |
589 | evsel->sample_id = xyarray__new(ncpus, nthreads, sizeof(struct perf_sample_id)); |
590 | if (evsel->sample_id == NULL) | |
591 | return -ENOMEM; | |
592 | ||
593 | evsel->id = zalloc(ncpus * nthreads * sizeof(u64)); | |
594 | if (evsel->id == NULL) { | |
595 | xyarray__delete(evsel->sample_id); | |
596 | evsel->sample_id = NULL; | |
597 | return -ENOMEM; | |
598 | } | |
599 | ||
600 | return 0; | |
70db7533 ACM |
601 | } |
602 | ||
c52b12ed ACM |
603 | int perf_evsel__alloc_counts(struct perf_evsel *evsel, int ncpus) |
604 | { | |
605 | evsel->counts = zalloc((sizeof(*evsel->counts) + | |
606 | (ncpus * sizeof(struct perf_counts_values)))); | |
607 | return evsel->counts != NULL ? 0 : -ENOMEM; | |
608 | } | |
609 | ||
69aad6f1 ACM |
610 | void perf_evsel__free_fd(struct perf_evsel *evsel) |
611 | { | |
612 | xyarray__delete(evsel->fd); | |
613 | evsel->fd = NULL; | |
614 | } | |
615 | ||
70db7533 ACM |
616 | void perf_evsel__free_id(struct perf_evsel *evsel) |
617 | { | |
a91e5431 ACM |
618 | xyarray__delete(evsel->sample_id); |
619 | evsel->sample_id = NULL; | |
620 | free(evsel->id); | |
70db7533 ACM |
621 | evsel->id = NULL; |
622 | } | |
623 | ||
c52b12ed ACM |
624 | void perf_evsel__close_fd(struct perf_evsel *evsel, int ncpus, int nthreads) |
625 | { | |
626 | int cpu, thread; | |
627 | ||
628 | for (cpu = 0; cpu < ncpus; cpu++) | |
629 | for (thread = 0; thread < nthreads; ++thread) { | |
630 | close(FD(evsel, cpu, thread)); | |
631 | FD(evsel, cpu, thread) = -1; | |
632 | } | |
633 | } | |
634 | ||
ef1d1af2 | 635 | void perf_evsel__exit(struct perf_evsel *evsel) |
69aad6f1 ACM |
636 | { |
637 | assert(list_empty(&evsel->node)); | |
638 | xyarray__delete(evsel->fd); | |
a91e5431 ACM |
639 | xyarray__delete(evsel->sample_id); |
640 | free(evsel->id); | |
ef1d1af2 ACM |
641 | } |
642 | ||
643 | void perf_evsel__delete(struct perf_evsel *evsel) | |
644 | { | |
645 | perf_evsel__exit(evsel); | |
023695d9 | 646 | close_cgroup(evsel->cgrp); |
6a4bb04c | 647 | free(evsel->group_name); |
e48ffe2b | 648 | if (evsel->tp_format) |
efd2b924 | 649 | pevent_free_format(evsel->tp_format); |
f0c55bcf | 650 | free(evsel->name); |
69aad6f1 ACM |
651 | free(evsel); |
652 | } | |
c52b12ed ACM |
653 | |
654 | int __perf_evsel__read_on_cpu(struct perf_evsel *evsel, | |
655 | int cpu, int thread, bool scale) | |
656 | { | |
657 | struct perf_counts_values count; | |
658 | size_t nv = scale ? 3 : 1; | |
659 | ||
660 | if (FD(evsel, cpu, thread) < 0) | |
661 | return -EINVAL; | |
662 | ||
4eed11d5 ACM |
663 | if (evsel->counts == NULL && perf_evsel__alloc_counts(evsel, cpu + 1) < 0) |
664 | return -ENOMEM; | |
665 | ||
c52b12ed ACM |
666 | if (readn(FD(evsel, cpu, thread), &count, nv * sizeof(u64)) < 0) |
667 | return -errno; | |
668 | ||
669 | if (scale) { | |
670 | if (count.run == 0) | |
671 | count.val = 0; | |
672 | else if (count.run < count.ena) | |
673 | count.val = (u64)((double)count.val * count.ena / count.run + 0.5); | |
674 | } else | |
675 | count.ena = count.run = 0; | |
676 | ||
677 | evsel->counts->cpu[cpu] = count; | |
678 | return 0; | |
679 | } | |
680 | ||
681 | int __perf_evsel__read(struct perf_evsel *evsel, | |
682 | int ncpus, int nthreads, bool scale) | |
683 | { | |
684 | size_t nv = scale ? 3 : 1; | |
685 | int cpu, thread; | |
686 | struct perf_counts_values *aggr = &evsel->counts->aggr, count; | |
687 | ||
52bcd994 | 688 | aggr->val = aggr->ena = aggr->run = 0; |
c52b12ed ACM |
689 | |
690 | for (cpu = 0; cpu < ncpus; cpu++) { | |
691 | for (thread = 0; thread < nthreads; thread++) { | |
692 | if (FD(evsel, cpu, thread) < 0) | |
693 | continue; | |
694 | ||
695 | if (readn(FD(evsel, cpu, thread), | |
696 | &count, nv * sizeof(u64)) < 0) | |
697 | return -errno; | |
698 | ||
699 | aggr->val += count.val; | |
700 | if (scale) { | |
701 | aggr->ena += count.ena; | |
702 | aggr->run += count.run; | |
703 | } | |
704 | } | |
705 | } | |
706 | ||
707 | evsel->counts->scaled = 0; | |
708 | if (scale) { | |
709 | if (aggr->run == 0) { | |
710 | evsel->counts->scaled = -1; | |
711 | aggr->val = 0; | |
712 | return 0; | |
713 | } | |
714 | ||
715 | if (aggr->run < aggr->ena) { | |
716 | evsel->counts->scaled = 1; | |
717 | aggr->val = (u64)((double)aggr->val * aggr->ena / aggr->run + 0.5); | |
718 | } | |
719 | } else | |
720 | aggr->ena = aggr->run = 0; | |
721 | ||
722 | return 0; | |
723 | } | |
48290609 | 724 | |
6a4bb04c JO |
725 | static int get_group_fd(struct perf_evsel *evsel, int cpu, int thread) |
726 | { | |
727 | struct perf_evsel *leader = evsel->leader; | |
728 | int fd; | |
729 | ||
823254ed | 730 | if (perf_evsel__is_group_leader(evsel)) |
6a4bb04c JO |
731 | return -1; |
732 | ||
733 | /* | |
734 | * Leader must be already processed/open, | |
735 | * if not it's a bug. | |
736 | */ | |
737 | BUG_ON(!leader->fd); | |
738 | ||
739 | fd = FD(leader, cpu, thread); | |
740 | BUG_ON(fd == -1); | |
741 | ||
742 | return fd; | |
743 | } | |
744 | ||
0252208e | 745 | static int __perf_evsel__open(struct perf_evsel *evsel, struct cpu_map *cpus, |
6a4bb04c | 746 | struct thread_map *threads) |
48290609 | 747 | { |
0252208e | 748 | int cpu, thread; |
023695d9 | 749 | unsigned long flags = 0; |
727ab04e | 750 | int pid = -1, err; |
48290609 | 751 | |
0252208e ACM |
752 | if (evsel->fd == NULL && |
753 | perf_evsel__alloc_fd(evsel, cpus->nr, threads->nr) < 0) | |
727ab04e | 754 | return -ENOMEM; |
4eed11d5 | 755 | |
023695d9 SE |
756 | if (evsel->cgrp) { |
757 | flags = PERF_FLAG_PID_CGROUP; | |
758 | pid = evsel->cgrp->fd; | |
759 | } | |
760 | ||
86bd5e86 | 761 | for (cpu = 0; cpu < cpus->nr; cpu++) { |
9d04f178 | 762 | |
0252208e | 763 | for (thread = 0; thread < threads->nr; thread++) { |
6a4bb04c | 764 | int group_fd; |
023695d9 SE |
765 | |
766 | if (!evsel->cgrp) | |
767 | pid = threads->map[thread]; | |
768 | ||
6a4bb04c JO |
769 | group_fd = get_group_fd(evsel, cpu, thread); |
770 | ||
0252208e | 771 | FD(evsel, cpu, thread) = sys_perf_event_open(&evsel->attr, |
023695d9 | 772 | pid, |
f08199d3 | 773 | cpus->map[cpu], |
023695d9 | 774 | group_fd, flags); |
727ab04e ACM |
775 | if (FD(evsel, cpu, thread) < 0) { |
776 | err = -errno; | |
0252208e | 777 | goto out_close; |
727ab04e | 778 | } |
0252208e | 779 | } |
48290609 ACM |
780 | } |
781 | ||
782 | return 0; | |
783 | ||
784 | out_close: | |
0252208e ACM |
785 | do { |
786 | while (--thread >= 0) { | |
787 | close(FD(evsel, cpu, thread)); | |
788 | FD(evsel, cpu, thread) = -1; | |
789 | } | |
790 | thread = threads->nr; | |
791 | } while (--cpu >= 0); | |
727ab04e ACM |
792 | return err; |
793 | } | |
794 | ||
795 | void perf_evsel__close(struct perf_evsel *evsel, int ncpus, int nthreads) | |
796 | { | |
797 | if (evsel->fd == NULL) | |
798 | return; | |
799 | ||
800 | perf_evsel__close_fd(evsel, ncpus, nthreads); | |
801 | perf_evsel__free_fd(evsel); | |
802 | evsel->fd = NULL; | |
48290609 ACM |
803 | } |
804 | ||
0252208e ACM |
805 | static struct { |
806 | struct cpu_map map; | |
807 | int cpus[1]; | |
808 | } empty_cpu_map = { | |
809 | .map.nr = 1, | |
810 | .cpus = { -1, }, | |
811 | }; | |
812 | ||
813 | static struct { | |
814 | struct thread_map map; | |
815 | int threads[1]; | |
816 | } empty_thread_map = { | |
817 | .map.nr = 1, | |
818 | .threads = { -1, }, | |
819 | }; | |
820 | ||
f08199d3 | 821 | int perf_evsel__open(struct perf_evsel *evsel, struct cpu_map *cpus, |
6a4bb04c | 822 | struct thread_map *threads) |
48290609 | 823 | { |
0252208e ACM |
824 | if (cpus == NULL) { |
825 | /* Work around old compiler warnings about strict aliasing */ | |
826 | cpus = &empty_cpu_map.map; | |
48290609 ACM |
827 | } |
828 | ||
0252208e ACM |
829 | if (threads == NULL) |
830 | threads = &empty_thread_map.map; | |
48290609 | 831 | |
6a4bb04c | 832 | return __perf_evsel__open(evsel, cpus, threads); |
48290609 ACM |
833 | } |
834 | ||
f08199d3 | 835 | int perf_evsel__open_per_cpu(struct perf_evsel *evsel, |
6a4bb04c | 836 | struct cpu_map *cpus) |
48290609 | 837 | { |
6a4bb04c | 838 | return __perf_evsel__open(evsel, cpus, &empty_thread_map.map); |
0252208e | 839 | } |
48290609 | 840 | |
f08199d3 | 841 | int perf_evsel__open_per_thread(struct perf_evsel *evsel, |
6a4bb04c | 842 | struct thread_map *threads) |
0252208e | 843 | { |
6a4bb04c | 844 | return __perf_evsel__open(evsel, &empty_cpu_map.map, threads); |
48290609 | 845 | } |
70082dd9 | 846 | |
0807d2d8 ACM |
847 | static int perf_evsel__parse_id_sample(const struct perf_evsel *evsel, |
848 | const union perf_event *event, | |
849 | struct perf_sample *sample) | |
d0dd74e8 | 850 | { |
0807d2d8 | 851 | u64 type = evsel->attr.sample_type; |
d0dd74e8 | 852 | const u64 *array = event->sample.array; |
0807d2d8 | 853 | bool swapped = evsel->needs_swap; |
37073f9e | 854 | union u64_swap u; |
d0dd74e8 ACM |
855 | |
856 | array += ((event->header.size - | |
857 | sizeof(event->header)) / sizeof(u64)) - 1; | |
858 | ||
859 | if (type & PERF_SAMPLE_CPU) { | |
37073f9e JO |
860 | u.val64 = *array; |
861 | if (swapped) { | |
862 | /* undo swap of u64, then swap on individual u32s */ | |
863 | u.val64 = bswap_64(u.val64); | |
864 | u.val32[0] = bswap_32(u.val32[0]); | |
865 | } | |
866 | ||
867 | sample->cpu = u.val32[0]; | |
d0dd74e8 ACM |
868 | array--; |
869 | } | |
870 | ||
871 | if (type & PERF_SAMPLE_STREAM_ID) { | |
872 | sample->stream_id = *array; | |
873 | array--; | |
874 | } | |
875 | ||
876 | if (type & PERF_SAMPLE_ID) { | |
877 | sample->id = *array; | |
878 | array--; | |
879 | } | |
880 | ||
881 | if (type & PERF_SAMPLE_TIME) { | |
882 | sample->time = *array; | |
883 | array--; | |
884 | } | |
885 | ||
886 | if (type & PERF_SAMPLE_TID) { | |
37073f9e JO |
887 | u.val64 = *array; |
888 | if (swapped) { | |
889 | /* undo swap of u64, then swap on individual u32s */ | |
890 | u.val64 = bswap_64(u.val64); | |
891 | u.val32[0] = bswap_32(u.val32[0]); | |
892 | u.val32[1] = bswap_32(u.val32[1]); | |
893 | } | |
894 | ||
895 | sample->pid = u.val32[0]; | |
896 | sample->tid = u.val32[1]; | |
d0dd74e8 ACM |
897 | } |
898 | ||
899 | return 0; | |
900 | } | |
901 | ||
98e1da90 FW |
902 | static bool sample_overlap(const union perf_event *event, |
903 | const void *offset, u64 size) | |
904 | { | |
905 | const void *base = event; | |
906 | ||
907 | if (offset + size > base + event->header.size) | |
908 | return true; | |
909 | ||
910 | return false; | |
911 | } | |
912 | ||
a3f698fe | 913 | int perf_evsel__parse_sample(struct perf_evsel *evsel, union perf_event *event, |
0807d2d8 | 914 | struct perf_sample *data) |
d0dd74e8 | 915 | { |
a3f698fe | 916 | u64 type = evsel->attr.sample_type; |
0f6a3015 | 917 | u64 regs_user = evsel->attr.sample_regs_user; |
0807d2d8 | 918 | bool swapped = evsel->needs_swap; |
d0dd74e8 ACM |
919 | const u64 *array; |
920 | ||
936be503 DA |
921 | /* |
922 | * used for cross-endian analysis. See git commit 65014ab3 | |
923 | * for why this goofiness is needed. | |
924 | */ | |
6a11f92e | 925 | union u64_swap u; |
936be503 | 926 | |
f3bda2c9 | 927 | memset(data, 0, sizeof(*data)); |
d0dd74e8 ACM |
928 | data->cpu = data->pid = data->tid = -1; |
929 | data->stream_id = data->id = data->time = -1ULL; | |
a4a03fc7 | 930 | data->period = 1; |
d0dd74e8 ACM |
931 | |
932 | if (event->header.type != PERF_RECORD_SAMPLE) { | |
a3f698fe | 933 | if (!evsel->attr.sample_id_all) |
d0dd74e8 | 934 | return 0; |
0807d2d8 | 935 | return perf_evsel__parse_id_sample(evsel, event, data); |
d0dd74e8 ACM |
936 | } |
937 | ||
938 | array = event->sample.array; | |
939 | ||
a3f698fe | 940 | if (evsel->sample_size + sizeof(event->header) > event->header.size) |
a2854124 FW |
941 | return -EFAULT; |
942 | ||
d0dd74e8 ACM |
943 | if (type & PERF_SAMPLE_IP) { |
944 | data->ip = event->ip.ip; | |
945 | array++; | |
946 | } | |
947 | ||
948 | if (type & PERF_SAMPLE_TID) { | |
936be503 DA |
949 | u.val64 = *array; |
950 | if (swapped) { | |
951 | /* undo swap of u64, then swap on individual u32s */ | |
952 | u.val64 = bswap_64(u.val64); | |
953 | u.val32[0] = bswap_32(u.val32[0]); | |
954 | u.val32[1] = bswap_32(u.val32[1]); | |
955 | } | |
956 | ||
957 | data->pid = u.val32[0]; | |
958 | data->tid = u.val32[1]; | |
d0dd74e8 ACM |
959 | array++; |
960 | } | |
961 | ||
962 | if (type & PERF_SAMPLE_TIME) { | |
963 | data->time = *array; | |
964 | array++; | |
965 | } | |
966 | ||
7cec0922 | 967 | data->addr = 0; |
d0dd74e8 ACM |
968 | if (type & PERF_SAMPLE_ADDR) { |
969 | data->addr = *array; | |
970 | array++; | |
971 | } | |
972 | ||
973 | data->id = -1ULL; | |
974 | if (type & PERF_SAMPLE_ID) { | |
975 | data->id = *array; | |
976 | array++; | |
977 | } | |
978 | ||
979 | if (type & PERF_SAMPLE_STREAM_ID) { | |
980 | data->stream_id = *array; | |
981 | array++; | |
982 | } | |
983 | ||
984 | if (type & PERF_SAMPLE_CPU) { | |
936be503 DA |
985 | |
986 | u.val64 = *array; | |
987 | if (swapped) { | |
988 | /* undo swap of u64, then swap on individual u32s */ | |
989 | u.val64 = bswap_64(u.val64); | |
990 | u.val32[0] = bswap_32(u.val32[0]); | |
991 | } | |
992 | ||
993 | data->cpu = u.val32[0]; | |
d0dd74e8 ACM |
994 | array++; |
995 | } | |
996 | ||
997 | if (type & PERF_SAMPLE_PERIOD) { | |
998 | data->period = *array; | |
999 | array++; | |
1000 | } | |
1001 | ||
1002 | if (type & PERF_SAMPLE_READ) { | |
f9d36996 | 1003 | fprintf(stderr, "PERF_SAMPLE_READ is unsupported for now\n"); |
d0dd74e8 ACM |
1004 | return -1; |
1005 | } | |
1006 | ||
1007 | if (type & PERF_SAMPLE_CALLCHAIN) { | |
98e1da90 FW |
1008 | if (sample_overlap(event, array, sizeof(data->callchain->nr))) |
1009 | return -EFAULT; | |
1010 | ||
d0dd74e8 | 1011 | data->callchain = (struct ip_callchain *)array; |
98e1da90 FW |
1012 | |
1013 | if (sample_overlap(event, array, data->callchain->nr)) | |
1014 | return -EFAULT; | |
1015 | ||
d0dd74e8 ACM |
1016 | array += 1 + data->callchain->nr; |
1017 | } | |
1018 | ||
1019 | if (type & PERF_SAMPLE_RAW) { | |
8e303f20 JO |
1020 | const u64 *pdata; |
1021 | ||
936be503 DA |
1022 | u.val64 = *array; |
1023 | if (WARN_ONCE(swapped, | |
1024 | "Endianness of raw data not corrected!\n")) { | |
1025 | /* undo swap of u64, then swap on individual u32s */ | |
1026 | u.val64 = bswap_64(u.val64); | |
1027 | u.val32[0] = bswap_32(u.val32[0]); | |
1028 | u.val32[1] = bswap_32(u.val32[1]); | |
1029 | } | |
98e1da90 FW |
1030 | |
1031 | if (sample_overlap(event, array, sizeof(u32))) | |
1032 | return -EFAULT; | |
1033 | ||
936be503 | 1034 | data->raw_size = u.val32[0]; |
8e303f20 | 1035 | pdata = (void *) array + sizeof(u32); |
98e1da90 | 1036 | |
8e303f20 | 1037 | if (sample_overlap(event, pdata, data->raw_size)) |
98e1da90 FW |
1038 | return -EFAULT; |
1039 | ||
8e303f20 | 1040 | data->raw_data = (void *) pdata; |
fa30c964 SE |
1041 | |
1042 | array = (void *)array + data->raw_size + sizeof(u32); | |
d0dd74e8 ACM |
1043 | } |
1044 | ||
b5387528 RAV |
1045 | if (type & PERF_SAMPLE_BRANCH_STACK) { |
1046 | u64 sz; | |
1047 | ||
1048 | data->branch_stack = (struct branch_stack *)array; | |
1049 | array++; /* nr */ | |
1050 | ||
1051 | sz = data->branch_stack->nr * sizeof(struct branch_entry); | |
1052 | sz /= sizeof(u64); | |
1053 | array += sz; | |
1054 | } | |
0f6a3015 JO |
1055 | |
1056 | if (type & PERF_SAMPLE_REGS_USER) { | |
1057 | /* First u64 tells us if we have any regs in sample. */ | |
1058 | u64 avail = *array++; | |
1059 | ||
1060 | if (avail) { | |
1061 | data->user_regs.regs = (u64 *)array; | |
1062 | array += hweight_long(regs_user); | |
1063 | } | |
1064 | } | |
1065 | ||
1066 | if (type & PERF_SAMPLE_STACK_USER) { | |
1067 | u64 size = *array++; | |
1068 | ||
1069 | data->user_stack.offset = ((char *)(array - 1) | |
1070 | - (char *) event); | |
1071 | ||
1072 | if (!size) { | |
1073 | data->user_stack.size = 0; | |
1074 | } else { | |
1075 | data->user_stack.data = (char *)array; | |
1076 | array += size / sizeof(*array); | |
1077 | data->user_stack.size = *array; | |
1078 | } | |
1079 | } | |
1080 | ||
d0dd74e8 ACM |
1081 | return 0; |
1082 | } | |
74eec26f AV |
1083 | |
1084 | int perf_event__synthesize_sample(union perf_event *event, u64 type, | |
1085 | const struct perf_sample *sample, | |
1086 | bool swapped) | |
1087 | { | |
1088 | u64 *array; | |
1089 | ||
1090 | /* | |
1091 | * used for cross-endian analysis. See git commit 65014ab3 | |
1092 | * for why this goofiness is needed. | |
1093 | */ | |
6a11f92e | 1094 | union u64_swap u; |
74eec26f AV |
1095 | |
1096 | array = event->sample.array; | |
1097 | ||
1098 | if (type & PERF_SAMPLE_IP) { | |
1099 | event->ip.ip = sample->ip; | |
1100 | array++; | |
1101 | } | |
1102 | ||
1103 | if (type & PERF_SAMPLE_TID) { | |
1104 | u.val32[0] = sample->pid; | |
1105 | u.val32[1] = sample->tid; | |
1106 | if (swapped) { | |
1107 | /* | |
a3f698fe | 1108 | * Inverse of what is done in perf_evsel__parse_sample |
74eec26f AV |
1109 | */ |
1110 | u.val32[0] = bswap_32(u.val32[0]); | |
1111 | u.val32[1] = bswap_32(u.val32[1]); | |
1112 | u.val64 = bswap_64(u.val64); | |
1113 | } | |
1114 | ||
1115 | *array = u.val64; | |
1116 | array++; | |
1117 | } | |
1118 | ||
1119 | if (type & PERF_SAMPLE_TIME) { | |
1120 | *array = sample->time; | |
1121 | array++; | |
1122 | } | |
1123 | ||
1124 | if (type & PERF_SAMPLE_ADDR) { | |
1125 | *array = sample->addr; | |
1126 | array++; | |
1127 | } | |
1128 | ||
1129 | if (type & PERF_SAMPLE_ID) { | |
1130 | *array = sample->id; | |
1131 | array++; | |
1132 | } | |
1133 | ||
1134 | if (type & PERF_SAMPLE_STREAM_ID) { | |
1135 | *array = sample->stream_id; | |
1136 | array++; | |
1137 | } | |
1138 | ||
1139 | if (type & PERF_SAMPLE_CPU) { | |
1140 | u.val32[0] = sample->cpu; | |
1141 | if (swapped) { | |
1142 | /* | |
a3f698fe | 1143 | * Inverse of what is done in perf_evsel__parse_sample |
74eec26f AV |
1144 | */ |
1145 | u.val32[0] = bswap_32(u.val32[0]); | |
1146 | u.val64 = bswap_64(u.val64); | |
1147 | } | |
1148 | *array = u.val64; | |
1149 | array++; | |
1150 | } | |
1151 | ||
1152 | if (type & PERF_SAMPLE_PERIOD) { | |
1153 | *array = sample->period; | |
1154 | array++; | |
1155 | } | |
1156 | ||
1157 | return 0; | |
1158 | } | |
5555ded4 | 1159 | |
efd2b924 ACM |
1160 | struct format_field *perf_evsel__field(struct perf_evsel *evsel, const char *name) |
1161 | { | |
1162 | return pevent_find_field(evsel->tp_format, name); | |
1163 | } | |
1164 | ||
5d2074ea | 1165 | void *perf_evsel__rawptr(struct perf_evsel *evsel, struct perf_sample *sample, |
5555ded4 ACM |
1166 | const char *name) |
1167 | { | |
efd2b924 | 1168 | struct format_field *field = perf_evsel__field(evsel, name); |
5555ded4 ACM |
1169 | int offset; |
1170 | ||
efd2b924 ACM |
1171 | if (!field) |
1172 | return NULL; | |
5555ded4 ACM |
1173 | |
1174 | offset = field->offset; | |
1175 | ||
1176 | if (field->flags & FIELD_IS_DYNAMIC) { | |
1177 | offset = *(int *)(sample->raw_data + field->offset); | |
1178 | offset &= 0xffff; | |
1179 | } | |
1180 | ||
1181 | return sample->raw_data + offset; | |
1182 | } | |
1183 | ||
1184 | u64 perf_evsel__intval(struct perf_evsel *evsel, struct perf_sample *sample, | |
1185 | const char *name) | |
1186 | { | |
efd2b924 | 1187 | struct format_field *field = perf_evsel__field(evsel, name); |
e6b6f679 ACM |
1188 | void *ptr; |
1189 | u64 value; | |
5555ded4 | 1190 | |
efd2b924 ACM |
1191 | if (!field) |
1192 | return 0; | |
5555ded4 | 1193 | |
e6b6f679 | 1194 | ptr = sample->raw_data + field->offset; |
5555ded4 | 1195 | |
e6b6f679 ACM |
1196 | switch (field->size) { |
1197 | case 1: | |
1198 | return *(u8 *)ptr; | |
1199 | case 2: | |
1200 | value = *(u16 *)ptr; | |
1201 | break; | |
1202 | case 4: | |
1203 | value = *(u32 *)ptr; | |
1204 | break; | |
1205 | case 8: | |
1206 | value = *(u64 *)ptr; | |
1207 | break; | |
1208 | default: | |
1209 | return 0; | |
1210 | } | |
1211 | ||
1212 | if (!evsel->needs_swap) | |
1213 | return value; | |
1214 | ||
1215 | switch (field->size) { | |
1216 | case 2: | |
1217 | return bswap_16(value); | |
1218 | case 4: | |
1219 | return bswap_32(value); | |
1220 | case 8: | |
1221 | return bswap_64(value); | |
1222 | default: | |
1223 | return 0; | |
1224 | } | |
1225 | ||
1226 | return 0; | |
5555ded4 | 1227 | } |