Commit | Line | Data |
---|---|---|
3de42dc0 XZ |
1 | /* |
2 | * irq_comm.c: Common API for in kernel interrupt controller | |
3 | * Copyright (c) 2007, Intel Corporation. | |
4 | * | |
5 | * This program is free software; you can redistribute it and/or modify it | |
6 | * under the terms and conditions of the GNU General Public License, | |
7 | * version 2, as published by the Free Software Foundation. | |
8 | * | |
9 | * This program is distributed in the hope it will be useful, but WITHOUT | |
10 | * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or | |
11 | * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for | |
12 | * more details. | |
13 | * | |
14 | * You should have received a copy of the GNU General Public License along with | |
15 | * this program; if not, write to the Free Software Foundation, Inc., 59 Temple | |
16 | * Place - Suite 330, Boston, MA 02111-1307 USA. | |
17 | * Authors: | |
18 | * Yaozu (Eddie) Dong <Eddie.dong@intel.com> | |
19 | * | |
20 | */ | |
21 | ||
22 | #include <linux/kvm_host.h> | |
229456fc | 23 | #include <trace/events/kvm.h> |
79950e10 | 24 | |
79950e10 | 25 | #include <asm/msidef.h> |
58c2dde1 GN |
26 | #ifdef CONFIG_IA64 |
27 | #include <asm/iosapic.h> | |
28 | #endif | |
79950e10 | 29 | |
3de42dc0 XZ |
30 | #include "irq.h" |
31 | ||
32 | #include "ioapic.h" | |
33 | ||
4925663a GN |
34 | static int kvm_set_pic_irq(struct kvm_kernel_irq_routing_entry *e, |
35 | struct kvm *kvm, int level) | |
399ec807 AK |
36 | { |
37 | #ifdef CONFIG_X86 | |
4925663a GN |
38 | return kvm_pic_set_irq(pic_irqchip(kvm), e->irqchip.pin, level); |
39 | #else | |
40 | return -1; | |
399ec807 AK |
41 | #endif |
42 | } | |
43 | ||
4925663a GN |
44 | static int kvm_set_ioapic_irq(struct kvm_kernel_irq_routing_entry *e, |
45 | struct kvm *kvm, int level) | |
399ec807 | 46 | { |
4925663a | 47 | return kvm_ioapic_set_irq(kvm->arch.vioapic, e->irqchip.pin, level); |
399ec807 AK |
48 | } |
49 | ||
58c2dde1 | 50 | inline static bool kvm_is_dm_lowest_prio(struct kvm_lapic_irq *irq) |
116191b6 | 51 | { |
58c2dde1 GN |
52 | #ifdef CONFIG_IA64 |
53 | return irq->delivery_mode == | |
54 | (IOSAPIC_LOWEST_PRIORITY << IOSAPIC_DELIVERY_SHIFT); | |
55 | #else | |
56 | return irq->delivery_mode == APIC_DM_LOWEST; | |
57 | #endif | |
58 | } | |
116191b6 | 59 | |
58c2dde1 GN |
60 | int kvm_irq_delivery_to_apic(struct kvm *kvm, struct kvm_lapic *src, |
61 | struct kvm_lapic_irq *irq) | |
62 | { | |
63 | int i, r = -1; | |
64 | struct kvm_vcpu *vcpu, *lowest = NULL; | |
65 | ||
fa40a821 MT |
66 | WARN_ON(!mutex_is_locked(&kvm->irq_lock)); |
67 | ||
58c2dde1 GN |
68 | if (irq->dest_mode == 0 && irq->dest_id == 0xff && |
69 | kvm_is_dm_lowest_prio(irq)) | |
343f94fe GN |
70 | printk(KERN_INFO "kvm: apic: phys broadcast and lowest prio\n"); |
71 | ||
988a2cae GN |
72 | kvm_for_each_vcpu(i, vcpu, kvm) { |
73 | if (!kvm_apic_present(vcpu)) | |
343f94fe GN |
74 | continue; |
75 | ||
58c2dde1 GN |
76 | if (!kvm_apic_match_dest(vcpu, src, irq->shorthand, |
77 | irq->dest_id, irq->dest_mode)) | |
343f94fe GN |
78 | continue; |
79 | ||
58c2dde1 GN |
80 | if (!kvm_is_dm_lowest_prio(irq)) { |
81 | if (r < 0) | |
82 | r = 0; | |
83 | r += kvm_apic_set_irq(vcpu, irq); | |
e1035715 | 84 | } else { |
58c2dde1 GN |
85 | if (!lowest) |
86 | lowest = vcpu; | |
87 | else if (kvm_apic_compare_prio(vcpu, lowest) < 0) | |
88 | lowest = vcpu; | |
e1035715 | 89 | } |
343f94fe GN |
90 | } |
91 | ||
58c2dde1 GN |
92 | if (lowest) |
93 | r = kvm_apic_set_irq(lowest, irq); | |
94 | ||
95 | return r; | |
116191b6 SY |
96 | } |
97 | ||
4925663a GN |
98 | static int kvm_set_msi(struct kvm_kernel_irq_routing_entry *e, |
99 | struct kvm *kvm, int level) | |
79950e10 | 100 | { |
58c2dde1 | 101 | struct kvm_lapic_irq irq; |
79950e10 | 102 | |
1000ff8d GN |
103 | trace_kvm_msi_set_irq(e->msi.address_lo, e->msi.data); |
104 | ||
58c2dde1 | 105 | irq.dest_id = (e->msi.address_lo & |
116191b6 | 106 | MSI_ADDR_DEST_ID_MASK) >> MSI_ADDR_DEST_ID_SHIFT; |
58c2dde1 | 107 | irq.vector = (e->msi.data & |
116191b6 | 108 | MSI_DATA_VECTOR_MASK) >> MSI_DATA_VECTOR_SHIFT; |
58c2dde1 GN |
109 | irq.dest_mode = (1 << MSI_ADDR_DEST_MODE_SHIFT) & e->msi.address_lo; |
110 | irq.trig_mode = (1 << MSI_DATA_TRIGGER_SHIFT) & e->msi.data; | |
111 | irq.delivery_mode = e->msi.data & 0x700; | |
112 | irq.level = 1; | |
113 | irq.shorthand = 0; | |
116191b6 SY |
114 | |
115 | /* TODO Deal with RH bit of MSI message address */ | |
58c2dde1 | 116 | return kvm_irq_delivery_to_apic(kvm, NULL, &irq); |
79950e10 SY |
117 | } |
118 | ||
fa40a821 | 119 | /* This should be called with the kvm->irq_lock mutex held |
4925663a GN |
120 | * Return value: |
121 | * < 0 Interrupt was ignored (masked or not delivered for other reasons) | |
122 | * = 0 Interrupt was coalesced (previous irq is still pending) | |
123 | * > 0 Number of CPUs interrupt was delivered to | |
124 | */ | |
125 | int kvm_set_irq(struct kvm *kvm, int irq_source_id, int irq, int level) | |
3de42dc0 | 126 | { |
399ec807 | 127 | struct kvm_kernel_irq_routing_entry *e; |
79950e10 | 128 | unsigned long *irq_state, sig_level; |
4925663a | 129 | int ret = -1; |
79950e10 | 130 | |
ae8c1c40 | 131 | trace_kvm_set_irq(irq, level, irq_source_id); |
229456fc | 132 | |
fa40a821 MT |
133 | WARN_ON(!mutex_is_locked(&kvm->irq_lock)); |
134 | ||
79950e10 SY |
135 | if (irq < KVM_IOAPIC_NUM_PINS) { |
136 | irq_state = (unsigned long *)&kvm->arch.irq_states[irq]; | |
5550af4d | 137 | |
79950e10 SY |
138 | /* Logical OR for level trig interrupt */ |
139 | if (level) | |
140 | set_bit(irq_source_id, irq_state); | |
141 | else | |
142 | clear_bit(irq_source_id, irq_state); | |
143 | sig_level = !!(*irq_state); | |
07fb8bb2 MT |
144 | } else if (!level) |
145 | return ret; | |
146 | else /* Deal with MSI/MSI-X */ | |
79950e10 | 147 | sig_level = 1; |
5550af4d | 148 | |
3de42dc0 XZ |
149 | /* Not possible to detect if the guest uses the PIC or the |
150 | * IOAPIC. So set the bit in both. The guest will ignore | |
151 | * writes to the unused one. | |
152 | */ | |
399ec807 | 153 | list_for_each_entry(e, &kvm->irq_routing, link) |
4925663a GN |
154 | if (e->gsi == irq) { |
155 | int r = e->set(e, kvm, sig_level); | |
156 | if (r < 0) | |
157 | continue; | |
158 | ||
159 | ret = r + ((ret < 0) ? 0 : ret); | |
160 | } | |
161 | return ret; | |
3de42dc0 XZ |
162 | } |
163 | ||
44882eed | 164 | void kvm_notify_acked_irq(struct kvm *kvm, unsigned irqchip, unsigned pin) |
3de42dc0 | 165 | { |
44882eed | 166 | struct kvm_kernel_irq_routing_entry *e; |
3de42dc0 XZ |
167 | struct kvm_irq_ack_notifier *kian; |
168 | struct hlist_node *n; | |
44882eed MT |
169 | unsigned gsi = pin; |
170 | ||
229456fc MT |
171 | trace_kvm_ack_irq(irqchip, pin); |
172 | ||
44882eed | 173 | list_for_each_entry(e, &kvm->irq_routing, link) |
5116d8f6 MT |
174 | if (e->type == KVM_IRQ_ROUTING_IRQCHIP && |
175 | e->irqchip.irqchip == irqchip && | |
44882eed MT |
176 | e->irqchip.pin == pin) { |
177 | gsi = e->gsi; | |
178 | break; | |
179 | } | |
3de42dc0 XZ |
180 | |
181 | hlist_for_each_entry(kian, n, &kvm->arch.irq_ack_notifier_list, link) | |
182 | if (kian->gsi == gsi) | |
183 | kian->irq_acked(kian); | |
184 | } | |
185 | ||
186 | void kvm_register_irq_ack_notifier(struct kvm *kvm, | |
187 | struct kvm_irq_ack_notifier *kian) | |
188 | { | |
fa40a821 | 189 | mutex_lock(&kvm->irq_lock); |
3de42dc0 | 190 | hlist_add_head(&kian->link, &kvm->arch.irq_ack_notifier_list); |
fa40a821 | 191 | mutex_unlock(&kvm->irq_lock); |
3de42dc0 XZ |
192 | } |
193 | ||
fa40a821 MT |
194 | void kvm_unregister_irq_ack_notifier(struct kvm *kvm, |
195 | struct kvm_irq_ack_notifier *kian) | |
3de42dc0 | 196 | { |
fa40a821 | 197 | mutex_lock(&kvm->irq_lock); |
fdd897e6 | 198 | hlist_del_init(&kian->link); |
fa40a821 | 199 | mutex_unlock(&kvm->irq_lock); |
3de42dc0 | 200 | } |
5550af4d | 201 | |
5550af4d SY |
202 | int kvm_request_irq_source_id(struct kvm *kvm) |
203 | { | |
204 | unsigned long *bitmap = &kvm->arch.irq_sources_bitmap; | |
fa40a821 MT |
205 | int irq_source_id; |
206 | ||
207 | mutex_lock(&kvm->irq_lock); | |
208 | irq_source_id = find_first_zero_bit(bitmap, | |
5550af4d | 209 | sizeof(kvm->arch.irq_sources_bitmap)); |
61552367 | 210 | |
5550af4d SY |
211 | if (irq_source_id >= sizeof(kvm->arch.irq_sources_bitmap)) { |
212 | printk(KERN_WARNING "kvm: exhaust allocatable IRQ sources!\n"); | |
61552367 MM |
213 | return -EFAULT; |
214 | } | |
215 | ||
216 | ASSERT(irq_source_id != KVM_USERSPACE_IRQ_SOURCE_ID); | |
217 | set_bit(irq_source_id, bitmap); | |
fa40a821 | 218 | mutex_unlock(&kvm->irq_lock); |
61552367 | 219 | |
5550af4d SY |
220 | return irq_source_id; |
221 | } | |
222 | ||
223 | void kvm_free_irq_source_id(struct kvm *kvm, int irq_source_id) | |
224 | { | |
225 | int i; | |
226 | ||
61552367 MM |
227 | ASSERT(irq_source_id != KVM_USERSPACE_IRQ_SOURCE_ID); |
228 | ||
fa40a821 | 229 | mutex_lock(&kvm->irq_lock); |
61552367 | 230 | if (irq_source_id < 0 || |
5550af4d SY |
231 | irq_source_id >= sizeof(kvm->arch.irq_sources_bitmap)) { |
232 | printk(KERN_ERR "kvm: IRQ source ID out of range!\n"); | |
233 | return; | |
234 | } | |
235 | for (i = 0; i < KVM_IOAPIC_NUM_PINS; i++) | |
236 | clear_bit(irq_source_id, &kvm->arch.irq_states[i]); | |
237 | clear_bit(irq_source_id, &kvm->arch.irq_sources_bitmap); | |
fa40a821 | 238 | mutex_unlock(&kvm->irq_lock); |
5550af4d | 239 | } |
75858a84 AK |
240 | |
241 | void kvm_register_irq_mask_notifier(struct kvm *kvm, int irq, | |
242 | struct kvm_irq_mask_notifier *kimn) | |
243 | { | |
fa40a821 | 244 | mutex_lock(&kvm->irq_lock); |
75858a84 AK |
245 | kimn->irq = irq; |
246 | hlist_add_head(&kimn->link, &kvm->mask_notifier_list); | |
fa40a821 | 247 | mutex_unlock(&kvm->irq_lock); |
75858a84 AK |
248 | } |
249 | ||
250 | void kvm_unregister_irq_mask_notifier(struct kvm *kvm, int irq, | |
251 | struct kvm_irq_mask_notifier *kimn) | |
252 | { | |
fa40a821 | 253 | mutex_lock(&kvm->irq_lock); |
75858a84 | 254 | hlist_del(&kimn->link); |
fa40a821 | 255 | mutex_unlock(&kvm->irq_lock); |
75858a84 AK |
256 | } |
257 | ||
258 | void kvm_fire_mask_notifiers(struct kvm *kvm, int irq, bool mask) | |
259 | { | |
260 | struct kvm_irq_mask_notifier *kimn; | |
261 | struct hlist_node *n; | |
262 | ||
fa40a821 MT |
263 | WARN_ON(!mutex_is_locked(&kvm->irq_lock)); |
264 | ||
75858a84 AK |
265 | hlist_for_each_entry(kimn, n, &kvm->mask_notifier_list, link) |
266 | if (kimn->irq == irq) | |
267 | kimn->func(kimn, mask); | |
268 | } | |
269 | ||
399ec807 AK |
270 | static void __kvm_free_irq_routing(struct list_head *irq_routing) |
271 | { | |
272 | struct kvm_kernel_irq_routing_entry *e, *n; | |
273 | ||
274 | list_for_each_entry_safe(e, n, irq_routing, link) | |
275 | kfree(e); | |
276 | } | |
277 | ||
278 | void kvm_free_irq_routing(struct kvm *kvm) | |
279 | { | |
fa40a821 | 280 | mutex_lock(&kvm->irq_lock); |
399ec807 | 281 | __kvm_free_irq_routing(&kvm->irq_routing); |
fa40a821 | 282 | mutex_unlock(&kvm->irq_lock); |
399ec807 AK |
283 | } |
284 | ||
cded19f3 HE |
285 | static int setup_routing_entry(struct kvm_kernel_irq_routing_entry *e, |
286 | const struct kvm_irq_routing_entry *ue) | |
399ec807 AK |
287 | { |
288 | int r = -EINVAL; | |
289 | int delta; | |
290 | ||
291 | e->gsi = ue->gsi; | |
5116d8f6 | 292 | e->type = ue->type; |
399ec807 AK |
293 | switch (ue->type) { |
294 | case KVM_IRQ_ROUTING_IRQCHIP: | |
295 | delta = 0; | |
296 | switch (ue->u.irqchip.irqchip) { | |
297 | case KVM_IRQCHIP_PIC_MASTER: | |
298 | e->set = kvm_set_pic_irq; | |
299 | break; | |
300 | case KVM_IRQCHIP_PIC_SLAVE: | |
4925663a | 301 | e->set = kvm_set_pic_irq; |
399ec807 AK |
302 | delta = 8; |
303 | break; | |
304 | case KVM_IRQCHIP_IOAPIC: | |
efbc100c | 305 | e->set = kvm_set_ioapic_irq; |
399ec807 AK |
306 | break; |
307 | default: | |
308 | goto out; | |
309 | } | |
310 | e->irqchip.irqchip = ue->u.irqchip.irqchip; | |
311 | e->irqchip.pin = ue->u.irqchip.pin + delta; | |
312 | break; | |
79950e10 SY |
313 | case KVM_IRQ_ROUTING_MSI: |
314 | e->set = kvm_set_msi; | |
315 | e->msi.address_lo = ue->u.msi.address_lo; | |
316 | e->msi.address_hi = ue->u.msi.address_hi; | |
317 | e->msi.data = ue->u.msi.data; | |
318 | break; | |
399ec807 AK |
319 | default: |
320 | goto out; | |
321 | } | |
322 | r = 0; | |
323 | out: | |
324 | return r; | |
325 | } | |
326 | ||
327 | ||
328 | int kvm_set_irq_routing(struct kvm *kvm, | |
329 | const struct kvm_irq_routing_entry *ue, | |
330 | unsigned nr, | |
331 | unsigned flags) | |
332 | { | |
333 | struct list_head irq_list = LIST_HEAD_INIT(irq_list); | |
334 | struct list_head tmp = LIST_HEAD_INIT(tmp); | |
335 | struct kvm_kernel_irq_routing_entry *e = NULL; | |
336 | unsigned i; | |
337 | int r; | |
338 | ||
339 | for (i = 0; i < nr; ++i) { | |
340 | r = -EINVAL; | |
341 | if (ue->gsi >= KVM_MAX_IRQ_ROUTES) | |
342 | goto out; | |
343 | if (ue->flags) | |
344 | goto out; | |
345 | r = -ENOMEM; | |
346 | e = kzalloc(sizeof(*e), GFP_KERNEL); | |
347 | if (!e) | |
348 | goto out; | |
349 | r = setup_routing_entry(e, ue); | |
350 | if (r) | |
351 | goto out; | |
352 | ++ue; | |
353 | list_add(&e->link, &irq_list); | |
354 | e = NULL; | |
355 | } | |
356 | ||
fa40a821 | 357 | mutex_lock(&kvm->irq_lock); |
399ec807 AK |
358 | list_splice(&kvm->irq_routing, &tmp); |
359 | INIT_LIST_HEAD(&kvm->irq_routing); | |
360 | list_splice(&irq_list, &kvm->irq_routing); | |
361 | INIT_LIST_HEAD(&irq_list); | |
362 | list_splice(&tmp, &irq_list); | |
fa40a821 | 363 | mutex_unlock(&kvm->irq_lock); |
399ec807 AK |
364 | |
365 | r = 0; | |
366 | ||
367 | out: | |
368 | kfree(e); | |
369 | __kvm_free_irq_routing(&irq_list); | |
370 | return r; | |
371 | } | |
372 | ||
373 | #define IOAPIC_ROUTING_ENTRY(irq) \ | |
374 | { .gsi = irq, .type = KVM_IRQ_ROUTING_IRQCHIP, \ | |
375 | .u.irqchip.irqchip = KVM_IRQCHIP_IOAPIC, .u.irqchip.pin = (irq) } | |
376 | #define ROUTING_ENTRY1(irq) IOAPIC_ROUTING_ENTRY(irq) | |
377 | ||
378 | #ifdef CONFIG_X86 | |
399ec807 AK |
379 | # define PIC_ROUTING_ENTRY(irq) \ |
380 | { .gsi = irq, .type = KVM_IRQ_ROUTING_IRQCHIP, \ | |
381 | .u.irqchip.irqchip = SELECT_PIC(irq), .u.irqchip.pin = (irq) % 8 } | |
382 | # define ROUTING_ENTRY2(irq) \ | |
383 | IOAPIC_ROUTING_ENTRY(irq), PIC_ROUTING_ENTRY(irq) | |
384 | #else | |
385 | # define ROUTING_ENTRY2(irq) \ | |
386 | IOAPIC_ROUTING_ENTRY(irq) | |
387 | #endif | |
388 | ||
389 | static const struct kvm_irq_routing_entry default_routing[] = { | |
390 | ROUTING_ENTRY2(0), ROUTING_ENTRY2(1), | |
391 | ROUTING_ENTRY2(2), ROUTING_ENTRY2(3), | |
392 | ROUTING_ENTRY2(4), ROUTING_ENTRY2(5), | |
393 | ROUTING_ENTRY2(6), ROUTING_ENTRY2(7), | |
394 | ROUTING_ENTRY2(8), ROUTING_ENTRY2(9), | |
395 | ROUTING_ENTRY2(10), ROUTING_ENTRY2(11), | |
396 | ROUTING_ENTRY2(12), ROUTING_ENTRY2(13), | |
397 | ROUTING_ENTRY2(14), ROUTING_ENTRY2(15), | |
398 | ROUTING_ENTRY1(16), ROUTING_ENTRY1(17), | |
399 | ROUTING_ENTRY1(18), ROUTING_ENTRY1(19), | |
400 | ROUTING_ENTRY1(20), ROUTING_ENTRY1(21), | |
401 | ROUTING_ENTRY1(22), ROUTING_ENTRY1(23), | |
402 | #ifdef CONFIG_IA64 | |
403 | ROUTING_ENTRY1(24), ROUTING_ENTRY1(25), | |
404 | ROUTING_ENTRY1(26), ROUTING_ENTRY1(27), | |
405 | ROUTING_ENTRY1(28), ROUTING_ENTRY1(29), | |
406 | ROUTING_ENTRY1(30), ROUTING_ENTRY1(31), | |
407 | ROUTING_ENTRY1(32), ROUTING_ENTRY1(33), | |
408 | ROUTING_ENTRY1(34), ROUTING_ENTRY1(35), | |
409 | ROUTING_ENTRY1(36), ROUTING_ENTRY1(37), | |
410 | ROUTING_ENTRY1(38), ROUTING_ENTRY1(39), | |
411 | ROUTING_ENTRY1(40), ROUTING_ENTRY1(41), | |
412 | ROUTING_ENTRY1(42), ROUTING_ENTRY1(43), | |
413 | ROUTING_ENTRY1(44), ROUTING_ENTRY1(45), | |
414 | ROUTING_ENTRY1(46), ROUTING_ENTRY1(47), | |
415 | #endif | |
416 | }; | |
417 | ||
418 | int kvm_setup_default_irq_routing(struct kvm *kvm) | |
419 | { | |
420 | return kvm_set_irq_routing(kvm, default_routing, | |
421 | ARRAY_SIZE(default_routing), 0); | |
422 | } |