[deliverable/linux.git] / virt / kvm / irq_comm.c

/*
 * irq_comm.c: Common API for in kernel interrupt controller
 * Copyright (c) 2007, Intel Corporation.
 *
 * This program is free software; you can redistribute it and/or modify it
 * under the terms and conditions of the GNU General Public License,
 * version 2, as published by the Free Software Foundation.
 *
 * This program is distributed in the hope it will be useful, but WITHOUT
 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
 * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
 * more details.
 *
 * You should have received a copy of the GNU General Public License along with
 * this program; if not, write to the Free Software Foundation, Inc., 59 Temple
 * Place - Suite 330, Boston, MA 02111-1307 USA.
 * Authors:
 *   Yaozu (Eddie) Dong <Eddie.dong@intel.com>
 *
 * Copyright 2010 Red Hat, Inc. and/or its affiliates.
 */

#include <linux/kvm_host.h>
#include <linux/slab.h>
#include <trace/events/kvm.h>

#include <asm/msidef.h>
#ifdef CONFIG_IA64
#include <asm/iosapic.h>
#endif

#include "irq.h"

#include "ioapic.h"

static inline int kvm_irq_line_state(unsigned long *irq_state,
				     int irq_source_id, int level)
{
	/* Logical OR for level trig interrupt */
	if (level)
		set_bit(irq_source_id, irq_state);
	else
		clear_bit(irq_source_id, irq_state);

	return !!(*irq_state);
}

static int kvm_set_pic_irq(struct kvm_kernel_irq_routing_entry *e,
			   struct kvm *kvm, int irq_source_id, int level)
{
#ifdef CONFIG_X86
	struct kvm_pic *pic = pic_irqchip(kvm);
	level = kvm_irq_line_state(&pic->irq_states[e->irqchip.pin],
				   irq_source_id, level);
	return kvm_pic_set_irq(pic, e->irqchip.pin, level);
#else
	return -1;
#endif
}

static int kvm_set_ioapic_irq(struct kvm_kernel_irq_routing_entry *e,
			      struct kvm *kvm, int irq_source_id, int level)
{
	struct kvm_ioapic *ioapic = kvm->arch.vioapic;
	level = kvm_irq_line_state(&ioapic->irq_states[e->irqchip.pin],
				   irq_source_id, level);

	return kvm_ioapic_set_irq(ioapic, e->irqchip.pin, level);
}

inline static bool kvm_is_dm_lowest_prio(struct kvm_lapic_irq *irq)
{
#ifdef CONFIG_IA64
	return irq->delivery_mode ==
		(IOSAPIC_LOWEST_PRIORITY << IOSAPIC_DELIVERY_SHIFT);
#else
	return irq->delivery_mode == APIC_DM_LOWEST;
#endif
}

int kvm_irq_delivery_to_apic(struct kvm *kvm, struct kvm_lapic *src,
		struct kvm_lapic_irq *irq)
{
	int i, r = -1;
	struct kvm_vcpu *vcpu, *lowest = NULL;

	if (irq->dest_mode == 0 && irq->dest_id == 0xff &&
			kvm_is_dm_lowest_prio(irq))
		printk(KERN_INFO "kvm: apic: phys broadcast and lowest prio\n");

	kvm_for_each_vcpu(i, vcpu, kvm) {
		if (!kvm_apic_present(vcpu))
			continue;

		if (!kvm_apic_match_dest(vcpu, src, irq->shorthand,
					irq->dest_id, irq->dest_mode))
			continue;

		if (!kvm_is_dm_lowest_prio(irq)) {
			if (r < 0)
				r = 0;
			r += kvm_apic_set_irq(vcpu, irq);
		} else if (kvm_lapic_enabled(vcpu)) {
			if (!lowest)
				lowest = vcpu;
			else if (kvm_apic_compare_prio(vcpu, lowest) < 0)
				lowest = vcpu;
		}
	}

	if (lowest)
		r = kvm_apic_set_irq(lowest, irq);

	return r;
}

int kvm_set_msi(struct kvm_kernel_irq_routing_entry *e,
		struct kvm *kvm, int irq_source_id, int level)
{
	struct kvm_lapic_irq irq;

	if (!level)
		return -1;

	trace_kvm_msi_set_irq(e->msi.address_lo, e->msi.data);

	irq.dest_id = (e->msi.address_lo &
			MSI_ADDR_DEST_ID_MASK) >> MSI_ADDR_DEST_ID_SHIFT;
	irq.vector = (e->msi.data &
			MSI_DATA_VECTOR_MASK) >> MSI_DATA_VECTOR_SHIFT;
	irq.dest_mode = (1 << MSI_ADDR_DEST_MODE_SHIFT) & e->msi.address_lo;
	irq.trig_mode = (1 << MSI_DATA_TRIGGER_SHIFT) & e->msi.data;
	irq.delivery_mode = e->msi.data & 0x700;
	irq.level = 1;
	irq.shorthand = 0;

	/* TODO Deal with RH bit of MSI message address */
	return kvm_irq_delivery_to_apic(kvm, NULL, &irq);
}

int kvm_send_userspace_msi(struct kvm *kvm, struct kvm_msi *msi)
{
	struct kvm_kernel_irq_routing_entry route;

	if (!irqchip_in_kernel(kvm) || msi->flags != 0)
		return -EINVAL;

	route.msi.address_lo = msi->address_lo;
	route.msi.address_hi = msi->address_hi;
	route.msi.data = msi->data;

	return kvm_set_msi(&route, kvm, KVM_USERSPACE_IRQ_SOURCE_ID, 1);
}

/*
 * Return value:
 *  < 0   Interrupt was ignored (masked or not delivered for other reasons)
 *  = 0   Interrupt was coalesced (previous irq is still pending)
 *  > 0   Number of CPUs interrupt was delivered to
 */
int kvm_set_irq(struct kvm *kvm, int irq_source_id, u32 irq, int level)
{
	struct kvm_kernel_irq_routing_entry *e, irq_set[KVM_NR_IRQCHIPS];
	int ret = -1, i = 0;
	struct kvm_irq_routing_table *irq_rt;
	struct hlist_node *n;

	trace_kvm_set_irq(irq, level, irq_source_id);

	/* Not possible to detect if the guest uses the PIC or the
	 * IOAPIC.  So set the bit in both. The guest will ignore
	 * writes to the unused one.
	 */
	rcu_read_lock();
	irq_rt = rcu_dereference(kvm->irq_routing);
	if (irq < irq_rt->nr_rt_entries)
		hlist_for_each_entry(e, n, &irq_rt->map[irq], link)
			irq_set[i++] = *e;
	rcu_read_unlock();

	while(i--) {
		int r;
		r = irq_set[i].set(&irq_set[i], kvm, irq_source_id, level);
		if (r < 0)
			continue;

		ret = r + ((ret < 0) ? 0 : ret);
	}

	return ret;
}

void kvm_notify_acked_irq(struct kvm *kvm, unsigned irqchip, unsigned pin)
{
	struct kvm_irq_ack_notifier *kian;
	struct hlist_node *n;
	int gsi;

	trace_kvm_ack_irq(irqchip, pin);

	rcu_read_lock();
	gsi = rcu_dereference(kvm->irq_routing)->chip[irqchip][pin];
	if (gsi != -1)
		hlist_for_each_entry_rcu(kian, n, &kvm->irq_ack_notifier_list,
					 link)
			if (kian->gsi == gsi)
				kian->irq_acked(kian);
	rcu_read_unlock();
}

void kvm_register_irq_ack_notifier(struct kvm *kvm,
				   struct kvm_irq_ack_notifier *kian)
{
	mutex_lock(&kvm->irq_lock);
	hlist_add_head_rcu(&kian->link, &kvm->irq_ack_notifier_list);
	mutex_unlock(&kvm->irq_lock);
}

void kvm_unregister_irq_ack_notifier(struct kvm *kvm,
				    struct kvm_irq_ack_notifier *kian)
{
	mutex_lock(&kvm->irq_lock);
	hlist_del_init_rcu(&kian->link);
	mutex_unlock(&kvm->irq_lock);
	synchronize_rcu();
}

int kvm_request_irq_source_id(struct kvm *kvm)
{
	unsigned long *bitmap = &kvm->arch.irq_sources_bitmap;
	int irq_source_id;

	mutex_lock(&kvm->irq_lock);
	irq_source_id = find_first_zero_bit(bitmap, BITS_PER_LONG);

	if (irq_source_id >= BITS_PER_LONG) {
		printk(KERN_WARNING "kvm: exhaust allocatable IRQ sources!\n");
		irq_source_id = -EFAULT;
		goto unlock;
	}

	ASSERT(irq_source_id != KVM_USERSPACE_IRQ_SOURCE_ID);
	set_bit(irq_source_id, bitmap);
unlock:
	mutex_unlock(&kvm->irq_lock);

	return irq_source_id;
}

void kvm_free_irq_source_id(struct kvm *kvm, int irq_source_id)
{
	int i;

	ASSERT(irq_source_id != KVM_USERSPACE_IRQ_SOURCE_ID);

	mutex_lock(&kvm->irq_lock);
	if (irq_source_id < 0 ||
	    irq_source_id >= BITS_PER_LONG) {
		printk(KERN_ERR "kvm: IRQ source ID out of range!\n");
		goto unlock;
	}
	clear_bit(irq_source_id, &kvm->arch.irq_sources_bitmap);
	if (!irqchip_in_kernel(kvm))
		goto unlock;

	for (i = 0; i < KVM_IOAPIC_NUM_PINS; i++) {
		clear_bit(irq_source_id, &kvm->arch.vioapic->irq_states[i]);
		if (i >= 16)
			continue;
#ifdef CONFIG_X86
		clear_bit(irq_source_id, &pic_irqchip(kvm)->irq_states[i]);
#endif
	}
unlock:
	mutex_unlock(&kvm->irq_lock);
}

void kvm_register_irq_mask_notifier(struct kvm *kvm, int irq,
				    struct kvm_irq_mask_notifier *kimn)
{
	mutex_lock(&kvm->irq_lock);
	kimn->irq = irq;
	hlist_add_head_rcu(&kimn->link, &kvm->mask_notifier_list);
	mutex_unlock(&kvm->irq_lock);
}

void kvm_unregister_irq_mask_notifier(struct kvm *kvm, int irq,
				      struct kvm_irq_mask_notifier *kimn)
{
	mutex_lock(&kvm->irq_lock);
	hlist_del_rcu(&kimn->link);
	mutex_unlock(&kvm->irq_lock);
	synchronize_rcu();
}

void kvm_fire_mask_notifiers(struct kvm *kvm, unsigned irqchip, unsigned pin,
			     bool mask)
{
	struct kvm_irq_mask_notifier *kimn;
	struct hlist_node *n;
	int gsi;

	rcu_read_lock();
	gsi = rcu_dereference(kvm->irq_routing)->chip[irqchip][pin];
	if (gsi != -1)
		hlist_for_each_entry_rcu(kimn, n, &kvm->mask_notifier_list, link)
			if (kimn->irq == gsi)
				kimn->func(kimn, mask);
	rcu_read_unlock();
}

void kvm_free_irq_routing(struct kvm *kvm)
{
	/* Called only during vm destruction. Nobody can use the pointer
	   at this stage */
	kfree(kvm->irq_routing);
}

static int setup_routing_entry(struct kvm_irq_routing_table *rt,
			       struct kvm_kernel_irq_routing_entry *e,
			       const struct kvm_irq_routing_entry *ue)
{
	int r = -EINVAL;
	int delta;
	unsigned max_pin;
	struct kvm_kernel_irq_routing_entry *ei;
	struct hlist_node *n;

	/*
	 * Do not allow GSI to be mapped to the same irqchip more than once.
	 * Allow only one to one mapping between GSI and MSI.
	 */
	hlist_for_each_entry(ei, n, &rt->map[ue->gsi], link)
		if (ei->type == KVM_IRQ_ROUTING_MSI ||
		    ue->type == KVM_IRQ_ROUTING_MSI ||
		    ue->u.irqchip.irqchip == ei->irqchip.irqchip)
			return r;

	e->gsi = ue->gsi;
	e->type = ue->type;
	switch (ue->type) {
	case KVM_IRQ_ROUTING_IRQCHIP:
		delta = 0;
		switch (ue->u.irqchip.irqchip) {
		case KVM_IRQCHIP_PIC_MASTER:
			e->set = kvm_set_pic_irq;
			max_pin = 16;
			break;
		case KVM_IRQCHIP_PIC_SLAVE:
			e->set = kvm_set_pic_irq;
			max_pin = 16;
			delta = 8;
			break;
		case KVM_IRQCHIP_IOAPIC:
			max_pin = KVM_IOAPIC_NUM_PINS;
			e->set = kvm_set_ioapic_irq;
			break;
		default:
			goto out;
		}
		e->irqchip.irqchip = ue->u.irqchip.irqchip;
		e->irqchip.pin = ue->u.irqchip.pin + delta;
		if (e->irqchip.pin >= max_pin)
			goto out;
		rt->chip[ue->u.irqchip.irqchip][e->irqchip.pin] = ue->gsi;
		break;
	case KVM_IRQ_ROUTING_MSI:
		e->set = kvm_set_msi;
		e->msi.address_lo = ue->u.msi.address_lo;
		e->msi.address_hi = ue->u.msi.address_hi;
		e->msi.data = ue->u.msi.data;
		break;
	default:
		goto out;
	}

	hlist_add_head(&e->link, &rt->map[e->gsi]);
	r = 0;
out:
	return r;
}


int kvm_set_irq_routing(struct kvm *kvm,
			const struct kvm_irq_routing_entry *ue,
			unsigned nr,
			unsigned flags)
{
	struct kvm_irq_routing_table *new, *old;
	u32 i, j, nr_rt_entries = 0;
	int r;

	for (i = 0; i < nr; ++i) {
		if (ue[i].gsi >= KVM_MAX_IRQ_ROUTES)
			return -EINVAL;
		nr_rt_entries = max(nr_rt_entries, ue[i].gsi);
	}

	nr_rt_entries += 1;

	new = kzalloc(sizeof(*new) + (nr_rt_entries * sizeof(struct hlist_head))
		      + (nr * sizeof(struct kvm_kernel_irq_routing_entry)),
		      GFP_KERNEL);

	if (!new)
		return -ENOMEM;

	new->rt_entries = (void *)&new->map[nr_rt_entries];

	new->nr_rt_entries = nr_rt_entries;
	for (i = 0; i < 3; i++)
		for (j = 0; j < KVM_IOAPIC_NUM_PINS; j++)
			new->chip[i][j] = -1;

	for (i = 0; i < nr; ++i) {
		r = -EINVAL;
		if (ue->flags)
			goto out;
		r = setup_routing_entry(new, &new->rt_entries[i], ue);
		if (r)
			goto out;
		++ue;
	}

	mutex_lock(&kvm->irq_lock);
	old = kvm->irq_routing;
	kvm_irq_routing_update(kvm, new);
	mutex_unlock(&kvm->irq_lock);

	synchronize_rcu();

	new = old;
	r = 0;

out:
	kfree(new);
	return r;
}

#define IOAPIC_ROUTING_ENTRY(irq) \
	{ .gsi = irq, .type = KVM_IRQ_ROUTING_IRQCHIP,	\
	  .u.irqchip.irqchip = KVM_IRQCHIP_IOAPIC, .u.irqchip.pin = (irq) }
#define ROUTING_ENTRY1(irq) IOAPIC_ROUTING_ENTRY(irq)

#ifdef CONFIG_X86
#  define PIC_ROUTING_ENTRY(irq) \
	{ .gsi = irq, .type = KVM_IRQ_ROUTING_IRQCHIP,	\
	  .u.irqchip.irqchip = SELECT_PIC(irq), .u.irqchip.pin = (irq) % 8 }
#  define ROUTING_ENTRY2(irq) \
	IOAPIC_ROUTING_ENTRY(irq), PIC_ROUTING_ENTRY(irq)
#else
#  define ROUTING_ENTRY2(irq) \
	IOAPIC_ROUTING_ENTRY(irq)
#endif

static const struct kvm_irq_routing_entry default_routing[] = {
	ROUTING_ENTRY2(0), ROUTING_ENTRY2(1),
	ROUTING_ENTRY2(2), ROUTING_ENTRY2(3),
	ROUTING_ENTRY2(4), ROUTING_ENTRY2(5),
	ROUTING_ENTRY2(6), ROUTING_ENTRY2(7),
	ROUTING_ENTRY2(8), ROUTING_ENTRY2(9),
	ROUTING_ENTRY2(10), ROUTING_ENTRY2(11),
	ROUTING_ENTRY2(12), ROUTING_ENTRY2(13),
	ROUTING_ENTRY2(14), ROUTING_ENTRY2(15),
	ROUTING_ENTRY1(16), ROUTING_ENTRY1(17),
	ROUTING_ENTRY1(18), ROUTING_ENTRY1(19),
	ROUTING_ENTRY1(20), ROUTING_ENTRY1(21),
	ROUTING_ENTRY1(22), ROUTING_ENTRY1(23),
#ifdef CONFIG_IA64
	ROUTING_ENTRY1(24), ROUTING_ENTRY1(25),
	ROUTING_ENTRY1(26), ROUTING_ENTRY1(27),
	ROUTING_ENTRY1(28), ROUTING_ENTRY1(29),
	ROUTING_ENTRY1(30), ROUTING_ENTRY1(31),
	ROUTING_ENTRY1(32), ROUTING_ENTRY1(33),
	ROUTING_ENTRY1(34), ROUTING_ENTRY1(35),
	ROUTING_ENTRY1(36), ROUTING_ENTRY1(37),
	ROUTING_ENTRY1(38), ROUTING_ENTRY1(39),
	ROUTING_ENTRY1(40), ROUTING_ENTRY1(41),
	ROUTING_ENTRY1(42), ROUTING_ENTRY1(43),
	ROUTING_ENTRY1(44), ROUTING_ENTRY1(45),
	ROUTING_ENTRY1(46), ROUTING_ENTRY1(47),
#endif
};

int kvm_setup_default_irq_routing(struct kvm *kvm)
{
	return kvm_set_irq_routing(kvm, default_routing,
				   ARRAY_SIZE(default_routing), 0);
}
Commit	Line	Data
3de42dc0 XZ	1	/*
	2	* irq_comm.c: Common API for in kernel interrupt controller
	3	* Copyright (c) 2007, Intel Corporation.
	4	*
	5	* This program is free software; you can redistribute it and/or modify it
	6	* under the terms and conditions of the GNU General Public License,
	7	* version 2, as published by the Free Software Foundation.
	8	*
	9	* This program is distributed in the hope it will be useful, but WITHOUT
	10	* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
	11	* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
	12	* more details.
	13	*
	14	* You should have received a copy of the GNU General Public License along with
	15	* this program; if not, write to the Free Software Foundation, Inc., 59 Temple
	16	* Place - Suite 330, Boston, MA 02111-1307 USA.
	17	* Authors:
	18	* Yaozu (Eddie) Dong <Eddie.dong@intel.com>
	19	*
9611c187	20	* Copyright 2010 Red Hat, Inc. and/or its affiliates.
3de42dc0 XZ	21	*/
	22
	23	#include <linux/kvm_host.h>
5a0e3ad6	24	#include <linux/slab.h>
229456fc	25	#include <trace/events/kvm.h>
79950e10	26
79950e10	27	#include <asm/msidef.h>
58c2dde1 GN	28	#ifdef CONFIG_IA64
	29	#include <asm/iosapic.h>
	30	#endif
79950e10	31
3de42dc0 XZ	32	#include "irq.h"
	33
	34	#include "ioapic.h"
	35
1a6e4a8c GN	36	static inline int kvm_irq_line_state(unsigned long *irq_state,
	37	int irq_source_id, int level)
	38	{
	39	/* Logical OR for level trig interrupt */
	40	if (level)
	41	set_bit(irq_source_id, irq_state);
	42	else
	43	clear_bit(irq_source_id, irq_state);
	44
	45	return !!(*irq_state);
	46	}
	47
4925663a	48	static int kvm_set_pic_irq(struct kvm_kernel_irq_routing_entry *e,
1a6e4a8c	49	struct kvm *kvm, int irq_source_id, int level)
399ec807 AK	50	{
399ec807 AK	51	#ifdef CONFIG_X86
1a6e4a8c GN	52	struct kvm_pic *pic = pic_irqchip(kvm);
	53	level = kvm_irq_line_state(&pic->irq_states[e->irqchip.pin],
	54	irq_source_id, level);
	55	return kvm_pic_set_irq(pic, e->irqchip.pin, level);
4925663a GN	56	#else
4925663a GN	57	return -1;
399ec807 AK	58	#endif
	59	}
	60
4925663a	61	static int kvm_set_ioapic_irq(struct kvm_kernel_irq_routing_entry *e,
1a6e4a8c	62	struct kvm *kvm, int irq_source_id, int level)
399ec807	63	{
1a6e4a8c GN	64	struct kvm_ioapic *ioapic = kvm->arch.vioapic;
	65	level = kvm_irq_line_state(&ioapic->irq_states[e->irqchip.pin],
	66	irq_source_id, level);
	67
	68	return kvm_ioapic_set_irq(ioapic, e->irqchip.pin, level);
399ec807 AK	69	}
399ec807 AK	70
58c2dde1	71	inline static bool kvm_is_dm_lowest_prio(struct kvm_lapic_irq *irq)
116191b6	72	{
58c2dde1 GN	73	#ifdef CONFIG_IA64
	74	return irq->delivery_mode ==
	75	(IOSAPIC_LOWEST_PRIORITY << IOSAPIC_DELIVERY_SHIFT);
	76	#else
	77	return irq->delivery_mode == APIC_DM_LOWEST;
	78	#endif
	79	}
116191b6	80
58c2dde1 GN	81	int kvm_irq_delivery_to_apic(struct kvm kvm, struct kvm_lapic src,
	82	struct kvm_lapic_irq *irq)
	83	{
	84	int i, r = -1;
	85	struct kvm_vcpu vcpu, lowest = NULL;
	86
	87	if (irq->dest_mode == 0 && irq->dest_id == 0xff &&
	88	kvm_is_dm_lowest_prio(irq))
343f94fe GN	89	printk(KERN_INFO "kvm: apic: phys broadcast and lowest prio\n");
343f94fe GN	90
988a2cae GN	91	kvm_for_each_vcpu(i, vcpu, kvm) {
988a2cae GN	92	if (!kvm_apic_present(vcpu))
343f94fe GN	93	continue;
343f94fe GN	94
58c2dde1 GN	95	if (!kvm_apic_match_dest(vcpu, src, irq->shorthand,
58c2dde1 GN	96	irq->dest_id, irq->dest_mode))
343f94fe GN	97	continue;
343f94fe GN	98
58c2dde1 GN	99	if (!kvm_is_dm_lowest_prio(irq)) {
	100	if (r < 0)
	101	r = 0;
	102	r += kvm_apic_set_irq(vcpu, irq);
aefd18f0	103	} else if (kvm_lapic_enabled(vcpu)) {
58c2dde1 GN	104	if (!lowest)
	105	lowest = vcpu;
	106	else if (kvm_apic_compare_prio(vcpu, lowest) < 0)
	107	lowest = vcpu;
e1035715	108	}
343f94fe GN	109	}
343f94fe GN	110
58c2dde1 GN	111	if (lowest)
	112	r = kvm_apic_set_irq(lowest, irq);
	113
	114	return r;
116191b6 SY	115	}
116191b6 SY	116
bd2b53b2 MT	117	int kvm_set_msi(struct kvm_kernel_irq_routing_entry *e,
bd2b53b2 MT	118	struct kvm *kvm, int irq_source_id, int level)
79950e10	119	{
58c2dde1	120	struct kvm_lapic_irq irq;
79950e10	121
1a6e4a8c GN	122	if (!level)
	123	return -1;
	124
1000ff8d GN	125	trace_kvm_msi_set_irq(e->msi.address_lo, e->msi.data);
1000ff8d GN	126
58c2dde1	127	irq.dest_id = (e->msi.address_lo &
116191b6	128	MSI_ADDR_DEST_ID_MASK) >> MSI_ADDR_DEST_ID_SHIFT;
58c2dde1	129	irq.vector = (e->msi.data &
116191b6	130	MSI_DATA_VECTOR_MASK) >> MSI_DATA_VECTOR_SHIFT;
58c2dde1 GN	131	irq.dest_mode = (1 << MSI_ADDR_DEST_MODE_SHIFT) & e->msi.address_lo;
	132	irq.trig_mode = (1 << MSI_DATA_TRIGGER_SHIFT) & e->msi.data;
	133	irq.delivery_mode = e->msi.data & 0x700;
	134	irq.level = 1;
	135	irq.shorthand = 0;
116191b6 SY	136
116191b6 SY	137	/* TODO Deal with RH bit of MSI message address */
58c2dde1	138	return kvm_irq_delivery_to_apic(kvm, NULL, &irq);
79950e10 SY	139	}
79950e10 SY	140
07975ad3 JK	141	int kvm_send_userspace_msi(struct kvm kvm, struct kvm_msi msi)
	142	{
	143	struct kvm_kernel_irq_routing_entry route;
	144
	145	if (!irqchip_in_kernel(kvm) \|\| msi->flags != 0)
	146	return -EINVAL;
	147
	148	route.msi.address_lo = msi->address_lo;
	149	route.msi.address_hi = msi->address_hi;
	150	route.msi.data = msi->data;
	151
	152	return kvm_set_msi(&route, kvm, KVM_USERSPACE_IRQ_SOURCE_ID, 1);
	153	}
	154
680b3648	155	/*
4925663a GN	156	* Return value:
	157	* < 0 Interrupt was ignored (masked or not delivered for other reasons)
	158	* = 0 Interrupt was coalesced (previous irq is still pending)
	159	* > 0 Number of CPUs interrupt was delivered to
	160	*/
46e624b9	161	int kvm_set_irq(struct kvm *kvm, int irq_source_id, u32 irq, int level)
3de42dc0	162	{
eba0226b GN	163	struct kvm_kernel_irq_routing_entry *e, irq_set[KVM_NR_IRQCHIPS];
eba0226b GN	164	int ret = -1, i = 0;
46e624b9 GN	165	struct kvm_irq_routing_table *irq_rt;
46e624b9 GN	166	struct hlist_node *n;
79950e10	167
ae8c1c40	168	trace_kvm_set_irq(irq, level, irq_source_id);
229456fc	169
3de42dc0 XZ	170	/* Not possible to detect if the guest uses the PIC or the
	171	* IOAPIC. So set the bit in both. The guest will ignore
	172	* writes to the unused one.
	173	*/
e42bba90 GN	174	rcu_read_lock();
e42bba90 GN	175	irq_rt = rcu_dereference(kvm->irq_routing);
46e624b9	176	if (irq < irq_rt->nr_rt_entries)
eba0226b GN	177	hlist_for_each_entry(e, n, &irq_rt->map[irq], link)
eba0226b GN	178	irq_set[i++] = *e;
e42bba90	179	rcu_read_unlock();
eba0226b GN	180
	181	while(i--) {
	182	int r;
	183	r = irq_set[i].set(&irq_set[i], kvm, irq_source_id, level);
	184	if (r < 0)
	185	continue;
	186
	187	ret = r + ((ret < 0) ? 0 : ret);
	188	}
	189
4925663a	190	return ret;
3de42dc0 XZ	191	}
3de42dc0 XZ	192
44882eed	193	void kvm_notify_acked_irq(struct kvm *kvm, unsigned irqchip, unsigned pin)
3de42dc0 XZ	194	{
	195	struct kvm_irq_ack_notifier *kian;
	196	struct hlist_node *n;
3e71f88b	197	int gsi;
44882eed	198
229456fc MT	199	trace_kvm_ack_irq(irqchip, pin);
229456fc MT	200
e42bba90 GN	201	rcu_read_lock();
e42bba90 GN	202	gsi = rcu_dereference(kvm->irq_routing)->chip[irqchip][pin];
3e71f88b	203	if (gsi != -1)
280aa177 GN	204	hlist_for_each_entry_rcu(kian, n, &kvm->irq_ack_notifier_list,
280aa177 GN	205	link)
3e71f88b GN	206	if (kian->gsi == gsi)
3e71f88b GN	207	kian->irq_acked(kian);
280aa177	208	rcu_read_unlock();
3de42dc0 XZ	209	}
	210
	211	void kvm_register_irq_ack_notifier(struct kvm *kvm,
	212	struct kvm_irq_ack_notifier *kian)
	213	{
fa40a821	214	mutex_lock(&kvm->irq_lock);
280aa177	215	hlist_add_head_rcu(&kian->link, &kvm->irq_ack_notifier_list);
fa40a821	216	mutex_unlock(&kvm->irq_lock);
3de42dc0 XZ	217	}
3de42dc0 XZ	218
fa40a821 MT	219	void kvm_unregister_irq_ack_notifier(struct kvm *kvm,
fa40a821 MT	220	struct kvm_irq_ack_notifier *kian)
3de42dc0	221	{
fa40a821	222	mutex_lock(&kvm->irq_lock);
280aa177	223	hlist_del_init_rcu(&kian->link);
fa40a821	224	mutex_unlock(&kvm->irq_lock);
280aa177	225	synchronize_rcu();
3de42dc0	226	}
5550af4d	227
5550af4d SY	228	int kvm_request_irq_source_id(struct kvm *kvm)
	229	{
	230	unsigned long *bitmap = &kvm->arch.irq_sources_bitmap;
fa40a821 MT	231	int irq_source_id;
	232
	233	mutex_lock(&kvm->irq_lock);
cd5a2685	234	irq_source_id = find_first_zero_bit(bitmap, BITS_PER_LONG);
61552367	235
cd5a2685	236	if (irq_source_id >= BITS_PER_LONG) {
5550af4d	237	printk(KERN_WARNING "kvm: exhaust allocatable IRQ sources!\n");
0c6ddceb JS	238	irq_source_id = -EFAULT;
0c6ddceb JS	239	goto unlock;
61552367 MM	240	}
	241
	242	ASSERT(irq_source_id != KVM_USERSPACE_IRQ_SOURCE_ID);
	243	set_bit(irq_source_id, bitmap);
0c6ddceb	244	unlock:
fa40a821	245	mutex_unlock(&kvm->irq_lock);
61552367	246
5550af4d SY	247	return irq_source_id;
	248	}
	249
	250	void kvm_free_irq_source_id(struct kvm *kvm, int irq_source_id)
	251	{
	252	int i;
	253
61552367 MM	254	ASSERT(irq_source_id != KVM_USERSPACE_IRQ_SOURCE_ID);
61552367 MM	255
fa40a821	256	mutex_lock(&kvm->irq_lock);
61552367	257	if (irq_source_id < 0 \|\|
cd5a2685	258	irq_source_id >= BITS_PER_LONG) {
5550af4d	259	printk(KERN_ERR "kvm: IRQ source ID out of range!\n");
0c6ddceb	260	goto unlock;
5550af4d	261	}
e50212bb MT	262	clear_bit(irq_source_id, &kvm->arch.irq_sources_bitmap);
	263	if (!irqchip_in_kernel(kvm))
	264	goto unlock;
	265
1a6e4a8c GN	266	for (i = 0; i < KVM_IOAPIC_NUM_PINS; i++) {
	267	clear_bit(irq_source_id, &kvm->arch.vioapic->irq_states[i]);
	268	if (i >= 16)
	269	continue;
	270	#ifdef CONFIG_X86
	271	clear_bit(irq_source_id, &pic_irqchip(kvm)->irq_states[i]);
	272	#endif
	273	}
0c6ddceb	274	unlock:
fa40a821	275	mutex_unlock(&kvm->irq_lock);
5550af4d	276	}
75858a84 AK	277
	278	void kvm_register_irq_mask_notifier(struct kvm *kvm, int irq,
	279	struct kvm_irq_mask_notifier *kimn)
	280	{
fa40a821	281	mutex_lock(&kvm->irq_lock);
75858a84	282	kimn->irq = irq;
280aa177	283	hlist_add_head_rcu(&kimn->link, &kvm->mask_notifier_list);
fa40a821	284	mutex_unlock(&kvm->irq_lock);
75858a84 AK	285	}
	286
	287	void kvm_unregister_irq_mask_notifier(struct kvm *kvm, int irq,
	288	struct kvm_irq_mask_notifier *kimn)
	289	{
fa40a821	290	mutex_lock(&kvm->irq_lock);
280aa177	291	hlist_del_rcu(&kimn->link);
fa40a821	292	mutex_unlock(&kvm->irq_lock);
280aa177	293	synchronize_rcu();
75858a84 AK	294	}
75858a84 AK	295
4a994358 GN	296	void kvm_fire_mask_notifiers(struct kvm *kvm, unsigned irqchip, unsigned pin,
4a994358 GN	297	bool mask)
75858a84 AK	298	{
	299	struct kvm_irq_mask_notifier *kimn;
	300	struct hlist_node *n;
4a994358	301	int gsi;
75858a84	302
280aa177	303	rcu_read_lock();
4a994358 GN	304	gsi = rcu_dereference(kvm->irq_routing)->chip[irqchip][pin];
	305	if (gsi != -1)
	306	hlist_for_each_entry_rcu(kimn, n, &kvm->mask_notifier_list, link)
	307	if (kimn->irq == gsi)
	308	kimn->func(kimn, mask);
280aa177	309	rcu_read_unlock();
75858a84 AK	310	}
75858a84 AK	311
399ec807 AK	312	void kvm_free_irq_routing(struct kvm *kvm)
399ec807 AK	313	{
e42bba90 GN	314	/* Called only during vm destruction. Nobody can use the pointer
e42bba90 GN	315	at this stage */
46e624b9	316	kfree(kvm->irq_routing);
399ec807 AK	317	}
399ec807 AK	318
46e624b9 GN	319	static int setup_routing_entry(struct kvm_irq_routing_table *rt,
46e624b9 GN	320	struct kvm_kernel_irq_routing_entry *e,
cded19f3	321	const struct kvm_irq_routing_entry *ue)
399ec807 AK	322	{
	323	int r = -EINVAL;
	324	int delta;
d72118ce	325	unsigned max_pin;
46e624b9 GN	326	struct kvm_kernel_irq_routing_entry *ei;
	327	struct hlist_node *n;
	328
	329	/*
	330	* Do not allow GSI to be mapped to the same irqchip more than once.
	331	* Allow only one to one mapping between GSI and MSI.
	332	*/
	333	hlist_for_each_entry(ei, n, &rt->map[ue->gsi], link)
	334	if (ei->type == KVM_IRQ_ROUTING_MSI \|\|
f2ebd422	335	ue->type == KVM_IRQ_ROUTING_MSI \|\|
46e624b9 GN	336	ue->u.irqchip.irqchip == ei->irqchip.irqchip)
46e624b9 GN	337	return r;
399ec807 AK	338
399ec807 AK	339	e->gsi = ue->gsi;
5116d8f6	340	e->type = ue->type;
399ec807 AK	341	switch (ue->type) {
	342	case KVM_IRQ_ROUTING_IRQCHIP:
	343	delta = 0;
	344	switch (ue->u.irqchip.irqchip) {
	345	case KVM_IRQCHIP_PIC_MASTER:
	346	e->set = kvm_set_pic_irq;
d72118ce	347	max_pin = 16;
399ec807 AK	348	break;
399ec807 AK	349	case KVM_IRQCHIP_PIC_SLAVE:
4925663a	350	e->set = kvm_set_pic_irq;
d72118ce	351	max_pin = 16;
399ec807 AK	352	delta = 8;
	353	break;
	354	case KVM_IRQCHIP_IOAPIC:
d72118ce	355	max_pin = KVM_IOAPIC_NUM_PINS;
efbc100c	356	e->set = kvm_set_ioapic_irq;
399ec807 AK	357	break;
	358	default:
	359	goto out;
	360	}
	361	e->irqchip.irqchip = ue->u.irqchip.irqchip;
	362	e->irqchip.pin = ue->u.irqchip.pin + delta;
d72118ce	363	if (e->irqchip.pin >= max_pin)
3e71f88b GN	364	goto out;
3e71f88b GN	365	rt->chip[ue->u.irqchip.irqchip][e->irqchip.pin] = ue->gsi;
399ec807	366	break;
79950e10 SY	367	case KVM_IRQ_ROUTING_MSI:
	368	e->set = kvm_set_msi;
	369	e->msi.address_lo = ue->u.msi.address_lo;
	370	e->msi.address_hi = ue->u.msi.address_hi;
	371	e->msi.data = ue->u.msi.data;
	372	break;
399ec807 AK	373	default:
	374	goto out;
	375	}
46e624b9 GN	376
46e624b9 GN	377	hlist_add_head(&e->link, &rt->map[e->gsi]);
399ec807 AK	378	r = 0;
	379	out:
	380	return r;
	381	}
	382
	383
	384	int kvm_set_irq_routing(struct kvm *kvm,
	385	const struct kvm_irq_routing_entry *ue,
	386	unsigned nr,
	387	unsigned flags)
	388	{
46e624b9	389	struct kvm_irq_routing_table new, old;
3e71f88b	390	u32 i, j, nr_rt_entries = 0;
399ec807 AK	391	int r;
399ec807 AK	392
46e624b9 GN	393	for (i = 0; i < nr; ++i) {
	394	if (ue[i].gsi >= KVM_MAX_IRQ_ROUTES)
	395	return -EINVAL;
	396	nr_rt_entries = max(nr_rt_entries, ue[i].gsi);
	397	}
	398
	399	nr_rt_entries += 1;
	400
	401	new = kzalloc(sizeof(new) + (nr_rt_entries sizeof(struct hlist_head))
	402	+ (nr * sizeof(struct kvm_kernel_irq_routing_entry)),
	403	GFP_KERNEL);
	404
	405	if (!new)
	406	return -ENOMEM;
	407
	408	new->rt_entries = (void *)&new->map[nr_rt_entries];
	409
	410	new->nr_rt_entries = nr_rt_entries;
3e71f88b GN	411	for (i = 0; i < 3; i++)
	412	for (j = 0; j < KVM_IOAPIC_NUM_PINS; j++)
	413	new->chip[i][j] = -1;
46e624b9	414
399ec807 AK	415	for (i = 0; i < nr; ++i) {
399ec807 AK	416	r = -EINVAL;
399ec807 AK	417	if (ue->flags)
399ec807 AK	418	goto out;
46e624b9	419	r = setup_routing_entry(new, &new->rt_entries[i], ue);
399ec807 AK	420	if (r)
	421	goto out;
	422	++ue;
399ec807 AK	423	}
399ec807 AK	424
fa40a821	425	mutex_lock(&kvm->irq_lock);
46e624b9	426	old = kvm->irq_routing;
bd2b53b2	427	kvm_irq_routing_update(kvm, new);
fa40a821	428	mutex_unlock(&kvm->irq_lock);
bd2b53b2	429
e42bba90	430	synchronize_rcu();
399ec807	431
46e624b9	432	new = old;
399ec807 AK	433	r = 0;
	434
	435	out:
46e624b9	436	kfree(new);
399ec807 AK	437	return r;
	438	}
	439
	440	#define IOAPIC_ROUTING_ENTRY(irq) \
	441	{ .gsi = irq, .type = KVM_IRQ_ROUTING_IRQCHIP, \
	442	.u.irqchip.irqchip = KVM_IRQCHIP_IOAPIC, .u.irqchip.pin = (irq) }
	443	#define ROUTING_ENTRY1(irq) IOAPIC_ROUTING_ENTRY(irq)
	444
	445	#ifdef CONFIG_X86
399ec807 AK	446	# define PIC_ROUTING_ENTRY(irq) \
	447	{ .gsi = irq, .type = KVM_IRQ_ROUTING_IRQCHIP, \
	448	.u.irqchip.irqchip = SELECT_PIC(irq), .u.irqchip.pin = (irq) % 8 }
	449	# define ROUTING_ENTRY2(irq) \
	450	IOAPIC_ROUTING_ENTRY(irq), PIC_ROUTING_ENTRY(irq)
	451	#else
	452	# define ROUTING_ENTRY2(irq) \
	453	IOAPIC_ROUTING_ENTRY(irq)
	454	#endif
	455
	456	static const struct kvm_irq_routing_entry default_routing[] = {
	457	ROUTING_ENTRY2(0), ROUTING_ENTRY2(1),
	458	ROUTING_ENTRY2(2), ROUTING_ENTRY2(3),
	459	ROUTING_ENTRY2(4), ROUTING_ENTRY2(5),
	460	ROUTING_ENTRY2(6), ROUTING_ENTRY2(7),
	461	ROUTING_ENTRY2(8), ROUTING_ENTRY2(9),
	462	ROUTING_ENTRY2(10), ROUTING_ENTRY2(11),
	463	ROUTING_ENTRY2(12), ROUTING_ENTRY2(13),
	464	ROUTING_ENTRY2(14), ROUTING_ENTRY2(15),
	465	ROUTING_ENTRY1(16), ROUTING_ENTRY1(17),
	466	ROUTING_ENTRY1(18), ROUTING_ENTRY1(19),
	467	ROUTING_ENTRY1(20), ROUTING_ENTRY1(21),
	468	ROUTING_ENTRY1(22), ROUTING_ENTRY1(23),
	469	#ifdef CONFIG_IA64
	470	ROUTING_ENTRY1(24), ROUTING_ENTRY1(25),
	471	ROUTING_ENTRY1(26), ROUTING_ENTRY1(27),
	472	ROUTING_ENTRY1(28), ROUTING_ENTRY1(29),
	473	ROUTING_ENTRY1(30), ROUTING_ENTRY1(31),
	474	ROUTING_ENTRY1(32), ROUTING_ENTRY1(33),
	475	ROUTING_ENTRY1(34), ROUTING_ENTRY1(35),
	476	ROUTING_ENTRY1(36), ROUTING_ENTRY1(37),
	477	ROUTING_ENTRY1(38), ROUTING_ENTRY1(39),
	478	ROUTING_ENTRY1(40), ROUTING_ENTRY1(41),
	479	ROUTING_ENTRY1(42), ROUTING_ENTRY1(43),
	480	ROUTING_ENTRY1(44), ROUTING_ENTRY1(45),
	481	ROUTING_ENTRY1(46), ROUTING_ENTRY1(47),
	482	#endif
	483	};
	484
	485	int kvm_setup_default_irq_routing(struct kvm *kvm)
	486	{
	487	return kvm_set_irq_routing(kvm, default_routing,
	488	ARRAY_SIZE(default_routing), 0);
	489	}