[deliverable/linux.git] / virt / kvm / irq_comm.c

/*
 * irq_comm.c: Common API for in kernel interrupt controller
 * Copyright (c) 2007, Intel Corporation.
 *
 * This program is free software; you can redistribute it and/or modify it
 * under the terms and conditions of the GNU General Public License,
 * version 2, as published by the Free Software Foundation.
 *
 * This program is distributed in the hope it will be useful, but WITHOUT
 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
 * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
 * more details.
 *
 * You should have received a copy of the GNU General Public License along with
 * this program; if not, write to the Free Software Foundation, Inc., 59 Temple
 * Place - Suite 330, Boston, MA 02111-1307 USA.
 * Authors:
 *   Yaozu (Eddie) Dong <Eddie.dong@intel.com>
 *
 */

#include <linux/kvm_host.h>

#include <asm/msidef.h>

#include "irq.h"

#include "ioapic.h"

static int kvm_set_pic_irq(struct kvm_kernel_irq_routing_entry *e,
			   struct kvm *kvm, int level)
{
#ifdef CONFIG_X86
	return kvm_pic_set_irq(pic_irqchip(kvm), e->irqchip.pin, level);
#else
	return -1;
#endif
}

static int kvm_set_ioapic_irq(struct kvm_kernel_irq_routing_entry *e,
			      struct kvm *kvm, int level)
{
	return kvm_ioapic_set_irq(kvm->arch.vioapic, e->irqchip.pin, level);
}

void kvm_get_intr_delivery_bitmask(struct kvm *kvm,
				   union kvm_ioapic_redirect_entry *entry,
				   unsigned long *deliver_bitmask)
{
	int i;
	struct kvm_vcpu *vcpu;

	bitmap_zero(deliver_bitmask, KVM_MAX_VCPUS);

	if (entry->fields.dest_mode == 0) {	/* Physical mode. */
		if (entry->fields.dest_id == 0xFF) {	/* Broadcast. */
			for (i = 0; i < KVM_MAX_VCPUS; ++i)
				if (kvm->vcpus[i] && kvm->vcpus[i]->arch.apic)
					__set_bit(i, deliver_bitmask);
			/* Lowest priority shouldn't combine with broadcast */
			if (entry->fields.delivery_mode ==
			    IOAPIC_LOWEST_PRIORITY && printk_ratelimit())
				printk(KERN_INFO "kvm: apic: phys broadcast "
						  "and lowest prio\n");
			return;
		}
		for (i = 0; i < KVM_MAX_VCPUS; ++i) {
			vcpu = kvm->vcpus[i];
			if (!vcpu)
				continue;
			if (kvm_apic_match_physical_addr(vcpu->arch.apic,
					entry->fields.dest_id)) {
				if (vcpu->arch.apic)
					__set_bit(i, deliver_bitmask);
				break;
			}
		}
	} else if (entry->fields.dest_id != 0) /* Logical mode, MDA non-zero. */
		for (i = 0; i < KVM_MAX_VCPUS; ++i) {
			vcpu = kvm->vcpus[i];
			if (!vcpu)
				continue;
			if (vcpu->arch.apic &&
			    kvm_apic_match_logical_addr(vcpu->arch.apic,
					entry->fields.dest_id))
				__set_bit(i, deliver_bitmask);
		}

	switch (entry->fields.delivery_mode) {
	case IOAPIC_LOWEST_PRIORITY:
		/* Select one in deliver_bitmask */
		vcpu = kvm_get_lowest_prio_vcpu(kvm,
				entry->fields.vector, deliver_bitmask);
		bitmap_zero(deliver_bitmask, KVM_MAX_VCPUS);
		if (!vcpu)
			return;
		__set_bit(vcpu->vcpu_id, deliver_bitmask);
		break;
	case IOAPIC_FIXED:
	case IOAPIC_NMI:
		break;
	default:
		if (printk_ratelimit())
			printk(KERN_INFO "kvm: unsupported delivery mode %d\n",
				entry->fields.delivery_mode);
		bitmap_zero(deliver_bitmask, KVM_MAX_VCPUS);
	}
}

static int kvm_set_msi(struct kvm_kernel_irq_routing_entry *e,
		       struct kvm *kvm, int level)
{
	union kvm_ioapic_redirect_entry entry;

	entry.bits = 0;
	entry.fields.dest_id = (e->msi.address_lo &
			MSI_ADDR_DEST_ID_MASK) >> MSI_ADDR_DEST_ID_SHIFT;
	entry.fields.vector = (e->msi.data &
			MSI_DATA_VECTOR_MASK) >> MSI_DATA_VECTOR_SHIFT;
	entry.fields.dest_mode = test_bit(MSI_ADDR_DEST_MODE_SHIFT,
			(unsigned long *)&e->msi.address_lo);
	entry.fields.trig_mode = test_bit(MSI_DATA_TRIGGER_SHIFT,
			(unsigned long *)&e->msi.data);
	entry.fields.delivery_mode = test_bit(
			MSI_DATA_DELIVERY_MODE_SHIFT,
			(unsigned long *)&e->msi.data);

	/* TODO Deal with RH bit of MSI message address */
	return ioapic_deliver_entry(kvm, &entry);
}

/* This should be called with the kvm->lock mutex held
 * Return value:
 *  < 0   Interrupt was ignored (masked or not delivered for other reasons)
 *  = 0   Interrupt was coalesced (previous irq is still pending)
 *  > 0   Number of CPUs interrupt was delivered to
 */
int kvm_set_irq(struct kvm *kvm, int irq_source_id, int irq, int level)
{
	struct kvm_kernel_irq_routing_entry *e;
	unsigned long *irq_state, sig_level;
	int ret = -1;

	if (irq < KVM_IOAPIC_NUM_PINS) {
		irq_state = (unsigned long *)&kvm->arch.irq_states[irq];

		/* Logical OR for level trig interrupt */
		if (level)
			set_bit(irq_source_id, irq_state);
		else
			clear_bit(irq_source_id, irq_state);
		sig_level = !!(*irq_state);
	} else /* Deal with MSI/MSI-X */
		sig_level = 1;

	/* Not possible to detect if the guest uses the PIC or the
	 * IOAPIC.  So set the bit in both. The guest will ignore
	 * writes to the unused one.
	 */
	list_for_each_entry(e, &kvm->irq_routing, link)
		if (e->gsi == irq) {
			int r = e->set(e, kvm, sig_level);
			if (r < 0)
				continue;

			ret = r + ((ret < 0) ? 0 : ret);
		}
	return ret;
}

void kvm_notify_acked_irq(struct kvm *kvm, unsigned irqchip, unsigned pin)
{
	struct kvm_kernel_irq_routing_entry *e;
	struct kvm_irq_ack_notifier *kian;
	struct hlist_node *n;
	unsigned gsi = pin;

	list_for_each_entry(e, &kvm->irq_routing, link)
		if (e->irqchip.irqchip == irqchip &&
		    e->irqchip.pin == pin) {
			gsi = e->gsi;
			break;
		}

	hlist_for_each_entry(kian, n, &kvm->arch.irq_ack_notifier_list, link)
		if (kian->gsi == gsi)
			kian->irq_acked(kian);
}

void kvm_register_irq_ack_notifier(struct kvm *kvm,
				   struct kvm_irq_ack_notifier *kian)
{
	hlist_add_head(&kian->link, &kvm->arch.irq_ack_notifier_list);
}

void kvm_unregister_irq_ack_notifier(struct kvm_irq_ack_notifier *kian)
{
	hlist_del_init(&kian->link);
}

/* The caller must hold kvm->lock mutex */
int kvm_request_irq_source_id(struct kvm *kvm)
{
	unsigned long *bitmap = &kvm->arch.irq_sources_bitmap;
	int irq_source_id = find_first_zero_bit(bitmap,
				sizeof(kvm->arch.irq_sources_bitmap));

	if (irq_source_id >= sizeof(kvm->arch.irq_sources_bitmap)) {
		printk(KERN_WARNING "kvm: exhaust allocatable IRQ sources!\n");
		return -EFAULT;
	}

	ASSERT(irq_source_id != KVM_USERSPACE_IRQ_SOURCE_ID);
	set_bit(irq_source_id, bitmap);

	return irq_source_id;
}

void kvm_free_irq_source_id(struct kvm *kvm, int irq_source_id)
{
	int i;

	ASSERT(irq_source_id != KVM_USERSPACE_IRQ_SOURCE_ID);

	if (irq_source_id < 0 ||
	    irq_source_id >= sizeof(kvm->arch.irq_sources_bitmap)) {
		printk(KERN_ERR "kvm: IRQ source ID out of range!\n");
		return;
	}
	for (i = 0; i < KVM_IOAPIC_NUM_PINS; i++)
		clear_bit(irq_source_id, &kvm->arch.irq_states[i]);
	clear_bit(irq_source_id, &kvm->arch.irq_sources_bitmap);
}

void kvm_register_irq_mask_notifier(struct kvm *kvm, int irq,
				    struct kvm_irq_mask_notifier *kimn)
{
	kimn->irq = irq;
	hlist_add_head(&kimn->link, &kvm->mask_notifier_list);
}

void kvm_unregister_irq_mask_notifier(struct kvm *kvm, int irq,
				      struct kvm_irq_mask_notifier *kimn)
{
	hlist_del(&kimn->link);
}

void kvm_fire_mask_notifiers(struct kvm *kvm, int irq, bool mask)
{
	struct kvm_irq_mask_notifier *kimn;
	struct hlist_node *n;

	hlist_for_each_entry(kimn, n, &kvm->mask_notifier_list, link)
		if (kimn->irq == irq)
			kimn->func(kimn, mask);
}

static void __kvm_free_irq_routing(struct list_head *irq_routing)
{
	struct kvm_kernel_irq_routing_entry *e, *n;

	list_for_each_entry_safe(e, n, irq_routing, link)
		kfree(e);
}

void kvm_free_irq_routing(struct kvm *kvm)
{
	__kvm_free_irq_routing(&kvm->irq_routing);
}

static int setup_routing_entry(struct kvm_kernel_irq_routing_entry *e,
			       const struct kvm_irq_routing_entry *ue)
{
	int r = -EINVAL;
	int delta;

	e->gsi = ue->gsi;
	switch (ue->type) {
	case KVM_IRQ_ROUTING_IRQCHIP:
		delta = 0;
		switch (ue->u.irqchip.irqchip) {
		case KVM_IRQCHIP_PIC_MASTER:
			e->set = kvm_set_pic_irq;
			break;
		case KVM_IRQCHIP_PIC_SLAVE:
			e->set = kvm_set_pic_irq;
			delta = 8;
			break;
		case KVM_IRQCHIP_IOAPIC:
				e->set = kvm_set_ioapic_irq;
			break;
		default:
			goto out;
		}
		e->irqchip.irqchip = ue->u.irqchip.irqchip;
		e->irqchip.pin = ue->u.irqchip.pin + delta;
		break;
	case KVM_IRQ_ROUTING_MSI:
		e->set = kvm_set_msi;
		e->msi.address_lo = ue->u.msi.address_lo;
		e->msi.address_hi = ue->u.msi.address_hi;
		e->msi.data = ue->u.msi.data;
		break;
	default:
		goto out;
	}
	r = 0;
out:
	return r;
}


int kvm_set_irq_routing(struct kvm *kvm,
			const struct kvm_irq_routing_entry *ue,
			unsigned nr,
			unsigned flags)
{
	struct list_head irq_list = LIST_HEAD_INIT(irq_list);
	struct list_head tmp = LIST_HEAD_INIT(tmp);
	struct kvm_kernel_irq_routing_entry *e = NULL;
	unsigned i;
	int r;

	for (i = 0; i < nr; ++i) {
		r = -EINVAL;
		if (ue->gsi >= KVM_MAX_IRQ_ROUTES)
			goto out;
		if (ue->flags)
			goto out;
		r = -ENOMEM;
		e = kzalloc(sizeof(*e), GFP_KERNEL);
		if (!e)
			goto out;
		r = setup_routing_entry(e, ue);
		if (r)
			goto out;
		++ue;
		list_add(&e->link, &irq_list);
		e = NULL;
	}

	mutex_lock(&kvm->lock);
	list_splice(&kvm->irq_routing, &tmp);
	INIT_LIST_HEAD(&kvm->irq_routing);
	list_splice(&irq_list, &kvm->irq_routing);
	INIT_LIST_HEAD(&irq_list);
	list_splice(&tmp, &irq_list);
	mutex_unlock(&kvm->lock);

	r = 0;

out:
	kfree(e);
	__kvm_free_irq_routing(&irq_list);
	return r;
}

#define IOAPIC_ROUTING_ENTRY(irq) \
	{ .gsi = irq, .type = KVM_IRQ_ROUTING_IRQCHIP,	\
	  .u.irqchip.irqchip = KVM_IRQCHIP_IOAPIC, .u.irqchip.pin = (irq) }
#define ROUTING_ENTRY1(irq) IOAPIC_ROUTING_ENTRY(irq)

#ifdef CONFIG_X86
#  define PIC_ROUTING_ENTRY(irq) \
	{ .gsi = irq, .type = KVM_IRQ_ROUTING_IRQCHIP,	\
	  .u.irqchip.irqchip = SELECT_PIC(irq), .u.irqchip.pin = (irq) % 8 }
#  define ROUTING_ENTRY2(irq) \
	IOAPIC_ROUTING_ENTRY(irq), PIC_ROUTING_ENTRY(irq)
#else
#  define ROUTING_ENTRY2(irq) \
	IOAPIC_ROUTING_ENTRY(irq)
#endif

static const struct kvm_irq_routing_entry default_routing[] = {
	ROUTING_ENTRY2(0), ROUTING_ENTRY2(1),
	ROUTING_ENTRY2(2), ROUTING_ENTRY2(3),
	ROUTING_ENTRY2(4), ROUTING_ENTRY2(5),
	ROUTING_ENTRY2(6), ROUTING_ENTRY2(7),
	ROUTING_ENTRY2(8), ROUTING_ENTRY2(9),
	ROUTING_ENTRY2(10), ROUTING_ENTRY2(11),
	ROUTING_ENTRY2(12), ROUTING_ENTRY2(13),
	ROUTING_ENTRY2(14), ROUTING_ENTRY2(15),
	ROUTING_ENTRY1(16), ROUTING_ENTRY1(17),
	ROUTING_ENTRY1(18), ROUTING_ENTRY1(19),
	ROUTING_ENTRY1(20), ROUTING_ENTRY1(21),
	ROUTING_ENTRY1(22), ROUTING_ENTRY1(23),
#ifdef CONFIG_IA64
	ROUTING_ENTRY1(24), ROUTING_ENTRY1(25),
	ROUTING_ENTRY1(26), ROUTING_ENTRY1(27),
	ROUTING_ENTRY1(28), ROUTING_ENTRY1(29),
	ROUTING_ENTRY1(30), ROUTING_ENTRY1(31),
	ROUTING_ENTRY1(32), ROUTING_ENTRY1(33),
	ROUTING_ENTRY1(34), ROUTING_ENTRY1(35),
	ROUTING_ENTRY1(36), ROUTING_ENTRY1(37),
	ROUTING_ENTRY1(38), ROUTING_ENTRY1(39),
	ROUTING_ENTRY1(40), ROUTING_ENTRY1(41),
	ROUTING_ENTRY1(42), ROUTING_ENTRY1(43),
	ROUTING_ENTRY1(44), ROUTING_ENTRY1(45),
	ROUTING_ENTRY1(46), ROUTING_ENTRY1(47),
#endif
};

int kvm_setup_default_irq_routing(struct kvm *kvm)
{
	return kvm_set_irq_routing(kvm, default_routing,
				   ARRAY_SIZE(default_routing), 0);
}
Commit	Line	Data
3de42dc0 XZ	1	/*
	2	* irq_comm.c: Common API for in kernel interrupt controller
	3	* Copyright (c) 2007, Intel Corporation.
	4	*
	5	* This program is free software; you can redistribute it and/or modify it
	6	* under the terms and conditions of the GNU General Public License,
	7	* version 2, as published by the Free Software Foundation.
	8	*
	9	* This program is distributed in the hope it will be useful, but WITHOUT
	10	* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
	11	* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
	12	* more details.
	13	*
	14	* You should have received a copy of the GNU General Public License along with
	15	* this program; if not, write to the Free Software Foundation, Inc., 59 Temple
	16	* Place - Suite 330, Boston, MA 02111-1307 USA.
	17	* Authors:
	18	* Yaozu (Eddie) Dong <Eddie.dong@intel.com>
	19	*
	20	*/
	21
	22	#include <linux/kvm_host.h>
79950e10	23
79950e10	24	#include <asm/msidef.h>
79950e10	25
3de42dc0 XZ	26	#include "irq.h"
	27
	28	#include "ioapic.h"
	29
4925663a GN	30	static int kvm_set_pic_irq(struct kvm_kernel_irq_routing_entry *e,
4925663a GN	31	struct kvm *kvm, int level)
399ec807 AK	32	{
399ec807 AK	33	#ifdef CONFIG_X86
4925663a GN	34	return kvm_pic_set_irq(pic_irqchip(kvm), e->irqchip.pin, level);
	35	#else
	36	return -1;
399ec807 AK	37	#endif
	38	}
	39
4925663a GN	40	static int kvm_set_ioapic_irq(struct kvm_kernel_irq_routing_entry *e,
4925663a GN	41	struct kvm *kvm, int level)
399ec807	42	{
4925663a	43	return kvm_ioapic_set_irq(kvm->arch.vioapic, e->irqchip.pin, level);
399ec807 AK	44	}
399ec807 AK	45
a53c17d2	46	void kvm_get_intr_delivery_bitmask(struct kvm *kvm,
116191b6 SY	47	union kvm_ioapic_redirect_entry *entry,
	48	unsigned long *deliver_bitmask)
	49	{
74a3a8f1	50	int i;
116191b6 SY	51	struct kvm_vcpu *vcpu;
116191b6 SY	52
74a3a8f1 SY	53	bitmap_zero(deliver_bitmask, KVM_MAX_VCPUS);
	54
	55	if (entry->fields.dest_mode == 0) { /* Physical mode. */
	56	if (entry->fields.dest_id == 0xFF) { /* Broadcast. */
	57	for (i = 0; i < KVM_MAX_VCPUS; ++i)
	58	if (kvm->vcpus[i] && kvm->vcpus[i]->arch.apic)
	59	__set_bit(i, deliver_bitmask);
	60	/* Lowest priority shouldn't combine with broadcast */
	61	if (entry->fields.delivery_mode ==
	62	IOAPIC_LOWEST_PRIORITY && printk_ratelimit())
	63	printk(KERN_INFO "kvm: apic: phys broadcast "
	64	"and lowest prio\n");
	65	return;
	66	}
	67	for (i = 0; i < KVM_MAX_VCPUS; ++i) {
	68	vcpu = kvm->vcpus[i];
	69	if (!vcpu)
	70	continue;
	71	if (kvm_apic_match_physical_addr(vcpu->arch.apic,
	72	entry->fields.dest_id)) {
	73	if (vcpu->arch.apic)
	74	__set_bit(i, deliver_bitmask);
	75	break;
	76	}
	77	}
	78	} else if (entry->fields.dest_id != 0) /* Logical mode, MDA non-zero. */
	79	for (i = 0; i < KVM_MAX_VCPUS; ++i) {
	80	vcpu = kvm->vcpus[i];
	81	if (!vcpu)
	82	continue;
	83	if (vcpu->arch.apic &&
	84	kvm_apic_match_logical_addr(vcpu->arch.apic,
	85	entry->fields.dest_id))
	86	__set_bit(i, deliver_bitmask);
	87	}
	88
116191b6 SY	89	switch (entry->fields.delivery_mode) {
116191b6 SY	90	case IOAPIC_LOWEST_PRIORITY:
74a3a8f1	91	/* Select one in deliver_bitmask */
a53c17d2	92	vcpu = kvm_get_lowest_prio_vcpu(kvm,
110c2fae	93	entry->fields.vector, deliver_bitmask);
74a3a8f1 SY	94	bitmap_zero(deliver_bitmask, KVM_MAX_VCPUS);
	95	if (!vcpu)
	96	return;
bfd349d0	97	__set_bit(vcpu->vcpu_id, deliver_bitmask);
116191b6 SY	98	break;
	99	case IOAPIC_FIXED:
	100	case IOAPIC_NMI:
	101	break;
	102	default:
	103	if (printk_ratelimit())
	104	printk(KERN_INFO "kvm: unsupported delivery mode %d\n",
	105	entry->fields.delivery_mode);
74a3a8f1	106	bitmap_zero(deliver_bitmask, KVM_MAX_VCPUS);
116191b6 SY	107	}
	108	}
	109
4925663a GN	110	static int kvm_set_msi(struct kvm_kernel_irq_routing_entry *e,
4925663a GN	111	struct kvm *kvm, int level)
79950e10	112	{
116191b6	113	union kvm_ioapic_redirect_entry entry;
79950e10	114
116191b6 SY	115	entry.bits = 0;
	116	entry.fields.dest_id = (e->msi.address_lo &
	117	MSI_ADDR_DEST_ID_MASK) >> MSI_ADDR_DEST_ID_SHIFT;
	118	entry.fields.vector = (e->msi.data &
	119	MSI_DATA_VECTOR_MASK) >> MSI_DATA_VECTOR_SHIFT;
	120	entry.fields.dest_mode = test_bit(MSI_ADDR_DEST_MODE_SHIFT,
	121	(unsigned long *)&e->msi.address_lo);
	122	entry.fields.trig_mode = test_bit(MSI_DATA_TRIGGER_SHIFT,
	123	(unsigned long *)&e->msi.data);
	124	entry.fields.delivery_mode = test_bit(
	125	MSI_DATA_DELIVERY_MODE_SHIFT,
	126	(unsigned long *)&e->msi.data);
	127
	128	/* TODO Deal with RH bit of MSI message address */
a53c17d2	129	return ioapic_deliver_entry(kvm, &entry);
79950e10 SY	130	}
79950e10 SY	131
4925663a GN	132	/* This should be called with the kvm->lock mutex held
	133	* Return value:
	134	* < 0 Interrupt was ignored (masked or not delivered for other reasons)
	135	* = 0 Interrupt was coalesced (previous irq is still pending)
	136	* > 0 Number of CPUs interrupt was delivered to
	137	*/
	138	int kvm_set_irq(struct kvm *kvm, int irq_source_id, int irq, int level)
3de42dc0	139	{
399ec807	140	struct kvm_kernel_irq_routing_entry *e;
79950e10	141	unsigned long *irq_state, sig_level;
4925663a	142	int ret = -1;
79950e10 SY	143
	144	if (irq < KVM_IOAPIC_NUM_PINS) {
	145	irq_state = (unsigned long *)&kvm->arch.irq_states[irq];
5550af4d	146
79950e10 SY	147	/* Logical OR for level trig interrupt */
	148	if (level)
	149	set_bit(irq_source_id, irq_state);
	150	else
	151	clear_bit(irq_source_id, irq_state);
	152	sig_level = !!(*irq_state);
	153	} else /* Deal with MSI/MSI-X */
	154	sig_level = 1;
5550af4d	155
3de42dc0 XZ	156	/* Not possible to detect if the guest uses the PIC or the
	157	* IOAPIC. So set the bit in both. The guest will ignore
	158	* writes to the unused one.
	159	*/
399ec807	160	list_for_each_entry(e, &kvm->irq_routing, link)
4925663a GN	161	if (e->gsi == irq) {
	162	int r = e->set(e, kvm, sig_level);
	163	if (r < 0)
	164	continue;
	165
	166	ret = r + ((ret < 0) ? 0 : ret);
	167	}
	168	return ret;
3de42dc0 XZ	169	}
3de42dc0 XZ	170
44882eed	171	void kvm_notify_acked_irq(struct kvm *kvm, unsigned irqchip, unsigned pin)
3de42dc0	172	{
44882eed	173	struct kvm_kernel_irq_routing_entry *e;
3de42dc0 XZ	174	struct kvm_irq_ack_notifier *kian;
3de42dc0 XZ	175	struct hlist_node *n;
44882eed MT	176	unsigned gsi = pin;
	177
	178	list_for_each_entry(e, &kvm->irq_routing, link)
	179	if (e->irqchip.irqchip == irqchip &&
	180	e->irqchip.pin == pin) {
	181	gsi = e->gsi;
	182	break;
	183	}
3de42dc0 XZ	184
	185	hlist_for_each_entry(kian, n, &kvm->arch.irq_ack_notifier_list, link)
	186	if (kian->gsi == gsi)
	187	kian->irq_acked(kian);
	188	}
	189
	190	void kvm_register_irq_ack_notifier(struct kvm *kvm,
	191	struct kvm_irq_ack_notifier *kian)
	192	{
	193	hlist_add_head(&kian->link, &kvm->arch.irq_ack_notifier_list);
	194	}
	195
e19e30ef	196	void kvm_unregister_irq_ack_notifier(struct kvm_irq_ack_notifier *kian)
3de42dc0	197	{
fdd897e6	198	hlist_del_init(&kian->link);
3de42dc0	199	}
5550af4d SY	200
	201	/* The caller must hold kvm->lock mutex */
	202	int kvm_request_irq_source_id(struct kvm *kvm)
	203	{
	204	unsigned long *bitmap = &kvm->arch.irq_sources_bitmap;
	205	int irq_source_id = find_first_zero_bit(bitmap,
	206	sizeof(kvm->arch.irq_sources_bitmap));
61552367	207
5550af4d SY	208	if (irq_source_id >= sizeof(kvm->arch.irq_sources_bitmap)) {
5550af4d SY	209	printk(KERN_WARNING "kvm: exhaust allocatable IRQ sources!\n");
61552367 MM	210	return -EFAULT;
	211	}
	212
	213	ASSERT(irq_source_id != KVM_USERSPACE_IRQ_SOURCE_ID);
	214	set_bit(irq_source_id, bitmap);
	215
5550af4d SY	216	return irq_source_id;
	217	}
	218
	219	void kvm_free_irq_source_id(struct kvm *kvm, int irq_source_id)
	220	{
	221	int i;
	222
61552367 MM	223	ASSERT(irq_source_id != KVM_USERSPACE_IRQ_SOURCE_ID);
	224
	225	if (irq_source_id < 0 \|\|
5550af4d SY	226	irq_source_id >= sizeof(kvm->arch.irq_sources_bitmap)) {
	227	printk(KERN_ERR "kvm: IRQ source ID out of range!\n");
	228	return;
	229	}
	230	for (i = 0; i < KVM_IOAPIC_NUM_PINS; i++)
	231	clear_bit(irq_source_id, &kvm->arch.irq_states[i]);
	232	clear_bit(irq_source_id, &kvm->arch.irq_sources_bitmap);
	233	}
75858a84 AK	234
	235	void kvm_register_irq_mask_notifier(struct kvm *kvm, int irq,
	236	struct kvm_irq_mask_notifier *kimn)
	237	{
	238	kimn->irq = irq;
	239	hlist_add_head(&kimn->link, &kvm->mask_notifier_list);
	240	}
	241
	242	void kvm_unregister_irq_mask_notifier(struct kvm *kvm, int irq,
	243	struct kvm_irq_mask_notifier *kimn)
	244	{
	245	hlist_del(&kimn->link);
	246	}
	247
	248	void kvm_fire_mask_notifiers(struct kvm *kvm, int irq, bool mask)
	249	{
	250	struct kvm_irq_mask_notifier *kimn;
	251	struct hlist_node *n;
	252
	253	hlist_for_each_entry(kimn, n, &kvm->mask_notifier_list, link)
	254	if (kimn->irq == irq)
	255	kimn->func(kimn, mask);
	256	}
	257
399ec807 AK	258	static void __kvm_free_irq_routing(struct list_head *irq_routing)
	259	{
	260	struct kvm_kernel_irq_routing_entry e, n;
	261
	262	list_for_each_entry_safe(e, n, irq_routing, link)
	263	kfree(e);
	264	}
	265
	266	void kvm_free_irq_routing(struct kvm *kvm)
	267	{
	268	__kvm_free_irq_routing(&kvm->irq_routing);
	269	}
	270
cded19f3 HE	271	static int setup_routing_entry(struct kvm_kernel_irq_routing_entry *e,
cded19f3 HE	272	const struct kvm_irq_routing_entry *ue)
399ec807 AK	273	{
	274	int r = -EINVAL;
	275	int delta;
	276
	277	e->gsi = ue->gsi;
	278	switch (ue->type) {
	279	case KVM_IRQ_ROUTING_IRQCHIP:
	280	delta = 0;
	281	switch (ue->u.irqchip.irqchip) {
	282	case KVM_IRQCHIP_PIC_MASTER:
	283	e->set = kvm_set_pic_irq;
	284	break;
	285	case KVM_IRQCHIP_PIC_SLAVE:
4925663a	286	e->set = kvm_set_pic_irq;
399ec807 AK	287	delta = 8;
	288	break;
	289	case KVM_IRQCHIP_IOAPIC:
	290	e->set = kvm_set_ioapic_irq;
	291	break;
	292	default:
	293	goto out;
	294	}
	295	e->irqchip.irqchip = ue->u.irqchip.irqchip;
	296	e->irqchip.pin = ue->u.irqchip.pin + delta;
	297	break;
79950e10 SY	298	case KVM_IRQ_ROUTING_MSI:
	299	e->set = kvm_set_msi;
	300	e->msi.address_lo = ue->u.msi.address_lo;
	301	e->msi.address_hi = ue->u.msi.address_hi;
	302	e->msi.data = ue->u.msi.data;
	303	break;
399ec807 AK	304	default:
	305	goto out;
	306	}
	307	r = 0;
	308	out:
	309	return r;
	310	}
	311
	312
	313	int kvm_set_irq_routing(struct kvm *kvm,
	314	const struct kvm_irq_routing_entry *ue,
	315	unsigned nr,
	316	unsigned flags)
	317	{
	318	struct list_head irq_list = LIST_HEAD_INIT(irq_list);
	319	struct list_head tmp = LIST_HEAD_INIT(tmp);
	320	struct kvm_kernel_irq_routing_entry *e = NULL;
	321	unsigned i;
	322	int r;
	323
	324	for (i = 0; i < nr; ++i) {
	325	r = -EINVAL;
	326	if (ue->gsi >= KVM_MAX_IRQ_ROUTES)
	327	goto out;
	328	if (ue->flags)
	329	goto out;
	330	r = -ENOMEM;
	331	e = kzalloc(sizeof(*e), GFP_KERNEL);
	332	if (!e)
	333	goto out;
	334	r = setup_routing_entry(e, ue);
	335	if (r)
	336	goto out;
	337	++ue;
	338	list_add(&e->link, &irq_list);
	339	e = NULL;
	340	}
	341
	342	mutex_lock(&kvm->lock);
	343	list_splice(&kvm->irq_routing, &tmp);
	344	INIT_LIST_HEAD(&kvm->irq_routing);
	345	list_splice(&irq_list, &kvm->irq_routing);
	346	INIT_LIST_HEAD(&irq_list);
	347	list_splice(&tmp, &irq_list);
	348	mutex_unlock(&kvm->lock);
	349
	350	r = 0;
	351
	352	out:
	353	kfree(e);
	354	__kvm_free_irq_routing(&irq_list);
	355	return r;
	356	}
	357
	358	#define IOAPIC_ROUTING_ENTRY(irq) \
	359	{ .gsi = irq, .type = KVM_IRQ_ROUTING_IRQCHIP, \
	360	.u.irqchip.irqchip = KVM_IRQCHIP_IOAPIC, .u.irqchip.pin = (irq) }
	361	#define ROUTING_ENTRY1(irq) IOAPIC_ROUTING_ENTRY(irq)
	362
	363	#ifdef CONFIG_X86
399ec807 AK	364	# define PIC_ROUTING_ENTRY(irq) \
	365	{ .gsi = irq, .type = KVM_IRQ_ROUTING_IRQCHIP, \
	366	.u.irqchip.irqchip = SELECT_PIC(irq), .u.irqchip.pin = (irq) % 8 }
	367	# define ROUTING_ENTRY2(irq) \
	368	IOAPIC_ROUTING_ENTRY(irq), PIC_ROUTING_ENTRY(irq)
	369	#else
	370	# define ROUTING_ENTRY2(irq) \
	371	IOAPIC_ROUTING_ENTRY(irq)
	372	#endif
	373
	374	static const struct kvm_irq_routing_entry default_routing[] = {
	375	ROUTING_ENTRY2(0), ROUTING_ENTRY2(1),
	376	ROUTING_ENTRY2(2), ROUTING_ENTRY2(3),
	377	ROUTING_ENTRY2(4), ROUTING_ENTRY2(5),
	378	ROUTING_ENTRY2(6), ROUTING_ENTRY2(7),
	379	ROUTING_ENTRY2(8), ROUTING_ENTRY2(9),
	380	ROUTING_ENTRY2(10), ROUTING_ENTRY2(11),
	381	ROUTING_ENTRY2(12), ROUTING_ENTRY2(13),
	382	ROUTING_ENTRY2(14), ROUTING_ENTRY2(15),
	383	ROUTING_ENTRY1(16), ROUTING_ENTRY1(17),
	384	ROUTING_ENTRY1(18), ROUTING_ENTRY1(19),
	385	ROUTING_ENTRY1(20), ROUTING_ENTRY1(21),
	386	ROUTING_ENTRY1(22), ROUTING_ENTRY1(23),
	387	#ifdef CONFIG_IA64
	388	ROUTING_ENTRY1(24), ROUTING_ENTRY1(25),
	389	ROUTING_ENTRY1(26), ROUTING_ENTRY1(27),
	390	ROUTING_ENTRY1(28), ROUTING_ENTRY1(29),
	391	ROUTING_ENTRY1(30), ROUTING_ENTRY1(31),
	392	ROUTING_ENTRY1(32), ROUTING_ENTRY1(33),
	393	ROUTING_ENTRY1(34), ROUTING_ENTRY1(35),
	394	ROUTING_ENTRY1(36), ROUTING_ENTRY1(37),
	395	ROUTING_ENTRY1(38), ROUTING_ENTRY1(39),
	396	ROUTING_ENTRY1(40), ROUTING_ENTRY1(41),
	397	ROUTING_ENTRY1(42), ROUTING_ENTRY1(43),
	398	ROUTING_ENTRY1(44), ROUTING_ENTRY1(45),
	399	ROUTING_ENTRY1(46), ROUTING_ENTRY1(47),
	400	#endif
	401	};
	402
	403	int kvm_setup_default_irq_routing(struct kvm *kvm)
	404	{
	405	return kvm_set_irq_routing(kvm, default_routing,
	406	ARRAY_SIZE(default_routing), 0);
	407	}