| 1 | Rockchip Successive Approximation Register (SAR) A/D Converter bindings |
| 2 | |
| 3 | Required properties: |
| 4 | - compatible: should be "rockchip,<name>-saradc" or "rockchip,rk3066-tsadc" |
| 5 | - "rockchip,saradc": for rk3188, rk3288 |
| 6 | - "rockchip,rk3066-tsadc": for rk3036 |
| 7 | - "rockchip,rk3399-saradc": for rk3399 |
| 8 | |
| 9 | - reg: physical base address of the controller and length of memory mapped |
| 10 | region. |
| 11 | - interrupts: The interrupt number to the cpu. The interrupt specifier format |
| 12 | depends on the interrupt controller. |
| 13 | - clocks: Must contain an entry for each entry in clock-names. |
| 14 | - clock-names: Shall be "saradc" for the converter-clock, and "apb_pclk" for |
| 15 | the peripheral clock. |
| 16 | - vref-supply: The regulator supply ADC reference voltage. |
| 17 | - #io-channel-cells: Should be 1, see ../iio-bindings.txt |
| 18 | |
| 19 | Optional properties: |
| 20 | - resets: Must contain an entry for each entry in reset-names if need support |
| 21 | this option. See ../reset/reset.txt for details. |
| 22 | - reset-names: Must include the name "saradc-apb". |
| 23 | |
| 24 | Example: |
| 25 | saradc: saradc@2006c000 { |
| 26 | compatible = "rockchip,saradc"; |
| 27 | reg = <0x2006c000 0x100>; |
| 28 | interrupts = <GIC_SPI 26 IRQ_TYPE_LEVEL_HIGH>; |
| 29 | clocks = <&cru SCLK_SARADC>, <&cru PCLK_SARADC>; |
| 30 | clock-names = "saradc", "apb_pclk"; |
| 31 | resets = <&cru SRST_SARADC>; |
| 32 | reset-names = "saradc-apb"; |
| 33 | #io-channel-cells = <1>; |
| 34 | vref-supply = <&vcc18>; |
| 35 | }; |