| 1 | /* |
| 2 | * at91sam9g45.dtsi - Device Tree Include file for AT91SAM9G45 family SoC |
| 3 | * applies to AT91SAM9G45, AT91SAM9M10, |
| 4 | * AT91SAM9G46, AT91SAM9M11 SoC |
| 5 | * |
| 6 | * Copyright (C) 2011 Atmel, |
| 7 | * 2011 Nicolas Ferre <nicolas.ferre@atmel.com> |
| 8 | * |
| 9 | * Licensed under GPLv2 or later. |
| 10 | */ |
| 11 | |
| 12 | /include/ "skeleton.dtsi" |
| 13 | |
| 14 | / { |
| 15 | model = "Atmel AT91SAM9G45 family SoC"; |
| 16 | compatible = "atmel,at91sam9g45"; |
| 17 | interrupt-parent = <&aic>; |
| 18 | |
| 19 | aliases { |
| 20 | serial0 = &dbgu; |
| 21 | serial1 = &usart0; |
| 22 | serial2 = &usart1; |
| 23 | serial3 = &usart2; |
| 24 | serial4 = &usart3; |
| 25 | gpio0 = &pioA; |
| 26 | gpio1 = &pioB; |
| 27 | gpio2 = &pioC; |
| 28 | gpio3 = &pioD; |
| 29 | gpio4 = &pioE; |
| 30 | tcb0 = &tcb0; |
| 31 | tcb1 = &tcb1; |
| 32 | i2c0 = &i2c0; |
| 33 | i2c1 = &i2c1; |
| 34 | ssc0 = &ssc0; |
| 35 | ssc1 = &ssc1; |
| 36 | }; |
| 37 | cpus { |
| 38 | cpu@0 { |
| 39 | compatible = "arm,arm926ejs"; |
| 40 | }; |
| 41 | }; |
| 42 | |
| 43 | memory { |
| 44 | reg = <0x70000000 0x10000000>; |
| 45 | }; |
| 46 | |
| 47 | ahb { |
| 48 | compatible = "simple-bus"; |
| 49 | #address-cells = <1>; |
| 50 | #size-cells = <1>; |
| 51 | ranges; |
| 52 | |
| 53 | apb { |
| 54 | compatible = "simple-bus"; |
| 55 | #address-cells = <1>; |
| 56 | #size-cells = <1>; |
| 57 | ranges; |
| 58 | |
| 59 | aic: interrupt-controller@fffff000 { |
| 60 | #interrupt-cells = <3>; |
| 61 | compatible = "atmel,at91rm9200-aic"; |
| 62 | interrupt-controller; |
| 63 | reg = <0xfffff000 0x200>; |
| 64 | atmel,external-irqs = <31>; |
| 65 | }; |
| 66 | |
| 67 | ramc0: ramc@ffffe400 { |
| 68 | compatible = "atmel,at91sam9g45-ddramc"; |
| 69 | reg = <0xffffe400 0x200 |
| 70 | 0xffffe600 0x200>; |
| 71 | }; |
| 72 | |
| 73 | pmc: pmc@fffffc00 { |
| 74 | compatible = "atmel,at91rm9200-pmc"; |
| 75 | reg = <0xfffffc00 0x100>; |
| 76 | }; |
| 77 | |
| 78 | rstc@fffffd00 { |
| 79 | compatible = "atmel,at91sam9g45-rstc"; |
| 80 | reg = <0xfffffd00 0x10>; |
| 81 | }; |
| 82 | |
| 83 | pit: timer@fffffd30 { |
| 84 | compatible = "atmel,at91sam9260-pit"; |
| 85 | reg = <0xfffffd30 0xf>; |
| 86 | interrupts = <1 4 7>; |
| 87 | }; |
| 88 | |
| 89 | |
| 90 | shdwc@fffffd10 { |
| 91 | compatible = "atmel,at91sam9rl-shdwc"; |
| 92 | reg = <0xfffffd10 0x10>; |
| 93 | }; |
| 94 | |
| 95 | tcb0: timer@fff7c000 { |
| 96 | compatible = "atmel,at91rm9200-tcb"; |
| 97 | reg = <0xfff7c000 0x100>; |
| 98 | interrupts = <18 4 0>; |
| 99 | }; |
| 100 | |
| 101 | tcb1: timer@fffd4000 { |
| 102 | compatible = "atmel,at91rm9200-tcb"; |
| 103 | reg = <0xfffd4000 0x100>; |
| 104 | interrupts = <18 4 0>; |
| 105 | }; |
| 106 | |
| 107 | dma: dma-controller@ffffec00 { |
| 108 | compatible = "atmel,at91sam9g45-dma"; |
| 109 | reg = <0xffffec00 0x200>; |
| 110 | interrupts = <21 4 0>; |
| 111 | }; |
| 112 | |
| 113 | pinctrl@fffff200 { |
| 114 | #address-cells = <1>; |
| 115 | #size-cells = <1>; |
| 116 | compatible = "atmel,at91rm9200-pinctrl", "simple-bus"; |
| 117 | ranges = <0xfffff200 0xfffff200 0xa00>; |
| 118 | |
| 119 | atmel,mux-mask = < |
| 120 | /* A B */ |
| 121 | 0xffffffff 0xffc003ff /* pioA */ |
| 122 | 0xffffffff 0x800f8f00 /* pioB */ |
| 123 | 0xffffffff 0x00000e00 /* pioC */ |
| 124 | 0xffffffff 0xff0c1381 /* pioD */ |
| 125 | 0xffffffff 0x81ffff81 /* pioE */ |
| 126 | >; |
| 127 | |
| 128 | /* shared pinctrl settings */ |
| 129 | dbgu { |
| 130 | pinctrl_dbgu: dbgu-0 { |
| 131 | atmel,pins = |
| 132 | <1 12 0x1 0x0 /* PB12 periph A */ |
| 133 | 1 13 0x1 0x0>; /* PB13 periph A */ |
| 134 | }; |
| 135 | }; |
| 136 | |
| 137 | usart0 { |
| 138 | pinctrl_usart0: usart0-0 { |
| 139 | atmel,pins = |
| 140 | <1 19 0x1 0x1 /* PB19 periph A with pullup */ |
| 141 | 1 18 0x1 0x0>; /* PB18 periph A */ |
| 142 | }; |
| 143 | |
| 144 | pinctrl_usart0_rts: usart0_rts-0 { |
| 145 | atmel,pins = |
| 146 | <1 17 0x2 0x0>; /* PB17 periph B */ |
| 147 | }; |
| 148 | |
| 149 | pinctrl_usart0_cts: usart0_cts-0 { |
| 150 | atmel,pins = |
| 151 | <1 15 0x2 0x0>; /* PB15 periph B */ |
| 152 | }; |
| 153 | }; |
| 154 | |
| 155 | uart1 { |
| 156 | pinctrl_usart1: usart1-0 { |
| 157 | atmel,pins = |
| 158 | <1 4 0x1 0x1 /* PB4 periph A with pullup */ |
| 159 | 1 5 0x1 0x0>; /* PB5 periph A */ |
| 160 | }; |
| 161 | |
| 162 | pinctrl_usart1_rts: usart1_rts-0 { |
| 163 | atmel,pins = |
| 164 | <3 16 0x1 0x0>; /* PD16 periph A */ |
| 165 | }; |
| 166 | |
| 167 | pinctrl_usart1_cts: usart1_cts-0 { |
| 168 | atmel,pins = |
| 169 | <3 17 0x1 0x0>; /* PD17 periph A */ |
| 170 | }; |
| 171 | }; |
| 172 | |
| 173 | usart2 { |
| 174 | pinctrl_usart2: usart2-0 { |
| 175 | atmel,pins = |
| 176 | <1 6 0x1 0x1 /* PB6 periph A with pullup */ |
| 177 | 1 7 0x1 0x0>; /* PB7 periph A */ |
| 178 | }; |
| 179 | |
| 180 | pinctrl_usart2_rts: usart2_rts-0 { |
| 181 | atmel,pins = |
| 182 | <2 9 0x2 0x0>; /* PC9 periph B */ |
| 183 | }; |
| 184 | |
| 185 | pinctrl_usart2_cts: usart2_cts-0 { |
| 186 | atmel,pins = |
| 187 | <2 11 0x2 0x0>; /* PC11 periph B */ |
| 188 | }; |
| 189 | }; |
| 190 | |
| 191 | usart3 { |
| 192 | pinctrl_usart3: usart3-0 { |
| 193 | atmel,pins = |
| 194 | <1 8 0x1 0x1 /* PB9 periph A with pullup */ |
| 195 | 1 9 0x1 0x0>; /* PB8 periph A */ |
| 196 | }; |
| 197 | |
| 198 | pinctrl_usart3_rts: usart3_rts-0 { |
| 199 | atmel,pins = |
| 200 | <0 23 0x2 0x0>; /* PA23 periph B */ |
| 201 | }; |
| 202 | |
| 203 | pinctrl_usart3_cts: usart3_cts-0 { |
| 204 | atmel,pins = |
| 205 | <0 24 0x2 0x0>; /* PA24 periph B */ |
| 206 | }; |
| 207 | }; |
| 208 | |
| 209 | nand { |
| 210 | pinctrl_nand: nand-0 { |
| 211 | atmel,pins = |
| 212 | <2 8 0x0 0x1 /* PC8 gpio RDY pin pull_up*/ |
| 213 | 2 14 0x0 0x1>; /* PC14 gpio enable pin pull_up */ |
| 214 | }; |
| 215 | }; |
| 216 | |
| 217 | macb { |
| 218 | pinctrl_macb_rmii: macb_rmii-0 { |
| 219 | atmel,pins = |
| 220 | <0 10 0x1 0x0 /* PA10 periph A */ |
| 221 | 0 11 0x1 0x0 /* PA11 periph A */ |
| 222 | 0 12 0x1 0x0 /* PA12 periph A */ |
| 223 | 0 13 0x1 0x0 /* PA13 periph A */ |
| 224 | 0 14 0x1 0x0 /* PA14 periph A */ |
| 225 | 0 15 0x1 0x0 /* PA15 periph A */ |
| 226 | 0 16 0x1 0x0 /* PA16 periph A */ |
| 227 | 0 17 0x1 0x0 /* PA17 periph A */ |
| 228 | 0 18 0x1 0x0 /* PA18 periph A */ |
| 229 | 0 19 0x1 0x0>; /* PA19 periph A */ |
| 230 | }; |
| 231 | |
| 232 | pinctrl_macb_rmii_mii: macb_rmii_mii-0 { |
| 233 | atmel,pins = |
| 234 | <0 6 0x2 0x0 /* PA6 periph B */ |
| 235 | 0 7 0x2 0x0 /* PA7 periph B */ |
| 236 | 0 8 0x2 0x0 /* PA8 periph B */ |
| 237 | 0 9 0x2 0x0 /* PA9 periph B */ |
| 238 | 0 27 0x2 0x0 /* PA27 periph B */ |
| 239 | 0 28 0x2 0x0 /* PA28 periph B */ |
| 240 | 0 29 0x2 0x0 /* PA29 periph B */ |
| 241 | 0 30 0x2 0x0>; /* PA30 periph B */ |
| 242 | }; |
| 243 | }; |
| 244 | |
| 245 | mmc0 { |
| 246 | pinctrl_mmc0_slot0_clk_cmd_dat0: mmc0_slot0_clk_cmd_dat0-0 { |
| 247 | atmel,pins = |
| 248 | <0 0 0x1 0x0 /* PA0 periph A */ |
| 249 | 0 1 0x1 0x1 /* PA1 periph A with pullup */ |
| 250 | 0 2 0x1 0x1>; /* PA2 periph A with pullup */ |
| 251 | }; |
| 252 | |
| 253 | pinctrl_mmc0_slot0_dat1_3: mmc0_slot0_dat1_3-0 { |
| 254 | atmel,pins = |
| 255 | <0 3 0x1 0x1 /* PA3 periph A with pullup */ |
| 256 | 0 4 0x1 0x1 /* PA4 periph A with pullup */ |
| 257 | 0 5 0x1 0x1>; /* PA5 periph A with pullup */ |
| 258 | }; |
| 259 | |
| 260 | pinctrl_mmc0_slot0_dat4_7: mmc0_slot0_dat4_7-0 { |
| 261 | atmel,pins = |
| 262 | <0 6 0x1 0x1 /* PA6 periph A with pullup */ |
| 263 | 0 7 0x1 0x1 /* PA7 periph A with pullup */ |
| 264 | 0 8 0x1 0x1 /* PA8 periph A with pullup */ |
| 265 | 0 9 0x1 0x1>; /* PA9 periph A with pullup */ |
| 266 | }; |
| 267 | }; |
| 268 | |
| 269 | mmc1 { |
| 270 | pinctrl_mmc1_slot0_clk_cmd_dat0: mmc1_slot0_clk_cmd_dat0-0 { |
| 271 | atmel,pins = |
| 272 | <0 31 0x1 0x0 /* PA31 periph A */ |
| 273 | 0 22 0x1 0x1 /* PA22 periph A with pullup */ |
| 274 | 0 23 0x1 0x1>; /* PA23 periph A with pullup */ |
| 275 | }; |
| 276 | |
| 277 | pinctrl_mmc1_slot0_dat1_3: mmc1_slot0_dat1_3-0 { |
| 278 | atmel,pins = |
| 279 | <0 24 0x1 0x1 /* PA24 periph A with pullup */ |
| 280 | 0 25 0x1 0x1 /* PA25 periph A with pullup */ |
| 281 | 0 26 0x1 0x1>; /* PA26 periph A with pullup */ |
| 282 | }; |
| 283 | |
| 284 | pinctrl_mmc1_slot0_dat4_7: mmc1_slot0_dat4_7-0 { |
| 285 | atmel,pins = |
| 286 | <0 27 0x1 0x1 /* PA27 periph A with pullup */ |
| 287 | 0 28 0x1 0x1 /* PA28 periph A with pullup */ |
| 288 | 0 29 0x1 0x1 /* PA29 periph A with pullup */ |
| 289 | 0 20 0x1 0x1>; /* PA30 periph A with pullup */ |
| 290 | }; |
| 291 | }; |
| 292 | |
| 293 | pioA: gpio@fffff200 { |
| 294 | compatible = "atmel,at91rm9200-gpio"; |
| 295 | reg = <0xfffff200 0x200>; |
| 296 | interrupts = <2 4 1>; |
| 297 | #gpio-cells = <2>; |
| 298 | gpio-controller; |
| 299 | interrupt-controller; |
| 300 | #interrupt-cells = <2>; |
| 301 | }; |
| 302 | |
| 303 | pioB: gpio@fffff400 { |
| 304 | compatible = "atmel,at91rm9200-gpio"; |
| 305 | reg = <0xfffff400 0x200>; |
| 306 | interrupts = <3 4 1>; |
| 307 | #gpio-cells = <2>; |
| 308 | gpio-controller; |
| 309 | interrupt-controller; |
| 310 | #interrupt-cells = <2>; |
| 311 | }; |
| 312 | |
| 313 | pioC: gpio@fffff600 { |
| 314 | compatible = "atmel,at91rm9200-gpio"; |
| 315 | reg = <0xfffff600 0x200>; |
| 316 | interrupts = <4 4 1>; |
| 317 | #gpio-cells = <2>; |
| 318 | gpio-controller; |
| 319 | interrupt-controller; |
| 320 | #interrupt-cells = <2>; |
| 321 | }; |
| 322 | |
| 323 | pioD: gpio@fffff800 { |
| 324 | compatible = "atmel,at91rm9200-gpio"; |
| 325 | reg = <0xfffff800 0x200>; |
| 326 | interrupts = <5 4 1>; |
| 327 | #gpio-cells = <2>; |
| 328 | gpio-controller; |
| 329 | interrupt-controller; |
| 330 | #interrupt-cells = <2>; |
| 331 | }; |
| 332 | |
| 333 | pioE: gpio@fffffa00 { |
| 334 | compatible = "atmel,at91rm9200-gpio"; |
| 335 | reg = <0xfffffa00 0x200>; |
| 336 | interrupts = <5 4 1>; |
| 337 | #gpio-cells = <2>; |
| 338 | gpio-controller; |
| 339 | interrupt-controller; |
| 340 | #interrupt-cells = <2>; |
| 341 | }; |
| 342 | }; |
| 343 | |
| 344 | dbgu: serial@ffffee00 { |
| 345 | compatible = "atmel,at91sam9260-usart"; |
| 346 | reg = <0xffffee00 0x200>; |
| 347 | interrupts = <1 4 7>; |
| 348 | pinctrl-names = "default"; |
| 349 | pinctrl-0 = <&pinctrl_dbgu>; |
| 350 | status = "disabled"; |
| 351 | }; |
| 352 | |
| 353 | usart0: serial@fff8c000 { |
| 354 | compatible = "atmel,at91sam9260-usart"; |
| 355 | reg = <0xfff8c000 0x200>; |
| 356 | interrupts = <7 4 5>; |
| 357 | atmel,use-dma-rx; |
| 358 | atmel,use-dma-tx; |
| 359 | pinctrl-names = "default"; |
| 360 | pinctrl-0 = <&pinctrl_usart0>; |
| 361 | status = "disabled"; |
| 362 | }; |
| 363 | |
| 364 | usart1: serial@fff90000 { |
| 365 | compatible = "atmel,at91sam9260-usart"; |
| 366 | reg = <0xfff90000 0x200>; |
| 367 | interrupts = <8 4 5>; |
| 368 | atmel,use-dma-rx; |
| 369 | atmel,use-dma-tx; |
| 370 | pinctrl-names = "default"; |
| 371 | pinctrl-0 = <&pinctrl_usart1>; |
| 372 | status = "disabled"; |
| 373 | }; |
| 374 | |
| 375 | usart2: serial@fff94000 { |
| 376 | compatible = "atmel,at91sam9260-usart"; |
| 377 | reg = <0xfff94000 0x200>; |
| 378 | interrupts = <9 4 5>; |
| 379 | atmel,use-dma-rx; |
| 380 | atmel,use-dma-tx; |
| 381 | pinctrl-names = "default"; |
| 382 | pinctrl-0 = <&pinctrl_usart2>; |
| 383 | status = "disabled"; |
| 384 | }; |
| 385 | |
| 386 | usart3: serial@fff98000 { |
| 387 | compatible = "atmel,at91sam9260-usart"; |
| 388 | reg = <0xfff98000 0x200>; |
| 389 | interrupts = <10 4 5>; |
| 390 | atmel,use-dma-rx; |
| 391 | atmel,use-dma-tx; |
| 392 | pinctrl-names = "default"; |
| 393 | pinctrl-0 = <&pinctrl_usart3>; |
| 394 | status = "disabled"; |
| 395 | }; |
| 396 | |
| 397 | macb0: ethernet@fffbc000 { |
| 398 | compatible = "cdns,at32ap7000-macb", "cdns,macb"; |
| 399 | reg = <0xfffbc000 0x100>; |
| 400 | interrupts = <25 4 3>; |
| 401 | pinctrl-names = "default"; |
| 402 | pinctrl-0 = <&pinctrl_macb_rmii>; |
| 403 | status = "disabled"; |
| 404 | }; |
| 405 | |
| 406 | i2c0: i2c@fff84000 { |
| 407 | compatible = "atmel,at91sam9g10-i2c"; |
| 408 | reg = <0xfff84000 0x100>; |
| 409 | interrupts = <12 4 6>; |
| 410 | #address-cells = <1>; |
| 411 | #size-cells = <0>; |
| 412 | status = "disabled"; |
| 413 | }; |
| 414 | |
| 415 | i2c1: i2c@fff88000 { |
| 416 | compatible = "atmel,at91sam9g10-i2c"; |
| 417 | reg = <0xfff88000 0x100>; |
| 418 | interrupts = <13 4 6>; |
| 419 | #address-cells = <1>; |
| 420 | #size-cells = <0>; |
| 421 | status = "disabled"; |
| 422 | }; |
| 423 | |
| 424 | ssc0: ssc@fff9c000 { |
| 425 | compatible = "atmel,at91sam9g45-ssc"; |
| 426 | reg = <0xfff9c000 0x4000>; |
| 427 | interrupts = <16 4 5>; |
| 428 | status = "disabled"; |
| 429 | }; |
| 430 | |
| 431 | ssc1: ssc@fffa0000 { |
| 432 | compatible = "atmel,at91sam9g45-ssc"; |
| 433 | reg = <0xfffa0000 0x4000>; |
| 434 | interrupts = <17 4 5>; |
| 435 | status = "disabled"; |
| 436 | }; |
| 437 | |
| 438 | adc0: adc@fffb0000 { |
| 439 | compatible = "atmel,at91sam9260-adc"; |
| 440 | reg = <0xfffb0000 0x100>; |
| 441 | interrupts = <20 4 0>; |
| 442 | atmel,adc-use-external-triggers; |
| 443 | atmel,adc-channels-used = <0xff>; |
| 444 | atmel,adc-vref = <3300>; |
| 445 | atmel,adc-num-channels = <8>; |
| 446 | atmel,adc-startup-time = <40>; |
| 447 | atmel,adc-channel-base = <0x30>; |
| 448 | atmel,adc-drdy-mask = <0x10000>; |
| 449 | atmel,adc-status-register = <0x1c>; |
| 450 | atmel,adc-trigger-register = <0x08>; |
| 451 | |
| 452 | trigger@0 { |
| 453 | trigger-name = "external-rising"; |
| 454 | trigger-value = <0x1>; |
| 455 | trigger-external; |
| 456 | }; |
| 457 | trigger@1 { |
| 458 | trigger-name = "external-falling"; |
| 459 | trigger-value = <0x2>; |
| 460 | trigger-external; |
| 461 | }; |
| 462 | |
| 463 | trigger@2 { |
| 464 | trigger-name = "external-any"; |
| 465 | trigger-value = <0x3>; |
| 466 | trigger-external; |
| 467 | }; |
| 468 | |
| 469 | trigger@3 { |
| 470 | trigger-name = "continuous"; |
| 471 | trigger-value = <0x6>; |
| 472 | }; |
| 473 | }; |
| 474 | |
| 475 | mmc0: mmc@fff80000 { |
| 476 | compatible = "atmel,hsmci"; |
| 477 | reg = <0xfff80000 0x600>; |
| 478 | interrupts = <11 4 0>; |
| 479 | #address-cells = <1>; |
| 480 | #size-cells = <0>; |
| 481 | status = "disabled"; |
| 482 | }; |
| 483 | |
| 484 | mmc1: mmc@fffd0000 { |
| 485 | compatible = "atmel,hsmci"; |
| 486 | reg = <0xfffd0000 0x600>; |
| 487 | interrupts = <29 4 0>; |
| 488 | #address-cells = <1>; |
| 489 | #size-cells = <0>; |
| 490 | status = "disabled"; |
| 491 | }; |
| 492 | |
| 493 | watchdog@fffffd40 { |
| 494 | compatible = "atmel,at91sam9260-wdt"; |
| 495 | reg = <0xfffffd40 0x10>; |
| 496 | status = "disabled"; |
| 497 | }; |
| 498 | }; |
| 499 | |
| 500 | nand0: nand@40000000 { |
| 501 | compatible = "atmel,at91rm9200-nand"; |
| 502 | #address-cells = <1>; |
| 503 | #size-cells = <1>; |
| 504 | reg = <0x40000000 0x10000000 |
| 505 | 0xffffe200 0x200 |
| 506 | >; |
| 507 | atmel,nand-addr-offset = <21>; |
| 508 | atmel,nand-cmd-offset = <22>; |
| 509 | pinctrl-names = "default"; |
| 510 | pinctrl-0 = <&pinctrl_nand>; |
| 511 | gpios = <&pioC 8 0 |
| 512 | &pioC 14 0 |
| 513 | 0 |
| 514 | >; |
| 515 | status = "disabled"; |
| 516 | }; |
| 517 | |
| 518 | usb0: ohci@00700000 { |
| 519 | compatible = "atmel,at91rm9200-ohci", "usb-ohci"; |
| 520 | reg = <0x00700000 0x100000>; |
| 521 | interrupts = <22 4 2>; |
| 522 | status = "disabled"; |
| 523 | }; |
| 524 | |
| 525 | usb1: ehci@00800000 { |
| 526 | compatible = "atmel,at91sam9g45-ehci", "usb-ehci"; |
| 527 | reg = <0x00800000 0x100000>; |
| 528 | interrupts = <22 4 2>; |
| 529 | status = "disabled"; |
| 530 | }; |
| 531 | }; |
| 532 | |
| 533 | i2c@0 { |
| 534 | compatible = "i2c-gpio"; |
| 535 | gpios = <&pioA 20 0 /* sda */ |
| 536 | &pioA 21 0 /* scl */ |
| 537 | >; |
| 538 | i2c-gpio,sda-open-drain; |
| 539 | i2c-gpio,scl-open-drain; |
| 540 | i2c-gpio,delay-us = <5>; /* ~100 kHz */ |
| 541 | #address-cells = <1>; |
| 542 | #size-cells = <0>; |
| 543 | status = "disabled"; |
| 544 | }; |
| 545 | }; |