| 1 | /* |
| 2 | * Platform dependent support for SGI SN |
| 3 | * |
| 4 | * This file is subject to the terms and conditions of the GNU General Public |
| 5 | * License. See the file "COPYING" in the main directory of this archive |
| 6 | * for more details. |
| 7 | * |
| 8 | * Copyright (c) 2000-2008 Silicon Graphics, Inc. All Rights Reserved. |
| 9 | */ |
| 10 | |
| 11 | #include <linux/irq.h> |
| 12 | #include <linux/spinlock.h> |
| 13 | #include <linux/init.h> |
| 14 | #include <linux/rculist.h> |
| 15 | #include <linux/slab.h> |
| 16 | #include <asm/sn/addrs.h> |
| 17 | #include <asm/sn/arch.h> |
| 18 | #include <asm/sn/intr.h> |
| 19 | #include <asm/sn/pcibr_provider.h> |
| 20 | #include <asm/sn/pcibus_provider_defs.h> |
| 21 | #include <asm/sn/pcidev.h> |
| 22 | #include <asm/sn/shub_mmr.h> |
| 23 | #include <asm/sn/sn_sal.h> |
| 24 | #include <asm/sn/sn_feature_sets.h> |
| 25 | |
| 26 | static void register_intr_pda(struct sn_irq_info *sn_irq_info); |
| 27 | static void unregister_intr_pda(struct sn_irq_info *sn_irq_info); |
| 28 | |
| 29 | extern int sn_ioif_inited; |
| 30 | struct list_head **sn_irq_lh; |
| 31 | static DEFINE_SPINLOCK(sn_irq_info_lock); /* non-IRQ lock */ |
| 32 | |
| 33 | u64 sn_intr_alloc(nasid_t local_nasid, int local_widget, |
| 34 | struct sn_irq_info *sn_irq_info, |
| 35 | int req_irq, nasid_t req_nasid, |
| 36 | int req_slice) |
| 37 | { |
| 38 | struct ia64_sal_retval ret_stuff; |
| 39 | ret_stuff.status = 0; |
| 40 | ret_stuff.v0 = 0; |
| 41 | |
| 42 | SAL_CALL_NOLOCK(ret_stuff, (u64) SN_SAL_IOIF_INTERRUPT, |
| 43 | (u64) SAL_INTR_ALLOC, (u64) local_nasid, |
| 44 | (u64) local_widget, __pa(sn_irq_info), (u64) req_irq, |
| 45 | (u64) req_nasid, (u64) req_slice); |
| 46 | |
| 47 | return ret_stuff.status; |
| 48 | } |
| 49 | |
| 50 | void sn_intr_free(nasid_t local_nasid, int local_widget, |
| 51 | struct sn_irq_info *sn_irq_info) |
| 52 | { |
| 53 | struct ia64_sal_retval ret_stuff; |
| 54 | ret_stuff.status = 0; |
| 55 | ret_stuff.v0 = 0; |
| 56 | |
| 57 | SAL_CALL_NOLOCK(ret_stuff, (u64) SN_SAL_IOIF_INTERRUPT, |
| 58 | (u64) SAL_INTR_FREE, (u64) local_nasid, |
| 59 | (u64) local_widget, (u64) sn_irq_info->irq_irq, |
| 60 | (u64) sn_irq_info->irq_cookie, 0, 0); |
| 61 | } |
| 62 | |
| 63 | u64 sn_intr_redirect(nasid_t local_nasid, int local_widget, |
| 64 | struct sn_irq_info *sn_irq_info, |
| 65 | nasid_t req_nasid, int req_slice) |
| 66 | { |
| 67 | struct ia64_sal_retval ret_stuff; |
| 68 | ret_stuff.status = 0; |
| 69 | ret_stuff.v0 = 0; |
| 70 | |
| 71 | SAL_CALL_NOLOCK(ret_stuff, (u64) SN_SAL_IOIF_INTERRUPT, |
| 72 | (u64) SAL_INTR_REDIRECT, (u64) local_nasid, |
| 73 | (u64) local_widget, __pa(sn_irq_info), |
| 74 | (u64) req_nasid, (u64) req_slice, 0); |
| 75 | |
| 76 | return ret_stuff.status; |
| 77 | } |
| 78 | |
| 79 | static unsigned int sn_startup_irq(struct irq_data *data) |
| 80 | { |
| 81 | return 0; |
| 82 | } |
| 83 | |
| 84 | static void sn_shutdown_irq(struct irq_data *data) |
| 85 | { |
| 86 | } |
| 87 | |
| 88 | extern void ia64_mca_register_cpev(int); |
| 89 | |
| 90 | static void sn_disable_irq(struct irq_data *data) |
| 91 | { |
| 92 | if (data->irq == local_vector_to_irq(IA64_CPE_VECTOR)) |
| 93 | ia64_mca_register_cpev(0); |
| 94 | } |
| 95 | |
| 96 | static void sn_enable_irq(struct irq_data *data) |
| 97 | { |
| 98 | if (data->irq == local_vector_to_irq(IA64_CPE_VECTOR)) |
| 99 | ia64_mca_register_cpev(data->irq); |
| 100 | } |
| 101 | |
| 102 | static void sn_ack_irq(struct irq_data *data) |
| 103 | { |
| 104 | u64 event_occurred, mask; |
| 105 | unsigned int irq = data->irq & 0xff; |
| 106 | |
| 107 | event_occurred = HUB_L((u64*)LOCAL_MMR_ADDR(SH_EVENT_OCCURRED)); |
| 108 | mask = event_occurred & SH_ALL_INT_MASK; |
| 109 | HUB_S((u64*)LOCAL_MMR_ADDR(SH_EVENT_OCCURRED_ALIAS), mask); |
| 110 | __set_bit(irq, (volatile void *)pda->sn_in_service_ivecs); |
| 111 | |
| 112 | irq_move_irq(data); |
| 113 | } |
| 114 | |
| 115 | static void sn_irq_info_free(struct rcu_head *head); |
| 116 | |
| 117 | struct sn_irq_info *sn_retarget_vector(struct sn_irq_info *sn_irq_info, |
| 118 | nasid_t nasid, int slice) |
| 119 | { |
| 120 | int vector; |
| 121 | int cpuid; |
| 122 | #ifdef CONFIG_SMP |
| 123 | int cpuphys; |
| 124 | #endif |
| 125 | int64_t bridge; |
| 126 | int local_widget, status; |
| 127 | nasid_t local_nasid; |
| 128 | struct sn_irq_info *new_irq_info; |
| 129 | struct sn_pcibus_provider *pci_provider; |
| 130 | |
| 131 | bridge = (u64) sn_irq_info->irq_bridge; |
| 132 | if (!bridge) { |
| 133 | return NULL; /* irq is not a device interrupt */ |
| 134 | } |
| 135 | |
| 136 | local_nasid = NASID_GET(bridge); |
| 137 | |
| 138 | if (local_nasid & 1) |
| 139 | local_widget = TIO_SWIN_WIDGETNUM(bridge); |
| 140 | else |
| 141 | local_widget = SWIN_WIDGETNUM(bridge); |
| 142 | vector = sn_irq_info->irq_irq; |
| 143 | |
| 144 | /* Make use of SAL_INTR_REDIRECT if PROM supports it */ |
| 145 | status = sn_intr_redirect(local_nasid, local_widget, sn_irq_info, nasid, slice); |
| 146 | if (!status) { |
| 147 | new_irq_info = sn_irq_info; |
| 148 | goto finish_up; |
| 149 | } |
| 150 | |
| 151 | /* |
| 152 | * PROM does not support SAL_INTR_REDIRECT, or it failed. |
| 153 | * Revert to old method. |
| 154 | */ |
| 155 | new_irq_info = kmalloc(sizeof(struct sn_irq_info), GFP_ATOMIC); |
| 156 | if (new_irq_info == NULL) |
| 157 | return NULL; |
| 158 | |
| 159 | memcpy(new_irq_info, sn_irq_info, sizeof(struct sn_irq_info)); |
| 160 | |
| 161 | /* Free the old PROM new_irq_info structure */ |
| 162 | sn_intr_free(local_nasid, local_widget, new_irq_info); |
| 163 | unregister_intr_pda(new_irq_info); |
| 164 | |
| 165 | /* allocate a new PROM new_irq_info struct */ |
| 166 | status = sn_intr_alloc(local_nasid, local_widget, |
| 167 | new_irq_info, vector, |
| 168 | nasid, slice); |
| 169 | |
| 170 | /* SAL call failed */ |
| 171 | if (status) { |
| 172 | kfree(new_irq_info); |
| 173 | return NULL; |
| 174 | } |
| 175 | |
| 176 | register_intr_pda(new_irq_info); |
| 177 | spin_lock(&sn_irq_info_lock); |
| 178 | list_replace_rcu(&sn_irq_info->list, &new_irq_info->list); |
| 179 | spin_unlock(&sn_irq_info_lock); |
| 180 | call_rcu(&sn_irq_info->rcu, sn_irq_info_free); |
| 181 | |
| 182 | |
| 183 | finish_up: |
| 184 | /* Update kernels new_irq_info with new target info */ |
| 185 | cpuid = nasid_slice_to_cpuid(new_irq_info->irq_nasid, |
| 186 | new_irq_info->irq_slice); |
| 187 | new_irq_info->irq_cpuid = cpuid; |
| 188 | |
| 189 | pci_provider = sn_pci_provider[new_irq_info->irq_bridge_type]; |
| 190 | |
| 191 | /* |
| 192 | * If this represents a line interrupt, target it. If it's |
| 193 | * an msi (irq_int_bit < 0), it's already targeted. |
| 194 | */ |
| 195 | if (new_irq_info->irq_int_bit >= 0 && |
| 196 | pci_provider && pci_provider->target_interrupt) |
| 197 | (pci_provider->target_interrupt)(new_irq_info); |
| 198 | |
| 199 | #ifdef CONFIG_SMP |
| 200 | cpuphys = cpu_physical_id(cpuid); |
| 201 | set_irq_affinity_info((vector & 0xff), cpuphys, 0); |
| 202 | #endif |
| 203 | |
| 204 | return new_irq_info; |
| 205 | } |
| 206 | |
| 207 | static int sn_set_affinity_irq(struct irq_data *data, |
| 208 | const struct cpumask *mask, bool force) |
| 209 | { |
| 210 | struct sn_irq_info *sn_irq_info, *sn_irq_info_safe; |
| 211 | unsigned int irq = data->irq; |
| 212 | nasid_t nasid; |
| 213 | int slice; |
| 214 | |
| 215 | nasid = cpuid_to_nasid(cpumask_first(mask)); |
| 216 | slice = cpuid_to_slice(cpumask_first(mask)); |
| 217 | |
| 218 | list_for_each_entry_safe(sn_irq_info, sn_irq_info_safe, |
| 219 | sn_irq_lh[irq], list) |
| 220 | (void)sn_retarget_vector(sn_irq_info, nasid, slice); |
| 221 | |
| 222 | return 0; |
| 223 | } |
| 224 | |
| 225 | #ifdef CONFIG_SMP |
| 226 | void sn_set_err_irq_affinity(unsigned int irq) |
| 227 | { |
| 228 | /* |
| 229 | * On systems which support CPU disabling (SHub2), all error interrupts |
| 230 | * are targetted at the boot CPU. |
| 231 | */ |
| 232 | if (is_shub2() && sn_prom_feature_available(PRF_CPU_DISABLE_SUPPORT)) |
| 233 | set_irq_affinity_info(irq, cpu_physical_id(0), 0); |
| 234 | } |
| 235 | #else |
| 236 | void sn_set_err_irq_affinity(unsigned int irq) { } |
| 237 | #endif |
| 238 | |
| 239 | static void |
| 240 | sn_mask_irq(struct irq_data *data) |
| 241 | { |
| 242 | } |
| 243 | |
| 244 | static void |
| 245 | sn_unmask_irq(struct irq_data *data) |
| 246 | { |
| 247 | } |
| 248 | |
| 249 | struct irq_chip irq_type_sn = { |
| 250 | .name = "SN hub", |
| 251 | .irq_startup = sn_startup_irq, |
| 252 | .irq_shutdown = sn_shutdown_irq, |
| 253 | .irq_enable = sn_enable_irq, |
| 254 | .irq_disable = sn_disable_irq, |
| 255 | .irq_ack = sn_ack_irq, |
| 256 | .irq_mask = sn_mask_irq, |
| 257 | .irq_unmask = sn_unmask_irq, |
| 258 | .irq_set_affinity = sn_set_affinity_irq |
| 259 | }; |
| 260 | |
| 261 | ia64_vector sn_irq_to_vector(int irq) |
| 262 | { |
| 263 | if (irq >= IA64_NUM_VECTORS) |
| 264 | return 0; |
| 265 | return (ia64_vector)irq; |
| 266 | } |
| 267 | |
| 268 | unsigned int sn_local_vector_to_irq(u8 vector) |
| 269 | { |
| 270 | return (CPU_VECTOR_TO_IRQ(smp_processor_id(), vector)); |
| 271 | } |
| 272 | |
| 273 | void sn_irq_init(void) |
| 274 | { |
| 275 | int i; |
| 276 | |
| 277 | ia64_first_device_vector = IA64_SN2_FIRST_DEVICE_VECTOR; |
| 278 | ia64_last_device_vector = IA64_SN2_LAST_DEVICE_VECTOR; |
| 279 | |
| 280 | for (i = 0; i < NR_IRQS; i++) { |
| 281 | if (irq_get_chip(i) == &no_irq_chip) |
| 282 | irq_set_chip(i, &irq_type_sn); |
| 283 | } |
| 284 | } |
| 285 | |
| 286 | static void register_intr_pda(struct sn_irq_info *sn_irq_info) |
| 287 | { |
| 288 | int irq = sn_irq_info->irq_irq; |
| 289 | int cpu = sn_irq_info->irq_cpuid; |
| 290 | |
| 291 | if (pdacpu(cpu)->sn_last_irq < irq) { |
| 292 | pdacpu(cpu)->sn_last_irq = irq; |
| 293 | } |
| 294 | |
| 295 | if (pdacpu(cpu)->sn_first_irq == 0 || pdacpu(cpu)->sn_first_irq > irq) |
| 296 | pdacpu(cpu)->sn_first_irq = irq; |
| 297 | } |
| 298 | |
| 299 | static void unregister_intr_pda(struct sn_irq_info *sn_irq_info) |
| 300 | { |
| 301 | int irq = sn_irq_info->irq_irq; |
| 302 | int cpu = sn_irq_info->irq_cpuid; |
| 303 | struct sn_irq_info *tmp_irq_info; |
| 304 | int i, foundmatch; |
| 305 | |
| 306 | rcu_read_lock(); |
| 307 | if (pdacpu(cpu)->sn_last_irq == irq) { |
| 308 | foundmatch = 0; |
| 309 | for (i = pdacpu(cpu)->sn_last_irq - 1; |
| 310 | i && !foundmatch; i--) { |
| 311 | list_for_each_entry_rcu(tmp_irq_info, |
| 312 | sn_irq_lh[i], |
| 313 | list) { |
| 314 | if (tmp_irq_info->irq_cpuid == cpu) { |
| 315 | foundmatch = 1; |
| 316 | break; |
| 317 | } |
| 318 | } |
| 319 | } |
| 320 | pdacpu(cpu)->sn_last_irq = i; |
| 321 | } |
| 322 | |
| 323 | if (pdacpu(cpu)->sn_first_irq == irq) { |
| 324 | foundmatch = 0; |
| 325 | for (i = pdacpu(cpu)->sn_first_irq + 1; |
| 326 | i < NR_IRQS && !foundmatch; i++) { |
| 327 | list_for_each_entry_rcu(tmp_irq_info, |
| 328 | sn_irq_lh[i], |
| 329 | list) { |
| 330 | if (tmp_irq_info->irq_cpuid == cpu) { |
| 331 | foundmatch = 1; |
| 332 | break; |
| 333 | } |
| 334 | } |
| 335 | } |
| 336 | pdacpu(cpu)->sn_first_irq = ((i == NR_IRQS) ? 0 : i); |
| 337 | } |
| 338 | rcu_read_unlock(); |
| 339 | } |
| 340 | |
| 341 | static void sn_irq_info_free(struct rcu_head *head) |
| 342 | { |
| 343 | struct sn_irq_info *sn_irq_info; |
| 344 | |
| 345 | sn_irq_info = container_of(head, struct sn_irq_info, rcu); |
| 346 | kfree(sn_irq_info); |
| 347 | } |
| 348 | |
| 349 | void sn_irq_fixup(struct pci_dev *pci_dev, struct sn_irq_info *sn_irq_info) |
| 350 | { |
| 351 | nasid_t nasid = sn_irq_info->irq_nasid; |
| 352 | int slice = sn_irq_info->irq_slice; |
| 353 | int cpu = nasid_slice_to_cpuid(nasid, slice); |
| 354 | #ifdef CONFIG_SMP |
| 355 | int cpuphys; |
| 356 | #endif |
| 357 | |
| 358 | pci_dev_get(pci_dev); |
| 359 | sn_irq_info->irq_cpuid = cpu; |
| 360 | sn_irq_info->irq_pciioinfo = SN_PCIDEV_INFO(pci_dev); |
| 361 | |
| 362 | /* link it into the sn_irq[irq] list */ |
| 363 | spin_lock(&sn_irq_info_lock); |
| 364 | list_add_rcu(&sn_irq_info->list, sn_irq_lh[sn_irq_info->irq_irq]); |
| 365 | reserve_irq_vector(sn_irq_info->irq_irq); |
| 366 | spin_unlock(&sn_irq_info_lock); |
| 367 | |
| 368 | register_intr_pda(sn_irq_info); |
| 369 | #ifdef CONFIG_SMP |
| 370 | cpuphys = cpu_physical_id(cpu); |
| 371 | set_irq_affinity_info(sn_irq_info->irq_irq, cpuphys, 0); |
| 372 | /* |
| 373 | * Affinity was set by the PROM, prevent it from |
| 374 | * being reset by the request_irq() path. |
| 375 | */ |
| 376 | irqd_mark_affinity_was_set(irq_get_irq_data(sn_irq_info->irq_irq)); |
| 377 | #endif |
| 378 | } |
| 379 | |
| 380 | void sn_irq_unfixup(struct pci_dev *pci_dev) |
| 381 | { |
| 382 | struct sn_irq_info *sn_irq_info; |
| 383 | |
| 384 | /* Only cleanup IRQ stuff if this device has a host bus context */ |
| 385 | if (!SN_PCIDEV_BUSSOFT(pci_dev)) |
| 386 | return; |
| 387 | |
| 388 | sn_irq_info = SN_PCIDEV_INFO(pci_dev)->pdi_sn_irq_info; |
| 389 | if (!sn_irq_info) |
| 390 | return; |
| 391 | if (!sn_irq_info->irq_irq) { |
| 392 | kfree(sn_irq_info); |
| 393 | return; |
| 394 | } |
| 395 | |
| 396 | unregister_intr_pda(sn_irq_info); |
| 397 | spin_lock(&sn_irq_info_lock); |
| 398 | list_del_rcu(&sn_irq_info->list); |
| 399 | spin_unlock(&sn_irq_info_lock); |
| 400 | if (list_empty(sn_irq_lh[sn_irq_info->irq_irq])) |
| 401 | free_irq_vector(sn_irq_info->irq_irq); |
| 402 | call_rcu(&sn_irq_info->rcu, sn_irq_info_free); |
| 403 | pci_dev_put(pci_dev); |
| 404 | |
| 405 | } |
| 406 | |
| 407 | static inline void |
| 408 | sn_call_force_intr_provider(struct sn_irq_info *sn_irq_info) |
| 409 | { |
| 410 | struct sn_pcibus_provider *pci_provider; |
| 411 | |
| 412 | pci_provider = sn_pci_provider[sn_irq_info->irq_bridge_type]; |
| 413 | |
| 414 | /* Don't force an interrupt if the irq has been disabled */ |
| 415 | if (!irqd_irq_disabled(sn_irq_info->irq_irq) && |
| 416 | pci_provider && pci_provider->force_interrupt) |
| 417 | (*pci_provider->force_interrupt)(sn_irq_info); |
| 418 | } |
| 419 | |
| 420 | /* |
| 421 | * Check for lost interrupts. If the PIC int_status reg. says that |
| 422 | * an interrupt has been sent, but not handled, and the interrupt |
| 423 | * is not pending in either the cpu irr regs or in the soft irr regs, |
| 424 | * and the interrupt is not in service, then the interrupt may have |
| 425 | * been lost. Force an interrupt on that pin. It is possible that |
| 426 | * the interrupt is in flight, so we may generate a spurious interrupt, |
| 427 | * but we should never miss a real lost interrupt. |
| 428 | */ |
| 429 | static void sn_check_intr(int irq, struct sn_irq_info *sn_irq_info) |
| 430 | { |
| 431 | u64 regval; |
| 432 | struct pcidev_info *pcidev_info; |
| 433 | struct pcibus_info *pcibus_info; |
| 434 | |
| 435 | /* |
| 436 | * Bridge types attached to TIO (anything but PIC) do not need this WAR |
| 437 | * since they do not target Shub II interrupt registers. If that |
| 438 | * ever changes, this check needs to accomodate. |
| 439 | */ |
| 440 | if (sn_irq_info->irq_bridge_type != PCIIO_ASIC_TYPE_PIC) |
| 441 | return; |
| 442 | |
| 443 | pcidev_info = (struct pcidev_info *)sn_irq_info->irq_pciioinfo; |
| 444 | if (!pcidev_info) |
| 445 | return; |
| 446 | |
| 447 | pcibus_info = |
| 448 | (struct pcibus_info *)pcidev_info->pdi_host_pcidev_info-> |
| 449 | pdi_pcibus_info; |
| 450 | regval = pcireg_intr_status_get(pcibus_info); |
| 451 | |
| 452 | if (!ia64_get_irr(irq_to_vector(irq))) { |
| 453 | if (!test_bit(irq, pda->sn_in_service_ivecs)) { |
| 454 | regval &= 0xff; |
| 455 | if (sn_irq_info->irq_int_bit & regval & |
| 456 | sn_irq_info->irq_last_intr) { |
| 457 | regval &= ~(sn_irq_info->irq_int_bit & regval); |
| 458 | sn_call_force_intr_provider(sn_irq_info); |
| 459 | } |
| 460 | } |
| 461 | } |
| 462 | sn_irq_info->irq_last_intr = regval; |
| 463 | } |
| 464 | |
| 465 | void sn_lb_int_war_check(void) |
| 466 | { |
| 467 | struct sn_irq_info *sn_irq_info; |
| 468 | int i; |
| 469 | |
| 470 | if (!sn_ioif_inited || pda->sn_first_irq == 0) |
| 471 | return; |
| 472 | |
| 473 | rcu_read_lock(); |
| 474 | for (i = pda->sn_first_irq; i <= pda->sn_last_irq; i++) { |
| 475 | list_for_each_entry_rcu(sn_irq_info, sn_irq_lh[i], list) { |
| 476 | sn_check_intr(i, sn_irq_info); |
| 477 | } |
| 478 | } |
| 479 | rcu_read_unlock(); |
| 480 | } |
| 481 | |
| 482 | void __init sn_irq_lh_init(void) |
| 483 | { |
| 484 | int i; |
| 485 | |
| 486 | sn_irq_lh = kmalloc(sizeof(struct list_head *) * NR_IRQS, GFP_KERNEL); |
| 487 | if (!sn_irq_lh) |
| 488 | panic("SN PCI INIT: Failed to allocate memory for PCI init\n"); |
| 489 | |
| 490 | for (i = 0; i < NR_IRQS; i++) { |
| 491 | sn_irq_lh[i] = kmalloc(sizeof(struct list_head), GFP_KERNEL); |
| 492 | if (!sn_irq_lh[i]) |
| 493 | panic("SN PCI INIT: Failed IRQ memory allocation\n"); |
| 494 | |
| 495 | INIT_LIST_HEAD(sn_irq_lh[i]); |
| 496 | } |
| 497 | } |