| 1 | 2009-09-25 Alan Modra <amodra@bigpond.net.au> |
| 2 | |
| 3 | * m32r.cpu (stb-plus): Typo fix. |
| 4 | |
| 5 | 2009-09-23 Doug Evans <dje@sebabeach.org> |
| 6 | |
| 7 | * m32r.cpu (sth-plus): Fix address mode and calculation. |
| 8 | (stb-plus): Ditto. |
| 9 | (clrpsw): Fix mask calculation. |
| 10 | (bset, bclr, btst): Make mode in bit calculation match expression. |
| 11 | |
| 12 | * xc16x.cpu (rtl-version): Set to 0.8. |
| 13 | (gr-names, ext-names,psw-names): Update, print-name -> enum-prefix, |
| 14 | make uppercase. Remove unnecessary name-prefix spec. |
| 15 | (grb-names, conditioncode-names, extconditioncode-names): Ditto. |
| 16 | (grb8-names, r8-names, regmem8-names, regdiv8-names): Ditto. |
| 17 | (reg0-name, reg0-name1, regbmem8-names, memgr8-names): Ditto. |
| 18 | (h-cr): New hardware. |
| 19 | (muls): Comment out parts that won't compile, add fixme. |
| 20 | (mulu, divl, divlu, jmpabs, jmpa-, jmprel, jbc, jnbs, callr): Ditto. |
| 21 | (scxti, scxtmg, scxtm, bclear, bclr18, bset19, bitset, bmov): Ditto. |
| 22 | (bmovn, band, bor, bxor, bcmp, bfldl, bfldh): Ditto. |
| 23 | |
| 24 | 2009-07-16 Doug Evans <dje@sebabeach.org> |
| 25 | |
| 26 | * cpu/simplify.inc (*): One line doc strings don't need \n. |
| 27 | (df): Invoke define-full-ifield instead of claiming it's an alias. |
| 28 | (dno): Define. |
| 29 | (dnop): Mark as deprecated. |
| 30 | |
| 31 | 2009-06-22 Alan Modra <amodra@bigpond.net.au> |
| 32 | |
| 33 | * m32c.opc (parse_lab_5_3): Use correct enum. |
| 34 | |
| 35 | 2009-01-07 Hans-Peter Nilsson <hp@axis.com> |
| 36 | |
| 37 | * frv.cpu (mabshs): Explicitly sign-extend arguments of abs to DI. |
| 38 | (DI-ext-HI, DI-ext-UHI, DI-ext-DI): New pmacros. |
| 39 | (media-arith-sat-semantics): Explicitly sign- or zero-extend |
| 40 | arguments of "operation" to DI using "mode" and the new pmacros. |
| 41 | |
| 42 | 2009-01-03 Hans-Peter Nilsson <hp@axis.com> |
| 43 | |
| 44 | * cris.cpu (cris-implemented-writable-specregs-v32): Correct size |
| 45 | of number 2, PID. |
| 46 | |
| 47 | 2008-12-23 Jon Beniston <jon@beniston.com> |
| 48 | |
| 49 | * lm32.cpu: New file. |
| 50 | * lm32.opc: New file. |
| 51 | |
| 52 | 2008-01-29 Alan Modra <amodra@bigpond.net.au> |
| 53 | |
| 54 | * mt.opc (parse_imm16): Apply 2007-09-26 opcodes/mt-asm.c change |
| 55 | to source. |
| 56 | |
| 57 | 2007-10-22 Hans-Peter Nilsson <hp@axis.com> |
| 58 | |
| 59 | * cris.cpu (movs, movu): Use result of extension operation when |
| 60 | updating flags. |
| 61 | |
| 62 | 2007-07-04 Nick Clifton <nickc@redhat.com> |
| 63 | |
| 64 | * cris.cpu: Update copyright notice to refer to GPLv3. |
| 65 | * frv.cpu, frv.opc, iq10.cpu, iq2000m.cpu, iq2000.opc, m32c.cpu, |
| 66 | m32c.opc, m32r.cpu, m32r.opc, mt.cpu, mt.opc, sh64-compact.cpu, |
| 67 | sh64-media.cpu, sh.cpu, sh.opc, simplify.inc, xc16x.cpu, |
| 68 | xc16x.opc: Likewise. |
| 69 | * iq2000.cpu: Fix copyright notice to refer to FSF. |
| 70 | |
| 71 | 2007-04-30 Mark Salter <msalter@sadr.localdomain> |
| 72 | |
| 73 | * frv.cpu (spr-names): Support new coprocessor SPR registers. |
| 74 | |
| 75 | 2007-04-20 Nick Clifton <nickc@redhat.com> |
| 76 | |
| 77 | * xc16x.cpu: Restore after accidentally overwriting this file with |
| 78 | xc16x.opc. |
| 79 | |
| 80 | 2007-03-29 DJ Delorie <dj@redhat.com> |
| 81 | |
| 82 | * m32c.cpu (Imm-8-s4n): Fix print hook. |
| 83 | (Lab-24-8, Lab-32-8, Lab-40-8): Fix. |
| 84 | (arith-jnz-imm4-dst-defn): Make relaxable. |
| 85 | (arith-jnz16-imm4-dst-defn): Fix encodings. |
| 86 | |
| 87 | 2007-03-20 DJ Delorie <dj@redhat.com> |
| 88 | |
| 89 | * m32c.cpu (f-dsp-40-u20, f-dsp-48-u20, Dsp-40-u20, Dsp-40-u20, |
| 90 | mem20): New. |
| 91 | (src16-16-20-An-relative-*): New. |
| 92 | (dst16-*-20-An-relative-*): New. |
| 93 | (dst16-16-16sa-*): New |
| 94 | (dst16-16-16ar-*): New |
| 95 | (dst32-16-16sa-Unprefixed-*): New |
| 96 | (jsri): Fix operands. |
| 97 | (setzx): Fix encoding. |
| 98 | |
| 99 | 2007-03-08 Alan Modra <amodra@bigpond.net.au> |
| 100 | |
| 101 | * m32r.opc: Formatting. |
| 102 | |
| 103 | 2006-05-22 Nick Clifton <nickc@redhat.com> |
| 104 | |
| 105 | * iq2000.cpu: Fix include paths for iq2000m.cpu and iq10.cpu. |
| 106 | |
| 107 | 2006-04-10 DJ Delorie <dj@redhat.com> |
| 108 | |
| 109 | * m32c.opc (parse_unsigned_bitbase): Take a new parameter which |
| 110 | decides if this function accepts symbolic constants or not. |
| 111 | (parse_signed_bitbase): Likewise. |
| 112 | (parse_unsigned_bitbase8): Pass the new parameter. |
| 113 | (parse_unsigned_bitbase11): Likewise. |
| 114 | (parse_unsigned_bitbase16): Likewise. |
| 115 | (parse_unsigned_bitbase19): Likewise. |
| 116 | (parse_unsigned_bitbase27): Likewise. |
| 117 | (parse_signed_bitbase8): Likewise. |
| 118 | (parse_signed_bitbase11): Likewise. |
| 119 | (parse_signed_bitbase19): Likewise. |
| 120 | |
| 121 | 2006-03-13 DJ Delorie <dj@redhat.com> |
| 122 | |
| 123 | * m32c.cpu (Bit3-S): New. |
| 124 | (btst:s): New. |
| 125 | * m32c.opc (parse_bit3_S): New. |
| 126 | |
| 127 | * m32c.cpu (decimal-subtraction16-insn): Add second operand. |
| 128 | (btst): Add optional :G suffix for MACH32. |
| 129 | (or.b:S): New. |
| 130 | (pop.w:G): Add optional :G suffix for MACH16. |
| 131 | (push.b.imm): Fix syntax. |
| 132 | |
| 133 | 2006-03-10 DJ Delorie <dj@redhat.com> |
| 134 | |
| 135 | * m32c.cpu (mul.l): New. |
| 136 | (mulu.l): New. |
| 137 | |
| 138 | 2006-03-03 Shrirang Khisti <shrirangk@kpitcummins.com) |
| 139 | |
| 140 | * xc16x.opc (parse_hash): Return NULL if the input was parsed or |
| 141 | an error message otherwise. |
| 142 | (parse_dot, parse_pof, parse_pag, parse_sof, parse_seg): Likewise. |
| 143 | Fix up comments to correctly describe the functions. |
| 144 | |
| 145 | 2006-02-24 DJ Delorie <dj@redhat.com> |
| 146 | |
| 147 | * m32c.cpu (RL_TYPE): New attribute, with macros. |
| 148 | (Lab-8-24): Add RELAX. |
| 149 | (unary-insn-defn-g, binary-arith-imm-dst-defn, |
| 150 | binary-arith-imm4-dst-defn): Add 1ADDR attribute. |
| 151 | (binary-arith-src-dst-defn): Add 2ADDR attribute. |
| 152 | (jcnd16-5, jcnd16, jcnd32, jmp16.s, jmp16.b, jmp16.w, jmp16.a, |
| 153 | jmp32.s, jmp32.b, jmp32.w, jmp32.a, jsr16.w, jsr16.a): Add JUMP |
| 154 | attribute. |
| 155 | (jsri16, jsri32): Add 1ADDR attribute. |
| 156 | (jsr32.w, jsr32.a): Add JUMP attribute. |
| 157 | |
| 158 | 2006-02-17 Shrirang Khisti <shrirangk@kpitcummins.com> |
| 159 | Anil Paranjape <anilp1@kpitcummins.com> |
| 160 | Shilin Shakti <shilins@kpitcummins.com> |
| 161 | |
| 162 | * xc16x.cpu: New file containing complete CGEN specific XC16X CPU |
| 163 | description. |
| 164 | * xc16x.opc: New file containing supporting XC16C routines. |
| 165 | |
| 166 | 2006-02-10 Nick Clifton <nickc@redhat.com> |
| 167 | |
| 168 | * iq2000.opc (parse_hi16): Truncate shifted values to 16 bits. |
| 169 | |
| 170 | 2006-01-06 DJ Delorie <dj@redhat.com> |
| 171 | |
| 172 | * m32c.cpu (mov.w:q): Fix mode. |
| 173 | (push32.b.imm): Likewise, for the comment. |
| 174 | |
| 175 | 2005-12-16 Nathan Sidwell <nathan@codesourcery.com> |
| 176 | |
| 177 | Second part of ms1 to mt renaming. |
| 178 | * mt.cpu (define-arch, define-isa): Set name to mt. |
| 179 | (define-mach): Adjust. |
| 180 | * mt.opc (CGEN_ASM_HASH): Update. |
| 181 | (mt_asm_hash, mt_cgen_insn_supported): Renamed. |
| 182 | (parse_loopsize, parse_imm16): Adjust. |
| 183 | |
| 184 | 2005-12-13 DJ Delorie <dj@redhat.com> |
| 185 | |
| 186 | * m32c.cpu (jsri): Fix order so register names aren't treated as |
| 187 | symbols. |
| 188 | (indexb, indexbd, indexbs, indexl, indexld, indexls, indexw, |
| 189 | indexwd, indexws): Fix encodings. |
| 190 | |
| 191 | 2005-12-12 Nathan Sidwell <nathan@codesourcery.com> |
| 192 | |
| 193 | * mt.cpu: Rename from ms1.cpu. |
| 194 | * mt.opc: Rename from ms1.opc. |
| 195 | |
| 196 | 2005-12-06 Hans-Peter Nilsson <hp@axis.com> |
| 197 | |
| 198 | * cris.cpu (simplecris-common-writable-specregs) |
| 199 | (simplecris-common-readable-specregs): Split from |
| 200 | simplecris-common-specregs. All users changed. |
| 201 | (cris-implemented-writable-specregs-v0) |
| 202 | (cris-implemented-readable-specregs-v0): Similar from |
| 203 | cris-implemented-specregs-v0. |
| 204 | (cris-implemented-writable-specregs-v3) |
| 205 | (cris-implemented-readable-specregs-v3) |
| 206 | (cris-implemented-writable-specregs-v8) |
| 207 | (cris-implemented-readable-specregs-v8) |
| 208 | (cris-implemented-writable-specregs-v10) |
| 209 | (cris-implemented-readable-specregs-v10) |
| 210 | (cris-implemented-writable-specregs-v32) |
| 211 | (cris-implemented-readable-specregs-v32): Similar. |
| 212 | (bdap-32-pc, move-m-pcplus-p0, move-m-spplus-p8): New |
| 213 | insns and specializations. |
| 214 | |
| 215 | 2005-11-08 Nathan Sidwell <nathan@codesourcery.com> |
| 216 | |
| 217 | Add ms2 |
| 218 | * ms1.cpu (ms2, ms2bf): New architecture variant, cpu, machine and |
| 219 | model. |
| 220 | (f-uu8, f-uu1, f-imm16l, f-loopo, f-cb1sel, f-cb2sel, f-cb1incr, |
| 221 | f-cb2incr, f-rc3): New fields. |
| 222 | (LOOP): New instruction. |
| 223 | (JAL-HAZARD): New hazard. |
| 224 | (imm16o, loopsize, imm16l, rc3, cb1sel, cb2sel, cb1incr, cb2incr): |
| 225 | New operands. |
| 226 | (mul, muli, dbnz, iflush): Enable for ms2 |
| 227 | (jal, reti): Has JAL-HAZARD. |
| 228 | (ldctxt, ldfb, stfb): Only ms1. |
| 229 | (fbcb): Only ms1,ms1-003. |
| 230 | (wfbinc, mefbinc, wfbincr, mwfbincr, fbcbincs, mfbcbincs, |
| 231 | fbcbincrs, mfbcbincrs): Enable for ms2. |
| 232 | (loop, loopu, dfbc, dwfb, fbwfb, dfbr): New ms2 insns. |
| 233 | * ms1.opc (parse_loopsize): New. |
| 234 | (parse_imm16): hi16/lo16 relocs are applicable to IMM16L. |
| 235 | (print_pcrel): New. |
| 236 | |
| 237 | 2005-10-28 Dave Brolley <brolley@redhat.com> |
| 238 | |
| 239 | Contribute the following change: |
| 240 | 2003-09-24 Dave Brolley <brolley@redhat.com> |
| 241 | |
| 242 | * frv.opc: Use CGEN_ATTR_VALUE_ENUM_TYPE in place of |
| 243 | CGEN_ATTR_VALUE_TYPE. |
| 244 | * m32c.opc (m32c_cgen_insn_supported): Use CGEN_INSN_BITSET_ATTR_VALUE. |
| 245 | Use cgen_bitset_intersect_p. |
| 246 | |
| 247 | 2005-10-27 DJ Delorie <dj@redhat.com> |
| 248 | |
| 249 | * m32c.cpu (Imm-8-s4n, Imm-12-s4n): New. |
| 250 | (arith-jnz16-imm4-dst-defn, arith-jnz32-imm4-dst-defn, |
| 251 | arith-jnz-imm4-dst-mach, arith-jnz-imm4-dst): Keep track of which |
| 252 | imm operand is needed. |
| 253 | (adjnz, sbjnz): Pass the right operands. |
| 254 | (unary-insn-defn, unary16-defn, unary32-defn, unary-insn-mach, |
| 255 | unary-insn): Add -g variants for opcodes that need to support :G. |
| 256 | (not.BW:G, push.BW:G): Call it. |
| 257 | (stzx16-imm8-imm8-dsp8sb, stzx16-imm8-imm8-dsp8fb, |
| 258 | stzx16-imm8-imm8-abs16): Fix operand typos. |
| 259 | * m32c.opc (m32c_asm_hash): Support bnCND. |
| 260 | (parse_signed4n, print_signed4n): New. |
| 261 | |
| 262 | 2005-10-26 DJ Delorie <dj@redhat.com> |
| 263 | |
| 264 | * m32c.cpu (f-dsp-8-s24, Dsp-8-s24): New. |
| 265 | (mov-dspsp-dst-defn, mov-src-dspsp-defn, mov16-dspsp-dst-defn, |
| 266 | mov16-src-dspsp-defn, mov32-dspsp-dst-defn, mov32-src-dspsp-defn): |
| 267 | dsp8[sp] is signed. |
| 268 | (mov.WL:S #imm,A0/A1): dsp24 is signed (i.e. -0x800000..0xffffff). |
| 269 | (mov.BW:S r0,r1): Fix typo r1l->r1. |
| 270 | (tst): Allow :G suffix. |
| 271 | * m32c.opc (parse_signed24): New, for -0x800000..0xffffff. |
| 272 | |
| 273 | 2005-10-26 Kazuhiro Inaoka <inaoka.kazuhiro@renesas.com> |
| 274 | |
| 275 | * m32r.opc (parse_hi16): Do not assume a 32-bit host word size. |
| 276 | |
| 277 | 2005-10-25 DJ Delorie <dj@redhat.com> |
| 278 | |
| 279 | * m32c.cpu (add16-bQ-sp,add16-wQ-sp): Fix to allow either width by |
| 280 | making one a macro of the other. |
| 281 | |
| 282 | 2005-10-21 DJ Delorie <dj@redhat.com> |
| 283 | |
| 284 | * m32c.cpu (lde, ste): Add dsp[a0] and [a1a] addressing. |
| 285 | (indexb, indexbd, indexbs, indexw, indexwd, indexws, indexl, |
| 286 | indexld, indexls): .w variants have `1' bit. |
| 287 | (rot32.b): QI, not SI. |
| 288 | (rot32.w): HI, not SI. |
| 289 | (xchg16): HI for .w variant. |
| 290 | |
| 291 | 2005-10-19 Nick Clifton <nickc@redhat.com> |
| 292 | |
| 293 | * m32r.opc (parse_slo16): Fix bad application of previous patch. |
| 294 | |
| 295 | 2005-10-18 Andreas Schwab <schwab@suse.de> |
| 296 | |
| 297 | * m32r.opc (parse_slo16): Better version of previous patch. |
| 298 | |
| 299 | 2005-10-14 Kazuhiro Inaoka <inaoka.kazuhiro@renesas.com> |
| 300 | |
| 301 | * cpu/m32r.opc (parse_slo16): Do not assume a 32-bit host word |
| 302 | size. |
| 303 | |
| 304 | 2005-07-25 DJ Delorie <dj@redhat.com> |
| 305 | |
| 306 | * m32c.opc (parse_unsigned8): Add %dsp8(). |
| 307 | (parse_signed8): Add %hi8(). |
| 308 | (parse_unsigned16): Add %dsp16(). |
| 309 | (parse_signed16): Add %lo16() and %hi16(). |
| 310 | (parse_lab_5_3): Make valuep a bfd_vma *. |
| 311 | |
| 312 | 2005-07-18 Nick Clifton <nickc@redhat.com> |
| 313 | |
| 314 | * m32c.cpu (f-16-8, f-24-8, f-32-16, f-dsp-8-u24): New opcode |
| 315 | components. |
| 316 | (f-lab32-jmp-s): Fix insertion sequence. |
| 317 | (Dsp-8-u24, Lab-5-3, Lab32-jmp-s): New operands. |
| 318 | (Dsp-40-s8): Make parameter be signed. |
| 319 | (Dsp-40-s16): Likewise. |
| 320 | (Dsp-48-s8): Likewise. |
| 321 | (Dsp-48-s16): Likewise. |
| 322 | (Imm-13-u3): Likewise. (Despite its name!) |
| 323 | (BitBase16-16-s8): Make the parameter be unsigned. |
| 324 | (BitBase16-8-u11-S): Likewise. |
| 325 | (Lab-8-8, Lab-8-16, Lab-16-8, jcnd16-5, jcnd16, jcnd32, jmp16.s, |
| 326 | jmp16.b, jmp16.w, jmp32.s, jmp32.b, jmp32.w, jsp16.w, jsr32.w): Allow |
| 327 | relaxation. |
| 328 | |
| 329 | * m32c.opc: Fix formatting. |
| 330 | Use safe-ctype.h instead of ctype.h |
| 331 | Move duplicated code sequences into a macro. |
| 332 | Fix compile time warnings about signedness mismatches. |
| 333 | Remove dead code. |
| 334 | (parse_lab_5_3): New parser function. |
| 335 | |
| 336 | 2005-07-16 Jim Blandy <jimb@redhat.com> |
| 337 | |
| 338 | * m32c.opc (m32c_cgen_insn_supported): Use int, not CGEN_BITSET, |
| 339 | to represent isa sets. |
| 340 | |
| 341 | 2005-07-15 Jim Blandy <jimb@redhat.com> |
| 342 | |
| 343 | * m32c.cpu, m32c.opc: Fix copyright. |
| 344 | |
| 345 | 2005-07-14 Jim Blandy <jimb@redhat.com> |
| 346 | |
| 347 | * m32c.cpu, m32c.opc: Machine description for the Renesas M32C. |
| 348 | |
| 349 | 2005-07-14 Alan Modra <amodra@bigpond.net.au> |
| 350 | |
| 351 | * ms1.opc (print_dollarhex): Correct format string. |
| 352 | |
| 353 | 2005-07-06 Alan Modra <amodra@bigpond.net.au> |
| 354 | |
| 355 | * iq2000.cpu: Include from binutils cpu dir. |
| 356 | |
| 357 | 2005-07-05 Nick Clifton <nickc@redhat.com> |
| 358 | |
| 359 | * iq2000.opc (parse_lo16, parse_mlo16): Make value parameter |
| 360 | unsigned in order to avoid compile time warnings about sign |
| 361 | conflicts. |
| 362 | |
| 363 | * ms1.opc (parse_*): Likewise. |
| 364 | (parse_imm16): Use a "void *" as it is passed both signed and |
| 365 | unsigned arguments. |
| 366 | |
| 367 | 2005-07-01 Nick Clifton <nickc@redhat.com> |
| 368 | |
| 369 | * frv.opc: Update to ISO C90 function declaration style. |
| 370 | * iq2000.opc: Likewise. |
| 371 | * m32r.opc: Likewise. |
| 372 | * sh.opc: Likewise. |
| 373 | |
| 374 | 2005-06-15 Dave Brolley <brolley@redhat.com> |
| 375 | |
| 376 | Contributed by Red Hat. |
| 377 | * ms1.cpu: New file. Written by Nick Clifton, Stan Cox. |
| 378 | * ms1.opc: New file. Written by Stan Cox. |
| 379 | |
| 380 | 2005-05-10 Nick Clifton <nickc@redhat.com> |
| 381 | |
| 382 | * Update the address and phone number of the FSF organization in |
| 383 | the GPL notices in the following files: |
| 384 | cris.cpu, frv.cpu, frv.opc, iq10.cpu, iq2000.opc, iq2000m.cpu, |
| 385 | m32r.cpu, m32r.opc, sh.cpu, sh.opc, sh64-compact.cpu, |
| 386 | sh64-media.cpu, simplify.inc |
| 387 | |
| 388 | 2005-02-24 Alan Modra <amodra@bigpond.net.au> |
| 389 | |
| 390 | * frv.opc (parse_A): Warning fix. |
| 391 | |
| 392 | 2005-02-23 Nick Clifton <nickc@redhat.com> |
| 393 | |
| 394 | * frv.opc: Fixed compile time warnings about differing signed'ness |
| 395 | of pointers passed to functions. |
| 396 | * m32r.opc: Likewise. |
| 397 | |
| 398 | 2005-02-11 Nick Clifton <nickc@redhat.com> |
| 399 | |
| 400 | * iq2000.opc (parse_jtargq10): Change type of valuep argument to |
| 401 | 'bfd_vma *' in order avoid compile time warning message. |
| 402 | |
| 403 | 2005-01-28 Hans-Peter Nilsson <hp@axis.com> |
| 404 | |
| 405 | * cris.cpu (mstep): Add missing insn. |
| 406 | |
| 407 | 2005-01-25 Alexandre Oliva <aoliva@redhat.com> |
| 408 | |
| 409 | 2004-11-10 Alexandre Oliva <aoliva@redhat.com> |
| 410 | * frv.cpu: Add support for TLS annotations in loads and calll. |
| 411 | * frv.opc (parse_symbolic_address): New. |
| 412 | (parse_ldd_annotation): New. |
| 413 | (parse_call_annotation): New. |
| 414 | (parse_ld_annotation): New. |
| 415 | (parse_ulo16, parse_uslo16): Use parse_symbolic_address. |
| 416 | Introduce TLS relocations. |
| 417 | (parse_d12, parse_s12, parse_u12): Likewise. |
| 418 | (parse_uhi16): Likewise. Fix constant checking on 64-bit host. |
| 419 | (parse_call_label, print_at): New. |
| 420 | |
| 421 | 2004-12-21 Mikael Starvik <starvik@axis.com> |
| 422 | |
| 423 | * cris.cpu (cris-set-mem): Correct integral write semantics. |
| 424 | |
| 425 | 2004-11-29 Hans-Peter Nilsson <hp@axis.com> |
| 426 | |
| 427 | * cris.cpu: New file. |
| 428 | |
| 429 | 2004-11-15 Michael K. Lechner <mike.lechner@gmail.com> |
| 430 | |
| 431 | * iq2000.cpu: Added quotes around macro arguments so that they |
| 432 | will work with newer versions of guile. |
| 433 | |
| 434 | 2004-10-27 Nick Clifton <nickc@redhat.com> |
| 435 | |
| 436 | * iq2000m.cpu (pkrlr1, pkrlr30, rbr1, rbr30, rxr1, rxr30, wbr1, |
| 437 | wbr1u, wbr30, wbr30u, wxr1, wxr1u, wxr30, wxr30u): Add an index |
| 438 | operand. |
| 439 | * iq2000.cpu (dnop index): Rename to _index to avoid complications |
| 440 | with guile. |
| 441 | |
| 442 | 2004-08-27 Richard Sandiford <rsandifo@redhat.com> |
| 443 | |
| 444 | * frv.cpu (cfmovs): Change UNIT attribute to FMALL. |
| 445 | |
| 446 | 2004-05-15 Nick Clifton <nickc@redhat.com> |
| 447 | |
| 448 | * iq2000.opc (iq2000_cgen_insn_supported): Make 'insn' argument const. |
| 449 | |
| 450 | 2004-03-30 Kazuhiro Inaoka <inaoka.kazuhiro@renesas.com> |
| 451 | |
| 452 | * m32r.opc (parse_hi16): Fixed shigh(0xffff8000) bug. |
| 453 | |
| 454 | 2004-03-01 Richard Sandiford <rsandifo@redhat.com> |
| 455 | |
| 456 | * frv.cpu (define-arch frv): Add fr450 mach. |
| 457 | (define-mach fr450): New. |
| 458 | (define-model fr450): New. Add profile units to every fr450 insn. |
| 459 | (define-attr UNIT): Add MDCUTSSI. |
| 460 | (define-attr FR450-MAJOR): New enum. Add to every fr450 insn. |
| 461 | (define-attr AUDIO): New boolean. |
| 462 | (f-LRAE, f-LRAD, f-LRAS, f-TLBPRopx, f-TLBPRL) |
| 463 | (f-LRA-null, f-TLBPR-null): New fields. |
| 464 | (scr0, scr1, scr2, scr3, imavr1, damvr1, cxnr, ttbr) |
| 465 | (tplr, tppr, tpxr, timerh, timerl, timerd, btbr): New SPRs. |
| 466 | (LRAE, LRAD, LRAS, TLBPRopx, TLBPRL): New operands. |
| 467 | (LRA-null, TLBPR-null): New macros. |
| 468 | (iacc-multiply-r-r, slass, scutss, int-arith-ss-r-r): Add AUDIO attr. |
| 469 | (load-real-address): New macro. |
| 470 | (lrai, lrad, tlbpr): New instructions. |
| 471 | (media-cut-acc, media-cut-acc-ss): Add fr450-major argument. |
| 472 | (mcut, mcuti, mcutss, mcutssi): Adjust accordingly. |
| 473 | (mdcutssi): Change UNIT attribute to MDCUTSSI. |
| 474 | (media-low-clear-semantics, media-scope-limit-semantics) |
| 475 | (media-quad-limit, media-quad-shift): New macros. |
| 476 | (mqlclrhs, mqlmths, mqsllhi, mqsrahi): New instructions. |
| 477 | * frv.opc (frv_is_branch_major, frv_is_float_major, frv_is_media_major) |
| 478 | (frv_is_branch_insn, frv_is_float_insn, frv_is_media_insn) |
| 479 | (frv_vliw_reset, frv_vliw_add_insn): Handle bfd_mach_fr450. |
| 480 | (fr450_unit_mapping): New array. |
| 481 | (fr400_unit_mapping, fr500_unit_mapping, fr550_unit_mapping): Add entry |
| 482 | for new MDCUTSSI unit. |
| 483 | (fr450_check_insn_major_constraints): New function. |
| 484 | (check_insn_major_constraints): Use it. |
| 485 | |
| 486 | 2004-03-01 Richard Sandiford <rsandifo@redhat.com> |
| 487 | |
| 488 | * frv.cpu (nsdiv, nudiv, nsdivi, nudivi): Remove fr400 profiling unit. |
| 489 | (scutss): Change unit to I0. |
| 490 | (calll, callil, ccalll): Add missing FR550-MAJOR and profile unit. |
| 491 | (mqsaths): Fix FR400-MAJOR categorization. |
| 492 | (media-quad-multiply-cross-acc, media-quad-cross-multiply-cross-acc) |
| 493 | (media-quad-cross-multiply-acc): Change unit from MDUALACC to FMALL. |
| 494 | * frv.opc (fr400_check_insn_major_constraints): Check for (M-2,M-1) |
| 495 | combinations. |
| 496 | |
| 497 | 2004-03-01 Richard Sandiford <rsandifo@redhat.com> |
| 498 | |
| 499 | * frv.cpu (r-store, r-store-dual, r-store-quad): Delete. |
| 500 | (rstb, rsth, rst, rstd, rstq): Delete. |
| 501 | (rstbf, rsthf, rstf, rstdf, rstqf): Delete. |
| 502 | |
| 503 | 2004-02-23 Nick Clifton <nickc@redhat.com> |
| 504 | |
| 505 | * Apply these patches from Renesas: |
| 506 | |
| 507 | 2004-02-10 Kazuhiro Inaoka <inaoka.kazuhiro@renesas.com> |
| 508 | |
| 509 | * cpu/m32r.opc (my_print_insn): Fixed incorrect output when |
| 510 | disassembling codes for 0x*2 addresses. |
| 511 | |
| 512 | 2003-12-15 Kazuhiro Inaoka <inaoka.kazuhiro@renesas.com> |
| 513 | |
| 514 | * cpu/m32r.cpu: Add PIPE_O attribute to "pop" instruction. |
| 515 | |
| 516 | 2003-12-03 Kazuhiro Inaoka <inaoka.kazuhiro@renesas.com> |
| 517 | |
| 518 | * cpu/m32r.cpu : Add new model m32r2. |
| 519 | Add new instructions. |
| 520 | Replace occurrances of 'Mitsubishi' with 'Renesas'. |
| 521 | Changed PIPE attr of push from O to OS. |
| 522 | Care for Little-endian of M32R. |
| 523 | * cpu/m32r.opc (CGEN_DIS_HASH, my_print_insn): |
| 524 | Care for Little-endian of M32R. |
| 525 | (parse_slo16): signed extension for value. |
| 526 | |
| 527 | 2004-02-20 Andrew Cagney <cagney@redhat.com> |
| 528 | |
| 529 | * m32r.opc, m32r.cpu: New files. Written by , Doug Evans, Nick |
| 530 | Clifton, Ben Elliston, Matthew Green, and Andrew Haley. |
| 531 | |
| 532 | * sh.cpu, sh.opc, sh64-compact.cpu, sh64-media.cpu: New files, all |
| 533 | written by Ben Elliston. |
| 534 | |
| 535 | 2004-01-14 Richard Sandiford <rsandifo@redhat.com> |
| 536 | |
| 537 | * frv.cpu (UNIT): Add IACC. |
| 538 | (iacc-multiply-r-r): Use it. |
| 539 | * frv.opc (fr400_unit_mapping): Add entry for IACC. |
| 540 | (fr500_unit_mapping, fr550_unit_mapping): Likewise. |
| 541 | |
| 542 | 2004-01-06 Alexandre Oliva <aoliva@redhat.com> |
| 543 | |
| 544 | 2003-12-19 Alexandre Oliva <aoliva@redhat.com> |
| 545 | * frv.opc (parse_ulo16, parse_uhi16, parse_d12): Fix some |
| 546 | cut&paste errors in shifting/truncating numerical operands. |
| 547 | 2003-08-08 Alexandre Oliva <aoliva@redhat.com> |
| 548 | * frv.opc (parse_ulo16): Parse gotofflo and gotofffuncdesclo. |
| 549 | (parse_uslo16): Likewise. |
| 550 | (parse_uhi16): Parse gotoffhi and gotofffuncdeschi. |
| 551 | (parse_d12): Parse gotoff12 and gotofffuncdesc12. |
| 552 | (parse_s12): Likewise. |
| 553 | 2003-08-04 Alexandre Oliva <aoliva@redhat.com> |
| 554 | * frv.opc (parse_ulo16): Parse gotlo and gotfuncdesclo. |
| 555 | (parse_uslo16): Likewise. |
| 556 | (parse_uhi16): Parse gothi and gotfuncdeschi. |
| 557 | (parse_d12): Parse got12 and gotfuncdesc12. |
| 558 | (parse_s12): Likewise. |
| 559 | |
| 560 | 2003-10-10 Dave Brolley <brolley@redhat.com> |
| 561 | |
| 562 | * frv.cpu (dnpmop): New p-macro. |
| 563 | (GRdoublek): Use dnpmop. |
| 564 | (CPRdoublek, FRdoublei, FRdoublej, FRdoublek): Ditto. |
| 565 | (store-double-r-r): Use (.sym regtype doublek). |
| 566 | (r-store-double): Ditto. |
| 567 | (store-double-r-r-u): Ditto. |
| 568 | (conditional-store-double): Ditto. |
| 569 | (conditional-store-double-u): Ditto. |
| 570 | (store-double-r-simm): Ditto. |
| 571 | (fmovs): Assign to UNIT FMALL. |
| 572 | |
| 573 | 2003-10-06 Dave Brolley <brolley@redhat.com> |
| 574 | |
| 575 | * frv.cpu, frv.opc: Add support for fr550. |
| 576 | |
| 577 | 2003-09-24 Dave Brolley <brolley@redhat.com> |
| 578 | |
| 579 | * frv.cpu (u-commit): New modelling unit for fr500. |
| 580 | (mwtaccg): Use frv_ref_SI to reference ACC40Sk as an input operand. |
| 581 | (commit-r): Use u-commit model for fr500. |
| 582 | (commit): Ditto. |
| 583 | (conditional-float-binary-op): Take profiling data as an argument. |
| 584 | Update callers. |
| 585 | (ne-float-binary-op): Ditto. |
| 586 | |
| 587 | 2003-09-19 Michael Snyder <msnyder@redhat.com> |
| 588 | |
| 589 | * frv.cpu (nldqi): Delete unimplemented instruction. |
| 590 | |
| 591 | 2003-09-12 Dave Brolley <brolley@redhat.com> |
| 592 | |
| 593 | * frv.cpu (u-clrgr, u-clrfr): New units of model fr500. |
| 594 | (clear-ne-flag-r): Pass insn profiling in as an argument. Call |
| 595 | frv_ref_SI to get input register referenced for profiling. |
| 596 | (clear-ne-flag-all): Pass insn profiling in as an argument. |
| 597 | (clrgr,clrfr,clrga,clrfa): Add profiling information. |
| 598 | |
| 599 | 2003-09-11 Michael Snyder <msnyder@redhat.com> |
| 600 | |
| 601 | * frv.cpu: Typographical corrections. |
| 602 | |
| 603 | 2003-09-09 Dave Brolley <brolley@redhat.com> |
| 604 | |
| 605 | * frv.cpu (media-dual-complex): Change UNIT to FMALL. |
| 606 | (conditional-media-dual-complex, media-quad-complex): Likewise. |
| 607 | |
| 608 | 2003-09-04 Dave Brolley <brolley@redhat.com> |
| 609 | |
| 610 | * frv.cpu (register-transfer): Pass in all attributes in on argument. |
| 611 | Update all callers. |
| 612 | (conditional-register-transfer): Ditto. |
| 613 | (cache-preload): Ditto. |
| 614 | (floating-point-conversion): Ditto. |
| 615 | (floating-point-neg): Ditto. |
| 616 | (float-abs): Ditto. |
| 617 | (float-binary-op-s): Ditto. |
| 618 | (conditional-float-binary-op): Ditto. |
| 619 | (ne-float-binary-op): Ditto. |
| 620 | (float-dual-arith): Ditto. |
| 621 | (ne-float-dual-arith): Ditto. |
| 622 | |
| 623 | 2003-09-03 Dave Brolley <brolley@redhat.com> |
| 624 | |
| 625 | * frv.opc (parse_A, parse_A0, parse_A1): New parse handlers. |
| 626 | * frv.cpu (UNIT): Add IALL, FMALL, FMLOW, STORE, SCAN, DCPL, MDUALACC, |
| 627 | MCLRACC-1. |
| 628 | (A): Removed operand. |
| 629 | (A0,A1): New operands replace operand A. |
| 630 | (mnop): Now a real insn |
| 631 | (mclracc): Removed insn. |
| 632 | (mclracc-0, mclracc-1): New insns replace mclracc. |
| 633 | (all insns): Use new UNIT attributes. |
| 634 | |
| 635 | 2003-08-21 Nick Clifton <nickc@redhat.com> |
| 636 | |
| 637 | * frv.cpu (mbtoh): Replace input parameter to u-media-dual-expand |
| 638 | and u-media-dual-btoh with output parameter. |
| 639 | (cmbtoh): Add profiling hack. |
| 640 | |
| 641 | 2003-08-19 Michael Snyder <msnyder@redhat.com> |
| 642 | |
| 643 | * frv.cpu: Fix typo, Frintkeven -> FRintkeven |
| 644 | |
| 645 | 2003-06-10 Doug Evans <dje@sebabeach.org> |
| 646 | |
| 647 | * frv.cpu: Add IDOC attribute. |
| 648 | |
| 649 | 2003-06-06 Andrew Cagney <cagney@redhat.com> |
| 650 | |
| 651 | Contributed by Red Hat. |
| 652 | * iq2000.cpu: New file. Written by Ben Elliston, Jeff Johnston, |
| 653 | Stan Cox, and Frank Ch. Eigler. |
| 654 | * iq2000.opc: New file. Written by Ben Elliston, Frank |
| 655 | Ch. Eigler, Chris Moller, Jeff Johnston, and Stan Cox. |
| 656 | * iq2000m.cpu: New file. Written by Jeff Johnston. |
| 657 | * iq10.cpu: New file. Written by Jeff Johnston. |
| 658 | |
| 659 | 2003-06-05 Nick Clifton <nickc@redhat.com> |
| 660 | |
| 661 | * frv.cpu (FRintieven): New operand. An even-numbered only |
| 662 | version of the FRinti operand. |
| 663 | (FRintjeven): Likewise for FRintj. |
| 664 | (FRintkeven): Likewise for FRintk. |
| 665 | (mdcutssi, media-dual-word-rotate-r-r, mqsaths, |
| 666 | media-quad-arith-sat-semantics, media-quad-arith-sat, |
| 667 | conditional-media-quad-arith-sat, mdunpackh, |
| 668 | media-quad-multiply-semantics, media-quad-multiply, |
| 669 | conditional-media-quad-multiply, media-quad-complex-i, |
| 670 | media-quad-multiply-acc-semantics, media-quad-multiply-acc, |
| 671 | conditional-media-quad-multiply-acc, munpackh, |
| 672 | media-quad-multiply-cross-acc-semantics, mdpackh, |
| 673 | media-quad-multiply-cross-acc, mbtoh-semantics, |
| 674 | media-quad-cross-multiply-cross-acc-semantics, |
| 675 | media-quad-cross-multiply-cross-acc, mbtoh, mhtob-semantics, |
| 676 | media-quad-cross-multiply-acc-semantics, cmbtoh, |
| 677 | media-quad-cross-multiply-acc, media-quad-complex, mhtob, |
| 678 | media-expand-halfword-to-double-semantics, mexpdhd, cmexpdhd, |
| 679 | cmhtob): Use new operands. |
| 680 | * frv.opc (CGEN_VERBOSE_ASSEMBLER_ERRORS): Define. |
| 681 | (parse_even_register): New function. |
| 682 | |
| 683 | 2003-06-03 Nick Clifton <nickc@redhat.com> |
| 684 | |
| 685 | * frv.cpu (media-dual-word-rotate-r-r): Use a signed 6-bit |
| 686 | immediate value not unsigned. |
| 687 | |
| 688 | 2003-06-03 Andrew Cagney <cagney@redhat.com> |
| 689 | |
| 690 | Contributed by Red Hat. |
| 691 | * frv.cpu: New file. Written by Dave Brolley, Catherine Moore, |
| 692 | and Eric Christopher. |
| 693 | * frv.opc: New file. Written by Catherine Moore, and Dave |
| 694 | Brolley. |
| 695 | * simplify.inc: New file. Written by Doug Evans. |
| 696 | |
| 697 | 2003-05-02 Andrew Cagney <cagney@redhat.com> |
| 698 | |
| 699 | * New file. |
| 700 | |
| 701 | \f |
| 702 | Local Variables: |
| 703 | mode: change-log |
| 704 | left-margin: 8 |
| 705 | fill-column: 74 |
| 706 | version-control: never |
| 707 | End: |