| 1 | ; Fujitsu FRV opcode support, for GNU Binutils. -*- Scheme -*- |
| 2 | ; |
| 3 | ; Copyright 2000, 2001, 2003 Free Software Foundation, Inc. |
| 4 | ; |
| 5 | ; Contributed by Red Hat Inc; developed under contract from Fujitsu. |
| 6 | ; |
| 7 | ; This file is part of the GNU Binutils. |
| 8 | ; |
| 9 | ; This program is free software; you can redistribute it and/or modify |
| 10 | ; it under the terms of the GNU General Public License as published by |
| 11 | ; the Free Software Foundation; either version 2 of the License, or |
| 12 | ; (at your option) any later version. |
| 13 | ; |
| 14 | ; This program is distributed in the hope that it will be useful, |
| 15 | ; but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 16 | ; MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 17 | ; GNU General Public License for more details. |
| 18 | ; |
| 19 | ; You should have received a copy of the GNU General Public License |
| 20 | ; along with this program; if not, write to the Free Software |
| 21 | ; Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. |
| 22 | |
| 23 | (include "simplify.inc") |
| 24 | |
| 25 | ; define-arch must appear first |
| 26 | |
| 27 | (define-arch |
| 28 | (name frv) ; name of cpu architecture |
| 29 | (comment "Fujitsu FRV") |
| 30 | (insn-lsb0? #t) |
| 31 | (machs frv fr500 fr400 tomcat simple) |
| 32 | (isas frv) |
| 33 | ) |
| 34 | |
| 35 | (define-isa |
| 36 | (name frv) |
| 37 | (base-insn-bitsize 32) |
| 38 | ; Initial bitnumbers to decode insns by. |
| 39 | (decode-assist (24 23 22 21 20 19 18)) |
| 40 | (liw-insns 1) ; The frv fetches up to 1 insns at a time. |
| 41 | (parallel-insns 4) ; The frv executes up to 4 insns at a time. |
| 42 | ) |
| 43 | |
| 44 | ; Cpu family definitions. |
| 45 | ; |
| 46 | (define-cpu |
| 47 | ; cpu names must be distinct from the architecture name and machine names. |
| 48 | ; The "b" suffix stands for "base" and is the convention. |
| 49 | ; The "f" suffix stands for "family" and is the convention. |
| 50 | (name frvbf) |
| 51 | (comment "Fujitsu FRV base family") |
| 52 | (endian big) |
| 53 | (word-bitsize 32) |
| 54 | ) |
| 55 | \f |
| 56 | ; Generic FR-V machine. Supports the entire architecture |
| 57 | (define-mach |
| 58 | (name frv) |
| 59 | (comment "Generic FRV cpu") |
| 60 | (cpu frvbf) |
| 61 | ) |
| 62 | (define-model |
| 63 | (name frv) (comment "Generic FRV model") (attrs) |
| 64 | (mach frv) |
| 65 | |
| 66 | (pipeline all "" () ((fetch) (decode) (execute) (writeback))) |
| 67 | |
| 68 | ; `state' is a list of variables for recording model state |
| 69 | ; (state) |
| 70 | |
| 71 | (unit u-exec "Execution Unit" () |
| 72 | 1 1 ; issue done |
| 73 | () ; state |
| 74 | () ; inputs |
| 75 | () ; outputs |
| 76 | () ; profile action (default) |
| 77 | ) |
| 78 | ) |
| 79 | \f |
| 80 | ; FR500 machine. |
| 81 | (define-mach |
| 82 | (name fr500) |
| 83 | (comment "FR500 cpu") |
| 84 | (cpu frvbf) |
| 85 | ) |
| 86 | (define-model |
| 87 | (name fr500) (comment "FR500 model") (attrs) |
| 88 | (mach fr500) |
| 89 | |
| 90 | (pipeline all "" () ((fetch) (decode) (execute) (writeback))) |
| 91 | |
| 92 | ; `state' is a list of variables for recording model state |
| 93 | (state |
| 94 | ; State items |
| 95 | ; These are all masks with each bit representing one register. |
| 96 | (prev-fpop DI) ; Previous use of FR register was floating point insn |
| 97 | (prev-media DI) ; Previous use of FR register was a media insn |
| 98 | (prev-cc-complex DI) ; Previous use of ICC register was not simple |
| 99 | (cur-fpop DI) ; Current use of FR register was floating point insn |
| 100 | (cur-media DI) ; Current use of FR register was a media insn |
| 101 | (cur-cc-complex DI) ; Current use of ICC register was not simple |
| 102 | ) |
| 103 | ; Basic unit for instructions with no latency penalties |
| 104 | (unit u-exec "Execution Unit" () |
| 105 | 1 1 ; issue done |
| 106 | () ; state |
| 107 | () ; inputs |
| 108 | () ; outputs |
| 109 | () ; profile action (default) |
| 110 | ) |
| 111 | ; Basic integer insn unit |
| 112 | (unit u-integer "Integer Unit" () |
| 113 | 1 1 ; issue done |
| 114 | () ; state |
| 115 | ((GRi INT -1) (GRj INT -1)) ; inputs |
| 116 | ((GRk INT -1) (ICCi_1 INT -1)) ; outputs |
| 117 | () ; profile action (default) |
| 118 | ) |
| 119 | ; Integer multiplication unit |
| 120 | (unit u-imul "Integer Multiplication Unit" () |
| 121 | 1 1 ; issue done |
| 122 | () ; state |
| 123 | ((GRi INT -1) (GRj INT -1)) ; inputs |
| 124 | ((GRdoublek INT -1) (ICCi_1 INT -1)) ; outputs |
| 125 | () ; profile action (default) |
| 126 | ) |
| 127 | ; Integer division unit |
| 128 | (unit u-idiv "Integer Division Unit" () |
| 129 | 1 1 ; issue done |
| 130 | () ; state |
| 131 | ((GRi INT -1) (GRj INT -1)) ; inputs |
| 132 | ((GRk INT -1) (ICCi_1 INT -1)) ; outputs |
| 133 | () ; profile action (default) |
| 134 | ) |
| 135 | ; Branch unit |
| 136 | (unit u-branch "Branch Unit" () |
| 137 | 1 1 ; issue done |
| 138 | () ; state |
| 139 | ((GRi INT -1) (GRj INT -1) |
| 140 | (ICCi_2 INT -1) (FCCi_2 INT -1)) ; inputs |
| 141 | ((pc)) ; outputs |
| 142 | () ; profile action (default) |
| 143 | ) |
| 144 | ; Trap unit |
| 145 | (unit u-trap "Trap Unit" () |
| 146 | 1 1 ; issue done |
| 147 | () ; state |
| 148 | ((GRi INT -1) (GRj INT -1) |
| 149 | (ICCi_2 INT -1) (FCCi_2 INT -1)) ; inputs |
| 150 | () ; outputs |
| 151 | () ; profile action (default) |
| 152 | ) |
| 153 | ; Condition code check unit |
| 154 | (unit u-check "Check Unit" () |
| 155 | 1 1 ; issue done |
| 156 | () ; state |
| 157 | ((ICCi_3 INT -1) (FCCi_3 INT -1)) ; inputs |
| 158 | () ; outputs |
| 159 | () ; profile action (default) |
| 160 | ) |
| 161 | ; Clrgr unit |
| 162 | (unit u-clrgr "Clrgr Unit" () |
| 163 | 1 1 ; issue done |
| 164 | () ; state |
| 165 | ((GRk INT -1)) ; inputs |
| 166 | () ; outputs |
| 167 | () ; profile action (default) |
| 168 | ) |
| 169 | ; Clrfr unit |
| 170 | (unit u-clrfr "Clrfr Unit" () |
| 171 | 1 1 ; issue done |
| 172 | () ; state |
| 173 | ((FRk INT -1)) ; inputs |
| 174 | () ; outputs |
| 175 | () ; profile action (default) |
| 176 | ) |
| 177 | ; GR set half unit |
| 178 | (unit u-set-hilo "GR Set Half" () |
| 179 | 1 1 ; issue done |
| 180 | () ; state |
| 181 | () ; inputs |
| 182 | ((GRkhi INT -1) (GRklo INT -1)) ; outputs |
| 183 | () ; profile action (default) |
| 184 | ) |
| 185 | ; GR load unit -- TODO doesn't handle quad |
| 186 | (unit u-gr-load "GR Load Unit" () |
| 187 | 1 1 ; issue done |
| 188 | () ; state |
| 189 | ((GRi INT -1) (GRj INT -1)) ; inputs |
| 190 | ((GRk INT -1) (GRdoublek INT -1)) ; outputs |
| 191 | () ; profile action (default) |
| 192 | ) |
| 193 | ; GR store unit -- TODO doesn't handle quad |
| 194 | (unit u-gr-store "GR Store Unit" () |
| 195 | 1 1 ; issue done |
| 196 | () ; state |
| 197 | ((GRi INT -1) (GRj INT -1) (GRk INT -1) (GRdoublek INT -1)) ; inputs |
| 198 | () ; outputs |
| 199 | () ; profile action (default) |
| 200 | ) |
| 201 | ; GR recovering store unit -- TODO doesn't handle quad |
| 202 | (unit u-gr-r-store "GR Recovering Store Unit" () |
| 203 | 1 1 ; issue done |
| 204 | () ; state |
| 205 | ((GRi INT -1) (GRj INT -1) (GRk INT -1) (GRdoublek INT -1)) ; inputs |
| 206 | () ; outputs |
| 207 | () ; profile action (default) |
| 208 | ) |
| 209 | ; FR load unit -- TODO doesn't handle quad |
| 210 | (unit u-fr-load "FR Load Unit" () |
| 211 | 1 1 ; issue done |
| 212 | () ; state |
| 213 | ((GRi INT -1) (GRj INT -1)) ; inputs |
| 214 | ((FRintk INT -1) (FRdoublek INT -1)) ; outputs |
| 215 | () ; profile action (default) |
| 216 | ) |
| 217 | ; FR store unit -- TODO doesn't handle quad |
| 218 | (unit u-fr-store "FR Store Unit" () |
| 219 | 1 1 ; issue done |
| 220 | () ; state |
| 221 | ((GRi INT -1) (GRj INT -1) (FRintk INT -1) (FRdoublek INT -1)) ; inputs |
| 222 | () ; outputs |
| 223 | () ; profile action (default) |
| 224 | ) |
| 225 | ; FR recovering store unit -- TODO doesn't handle quad |
| 226 | (unit u-fr-r-store "FR Recovering Store Unit" () |
| 227 | 1 1 ; issue done |
| 228 | () ; state |
| 229 | ((GRi INT -1) (GRj INT -1) (FRintk INT -1) (FRdoublek INT -1)) ; inputs |
| 230 | () ; outputs |
| 231 | () ; profile action (default) |
| 232 | ) |
| 233 | ; Swap unit |
| 234 | (unit u-swap "Swap Unit" () |
| 235 | 1 1 ; issue done |
| 236 | () ; state |
| 237 | ((GRi INT -1) (GRj INT -1)) ; inputs |
| 238 | ((GRk INT -1)) ; outputs |
| 239 | () ; profile action (default) |
| 240 | ) |
| 241 | ; FR Move to FR unit |
| 242 | (unit u-fr2fr "FR Move to FR Unit" () |
| 243 | 1 1 ; issue done |
| 244 | () ; state |
| 245 | ((FRi INT -1)) ; inputs |
| 246 | ((FRk INT -1)) ; outputs |
| 247 | () ; profile action (default) |
| 248 | ) |
| 249 | ; FR Move to GR unit |
| 250 | (unit u-fr2gr "FR Move to GR Unit" () |
| 251 | 1 1 ; issue done |
| 252 | () ; state |
| 253 | ((FRintk INT -1)) ; inputs |
| 254 | ((GRj INT -1)) ; outputs |
| 255 | () ; profile action (default) |
| 256 | ) |
| 257 | ; SPR Move to GR unit |
| 258 | (unit u-spr2gr "SPR Move to GR Unit" () |
| 259 | 1 1 ; issue done |
| 260 | () ; state |
| 261 | ((spr INT -1)) ; inputs |
| 262 | ((GRj INT -1)) ; outputs |
| 263 | () ; profile action (default) |
| 264 | ) |
| 265 | ; GR Move to FR unit |
| 266 | (unit u-gr2fr "GR Move to FR Unit" () |
| 267 | 1 1 ; issue done |
| 268 | () ; state |
| 269 | ((GRj INT -1)) ; inputs |
| 270 | ((FRintk INT -1)) ; outputs |
| 271 | () ; profile action (default) |
| 272 | ) |
| 273 | ; GR Move to SPR unit |
| 274 | (unit u-gr2spr "GR Move to SPR Unit" () |
| 275 | 1 1 ; issue done |
| 276 | () ; state |
| 277 | ((GRj INT -1)) ; inputs |
| 278 | ((spr INT -1)) ; outputs |
| 279 | () ; profile action (default) |
| 280 | ) |
| 281 | ; Float Arithmetic unit |
| 282 | (unit u-float-arith "Float Arithmetic unit" () |
| 283 | 1 1 ; issue done |
| 284 | () ; state |
| 285 | ((FRi INT -1) (FRj INT -1) ; inputs |
| 286 | (FRdoublei INT -1) (FRdoublej INT -1)) ; inputs |
| 287 | ((FRk INT -1) (FRdoublek INT -1)) ; outputs |
| 288 | () ; profile action (default) |
| 289 | ) |
| 290 | ; Float Dual Arithmetic unit |
| 291 | (unit u-float-dual-arith "Float Arithmetic unit" () |
| 292 | 1 1 ; issue done |
| 293 | () ; state |
| 294 | ((FRi INT -1) (FRj INT -1) ; inputs |
| 295 | (FRdoublei INT -1) (FRdoublej INT -1)) ; inputs |
| 296 | ((FRk INT -1) (FRdoublek INT -1)) ; outputs |
| 297 | () ; profile action (default) |
| 298 | ) |
| 299 | ; Float Div unit |
| 300 | (unit u-float-div "Float Div unit" () |
| 301 | 1 1 ; issue done |
| 302 | () ; state |
| 303 | ((FRi INT -1) (FRj INT -1)) ; inputs |
| 304 | ((FRk INT -1)) ; outputs |
| 305 | () ; profile action (default) |
| 306 | ) |
| 307 | ; Float Square Root unit |
| 308 | (unit u-float-sqrt "Float Square Root unit" () |
| 309 | 1 1 ; issue done |
| 310 | () ; state |
| 311 | ((FRj INT -1) (FRdoublej INT -1)) ; inputs |
| 312 | ((FRk INT -1) (FRdoublek INT -1)) ; outputs |
| 313 | () ; profile action (default) |
| 314 | ) |
| 315 | ; Float Dual Square Root unit |
| 316 | (unit u-float-dual-sqrt "Float Dual Square Root unit" () |
| 317 | 1 1 ; issue done |
| 318 | () ; state |
| 319 | ((FRj INT -1)) ; inputs |
| 320 | ((FRk INT -1)) ; outputs |
| 321 | () ; profile action (default) |
| 322 | ) |
| 323 | ; Float Compare unit |
| 324 | (unit u-float-compare "Float Compare unit" () |
| 325 | 1 1 ; issue done |
| 326 | () ; state |
| 327 | ((FRi INT -1) (FRj INT -1) |
| 328 | (FRdoublei INT -1) (FRdoublej INT -1)) ; inputs |
| 329 | ((FCCi_2 INT -1)) ; outputs |
| 330 | () ; profile action (default) |
| 331 | ) |
| 332 | ; Dual Float Compare unit |
| 333 | (unit u-float-dual-compare "Float Dual Compare unit" () |
| 334 | 1 1 ; issue done |
| 335 | () ; state |
| 336 | ((FRi INT -1) (FRj INT -1)) ; inputs |
| 337 | ((FCCi_2 INT -1)) ; outputs |
| 338 | () ; profile action (default) |
| 339 | ) |
| 340 | ; Float Conversion unit |
| 341 | (unit u-float-convert "Float Conversion unit" () |
| 342 | 1 1 ; issue done |
| 343 | () ; state |
| 344 | ((FRj INT -1) (FRintj INT -1) (FRdoublej INT -1)) ; inputs |
| 345 | ((FRk INT -1) (FRintk INT -1) (FRdoublek INT -1)) ; outputs |
| 346 | () ; profile action (default) |
| 347 | ) |
| 348 | ; Dual Float Conversion unit |
| 349 | (unit u-float-dual-convert "Float Dual Conversion unit" () |
| 350 | 1 1 ; issue done |
| 351 | () ; state |
| 352 | ((FRj INT -1) (FRintj INT -1)) ; inputs |
| 353 | ((FRk INT -1) (FRintk INT -1)) ; outputs |
| 354 | () ; profile action (default) |
| 355 | ) |
| 356 | ; Media unit |
| 357 | (unit u-media "Media unit" () |
| 358 | 1 1 ; issue done |
| 359 | () ; state |
| 360 | ((FRinti INT -1) (FRintj INT -1) (ACC40Si INT -1) (ACCGi INT -1)) ; inputs |
| 361 | ((FRintk INT -1) (ACC40Sk INT -1) (ACC40Uk INT -1) (ACCGk INT -1)) ; outputs |
| 362 | () ; profile action (default) |
| 363 | ) |
| 364 | ; Media Quad Arithmetic unit |
| 365 | (unit u-media-quad-arith "Media Quad Arithmetic unit" () |
| 366 | 1 1 ; issue done |
| 367 | () ; state |
| 368 | ((FRinti INT -1) (FRintj INT -1)) ; inputs |
| 369 | ((FRintk INT -1)) ; outputs |
| 370 | () ; profile action (default) |
| 371 | ) |
| 372 | ; Media Dual Multiplication unit |
| 373 | (unit u-media-dual-mul "Media Dual Multiplication unit" () |
| 374 | 1 1 ; issue done |
| 375 | () ; state |
| 376 | ((FRinti INT -1) (FRintj INT -1)) ; inputs |
| 377 | ((ACC40Sk INT -1) (ACC40Uk INT -1)) ; outputs |
| 378 | () ; profile action (default) |
| 379 | ) |
| 380 | ; Media Quad Multiplication unit |
| 381 | (unit u-media-quad-mul "Media Quad Multiplication unit" () |
| 382 | 1 1 ; issue done |
| 383 | () ; state |
| 384 | ((FRinti INT -1) (FRintj INT -1)) ; inputs |
| 385 | ((ACC40Sk INT -1) (ACC40Uk INT -1)) ; outputs |
| 386 | () ; profile action (default) |
| 387 | ) |
| 388 | ; Media Quad Complex unit |
| 389 | (unit u-media-quad-complex "Media Quad Complex unit" () |
| 390 | 1 1 ; issue done |
| 391 | () ; state |
| 392 | ((FRinti INT -1) (FRintj INT -1)) ; inputs |
| 393 | ((ACC40Sk INT -1)) ; outputs |
| 394 | () ; profile action (default) |
| 395 | ) |
| 396 | ; Media Dual Expand unit |
| 397 | (unit u-media-dual-expand "Media Dual Expand unit" () |
| 398 | 1 1 ; issue done |
| 399 | () ; state |
| 400 | ((FRinti INT -1)) ; inputs |
| 401 | ((FRintk INT -1)) ; outputs |
| 402 | () ; profile action (default) |
| 403 | ) |
| 404 | ; Media Dual Unpack unit |
| 405 | (unit u-media-dual-unpack "Media Dual Unpack unit" () |
| 406 | 1 1 ; issue done |
| 407 | () ; state |
| 408 | ((FRinti INT -1)) ; inputs |
| 409 | ((FRintk INT -1)) ; outputs |
| 410 | () ; profile action (default) |
| 411 | ) |
| 412 | ; Media Dual byte to half unit |
| 413 | (unit u-media-dual-btoh "Media Byte to byte" () |
| 414 | 1 1 ; issue done |
| 415 | () ; state |
| 416 | ((FRintj INT -1)) ; inputs |
| 417 | ((FRintk INT -1)) ; outputs |
| 418 | () ; profile action (default) |
| 419 | ) |
| 420 | ; Media Dual half to byte unit |
| 421 | (unit u-media-dual-htob "Media Half to byte" () |
| 422 | 1 1 ; issue done |
| 423 | () ; state |
| 424 | ((FRintj INT -1)) ; inputs |
| 425 | ((FRintk INT -1)) ; outputs |
| 426 | () ; profile action (default) |
| 427 | ) |
| 428 | ; Media Dual byte to half unit extended |
| 429 | (unit u-media-dual-btohe "Media Byte to byte extended" () |
| 430 | 1 1 ; issue done |
| 431 | () ; state |
| 432 | ((FRintj INT -1)) ; inputs |
| 433 | ((FRintk INT -1)) ; outputs |
| 434 | () ; profile action (default) |
| 435 | ) |
| 436 | ; Barrier unit |
| 437 | (unit u-barrier "Barrier unit" () |
| 438 | 1 1 ; issue done |
| 439 | () ; state |
| 440 | () ; inputs |
| 441 | () ; outputs |
| 442 | () ; profile action (default) |
| 443 | ) |
| 444 | ; Memory Barrier unit |
| 445 | (unit u-membar "Memory Barrier unit" () |
| 446 | 1 1 ; issue done |
| 447 | () ; state |
| 448 | () ; inputs |
| 449 | () ; outputs |
| 450 | () ; profile action (default) |
| 451 | ) |
| 452 | ; Insn cache invalidate unit |
| 453 | (unit u-ici "Insn cache invalidate unit" () |
| 454 | 1 1 ; issue done |
| 455 | () ; state |
| 456 | ((GRi INT -1) (GRj INT -1)) ; inputs |
| 457 | () ; outputs |
| 458 | () ; profile action (default) |
| 459 | ) |
| 460 | ; Data cache invalidate unit |
| 461 | (unit u-dci "Data cache invalidate unit" () |
| 462 | 1 1 ; issue done |
| 463 | () ; state |
| 464 | ((GRi INT -1) (GRj INT -1)) ; inputs |
| 465 | () ; outputs |
| 466 | () ; profile action (default) |
| 467 | ) |
| 468 | ; Data cache flush unit |
| 469 | (unit u-dcf "Data cache flush unit" () |
| 470 | 1 1 ; issue done |
| 471 | () ; state |
| 472 | ((GRi INT -1) (GRj INT -1)) ; inputs |
| 473 | () ; outputs |
| 474 | () ; profile action (default) |
| 475 | ) |
| 476 | ; Insn cache preload unit |
| 477 | (unit u-icpl "Insn cache preload unit" () |
| 478 | 1 1 ; issue done |
| 479 | () ; state |
| 480 | ((GRi INT -1) (GRj INT -1)) ; inputs |
| 481 | () ; outputs |
| 482 | () ; profile action (default) |
| 483 | ) |
| 484 | ; Data cache preload unit |
| 485 | (unit u-dcpl "Data cache preload unit" () |
| 486 | 1 1 ; issue done |
| 487 | () ; state |
| 488 | ((GRi INT -1) (GRj INT -1)) ; inputs |
| 489 | () ; outputs |
| 490 | () ; profile action (default) |
| 491 | ) |
| 492 | ; Insn cache unlock unit |
| 493 | (unit u-icul "Insn cache unlock unit" () |
| 494 | 1 1 ; issue done |
| 495 | () ; state |
| 496 | ((GRi INT -1) (GRj INT -1)) ; inputs |
| 497 | () ; outputs |
| 498 | () ; profile action (default) |
| 499 | ) |
| 500 | ; Data cache unlock unit |
| 501 | (unit u-dcul "Data cache unlock unit" () |
| 502 | 1 1 ; issue done |
| 503 | () ; state |
| 504 | ((GRi INT -1) (GRj INT -1)) ; inputs |
| 505 | () ; outputs |
| 506 | () ; profile action (default) |
| 507 | ) |
| 508 | ) |
| 509 | \f |
| 510 | ; Tomcat machine. Early version of fr500 machine |
| 511 | (define-mach |
| 512 | (name tomcat) |
| 513 | (comment "Tomcat -- early version of fr500") |
| 514 | (cpu frvbf) |
| 515 | ) |
| 516 | (define-model |
| 517 | (name tomcat) (comment "Tomcat model") (attrs) |
| 518 | (mach tomcat) |
| 519 | |
| 520 | (pipeline all "" () ((fetch) (decode) (execute) (writeback))) |
| 521 | |
| 522 | ; `state' is a list of variables for recording model state |
| 523 | ; (state) |
| 524 | |
| 525 | (unit u-exec "Execution Unit" () |
| 526 | 1 1 ; issue done |
| 527 | () ; state |
| 528 | () ; inputs |
| 529 | () ; outputs |
| 530 | () ; profile action (default) |
| 531 | ) |
| 532 | ) |
| 533 | \f |
| 534 | ; FR400 machine |
| 535 | (define-mach |
| 536 | (name fr400) |
| 537 | (comment "FR400 cpu") |
| 538 | (cpu frvbf) |
| 539 | ) |
| 540 | (define-model |
| 541 | (name fr400) (comment "FR400 model") (attrs) |
| 542 | (mach fr400) |
| 543 | (pipeline all "" () ((fetch) (decode) (execute) (writeback))) |
| 544 | ; `state' is a list of variables for recording model state |
| 545 | (state |
| 546 | ; State items |
| 547 | ; These are all masks with each bit representing one register. |
| 548 | (prev-fp-load DI) ; Previous use of FR register was floating point load |
| 549 | (prev-fr-p4 DI) ; Previous use of FR register was media unit 4 |
| 550 | (prev-fr-p6 DI) ; Previous use of FR register was media unit 6 |
| 551 | (prev-acc-p2 DI) ; Previous use of ACC register was media unit 2 |
| 552 | (prev-acc-p4 DI) ; Previous use of ACC register was media unit 4 |
| 553 | (cur-fp-load DI) ; Current use of FR register is floating point load |
| 554 | (cur-fr-p4 DI) ; Current use of FR register is media unit 4 |
| 555 | (cur-fr-p6 DI) ; Current use of FR register is media unit 6 |
| 556 | (cur-acc-p2 DI) ; Current use of ACC register is media unit 2 |
| 557 | (cur-acc-p4 DI) ; Current use of ACC register is media unit 4 |
| 558 | ) |
| 559 | (unit u-exec "Execution Unit" () |
| 560 | 1 1 ; issue done |
| 561 | () ; state |
| 562 | () ; inputs |
| 563 | () ; outputs |
| 564 | () ; profile action (default) |
| 565 | ) |
| 566 | ; Basic integer insn unit |
| 567 | (unit u-integer "Integer Unit" () |
| 568 | 1 1 ; issue done |
| 569 | () ; state |
| 570 | ((GRi INT -1) (GRj INT -1)) ; inputs |
| 571 | ((GRk INT -1) (ICCi_1 INT -1)) ; outputs |
| 572 | () ; profile action (default) |
| 573 | ) |
| 574 | ; Integer multiplication unit |
| 575 | (unit u-imul "Integer Multiplication Unit" () |
| 576 | 1 1 ; issue done |
| 577 | () ; state |
| 578 | ((GRi INT -1) (GRj INT -1)) ; inputs |
| 579 | ((GRdoublek INT -1) (ICCi_1 INT -1)) ; outputs |
| 580 | () ; profile action (default) |
| 581 | ) |
| 582 | ; Integer division unit |
| 583 | (unit u-idiv "Integer Division Unit" () |
| 584 | 1 1 ; issue done |
| 585 | () ; state |
| 586 | ((GRi INT -1) (GRj INT -1)) ; inputs |
| 587 | ((GRk INT -1) (ICCi_1 INT -1)) ; outputs |
| 588 | () ; profile action (default) |
| 589 | ) |
| 590 | ; Branch unit |
| 591 | (unit u-branch "Branch Unit" () |
| 592 | 1 1 ; issue done |
| 593 | () ; state |
| 594 | ((GRi INT -1) (GRj INT -1) |
| 595 | (ICCi_2 INT -1) (FCCi_2 INT -1)) ; inputs |
| 596 | ((pc)) ; outputs |
| 597 | () ; profile action (default) |
| 598 | ) |
| 599 | ; Trap unit |
| 600 | (unit u-trap "Trap Unit" () |
| 601 | 1 1 ; issue done |
| 602 | () ; state |
| 603 | ((GRi INT -1) (GRj INT -1) |
| 604 | (ICCi_2 INT -1) (FCCi_2 INT -1)) ; inputs |
| 605 | () ; outputs |
| 606 | () ; profile action (default) |
| 607 | ) |
| 608 | ; Condition code check unit |
| 609 | (unit u-check "Check Unit" () |
| 610 | 1 1 ; issue done |
| 611 | () ; state |
| 612 | ((ICCi_3 INT -1) (FCCi_3 INT -1)) ; inputs |
| 613 | () ; outputs |
| 614 | () ; profile action (default) |
| 615 | ) |
| 616 | ; GR set half unit |
| 617 | (unit u-set-hilo "GR Set Half" () |
| 618 | 1 1 ; issue done |
| 619 | () ; state |
| 620 | () ; inputs |
| 621 | ((GRkhi INT -1) (GRklo INT -1)) ; outputs |
| 622 | () ; profile action (default) |
| 623 | ) |
| 624 | ; GR load unit -- TODO doesn't handle quad |
| 625 | (unit u-gr-load "GR Load Unit" () |
| 626 | 1 1 ; issue done |
| 627 | () ; state |
| 628 | ((GRi INT -1) (GRj INT -1)) ; inputs |
| 629 | ((GRk INT -1) (GRdoublek INT -1)) ; outputs |
| 630 | () ; profile action (default) |
| 631 | ) |
| 632 | ; GR store unit -- TODO doesn't handle quad |
| 633 | (unit u-gr-store "GR Store Unit" () |
| 634 | 1 1 ; issue done |
| 635 | () ; state |
| 636 | ((GRi INT -1) (GRj INT -1) (GRk INT -1) (GRdoublek INT -1)) ; inputs |
| 637 | () ; outputs |
| 638 | () ; profile action (default) |
| 639 | ) |
| 640 | ; FR load unit -- TODO doesn't handle quad |
| 641 | (unit u-fr-load "FR Load Unit" () |
| 642 | 1 1 ; issue done |
| 643 | () ; state |
| 644 | ((GRi INT -1) (GRj INT -1)) ; inputs |
| 645 | ((FRintk INT -1) (FRdoublek INT -1)) ; outputs |
| 646 | () ; profile action (default) |
| 647 | ) |
| 648 | ; FR store unit -- TODO doesn't handle quad |
| 649 | (unit u-fr-store "FR Store Unit" () |
| 650 | 1 1 ; issue done |
| 651 | () ; state |
| 652 | ((GRi INT -1) (GRj INT -1) (FRintk INT -1) (FRdoublek INT -1)) ; inputs |
| 653 | () ; outputs |
| 654 | () ; profile action (default) |
| 655 | ) |
| 656 | ; Swap unit |
| 657 | (unit u-swap "Swap Unit" () |
| 658 | 1 1 ; issue done |
| 659 | () ; state |
| 660 | ((GRi INT -1) (GRj INT -1)) ; inputs |
| 661 | ((GRk INT -1)) ; outputs |
| 662 | () ; profile action (default) |
| 663 | ) |
| 664 | ; FR Move to GR unit |
| 665 | (unit u-fr2gr "FR Move to GR Unit" () |
| 666 | 1 1 ; issue done |
| 667 | () ; state |
| 668 | ((FRintk INT -1)) ; inputs |
| 669 | ((GRj INT -1)) ; outputs |
| 670 | () ; profile action (default) |
| 671 | ) |
| 672 | ; SPR Move to GR unit |
| 673 | (unit u-spr2gr "SPR Move to GR Unit" () |
| 674 | 1 1 ; issue done |
| 675 | () ; state |
| 676 | ((spr INT -1)) ; inputs |
| 677 | ((GRj INT -1)) ; outputs |
| 678 | () ; profile action (default) |
| 679 | ) |
| 680 | ; GR Move to FR unit |
| 681 | (unit u-gr2fr "GR Move to FR Unit" () |
| 682 | 1 1 ; issue done |
| 683 | () ; state |
| 684 | ((GRj INT -1)) ; inputs |
| 685 | ((FRintk INT -1)) ; outputs |
| 686 | () ; profile action (default) |
| 687 | ) |
| 688 | ; GR Move to SPR unit |
| 689 | (unit u-gr2spr "GR Move to SPR Unit" () |
| 690 | 1 1 ; issue done |
| 691 | () ; state |
| 692 | ((GRj INT -1)) ; inputs |
| 693 | ((spr INT -1)) ; outputs |
| 694 | () ; profile action (default) |
| 695 | ) |
| 696 | ; Media unit M1 -- see table 13-8 in the fr400 LSI |
| 697 | (unit u-media-1 "Media-1 unit" () |
| 698 | 1 1 ; issue done |
| 699 | () ; state |
| 700 | ((FRinti INT -1) (FRintj INT -1)) ; inputs |
| 701 | ((FRintk INT -1)) ; outputs |
| 702 | () ; profile action (default) |
| 703 | ) |
| 704 | (unit u-media-1-quad "Media-1-quad unit" () |
| 705 | 1 1 ; issue done |
| 706 | () ; state |
| 707 | ((FRinti INT -1) (FRintj INT -1)) ; inputs |
| 708 | ((FRintk INT -1)) ; outputs |
| 709 | () ; profile action (default) |
| 710 | ) |
| 711 | (unit u-media-hilo "Media-hilo unit -- a variation of the Media-1 unit" () |
| 712 | 1 1 ; issue done |
| 713 | () ; state |
| 714 | () ; inputs |
| 715 | ((FRkhi INT -1) (FRklo INT -1)) ; outputs |
| 716 | () ; profile action (default) |
| 717 | ) |
| 718 | ; Media unit M2 -- see table 13-8 in the fr400 LSI |
| 719 | (unit u-media-2 "Media-2 unit" () |
| 720 | 1 1 ; issue done |
| 721 | () ; state |
| 722 | ((FRinti INT -1) (FRintj INT -1)) ; inputs |
| 723 | ((ACC40Sk INT -1) (ACC40Uk INT -1)) ; outputs |
| 724 | () ; profile action (default) |
| 725 | ) |
| 726 | (unit u-media-2-quad "Media-2-quad unit" () |
| 727 | 1 1 ; issue done |
| 728 | () ; state |
| 729 | ((FRinti INT -1) (FRintj INT -1)) ; inputs |
| 730 | ((ACC40Sk INT -1) (ACC40Uk INT -1)) ; outputs |
| 731 | () ; profile action (default) |
| 732 | ) |
| 733 | (unit u-media-2-acc "Media-2-acc unit" () |
| 734 | 1 1 ; issue done |
| 735 | () ; state |
| 736 | ((ACC40Si INT -1)) ; inputs |
| 737 | ((ACC40Sk INT -1)) ; outputs |
| 738 | () ; profile action (default) |
| 739 | ) |
| 740 | (unit u-media-2-acc-dual "Media-2-acc-dual unit" () |
| 741 | 1 1 ; issue done |
| 742 | () ; state |
| 743 | ((ACC40Si INT -1)) ; inputs |
| 744 | ((ACC40Sk INT -1)) ; outputs |
| 745 | () ; profile action (default) |
| 746 | ) |
| 747 | (unit u-media-2-add-sub "Media-2-add-sub unit" () |
| 748 | 1 1 ; issue done |
| 749 | () ; state |
| 750 | ((ACC40Si INT -1)) ; inputs |
| 751 | ((ACC40Sk INT -1)) ; outputs |
| 752 | () ; profile action (default) |
| 753 | ) |
| 754 | (unit u-media-2-add-sub-dual "Media-2-add-sub-dual unit" () |
| 755 | 1 1 ; issue done |
| 756 | () ; state |
| 757 | ((ACC40Si INT -1)) ; inputs |
| 758 | ((ACC40Sk INT -1)) ; outputs |
| 759 | () ; profile action (default) |
| 760 | ) |
| 761 | ; Media unit M3 -- see table 13-8 in the fr400 LSI |
| 762 | (unit u-media-3 "Media-3 unit" () |
| 763 | 1 1 ; issue done |
| 764 | () ; state |
| 765 | ((FRinti INT -1) (FRintj INT -1)) ; inputs |
| 766 | ((FRintk INT -1)) ; outputs |
| 767 | () ; profile action (default) |
| 768 | ) |
| 769 | (unit u-media-3-dual "Media-3-dual unit" () |
| 770 | 1 1 ; issue done |
| 771 | () ; state |
| 772 | ((FRinti INT -1)) ; inputs |
| 773 | ((FRintk INT -1)) ; outputs |
| 774 | () ; profile action (default) |
| 775 | ) |
| 776 | (unit u-media-3-quad "Media-3-quad unit" () |
| 777 | 1 1 ; issue done |
| 778 | () ; state |
| 779 | ((FRinti INT -1) (FRintj INT -1)) ; inputs |
| 780 | ((FRintk INT -1)) ; outputs |
| 781 | () ; profile action (default) |
| 782 | ) |
| 783 | ; Media unit M4 -- see table 13-8 in the fr400 LSI |
| 784 | (unit u-media-4 "Media-4 unit" () |
| 785 | 1 1 ; issue done |
| 786 | () ; state |
| 787 | ((ACC40Si INT -1) (FRintj INT -1)) ; inputs |
| 788 | ((ACC40Sk INT -1) (FRintk INT -1)) ; outputs |
| 789 | () ; profile action (default) |
| 790 | ) |
| 791 | (unit u-media-4-accg "Media-4-accg unit" () |
| 792 | 1 1 ; issue done |
| 793 | () ; state |
| 794 | ((ACCGi INT -1) (FRinti INT -1)) ; inputs |
| 795 | ((ACCGk INT -1) (FRintk INT -1)) ; outputs |
| 796 | () ; profile action (default) |
| 797 | ) |
| 798 | (unit u-media-4-acc-dual "Media-4-acc-dual unit" () |
| 799 | 1 1 ; issue done |
| 800 | () ; state |
| 801 | ((ACC40Si INT -1)) ; inputs |
| 802 | ((FRintk INT -1)) ; outputs |
| 803 | () ; profile action (default) |
| 804 | ) |
| 805 | ; Media unit M6 -- see table 13-8 in the fr400 LSI |
| 806 | (unit u-media-6 "Media-6 unit" () |
| 807 | 1 1 ; issue done |
| 808 | () ; state |
| 809 | ((FRinti INT -1)) ; inputs |
| 810 | ((FRintk INT -1)) ; outputs |
| 811 | () ; profile action (default) |
| 812 | ) |
| 813 | ; Media unit M7 -- see table 13-8 in the fr400 LSI |
| 814 | (unit u-media-7 "Media-1 unit" () |
| 815 | 1 1 ; issue done |
| 816 | () ; state |
| 817 | ((FRinti INT -1) (FRintj INT -1)) ; inputs |
| 818 | ((FCCk INT -1)) ; outputs |
| 819 | () ; profile action (default) |
| 820 | ) |
| 821 | ; Media Dual Expand unit |
| 822 | (unit u-media-dual-expand "Media Dual Expand unit" () |
| 823 | 1 1 ; issue done |
| 824 | () ; state |
| 825 | ((FRinti INT -1)) ; inputs |
| 826 | ((FRintk INT -1)) ; outputs |
| 827 | () ; profile action (default) |
| 828 | ) |
| 829 | ; Media Dual half to byte unit |
| 830 | (unit u-media-dual-htob "Media Half to byte" () |
| 831 | 1 1 ; issue done |
| 832 | () ; state |
| 833 | ((FRintj INT -1)) ; inputs |
| 834 | ((FRintk INT -1)) ; outputs |
| 835 | () ; profile action (default) |
| 836 | ) |
| 837 | ; Barrier unit |
| 838 | (unit u-barrier "Barrier unit" () |
| 839 | 1 1 ; issue done |
| 840 | () ; state |
| 841 | () ; inputs |
| 842 | () ; outputs |
| 843 | () ; profile action (default) |
| 844 | ) |
| 845 | ; Memory Barrier unit |
| 846 | (unit u-membar "Memory Barrier unit" () |
| 847 | 1 1 ; issue done |
| 848 | () ; state |
| 849 | () ; inputs |
| 850 | () ; outputs |
| 851 | () ; profile action (default) |
| 852 | ) |
| 853 | ; Insn cache invalidate unit |
| 854 | (unit u-ici "Insn cache invalidate unit" () |
| 855 | 1 1 ; issue done |
| 856 | () ; state |
| 857 | ((GRi INT -1) (GRj INT -1)) ; inputs |
| 858 | () ; outputs |
| 859 | () ; profile action (default) |
| 860 | ) |
| 861 | ; Data cache invalidate unit |
| 862 | (unit u-dci "Data cache invalidate unit" () |
| 863 | 1 1 ; issue done |
| 864 | () ; state |
| 865 | ((GRi INT -1) (GRj INT -1)) ; inputs |
| 866 | () ; outputs |
| 867 | () ; profile action (default) |
| 868 | ) |
| 869 | ; Data cache flush unit |
| 870 | (unit u-dcf "Data cache flush unit" () |
| 871 | 1 1 ; issue done |
| 872 | () ; state |
| 873 | ((GRi INT -1) (GRj INT -1)) ; inputs |
| 874 | () ; outputs |
| 875 | () ; profile action (default) |
| 876 | ) |
| 877 | ; Insn cache preload unit |
| 878 | (unit u-icpl "Insn cache preload unit" () |
| 879 | 1 1 ; issue done |
| 880 | () ; state |
| 881 | ((GRi INT -1) (GRj INT -1)) ; inputs |
| 882 | () ; outputs |
| 883 | () ; profile action (default) |
| 884 | ) |
| 885 | ; Data cache preload unit |
| 886 | (unit u-dcpl "Data cache preload unit" () |
| 887 | 1 1 ; issue done |
| 888 | () ; state |
| 889 | ((GRi INT -1) (GRj INT -1)) ; inputs |
| 890 | () ; outputs |
| 891 | () ; profile action (default) |
| 892 | ) |
| 893 | ; Insn cache unlock unit |
| 894 | (unit u-icul "Insn cache unlock unit" () |
| 895 | 1 1 ; issue done |
| 896 | () ; state |
| 897 | ((GRi INT -1) (GRj INT -1)) ; inputs |
| 898 | () ; outputs |
| 899 | () ; profile action (default) |
| 900 | ) |
| 901 | ; Data cache unlock unit |
| 902 | (unit u-dcul "Data cache unlock unit" () |
| 903 | 1 1 ; issue done |
| 904 | () ; state |
| 905 | ((GRi INT -1) (GRj INT -1)) ; inputs |
| 906 | () ; outputs |
| 907 | () ; profile action (default) |
| 908 | ) |
| 909 | ) |
| 910 | \f |
| 911 | ; Simple machine - single issue integer machine |
| 912 | (define-mach |
| 913 | (name simple) |
| 914 | (comment "Simple single issue integer cpu") |
| 915 | (cpu frvbf) |
| 916 | ) |
| 917 | (define-model |
| 918 | (name simple) (comment "Simple model") (attrs) |
| 919 | (mach simple) |
| 920 | (pipeline all "" () ((fetch) (decode) (execute) (writeback))) |
| 921 | ; `state' is a list of variables for recording model state |
| 922 | (state) |
| 923 | (unit u-exec "Execution Unit" () |
| 924 | 1 1 ; issue done |
| 925 | () ; state |
| 926 | () ; inputs |
| 927 | () ; outputs |
| 928 | () ; profile action (default) |
| 929 | ) |
| 930 | ) |
| 931 | \f |
| 932 | ; The instruction fetch/execute cycle. |
| 933 | ; |
| 934 | ; This is how to fetch and decode an instruction. |
| 935 | ; Leave it out for now |
| 936 | |
| 937 | ; (define-extract (const SI 0)) |
| 938 | |
| 939 | ; This is how to execute a decoded instruction. |
| 940 | ; Leave it out for now |
| 941 | |
| 942 | ; (define-execute (const SI 0)) |
| 943 | \f |
| 944 | ; An attribute to describe which unit an insn runs in. |
| 945 | (define-attr |
| 946 | (for insn) |
| 947 | (type enum) |
| 948 | (name UNIT) |
| 949 | (comment "parallel execution pipeline selection") |
| 950 | ; The order of declaration is significant. |
| 951 | ; See the *_unit_mapping tables in frv.opc |
| 952 | ; Keep variations on the same unit together. |
| 953 | ; Keep the '01' variant immediately after the '1' variant in each unit. |
| 954 | ; Keep the 'ALL' variations immediately after the last numbered variant in each unit. |
| 955 | (values NIL |
| 956 | I0 I1 I01 IALL |
| 957 | FM0 FM1 FM01 FMALL FMLOW |
| 958 | B0 B1 B01 |
| 959 | C |
| 960 | MULT-DIV ; multiply/division slotted differently on different machines |
| 961 | LOAD ; loads slotted differently on different machines |
| 962 | STORE ; store slotted differently on different machines |
| 963 | SCAN ; scan, scani slotted differently on different machines |
| 964 | DCPL ; dcpl slotted differently on different machines |
| 965 | MDUALACC ; media dual acc slotted differently on different machines |
| 966 | MCLRACC-1; mclracc A==1 slotted differently on different machines |
| 967 | NUM_UNITS |
| 968 | ) |
| 969 | ) |
| 970 | ; Attributes to describe major categories of insns |
| 971 | (define-attr |
| 972 | (for insn) |
| 973 | (type enum) |
| 974 | (name FR400-MAJOR) |
| 975 | (comment "fr400 major insn categories") |
| 976 | ; The order of declaration is significant. Keep variations on the same major |
| 977 | ; together. |
| 978 | (values NONE |
| 979 | I-1 I-2 I-3 I-4 I-5 |
| 980 | B-1 B-2 B-3 B-4 B-5 B-6 |
| 981 | C-1 C-2 |
| 982 | M-1 M-2 |
| 983 | ) |
| 984 | ) |
| 985 | (define-attr |
| 986 | (for insn) |
| 987 | (type enum) |
| 988 | (name FR500-MAJOR) |
| 989 | (comment "fr500 major insn categories") |
| 990 | ; The order of declaration is significant. Keep variations on the same major |
| 991 | ; together. |
| 992 | (values NONE |
| 993 | I-1 I-2 I-3 I-4 I-5 I-6 |
| 994 | B-1 B-2 B-3 B-4 B-5 B-6 |
| 995 | C-1 C-2 |
| 996 | F-1 F-2 F-3 F-4 F-5 F-6 F-7 F-8 |
| 997 | M-1 M-2 M-3 M-4 M-5 M-6 M-7 M-8 |
| 998 | ) |
| 999 | ) |
| 1000 | ; Privileged insn |
| 1001 | (define-attr |
| 1002 | (for insn) |
| 1003 | (type boolean) |
| 1004 | (name PRIVILEGED) |
| 1005 | (comment "insn only allowed in supervisor mode") |
| 1006 | ) |
| 1007 | ; Non-Excepting insn |
| 1008 | (define-attr |
| 1009 | (for insn) |
| 1010 | (type boolean) |
| 1011 | (name NON-EXCEPTING) |
| 1012 | (comment "non-excepting insn") |
| 1013 | ) |
| 1014 | ; Conditional insn |
| 1015 | (define-attr |
| 1016 | (for insn) |
| 1017 | (type boolean) |
| 1018 | (name CONDITIONAL) |
| 1019 | (comment "conditional insn") |
| 1020 | ) |
| 1021 | ; insn accesses FR registers |
| 1022 | (define-attr |
| 1023 | (for insn) |
| 1024 | (type boolean) |
| 1025 | (name FR-ACCESS) |
| 1026 | (comment "insn accesses FR registers") |
| 1027 | ) |
| 1028 | ; insn preserves MSR.OVF |
| 1029 | (define-attr |
| 1030 | (for insn) |
| 1031 | (type boolean) |
| 1032 | (name PRESERVE-OVF) |
| 1033 | (comment "Preserve value of MSR.OVF") |
| 1034 | ) |
| 1035 | ; null attribute -- used as a place holder for where an attribue is required. |
| 1036 | (define-attr |
| 1037 | (for insn) |
| 1038 | (type boolean) |
| 1039 | (name NA) |
| 1040 | (comment "placeholder attribute") |
| 1041 | (attrs META) ; do not define in any generated file for now |
| 1042 | ) |
| 1043 | |
| 1044 | ; IDOC attribute for instruction documentation. |
| 1045 | |
| 1046 | (define-attr |
| 1047 | (for insn) |
| 1048 | (type enum) |
| 1049 | (name IDOC) |
| 1050 | (comment "insn kind for documentation") |
| 1051 | (attrs META) |
| 1052 | (values |
| 1053 | (MEM - () "Memory") |
| 1054 | (ALU - () "ALU") |
| 1055 | (FPU - () "FPU") |
| 1056 | (BR - () "Branch") |
| 1057 | (PRIV - () "Priviledged") |
| 1058 | (MISC - () "Miscellaneous") |
| 1059 | ) |
| 1060 | ) |
| 1061 | \f |
| 1062 | ; Instruction fields. |
| 1063 | ; |
| 1064 | ; Attributes: |
| 1065 | ; PCREL-ADDR: pc relative value (for reloc and disassembly purposes) |
| 1066 | ; ABS-ADDR: absolute address (for reloc and disassembly purposes?) |
| 1067 | ; RESERVED: bits are not used to decode insn, must be all 0 |
| 1068 | (dnf f-pack "packing bit" () 31 1) |
| 1069 | (dnf f-op "primary opcode" () 24 7) |
| 1070 | (dnf f-ope1 "extended opcode" () 11 6) |
| 1071 | (dnf f-ope2 "extended opcode" () 9 4) |
| 1072 | (dnf f-ope3 "extended opcode" () 15 3) |
| 1073 | (dnf f-ope4 "extended opcode" () 7 2) |
| 1074 | |
| 1075 | (dnf f-GRi "source register 1" () 17 6) |
| 1076 | (dnf f-GRj "source register 2" () 5 6) |
| 1077 | (dnf f-GRk "destination register" () 30 6) |
| 1078 | |
| 1079 | (dnf f-FRi "source register 1" () 17 6) |
| 1080 | (dnf f-FRj "source register 2" () 5 6) |
| 1081 | (dnf f-FRk "destination register" () 30 6) |
| 1082 | |
| 1083 | (dnf f-CPRi "source register 1" () 17 6) |
| 1084 | (dnf f-CPRj "source register 2" () 5 6) |
| 1085 | (dnf f-CPRk "destination register" () 30 6) |
| 1086 | |
| 1087 | (dnf f-ACCGi "source register" () 17 6) |
| 1088 | (dnf f-ACCGk "destination register" () 30 6) |
| 1089 | |
| 1090 | (dnf f-ACC40Si "40 bit signed accumulator" () 17 6) |
| 1091 | (dnf f-ACC40Ui "40 bit unsigned accumulator" () 17 6) |
| 1092 | (dnf f-ACC40Sk "40 bit accumulator" () 30 6) |
| 1093 | (dnf f-ACC40Uk "40 bit accumulator" () 30 6) |
| 1094 | |
| 1095 | (dnf f-CRi "source register" () 14 3) |
| 1096 | (dnf f-CRj "source register" () 2 3) |
| 1097 | (dnf f-CRk "destination register" () 27 3) |
| 1098 | (dnf f-CCi "condition register" () 11 3) |
| 1099 | |
| 1100 | (df f-CRj_int "target cr for ck insns" () 26 2 UINT |
| 1101 | ((value pc) (sub WI value 4)) |
| 1102 | ((value pc) (add WI value 4)) |
| 1103 | ) |
| 1104 | (dnf f-CRj_float "target cr for fck insns" () 26 2) |
| 1105 | |
| 1106 | (dnf f-ICCi_1 "condition register" () 11 2) |
| 1107 | (dnf f-ICCi_2 "condition register" () 26 2) |
| 1108 | (dnf f-ICCi_3 "condition register" () 1 2) |
| 1109 | (dnf f-FCCi_1 "condition register" () 11 2) |
| 1110 | (dnf f-FCCi_2 "condition register" () 26 2) |
| 1111 | (dnf f-FCCi_3 "condition register" () 1 2) |
| 1112 | (dnf f-FCCk "condition register" () 26 2) |
| 1113 | (dnf f-eir "exception insn register" () 17 6) |
| 1114 | |
| 1115 | (df f-s10 "10 bit sign extended" () 9 10 INT #f #f) |
| 1116 | (df f-s12 "12 bit sign extended" () 11 12 INT #f #f) |
| 1117 | (df f-d12 "12 bit sign extended" () 11 12 INT #f #f) |
| 1118 | (df f-u16 "16 bit unsigned" () 15 16 UINT #f #f) |
| 1119 | (df f-s16 "16 bit sign extended" () 15 16 INT #f #f) |
| 1120 | (df f-s6 "6 bit signed" () 5 6 INT #f #f) |
| 1121 | (df f-s6_1 "6 bit signed" () 11 6 INT #f #f) |
| 1122 | (df f-u6 "6 bit unsigned" () 5 6 UINT #f #f) |
| 1123 | (df f-s5 "5 bit signed" () 4 5 INT #f #f) |
| 1124 | |
| 1125 | (df f-u12-h "upper 6 bits of u12" () 17 6 INT #f #f) |
| 1126 | (df f-u12-l "lower 6 bits of u12" () 5 6 UINT #f #f) |
| 1127 | (dnmf f-u12 "12 bit signed immediate" () INT |
| 1128 | (f-u12-h f-u12-l) |
| 1129 | (sequence () ; insert |
| 1130 | (set (ifield f-u12-h) (sra SI (ifield f-u12) 6)) |
| 1131 | (set (ifield f-u12-l) (and (ifield f-u12) #x3f)) |
| 1132 | ) |
| 1133 | (sequence () ; extract |
| 1134 | (set (ifield f-u12) (or (sll (ifield f-u12-h) 6) |
| 1135 | (ifield f-u12-l))) |
| 1136 | ) |
| 1137 | ) |
| 1138 | |
| 1139 | (dnf f-int-cc "integer branch conditions" () 30 4) |
| 1140 | (dnf f-flt-cc "floating branch conditions" () 30 4) |
| 1141 | (df f-cond "conditional arithmetic" () 8 1 UINT #f #f) |
| 1142 | (df f-ccond "lr branch condition" () 12 1 UINT #f #f) |
| 1143 | (df f-hint "2 bit branch prediction hint" () 17 2 UINT #f #f) |
| 1144 | (df f-LI "link indicator" () 25 1 UINT #f #f) |
| 1145 | (df f-lock "cache lock indicator" () 25 1 UINT #f #f) |
| 1146 | (df f-debug "debug mode indicator" () 25 1 UINT #f #f) |
| 1147 | (df f-A "all accumulator bit" () 17 1 UINT #f #f) |
| 1148 | (df f-ae "cache all entries indicator" () 25 1 UINT #f #f) |
| 1149 | |
| 1150 | (dnf f-spr-h "upper 6 bits of spr" () 30 6) |
| 1151 | (dnf f-spr-l "lower 6 bits of spr" () 17 6) |
| 1152 | (dnmf f-spr "special purpose register" () UINT |
| 1153 | (f-spr-h f-spr-l) |
| 1154 | (sequence () ; insert |
| 1155 | (set (ifield f-spr-h) (srl (ifield f-spr) (const 6))) |
| 1156 | (set (ifield f-spr-l) (and (ifield f-spr) (const #x3f))) |
| 1157 | ) |
| 1158 | (sequence () ; extract |
| 1159 | (set (ifield f-spr) (or (sll (ifield f-spr-h) (const 6)) |
| 1160 | (ifield f-spr-l))) |
| 1161 | ) |
| 1162 | ) |
| 1163 | |
| 1164 | (df f-label16 "18 bit pc relative signed offset" (PCREL-ADDR) 15 16 INT |
| 1165 | ((value pc) (sra WI (sub WI value pc) (const 2))) |
| 1166 | ((value pc) (add WI (sll WI value (const 2)) pc)) |
| 1167 | ) |
| 1168 | |
| 1169 | (df f-labelH6 "upper 6 bits of label24" () 30 6 INT #f #f) |
| 1170 | (dnf f-labelL18 "lower 18 bits of label24" () 17 18) |
| 1171 | (dnmf f-label24 "26 bit signed offset" (PCREL-ADDR) INT |
| 1172 | (f-labelH6 f-labelL18) |
| 1173 | ; insert |
| 1174 | (sequence () |
| 1175 | (set (ifield f-labelH6) |
| 1176 | (sra WI (sub (ifield f-label24) pc) (const 20))) |
| 1177 | (set (ifield f-labelL18) |
| 1178 | (and (srl (sub (ifield f-label24) pc) (const 2)) |
| 1179 | (const #x3ffff))) |
| 1180 | ) |
| 1181 | ; extract |
| 1182 | (sequence () |
| 1183 | (set (ifield f-label24) |
| 1184 | (add (sll (or (sll (ifield f-labelH6) (const 18)) |
| 1185 | (ifield f-labelL18)) |
| 1186 | (const 2)) |
| 1187 | pc))) |
| 1188 | ) |
| 1189 | |
| 1190 | (dnf f-ICCi_1-null "null field" (RESERVED) 11 2) |
| 1191 | (dnf f-ICCi_2-null "null field" (RESERVED) 26 2) |
| 1192 | (dnf f-ICCi_3-null "null field" (RESERVED) 1 2) |
| 1193 | (dnf f-FCCi_1-null "null field" (RESERVED) 11 2) |
| 1194 | (dnf f-FCCi_2-null "null field" (RESERVED) 26 2) |
| 1195 | (dnf f-FCCi_3-null "null field" (RESERVED) 1 2) |
| 1196 | (dnf f-rs-null "null field" (RESERVED) 17 6) |
| 1197 | (dnf f-GRi-null "null field" (RESERVED) 17 6) |
| 1198 | (dnf f-GRj-null "null field" (RESERVED) 5 6) |
| 1199 | (dnf f-GRk-null "null field" (RESERVED) 30 6) |
| 1200 | (dnf f-FRi-null "null field" (RESERVED) 17 6) |
| 1201 | (dnf f-FRj-null "null field" (RESERVED) 5 6) |
| 1202 | (dnf f-ACCj-null "null field" (RESERVED) 5 6) |
| 1203 | (dnf f-rd-null "null field" (RESERVED) 30 6) |
| 1204 | (dnf f-cond-null "null field" (RESERVED) 30 4) |
| 1205 | (dnf f-ccond-null "null field" (RESERVED) 12 1) |
| 1206 | (dnf f-s12-null "null field" (RESERVED) 11 12) |
| 1207 | (dnf f-label16-null "null field" (RESERVED) 15 16) |
| 1208 | (dnf f-misc-null-1 "null field" (RESERVED) 30 5) |
| 1209 | (dnf f-misc-null-2 "null field" (RESERVED) 11 6) |
| 1210 | (dnf f-misc-null-3 "null field" (RESERVED) 11 4) |
| 1211 | (dnf f-misc-null-4 "null field" (RESERVED) 17 2) |
| 1212 | (dnf f-misc-null-5 "null field" (RESERVED) 17 16) |
| 1213 | (dnf f-misc-null-6 "null field" (RESERVED) 30 3) |
| 1214 | (dnf f-misc-null-7 "null field" (RESERVED) 17 3) |
| 1215 | (dnf f-misc-null-8 "null field" (RESERVED) 5 3) |
| 1216 | (dnf f-misc-null-9 "null field" (RESERVED) 5 4) |
| 1217 | (dnf f-misc-null-10 "null field" (RESERVED) 16 5) |
| 1218 | (dnf f-misc-null-11 "null field" (RESERVED) 5 1) |
| 1219 | |
| 1220 | (dnf f-LI-off "null field" (RESERVED) 25 1) |
| 1221 | (dnf f-LI-on "null field" (RESERVED) 25 1) |
| 1222 | \f |
| 1223 | ; Enums. |
| 1224 | |
| 1225 | ; insn-op: |
| 1226 | ; FIXME: should use die macro or some such |
| 1227 | (define-normal-insn-enum insn-op "insn op enums" () OP_ f-op |
| 1228 | ( |
| 1229 | "00" "01" "02" "03" "04" "05" "06" "07" "08" "09" "0A" "0B" "0C" "0D" "0E" "0F" |
| 1230 | "10" "11" "12" "13" "14" "15" "16" "17" "18" "19" "1A" "1B" "1C" "1D" "1E" "1F" |
| 1231 | "20" "21" "22" "23" "24" "25" "26" "27" "28" "29" "2A" "2B" "2C" "2D" "2E" "2F" |
| 1232 | "30" "31" "32" "33" "34" "35" "36" "37" "38" "39" "3A" "3B" "3C" "3D" "3E" "3F" |
| 1233 | "40" "41" "42" "43" "44" "45" "46" "47" "48" "49" "4A" "4B" "4C" "4D" "4E" "4F" |
| 1234 | "50" "51" "52" "53" "54" "55" "56" "57" "58" "59" "5A" "5B" "5C" "5D" "5E" "5F" |
| 1235 | "60" "61" "62" "63" "64" "65" "66" "67" "68" "69" "6A" "6B" "6C" "6D" "6E" "6F" |
| 1236 | "70" "71" "72" "73" "74" "75" "76" "77" "78" "79" "7A" "7B" "7C" "7D" "7E" "7F" |
| 1237 | ) |
| 1238 | ) |
| 1239 | |
| 1240 | (define-normal-insn-enum insn-ope1 "insn ope enums" () OPE1_ f-ope1 |
| 1241 | ( |
| 1242 | "00" "01" "02" "03" "04" "05" "06" "07" "08" "09" "0A" "0B" "0C" "0D" "0E" "0F" |
| 1243 | "10" "11" "12" "13" "14" "15" "16" "17" "18" "19" "1A" "1B" "1C" "1D" "1E" "1F" |
| 1244 | "20" "21" "22" "23" "24" "25" "26" "27" "28" "29" "2A" "2B" "2C" "2D" "2E" "2F" |
| 1245 | "30" "31" "32" "33" "34" "35" "36" "37" "38" "39" "3A" "3B" "3C" "3D" "3E" "3F" |
| 1246 | ) |
| 1247 | ) |
| 1248 | |
| 1249 | (define-normal-insn-enum insn-ope2 "insn ope enums" () OPE2_ f-ope2 |
| 1250 | ( |
| 1251 | "00" "01" "02" "03" "04" "05" "06" "07" "08" "09" "0A" "0B" "0C" "0D" "0E" "0F" |
| 1252 | ) |
| 1253 | ) |
| 1254 | |
| 1255 | (define-normal-insn-enum insn-ope3 "insn ope enums" () OPE3_ f-ope3 |
| 1256 | ( |
| 1257 | "00" "01" "02" "03" "04" "05" "06" "07" |
| 1258 | ) |
| 1259 | ) |
| 1260 | |
| 1261 | (define-normal-insn-enum insn-ope4 "insn ope enums" () OPE4_ f-ope4 |
| 1262 | ( |
| 1263 | "0" "1" "2" "3" |
| 1264 | ) |
| 1265 | ) |
| 1266 | |
| 1267 | ; int-cc: integer branch conditions |
| 1268 | ; FIXME: should use die macro or some such |
| 1269 | (define-normal-insn-enum int-cc "integer branch cond enums" () ICC_ f-int-cc |
| 1270 | ( |
| 1271 | "nev" "c" "v" "lt" "eq" "ls" "n" "le" |
| 1272 | "ra" "nc" "nv" "ge" "ne" "hi" "p" "gt" |
| 1273 | ) |
| 1274 | ) |
| 1275 | |
| 1276 | ; flt-cc: floating-point/media branch conditions |
| 1277 | ; FIXME: should use die macro or some such |
| 1278 | (define-normal-insn-enum flt-cc "float branch cond enums" () FCC_ f-flt-cc |
| 1279 | ("nev" "u" "gt" "ug" "lt" "ul" "lg" "ne" |
| 1280 | "eq" "ue" "ge" "uge" "le" "ule" "o" "ra") |
| 1281 | ) |
| 1282 | \f |
| 1283 | ; Hardware pieces. |
| 1284 | ; These entries list the elements of the raw hardware. |
| 1285 | ; They're also used to provide tables and other elements of the assembly |
| 1286 | ; language. |
| 1287 | (dnh h-pc "program counter" (PC PROFILE) (pc) () () ()) |
| 1288 | |
| 1289 | ; The PSR. The individual fields are referenced more than the entire |
| 1290 | ; register, so reference them directly. We can assemble the |
| 1291 | ; entire register contents when necessary. |
| 1292 | ; |
| 1293 | (dsh h-psr_imple "PSR.IMPLE" () (register UQI)) |
| 1294 | (dsh h-psr_ver "PSR.VER" () (register UQI)) |
| 1295 | (dsh h-psr_ice "PSR.ICE bit" () (register BI)) |
| 1296 | (dsh h-psr_nem "PSR.NEM bit" () (register BI)) |
| 1297 | (dsh h-psr_cm "PSR.CM bit" () (register BI)) |
| 1298 | (dsh h-psr_be "PSR.BE bit" () (register BI)) |
| 1299 | (dsh h-psr_esr "PSR.ESR bit" () (register BI)) |
| 1300 | (dsh h-psr_ef "PSR.EF bit" () (register BI)) |
| 1301 | (dsh h-psr_em "PSR.EM bit" () (register BI)) |
| 1302 | (dsh h-psr_pil "PSR.PIL " () (register UQI)) |
| 1303 | (dsh h-psr_ps "PSR.PS bit" () (register BI)) |
| 1304 | (dsh h-psr_et "PSR.ET bit" () (register BI)) |
| 1305 | |
| 1306 | ; PSR.S requires special handling because the shadow registers (SR0-SR4) must |
| 1307 | ; be switched with GR4-GR7 when changing from user to supervisor mode or |
| 1308 | ; vice-versa. |
| 1309 | (define-hardware |
| 1310 | (name h-psr_s) |
| 1311 | (comment "PSR.S bit") |
| 1312 | (attrs) |
| 1313 | (type register BI) |
| 1314 | (get) |
| 1315 | (set (newval) (c-call VOID "@cpu@_h_psr_s_set_handler" newval)) |
| 1316 | ) |
| 1317 | |
| 1318 | ; The TBR. The individual bits are referenced more than the entire |
| 1319 | ; register, so reference them directly. We can assemble the |
| 1320 | ; entire register contents when necessary. |
| 1321 | ; |
| 1322 | (dsh h-tbr_tba "TBR.TBA" () (register UWI)) |
| 1323 | (dsh h-tbr_tt "TBR.TT" () (register UQI)) |
| 1324 | |
| 1325 | ; The BPSR. The individual bits are referenced more than the entire |
| 1326 | ; register, so reference them directly. We can assemble the |
| 1327 | ; entire register contents when necessary. |
| 1328 | ; |
| 1329 | (dsh h-bpsr_bs "PSR.S bit" () (register BI)) |
| 1330 | (dsh h-bpsr_bet "PSR.ET bit" () (register BI)) |
| 1331 | |
| 1332 | ; General registers |
| 1333 | ; |
| 1334 | (define-keyword |
| 1335 | (name gr-names) |
| 1336 | (print-name h-gr) |
| 1337 | (prefix "") |
| 1338 | (values |
| 1339 | (sp 1) (fp 2) |
| 1340 | (gr0 0)(gr1 1)(gr2 2)(gr3 3)(gr4 4)(gr5 5)(gr6 6)(gr7 7) |
| 1341 | (gr8 8)(gr9 9)(gr10 10)(gr11 11)(gr12 12)(gr13 13)(gr14 14)(gr15 15) |
| 1342 | (gr16 16)(gr17 17)(gr18 18)(gr19 19)(gr20 20)(gr21 21)(gr22 22)(gr23 23) |
| 1343 | (gr24 24)(gr25 25)(gr26 26)(gr27 27)(gr28 28)(gr29 29)(gr30 30)(gr31 31) |
| 1344 | (gr32 32)(gr33 33)(gr34 34)(gr35 35)(gr36 36)(gr37 37)(gr38 38)(gr39 39) |
| 1345 | (gr40 40)(gr41 41)(gr42 42)(gr43 43)(gr44 44)(gr45 45)(gr46 46)(gr47 47) |
| 1346 | (gr48 48)(gr49 49)(gr50 50)(gr51 51)(gr52 52)(gr53 53)(gr54 54)(gr55 55) |
| 1347 | (gr56 56)(gr57 57)(gr58 58)(gr59 59)(gr60 60)(gr61 61)(gr62 62)(gr63 63) |
| 1348 | ) |
| 1349 | ) |
| 1350 | |
| 1351 | (define-hardware |
| 1352 | (name h-gr) |
| 1353 | (comment "general registers") |
| 1354 | (attrs PROFILE) |
| 1355 | (type register USI (64)) |
| 1356 | (indices extern-keyword gr-names) |
| 1357 | (get (index) (c-call WI "@cpu@_h_gr_get_handler" index)) |
| 1358 | (set (index newval) (c-call VOID "@cpu@_h_gr_set_handler" index newval)) |
| 1359 | ) |
| 1360 | |
| 1361 | ; General Registers as double words |
| 1362 | ; These registers are shadowed onto h-gr |
| 1363 | (define-hardware |
| 1364 | (name h-gr_double) |
| 1365 | (comment "general registers as double words") |
| 1366 | (attrs PROFILE VIRTUAL) |
| 1367 | (type register DI (32)) |
| 1368 | ; FIXME: Need constraint to prohibit odd numbers. |
| 1369 | (indices extern-keyword gr-names) |
| 1370 | (get (index) |
| 1371 | (c-call DI "@cpu@_h_gr_double_get_handler" index)) |
| 1372 | (set (index newval) |
| 1373 | (c-call VOID "@cpu@_h_gr_double_set_handler" index newval)) |
| 1374 | ) |
| 1375 | |
| 1376 | ; General Registers as high and low half words |
| 1377 | ; These registers are shadowed onto h-gr |
| 1378 | (define-hardware |
| 1379 | (name h-gr_hi) |
| 1380 | (comment "general registers as high half word") |
| 1381 | (attrs PROFILE VIRTUAL) |
| 1382 | (type register UHI (64)) |
| 1383 | (indices extern-keyword gr-names) |
| 1384 | (get (index) (c-call UHI "@cpu@_h_gr_hi_get_handler" index)) |
| 1385 | (set (index newval) (c-call VOID "@cpu@_h_gr_hi_set_handler" index newval)) |
| 1386 | ) |
| 1387 | (define-hardware |
| 1388 | (name h-gr_lo) |
| 1389 | (comment "general registers as low half word") |
| 1390 | (attrs PROFILE VIRTUAL) |
| 1391 | (type register UHI (64)) |
| 1392 | (indices extern-keyword gr-names) |
| 1393 | (get (index) (c-call UHI "@cpu@_h_gr_lo_get_handler" index)) |
| 1394 | (set (index newval) (c-call VOID "@cpu@_h_gr_lo_set_handler" index newval)) |
| 1395 | ) |
| 1396 | |
| 1397 | ; Floating Point Registers |
| 1398 | (define-keyword |
| 1399 | (name fr-names) |
| 1400 | (print-name h-fr) |
| 1401 | (prefix "") |
| 1402 | (values |
| 1403 | (fr0 0)(fr1 1)(fr2 2)(fr3 3)(fr4 4)(fr5 5)(fr6 6)(fr7 7) |
| 1404 | (fr8 8)(fr9 9)(fr10 10)(fr11 11)(fr12 12)(fr13 13)(fr14 14)(fr15 15) |
| 1405 | (fr16 16)(fr17 17)(fr18 18)(fr19 19)(fr20 20)(fr21 21)(fr22 22)(fr23 23) |
| 1406 | (fr24 24)(fr25 25)(fr26 26)(fr27 27)(fr28 28)(fr29 29)(fr30 30)(fr31 31) |
| 1407 | (fr32 32)(fr33 33)(fr34 34)(fr35 35)(fr36 36)(fr37 37)(fr38 38)(fr39 39) |
| 1408 | (fr40 40)(fr41 41)(fr42 42)(fr43 43)(fr44 44)(fr45 45)(fr46 46)(fr47 47) |
| 1409 | (fr48 48)(fr49 49)(fr50 50)(fr51 51)(fr52 52)(fr53 53)(fr54 54)(fr55 55) |
| 1410 | (fr56 56)(fr57 57)(fr58 58)(fr59 59)(fr60 60)(fr61 61)(fr62 62)(fr63 63) |
| 1411 | ) |
| 1412 | ) |
| 1413 | |
| 1414 | (define-hardware |
| 1415 | (name h-fr) |
| 1416 | (comment "floating point registers") |
| 1417 | (attrs PROFILE) |
| 1418 | (type register SF (64)) |
| 1419 | (indices extern-keyword fr-names) |
| 1420 | (get (index) (c-call SF "@cpu@_h_fr_get_handler" index)) |
| 1421 | (set (index newval) (c-call VOID "@cpu@_h_fr_set_handler" index newval)) |
| 1422 | ) |
| 1423 | |
| 1424 | ; Floating Point Registers as double precision |
| 1425 | ; These registers are shadowed onto h-fr |
| 1426 | |
| 1427 | (define-hardware |
| 1428 | (name h-fr_double) |
| 1429 | (comment "floating point registers as double precision") |
| 1430 | (attrs PROFILE VIRTUAL) |
| 1431 | (type register DF (32)) |
| 1432 | ; FIXME: Need constraint to prohibit odd numbers. |
| 1433 | (indices extern-keyword fr-names) |
| 1434 | (get (index) |
| 1435 | (c-call DF "@cpu@_h_fr_double_get_handler" index)) |
| 1436 | (set (index newval) |
| 1437 | (c-call VOID "@cpu@_h_fr_double_set_handler" index newval)) |
| 1438 | ) |
| 1439 | |
| 1440 | ; Floating Point Registers as integer words. |
| 1441 | ; These registers are shadowed onto h-fr |
| 1442 | |
| 1443 | (define-hardware |
| 1444 | (name h-fr_int) |
| 1445 | (comment "floating point registers as integers") |
| 1446 | (attrs PROFILE VIRTUAL) |
| 1447 | (type register USI (64)) |
| 1448 | (indices extern-keyword fr-names) |
| 1449 | (get (index) |
| 1450 | (c-call USI "@cpu@_h_fr_int_get_handler" index)) |
| 1451 | (set (index newval) |
| 1452 | (c-call VOID "@cpu@_h_fr_int_set_handler" index newval)) |
| 1453 | ) |
| 1454 | |
| 1455 | ; Floating Point Registers as high and low half words |
| 1456 | ; These registers are shadowed onto h-fr |
| 1457 | (define-hardware |
| 1458 | (name h-fr_hi) |
| 1459 | (comment "floating point registers as unsigned high half word") |
| 1460 | (attrs PROFILE VIRTUAL) |
| 1461 | (type register UHI (64)) |
| 1462 | (indices extern-keyword fr-names) |
| 1463 | (get (regno) (srl (reg h-fr_int regno) 16)) |
| 1464 | (set (regno newval) (set (reg h-fr_int regno) |
| 1465 | (or (and (reg h-fr_int regno) #xffff) |
| 1466 | (sll newval 16)))) |
| 1467 | ) |
| 1468 | (define-hardware |
| 1469 | (name h-fr_lo) |
| 1470 | (comment "floating point registers as unsigned low half word") |
| 1471 | (attrs PROFILE VIRTUAL) |
| 1472 | (type register UHI (64)) |
| 1473 | (indices extern-keyword fr-names) |
| 1474 | (get (regno) (and (reg h-fr_int regno) #xffff)) |
| 1475 | (set (regno newval) (set (reg h-fr_int regno) |
| 1476 | (or (and (reg h-fr_int regno) #xffff0000) |
| 1477 | (and newval #xffff)))) |
| 1478 | ) |
| 1479 | |
| 1480 | ; Floating Point Registers as unsigned bytes |
| 1481 | ; These registers are shadowed onto h-fr |
| 1482 | (define-hardware |
| 1483 | (name h-fr_0) |
| 1484 | (comment "floating point registers as unsigned byte 0") |
| 1485 | (attrs PROFILE VIRTUAL) |
| 1486 | (type register UHI (64)) |
| 1487 | (indices extern-keyword fr-names) |
| 1488 | (get (regno) (and (reg h-fr_int regno) #xff)) |
| 1489 | (set (regno newval) |
| 1490 | (sequence () |
| 1491 | (if (gt USI newval #xff) |
| 1492 | (set newval #xff)) |
| 1493 | (set (reg h-fr_int regno) (or (and (reg h-fr_int regno) #xffffff00) |
| 1494 | newval)))) |
| 1495 | ) |
| 1496 | (define-hardware |
| 1497 | (name h-fr_1) |
| 1498 | (comment "floating point registers as unsigned byte 1") |
| 1499 | (attrs PROFILE VIRTUAL) |
| 1500 | (type register UHI (64)) |
| 1501 | (indices extern-keyword fr-names) |
| 1502 | (get (regno) (and (srl (reg h-fr_int regno) 8) #xff)) |
| 1503 | (set (regno newval) |
| 1504 | (sequence () |
| 1505 | (if (gt USI newval #xff) |
| 1506 | (set newval #xff)) |
| 1507 | (set (reg h-fr_int regno) (or (and (reg h-fr_int regno) #xffff00ff) |
| 1508 | (sll newval 8))))) |
| 1509 | ) |
| 1510 | (define-hardware |
| 1511 | (name h-fr_2) |
| 1512 | (comment "floating point registers as unsigned byte 2") |
| 1513 | (attrs PROFILE VIRTUAL) |
| 1514 | (type register UHI (64)) |
| 1515 | (indices extern-keyword fr-names) |
| 1516 | (get (regno) (and (srl (reg h-fr_int regno) 16) #xff)) |
| 1517 | (set (regno newval) |
| 1518 | (sequence () |
| 1519 | (if (gt USI newval #xff) |
| 1520 | (set newval #xff)) |
| 1521 | (set (reg h-fr_int regno) (or (and (reg h-fr_int regno) #xff00ffff) |
| 1522 | (sll newval 16))))) |
| 1523 | ) |
| 1524 | (define-hardware |
| 1525 | (name h-fr_3) |
| 1526 | (comment "floating point registers as unsigned byte 3") |
| 1527 | (attrs PROFILE VIRTUAL) |
| 1528 | (type register UHI (64)) |
| 1529 | (indices extern-keyword fr-names) |
| 1530 | (get (regno) (and (srl (reg h-fr_int regno) 24) #xff)) |
| 1531 | (set (regno newval) |
| 1532 | (sequence () |
| 1533 | (if (gt USI newval #xff) |
| 1534 | (set newval #xff)) |
| 1535 | (set (reg h-fr_int regno) (or (and (reg h-fr_int regno) #x00ffffff) |
| 1536 | (sll newval 24))))) |
| 1537 | ) |
| 1538 | ; Coprocessor Registers |
| 1539 | ; |
| 1540 | (define-keyword |
| 1541 | (name cpr-names) |
| 1542 | (print-name h-cpr) |
| 1543 | (prefix "") |
| 1544 | (values |
| 1545 | (cpr0 0)(cpr1 1)(cpr2 2)(cpr3 3)(cpr4 4)(cpr5 5)(cpr6 6)(cpr7 7) |
| 1546 | (cpr8 8)(cpr9 9)(cpr10 10)(cpr11 11)(cpr12 12)(cpr13 13)(cpr14 14)(cpr15 15) |
| 1547 | (cpr16 16)(cpr17 17)(cpr18 18)(cpr19 19)(cpr20 20)(cpr21 21)(cpr22 22)(cpr23 23) |
| 1548 | (cpr24 24)(cpr25 25)(cpr26 26)(cpr27 27)(cpr28 28)(cpr29 29)(cpr30 30)(cpr31 31) |
| 1549 | (cpr32 32)(cpr33 33)(cpr34 34)(cpr35 35)(cpr36 36)(cpr37 37)(cpr38 38)(cpr39 39) |
| 1550 | (cpr40 40)(cpr41 41)(cpr42 42)(cpr43 43)(cpr44 44)(cpr45 45)(cpr46 46)(cpr47 47) |
| 1551 | (cpr48 48)(cpr49 49)(cpr50 50)(cpr51 51)(cpr52 52)(cpr53 53)(cpr54 54)(cpr55 55) |
| 1552 | (cpr56 56)(cpr57 57)(cpr58 58)(cpr59 59)(cpr60 60)(cpr61 61)(cpr62 62)(cpr63 63) |
| 1553 | ) |
| 1554 | ) |
| 1555 | |
| 1556 | (define-hardware |
| 1557 | (name h-cpr) |
| 1558 | (comment "coprocessor registers") |
| 1559 | (attrs PROFILE (MACH frv)) |
| 1560 | (type register WI (64)) |
| 1561 | (indices extern-keyword cpr-names) |
| 1562 | ) |
| 1563 | |
| 1564 | ; Coprocessor Registers as double words |
| 1565 | ; These registers are shadowed onto h-cpr |
| 1566 | (define-hardware |
| 1567 | (name h-cpr_double) |
| 1568 | (comment "coprocessor registers as double words") |
| 1569 | (attrs PROFILE VIRTUAL (MACH frv)) |
| 1570 | (type register DI (32)) |
| 1571 | ; FIXME: Need constraint to prohibit odd numbers. |
| 1572 | (indices extern-keyword cpr-names) |
| 1573 | (get (index) |
| 1574 | (c-call DI "@cpu@_h_cpr_double_get_handler" index)) |
| 1575 | (set (index newval) |
| 1576 | (c-call VOID "@cpu@_h_cpr_double_set_handler" index newval)) |
| 1577 | ) |
| 1578 | |
| 1579 | ; Special Purpose Registers |
| 1580 | ; |
| 1581 | (define-keyword |
| 1582 | (name spr-names) |
| 1583 | (print-name h-spr) |
| 1584 | (prefix "") |
| 1585 | (values |
| 1586 | (psr 0) (pcsr 1) (bpcsr 2) (tbr 3) (bpsr 4) |
| 1587 | |
| 1588 | (hsr0 16) (hsr1 17) (hsr2 18) (hsr3 19) |
| 1589 | (hsr4 20) (hsr5 21) (hsr6 22) (hsr7 23) |
| 1590 | (hsr8 24) (hsr9 25) (hsr10 26) (hsr11 27) |
| 1591 | (hsr12 28) (hsr13 29) (hsr14 30) (hsr15 31) |
| 1592 | (hsr16 32) (hsr17 33) (hsr18 34) (hsr19 35) |
| 1593 | (hsr20 36) (hsr21 37) (hsr22 38) (hsr23 39) |
| 1594 | (hsr24 40) (hsr25 41) (hsr26 42) (hsr27 43) |
| 1595 | (hsr28 44) (hsr29 45) (hsr30 46) (hsr31 47) |
| 1596 | (hsr32 48) (hsr33 49) (hsr34 50) (hsr35 51) |
| 1597 | (hsr36 52) (hsr37 53) (hsr38 54) (hsr39 55) |
| 1598 | (hsr40 56) (hsr41 57) (hsr42 58) (hsr43 59) |
| 1599 | (hsr44 60) (hsr45 61) (hsr46 62) (hsr47 63) |
| 1600 | (hsr48 64) (hsr49 65) (hsr50 66) (hsr51 67) |
| 1601 | (hsr52 68) (hsr53 69) (hsr54 70) (hsr55 71) |
| 1602 | (hsr56 72) (hsr57 73) (hsr58 74) (hsr59 75) |
| 1603 | (hsr60 76) (hsr61 77) (hsr62 78) (hsr63 79) |
| 1604 | |
| 1605 | (ccr 256) (cccr 263) (lr 272) (lcr 273) (isr 288) |
| 1606 | |
| 1607 | (neear0 352) (neear1 353) (neear2 354) (neear3 355) |
| 1608 | (neear4 356) (neear5 357) (neear6 358) (neear7 359) |
| 1609 | (neear8 360) (neear9 361) (neear10 362) (neear11 363) |
| 1610 | (neear12 364) (neear13 365) (neear14 366) (neear15 367) |
| 1611 | (neear16 368) (neear17 369) (neear18 370) (neear19 371) |
| 1612 | (neear20 372) (neear21 373) (neear22 374) (neear23 375) |
| 1613 | (neear24 376) (neear25 377) (neear26 378) (neear27 379) |
| 1614 | (neear28 380) (neear29 381) (neear30 382) (neear31 383) |
| 1615 | |
| 1616 | (nesr0 384) (nesr1 385) (nesr2 386) (nesr3 387) |
| 1617 | (nesr4 388) (nesr5 389) (nesr6 390) (nesr7 391) |
| 1618 | (nesr8 392) (nesr9 393) (nesr10 394) (nesr11 395) |
| 1619 | (nesr12 396) (nesr13 397) (nesr14 398) (nesr15 399) |
| 1620 | (nesr16 400) (nesr17 401) (nesr18 402) (nesr19 403) |
| 1621 | (nesr20 404) (nesr21 405) (nesr22 406) (nesr23 407) |
| 1622 | (nesr24 408) (nesr25 409) (nesr26 410) (nesr27 411) |
| 1623 | (nesr28 412) (nesr29 413) (nesr30 414) (nesr31 415) |
| 1624 | |
| 1625 | (necr 416) |
| 1626 | |
| 1627 | (gner0 432) (gner1 433) |
| 1628 | |
| 1629 | (fner0 434) (fner1 435) |
| 1630 | |
| 1631 | (epcr0 512) (epcr1 513) (epcr2 514) (epcr3 515) |
| 1632 | (epcr4 516) (epcr5 517) (epcr6 518) (epcr7 519) |
| 1633 | (epcr8 520) (epcr9 521) (epcr10 522) (epcr11 523) |
| 1634 | (epcr12 524) (epcr13 525) (epcr14 526) (epcr15 527) |
| 1635 | (epcr16 528) (epcr17 529) (epcr18 530) (epcr19 531) |
| 1636 | (epcr20 532) (epcr21 533) (epcr22 534) (epcr23 535) |
| 1637 | (epcr24 536) (epcr25 537) (epcr26 538) (epcr27 539) |
| 1638 | (epcr28 540) (epcr29 541) (epcr30 542) (epcr31 543) |
| 1639 | (epcr32 544) (epcr33 545) (epcr34 546) (epcr35 547) |
| 1640 | (epcr36 548) (epcr37 549) (epcr38 550) (epcr39 551) |
| 1641 | (epcr40 552) (epcr41 553) (epcr42 554) (epcr43 555) |
| 1642 | (epcr44 556) (epcr45 557) (epcr46 558) (epcr47 559) |
| 1643 | (epcr48 560) (epcr49 561) (epcr50 562) (epcr51 563) |
| 1644 | (epcr52 564) (epcr53 565) (epcr54 566) (epcr55 567) |
| 1645 | (epcr56 568) (epcr57 569) (epcr58 570) (epcr59 571) |
| 1646 | (epcr60 572) (epcr61 573) (epcr62 574) (epcr63 575) |
| 1647 | |
| 1648 | (esr0 576) (esr1 577) (esr2 578) (esr3 579) |
| 1649 | (esr4 580) (esr5 581) (esr6 582) (esr7 583) |
| 1650 | (esr8 584) (esr9 585) (esr10 586) (esr11 587) |
| 1651 | (esr12 588) (esr13 589) (esr14 590) (esr15 591) |
| 1652 | (esr16 592) (esr17 593) (esr18 594) (esr19 595) |
| 1653 | (esr20 596) (esr21 597) (esr22 598) (esr23 599) |
| 1654 | (esr24 600) (esr25 601) (esr26 602) (esr27 603) |
| 1655 | (esr28 604) (esr29 605) (esr30 606) (esr31 607) |
| 1656 | (esr32 608) (esr33 609) (esr34 610) (esr35 611) |
| 1657 | (esr36 612) (esr37 613) (esr38 614) (esr39 615) |
| 1658 | (esr40 616) (esr41 617) (esr42 618) (esr43 619) |
| 1659 | (esr44 620) (esr45 621) (esr46 622) (esr47 623) |
| 1660 | (esr48 624) (esr49 625) (esr50 626) (esr51 627) |
| 1661 | (esr52 628) (esr53 629) (esr54 630) (esr55 631) |
| 1662 | (esr56 632) (esr57 633) (esr58 634) (esr59 635) |
| 1663 | (esr60 636) (esr61 637) (esr62 638) (esr63 639) |
| 1664 | |
| 1665 | (eir0 640) (eir1 641) (eir2 642) (eir3 643) |
| 1666 | (eir4 644) (eir5 645) (eir6 646) (eir7 647) |
| 1667 | (eir8 648) (eir9 649) (eir10 650) (eir11 651) |
| 1668 | (eir12 652) (eir13 653) (eir14 654) (eir15 655) |
| 1669 | (eir16 656) (eir17 657) (eir18 658) (eir19 659) |
| 1670 | (eir20 660) (eir21 661) (eir22 662) (eir23 663) |
| 1671 | (eir24 664) (eir25 665) (eir26 666) (eir27 667) |
| 1672 | (eir28 668) (eir29 669) (eir30 670) (eir31 671) |
| 1673 | |
| 1674 | (esfr0 672) (esfr1 673) |
| 1675 | |
| 1676 | (sr0 768) (sr1 769) (sr2 770) (sr3 771) |
| 1677 | |
| 1678 | (fsr0 1024) (fsr1 1025) (fsr2 1026) (fsr3 1027) |
| 1679 | (fsr4 1028) (fsr5 1029) (fsr6 1030) (fsr7 1031) |
| 1680 | (fsr8 1032) (fsr9 1033) (fsr10 1034) (fsr11 1035) |
| 1681 | (fsr12 1036) (fsr13 1037) (fsr14 1038) (fsr15 1039) |
| 1682 | (fsr16 1040) (fsr17 1041) (fsr18 1042) (fsr19 1043) |
| 1683 | (fsr20 1044) (fsr21 1045) (fsr22 1046) (fsr23 1047) |
| 1684 | (fsr24 1048) (fsr25 1049) (fsr26 1050) (fsr27 1051) |
| 1685 | (fsr28 1052) (fsr29 1053) (fsr30 1054) (fsr31 1055) |
| 1686 | (fsr32 1056) (fsr33 1057) (fsr34 1058) (fsr35 1059) |
| 1687 | (fsr36 1060) (fsr37 1061) (fsr38 1062) (fsr39 1063) |
| 1688 | (fsr40 1064) (fsr41 1065) (fsr42 1066) (fsr43 1067) |
| 1689 | (fsr44 1068) (fsr45 1069) (fsr46 1070) (fsr47 1071) |
| 1690 | (fsr48 1072) (fsr49 1073) (fsr50 1074) (fsr51 1075) |
| 1691 | (fsr52 1076) (fsr53 1077) (fsr54 1078) (fsr55 1079) |
| 1692 | (fsr56 1080) (fsr57 1081) (fsr58 1082) (fsr59 1083) |
| 1693 | (fsr60 1084) (fsr61 1085) (fsr62 1086) (fsr63 1087) |
| 1694 | |
| 1695 | ; FQ0-FQ31 are 64 bit registers. |
| 1696 | ; These names allow access to the upper 32 bits of the FQ registers. |
| 1697 | (fqop0 1088) (fqop1 1090) (fqop2 1092) (fqop3 1094) |
| 1698 | (fqop4 1096) (fqop5 1098) (fqop6 1100) (fqop7 1102) |
| 1699 | (fqop8 1104) (fqop9 1106) (fqop10 1108) (fqop11 1110) |
| 1700 | (fqop12 1112) (fqop13 1114) (fqop14 1116) (fqop15 1118) |
| 1701 | (fqop16 1120) (fqop17 1122) (fqop18 1124) (fqop19 1126) |
| 1702 | (fqop20 1128) (fqop21 1130) (fqop22 1132) (fqop23 1134) |
| 1703 | (fqop24 1136) (fqop25 1138) (fqop26 1140) (fqop27 1142) |
| 1704 | (fqop28 1144) (fqop29 1146) (fqop30 1148) (fqop31 1150) |
| 1705 | ; These names allow access to the lower 32 bits of the FQ registers. |
| 1706 | (fqst0 1089) (fqst1 1091) (fqst2 1093) (fqst3 1095) |
| 1707 | (fqst4 1097) (fqst5 1099) (fqst6 1101) (fqst7 1103) |
| 1708 | (fqst8 1105) (fqst9 1107) (fqst10 1109) (fqst11 1111) |
| 1709 | (fqst12 1113) (fqst13 1115) (fqst14 1117) (fqst15 1119) |
| 1710 | (fqst16 1121) (fqst17 1123) (fqst18 1125) (fqst19 1127) |
| 1711 | (fqst20 1129) (fqst21 1131) (fqst22 1133) (fqst23 1135) |
| 1712 | (fqst24 1137) (fqst25 1139) (fqst26 1141) (fqst27 1143) |
| 1713 | (fqst28 1145) (fqst29 1147) (fqst30 1149) (fqst31 1151) |
| 1714 | ; These also access the lower 32 bits of the FQ registers. |
| 1715 | ; These are not accessible as spr registers (see LSI appendix - section 13.4) |
| 1716 | ; (fq0 1089) (fq1 1091) (fq2 1093) (fq3 1095) |
| 1717 | ; (fq4 1097) (fq5 1099) (fq6 1101) (fq7 1103) |
| 1718 | ; (fq8 1105) (fq9 1107) (fq10 1109) (fq11 1111) |
| 1719 | ; (fq12 1113) (fq13 1115) (fq14 1117) (fq15 1119) |
| 1720 | ; (fq16 1121) (fq17 1123) (fq18 1125) (fq19 1127) |
| 1721 | ; (fq20 1129) (fq21 1131) (fq22 1133) (fq23 1135) |
| 1722 | ; (fq24 1137) (fq25 1139) (fq26 1141) (fq27 1143) |
| 1723 | ; (fq28 1145) (fq29 1147) (fq30 1149) (fq31 1151) |
| 1724 | |
| 1725 | (mcilr0 1272) (mcilr1 1273) |
| 1726 | |
| 1727 | (msr0 1280) (msr1 1281) (msr2 1282) (msr3 1283) |
| 1728 | (msr4 1284) (msr5 1285) (msr6 1286) (msr7 1287) |
| 1729 | (msr8 1288) (msr9 1289) (msr10 1290) (msr11 1291) |
| 1730 | (msr12 1292) (msr13 1293) (msr14 1294) (msr15 1295) |
| 1731 | (msr16 1296) (msr17 1297) (msr18 1298) (msr19 1299) |
| 1732 | (msr20 1300) (msr21 1301) (msr22 1302) (msr23 1303) |
| 1733 | (msr24 1304) (msr25 1305) (msr26 1306) (msr27 1307) |
| 1734 | (msr28 1308) (msr29 1309) (msr30 1310) (msr31 1311) |
| 1735 | (msr32 1312) (msr33 1313) (msr34 1314) (msr35 1315) |
| 1736 | (msr36 1316) (msr37 1317) (msr38 1318) (msr39 1319) |
| 1737 | (msr40 1320) (msr41 1321) (msr42 1322) (msr43 1323) |
| 1738 | (msr44 1324) (msr45 1325) (msr46 1326) (msr47 1327) |
| 1739 | (msr48 1328) (msr49 1329) (msr50 1330) (msr51 1331) |
| 1740 | (msr52 1332) (msr53 1333) (msr54 1334) (msr55 1335) |
| 1741 | (msr56 1336) (msr57 1337) (msr58 1338) (msr59 1339) |
| 1742 | (msr60 1340) (msr61 1341) (msr62 1342) (msr63 1343) |
| 1743 | |
| 1744 | ; MQ0-MQ31 are 64 bit registers. |
| 1745 | ; These names allow access to the upper 32 bits of the MQ registers. |
| 1746 | (mqop0 1344) (mqop1 1346) (mqop2 1348) (mqop3 1350) |
| 1747 | (mqop4 1352) (mqop5 1354) (mqop6 1356) (mqop7 1358) |
| 1748 | (mqop8 1360) (mqop9 1362) (mqop10 1364) (mqop11 1366) |
| 1749 | (mqop12 1368) (mqop13 1370) (mqop14 1372) (mqop15 1374) |
| 1750 | (mqop16 1376) (mqop17 1378) (mqop18 1380) (mqop19 1382) |
| 1751 | (mqop20 1384) (mqop21 1386) (mqop22 1388) (mqop23 1390) |
| 1752 | (mqop24 1392) (mqop25 1394) (mqop26 1396) (mqop27 1398) |
| 1753 | (mqop28 1400) (mqop29 1402) (mqop30 1404) (mqop31 1406) |
| 1754 | ; These names allow access to the lower 32 bits of the MQ registers. |
| 1755 | (mqst0 1345) (mqst1 1347) (mqst2 1349) (mqst3 1351) |
| 1756 | (mqst4 1353) (mqst5 1355) (mqst6 1357) (mqst7 1359) |
| 1757 | (mqst8 1361) (mqst9 1363) (mqst10 1365) (mqst11 1367) |
| 1758 | (mqst12 1369) (mqst13 1371) (mqst14 1373) (mqst15 1375) |
| 1759 | (mqst16 1377) (mqst17 1379) (mqst18 1381) (mqst19 1383) |
| 1760 | (mqst20 1385) (mqst21 1387) (mqst22 1389) (mqst23 1391) |
| 1761 | (mqst24 1393) (mqst25 1395) (mqst26 1397) (mqst27 1399) |
| 1762 | (mqst28 1401) (mqst29 1403) (mqst30 1405) (mqst31 1407) |
| 1763 | ; These also access the lower 32 bits of the MQ registers. |
| 1764 | ; These are not accessible as spr registers (see LSI appendix - section 13.4) |
| 1765 | ; (mq0 1345) (mq1 1347) (mq2 1349) (mq3 1351) |
| 1766 | ; (mq4 1353) (mq5 1355) (mq6 1357) (mq7 1359) |
| 1767 | ; (mq8 1361) (mq9 1363) (mq10 1365) (mq11 1367) |
| 1768 | ; (mq12 1369) (mq13 1371) (mq14 1373) (mq15 1375) |
| 1769 | ; (mq16 1377) (mq17 1379) (mq18 1381) (mq19 1383) |
| 1770 | ; (mq20 1385) (mq21 1387) (mq22 1389) (mq23 1391) |
| 1771 | ; (mq24 1393) (mq25 1395) (mq26 1397) (mq27 1399) |
| 1772 | ; (mq28 1401) (mq29 1403) (mq30 1405) (mq31 1407) |
| 1773 | |
| 1774 | ; These are not accessible as spr registers (see LSI appendix - section 13.4) |
| 1775 | ; (acc0 1408) (acc1 1409) (acc2 1410) (acc3 1411) |
| 1776 | ; (acc4 1412) (acc5 1413) (acc6 1414) (acc7 1415) |
| 1777 | ; (acc8 1416) (acc9 1417) (acc10 1418) (acc11 1419) |
| 1778 | ; (acc12 1420) (acc13 1421) (acc14 1422) (acc15 1423) |
| 1779 | ; (acc16 1424) (acc17 1425) (acc18 1426) (acc19 1427) |
| 1780 | ; (acc20 1428) (acc21 1429) (acc22 1430) (acc23 1431) |
| 1781 | ; (acc24 1432) (acc25 1433) (acc26 1434) (acc27 1435) |
| 1782 | ; (acc28 1436) (acc29 1437) (acc30 1438) (acc31 1439) |
| 1783 | ; (acc32 1440) (acc33 1441) (acc34 1442) (acc35 1443) |
| 1784 | ; (acc36 1444) (acc37 1445) (acc38 1446) (acc39 1447) |
| 1785 | ; (acc40 1448) (acc41 1449) (acc42 1450) (acc43 1451) |
| 1786 | ; (acc44 1452) (acc45 1453) (acc46 1454) (acc47 1455) |
| 1787 | ; (acc48 1456) (acc49 1457) (acc50 1458) (acc51 1459) |
| 1788 | ; (acc52 1460) (acc53 1461) (acc54 1462) (acc55 1463) |
| 1789 | ; (acc56 1464) (acc57 1465) (acc58 1466) (acc59 1467) |
| 1790 | ; (acc60 1468) (acc61 1469) (acc62 1470) (acc63 1471) |
| 1791 | |
| 1792 | ; (accg0 1472) (accg1 1473) (accg2 1474) (accg3 1475) |
| 1793 | ; (accg4 1476) (accg5 1477) (accg6 1478) (accg7 1479) |
| 1794 | ; (accg8 1480) (accg9 1481) (accg10 1482) (accg11 1483) |
| 1795 | ; (accg12 1484) (accg13 1485) (accg14 1486) (accg15 1487) |
| 1796 | ; (accg16 1488) (accg17 1489) (accg18 1490) (accg19 1491) |
| 1797 | ; (accg20 1492) (accg21 1493) (accg22 1494) (accg23 1495) |
| 1798 | ; (accg24 1496) (accg25 1497) (accg26 1498) (accg27 1499) |
| 1799 | ; (accg28 1500) (accg29 1501) (accg30 1502) (accg31 1503) |
| 1800 | ; (accg32 1504) (accg33 1505) (accg34 1506) (accg35 1507) |
| 1801 | ; (accg36 1508) (accg37 1509) (accg38 1510) (accg39 1511) |
| 1802 | ; (accg40 1512) (accg41 1513) (accg42 1514) (accg43 1515) |
| 1803 | ; (accg44 1516) (accg45 1517) (accg46 1518) (accg47 1519) |
| 1804 | ; (accg48 1520) (accg49 1521) (accg50 1522) (accg51 1523) |
| 1805 | ; (accg52 1524) (accg53 1525) (accg54 1526) (accg55 1527) |
| 1806 | ; (accg56 1528) (accg57 1529) (accg58 1530) (accg59 1531) |
| 1807 | ; (accg60 1532) (accg61 1533) (accg62 1534) (accg63 1535) |
| 1808 | |
| 1809 | (ear0 1536) (ear1 1537) (ear2 1538) (ear3 1539) |
| 1810 | (ear4 1540) (ear5 1541) (ear6 1542) (ear7 1543) |
| 1811 | (ear8 1544) (ear9 1545) (ear10 1546) (ear11 1547) |
| 1812 | (ear12 1548) (ear13 1549) (ear14 1550) (ear15 1551) |
| 1813 | (ear16 1552) (ear17 1553) (ear18 1554) (ear19 1555) |
| 1814 | (ear20 1556) (ear21 1557) (ear22 1558) (ear23 1559) |
| 1815 | (ear24 1560) (ear25 1561) (ear26 1562) (ear27 1563) |
| 1816 | (ear28 1564) (ear29 1565) (ear30 1566) (ear31 1567) |
| 1817 | (ear32 1568) (ear33 1569) (ear34 1570) (ear35 1571) |
| 1818 | (ear36 1572) (ear37 1573) (ear38 1574) (ear39 1575) |
| 1819 | (ear40 1576) (ear41 1577) (ear42 1578) (ear43 1579) |
| 1820 | (ear44 1580) (ear45 1581) (ear46 1582) (ear47 1583) |
| 1821 | (ear48 1584) (ear49 1585) (ear50 1586) (ear51 1587) |
| 1822 | (ear52 1588) (ear53 1589) (ear54 1590) (ear55 1591) |
| 1823 | (ear56 1592) (ear57 1593) (ear58 1594) (ear59 1595) |
| 1824 | (ear60 1596) (ear61 1597) (ear62 1598) (ear63 1599) |
| 1825 | |
| 1826 | (edr0 1600) (edr1 1601) (edr2 1602) (edr3 1603) |
| 1827 | (edr4 1604) (edr5 1605) (edr6 1606) (edr7 1607) |
| 1828 | (edr8 1608) (edr9 1609) (edr10 1610) (edr11 1611) |
| 1829 | (edr12 1612) (edr13 1613) (edr14 1614) (edr15 1615) |
| 1830 | (edr16 1616) (edr17 1617) (edr18 1618) (edr19 1619) |
| 1831 | (edr20 1620) (edr21 1621) (edr22 1622) (edr23 1623) |
| 1832 | (edr24 1624) (edr25 1625) (edr26 1626) (edr27 1627) |
| 1833 | (edr28 1628) (edr29 1629) (edr30 1630) (edr31 1631) |
| 1834 | (edr32 1632) (edr33 1636) (edr34 1634) (edr35 1635) |
| 1835 | (edr36 1636) (edr37 1637) (edr38 1638) (edr39 1639) |
| 1836 | (edr40 1640) (edr41 1641) (edr42 1642) (edr43 1643) |
| 1837 | (edr44 1644) (edr45 1645) (edr46 1646) (edr47 1647) |
| 1838 | (edr48 1648) (edr49 1649) (edr50 1650) (edr51 1651) |
| 1839 | (edr52 1652) (edr53 1653) (edr54 1654) (edr55 1655) |
| 1840 | (edr56 1656) (edr57 1657) (edr58 1658) (edr59 1659) |
| 1841 | (edr60 1660) (edr61 1661) (edr62 1662) (edr63 1663) |
| 1842 | |
| 1843 | (iamlr0 1664) (iamlr1 1665) (iamlr2 1666) (iamlr3 1667) |
| 1844 | (iamlr4 1668) (iamlr5 1669) (iamlr6 1670) (iamlr7 1671) |
| 1845 | (iamlr8 1672) (iamlr9 1673) (iamlr10 1674) (iamlr11 1675) |
| 1846 | (iamlr12 1676) (iamlr13 1677) (iamlr14 1678) (iamlr15 1679) |
| 1847 | (iamlr16 1680) (iamlr17 1681) (iamlr18 1682) (iamlr19 1683) |
| 1848 | (iamlr20 1684) (iamlr21 1685) (iamlr22 1686) (iamlr23 1687) |
| 1849 | (iamlr24 1688) (iamlr25 1689) (iamlr26 1690) (iamlr27 1691) |
| 1850 | (iamlr28 1692) (iamlr29 1693) (iamlr30 1694) (iamlr31 1695) |
| 1851 | (iamlr32 1696) (iamlr33 1697) (iamlr34 1698) (iamlr35 1699) |
| 1852 | (iamlr36 1700) (iamlr37 1701) (iamlr38 1702) (iamlr39 1703) |
| 1853 | (iamlr40 1704) (iamlr41 1705) (iamlr42 1706) (iamlr43 1707) |
| 1854 | (iamlr44 1708) (iamlr45 1709) (iamlr46 1710) (iamlr47 1711) |
| 1855 | (iamlr48 1712) (iamlr49 1713) (iamlr50 1714) (iamlr51 1715) |
| 1856 | (iamlr52 1716) (iamlr53 1717) (iamlr54 1718) (iamlr55 1719) |
| 1857 | (iamlr56 1720) (iamlr57 1721) (iamlr58 1722) (iamlr59 1723) |
| 1858 | (iamlr60 1724) (iamlr61 1725) (iamlr62 1726) (iamlr63 1727) |
| 1859 | |
| 1860 | (iampr0 1728) (iampr1 1729) (iampr2 1730) (iampr3 1731) |
| 1861 | (iampr4 1732) (iampr5 1733) (iampr6 1734) (iampr7 1735) |
| 1862 | (iampr8 1736) (iampr9 1737) (iampr10 1738) (iampr11 1739) |
| 1863 | (iampr12 1740) (iampr13 1741) (iampr14 1742) (iampr15 1743) |
| 1864 | (iampr16 1744) (iampr17 1745) (iampr18 1746) (iampr19 1747) |
| 1865 | (iampr20 1748) (iampr21 1749) (iampr22 1750) (iampr23 1751) |
| 1866 | (iampr24 1752) (iampr25 1753) (iampr26 1754) (iampr27 1755) |
| 1867 | (iampr28 1756) (iampr29 1757) (iampr30 1758) (iampr31 1759) |
| 1868 | (iampr32 1760) (iampr33 1761) (iampr34 1762) (iampr35 1763) |
| 1869 | (iampr36 1764) (iampr37 1765) (iampr38 1766) (iampr39 1767) |
| 1870 | (iampr40 1768) (iampr41 1769) (iampr42 1770) (iampr43 1771) |
| 1871 | (iampr44 1772) (iampr45 1773) (iampr46 1774) (iampr47 1775) |
| 1872 | (iampr48 1776) (iampr49 1777) (iampr50 1778) (iampr51 1779) |
| 1873 | (iampr52 1780) (iampr53 1781) (iampr54 1782) (iampr55 1783) |
| 1874 | (iampr56 1784) (iampr57 1785) (iampr58 1786) (iampr59 1787) |
| 1875 | (iampr60 1788) (iampr61 1789) (iampr62 1790) (iampr63 1791) |
| 1876 | |
| 1877 | (damlr0 1792) (damlr1 1793) (damlr2 1794) (damlr3 1795) |
| 1878 | (damlr4 1796) (damlr5 1797) (damlr6 1798) (damlr7 1799) |
| 1879 | (damlr8 1800) (damlr9 1801) (damlr10 1802) (damlr11 1803) |
| 1880 | (damlr12 1804) (damlr13 1805) (damlr14 1806) (damlr15 1807) |
| 1881 | (damlr16 1808) (damlr17 1809) (damlr18 1810) (damlr19 1811) |
| 1882 | (damlr20 1812) (damlr21 1813) (damlr22 1814) (damlr23 1815) |
| 1883 | (damlr24 1816) (damlr25 1817) (damlr26 1818) (damlr27 1819) |
| 1884 | (damlr28 1820) (damlr29 1821) (damlr30 1822) (damlr31 1823) |
| 1885 | (damlr32 1824) (damlr33 1825) (damlr34 1826) (damlr35 1827) |
| 1886 | (damlr36 1828) (damlr37 1829) (damlr38 1830) (damlr39 1831) |
| 1887 | (damlr40 1832) (damlr41 1833) (damlr42 1834) (damlr43 1835) |
| 1888 | (damlr44 1836) (damlr45 1837) (damlr46 1838) (damlr47 1839) |
| 1889 | (damlr48 1840) (damlr49 1841) (damlr50 1842) (damlr51 1843) |
| 1890 | (damlr52 1844) (damlr53 1845) (damlr54 1846) (damlr55 1847) |
| 1891 | (damlr56 1848) (damlr57 1849) (damlr58 1850) (damlr59 1851) |
| 1892 | (damlr60 1852) (damlr61 1853) (damlr62 1854) (damlr63 1855) |
| 1893 | |
| 1894 | (dampr0 1856) (dampr1 1857) (dampr2 1858) (dampr3 1859) |
| 1895 | (dampr4 1860) (dampr5 1861) (dampr6 1862) (dampr7 1863) |
| 1896 | (dampr8 1864) (dampr9 1865) (dampr10 1866) (dampr11 1867) |
| 1897 | (dampr12 1868) (dampr13 1869) (dampr14 1870) (dampr15 1871) |
| 1898 | (dampr16 1872) (dampr17 1873) (dampr18 1874) (dampr19 1875) |
| 1899 | (dampr20 1876) (dampr21 1877) (dampr22 1878) (dampr23 1879) |
| 1900 | (dampr24 1880) (dampr25 1881) (dampr26 1882) (dampr27 1883) |
| 1901 | (dampr28 1884) (dampr29 1885) (dampr30 1886) (dampr31 1887) |
| 1902 | (dampr32 1888) (dampr33 1889) (dampr34 1890) (dampr35 1891) |
| 1903 | (dampr36 1892) (dampr37 1893) (dampr38 1894) (dampr39 1895) |
| 1904 | (dampr40 1896) (dampr41 1897) (dampr42 1898) (dampr43 1899) |
| 1905 | (dampr44 1900) (dampr45 1901) (dampr46 1902) (dampr47 1903) |
| 1906 | (dampr48 1904) (dampr49 1905) (dampr50 1906) (dampr51 1907) |
| 1907 | (dampr52 1908) (dampr53 1909) (dampr54 1910) (dampr55 1911) |
| 1908 | (dampr56 1912) (dampr57 1913) (dampr58 1914) (dampr59 1915) |
| 1909 | (dampr60 1916) (dampr61 1917) (dampr62 1918) (dampr63 1919) |
| 1910 | |
| 1911 | (amcr 1920) (stbar 1921) (mmcr 1922) |
| 1912 | (dcr 2048) (brr 2049) (nmar 2050) |
| 1913 | |
| 1914 | (ibar0 2052) (ibar1 2053) (ibar2 2054) (ibar3 2055) |
| 1915 | (dbar0 2056) (dbar1 2057) (dbar2 2058) (dbar3 2059) |
| 1916 | |
| 1917 | (dbdr00 2060) (dbdr01 2061) (dbdr02 2062) (dbdr03 2063) |
| 1918 | (dbdr10 2064) (dbdr11 2065) (dbdr12 2066) (dbdr13 2067) |
| 1919 | (dbdr20 2068) (dbdr21 2069) (dbdr22 2070) (dbdr23 2071) |
| 1920 | (dbdr30 2072) (dbdr31 2073) (dbdr32 2074) (dbdr33 2075) |
| 1921 | |
| 1922 | (dbmr00 2076) (dbmr01 2077) (dbmr02 2078) (dbmr03 2079) |
| 1923 | (dbmr10 2080) (dbmr11 2081) (dbmr12 2082) (dbmr13 2083) |
| 1924 | (dbmr20 2084) (dbmr21 2085) (dbmr22 2086) (dbmr23 2087) |
| 1925 | (dbmr30 2088) (dbmr31 2089) (dbmr32 2090) (dbmr33 2091) |
| 1926 | |
| 1927 | (cpcfr 2092) (cpcr 2093) (cpsr 2094) |
| 1928 | |
| 1929 | (cpesr0 2096) (cpesr1 2097) |
| 1930 | (cpemr0 2098) (cpemr1 2099) |
| 1931 | |
| 1932 | (ihsr8 3848) |
| 1933 | ) |
| 1934 | ) |
| 1935 | |
| 1936 | (define-hardware |
| 1937 | (name h-spr) |
| 1938 | (comment "special purpose registers") |
| 1939 | (attrs PROFILE) |
| 1940 | (type register UWI (4096)) |
| 1941 | (indices extern-keyword spr-names) |
| 1942 | (get (index) (c-call UWI "@cpu@_h_spr_get_handler" index)) |
| 1943 | (set (index newval) (c-call VOID "@cpu@_h_spr_set_handler" index newval)) |
| 1944 | ) |
| 1945 | |
| 1946 | (define-pmacro (spr-pcsr) (reg h-spr 1)) |
| 1947 | (define-pmacro (spr-bpcsr) (reg h-spr 2)) |
| 1948 | (define-pmacro (spr-lr) (reg h-spr 272)) |
| 1949 | (define-pmacro (spr-lcr) (reg h-spr 273)) |
| 1950 | (define-pmacro (spr-sr0) (reg h-spr 768)) |
| 1951 | (define-pmacro (spr-sr1) (reg h-spr 769)) |
| 1952 | (define-pmacro (spr-sr2) (reg h-spr 770)) |
| 1953 | (define-pmacro (spr-sr3) (reg h-spr 771)) |
| 1954 | |
| 1955 | ; Accumulator guard. Actually a subset of the SPR registers, but those SPRs |
| 1956 | ; are read-only in most insns. This hardware element is used by those insns |
| 1957 | ; which have direct access (mwtaccg, mrdaccg). |
| 1958 | (define-keyword |
| 1959 | (name accg-names) |
| 1960 | (print-name h-accg) |
| 1961 | (prefix "") |
| 1962 | (values |
| 1963 | (accg0 0)(accg1 1)(accg2 2)(accg3 3) |
| 1964 | (accg4 4)(accg5 5)(accg6 6)(accg7 7) |
| 1965 | (accg8 8)(accg9 9)(accg10 10)(accg11 11) |
| 1966 | (accg12 12)(accg13 13)(accg14 14)(accg15 15) |
| 1967 | (accg16 16)(accg17 17)(accg18 18)(accg19 19) |
| 1968 | (accg20 20)(accg21 21)(accg22 22)(accg23 23) |
| 1969 | (accg24 24)(accg25 25)(accg26 26)(accg27 27) |
| 1970 | (accg28 28)(accg29 29)(accg30 30)(accg31 31) |
| 1971 | (accg32 32)(accg33 33)(accg34 34)(accg35 35) |
| 1972 | (accg36 36)(accg37 37)(accg38 38)(accg39 39) |
| 1973 | (accg40 40)(accg41 41)(accg42 42)(accg43 43) |
| 1974 | (accg44 44)(accg45 45)(accg46 46)(accg47 47) |
| 1975 | (accg48 48)(accg49 49)(accg50 50)(accg51 51) |
| 1976 | (accg52 52)(accg53 53)(accg54 54)(accg55 55) |
| 1977 | (accg56 56)(accg57 57)(accg58 58)(accg59 59) |
| 1978 | (accg60 60)(accg61 61)(accg62 62)(accg63 63) |
| 1979 | ) |
| 1980 | ) |
| 1981 | |
| 1982 | (define-hardware |
| 1983 | (name h-accg) |
| 1984 | (comment "accumulator guard") |
| 1985 | (attrs PROFILE VIRTUAL) |
| 1986 | (type register UWI (64)) |
| 1987 | (indices extern-keyword accg-names) |
| 1988 | (get (index) |
| 1989 | (and (reg h-spr (add index 1472)) #xff)) |
| 1990 | (set (index newval) |
| 1991 | (set (raw-reg UWI h-spr (add index 1472)) (and newval #xff))) |
| 1992 | ) |
| 1993 | |
| 1994 | ; 40 bit accumulator. Composed of ACCG and ACC registers concatenated, but |
| 1995 | ; referenced more often as the composed 40 bits. |
| 1996 | (define-keyword |
| 1997 | (name acc-names) |
| 1998 | (print-name h-acc40) |
| 1999 | (prefix "") |
| 2000 | (values |
| 2001 | (acc0 0)(acc1 1)(acc2 2)(acc3 3)(acc4 4)(acc5 5)(acc6 6)(acc7 7) |
| 2002 | (acc8 8)(acc9 9)(acc10 10)(acc11 11)(acc12 12)(acc13 13)(acc14 14)(acc15 15) |
| 2003 | (acc16 16)(acc17 17)(acc18 18)(acc19 19)(acc20 20)(acc21 21)(acc22 22)(acc23 23) |
| 2004 | (acc24 24)(acc25 25)(acc26 26)(acc27 27)(acc28 28)(acc29 29)(acc30 30)(acc31 31) |
| 2005 | (acc32 32)(acc33 33)(acc34 34)(acc35 35)(acc36 36)(acc37 37)(acc38 38)(acc39 39) |
| 2006 | (acc40 40)(acc41 41)(acc42 42)(acc43 43)(acc44 44)(acc45 45)(acc46 46)(acc47 47) |
| 2007 | (acc48 48)(acc49 49)(acc50 50)(acc51 51)(acc52 52)(acc53 53)(acc54 54)(acc55 55) |
| 2008 | (acc56 56)(acc57 57)(acc58 58)(acc59 59)(acc60 60)(acc61 61)(acc62 62)(acc63 63) |
| 2009 | ) |
| 2010 | ) |
| 2011 | |
| 2012 | (define-hardware |
| 2013 | (name h-acc40S) |
| 2014 | (comment "40 bit signed accumulator") |
| 2015 | (attrs PROFILE VIRTUAL) |
| 2016 | (type register DI (64)) |
| 2017 | (indices extern-keyword acc-names) |
| 2018 | ; The accumlator is made up of two 32 bit registers, accgi/acci. |
| 2019 | ; We want to extract this as a combined 40 signed bits |
| 2020 | (get (index) |
| 2021 | (or DI |
| 2022 | (sll DI (ext DI (trunc QI (reg h-spr (add index 1472)))) |
| 2023 | 32) |
| 2024 | (zext DI (reg h-spr (add index 1408))))) |
| 2025 | ; Bits 40-63 are not written. raw-reg is used to bypass read-only restrictions |
| 2026 | ; on ACC and ACCG registers |
| 2027 | (set (index newval) |
| 2028 | (sequence () |
| 2029 | (c-call VOID "frv_check_spr_write_access" (add index 1408)) |
| 2030 | (set (raw-reg UWI h-spr |
| 2031 | (add index 1472)) (and (srl newval 32) #xff)) |
| 2032 | (set (raw-reg UWI h-spr |
| 2033 | (add index 1408)) (trunc USI newval)))) |
| 2034 | ) |
| 2035 | |
| 2036 | (define-hardware |
| 2037 | (name h-acc40U) |
| 2038 | (comment "40 bit unsigned accumulator") |
| 2039 | (attrs PROFILE VIRTUAL) |
| 2040 | (type register UDI (64)) |
| 2041 | (indices extern-keyword acc-names) |
| 2042 | ; The accumlator is made up of two 32 bit registers, accgi/acci. |
| 2043 | ; We want to extract this as a combined 40 unsigned bits |
| 2044 | (get (index) |
| 2045 | (or DI |
| 2046 | (sll DI (zext DI (reg h-spr (add index 1472))) 32) |
| 2047 | (zext DI (reg h-spr (add index 1408))))) |
| 2048 | ; Bits 40-63 are not written. raw-reg is used to bypass read-only restrictions |
| 2049 | ; on ACC and ACCG registers |
| 2050 | (set (index newval) |
| 2051 | (sequence () |
| 2052 | (c-call VOID "frv_check_spr_write_access" (add index 1408)) |
| 2053 | (set (raw-reg UWI h-spr |
| 2054 | (add index 1472)) (and (srl newval 32) #xff)) |
| 2055 | (set (raw-reg UWI h-spr |
| 2056 | (add index 1408)) (trunc USI newval)))) |
| 2057 | ) |
| 2058 | |
| 2059 | ; Integer condition code registers (CCR) |
| 2060 | ; |
| 2061 | ; The individual sub registers bits of the CCR are referenced more often than |
| 2062 | ; the entire register so set them directly. We can assemble the |
| 2063 | ; entire register when necessary. |
| 2064 | ; |
| 2065 | (define-keyword |
| 2066 | (name iccr-names) |
| 2067 | (print-name h-iccr) |
| 2068 | (prefix "") |
| 2069 | (values (icc0 0) (icc1 1) (icc2 2) (icc3 3)) |
| 2070 | ) |
| 2071 | |
| 2072 | (define-hardware |
| 2073 | (name h-iccr) |
| 2074 | (comment "Integer condition code registers") |
| 2075 | (attrs PROFILE) |
| 2076 | (type register UQI (4)) |
| 2077 | (indices extern-keyword iccr-names) |
| 2078 | ) |
| 2079 | |
| 2080 | ; Floating point condition code registers (CCR) |
| 2081 | ; |
| 2082 | ; The individual sub registers bits of the CCR are referenced more often than |
| 2083 | ; the entire register so set them directly. We can assemble the |
| 2084 | ; entire register when necessary. |
| 2085 | ; |
| 2086 | (define-keyword |
| 2087 | (name fccr-names) |
| 2088 | (print-name h-fccr) |
| 2089 | (prefix "") |
| 2090 | (values (fcc0 0) (fcc1 1) (fcc2 2) (fcc3 3)) |
| 2091 | ) |
| 2092 | |
| 2093 | (define-hardware |
| 2094 | (name h-fccr) |
| 2095 | (comment "Floating point condition code registers") |
| 2096 | (attrs PROFILE) |
| 2097 | (type register UQI (4)) |
| 2098 | (indices extern-keyword fccr-names) |
| 2099 | ) |
| 2100 | |
| 2101 | ; C condition code registers (CCCR) |
| 2102 | ; |
| 2103 | (define-keyword |
| 2104 | (name cccr-names) |
| 2105 | (print-name h-cccr) |
| 2106 | (prefix "") |
| 2107 | (values (cc0 0) (cc1 1) (cc2 2) (cc3 3) (cc4 4) (cc5 5) (cc6 6) (cc7 7)) |
| 2108 | ) |
| 2109 | |
| 2110 | (define-hardware |
| 2111 | (name h-cccr) |
| 2112 | (comment "Condition code registers") |
| 2113 | (attrs PROFILE) |
| 2114 | (type register UQI (8)) |
| 2115 | (indices extern-keyword cccr-names) |
| 2116 | ) |
| 2117 | \f |
| 2118 | ; Dummy hardware used to define packing bit on insns |
| 2119 | ; |
| 2120 | (define-hardware |
| 2121 | (name h-pack) |
| 2122 | (comment "Packing bit dummy hardware") |
| 2123 | (type immediate (UINT 1)) |
| 2124 | (values keyword "" (("" 1) (".p" 0) (".P" 0))) |
| 2125 | ) |
| 2126 | ; Dummy hardware used to define hint field for branches always taken |
| 2127 | ; |
| 2128 | (define-hardware |
| 2129 | (name h-hint-taken) |
| 2130 | (comment "Branch taken hint dummy hardware") |
| 2131 | (type immediate (UINT 1)) |
| 2132 | ; The order of these is important. We want '2' to get written by default, |
| 2133 | ; but we also want the docoder/disassembler to allow the values '0', '1' and |
| 2134 | ; '3'. |
| 2135 | (values keyword "" (("" 2) ("" 0) ("" 1) ("" 3))) |
| 2136 | ) |
| 2137 | ; Dummy hardware used to define hint field for branches never taken |
| 2138 | ; |
| 2139 | (define-hardware |
| 2140 | (name h-hint-not-taken) |
| 2141 | (comment "Branch not taken hint dummy hardware") |
| 2142 | (type immediate (UINT 1)) |
| 2143 | ; The order of these is important. We want '0' to get written by default, |
| 2144 | ; but we also want the docoder/disassembler to allow the values '1', '2' and |
| 2145 | ; '3'. |
| 2146 | (values keyword "" (("" 0) ("" 1) ("" 2) ("" 3))) |
| 2147 | ) |
| 2148 | \f |
| 2149 | ; Instruction Operands. |
| 2150 | ; These entries provide a layer between the assembler and the raw hardware |
| 2151 | ; description, and are used to refer to hardware elements in the semantic |
| 2152 | ; code. Usually there's a bit of over-specification, but in more complicated |
| 2153 | ; instruction sets there isn't. |
| 2154 | |
| 2155 | ; FRV specific operand attributes: |
| 2156 | |
| 2157 | (define-attr |
| 2158 | (for operand) |
| 2159 | (type boolean) |
| 2160 | (name HASH-PREFIX) |
| 2161 | (comment "immediates have an optional '#' prefix") |
| 2162 | ) |
| 2163 | |
| 2164 | ; ??? Convention says this should be o-sr, but then the insn definitions |
| 2165 | ; should refer to o-sr which is clumsy. The "o-" could be implicit, but |
| 2166 | ; then it should be implicit for all the symbols here, but then there would |
| 2167 | ; be confusion between (f-)simm8 and (h-)simm8. |
| 2168 | ; So for now the rule is exactly as it appears here. |
| 2169 | |
| 2170 | ; dnmop: define-normal-mode-operand: temporary, pending potential removal |
| 2171 | ; of modes from h/w. |
| 2172 | (define-pmacro (dnmop xname xcomment xattrs xtype xindex xmode) |
| 2173 | (define-operand |
| 2174 | (name xname) |
| 2175 | (comment xcomment) |
| 2176 | (.splice attrs (.unsplice xattrs)) |
| 2177 | (type xtype) |
| 2178 | (index xindex) |
| 2179 | (mode xmode) |
| 2180 | ) |
| 2181 | ) |
| 2182 | |
| 2183 | (dnop pack "packing bit" () h-pack f-pack) |
| 2184 | |
| 2185 | (dnmop GRi "source register 1" () h-gr f-GRi SI) |
| 2186 | (dnmop GRj "source register 2" () h-gr f-GRj SI) |
| 2187 | (dnmop GRk "destination register" () h-gr f-GRk SI) |
| 2188 | (dnmop GRkhi "destination register" () h-gr_hi f-GRk UHI) |
| 2189 | (dnmop GRklo "destination register" () h-gr_lo f-GRk UHI) |
| 2190 | (dnmop GRdoublek "destination register" () h-gr_double f-GRk DI) |
| 2191 | (dnmop ACC40Si "signed accumulator" () h-acc40S f-ACC40Si DI) |
| 2192 | (dnmop ACC40Ui "unsigned accumulator" () h-acc40U f-ACC40Ui UDI) |
| 2193 | (dnmop ACC40Sk "target accumulator" () h-acc40S f-ACC40Sk DI) |
| 2194 | (dnmop ACC40Uk "target accumulator" () h-acc40U f-ACC40Uk UDI) |
| 2195 | (dnmop ACCGi "source register" () h-accg f-ACCGi UWI) |
| 2196 | (dnmop ACCGk "target register" () h-accg f-ACCGk UWI) |
| 2197 | |
| 2198 | (dnmop CPRi "source register" ((MACH frv)) h-cpr f-CPRi SI) |
| 2199 | (dnmop CPRj "source register" ((MACH frv)) h-cpr f-CPRj SI) |
| 2200 | (dnmop CPRk "destination register" ((MACH frv)) h-cpr f-CPRk SI) |
| 2201 | (dnmop CPRdoublek "destination register" ((MACH frv)) h-cpr_double f-CPRk DI) |
| 2202 | |
| 2203 | ; floating point operands |
| 2204 | (dnmop FRinti "source register 1" () h-fr_int f-FRi SI) |
| 2205 | (dnmop FRintj "source register 2" () h-fr_int f-FRj SI) |
| 2206 | (dnmop FRintk "target register" () h-fr_int f-FRk SI) |
| 2207 | (dnmop FRi "source register 1" () h-fr f-FRi SF) |
| 2208 | (dnmop FRj "source register 2" () h-fr f-FRj SF) |
| 2209 | (dnmop FRk "destination register" () h-fr f-FRk SF) |
| 2210 | (dnmop FRkhi "destination register" () h-fr_hi f-FRk UHI) |
| 2211 | (dnmop FRklo "destination register" () h-fr_lo f-FRk UHI) |
| 2212 | (dnmop FRdoublei "source register 1" () h-fr_double f-FRi DF) |
| 2213 | (dnmop FRdoublej "source register 2" () h-fr_double f-FRj DF) |
| 2214 | (dnmop FRdoublek "target register" () h-fr_double f-FRk DF) |
| 2215 | |
| 2216 | (dnop CRi "source register 1" () h-cccr f-CRi) |
| 2217 | (dnop CRj "source register 2" () h-cccr f-CRj) |
| 2218 | (dnop CRj_int "destination register" () h-cccr f-CRj_int) |
| 2219 | (dnop CRj_float "destination register" () h-cccr f-CRj_float) |
| 2220 | (dnop CRk "destination register" () h-cccr f-CRk) |
| 2221 | (dnop CCi "condition register" () h-cccr f-CCi) |
| 2222 | |
| 2223 | (dnop ICCi_1 "condition register" () h-iccr f-ICCi_1) |
| 2224 | (dnop ICCi_2 "condition register" () h-iccr f-ICCi_2) |
| 2225 | (dnop ICCi_3 "condition register" () h-iccr f-ICCi_3) |
| 2226 | (dnop FCCi_1 "condition register" () h-fccr f-FCCi_1) |
| 2227 | (dnop FCCi_2 "condition register" () h-fccr f-FCCi_2) |
| 2228 | (dnop FCCi_3 "condition register" () h-fccr f-FCCi_3) |
| 2229 | (dnop FCCk "condition register" () h-fccr f-FCCk) |
| 2230 | |
| 2231 | (dnop eir "exception insn reg" () h-uint f-eir) |
| 2232 | (dnop s10 "10 bit signed immediate" (HASH-PREFIX) h-sint f-s10) |
| 2233 | (dnop u16 "16 bit unsigned immediate" (HASH-PREFIX) h-uint f-u16) |
| 2234 | (dnop s16 "16 bit signed immediate" (HASH-PREFIX) h-sint f-s16) |
| 2235 | (dnop s6 "6 bit signed immediate" (HASH-PREFIX) h-sint f-s6) |
| 2236 | (dnop s6_1 "6 bit signed immediate" (HASH-PREFIX) h-sint f-s6_1) |
| 2237 | (dnop u6 "6 bit unsigned immediate" (HASH-PREFIX) h-uint f-u6) |
| 2238 | (dnop s5 "5 bit signed immediate" (HASH-PREFIX) h-sint f-s5) |
| 2239 | (dnop cond "conditional arithmetic" (HASH-PREFIX) h-uint f-cond) |
| 2240 | (dnop ccond "lr branch condition" (HASH-PREFIX) h-uint f-ccond) |
| 2241 | (dnop hint "2 bit branch predictor" (HASH-PREFIX) h-uint f-hint) |
| 2242 | (dnop hint_taken "2 bit branch predictor" () h-hint-taken f-hint) |
| 2243 | (dnop hint_not_taken "2 bit branch predictor" () h-hint-not-taken f-hint) |
| 2244 | |
| 2245 | (dnop LI "link indicator" () h-uint f-LI) |
| 2246 | (dnop lock "cache lock indicator" (HASH-PREFIX) h-uint f-lock) |
| 2247 | (dnop debug "debug mode indicator" (HASH-PREFIX) h-uint f-debug) |
| 2248 | (dnop ae "all entries indicator" (HASH-PREFIX) h-uint f-ae) |
| 2249 | |
| 2250 | (dnop label16 "18 bit pc relative address" () h-iaddr f-label16) |
| 2251 | (dnop label24 "26 bit pc relative address" () h-iaddr f-label24) |
| 2252 | |
| 2253 | (define-operand |
| 2254 | (name A0) |
| 2255 | (comment "A==0 operand of mclracc") |
| 2256 | (attrs) |
| 2257 | (type h-uint) |
| 2258 | (index f-A) |
| 2259 | (mode USI) |
| 2260 | (handlers (parse "A0")) |
| 2261 | ) |
| 2262 | |
| 2263 | (define-operand |
| 2264 | (name A1) |
| 2265 | (comment "A==1 operand of mclracc") |
| 2266 | (attrs) |
| 2267 | (type h-uint) |
| 2268 | (index f-A) |
| 2269 | (mode USI) |
| 2270 | (handlers (parse "A1")) |
| 2271 | ) |
| 2272 | |
| 2273 | (define-operand |
| 2274 | (name FRintieven) |
| 2275 | (comment "(even) source register 1") |
| 2276 | (attrs) |
| 2277 | (type h-fr_int) |
| 2278 | (index f-FRi) |
| 2279 | (mode SI) |
| 2280 | (handlers (parse "even_register")) |
| 2281 | ) |
| 2282 | |
| 2283 | (define-operand |
| 2284 | (name FRintjeven) |
| 2285 | (comment "(even) source register 2") |
| 2286 | (attrs) |
| 2287 | (type h-fr_int) |
| 2288 | (index f-FRj) |
| 2289 | (mode SI) |
| 2290 | (handlers (parse "even_register")) |
| 2291 | ) |
| 2292 | |
| 2293 | (define-operand |
| 2294 | (name FRintkeven) |
| 2295 | (comment "(even) target register") |
| 2296 | (attrs) |
| 2297 | (type h-fr_int) |
| 2298 | (index f-FRk) |
| 2299 | (mode SI) |
| 2300 | (handlers (parse "even_register")) |
| 2301 | ) |
| 2302 | |
| 2303 | (define-operand |
| 2304 | (name d12) |
| 2305 | (comment "12 bit signed immediate") |
| 2306 | (attrs) |
| 2307 | (type h-sint) |
| 2308 | (index f-d12) |
| 2309 | (handlers (parse "d12")) |
| 2310 | ) |
| 2311 | |
| 2312 | (define-operand |
| 2313 | (name s12) |
| 2314 | (comment "12 bit signed immediate") |
| 2315 | (attrs HASH-PREFIX) |
| 2316 | (type h-sint) |
| 2317 | (index f-d12) |
| 2318 | (handlers (parse "s12")) |
| 2319 | ) |
| 2320 | |
| 2321 | (define-operand |
| 2322 | (name u12) |
| 2323 | (comment "12 bit signed immediate") |
| 2324 | (attrs HASH-PREFIX) |
| 2325 | (type h-sint) |
| 2326 | (index f-u12) |
| 2327 | (handlers (parse "u12")) |
| 2328 | ) |
| 2329 | |
| 2330 | (define-operand |
| 2331 | (name spr) |
| 2332 | (comment "special purpose register") |
| 2333 | (attrs) |
| 2334 | (type h-spr) |
| 2335 | (index f-spr) |
| 2336 | (handlers (parse "spr") (print "spr")) |
| 2337 | ) |
| 2338 | |
| 2339 | (define-operand |
| 2340 | (name ulo16) |
| 2341 | (comment "16 bit unsigned immediate, for #lo()") |
| 2342 | (attrs) |
| 2343 | (type h-uint) |
| 2344 | (index f-u16) |
| 2345 | (handlers (parse "ulo16") (print "lo")) |
| 2346 | ) |
| 2347 | |
| 2348 | (define-operand |
| 2349 | (name slo16) |
| 2350 | (comment "16 bit unsigned immediate, for #lo()") |
| 2351 | (attrs) |
| 2352 | (type h-sint) |
| 2353 | (index f-s16) |
| 2354 | (handlers (parse "uslo16") (print "lo")) |
| 2355 | ) |
| 2356 | |
| 2357 | (define-operand |
| 2358 | (name uhi16) |
| 2359 | (comment "16 bit unsigned immediate, for #hi()") |
| 2360 | (attrs) |
| 2361 | (type h-uint) |
| 2362 | (index f-u16) |
| 2363 | (handlers (parse "uhi16") (print "hi")) |
| 2364 | ) |
| 2365 | |
| 2366 | ; operands representing hardware |
| 2367 | ; |
| 2368 | (dnop psr_esr "PSR.ESR bit" (SEM-ONLY) h-psr_esr f-nil) |
| 2369 | (dnop psr_s "PSR.S bit" (SEM-ONLY) h-psr_s f-nil) |
| 2370 | (dnop psr_ps "PSR.PS bit" (SEM-ONLY) h-psr_ps f-nil) |
| 2371 | (dnop psr_et "PSR.ET bit" (SEM-ONLY) h-psr_et f-nil) |
| 2372 | |
| 2373 | (dnop bpsr_bs "BPSR.BS bit" (SEM-ONLY) h-bpsr_bs f-nil) |
| 2374 | (dnop bpsr_bet "BPSR.BET bit" (SEM-ONLY) h-bpsr_bet f-nil) |
| 2375 | |
| 2376 | (dnop tbr_tba "TBR.TBA" (SEM-ONLY) h-tbr_tba f-nil) |
| 2377 | (dnop tbr_tt "TBR.TT" (SEM-ONLY) h-tbr_tt f-nil) |
| 2378 | |
| 2379 | ; Null operands |
| 2380 | ; |
| 2381 | (define-pmacro (ICCi_1-null) (f-ICCi_1-null 0)) |
| 2382 | (define-pmacro (ICCi_2-null) (f-ICCi_2-null 0)) |
| 2383 | (define-pmacro (ICCi_3-null) (f-ICCi_3-null 0)) |
| 2384 | (define-pmacro (FCCi_1-null) (f-FCCi_1-null 0)) |
| 2385 | (define-pmacro (FCCi_2-null) (f-FCCi_2-null 0)) |
| 2386 | (define-pmacro (FCCi_3-null) (f-FCCi_3-null 0)) |
| 2387 | (define-pmacro (rs-null) (f-rs-null 0)) |
| 2388 | (define-pmacro (GRi-null) (f-GRi-null 0)) |
| 2389 | (define-pmacro (GRj-null) (f-GRj-null 0)) |
| 2390 | (define-pmacro (GRk-null) (f-GRk-null 0)) |
| 2391 | (define-pmacro (FRi-null) (f-FRi-null 0)) |
| 2392 | (define-pmacro (FRj-null) (f-FRj-null 0)) |
| 2393 | (define-pmacro (ACCj-null) (f-ACCj-null 0)) |
| 2394 | (define-pmacro (rd-null) (f-rd-null 0)) |
| 2395 | (define-pmacro (cond-null) (f-cond-null 0)) |
| 2396 | (define-pmacro (ccond-null) (f-ccond-null 0)) |
| 2397 | (define-pmacro (s12-null) (f-s12-null 0)) |
| 2398 | (define-pmacro (label16-null) (f-label16-null 0)) |
| 2399 | (define-pmacro (misc-null-1) (f-misc-null-1 0)) |
| 2400 | (define-pmacro (misc-null-2) (f-misc-null-2 0)) |
| 2401 | (define-pmacro (misc-null-3) (f-misc-null-3 0)) |
| 2402 | (define-pmacro (misc-null-4) (f-misc-null-4 0)) |
| 2403 | (define-pmacro (misc-null-5) (f-misc-null-5 0)) |
| 2404 | (define-pmacro (misc-null-6) (f-misc-null-6 0)) |
| 2405 | (define-pmacro (misc-null-7) (f-misc-null-7 0)) |
| 2406 | (define-pmacro (misc-null-8) (f-misc-null-8 0)) |
| 2407 | (define-pmacro (misc-null-9) (f-misc-null-9 0)) |
| 2408 | (define-pmacro (misc-null-10) (f-misc-null-10 0)) |
| 2409 | (define-pmacro (misc-null-11) (f-misc-null-11 0)) |
| 2410 | |
| 2411 | (define-pmacro (LI-on) (f-LI-on 1)) |
| 2412 | (define-pmacro (LI-off) (f-LI-off 0)) |
| 2413 | \f |
| 2414 | ; Instruction definitions. |
| 2415 | ; |
| 2416 | ; Notes: |
| 2417 | ; - dni is short for "define-normal-instruction" |
| 2418 | ; - Macros are used to represent each insn format. These should be used as much |
| 2419 | ; as possible unless an insn has exceptional behaviour |
| 2420 | ; |
| 2421 | |
| 2422 | ; Commonly used Macros |
| 2423 | ; |
| 2424 | ; Specific registers |
| 2425 | ; |
| 2426 | |
| 2427 | ; Integer condition code manipulation |
| 2428 | ; |
| 2429 | (define-pmacro (set-z-and-n icc x) |
| 2430 | (if (eq x 0) |
| 2431 | (set icc (or (and icc #x7) #x4)) |
| 2432 | (if (lt x 0) |
| 2433 | (set icc (or (and icc #xb) #x8)) |
| 2434 | (set icc (and icc #x3)))) |
| 2435 | ) |
| 2436 | |
| 2437 | (define-pmacro (set-n icc val) |
| 2438 | (if (eq val 0) |
| 2439 | (set icc (and icc #x7)) |
| 2440 | (set icc (or icc #x8))) |
| 2441 | ) |
| 2442 | |
| 2443 | (define-pmacro (set-z icc val) |
| 2444 | (if (eq val 0) |
| 2445 | (set icc (and icc #xb)) |
| 2446 | (set icc (or icc #x4))) |
| 2447 | ) |
| 2448 | |
| 2449 | (define-pmacro (set-v icc val) |
| 2450 | (if (eq val 0) |
| 2451 | (set icc (and icc #xd)) |
| 2452 | (set icc (or icc #x2))) |
| 2453 | ) |
| 2454 | |
| 2455 | (define-pmacro (set-c icc val) |
| 2456 | (if (eq val 0) |
| 2457 | (set icc (and icc #xe)) |
| 2458 | (set icc (or icc #x1))) |
| 2459 | ) |
| 2460 | |
| 2461 | (define-pmacro (nbit icc) |
| 2462 | (trunc BI (srl (and icc #x8) 3)) |
| 2463 | ) |
| 2464 | |
| 2465 | (define-pmacro (zbit icc) |
| 2466 | (trunc BI (srl (and icc #x4) 2)) |
| 2467 | ) |
| 2468 | |
| 2469 | (define-pmacro (vbit icc) |
| 2470 | (trunc BI (srl (and icc #x2) 1)) |
| 2471 | ) |
| 2472 | |
| 2473 | (define-pmacro (cbit icc) |
| 2474 | (trunc BI (and icc #x1)) |
| 2475 | ) |
| 2476 | |
| 2477 | (define-pmacro (ebit icc) |
| 2478 | (trunc BI (srl (and icc #x8) 3)) |
| 2479 | ) |
| 2480 | |
| 2481 | (define-pmacro (lbit icc) |
| 2482 | (trunc BI (srl (and icc #x4) 2)) |
| 2483 | ) |
| 2484 | |
| 2485 | (define-pmacro (gbit icc) |
| 2486 | (trunc BI (srl (and icc #x2) 1)) |
| 2487 | ) |
| 2488 | |
| 2489 | (define-pmacro (ubit icc) |
| 2490 | (trunc BI (and icc #x1)) |
| 2491 | ) |
| 2492 | |
| 2493 | ; FRV insns |
| 2494 | ; |
| 2495 | ; |
| 2496 | ; Format: INT, Logic, Shift r-r |
| 2497 | ; |
| 2498 | (define-pmacro (int-logic-r-r name operation op ope comment) |
| 2499 | (dni name |
| 2500 | (comment) |
| 2501 | ((UNIT IALL) (FR500-MAJOR I-1) (FR400-MAJOR I-1)) |
| 2502 | (.str name "$pack $GRi,$GRj,$GRk") |
| 2503 | (+ pack GRk op GRi (ICCi_1-null) ope GRj) |
| 2504 | (set GRk (operation GRi GRj)) |
| 2505 | ((fr400 (unit u-integer)) |
| 2506 | (fr500 (unit u-integer))) |
| 2507 | ) |
| 2508 | ) |
| 2509 | |
| 2510 | (int-logic-r-r add add OP_00 OPE2_00 "add reg/reg") |
| 2511 | (int-logic-r-r sub sub OP_00 OPE2_04 "sub reg/reg") |
| 2512 | (int-logic-r-r and and OP_01 OPE2_00 "and reg/reg") |
| 2513 | (int-logic-r-r or or OP_01 OPE2_02 "or reg/reg") |
| 2514 | (int-logic-r-r xor xor OP_01 OPE2_04 "xor reg/reg") |
| 2515 | |
| 2516 | (dni not |
| 2517 | ("not") |
| 2518 | ((UNIT IALL) (FR500-MAJOR I-1) (FR400-MAJOR I-1)) |
| 2519 | ("not$pack $GRj,$GRk") |
| 2520 | (+ pack GRk OP_01 (rs-null) (ICCi_1-null) OPE2_06 GRj) |
| 2521 | (set GRk (inv GRj)) |
| 2522 | ((fr400 (unit u-integer)) |
| 2523 | (fr500 (unit u-integer))) |
| 2524 | ) |
| 2525 | |
| 2526 | (dni sdiv |
| 2527 | "signed division" |
| 2528 | ((UNIT MULT-DIV) (FR500-MAJOR I-1) (FR400-MAJOR I-1)) |
| 2529 | "sdiv$pack $GRi,$GRj,$GRk" |
| 2530 | (+ pack GRk OP_00 GRi (ICCi_1-null) OPE2_0E GRj) |
| 2531 | (sequence () |
| 2532 | (c-call VOID "@cpu@_signed_integer_divide" |
| 2533 | GRi GRj (index-of GRk) 0) |
| 2534 | (clobber GRk)) |
| 2535 | ((fr400 (unit u-idiv)) |
| 2536 | (fr500 (unit u-idiv))) |
| 2537 | ) |
| 2538 | |
| 2539 | (dni nsdiv |
| 2540 | "non excepting signed division" |
| 2541 | ((UNIT MULT-DIV) (FR500-MAJOR I-1) NON-EXCEPTING |
| 2542 | (MACH simple,tomcat,fr500,frv)) |
| 2543 | "nsdiv$pack $GRi,$GRj,$GRk" |
| 2544 | (+ pack GRk OP_01 GRi (ICCi_1-null) OPE2_0E GRj) |
| 2545 | (sequence () |
| 2546 | (c-call VOID "@cpu@_signed_integer_divide" |
| 2547 | GRi GRj (index-of GRk) 1) |
| 2548 | (clobber GRk)) |
| 2549 | ((fr400 (unit u-idiv)) |
| 2550 | (fr500 (unit u-idiv))) |
| 2551 | ) |
| 2552 | |
| 2553 | (dni udiv |
| 2554 | "unsigned division reg/reg" |
| 2555 | ((UNIT MULT-DIV) (FR500-MAJOR I-1) (FR400-MAJOR I-1)) |
| 2556 | "udiv$pack $GRi,$GRj,$GRk" |
| 2557 | (+ pack GRk OP_00 GRi (ICCi_1-null) OPE2_0F GRj) |
| 2558 | (sequence () |
| 2559 | (c-call VOID "@cpu@_unsigned_integer_divide" |
| 2560 | GRi GRj (index-of GRk) 0) |
| 2561 | (clobber GRk)) |
| 2562 | ((fr400 (unit u-idiv)) |
| 2563 | (fr500 (unit u-idiv))) |
| 2564 | ) |
| 2565 | |
| 2566 | (dni nudiv |
| 2567 | "non excepting unsigned division" |
| 2568 | ((UNIT MULT-DIV) (FR500-MAJOR I-1) NON-EXCEPTING |
| 2569 | (MACH simple,tomcat,fr500,frv)) |
| 2570 | "nudiv$pack $GRi,$GRj,$GRk" |
| 2571 | (+ pack GRk OP_01 GRi (ICCi_1-null) OPE2_0F GRj) |
| 2572 | (sequence () |
| 2573 | (c-call VOID "@cpu@_unsigned_integer_divide" |
| 2574 | GRi GRj (index-of GRk) 1) |
| 2575 | (clobber GRk)) |
| 2576 | ((fr400 (unit u-idiv)) |
| 2577 | (fr500 (unit u-idiv))) |
| 2578 | ) |
| 2579 | |
| 2580 | ; Multiplication |
| 2581 | ; |
| 2582 | (define-pmacro (multiply-r-r name signop op ope comment) |
| 2583 | (dni name |
| 2584 | (comment) |
| 2585 | ((UNIT MULT-DIV) (FR500-MAJOR I-1) (FR400-MAJOR I-1)) |
| 2586 | (.str name "$pack $GRi,$GRj,$GRdoublek") |
| 2587 | (+ pack GRdoublek op GRi (ICCi_1-null) ope GRj) |
| 2588 | (set GRdoublek (mul DI (signop DI GRi) (signop DI GRj))) |
| 2589 | ((fr400 (unit u-imul)) |
| 2590 | (fr500 (unit u-imul))) |
| 2591 | ) |
| 2592 | ) |
| 2593 | |
| 2594 | (multiply-r-r smul ext OP_00 OPE2_08 "signed multiply reg/reg") |
| 2595 | (multiply-r-r umul zext OP_00 OPE2_0A "unsigned multiply reg/reg") |
| 2596 | |
| 2597 | (define-pmacro (int-shift-r-r name op ope comment) |
| 2598 | (dni name |
| 2599 | (comment) |
| 2600 | ((UNIT IALL) (FR500-MAJOR I-1) (FR400-MAJOR I-1)) |
| 2601 | (.str name "$pack $GRi,$GRj,$GRk") |
| 2602 | (+ pack GRk op GRi (ICCi_1-null) ope GRj) |
| 2603 | (set GRk (name GRi (and GRj #x1f))) |
| 2604 | ((fr400 (unit u-integer)) |
| 2605 | (fr500 (unit u-integer))) |
| 2606 | ) |
| 2607 | ) |
| 2608 | |
| 2609 | (int-shift-r-r sll OP_01 OPE2_08 "shift left logical reg/reg") |
| 2610 | (int-shift-r-r srl OP_01 OPE2_0A "shift right logical reg/reg") |
| 2611 | (int-shift-r-r sra OP_01 OPE2_0C "shift right arith reg/reg") |
| 2612 | |
| 2613 | (define-pmacro (scan-semantics arg1 arg2 targ) |
| 2614 | (sequence ((WI tmp1) (WI tmp2)) |
| 2615 | (set tmp1 arg1) |
| 2616 | (set tmp2 (sra arg2 1)) |
| 2617 | (set targ (c-call WI "@cpu@_scan_result" (xor tmp1 tmp2)))) |
| 2618 | ) |
| 2619 | |
| 2620 | (dni scan |
| 2621 | "scan" |
| 2622 | ((UNIT SCAN) (FR500-MAJOR I-1) (FR400-MAJOR I-1)) |
| 2623 | "scan$pack $GRi,$GRj,$GRk" |
| 2624 | (+ pack GRk OP_0B GRi (ICCi_1-null) OPE2_00 GRj) |
| 2625 | (scan-semantics GRi GRj GRk) |
| 2626 | ((fr400 (unit u-integer)) |
| 2627 | (fr500 (unit u-integer))) |
| 2628 | ) |
| 2629 | |
| 2630 | ; Format: conditional INT, Logic, Shift r-r |
| 2631 | ; |
| 2632 | (define-pmacro (conditional-int-logic name operation op ope comment) |
| 2633 | (dni name |
| 2634 | (comment) |
| 2635 | ((UNIT IALL) (FR500-MAJOR I-1) (FR400-MAJOR I-1) CONDITIONAL) |
| 2636 | (.str name "$pack $GRi,$GRj,$GRk,$CCi,$cond") |
| 2637 | (+ pack GRk op GRi CCi cond ope GRj) |
| 2638 | (if (eq CCi (or cond 2)) |
| 2639 | (set GRk (operation GRi GRj))) |
| 2640 | ((fr400 (unit u-integer)) |
| 2641 | (fr500 (unit u-integer))) |
| 2642 | ) |
| 2643 | ) |
| 2644 | |
| 2645 | (conditional-int-logic cadd add OP_58 OPE4_0 "conditional add") |
| 2646 | (conditional-int-logic csub sub OP_58 OPE4_1 "conditional sub") |
| 2647 | (conditional-int-logic cand and OP_5A OPE4_0 "conditional and") |
| 2648 | (conditional-int-logic cor or OP_5A OPE4_1 "conditional or") |
| 2649 | (conditional-int-logic cxor xor OP_5A OPE4_2 "conditional xor") |
| 2650 | |
| 2651 | (dni cnot |
| 2652 | "conditional not" |
| 2653 | ((UNIT IALL) (FR500-MAJOR I-1) (FR400-MAJOR I-1) CONDITIONAL) |
| 2654 | "cnot$pack $GRj,$GRk,$CCi,$cond" |
| 2655 | (+ pack GRk OP_5A (rs-null) CCi cond OPE4_3 GRj) |
| 2656 | (if (eq CCi (or cond 2)) |
| 2657 | (set GRk (inv GRj))) |
| 2658 | ((fr400 (unit u-integer)) |
| 2659 | (fr500 (unit u-integer))) |
| 2660 | ) |
| 2661 | |
| 2662 | (dni csmul |
| 2663 | "conditional signed multiply" |
| 2664 | ((UNIT MULT-DIV) (FR500-MAJOR I-1) (FR400-MAJOR I-1) CONDITIONAL) |
| 2665 | "csmul$pack $GRi,$GRj,$GRdoublek,$CCi,$cond" |
| 2666 | (+ pack GRdoublek OP_58 GRi CCi cond OPE4_2 GRj) |
| 2667 | (if (eq CCi (or cond 2)) |
| 2668 | (set GRdoublek (mul DI (ext DI GRi) (ext DI GRj)))) |
| 2669 | ((fr400 (unit u-imul)) |
| 2670 | (fr500 (unit u-imul))) |
| 2671 | ) |
| 2672 | |
| 2673 | (dni csdiv |
| 2674 | "conditional signed division" |
| 2675 | ((UNIT MULT-DIV) (FR500-MAJOR I-1) (FR400-MAJOR I-1) CONDITIONAL) |
| 2676 | "csdiv$pack $GRi,$GRj,$GRk,$CCi,$cond" |
| 2677 | (+ pack GRk OP_58 GRi CCi cond OPE4_3 GRj) |
| 2678 | (if (eq CCi (or cond 2)) |
| 2679 | (sequence () |
| 2680 | (c-call VOID "@cpu@_signed_integer_divide" |
| 2681 | GRi GRj (index-of GRk) 0) |
| 2682 | (clobber GRk))) |
| 2683 | ((fr400 (unit u-idiv)) |
| 2684 | (fr500 (unit u-idiv))) |
| 2685 | ) |
| 2686 | |
| 2687 | (dni cudiv |
| 2688 | "conditional unsigned division" |
| 2689 | ((UNIT MULT-DIV) (FR500-MAJOR I-1) (FR400-MAJOR I-1) CONDITIONAL) |
| 2690 | "cudiv$pack $GRi,$GRj,$GRk,$CCi,$cond" |
| 2691 | (+ pack GRk OP_59 GRi CCi cond OPE4_3 GRj) |
| 2692 | (if (eq CCi (or cond 2)) |
| 2693 | (sequence () |
| 2694 | (c-call VOID "@cpu@_unsigned_integer_divide" |
| 2695 | GRi GRj (index-of GRk) 0) |
| 2696 | (clobber GRk))) |
| 2697 | ((fr400 (unit u-idiv)) |
| 2698 | (fr500 (unit u-idiv))) |
| 2699 | ) |
| 2700 | |
| 2701 | (define-pmacro (conditional-shift name operation op ope comment) |
| 2702 | (dni name |
| 2703 | (comment) |
| 2704 | ((UNIT IALL) (FR500-MAJOR I-1) (FR400-MAJOR I-1) CONDITIONAL) |
| 2705 | (.str name "$pack $GRi,$GRj,$GRk,$CCi,$cond") |
| 2706 | (+ pack GRk op GRi CCi cond ope GRj) |
| 2707 | (if (eq CCi (or cond 2)) |
| 2708 | (set GRk (operation GRi (and GRj #x1f)))) |
| 2709 | ((fr400 (unit u-integer)) |
| 2710 | (fr500 (unit u-integer))) |
| 2711 | ) |
| 2712 | ) |
| 2713 | |
| 2714 | (conditional-shift csll sll OP_5C OPE4_0 "conditional shift left logical") |
| 2715 | (conditional-shift csrl srl OP_5C OPE4_1 "conditional shift right logical") |
| 2716 | (conditional-shift csra sra OP_5C OPE4_2 "conditional shift right arith") |
| 2717 | |
| 2718 | (dni cscan |
| 2719 | "conditional scan" |
| 2720 | ((UNIT SCAN) (FR500-MAJOR I-1) (FR400-MAJOR I-1) CONDITIONAL) |
| 2721 | "cscan$pack $GRi,$GRj,$GRk,$CCi,$cond" |
| 2722 | (+ pack GRk OP_65 GRi CCi cond OPE4_3 GRj) |
| 2723 | (if (eq CCi (or cond 2)) |
| 2724 | (scan-semantics GRi GRj GRk)) |
| 2725 | ((fr400 (unit u-integer)) |
| 2726 | (fr500 (unit u-integer))) |
| 2727 | ) |
| 2728 | |
| 2729 | ; Format: INT, Logic, Shift, cc r-r |
| 2730 | ; |
| 2731 | (define-pmacro (int-arith-cc-semantics operation icc) |
| 2732 | (sequence ((BI tmp) (QI cc) (SI result)) |
| 2733 | (set cc icc) |
| 2734 | (set tmp ((.sym operation -oflag) GRi GRj (const 0))) |
| 2735 | (set-v cc tmp) |
| 2736 | (set tmp ((.sym operation -cflag) GRi GRj (const 0))) |
| 2737 | (set-c cc tmp) |
| 2738 | (set result (operation GRi GRj)) |
| 2739 | (set-z-and-n cc result) |
| 2740 | (set GRk result) |
| 2741 | (set icc cc)) |
| 2742 | ) |
| 2743 | |
| 2744 | (define-pmacro (int-arith-cc-r-r name operation op ope comment) |
| 2745 | (dni name |
| 2746 | (comment) |
| 2747 | ((UNIT IALL) (FR500-MAJOR I-1) (FR400-MAJOR I-1)) |
| 2748 | (.str name "$pack $GRi,$GRj,$GRk,$ICCi_1") |
| 2749 | (+ pack GRk op GRi ICCi_1 ope GRj) |
| 2750 | (int-arith-cc-semantics operation ICCi_1) |
| 2751 | ((fr400 (unit u-integer)) |
| 2752 | (fr500 (unit u-integer))) |
| 2753 | ) |
| 2754 | ) |
| 2755 | |
| 2756 | (int-arith-cc-r-r addcc add OP_00 OPE2_01 "add reg/reg, set icc") |
| 2757 | (int-arith-cc-r-r subcc sub OP_00 OPE2_05 "sub reg/reg, set icc") |
| 2758 | |
| 2759 | (define-pmacro (int-logic-cc-semantics op icc) |
| 2760 | (sequence ((SI tmp)) |
| 2761 | (set tmp (op GRi GRj)) |
| 2762 | (set GRk tmp) |
| 2763 | (set-z-and-n icc tmp)) |
| 2764 | ) |
| 2765 | |
| 2766 | (define-pmacro (int-logic-cc-r-r name op ope comment) |
| 2767 | (dni (.sym name cc) |
| 2768 | (comment) |
| 2769 | ((UNIT IALL) (FR500-MAJOR I-1) (FR400-MAJOR I-1)) |
| 2770 | (.str (.sym name cc) "$pack $GRi,$GRj,$GRk,$ICCi_1") |
| 2771 | (+ pack GRk op GRi ICCi_1 ope GRj) |
| 2772 | (int-logic-cc-semantics name ICCi_1) |
| 2773 | ((fr400 (unit u-integer)) |
| 2774 | (fr500 (unit u-integer))) |
| 2775 | ) |
| 2776 | ) |
| 2777 | |
| 2778 | (int-logic-cc-r-r and OP_01 OPE2_01 "and reg/reg, set icc") |
| 2779 | (int-logic-cc-r-r or OP_01 OPE2_03 "or reg/reg, set icc") |
| 2780 | (int-logic-cc-r-r xor OP_01 OPE2_05 "xor reg/reg, set icc") |
| 2781 | |
| 2782 | (define-pmacro (int-shift-cc-semantics op l-r icc) |
| 2783 | (sequence ((WI shift) (SI tmp) (QI cc)) |
| 2784 | (set shift (and GRj #x1f)) |
| 2785 | (set cc (c-call QI (.str "@cpu@_set_icc_for_shift_" l-r) |
| 2786 | GRi shift icc)) |
| 2787 | (set tmp (op GRi shift)) |
| 2788 | (set GRk tmp) |
| 2789 | (set-z-and-n cc tmp) |
| 2790 | (set icc cc)) |
| 2791 | ) |
| 2792 | |
| 2793 | (define-pmacro (int-shift-cc-r-r name l-r op ope comment) |
| 2794 | (dni (.sym name cc) |
| 2795 | (comment) |
| 2796 | ((UNIT IALL) (FR500-MAJOR I-1) (FR400-MAJOR I-1)) |
| 2797 | (.str (.sym name cc) "$pack $GRi,$GRj,$GRk,$ICCi_1") |
| 2798 | (+ pack GRk op GRi ICCi_1 ope GRj) |
| 2799 | (int-shift-cc-semantics name l-r ICCi_1) |
| 2800 | ((fr400 (unit u-integer)) |
| 2801 | (fr500 (unit u-integer))) |
| 2802 | ) |
| 2803 | ) |
| 2804 | |
| 2805 | (int-shift-cc-r-r sll left OP_01 OPE2_09 "shift left logical reg/reg,set icc") |
| 2806 | (int-shift-cc-r-r srl right OP_01 OPE2_0B "shift right logical reg/reg,set icc") |
| 2807 | (int-shift-cc-r-r sra right OP_01 OPE2_0D "shift right arith reg/reg,set icc") |
| 2808 | |
| 2809 | (define-pmacro (multiply-cc-semantics signop arg1 arg2 targ icc) |
| 2810 | (sequence ((DI tmp) (QI cc)) |
| 2811 | (set cc icc) |
| 2812 | (set tmp (mul DI (signop DI arg1) (signop DI arg2))) |
| 2813 | (set-n cc (srl DI tmp 63)) |
| 2814 | (set-z cc (eq tmp 0)) |
| 2815 | (set targ tmp) |
| 2816 | (set icc cc)) |
| 2817 | ) |
| 2818 | |
| 2819 | (define-pmacro (multiply-cc-r-r name signop op ope comment) |
| 2820 | (dni name |
| 2821 | (comment) |
| 2822 | ((UNIT MULT-DIV) (FR500-MAJOR I-1) (FR400-MAJOR I-1)) |
| 2823 | (.str name "$pack $GRi,$GRj,$GRdoublek,$ICCi_1") |
| 2824 | (+ pack GRdoublek op GRi ICCi_1 ope GRj) |
| 2825 | (multiply-cc-semantics signop GRi GRj GRdoublek ICCi_1) |
| 2826 | ((fr400 (unit u-imul)) |
| 2827 | (fr500 (unit u-imul))) |
| 2828 | ) |
| 2829 | ) |
| 2830 | |
| 2831 | (multiply-cc-r-r smulcc ext OP_00 OPE2_09 "signed multiply reg/reg") |
| 2832 | (multiply-cc-r-r umulcc zext OP_00 OPE2_0B "unsigned multiply reg/reg") |
| 2833 | |
| 2834 | |
| 2835 | ; Format: conditional INT, Logic, Shift, cc r-r |
| 2836 | ; |
| 2837 | (define-pmacro (conditional-int-arith-cc name operation op ope comment) |
| 2838 | (dni name |
| 2839 | (comment) |
| 2840 | ((UNIT IALL) (FR500-MAJOR I-1) (FR400-MAJOR I-1) CONDITIONAL) |
| 2841 | (.str name "$pack $GRi,$GRj,$GRk,$CCi,$cond") |
| 2842 | (+ pack GRk op GRi CCi cond ope GRj) |
| 2843 | (if (eq CCi (or cond 2)) |
| 2844 | (int-arith-cc-semantics operation |
| 2845 | (reg h-iccr (and (index-of CCi) 3)))) |
| 2846 | ((fr400 (unit u-integer)) |
| 2847 | (fr500 (unit u-integer))) |
| 2848 | ) |
| 2849 | ) |
| 2850 | |
| 2851 | (conditional-int-arith-cc caddcc add OP_59 OPE4_0 "add, set icc") |
| 2852 | (conditional-int-arith-cc csubcc sub OP_59 OPE4_1 "sub, set icc") |
| 2853 | |
| 2854 | (dni csmulcc |
| 2855 | "conditional signed multiply and set condition code" |
| 2856 | ((UNIT MULT-DIV) (FR500-MAJOR I-1) (FR400-MAJOR I-1) CONDITIONAL) |
| 2857 | "csmulcc$pack $GRi,$GRj,$GRdoublek,$CCi,$cond" |
| 2858 | (+ pack GRdoublek OP_59 GRi CCi cond OPE4_2 GRj) |
| 2859 | (if (eq CCi (or cond 2)) |
| 2860 | (multiply-cc-semantics ext GRi GRj GRdoublek |
| 2861 | (reg h-iccr (and (index-of CCi) 3)))) |
| 2862 | ((fr400 (unit u-imul)) |
| 2863 | (fr500 (unit u-imul))) |
| 2864 | ) |
| 2865 | |
| 2866 | (define-pmacro (conditional-int-logic-cc name operation op ope comment) |
| 2867 | (dni name |
| 2868 | (comment) |
| 2869 | ((UNIT IALL) (FR500-MAJOR I-1) (FR400-MAJOR I-1) CONDITIONAL) |
| 2870 | (.str name "$pack $GRi,$GRj,$GRk,$CCi,$cond") |
| 2871 | (+ pack GRk op GRi CCi cond ope GRj) |
| 2872 | (if (eq CCi (or cond 2)) |
| 2873 | (int-logic-cc-semantics operation |
| 2874 | (reg h-iccr (and (index-of CCi) 3)))) |
| 2875 | ((fr400 (unit u-integer)) |
| 2876 | (fr500 (unit u-integer))) |
| 2877 | ) |
| 2878 | ) |
| 2879 | |
| 2880 | (conditional-int-logic-cc candcc and OP_5B OPE4_0 "conditional and, set icc") |
| 2881 | (conditional-int-logic-cc corcc or OP_5B OPE4_1 "conditional or , set icc") |
| 2882 | (conditional-int-logic-cc cxorcc xor OP_5B OPE4_2 "conditional xor, set icc") |
| 2883 | |
| 2884 | (define-pmacro (conditional-int-shift-cc name l-r op ope comment) |
| 2885 | (dni (.sym c name cc) |
| 2886 | (comment) |
| 2887 | ((UNIT IALL) (FR500-MAJOR I-1) (FR400-MAJOR I-1) CONDITIONAL) |
| 2888 | (.str (.sym c name cc) "$pack $GRi,$GRj,$GRk,$CCi,$cond") |
| 2889 | (+ pack GRk op GRi CCi cond ope GRj) |
| 2890 | (if (eq CCi (or cond 2)) |
| 2891 | (int-shift-cc-semantics name l-r |
| 2892 | (reg h-iccr (and (index-of CCi) 3)))) |
| 2893 | ((fr400 (unit u-integer)) |
| 2894 | (fr500 (unit u-integer))) |
| 2895 | ) |
| 2896 | ) |
| 2897 | |
| 2898 | (conditional-int-shift-cc sll left OP_5D OPE4_0 "shift left logical, set icc") |
| 2899 | (conditional-int-shift-cc srl right OP_5D OPE4_1 "shift right logical, set icc") |
| 2900 | (conditional-int-shift-cc sra right OP_5D OPE4_2 "shift right arith , set icc") |
| 2901 | |
| 2902 | ; Add and subtract with carry |
| 2903 | ; |
| 2904 | (define-pmacro (int-arith-x-r-r name operation op ope comment) |
| 2905 | (dni name |
| 2906 | (comment) |
| 2907 | ((UNIT IALL) (FR500-MAJOR I-1) (FR400-MAJOR I-1)) |
| 2908 | (.str name "$pack $GRi,$GRj,$GRk,$ICCi_1") |
| 2909 | (+ pack GRk op GRi ICCi_1 ope GRj) |
| 2910 | (set GRk ((.sym operation c) GRi GRj (cbit ICCi_1))) |
| 2911 | ((fr400 (unit u-integer)) |
| 2912 | (fr500 (unit u-integer))) |
| 2913 | ) |
| 2914 | ) |
| 2915 | |
| 2916 | (int-arith-x-r-r addx add OP_00 OPE2_02 "Add reg/reg, with carry") |
| 2917 | (int-arith-x-r-r subx sub OP_00 OPE2_06 "Sub reg/reg, with carry") |
| 2918 | |
| 2919 | (define-pmacro (int-arith-x-cc-r-r name operation op ope comment) |
| 2920 | (dni name |
| 2921 | (comment) |
| 2922 | ((UNIT IALL) (FR500-MAJOR I-1) (FR400-MAJOR I-1)) |
| 2923 | (.str name "$pack $GRi,$GRj,$GRk,$ICCi_1") |
| 2924 | (+ pack GRk op GRi ICCi_1 ope GRj) |
| 2925 | (sequence ((WI tmp) (QI cc)) |
| 2926 | (set cc ICCi_1) |
| 2927 | (set tmp ((.sym operation c) GRi GRj (cbit cc))) |
| 2928 | (set-v cc ((.sym operation -oflag) GRi GRj (cbit cc))) |
| 2929 | (set-c cc ((.sym operation -cflag) GRi GRj (cbit cc))) |
| 2930 | (set-z-and-n cc tmp) |
| 2931 | (set GRk tmp) |
| 2932 | (set ICCi_1 cc)) |
| 2933 | ((fr400 (unit u-integer)) |
| 2934 | (fr500 (unit u-integer))) |
| 2935 | ) |
| 2936 | ) |
| 2937 | |
| 2938 | (int-arith-x-cc-r-r addxcc add OP_00 OPE2_03 "Add reg/reg, use/set carry") |
| 2939 | (int-arith-x-cc-r-r subxcc sub OP_00 OPE2_07 "Sub reg/reg, use/set carry") |
| 2940 | |
| 2941 | ; Format: INT, Logic, Shift r-simm |
| 2942 | ; |
| 2943 | (define-pmacro (int-logic-r-simm name operation op comment) |
| 2944 | (dni name |
| 2945 | (comment) |
| 2946 | ((UNIT IALL) (FR500-MAJOR I-1) (FR400-MAJOR I-1)) |
| 2947 | (.str name "$pack $GRi,$s12,$GRk") |
| 2948 | (+ pack GRk op GRi s12) |
| 2949 | (set GRk (operation GRi s12)) |
| 2950 | ((fr400 (unit u-integer)) |
| 2951 | (fr500 (unit u-integer))) |
| 2952 | ) |
| 2953 | ) |
| 2954 | |
| 2955 | (int-logic-r-simm addi add OP_10 "add reg/immed") |
| 2956 | (int-logic-r-simm subi sub OP_14 "sub reg/immed") |
| 2957 | (int-logic-r-simm andi and OP_20 "and reg/immed") |
| 2958 | (int-logic-r-simm ori or OP_22 "or reg/immed") |
| 2959 | (int-logic-r-simm xori xor OP_24 "xor reg/immed") |
| 2960 | |
| 2961 | (dni sdivi |
| 2962 | "signed division reg/immed" |
| 2963 | ((UNIT MULT-DIV) (FR500-MAJOR I-1) (FR400-MAJOR I-1)) |
| 2964 | "sdivi$pack $GRi,$s12,$GRk" |
| 2965 | (+ pack GRk OP_1E GRi s12) |
| 2966 | (sequence () |
| 2967 | (c-call VOID "@cpu@_signed_integer_divide" |
| 2968 | GRi s12 (index-of GRk) 0) |
| 2969 | (clobber GRk)) |
| 2970 | ((fr400 (unit u-idiv)) |
| 2971 | (fr500 (unit u-idiv))) |
| 2972 | ) |
| 2973 | |
| 2974 | (dni nsdivi |
| 2975 | "non excepting signed division reg/immed" |
| 2976 | ((UNIT MULT-DIV) (FR500-MAJOR I-1) NON-EXCEPTING |
| 2977 | (MACH simple,tomcat,fr500,frv)) |
| 2978 | "nsdivi$pack $GRi,$s12,$GRk" |
| 2979 | (+ pack GRk OP_2E GRi s12) |
| 2980 | (sequence () |
| 2981 | (c-call VOID "@cpu@_signed_integer_divide" |
| 2982 | GRi s12 (index-of GRk) 1) |
| 2983 | (clobber GRk)) |
| 2984 | ((fr400 (unit u-idiv)) |
| 2985 | (fr500 (unit u-idiv))) |
| 2986 | ) |
| 2987 | |
| 2988 | (dni udivi |
| 2989 | "unsigned division reg/immed" |
| 2990 | ((UNIT MULT-DIV) (FR500-MAJOR I-1) (FR400-MAJOR I-1)) |
| 2991 | "udivi$pack $GRi,$s12,$GRk" |
| 2992 | (+ pack GRk OP_1F GRi s12) |
| 2993 | (sequence () |
| 2994 | (c-call VOID "@cpu@_unsigned_integer_divide" |
| 2995 | GRi s12 (index-of GRk) 0) |
| 2996 | (clobber GRk)) |
| 2997 | ((fr400 (unit u-idiv)) |
| 2998 | (fr500 (unit u-idiv))) |
| 2999 | ) |
| 3000 | |
| 3001 | (dni nudivi |
| 3002 | "non excepting unsigned division reg/immed" |
| 3003 | ((UNIT MULT-DIV) (FR500-MAJOR I-1) NON-EXCEPTING |
| 3004 | (MACH simple,tomcat,fr500,frv)) |
| 3005 | "nudivi$pack $GRi,$s12,$GRk" |
| 3006 | (+ pack GRk OP_2F GRi s12) |
| 3007 | (sequence () |
| 3008 | (c-call VOID "@cpu@_unsigned_integer_divide" |
| 3009 | GRi s12 (index-of GRk) 1) |
| 3010 | (clobber GRk)) |
| 3011 | ((fr400 (unit u-idiv)) |
| 3012 | (fr500 (unit u-idiv))) |
| 3013 | ) |
| 3014 | |
| 3015 | (define-pmacro (multiply-r-simm name signop op comment) |
| 3016 | (dni name |
| 3017 | (comment) |
| 3018 | ((UNIT MULT-DIV) (FR500-MAJOR I-1) (FR400-MAJOR I-1)) |
| 3019 | (.str name "$pack $GRi,$s12,$GRdoublek") |
| 3020 | (+ pack GRdoublek op GRi s12) |
| 3021 | (set GRdoublek (mul DI (signop DI GRi) (signop DI s12))) |
| 3022 | ((fr400 (unit u-imul)) |
| 3023 | (fr500 (unit u-imul))) |
| 3024 | ) |
| 3025 | ) |
| 3026 | |
| 3027 | (multiply-r-simm smuli ext OP_18 "signed multiply reg/immed") |
| 3028 | (multiply-r-simm umuli zext OP_1A "unsigned multiply reg/immed") |
| 3029 | |
| 3030 | (define-pmacro (int-shift-r-simm name op comment) |
| 3031 | (dni (.sym name i) |
| 3032 | (comment) |
| 3033 | ((UNIT IALL) (FR500-MAJOR I-1) (FR400-MAJOR I-1)) |
| 3034 | (.str (.sym name i) "$pack $GRi,$s12,$GRk") |
| 3035 | (+ pack GRk op GRi s12) |
| 3036 | (set GRk (name GRi (and s12 #x1f))) |
| 3037 | ((fr400 (unit u-integer)) |
| 3038 | (fr500 (unit u-integer))) |
| 3039 | ) |
| 3040 | ) |
| 3041 | |
| 3042 | (int-shift-r-simm sll OP_28 "shift left logical reg/immed") |
| 3043 | (int-shift-r-simm srl OP_2A "shift right logical reg/immed") |
| 3044 | (int-shift-r-simm sra OP_2C "shift right arith reg/immed") |
| 3045 | |
| 3046 | (dni scani |
| 3047 | "scan immediate" |
| 3048 | ((UNIT SCAN) (FR500-MAJOR I-1) (FR400-MAJOR I-1)) |
| 3049 | "scani$pack $GRi,$s12,$GRk" |
| 3050 | (+ pack GRk OP_47 GRi s12) |
| 3051 | (scan-semantics GRi s12 GRk) |
| 3052 | ((fr400 (unit u-integer)) |
| 3053 | (fr500 (unit u-integer))) |
| 3054 | ) |
| 3055 | |
| 3056 | ; Format: INT, Logic, Shift cc r-simm |
| 3057 | ; |
| 3058 | (define-pmacro (int-arith-cc-r-simm name operation op comment) |
| 3059 | (dni name |
| 3060 | (comment) |
| 3061 | ((UNIT IALL) (FR500-MAJOR I-1) (FR400-MAJOR I-1)) |
| 3062 | (.str name "$pack $GRi,$s10,$GRk,$ICCi_1") |
| 3063 | (+ pack GRk op GRi ICCi_1 s10) |
| 3064 | (sequence ((BI tmp) (QI cc) (SI result)) |
| 3065 | (set cc ICCi_1) |
| 3066 | (set tmp ((.sym operation -oflag) GRi s10 (const 0))) |
| 3067 | (set-v cc tmp) |
| 3068 | (set tmp ((.sym operation -cflag) GRi s10 (const 0))) |
| 3069 | (set-c cc tmp) |
| 3070 | (set result (operation GRi s10)) |
| 3071 | (set-z-and-n cc result) |
| 3072 | (set GRk result) |
| 3073 | (set ICCi_1 cc)) |
| 3074 | ((fr400 (unit u-integer)) |
| 3075 | (fr500 (unit u-integer))) |
| 3076 | ) |
| 3077 | ) |
| 3078 | |
| 3079 | (int-arith-cc-r-simm addicc add OP_11 "add reg/immed, set icc") |
| 3080 | (int-arith-cc-r-simm subicc sub OP_15 "sub reg/immed, set icc") |
| 3081 | |
| 3082 | (define-pmacro (int-logic-cc-r-simm name op comment) |
| 3083 | (dni (.sym name icc) |
| 3084 | (comment) |
| 3085 | ((UNIT IALL) (FR500-MAJOR I-1) (FR400-MAJOR I-1)) |
| 3086 | (.str (.sym name icc) "$pack $GRi,$s10,$GRk,$ICCi_1") |
| 3087 | (+ pack GRk op GRi ICCi_1 s10) |
| 3088 | (sequence ((SI tmp)) |
| 3089 | (set tmp (name GRi s10)) |
| 3090 | (set GRk tmp) |
| 3091 | (set-z-and-n ICCi_1 tmp)) |
| 3092 | ((fr400 (unit u-integer)) |
| 3093 | (fr500 (unit u-integer))) |
| 3094 | ) |
| 3095 | ) |
| 3096 | |
| 3097 | (int-logic-cc-r-simm and OP_21 "and reg/immed, set icc") |
| 3098 | (int-logic-cc-r-simm or OP_23 "or reg/immed, set icc") |
| 3099 | (int-logic-cc-r-simm xor OP_25 "xor reg/immed, set icc") |
| 3100 | |
| 3101 | (define-pmacro (multiply-cc-r-simm name signop op comment) |
| 3102 | (dni name |
| 3103 | (comment) |
| 3104 | ((UNIT MULT-DIV) (FR500-MAJOR I-1) (FR400-MAJOR I-1)) |
| 3105 | (.str name "$pack $GRi,$s10,$GRdoublek,$ICCi_1") |
| 3106 | (+ pack GRdoublek op GRi ICCi_1 s10) |
| 3107 | (multiply-cc-semantics signop GRi s10 GRdoublek ICCi_1) |
| 3108 | ((fr400 (unit u-imul)) |
| 3109 | (fr500 (unit u-imul))) |
| 3110 | ) |
| 3111 | ) |
| 3112 | |
| 3113 | (multiply-cc-r-simm smulicc ext OP_19 "signed multiply reg/immed") |
| 3114 | (multiply-cc-r-simm umulicc zext OP_1B "unsigned multiply reg/immed") |
| 3115 | |
| 3116 | (define-pmacro (int-shift-cc-r-simm name l-r op comment) |
| 3117 | (dni (.sym name icc) |
| 3118 | (comment) |
| 3119 | ((UNIT IALL) (FR500-MAJOR I-1) (FR400-MAJOR I-1)) |
| 3120 | (.str (.sym name icc) "$pack $GRi,$s10,$GRk,$ICCi_1") |
| 3121 | (+ pack GRk op GRi ICCi_1 s10) |
| 3122 | (sequence ((WI shift) (SI tmp) (QI cc)) |
| 3123 | (set shift (and s10 #x1f)) |
| 3124 | (set cc (c-call QI (.str "@cpu@_set_icc_for_shift_" l-r) |
| 3125 | GRi shift ICCi_1)) |
| 3126 | (set tmp (name GRi shift)) |
| 3127 | (set GRk tmp) |
| 3128 | (set-z-and-n cc tmp) |
| 3129 | (set ICCi_1 cc)) |
| 3130 | ((fr400 (unit u-integer)) |
| 3131 | (fr500 (unit u-integer))) |
| 3132 | ) |
| 3133 | ) |
| 3134 | |
| 3135 | (int-shift-cc-r-simm sll left OP_29 "shift left logical reg/immed, set icc") |
| 3136 | (int-shift-cc-r-simm srl right OP_2B "shift right logical reg/immed, set icc") |
| 3137 | (int-shift-cc-r-simm sra right OP_2D "shift right arith reg/immed, set icc") |
| 3138 | |
| 3139 | (define-pmacro (int-arith-x-r-simm name operation op comment) |
| 3140 | (dni name |
| 3141 | (comment) |
| 3142 | ((UNIT IALL) (FR500-MAJOR I-1) (FR400-MAJOR I-1)) |
| 3143 | (.str name "$pack $GRi,$s10,$GRk,$ICCi_1") |
| 3144 | (+ pack GRk op GRi ICCi_1 s10) |
| 3145 | (set GRk ((.sym operation c) GRi s10 (cbit ICCi_1))) |
| 3146 | ((fr400 (unit u-integer)) |
| 3147 | (fr500 (unit u-integer))) |
| 3148 | ) |
| 3149 | ) |
| 3150 | |
| 3151 | (int-arith-x-r-simm addxi add OP_12 "Add reg/immed, with carry") |
| 3152 | (int-arith-x-r-simm subxi sub OP_16 "Sub reg/immed, with carry") |
| 3153 | |
| 3154 | (define-pmacro (int-arith-x-cc-r-simm name operation op comment) |
| 3155 | (dni name |
| 3156 | (comment) |
| 3157 | ((UNIT IALL) (FR500-MAJOR I-1) (FR400-MAJOR I-1)) |
| 3158 | (.str name "$pack $GRi,$s10,$GRk,$ICCi_1") |
| 3159 | (+ pack GRk op GRi ICCi_1 s10) |
| 3160 | (sequence ((WI tmp) (QI cc)) |
| 3161 | (set cc ICCi_1) |
| 3162 | (set tmp ((.sym operation c) GRi s10 (cbit cc))) |
| 3163 | (set-v cc ((.sym operation -oflag) GRi s10 (cbit cc))) |
| 3164 | (set-c cc ((.sym operation -cflag) GRi s10 (cbit cc))) |
| 3165 | (set-z-and-n cc tmp) |
| 3166 | (set GRk tmp) |
| 3167 | (set ICCi_1 cc)) |
| 3168 | ((fr400 (unit u-integer)) |
| 3169 | (fr500 (unit u-integer))) |
| 3170 | ) |
| 3171 | ) |
| 3172 | |
| 3173 | (int-arith-x-cc-r-simm addxicc add OP_13 "Add reg/immed, with carry") |
| 3174 | (int-arith-x-cc-r-simm subxicc sub OP_17 "Sub reg/immed, with carry") |
| 3175 | |
| 3176 | ; Byte compare insns |
| 3177 | |
| 3178 | (dni cmpb |
| 3179 | "Compare bytes" |
| 3180 | ((UNIT IALL) (FR400-MAJOR I-1) (MACH fr400)) |
| 3181 | "cmpb$pack $GRi,$GRj,$ICCi_1" |
| 3182 | (+ pack (GRk-null) OP_00 GRi ICCi_1 OPE2_0C GRj) |
| 3183 | (sequence ((QI cc)) |
| 3184 | (set-n cc (eq (and GRi #xff000000) (and GRj #xff000000))) |
| 3185 | (set-z cc (eq (and GRi #x00ff0000) (and GRj #x00ff0000))) |
| 3186 | (set-v cc (eq (and GRi #x0000ff00) (and GRj #x0000ff00))) |
| 3187 | (set-c cc (eq (and GRi #x000000ff) (and GRj #x000000ff))) |
| 3188 | (set ICCi_1 cc)) |
| 3189 | ((fr400 (unit u-integer))) |
| 3190 | ) |
| 3191 | |
| 3192 | (dni cmpba |
| 3193 | "OR of Compare bytes" |
| 3194 | ((UNIT IALL) (FR400-MAJOR I-1) (MACH fr400)) |
| 3195 | "cmpba$pack $GRi,$GRj,$ICCi_1" |
| 3196 | (+ pack (GRk-null) OP_00 GRi ICCi_1 OPE2_0D GRj) |
| 3197 | (sequence ((QI cc)) |
| 3198 | (set cc 0) |
| 3199 | (set-c cc |
| 3200 | (orif (eq (and GRi #xff000000) (and GRj #xff000000)) |
| 3201 | (orif (eq (and GRi #x00ff0000) (and GRj #x00ff0000)) |
| 3202 | (orif (eq (and GRi #x0000ff00) |
| 3203 | (and GRj #x0000ff00)) |
| 3204 | (eq (and GRi #x000000ff) |
| 3205 | (and GRj #x000000ff)))))) |
| 3206 | (set ICCi_1 cc)) |
| 3207 | ((fr400 (unit u-integer))) |
| 3208 | ) |
| 3209 | |
| 3210 | ; Format: Load immediate |
| 3211 | ; |
| 3212 | (dni setlo |
| 3213 | "set low order bits" |
| 3214 | ((UNIT IALL) (FR500-MAJOR I-1) (FR400-MAJOR I-1)) |
| 3215 | "setlo$pack $ulo16,$GRklo" |
| 3216 | (+ pack GRk OP_3D (misc-null-4) u16) |
| 3217 | (set GRklo u16) |
| 3218 | ((fr400 (unit u-set-hilo)) |
| 3219 | (fr500 (unit u-set-hilo))) |
| 3220 | ) |
| 3221 | |
| 3222 | (dni sethi |
| 3223 | "set high order bits" |
| 3224 | ((UNIT IALL) (FR500-MAJOR I-1) (FR400-MAJOR I-1)) |
| 3225 | "sethi$pack $uhi16,$GRkhi" |
| 3226 | (+ pack GRkhi OP_3E (misc-null-4) u16) |
| 3227 | (set GRkhi u16) |
| 3228 | ((fr400 (unit u-set-hilo)) |
| 3229 | (fr500 (unit u-set-hilo))) |
| 3230 | ) |
| 3231 | |
| 3232 | (dni setlos |
| 3233 | "set low order bits and extend sign" |
| 3234 | ((UNIT IALL) (FR500-MAJOR I-1) (FR400-MAJOR I-1)) |
| 3235 | "setlos$pack $slo16,$GRk" |
| 3236 | (+ pack GRk OP_3F (misc-null-4) s16) |
| 3237 | (set GRk s16) |
| 3238 | ((fr400 (unit u-integer)) |
| 3239 | (fr500 (unit u-integer))) |
| 3240 | ) |
| 3241 | |
| 3242 | (define-pmacro (load-gr-r name mode op ope comment) |
| 3243 | (dni name |
| 3244 | (comment) |
| 3245 | ((UNIT LOAD) (FR500-MAJOR I-2) (FR400-MAJOR I-2)) |
| 3246 | (.str name "$pack @($GRi,$GRj),$GRk") |
| 3247 | (+ pack GRk op GRi ope GRj) |
| 3248 | (set GRk (c-call mode (.str "@cpu@_read_mem_" mode) pc (add GRi GRj))) |
| 3249 | ((fr400 (unit u-gr-load)) |
| 3250 | (fr500 (unit u-gr-load))) |
| 3251 | ) |
| 3252 | ) |
| 3253 | |
| 3254 | (load-gr-r ldsb QI OP_02 OPE1_00 "Load signed byte") |
| 3255 | (load-gr-r ldub UQI OP_02 OPE1_01 "Load unsigned byte") |
| 3256 | (load-gr-r ldsh HI OP_02 OPE1_02 "Load signed half") |
| 3257 | (load-gr-r lduh UHI OP_02 OPE1_03 "Load unsigned half") |
| 3258 | (load-gr-r ld SI OP_02 OPE1_04 "Load word") |
| 3259 | |
| 3260 | (define-pmacro (load-fr-r name mode op ope comment) |
| 3261 | (dni name |
| 3262 | (comment) |
| 3263 | ((UNIT LOAD) (FR500-MAJOR I-2) (FR400-MAJOR I-2) FR-ACCESS) |
| 3264 | (.str name "$pack @($GRi,$GRj),$FRintk") |
| 3265 | (+ pack FRintk op GRi ope GRj) |
| 3266 | (set FRintk (c-call mode (.str "@cpu@_read_mem_" mode) pc (add GRi GRj))) |
| 3267 | ((fr400 (unit u-fr-load)) |
| 3268 | (fr500 (unit u-fr-load))) |
| 3269 | ) |
| 3270 | ) |
| 3271 | |
| 3272 | (load-fr-r ldbf UQI OP_02 OPE1_08 "Load byte float") |
| 3273 | (load-fr-r ldhf UHI OP_02 OPE1_09 "Load half float") |
| 3274 | (load-fr-r ldf SI OP_02 OPE1_0A "Load word float") |
| 3275 | |
| 3276 | (define-pmacro (load-cpr-r name mode op ope reg attr comment) |
| 3277 | (dni name |
| 3278 | (comment) |
| 3279 | ((UNIT LOAD) (FR500-MAJOR I-2) attr) |
| 3280 | (.str name "$pack @($GRi,$GRj),$" reg "k") |
| 3281 | (+ pack (.sym reg k) op GRi ope GRj) |
| 3282 | (set (.sym reg k) |
| 3283 | (c-call mode (.str "@cpu@_read_mem_" mode) pc (add GRi GRj))) |
| 3284 | () |
| 3285 | ) |
| 3286 | ) |
| 3287 | |
| 3288 | (load-cpr-r ldc SI OP_02 OPE1_0D CPR (MACH frv) "Load coprocessor word") |
| 3289 | |
| 3290 | ; These correspond to enumerators in frv-sim.h |
| 3291 | (define-pmacro (ne-UQI-size) 0) |
| 3292 | (define-pmacro (ne-QI-size) 1) |
| 3293 | (define-pmacro (ne-UHI-size) 2) |
| 3294 | (define-pmacro (ne-HI-size) 3) |
| 3295 | (define-pmacro (ne-SI-size) 4) |
| 3296 | (define-pmacro (ne-DI-size) 5) |
| 3297 | (define-pmacro (ne-XI-size) 6) |
| 3298 | |
| 3299 | (define-pmacro (ne-load-semantics base dispix targ idisp size is_float action) |
| 3300 | (sequence ((BI do_op)) |
| 3301 | (set do_op |
| 3302 | (c-call BI "@cpu@_check_non_excepting_load" |
| 3303 | (index-of base) dispix (index-of targ) |
| 3304 | idisp size is_float)) |
| 3305 | (if do_op action)) |
| 3306 | ) |
| 3307 | |
| 3308 | (define-pmacro (ne-load-gr-r name mode op ope size comment) |
| 3309 | (dni name |
| 3310 | (comment) |
| 3311 | ((UNIT LOAD) (FR500-MAJOR I-2) NON-EXCEPTING |
| 3312 | (MACH simple,tomcat,fr500,frv)) |
| 3313 | (.str name "$pack @($GRi,$GRj),$GRk") |
| 3314 | (+ pack GRk op GRi ope GRj) |
| 3315 | (ne-load-semantics GRi (index-of GRj) GRk 0 size 0 |
| 3316 | (set GRk |
| 3317 | (c-call mode (.str "@cpu@_read_mem_" mode) |
| 3318 | pc (add GRi GRj)))) |
| 3319 | ((fr500 (unit u-gr-load))) |
| 3320 | ) |
| 3321 | ) |
| 3322 | |
| 3323 | (ne-load-gr-r nldsb QI OP_02 OPE1_20 (ne-QI-size) "Load signed byte") |
| 3324 | (ne-load-gr-r nldub UQI OP_02 OPE1_21 (ne-UQI-size) "Load unsigned byte") |
| 3325 | (ne-load-gr-r nldsh HI OP_02 OPE1_22 (ne-HI-size) "Load signed half") |
| 3326 | (ne-load-gr-r nlduh UHI OP_02 OPE1_23 (ne-UHI-size) "Load unsigned half") |
| 3327 | (ne-load-gr-r nld SI OP_02 OPE1_24 (ne-SI-size) "Load word") |
| 3328 | |
| 3329 | (define-pmacro (ne-load-fr-r name mode op ope size comment) |
| 3330 | (dni name |
| 3331 | (comment) |
| 3332 | ((UNIT LOAD) (FR500-MAJOR I-2) NON-EXCEPTING FR-ACCESS |
| 3333 | (MACH simple,tomcat,fr500,frv)) |
| 3334 | (.str name "$pack @($GRi,$GRj),$FRintk") |
| 3335 | (+ pack FRintk op GRi ope GRj) |
| 3336 | (ne-load-semantics GRi (index-of GRj) FRintk 0 size 1 |
| 3337 | (set FRintk |
| 3338 | (c-call mode (.str "@cpu@_read_mem_" mode) |
| 3339 | pc (add GRi GRj)))) |
| 3340 | ((fr500 (unit u-fr-load))) |
| 3341 | ) |
| 3342 | ) |
| 3343 | |
| 3344 | (ne-load-fr-r nldbf UQI OP_02 OPE1_28 (ne-UQI-size) "Load byte float") |
| 3345 | (ne-load-fr-r nldhf UHI OP_02 OPE1_29 (ne-UHI-size) "Load half float") |
| 3346 | (ne-load-fr-r nldf SI OP_02 OPE1_2A (ne-SI-size) "Load word float") |
| 3347 | |
| 3348 | ; Semantics for a load-double insn |
| 3349 | ; |
| 3350 | (define-pmacro (load-double-semantics not_gr mode regtype address arg) |
| 3351 | (if (orif not_gr (ne (index-of (.sym regtype doublek)) 0)) |
| 3352 | (sequence () |
| 3353 | (set address (add GRi arg)) |
| 3354 | (set (.sym regtype doublek) |
| 3355 | (c-call mode (.str "@cpu@_read_mem_" mode) pc address)))) |
| 3356 | ) |
| 3357 | |
| 3358 | (define-pmacro (load-double-r-r |
| 3359 | name not_gr mode op ope regtype attr profile comment) |
| 3360 | (dni name |
| 3361 | (comment) |
| 3362 | ((UNIT LOAD) (FR500-MAJOR I-2) (FR400-MAJOR I-2) attr) |
| 3363 | (.str name "$pack @($GRi,$GRj),$" regtype "doublek") |
| 3364 | (+ pack (.sym regtype doublek) op GRi ope GRj) |
| 3365 | (sequence ((WI address)) |
| 3366 | (load-double-semantics not_gr mode regtype address GRj)) |
| 3367 | profile |
| 3368 | ) |
| 3369 | ) |
| 3370 | |
| 3371 | (load-double-r-r ldd 0 DI OP_02 OPE1_05 GR NA |
| 3372 | ((fr400 (unit u-gr-load)) (fr500 (unit u-gr-load))) |
| 3373 | "Load double word") |
| 3374 | (load-double-r-r lddf 1 DF OP_02 OPE1_0B FR FR-ACCESS |
| 3375 | ((fr400 (unit u-fr-load)) (fr500 (unit u-fr-load))) |
| 3376 | "Load double float") |
| 3377 | (load-double-r-r lddc 1 DI OP_02 OPE1_0E CPR (MACH frv) () |
| 3378 | "Load coprocessor double") |
| 3379 | |
| 3380 | (define-pmacro (ne-load-double-r-r |
| 3381 | name not_gr mode op ope regtype size is_float attr profile |
| 3382 | comment) |
| 3383 | (dni name |
| 3384 | (comment) |
| 3385 | ((UNIT LOAD) (FR500-MAJOR I-2) NON-EXCEPTING attr |
| 3386 | (MACH simple,tomcat,fr500,frv)) |
| 3387 | (.str name "$pack @($GRi,$GRj),$" regtype "doublek") |
| 3388 | (+ pack (.sym regtype doublek) op GRi ope GRj) |
| 3389 | (sequence ((WI address)) |
| 3390 | (ne-load-semantics GRi (index-of GRj) (.sym regtype doublek) |
| 3391 | 0 size is_float |
| 3392 | (load-double-semantics not_gr mode |
| 3393 | regtype |
| 3394 | address GRj))) |
| 3395 | profile |
| 3396 | ) |
| 3397 | ) |
| 3398 | |
| 3399 | (ne-load-double-r-r nldd 0 DI OP_02 OPE1_25 GR (ne-DI-size) 0 NA |
| 3400 | ((fr500 (unit u-gr-load))) "Load double word") |
| 3401 | (ne-load-double-r-r nlddf 1 DF OP_02 OPE1_2B FR (ne-DI-size) 1 FR-ACCESS |
| 3402 | ((fr500 (unit u-fr-load))) "Load double float") |
| 3403 | |
| 3404 | ; Semantics for a load-quad insn |
| 3405 | ; |
| 3406 | (define-pmacro (load-quad-semantics regtype address arg) |
| 3407 | (sequence () |
| 3408 | (set address (add GRi arg)) |
| 3409 | (c-call VOID (.str "@cpu@_load_quad_" regtype) |
| 3410 | pc address (index-of (.sym regtype k)))) |
| 3411 | ) |
| 3412 | |
| 3413 | (define-pmacro (load-quad-r-r name op ope regtype attr profile comment) |
| 3414 | (dni name |
| 3415 | (comment) |
| 3416 | ((UNIT LOAD) (FR500-MAJOR I-2) (MACH frv) attr) |
| 3417 | (.str name "$pack @($GRi,$GRj),$" regtype "k") |
| 3418 | (+ pack (.sym regtype k) op GRi ope GRj) |
| 3419 | (sequence ((WI address)) |
| 3420 | (load-quad-semantics regtype address GRj)) |
| 3421 | ; TODO regtype-k not referenced for profiling |
| 3422 | profile |
| 3423 | ) |
| 3424 | ) |
| 3425 | |
| 3426 | (load-quad-r-r ldq OP_02 OPE1_06 GR NA ((fr500 (unit u-gr-load))) |
| 3427 | "Load quad word") |
| 3428 | (load-quad-r-r ldqf OP_02 OPE1_0C FRint FR-ACCESS ((fr500 (unit u-fr-load))) |
| 3429 | "Load quad float") |
| 3430 | (load-quad-r-r ldqc OP_02 OPE1_0F CPR NA () "Load coprocessor quad") |
| 3431 | |
| 3432 | (define-pmacro (ne-load-quad-r-r |
| 3433 | name op ope regtype size is_float attr profile comment) |
| 3434 | (dni name |
| 3435 | (comment) |
| 3436 | ((UNIT LOAD) (FR500-MAJOR I-2) (MACH frv) NON-EXCEPTING attr) |
| 3437 | (.str name "$pack @($GRi,$GRj),$" regtype "k") |
| 3438 | (+ pack (.sym regtype k) op GRi ope GRj) |
| 3439 | (sequence ((WI address)) |
| 3440 | (ne-load-semantics GRi (index-of GRj) (.sym regtype k) |
| 3441 | 0 size is_float |
| 3442 | (load-quad-semantics regtype address GRj))) |
| 3443 | ; TODO regtype-k not referenced for profiling |
| 3444 | profile |
| 3445 | ) |
| 3446 | ) |
| 3447 | |
| 3448 | (ne-load-quad-r-r nldq OP_02 OPE1_26 GR (ne-XI-size) 0 NA |
| 3449 | ((fr500 (unit u-gr-load))) "Load quad word") |
| 3450 | (ne-load-quad-r-r nldqf OP_02 OPE1_2C FRint (ne-XI-size) 1 FR-ACCESS |
| 3451 | ((fr500 (unit u-fr-load))) "Load quad float") |
| 3452 | |
| 3453 | (define-pmacro (load-gr-u-semantics mode) |
| 3454 | (sequence ((UWI address)) |
| 3455 | (set address (add GRi GRj)) |
| 3456 | (set GRk (c-call mode (.str "@cpu@_read_mem_" mode) pc address)) |
| 3457 | (if (ne (index-of GRi) (index-of GRk)) |
| 3458 | (sequence () |
| 3459 | (set GRi address) |
| 3460 | (c-call VOID "@cpu@_force_update")))) |
| 3461 | ) |
| 3462 | |
| 3463 | (define-pmacro (load-gr-u name mode op ope comment) |
| 3464 | (dni name |
| 3465 | (comment) |
| 3466 | ((UNIT LOAD) (FR500-MAJOR I-2) (FR400-MAJOR I-2)) |
| 3467 | (.str name "$pack @($GRi,$GRj),$GRk") |
| 3468 | (+ pack GRk op GRi ope GRj) |
| 3469 | (load-gr-u-semantics mode) |
| 3470 | ((fr400 (unit u-gr-load)) |
| 3471 | (fr500 (unit u-gr-load))) |
| 3472 | ) |
| 3473 | ) |
| 3474 | |
| 3475 | (load-gr-u ldsbu QI OP_02 OPE1_10 "Load signed byte, update index") |
| 3476 | (load-gr-u ldubu UQI OP_02 OPE1_11 "Load unsigned byte, update index") |
| 3477 | (load-gr-u ldshu HI OP_02 OPE1_12 "Load signed half, update index") |
| 3478 | (load-gr-u lduhu UHI OP_02 OPE1_13 "Load unsigned half, update index") |
| 3479 | (load-gr-u ldu SI OP_02 OPE1_14 "Load word, update index") |
| 3480 | |
| 3481 | (define-pmacro (ne-load-gr-u name mode op ope size comment) |
| 3482 | (dni name |
| 3483 | (comment) |
| 3484 | ((UNIT LOAD) (FR500-MAJOR I-2) NON-EXCEPTING |
| 3485 | (MACH simple,tomcat,fr500,frv)) |
| 3486 | (.str name "$pack @($GRi,$GRj),$GRk") |
| 3487 | (+ pack GRk op GRi ope GRj) |
| 3488 | (ne-load-semantics GRi (index-of GRj) GRk 0 size 0 (load-gr-u-semantics mode)) |
| 3489 | ((fr500 (unit u-gr-load))) |
| 3490 | ) |
| 3491 | ) |
| 3492 | |
| 3493 | (ne-load-gr-u nldsbu QI OP_02 OPE1_30 (ne-QI-size) "Load signed byte, update index") |
| 3494 | (ne-load-gr-u nldubu UQI OP_02 OPE1_31 (ne-UQI-size) "Load unsigned byte, update index") |
| 3495 | (ne-load-gr-u nldshu HI OP_02 OPE1_32 (ne-HI-size) "Load signed half, update index") |
| 3496 | (ne-load-gr-u nlduhu UHI OP_02 OPE1_33 (ne-UHI-size) "Load unsigned half, update index") |
| 3497 | (ne-load-gr-u nldu SI OP_02 OPE1_34 (ne-SI-size) "Load word, update index") |
| 3498 | |
| 3499 | (define-pmacro (load-non-gr-u-semantics mode regtype) |
| 3500 | (sequence ((UWI address)) |
| 3501 | (set address (add GRi GRj)) |
| 3502 | (set (.sym regtype k) |
| 3503 | (c-call mode (.str "@cpu@_read_mem_" mode) pc address)) |
| 3504 | (set GRi address) |
| 3505 | (c-call VOID "@cpu@_force_update")) |
| 3506 | ) |
| 3507 | |
| 3508 | (define-pmacro (load-fr-u name mode op ope comment) |
| 3509 | (dni name |
| 3510 | (comment) |
| 3511 | ((UNIT LOAD) (FR500-MAJOR I-2) (FR400-MAJOR I-2) FR-ACCESS) |
| 3512 | (.str name "$pack @($GRi,$GRj),$FRintk") |
| 3513 | (+ pack FRintk op GRi ope GRj) |
| 3514 | (load-non-gr-u-semantics mode FRint) |
| 3515 | ((fr400 (unit u-fr-load)) |
| 3516 | (fr500 (unit u-fr-load))) |
| 3517 | ) |
| 3518 | ) |
| 3519 | |
| 3520 | (load-fr-u ldbfu UQI OP_02 OPE1_18 "Load byte float, update index") |
| 3521 | (load-fr-u ldhfu UHI OP_02 OPE1_19 "Load half float, update index") |
| 3522 | (load-fr-u ldfu SI OP_02 OPE1_1A "Load word float, update index") |
| 3523 | |
| 3524 | (define-pmacro (load-cpr-u name mode op ope comment) |
| 3525 | (dni name |
| 3526 | (comment) |
| 3527 | ((UNIT LOAD) (FR500-MAJOR I-2) (MACH frv)) |
| 3528 | (.str name "$pack @($GRi,$GRj),$CPRk") |
| 3529 | (+ pack CPRk op GRi ope GRj) |
| 3530 | (load-non-gr-u-semantics mode CPR) |
| 3531 | () |
| 3532 | ) |
| 3533 | ) |
| 3534 | |
| 3535 | (load-cpr-u ldcu SI OP_02 OPE1_1D "Load coprocessor word float,update index") |
| 3536 | |
| 3537 | (define-pmacro (ne-load-non-gr-u name mode op ope regtype size comment) |
| 3538 | (dni name |
| 3539 | (comment) |
| 3540 | ((UNIT LOAD) (FR500-MAJOR I-2) NON-EXCEPTING FR-ACCESS |
| 3541 | (MACH simple,tomcat,fr500,frv)) |
| 3542 | (.str name "$pack @($GRi,$GRj),$" regtype "k") |
| 3543 | (+ pack (.sym regtype k) op GRi ope GRj) |
| 3544 | (ne-load-semantics GRi (index-of GRj) (.sym regtype k) 0 size 1 |
| 3545 | (load-non-gr-u-semantics mode regtype)) |
| 3546 | ((fr500 (unit u-fr-load))) |
| 3547 | ) |
| 3548 | ) |
| 3549 | |
| 3550 | (ne-load-non-gr-u nldbfu UQI OP_02 OPE1_38 FRint (ne-UQI-size) "Load byte float, update index") |
| 3551 | (ne-load-non-gr-u nldhfu UHI OP_02 OPE1_39 FRint (ne-UHI-size) "Load half float, update index") |
| 3552 | (ne-load-non-gr-u nldfu SI OP_02 OPE1_3A FRint (ne-SI-size) "Load word float, update index") |
| 3553 | |
| 3554 | (define-pmacro (load-double-gr-u-semantics) |
| 3555 | (sequence ((WI address)) |
| 3556 | (load-double-semantics 0 DI GR address GRj) |
| 3557 | (if (ne (index-of GRi) (index-of GRdoublek)) |
| 3558 | (sequence () |
| 3559 | (set GRi address) |
| 3560 | (c-call VOID "@cpu@_force_update")))) |
| 3561 | ) |
| 3562 | |
| 3563 | (define-pmacro (load-double-gr-u name op ope comment) |
| 3564 | (dni name |
| 3565 | (comment) |
| 3566 | ((UNIT LOAD) (FR500-MAJOR I-2) (FR400-MAJOR I-2)) |
| 3567 | (.str name "$pack @($GRi,$GRj),$GRdoublek") |
| 3568 | (+ pack GRdoublek op GRi ope GRj) |
| 3569 | (load-double-gr-u-semantics) |
| 3570 | ((fr400 (unit u-gr-load)) |
| 3571 | (fr500 (unit u-gr-load))) |
| 3572 | ) |
| 3573 | ) |
| 3574 | |
| 3575 | (load-double-gr-u lddu OP_02 OPE1_15 "Load double word, update index") |
| 3576 | |
| 3577 | (define-pmacro (ne-load-double-gr-u name op ope size comment) |
| 3578 | (dni name |
| 3579 | (comment) |
| 3580 | ((UNIT LOAD) (FR500-MAJOR I-2) NON-EXCEPTING |
| 3581 | (MACH simple,tomcat,fr500,frv)) |
| 3582 | (.str name "$pack @($GRi,$GRj),$GRdoublek") |
| 3583 | (+ pack GRdoublek op GRi ope GRj) |
| 3584 | (ne-load-semantics GRi (index-of GRj) GRdoublek 0 size 0 |
| 3585 | (load-double-gr-u-semantics)) |
| 3586 | ((fr500 (unit u-gr-load))) |
| 3587 | |
| 3588 | ) |
| 3589 | ) |
| 3590 | |
| 3591 | (ne-load-double-gr-u nlddu OP_02 OPE1_35 (ne-DI-size) "Load double word, update index") |
| 3592 | |
| 3593 | (define-pmacro (load-double-non-gr-u-semantics mode regtype) |
| 3594 | (sequence ((WI address)) |
| 3595 | (load-double-semantics 1 mode regtype address GRj) |
| 3596 | (set GRi address) |
| 3597 | (c-call VOID "@cpu@_force_update")) |
| 3598 | ) |
| 3599 | |
| 3600 | (define-pmacro (load-double-non-gr-u |
| 3601 | name mode op ope regtype attr profile comment) |
| 3602 | (dni name |
| 3603 | (comment) |
| 3604 | ((UNIT LOAD) (FR500-MAJOR I-2) (FR400-MAJOR I-2) attr) |
| 3605 | (.str name "$pack @($GRi,$GRj),$" regtype "doublek") |
| 3606 | (+ pack (.sym regtype doublek) op GRi ope GRj) |
| 3607 | (load-double-non-gr-u-semantics mode regtype) |
| 3608 | profile |
| 3609 | ) |
| 3610 | ) |
| 3611 | |
| 3612 | (load-double-non-gr-u lddfu DF OP_02 OPE1_1B FR FR-ACCESS |
| 3613 | ((fr400 (unit u-fr-load)) (fr500 (unit u-fr-load))) |
| 3614 | "Load double float, update index") |
| 3615 | (load-double-non-gr-u lddcu DI OP_02 OPE1_1E CPR (MACH frv) |
| 3616 | () "Load coprocessor double float, update index") |
| 3617 | |
| 3618 | (define-pmacro (ne-load-double-non-gr-u name mode op ope regtype size comment) |
| 3619 | (dni name |
| 3620 | (comment) |
| 3621 | ((UNIT LOAD) (FR500-MAJOR I-2) NON-EXCEPTING FR-ACCESS |
| 3622 | (MACH simple,tomcat,fr500,frv)) |
| 3623 | (.str name "$pack @($GRi,$GRj),$" regtype "doublek") |
| 3624 | (+ pack (.sym regtype doublek) op GRi ope GRj) |
| 3625 | (ne-load-semantics GRi (index-of GRj) (.sym regtype doublek) 0 size 1 |
| 3626 | (load-double-non-gr-u-semantics mode regtype)) |
| 3627 | ((fr500 (unit u-fr-load))) |
| 3628 | ) |
| 3629 | ) |
| 3630 | |
| 3631 | (ne-load-double-non-gr-u nlddfu DF OP_02 OPE1_3B FR (ne-DI-size) "Load double float, update index") |
| 3632 | |
| 3633 | (define-pmacro (load-quad-gr-u-semantics) |
| 3634 | (sequence ((WI address)) |
| 3635 | (load-quad-semantics GR address GRj) |
| 3636 | (if (ne (index-of GRi) (index-of GRk)) |
| 3637 | (sequence () |
| 3638 | (set GRi address) |
| 3639 | (c-call VOID "@cpu@_force_update")))) |
| 3640 | ) |
| 3641 | |
| 3642 | (define-pmacro (load-quad-gr-u name op ope comment) |
| 3643 | (dni name |
| 3644 | (comment) |
| 3645 | ((UNIT LOAD) (FR500-MAJOR I-2) (MACH frv)) |
| 3646 | (.str name "$pack @($GRi,$GRj),$GRk") |
| 3647 | (+ pack GRk op GRi ope GRj) |
| 3648 | (load-quad-gr-u-semantics) |
| 3649 | ; TODO - GRk not referenced here for profiling |
| 3650 | ((fr500 (unit u-gr-load))) |
| 3651 | ) |
| 3652 | ) |
| 3653 | |
| 3654 | (load-quad-gr-u ldqu OP_02 OPE1_16 "Load quad word, update index") |
| 3655 | |
| 3656 | (define-pmacro (ne-load-quad-gr-u name op ope size comment) |
| 3657 | (dni name |
| 3658 | (comment) |
| 3659 | ((UNIT LOAD) (FR500-MAJOR I-2) (MACH frv) NON-EXCEPTING) |
| 3660 | (.str name "$pack @($GRi,$GRj),$GRk") |
| 3661 | (+ pack GRk op GRi ope GRj) |
| 3662 | (ne-load-semantics GRi (index-of GRj) GRk 0 size 0 |
| 3663 | (load-quad-gr-u-semantics)) |
| 3664 | ; TODO - GRk not referenced here for profiling |
| 3665 | ((fr500 (unit u-gr-load))) |
| 3666 | ) |
| 3667 | ) |
| 3668 | |
| 3669 | (ne-load-quad-gr-u nldqu OP_02 OPE1_36 (ne-XI-size) "Load quad word, update index") |
| 3670 | |
| 3671 | (define-pmacro (load-quad-non-gr-u-semantics regtype) |
| 3672 | (sequence ((WI address)) |
| 3673 | (load-quad-semantics regtype address GRj) |
| 3674 | (set GRi address) |
| 3675 | (c-call VOID "@cpu@_force_update")) |
| 3676 | ) |
| 3677 | |
| 3678 | (define-pmacro (load-quad-non-gr-u name op ope regtype attr profile comment) |
| 3679 | (dni name |
| 3680 | (comment) |
| 3681 | ((UNIT LOAD) (FR500-MAJOR I-2) (MACH frv) attr) |
| 3682 | (.str name "$pack @($GRi,$GRj),$" regtype "k") |
| 3683 | (+ pack (.sym regtype k) op GRi ope GRj) |
| 3684 | (load-quad-non-gr-u-semantics regtype) |
| 3685 | profile |
| 3686 | ) |
| 3687 | ) |
| 3688 | |
| 3689 | (load-quad-non-gr-u ldqfu OP_02 OPE1_1C FRint FR-ACCESS |
| 3690 | ((fr500 (unit u-fr-load))) "Load quad float, update index") |
| 3691 | (load-quad-non-gr-u ldqcu OP_02 OPE1_1F CPR NA |
| 3692 | () "Load coprocessor quad word, update index") |
| 3693 | |
| 3694 | (define-pmacro (ne-load-quad-non-gr-u name op ope regtype size comment) |
| 3695 | (dni name |
| 3696 | (comment) |
| 3697 | ((UNIT LOAD) (FR500-MAJOR I-2) (MACH frv) NON-EXCEPTING FR-ACCESS) |
| 3698 | (.str name "$pack @($GRi,$GRj),$" regtype "k") |
| 3699 | (+ pack (.sym regtype k) op GRi ope GRj) |
| 3700 | (ne-load-semantics GRi (index-of GRj) (.sym regtype k) 0 size 1 |
| 3701 | (load-quad-non-gr-u-semantics regtype)) |
| 3702 | ((fr500 (unit u-fr-load))) |
| 3703 | ) |
| 3704 | ) |
| 3705 | |
| 3706 | (ne-load-quad-non-gr-u nldqfu OP_02 OPE1_3C FRint (ne-XI-size) "Load quad float,update index") |
| 3707 | |
| 3708 | (define-pmacro (load-r-simm name mode op regtype attr profile comment) |
| 3709 | (dni name |
| 3710 | (comment) |
| 3711 | ((UNIT LOAD) (FR500-MAJOR I-2) (FR400-MAJOR I-2) attr) |
| 3712 | (.str name "$pack @($GRi,$d12),$" regtype "k") |
| 3713 | (+ pack (.sym regtype k) op GRi d12) |
| 3714 | (set (.sym regtype k) |
| 3715 | (c-call mode (.str "@cpu@_read_mem_" mode) pc (add GRi d12))) |
| 3716 | profile |
| 3717 | ) |
| 3718 | ) |
| 3719 | |
| 3720 | (load-r-simm ldsbi QI OP_30 GR NA |
| 3721 | ((fr400 (unit u-gr-load)) (fr500 (unit u-gr-load))) |
| 3722 | "Load signed byte") |
| 3723 | (load-r-simm ldshi HI OP_31 GR NA |
| 3724 | ((fr400 (unit u-gr-load)) (fr500 (unit u-gr-load))) |
| 3725 | "Load signed half") |
| 3726 | (load-r-simm ldi SI OP_32 GR NA |
| 3727 | ((fr400 (unit u-gr-load)) (fr500 (unit u-gr-load))) |
| 3728 | "Load word") |
| 3729 | (load-r-simm ldubi UQI OP_35 GR NA |
| 3730 | ((fr400 (unit u-gr-load)) (fr500 (unit u-gr-load))) |
| 3731 | "Load unsigned byte") |
| 3732 | (load-r-simm lduhi UHI OP_36 GR NA |
| 3733 | ((fr400 (unit u-gr-load)) (fr500 (unit u-gr-load))) |
| 3734 | "Load unsigned half") |
| 3735 | |
| 3736 | (load-r-simm ldbfi UQI OP_38 FRint FR-ACCESS |
| 3737 | ((fr400 (unit u-fr-load)) (fr500 (unit u-fr-load))) |
| 3738 | "Load byte float") |
| 3739 | (load-r-simm ldhfi UHI OP_39 FRint FR-ACCESS |
| 3740 | ((fr400 (unit u-fr-load)) (fr500 (unit u-fr-load))) |
| 3741 | "Load half float") |
| 3742 | (load-r-simm ldfi SI OP_3A FRint FR-ACCESS |
| 3743 | ((fr400 (unit u-fr-load)) (fr500 (unit u-fr-load))) |
| 3744 | "Load word float") |
| 3745 | |
| 3746 | (define-pmacro (ne-load-r-simm |
| 3747 | name mode op regtype size is_float attr profile comment) |
| 3748 | (dni name |
| 3749 | (comment) |
| 3750 | ((UNIT LOAD) (FR500-MAJOR I-2) NON-EXCEPTING attr |
| 3751 | (MACH simple,tomcat,fr500,frv)) |
| 3752 | (.str name "$pack @($GRi,$d12),$" regtype "k") |
| 3753 | (+ pack (.sym regtype k) op GRi d12) |
| 3754 | (ne-load-semantics GRi -1 (.sym regtype k) d12 size is_float |
| 3755 | (set (.sym regtype k) |
| 3756 | (c-call mode (.str "@cpu@_read_mem_" mode) |
| 3757 | pc (add GRi d12)))) |
| 3758 | profile |
| 3759 | ) |
| 3760 | ) |
| 3761 | |
| 3762 | (ne-load-r-simm nldsbi QI OP_40 GR (ne-QI-size) 0 NA |
| 3763 | ((fr500 (unit u-gr-load))) "Load signed byte") |
| 3764 | (ne-load-r-simm nldubi UQI OP_41 GR (ne-UQI-size) 0 NA |
| 3765 | ((fr500 (unit u-gr-load))) "Load unsigned byte") |
| 3766 | (ne-load-r-simm nldshi HI OP_42 GR (ne-HI-size) 0 NA |
| 3767 | ((fr500 (unit u-gr-load))) "Load signed half") |
| 3768 | (ne-load-r-simm nlduhi UHI OP_43 GR (ne-UHI-size) 0 NA |
| 3769 | ((fr500 (unit u-gr-load))) "Load unsigned half") |
| 3770 | (ne-load-r-simm nldi SI OP_44 GR (ne-SI-size) 0 NA |
| 3771 | ((fr500 (unit u-gr-load))) "Load word") |
| 3772 | |
| 3773 | (ne-load-r-simm nldbfi UQI OP_48 FRint (ne-UQI-size) 1 FR-ACCESS |
| 3774 | ((fr500 (unit u-fr-load))) "Load byte float") |
| 3775 | (ne-load-r-simm nldhfi UHI OP_49 FRint (ne-UHI-size) 1 FR-ACCESS |
| 3776 | ((fr500 (unit u-fr-load))) "Load half float") |
| 3777 | (ne-load-r-simm nldfi SI OP_4A FRint (ne-SI-size) 1 FR-ACCESS |
| 3778 | ((fr500 (unit u-fr-load))) "Load word float") |
| 3779 | |
| 3780 | (define-pmacro (load-double-r-simm |
| 3781 | name not_gr mode op regtype attr profile comment) |
| 3782 | (dni name |
| 3783 | (comment) |
| 3784 | ((UNIT LOAD) (FR500-MAJOR I-2) (FR400-MAJOR I-2) attr) |
| 3785 | (.str name "$pack @($GRi,$d12),$" regtype "doublek") |
| 3786 | (+ pack (.sym regtype doublek) op GRi d12) |
| 3787 | (sequence ((WI address)) |
| 3788 | (load-double-semantics not_gr mode regtype address d12)) |
| 3789 | profile |
| 3790 | ) |
| 3791 | ) |
| 3792 | |
| 3793 | (load-double-r-simm lddi 0 DI OP_33 GR NA |
| 3794 | ((fr400 (unit u-gr-load)) (fr500 (unit u-gr-load))) |
| 3795 | "Load double word") |
| 3796 | (load-double-r-simm lddfi 1 DF OP_3B FR FR-ACCESS |
| 3797 | ((fr400 (unit u-fr-load)) (fr500 (unit u-fr-load))) |
| 3798 | "Load double float") |
| 3799 | |
| 3800 | (define-pmacro (ne-load-double-r-simm |
| 3801 | name not_gr mode op regtype size is_float attr profile comment) |
| 3802 | (dni name |
| 3803 | (comment) |
| 3804 | ((UNIT LOAD) (FR500-MAJOR I-2) NON-EXCEPTING attr |
| 3805 | (MACH simple,tomcat,fr500,frv)) |
| 3806 | (.str name "$pack @($GRi,$d12),$" regtype "doublek") |
| 3807 | (+ pack (.sym regtype doublek) op GRi d12) |
| 3808 | (sequence ((WI address)) |
| 3809 | (ne-load-semantics GRi -1 (.sym regtype doublek) |
| 3810 | d12 size is_float |
| 3811 | (load-double-semantics not_gr mode |
| 3812 | regtype |
| 3813 | address d12))) |
| 3814 | profile |
| 3815 | ) |
| 3816 | ) |
| 3817 | |
| 3818 | (ne-load-double-r-simm nlddi 0 DI OP_45 GR (ne-DI-size) 0 NA |
| 3819 | ((fr500 (unit u-gr-load))) "Load double word") |
| 3820 | (ne-load-double-r-simm nlddfi 1 DF OP_4B FR (ne-DI-size) 1 FR-ACCESS |
| 3821 | ((fr500 (unit u-fr-load))) "Load double float") |
| 3822 | |
| 3823 | (define-pmacro (load-quad-r-simm name op regtype attr profile comment) |
| 3824 | (dni name |
| 3825 | (comment) |
| 3826 | ((UNIT LOAD) (FR500-MAJOR I-2) (MACH frv) attr) |
| 3827 | (.str name "$pack @($GRi,$d12),$" regtype "k") |
| 3828 | (+ pack (.sym regtype k) op GRi d12) |
| 3829 | (sequence ((WI address)) |
| 3830 | (load-quad-semantics regtype address d12)) |
| 3831 | profile |
| 3832 | ) |
| 3833 | ) |
| 3834 | |
| 3835 | (load-quad-r-simm ldqi OP_34 GR NA |
| 3836 | ((fr500 (unit u-gr-load))) "Load quad word") |
| 3837 | (load-quad-r-simm ldqfi OP_3C FRint FR-ACCESS |
| 3838 | ((fr500 (unit u-fr-load))) "Load quad float") |
| 3839 | |
| 3840 | (define-pmacro (ne-load-quad-r-simm |
| 3841 | name op regtype size is_float attr profile comment) |
| 3842 | (dni name |
| 3843 | (comment) |
| 3844 | ((UNIT LOAD) (FR500-MAJOR I-2) (MACH frv) NON-EXCEPTING attr) |
| 3845 | (.str name "$pack @($GRi,$d12),$" regtype "k") |
| 3846 | (+ pack (.sym regtype k) op GRi d12) |
| 3847 | (sequence ((WI address)) |
| 3848 | (ne-load-semantics GRi -1 (.sym regtype k) d12 size is_float |
| 3849 | (load-quad-semantics regtype address d12))) |
| 3850 | profile |
| 3851 | ) |
| 3852 | ) |
| 3853 | |
| 3854 | (ne-load-quad-r-simm nldqi OP_46 GR (ne-XI-size) 0 NA |
| 3855 | ((fr500 (unit u-gr-load))) "Load quad word") |
| 3856 | (ne-load-quad-r-simm nldqfi OP_4C FRint (ne-XI-size) 1 FR-ACCESS |
| 3857 | ((fr500 (unit u-fr-load))) "Load quad float") |
| 3858 | |
| 3859 | (define-pmacro (store-r-r name mode op ope reg attr profile comment) |
| 3860 | (dni name |
| 3861 | (comment) |
| 3862 | ((UNIT STORE) (FR500-MAJOR I-3) (FR400-MAJOR I-3) attr) |
| 3863 | (.str name "$pack $" reg "k,@($GRi,$GRj)") |
| 3864 | (+ pack (.sym reg k) op GRi ope GRj) |
| 3865 | (c-call VOID (.str "@cpu@_write_mem_" mode) |
| 3866 | pc (add GRi GRj) (.sym reg k)) |
| 3867 | profile |
| 3868 | ) |
| 3869 | ) |
| 3870 | |
| 3871 | (store-r-r stb QI OP_03 OPE1_00 GR NA |
| 3872 | ((fr400 (unit u-gr-store)) (fr500 (unit u-gr-store))) |
| 3873 | "Store unsigned byte") |
| 3874 | (store-r-r sth HI OP_03 OPE1_01 GR NA |
| 3875 | ((fr400 (unit u-gr-store)) (fr500 (unit u-gr-store))) |
| 3876 | "Store unsigned half") |
| 3877 | (store-r-r st SI OP_03 OPE1_02 GR NA |
| 3878 | ((fr400 (unit u-gr-store)) (fr500 (unit u-gr-store))) |
| 3879 | "Store word") |
| 3880 | |
| 3881 | (store-r-r stbf QI OP_03 OPE1_08 FRint FR-ACCESS |
| 3882 | ((fr400 (unit u-fr-store)) (fr500 (unit u-fr-store))) |
| 3883 | "Store byte float") |
| 3884 | (store-r-r sthf HI OP_03 OPE1_09 FRint FR-ACCESS |
| 3885 | ((fr400 (unit u-fr-store)) (fr500 (unit u-fr-store))) |
| 3886 | "Store half float") |
| 3887 | (store-r-r stf SI OP_03 OPE1_0A FRint FR-ACCESS |
| 3888 | ((fr400 (unit u-fr-store)) (fr500 (unit u-fr-store))) |
| 3889 | "Store word float") |
| 3890 | |
| 3891 | (store-r-r stc SI OP_03 OPE1_25 CPR (MACH frv) () "Store coprocessor word") |
| 3892 | |
| 3893 | (define-pmacro (r-store name mode op ope reg size is_float profile comment) |
| 3894 | (dni name |
| 3895 | (comment) |
| 3896 | ((UNIT STORE) (FR500-MAJOR I-3) (MACH frv)) |
| 3897 | (.str name "$pack $" reg "k,@($GRi,$GRj)") |
| 3898 | (+ pack (.sym reg k) op GRi ope GRj) |
| 3899 | (sequence ((WI address)) |
| 3900 | (set address (add GRi GRj)) |
| 3901 | (c-call VOID (.str "@cpu@_write_mem_" mode) |
| 3902 | pc address (.sym reg k)) |
| 3903 | (c-call VOID "@cpu@_check_recovering_store" |
| 3904 | address (index-of (.sym reg k)) size is_float)) |
| 3905 | profile |
| 3906 | ) |
| 3907 | ) |
| 3908 | |
| 3909 | (r-store rstb QI OP_03 OPE1_20 GR 1 0 |
| 3910 | ((fr500 (unit u-gr-r-store))) "Store unsigned byte") |
| 3911 | (r-store rsth HI OP_03 OPE1_21 GR 2 0 |
| 3912 | ((fr500 (unit u-gr-r-store))) "Store unsigned half") |
| 3913 | (r-store rst SI OP_03 OPE1_22 GR 4 0 |
| 3914 | ((fr500 (unit u-gr-r-store))) "Store word") |
| 3915 | |
| 3916 | (r-store rstbf QI OP_03 OPE1_28 FRint 1 1 |
| 3917 | ((fr500 (unit u-fr-r-store))) "Store byte float") |
| 3918 | (r-store rsthf HI OP_03 OPE1_29 FRint 2 1 |
| 3919 | ((fr500 (unit u-fr-r-store))) "Store half float") |
| 3920 | (r-store rstf SI OP_03 OPE1_2A FRint 4 1 |
| 3921 | ((fr500 (unit u-fr-r-store))) "Store word float") |
| 3922 | |
| 3923 | ; Semantics for a store-double insn |
| 3924 | ; |
| 3925 | (define-pmacro (store-double-semantics mode regtype address arg) |
| 3926 | (sequence () |
| 3927 | (set address (add GRi arg)) |
| 3928 | (c-call VOID (.str "@cpu@_write_mem_" mode) |
| 3929 | pc address (.sym regtype doublek))) |
| 3930 | ) |
| 3931 | |
| 3932 | (define-pmacro (store-double-r-r name mode op ope regtype attr profile comment) |
| 3933 | (dni name |
| 3934 | (comment) |
| 3935 | ((UNIT STORE) (FR500-MAJOR I-3) (FR400-MAJOR I-3) attr) |
| 3936 | (.str name "$pack $" regtype "k,@($GRi,$GRj)") |
| 3937 | (+ pack (.sym regtype k) op GRi ope GRj) |
| 3938 | (sequence ((WI address)) |
| 3939 | (store-double-semantics mode regtype address GRj)) |
| 3940 | profile |
| 3941 | ) |
| 3942 | ) |
| 3943 | |
| 3944 | (store-double-r-r std DI OP_03 OPE1_03 GR NA |
| 3945 | ((fr400 (unit u-gr-store)) (fr500 (unit u-gr-store))) |
| 3946 | "Store double word") |
| 3947 | (store-double-r-r stdf DF OP_03 OPE1_0B FR FR-ACCESS |
| 3948 | ((fr400 (unit u-fr-store)) (fr500 (unit u-fr-store))) |
| 3949 | "Store double float") |
| 3950 | |
| 3951 | (store-double-r-r stdc DI OP_03 OPE1_26 CPR (MACH frv) |
| 3952 | () "Store coprocessor double word") |
| 3953 | |
| 3954 | (define-pmacro (r-store-double |
| 3955 | name mode op ope regtype is_float attr profile comment) |
| 3956 | (dni name |
| 3957 | (comment) |
| 3958 | ((UNIT STORE) (FR500-MAJOR I-3) (MACH frv) attr) |
| 3959 | (.str name "$pack $" regtype "k,@($GRi,$GRj)") |
| 3960 | (+ pack (.sym regtype k) op GRi ope GRj) |
| 3961 | (sequence ((WI address)) |
| 3962 | (store-double-semantics mode regtype address GRj) |
| 3963 | (c-call VOID "@cpu@_check_recovering_store" |
| 3964 | address (index-of (.sym regtype k)) 8 is_float)) |
| 3965 | profile |
| 3966 | ) |
| 3967 | ) |
| 3968 | |
| 3969 | (r-store-double rstd DI OP_03 OPE1_23 GR 0 NA |
| 3970 | ((fr500 (unit u-gr-r-store))) "Store double word") |
| 3971 | (r-store-double rstdf DF OP_03 OPE1_2B FR 1 FR-ACCESS |
| 3972 | ((fr500 (unit u-fr-r-store))) "Store double float") |
| 3973 | |
| 3974 | ; Semantics for a store-quad insn |
| 3975 | ; |
| 3976 | (define-pmacro (store-quad-semantics regtype address arg) |
| 3977 | (sequence () |
| 3978 | (set address (add GRi arg)) |
| 3979 | (c-call VOID (.str "@cpu@_store_quad_" regtype) |
| 3980 | pc address (index-of (.sym regtype k)))) |
| 3981 | ) |
| 3982 | |
| 3983 | (define-pmacro (store-quad-r-r name op ope regtype attr profile comment) |
| 3984 | (dni name |
| 3985 | (comment) |
| 3986 | ((UNIT STORE) (FR500-MAJOR I-3) (MACH frv) attr) |
| 3987 | (.str name "$pack $" regtype "k,@($GRi,$GRj)") |
| 3988 | (+ pack (.sym regtype k) op GRi ope GRj) |
| 3989 | (sequence ((WI address)) |
| 3990 | (store-quad-semantics regtype address GRj)) |
| 3991 | profile |
| 3992 | ) |
| 3993 | ) |
| 3994 | |
| 3995 | (store-quad-r-r stq OP_03 OPE1_04 GR NA |
| 3996 | ((fr500 (unit u-gr-store))) "Store quad word") |
| 3997 | (store-quad-r-r stqf OP_03 OPE1_0C FRint FR-ACCESS |
| 3998 | ((fr500 (unit u-fr-store))) |
| 3999 | "Store quad float") |
| 4000 | (store-quad-r-r stqc OP_03 OPE1_27 CPR NA |
| 4001 | () "Store coprocessor quad word") |
| 4002 | |
| 4003 | (define-pmacro (r-store-quad name op ope regtype is_float attr profile comment) |
| 4004 | (dni name |
| 4005 | (comment) |
| 4006 | ((UNIT STORE) (FR500-MAJOR I-3) (MACH frv) attr) |
| 4007 | (.str name "$pack $" regtype "k,@($GRi,$GRj)") |
| 4008 | (+ pack (.sym regtype k) op GRi ope GRj) |
| 4009 | (sequence ((WI address)) |
| 4010 | (store-quad-semantics regtype address GRj) |
| 4011 | (c-call VOID "@cpu@_check_recovering_store" |
| 4012 | address (index-of (.sym regtype k)) 16 is_float)) |
| 4013 | profile |
| 4014 | ) |
| 4015 | ) |
| 4016 | |
| 4017 | (r-store-quad rstq OP_03 OPE1_24 GR 0 NA |
| 4018 | ((fr500 (unit u-gr-r-store))) "Store quad word") |
| 4019 | (r-store-quad rstqf OP_03 OPE1_2C FRint 1 FR-ACCESS |
| 4020 | ((fr500 (unit u-fr-r-store))) "Store quad float") |
| 4021 | |
| 4022 | (define-pmacro (store-r-r-u name mode op ope regtype attr profile comment) |
| 4023 | (dni name |
| 4024 | (comment) |
| 4025 | ((UNIT STORE) (FR500-MAJOR I-3) (FR400-MAJOR I-3) attr) |
| 4026 | (.str name "$pack $" regtype "k,@($GRi,$GRj)") |
| 4027 | (+ pack (.sym regtype k) op GRi ope GRj) |
| 4028 | (sequence ((UWI address)) |
| 4029 | (set address (add GRi GRj)) |
| 4030 | (c-call VOID (.str "@cpu@_write_mem_" mode) |
| 4031 | pc address (.sym regtype k)) |
| 4032 | (set GRi address)) |
| 4033 | profile |
| 4034 | ) |
| 4035 | ) |
| 4036 | |
| 4037 | (store-r-r-u stbu QI OP_03 OPE1_10 GR NA |
| 4038 | ((fr400 (unit u-gr-store)) (fr500 (unit u-gr-store))) |
| 4039 | "Store unsigned byte, update index") |
| 4040 | (store-r-r-u sthu HI OP_03 OPE1_11 GR NA |
| 4041 | ((fr400 (unit u-gr-store)) (fr500 (unit u-gr-store))) |
| 4042 | "Store unsigned half, update index") |
| 4043 | (store-r-r-u stu WI OP_03 OPE1_12 GR NA |
| 4044 | ((fr400 (unit u-gr-store)) (fr500 (unit u-gr-store))) |
| 4045 | "Store word, update index") |
| 4046 | |
| 4047 | (store-r-r-u stbfu QI OP_03 OPE1_18 FRint FR-ACCESS |
| 4048 | ((fr400 (unit u-fr-store)) (fr500 (unit u-fr-store))) |
| 4049 | "Store byte float, update index") |
| 4050 | (store-r-r-u sthfu HI OP_03 OPE1_19 FRint FR-ACCESS |
| 4051 | ((fr400 (unit u-fr-store)) (fr500 (unit u-fr-store))) |
| 4052 | "Store half float, update index") |
| 4053 | (store-r-r-u stfu SI OP_03 OPE1_1A FRint FR-ACCESS |
| 4054 | ((fr400 (unit u-fr-store)) (fr500 (unit u-fr-store))) |
| 4055 | "Store word float, update index") |
| 4056 | |
| 4057 | (store-r-r-u stcu SI OP_03 OPE1_2D CPR (MACH frv) () |
| 4058 | "Store coprocessor word, update index") |
| 4059 | |
| 4060 | (define-pmacro (store-double-r-r-u |
| 4061 | name mode op ope regtype attr profile comment) |
| 4062 | (dni name |
| 4063 | (comment) |
| 4064 | ((UNIT STORE) (FR500-MAJOR I-3) (FR400-MAJOR I-3) attr) |
| 4065 | (.str name "$pack $" regtype "k,@($GRi,$GRj)") |
| 4066 | (+ pack (.sym regtype k) op GRi ope GRj) |
| 4067 | (sequence ((WI address)) |
| 4068 | (store-double-semantics mode regtype address GRj) |
| 4069 | (set GRi address)) |
| 4070 | profile |
| 4071 | ) |
| 4072 | ) |
| 4073 | |
| 4074 | (store-double-r-r-u stdu DI OP_03 OPE1_13 GR NA |
| 4075 | ((fr400 (unit u-gr-store)) (fr500 (unit u-gr-store))) |
| 4076 | "Store double word, update index") |
| 4077 | (store-double-r-r-u stdfu DF OP_03 OPE1_1B FR FR-ACCESS |
| 4078 | ((fr400 (unit u-fr-store)) (fr500 (unit u-fr-store))) |
| 4079 | "Store double float,update index") |
| 4080 | (store-double-r-r-u stdcu DI OP_03 OPE1_2E CPR (MACH frv) () |
| 4081 | "Store coprocessor double word, update index") |
| 4082 | |
| 4083 | (define-pmacro (store-quad-r-r-u name op ope regtype attr profile comment) |
| 4084 | (dni name |
| 4085 | (comment) |
| 4086 | ((UNIT STORE) (FR500-MAJOR I-3) (MACH frv) attr) |
| 4087 | (.str name "$pack $" regtype "k,@($GRi,$GRj)") |
| 4088 | (+ pack (.sym regtype k) op GRi ope GRj) |
| 4089 | (sequence ((WI address)) |
| 4090 | (store-quad-semantics regtype address GRj) |
| 4091 | (set GRi address)) |
| 4092 | profile |
| 4093 | ) |
| 4094 | ) |
| 4095 | |
| 4096 | (store-quad-r-r-u stqu OP_03 OPE1_14 GR NA |
| 4097 | ((fr500 (unit u-gr-store))) |
| 4098 | "Store quad word, update index") |
| 4099 | (store-quad-r-r-u stqfu OP_03 OPE1_1C FRint FR-ACCESS |
| 4100 | ((fr500 (unit u-fr-store))) |
| 4101 | "Store quad float, update index") |
| 4102 | (store-quad-r-r-u stqcu OP_03 OPE1_2F CPR NA () |
| 4103 | "Store coprocessor quad word, update index") |
| 4104 | |
| 4105 | (define-pmacro (conditional-load name mode op ope regtype profile comment) |
| 4106 | (dni name |
| 4107 | (comment) |
| 4108 | ((UNIT LOAD) (FR500-MAJOR I-2) (FR400-MAJOR I-2) CONDITIONAL) |
| 4109 | (.str name "$pack @($GRi,$GRj),$" regtype "k,$CCi,$cond") |
| 4110 | (+ pack (.sym regtype k) op GRi CCi cond ope GRj) |
| 4111 | (if (eq CCi (or cond 2)) |
| 4112 | (set (.sym regtype k) |
| 4113 | (c-call mode (.str "@cpu@_read_mem_" mode) pc (add GRi GRj)))) |
| 4114 | profile |
| 4115 | ) |
| 4116 | ) |
| 4117 | |
| 4118 | (conditional-load cldsb QI OP_5E OPE4_0 GR |
| 4119 | ((fr400 (unit u-gr-load)) (fr500 (unit u-gr-load))) |
| 4120 | "Load signed byte") |
| 4121 | (conditional-load cldub UQI OP_5E OPE4_1 GR |
| 4122 | ((fr400 (unit u-gr-load)) (fr500 (unit u-gr-load))) |
| 4123 | "Load unsigned byte") |
| 4124 | (conditional-load cldsh HI OP_5E OPE4_2 GR |
| 4125 | ((fr400 (unit u-gr-load)) (fr500 (unit u-gr-load))) |
| 4126 | "Load signed half") |
| 4127 | (conditional-load clduh UHI OP_5E OPE4_3 GR |
| 4128 | ((fr400 (unit u-gr-load)) (fr500 (unit u-gr-load))) |
| 4129 | "Load unsigned half") |
| 4130 | (conditional-load cld SI OP_5F OPE4_0 GR |
| 4131 | ((fr400 (unit u-gr-load)) (fr500 (unit u-gr-load))) |
| 4132 | "Load word") |
| 4133 | |
| 4134 | (conditional-load cldbf UQI OP_60 OPE4_0 FRint |
| 4135 | ((fr400 (unit u-fr-load)) (fr500 (unit u-fr-load))) |
| 4136 | "Load byte float") |
| 4137 | (conditional-load cldhf UHI OP_60 OPE4_1 FRint |
| 4138 | ((fr400 (unit u-fr-load)) (fr500 (unit u-fr-load))) |
| 4139 | "Load half float") |
| 4140 | (conditional-load cldf SI OP_60 OPE4_2 FRint |
| 4141 | ((fr400 (unit u-fr-load)) (fr500 (unit u-fr-load))) |
| 4142 | "Load word float") |
| 4143 | |
| 4144 | (define-pmacro (conditional-load-double |
| 4145 | name not_gr mode op ope regtype attr profile comment) |
| 4146 | (dni name |
| 4147 | (comment) |
| 4148 | ((UNIT LOAD) (FR500-MAJOR I-2) (FR400-MAJOR I-2) CONDITIONAL attr) |
| 4149 | (.str name "$pack @($GRi,$GRj),$" regtype "doublek,$CCi,$cond") |
| 4150 | (+ pack (.sym regtype doublek) op GRi CCi cond ope GRj) |
| 4151 | (if (eq CCi (or cond 2)) |
| 4152 | (sequence ((WI address)) |
| 4153 | (load-double-semantics not_gr mode regtype address GRj))) |
| 4154 | profile |
| 4155 | ) |
| 4156 | ) |
| 4157 | |
| 4158 | (conditional-load-double cldd 0 DI OP_5F OPE4_1 GR NA |
| 4159 | ((fr400 (unit u-gr-load)) (fr500 (unit u-gr-load))) |
| 4160 | "Load double word") |
| 4161 | (conditional-load-double clddf 1 DF OP_60 OPE4_3 FR FR-ACCESS |
| 4162 | ((fr400 (unit u-gr-load)) (fr500 (unit u-gr-load))) |
| 4163 | "Load double float") |
| 4164 | |
| 4165 | (dni cldq |
| 4166 | "conditional load quad integer" |
| 4167 | ((UNIT LOAD) (FR500-MAJOR I-2) (MACH frv) CONDITIONAL) |
| 4168 | "cldq$pack @($GRi,$GRj),$GRk,$CCi,$cond" |
| 4169 | (+ pack GRk OP_5F GRi CCi cond OPE4_2 GRj) |
| 4170 | (if (eq CCi (or cond 2)) |
| 4171 | (sequence ((WI address)) |
| 4172 | (load-quad-semantics GR address GRj))) |
| 4173 | ((fr500 (unit u-gr-load))) |
| 4174 | ) |
| 4175 | |
| 4176 | (define-pmacro (conditional-load-gr-u name mode op ope comment) |
| 4177 | (dni name |
| 4178 | (comment) |
| 4179 | ((UNIT LOAD) (FR500-MAJOR I-2) (FR400-MAJOR I-2) CONDITIONAL) |
| 4180 | (.str name "$pack @($GRi,$GRj),$GRk,$CCi,$cond") |
| 4181 | (+ pack GRk op GRi CCi cond ope GRj) |
| 4182 | (if (eq CCi (or cond 2)) |
| 4183 | (sequence ((WI address)) |
| 4184 | (set address (add GRi GRj)) |
| 4185 | (set GRk |
| 4186 | (c-call mode (.str "@cpu@_read_mem_" mode) |
| 4187 | pc address)) |
| 4188 | (if (ne (index-of GRi) (index-of GRk)) |
| 4189 | (set GRi address)))) |
| 4190 | ((fr400 (unit u-gr-load)) |
| 4191 | (fr500 (unit u-gr-load))) |
| 4192 | ) |
| 4193 | ) |
| 4194 | |
| 4195 | (conditional-load-gr-u cldsbu QI OP_61 OPE4_0 "Load signed byte, update") |
| 4196 | (conditional-load-gr-u cldubu UQI OP_61 OPE4_1 "Load unsigned byte, update") |
| 4197 | (conditional-load-gr-u cldshu HI OP_61 OPE4_2 "Load signed half, update") |
| 4198 | (conditional-load-gr-u clduhu UHI OP_61 OPE4_3 "Load unsigned half, update") |
| 4199 | (conditional-load-gr-u cldu SI OP_62 OPE4_0 "Load word, update") |
| 4200 | |
| 4201 | (define-pmacro (conditional-load-non-gr-u name mode op ope regtype comment) |
| 4202 | (dni name |
| 4203 | (comment) |
| 4204 | ((UNIT LOAD) (FR500-MAJOR I-2) (FR400-MAJOR I-2) CONDITIONAL FR-ACCESS) |
| 4205 | (.str name "$pack @($GRi,$GRj),$" regtype "k,$CCi,$cond") |
| 4206 | (+ pack (.sym regtype k) op GRi CCi cond ope GRj) |
| 4207 | (if (eq CCi (or cond 2)) |
| 4208 | (sequence ((WI address)) |
| 4209 | (set address (add GRi GRj)) |
| 4210 | (set (.sym regtype k) |
| 4211 | (c-call mode (.str "@cpu@_read_mem_" mode) |
| 4212 | pc address)) |
| 4213 | (set GRi address))) |
| 4214 | ((fr400 (unit u-fr-load)) |
| 4215 | (fr500 (unit u-fr-load))) |
| 4216 | ) |
| 4217 | ) |
| 4218 | |
| 4219 | (conditional-load-non-gr-u cldbfu UQI OP_63 OPE4_0 FRint "Load byte float, update") |
| 4220 | (conditional-load-non-gr-u cldhfu UHI OP_63 OPE4_1 FRint "Load half float, update") |
| 4221 | (conditional-load-non-gr-u cldfu SI OP_63 OPE4_2 FRint "Load word float, update") |
| 4222 | |
| 4223 | |
| 4224 | (dni clddu |
| 4225 | "Load double word, update" |
| 4226 | ((UNIT LOAD) (FR500-MAJOR I-2) (FR400-MAJOR I-2) CONDITIONAL) |
| 4227 | "clddu$pack @($GRi,$GRj),$GRdoublek,$CCi,$cond" |
| 4228 | (+ pack GRdoublek OP_62 GRi CCi cond OPE4_1 GRj) |
| 4229 | (if (eq CCi (or cond 2)) |
| 4230 | (sequence ((WI address)) |
| 4231 | (load-double-semantics 0 DI GR address GRj) |
| 4232 | (if (ne (index-of GRi) (index-of GRdoublek)) |
| 4233 | (set GRi address)))) |
| 4234 | ((fr400 (unit u-gr-load)) |
| 4235 | (fr500 (unit u-gr-load))) |
| 4236 | ) |
| 4237 | |
| 4238 | (dni clddfu |
| 4239 | "Load double float, update" |
| 4240 | ((UNIT LOAD) (FR500-MAJOR I-2) (FR400-MAJOR I-2) CONDITIONAL FR-ACCESS) |
| 4241 | "clddfu$pack @($GRi,$GRj),$FRdoublek,$CCi,$cond" |
| 4242 | (+ pack FRdoublek OP_63 GRi CCi cond OPE4_3 GRj) |
| 4243 | (if (eq CCi (or cond 2)) |
| 4244 | (sequence ((WI address)) |
| 4245 | (load-double-semantics 1 DF FR address GRj) |
| 4246 | (set GRi address))) |
| 4247 | ((fr400 (unit u-fr-load)) |
| 4248 | (fr500 (unit u-fr-load))) |
| 4249 | ) |
| 4250 | |
| 4251 | (dni cldqu |
| 4252 | "conditional load quad integer and update index" |
| 4253 | ((UNIT LOAD) (FR500-MAJOR I-2) (MACH frv) CONDITIONAL) |
| 4254 | "cldqu$pack @($GRi,$GRj),$GRk,$CCi,$cond" |
| 4255 | (+ pack GRk OP_62 GRi CCi cond OPE4_2 GRj) |
| 4256 | (if (eq CCi (or cond 2)) |
| 4257 | (sequence ((WI address)) |
| 4258 | (load-quad-semantics GR address GRj) |
| 4259 | (if (ne (index-of GRi) (index-of GRk)) |
| 4260 | (set GRi address)))) |
| 4261 | ((fr500 (unit u-gr-load))) |
| 4262 | ) |
| 4263 | |
| 4264 | (define-pmacro (conditional-store name mode op ope regtype profile comment) |
| 4265 | (dni name |
| 4266 | (comment) |
| 4267 | ((UNIT STORE) (FR500-MAJOR I-3) (FR400-MAJOR I-3) CONDITIONAL) |
| 4268 | (.str name "$pack $" regtype "k,@($GRi,$GRj),$CCi,$cond") |
| 4269 | (+ pack (.sym regtype k) op GRi CCi cond ope GRj) |
| 4270 | (if (eq CCi (or cond 2)) |
| 4271 | (c-call VOID (.str "@cpu@_write_mem_" mode) |
| 4272 | pc (add GRi GRj) (.sym regtype k))) |
| 4273 | profile |
| 4274 | ) |
| 4275 | ) |
| 4276 | |
| 4277 | (conditional-store cstb QI OP_64 OPE4_0 GR |
| 4278 | ((fr400 (unit u-gr-store)) (fr500 (unit u-gr-store))) |
| 4279 | "Store unsigned byte") |
| 4280 | (conditional-store csth HI OP_64 OPE4_1 GR |
| 4281 | ((fr400 (unit u-gr-store)) (fr500 (unit u-gr-store))) |
| 4282 | "Store unsigned half") |
| 4283 | (conditional-store cst SI OP_64 OPE4_2 GR |
| 4284 | ((fr400 (unit u-gr-store)) (fr500 (unit u-gr-store))) |
| 4285 | "Store word") |
| 4286 | |
| 4287 | (conditional-store cstbf QI OP_66 OPE4_0 FRint |
| 4288 | ((fr400 (unit u-fr-store)) (fr500 (unit u-fr-store))) |
| 4289 | "Store byte float") |
| 4290 | (conditional-store csthf HI OP_66 OPE4_1 FRint |
| 4291 | ((fr400 (unit u-fr-store)) (fr500 (unit u-fr-store))) |
| 4292 | "Store half float") |
| 4293 | (conditional-store cstf SI OP_66 OPE4_2 FRint |
| 4294 | ((fr400 (unit u-fr-store)) (fr500 (unit u-fr-store))) |
| 4295 | "Store word float") |
| 4296 | |
| 4297 | (define-pmacro (conditional-store-double |
| 4298 | name mode op ope regtype attr profile comment) |
| 4299 | (dni name |
| 4300 | (comment) |
| 4301 | ((UNIT STORE) (FR500-MAJOR I-3) (FR400-MAJOR I-3) CONDITIONAL attr) |
| 4302 | (.str name "$pack $" regtype "k,@($GRi,$GRj),$CCi,$cond") |
| 4303 | (+ pack (.sym regtype k) op GRi CCi cond ope GRj) |
| 4304 | (if (eq CCi (or cond 2)) |
| 4305 | (sequence ((WI address)) |
| 4306 | (store-double-semantics mode regtype address GRj))) |
| 4307 | profile |
| 4308 | ) |
| 4309 | ) |
| 4310 | |
| 4311 | (conditional-store-double cstd DI OP_64 OPE4_3 GR NA |
| 4312 | ((fr400 (unit u-gr-store)) (fr500 (unit u-gr-store))) |
| 4313 | "Store double word") |
| 4314 | (conditional-store-double cstdf DF OP_66 OPE4_3 FR FR-ACCESS |
| 4315 | ((fr400 (unit u-fr-store)) (fr500 (unit u-fr-store))) |
| 4316 | "Store double float") |
| 4317 | |
| 4318 | (dni cstq |
| 4319 | "conditionally store quad word" |
| 4320 | ((UNIT STORE) (FR500-MAJOR I-3) (MACH frv) CONDITIONAL) |
| 4321 | "cstq$pack $GRk,@($GRi,$GRj),$CCi,$cond" |
| 4322 | (+ pack GRk OP_65 GRi CCi cond OPE4_0 GRj) |
| 4323 | (if (eq CCi (or cond 2)) |
| 4324 | (sequence ((WI address)) |
| 4325 | (store-quad-semantics GR address GRj))) |
| 4326 | ((fr500 (unit u-gr-store))) |
| 4327 | ) |
| 4328 | |
| 4329 | (define-pmacro (conditional-store-u |
| 4330 | name mode op ope regtype attr profile comment) |
| 4331 | (dni name |
| 4332 | (comment) |
| 4333 | ((UNIT STORE) (FR500-MAJOR I-3) (FR400-MAJOR I-3) CONDITIONAL attr) |
| 4334 | (.str name "$pack $" regtype "k,@($GRi,$GRj),$CCi,$cond") |
| 4335 | (+ pack (.sym regtype k) op GRi CCi cond ope GRj) |
| 4336 | (if (eq CCi (or cond 2)) |
| 4337 | (sequence ((WI address)) |
| 4338 | (set address (add GRi GRj)) |
| 4339 | (c-call VOID (.str "@cpu@_write_mem_" mode) |
| 4340 | pc address (.sym regtype k)) |
| 4341 | (set GRi address))) |
| 4342 | profile |
| 4343 | ) |
| 4344 | ) |
| 4345 | |
| 4346 | (conditional-store-u cstbu QI OP_67 OPE4_0 GR NA |
| 4347 | ((fr400 (unit u-gr-store)) (fr500 (unit u-gr-store))) |
| 4348 | "Store unsigned byte, update index") |
| 4349 | (conditional-store-u csthu HI OP_67 OPE4_1 GR NA |
| 4350 | ((fr400 (unit u-gr-store)) (fr500 (unit u-gr-store))) |
| 4351 | "Store unsigned half, update index") |
| 4352 | (conditional-store-u cstu SI OP_67 OPE4_2 GR NA |
| 4353 | ((fr400 (unit u-gr-store)) (fr500 (unit u-gr-store))) |
| 4354 | "Store word, update index") |
| 4355 | |
| 4356 | (conditional-store-u cstbfu QI OP_68 OPE4_0 FRint FR-ACCESS |
| 4357 | ((fr400 (unit u-fr-store)) (fr500 (unit u-fr-store))) |
| 4358 | "Store byte float, update index") |
| 4359 | (conditional-store-u csthfu HI OP_68 OPE4_1 FRint FR-ACCESS |
| 4360 | ((fr400 (unit u-fr-store)) (fr500 (unit u-fr-store))) |
| 4361 | "Store half float, update index") |
| 4362 | (conditional-store-u cstfu SI OP_68 OPE4_2 FRint FR-ACCESS |
| 4363 | ((fr400 (unit u-fr-store)) (fr500 (unit u-fr-store))) |
| 4364 | "Store word float, update index") |
| 4365 | |
| 4366 | (define-pmacro (conditional-store-double-u |
| 4367 | name mode op ope regtype attr profile comment) |
| 4368 | (dni name |
| 4369 | (comment) |
| 4370 | ((UNIT STORE) (FR500-MAJOR I-3) (FR400-MAJOR I-3) CONDITIONAL attr) |
| 4371 | (.str name "$pack $" regtype "k,@($GRi,$GRj),$CCi,$cond") |
| 4372 | (+ pack (.sym regtype k) op GRi CCi cond ope GRj) |
| 4373 | (if (eq CCi (or cond 2)) |
| 4374 | (sequence ((WI address)) |
| 4375 | (store-double-semantics mode regtype address GRj) |
| 4376 | (set GRi address))) |
| 4377 | profile |
| 4378 | ) |
| 4379 | ) |
| 4380 | |
| 4381 | (conditional-store-double-u cstdu DI OP_67 OPE4_3 GR NA |
| 4382 | ((fr400 (unit u-gr-store)) |
| 4383 | (fr500 (unit u-gr-store))) |
| 4384 | "Store double word, update index") |
| 4385 | (conditional-store-double-u cstdfu DF OP_68 OPE4_3 FR FR-ACCESS |
| 4386 | ((fr400 (unit u-fr-store)) (fr500 (unit u-fr-store))) |
| 4387 | "Store double float, update index") |
| 4388 | |
| 4389 | (define-pmacro (store-r-simm name mode op regtype attr profile comment) |
| 4390 | (dni name |
| 4391 | (comment) |
| 4392 | ((UNIT STORE) (FR500-MAJOR I-3) (FR400-MAJOR I-3) attr) |
| 4393 | (.str name "$pack $" regtype "k,@($GRi,$d12)") |
| 4394 | (+ pack (.sym regtype k) op GRi d12) |
| 4395 | (c-call VOID (.str "@cpu@_write_mem_" mode) |
| 4396 | pc (add GRi d12) (.sym regtype k)) |
| 4397 | profile |
| 4398 | ) |
| 4399 | ) |
| 4400 | |
| 4401 | (store-r-simm stbi QI OP_50 GR NA |
| 4402 | ((fr400 (unit u-gr-store)) (fr500 (unit u-gr-store))) |
| 4403 | "Store unsigned byte") |
| 4404 | (store-r-simm sthi HI OP_51 GR NA |
| 4405 | ((fr400 (unit u-gr-store)) (fr500 (unit u-gr-store))) |
| 4406 | "Store unsigned half") |
| 4407 | (store-r-simm sti SI OP_52 GR NA |
| 4408 | ((fr400 (unit u-gr-store)) (fr500 (unit u-gr-store))) |
| 4409 | "Store word") |
| 4410 | |
| 4411 | (store-r-simm stbfi QI OP_4E FRint FR-ACCESS |
| 4412 | ((fr400 (unit u-fr-store)) (fr500 (unit u-fr-store))) |
| 4413 | "Store byte float") |
| 4414 | (store-r-simm sthfi HI OP_4F FRint FR-ACCESS |
| 4415 | ((fr400 (unit u-fr-store)) (fr500 (unit u-fr-store))) |
| 4416 | "Store half float") |
| 4417 | (store-r-simm stfi SI OP_55 FRint FR-ACCESS |
| 4418 | ((fr400 (unit u-fr-store)) (fr500 (unit u-fr-store))) |
| 4419 | "Store word float") |
| 4420 | |
| 4421 | (define-pmacro (store-double-r-simm name mode op regtype attr profile comment) |
| 4422 | (dni name |
| 4423 | (comment) |
| 4424 | ((UNIT STORE) (FR500-MAJOR I-3) (FR400-MAJOR I-3) attr) |
| 4425 | (.str name "$pack $" regtype "k,@($GRi,$d12)") |
| 4426 | (+ pack (.sym regtype k) op GRi d12) |
| 4427 | (sequence ((WI address)) |
| 4428 | (store-double-semantics mode regtype address d12)) |
| 4429 | profile |
| 4430 | ) |
| 4431 | ) |
| 4432 | |
| 4433 | (store-double-r-simm stdi DI OP_53 GR NA |
| 4434 | ((fr400 (unit u-gr-store)) (fr500 (unit u-gr-store))) |
| 4435 | "Store double word") |
| 4436 | (store-double-r-simm stdfi DF OP_56 FR FR-ACCESS |
| 4437 | ((fr400 (unit u-fr-store)) (fr500 (unit u-fr-store))) |
| 4438 | "Store double float") |
| 4439 | |
| 4440 | (define-pmacro (store-quad-r-simm name op regtype attr profile comment) |
| 4441 | (dni name |
| 4442 | (comment) |
| 4443 | ((UNIT STORE) (FR500-MAJOR I-3) (MACH frv) attr) |
| 4444 | (.str name "$pack $" regtype "k,@($GRi,$d12)") |
| 4445 | (+ pack (.sym regtype k) op GRi d12) |
| 4446 | (sequence ((WI address)) |
| 4447 | (store-quad-semantics regtype address d12)) |
| 4448 | profile |
| 4449 | ) |
| 4450 | ) |
| 4451 | |
| 4452 | (store-quad-r-simm stqi OP_54 GR NA ((fr500 (unit u-gr-store))) |
| 4453 | "Store quad word") |
| 4454 | (store-quad-r-simm stqfi OP_57 FRint FR-ACCESS () |
| 4455 | "Store quad float") |
| 4456 | |
| 4457 | (define-pmacro (swap-semantics base offset arg) |
| 4458 | (sequence ((WI tmp) (WI address)) |
| 4459 | (set tmp arg) |
| 4460 | (set address (add base offset)) |
| 4461 | (set arg (c-call WI "@cpu@_read_mem_WI" pc address)) |
| 4462 | (c-call VOID "@cpu@_write_mem_WI" pc address tmp)) |
| 4463 | ) |
| 4464 | |
| 4465 | (dni swap |
| 4466 | "Swap contents of memory with GR" |
| 4467 | ((UNIT C) (FR500-MAJOR C-2) (FR400-MAJOR C-2)) |
| 4468 | "swap$pack @($GRi,$GRj),$GRk" |
| 4469 | (+ pack GRk OP_03 GRi OPE1_05 GRj) |
| 4470 | (swap-semantics GRi GRj GRk) |
| 4471 | ((fr400 (unit u-swap)) |
| 4472 | (fr500 (unit u-swap))) |
| 4473 | ) |
| 4474 | |
| 4475 | (dni "swapi" |
| 4476 | "Swap contents of memory with GR" |
| 4477 | ((UNIT C) (FR500-MAJOR C-2) (FR400-MAJOR C-2)) |
| 4478 | ("swapi$pack @($GRi,$d12),$GRk") |
| 4479 | (+ pack GRk OP_4D GRi d12) |
| 4480 | (swap-semantics GRi d12 GRk) |
| 4481 | ((fr400 (unit u-swap)) |
| 4482 | (fr500 (unit u-swap))) |
| 4483 | ) |
| 4484 | |
| 4485 | (dni cswap |
| 4486 | "Conditionally swap contents of memory with GR" |
| 4487 | ((UNIT C) (FR500-MAJOR C-2) (FR400-MAJOR C-2) CONDITIONAL) |
| 4488 | "cswap$pack @($GRi,$GRj),$GRk,$CCi,$cond" |
| 4489 | (+ pack GRk OP_65 GRi CCi cond OPE4_2 GRj) |
| 4490 | (if (eq CCi (or cond 2)) |
| 4491 | (swap-semantics GRi GRj GRk)) |
| 4492 | ((fr400 (unit u-swap)) |
| 4493 | (fr500 (unit u-swap))) |
| 4494 | ) |
| 4495 | |
| 4496 | (define-pmacro (register-transfer |
| 4497 | name op ope reg_src reg_targ pipe attrs profile comment) |
| 4498 | (dni name |
| 4499 | (comment) |
| 4500 | (.splice (UNIT pipe) (.unsplice attrs)) |
| 4501 | (.str name "$pack $" reg_src ",$" reg_targ) |
| 4502 | (+ pack reg_targ op (rs-null) ope reg_src) |
| 4503 | (set reg_targ reg_src) |
| 4504 | profile |
| 4505 | ) |
| 4506 | ) |
| 4507 | |
| 4508 | (register-transfer movgf OP_03 OPE1_15 |
| 4509 | GRj FRintk I0 |
| 4510 | ((FR500-MAJOR I-4) (FR400-MAJOR I-4) FR-ACCESS) |
| 4511 | ((fr400 (unit u-gr2fr)) (fr500 (unit u-gr2fr))) |
| 4512 | "transfer gr to fr") |
| 4513 | (register-transfer movfg OP_03 OPE1_0D |
| 4514 | FRintk GRj I0 |
| 4515 | ((FR500-MAJOR I-4) (FR400-MAJOR I-4) FR-ACCESS) |
| 4516 | ((fr400 (unit u-fr2gr)) (fr500 (unit u-fr2gr))) |
| 4517 | "transfer fr to gr") |
| 4518 | |
| 4519 | (define-pmacro (nextreg hw r offset) (reg hw (add (index-of r) offset))) |
| 4520 | |
| 4521 | (define-pmacro (register-transfer-double-from-gr-semantics cond) |
| 4522 | (if cond |
| 4523 | (if (eq (index-of GRj) 0) |
| 4524 | (sequence () |
| 4525 | (set FRintk 0) |
| 4526 | (set (nextreg h-fr_int FRintk 1) 0)) |
| 4527 | (sequence () |
| 4528 | (set FRintk GRj) |
| 4529 | (set (nextreg h-fr_int FRintk 1) (nextreg h-gr GRj 1))))) |
| 4530 | ) |
| 4531 | |
| 4532 | (dni movgfd |
| 4533 | "move GR for FR double" |
| 4534 | ((UNIT I0) (FR500-MAJOR I-4) (FR400-MAJOR I-4) FR-ACCESS) |
| 4535 | "movgfd$pack $GRj,$FRintk" |
| 4536 | (+ pack FRintk OP_03 (rs-null) OPE1_16 GRj) |
| 4537 | (register-transfer-double-from-gr-semantics 1) |
| 4538 | ; TODO -- doesn't handle second register in the pair |
| 4539 | ((fr400 (unit u-gr2fr)) |
| 4540 | (fr500 (unit u-gr2fr))) |
| 4541 | ) |
| 4542 | |
| 4543 | (define-pmacro (register-transfer-double-to-gr-semantics cond) |
| 4544 | (if (andif (ne (index-of GRj) 0) cond) |
| 4545 | (sequence () |
| 4546 | (set GRj FRintk) |
| 4547 | (set (nextreg h-gr GRj 1) (nextreg h-fr_int FRintk 1)))) |
| 4548 | ) |
| 4549 | |
| 4550 | (dni movfgd |
| 4551 | "move FR for GR double" |
| 4552 | ((UNIT I0) (FR500-MAJOR I-4) (FR400-MAJOR I-4) FR-ACCESS) |
| 4553 | "movfgd$pack $FRintk,$GRj" |
| 4554 | (+ pack FRintk OP_03 (rs-null) OPE1_0E GRj) |
| 4555 | (register-transfer-double-to-gr-semantics 1) |
| 4556 | ; TODO -- doesn't handle second register in the pair |
| 4557 | ((fr400 (unit u-fr2gr)) |
| 4558 | (fr500 (unit u-fr2gr))) |
| 4559 | ) |
| 4560 | |
| 4561 | (dni movgfq |
| 4562 | "move GR for FR quad" |
| 4563 | ((UNIT I0) (FR500-MAJOR I-4) (MACH frv) FR-ACCESS) |
| 4564 | "movgfq$pack $GRj,$FRintk" |
| 4565 | (+ pack FRintk OP_03 (rs-null) OPE1_17 GRj) |
| 4566 | (if (eq (index-of GRj) 0) |
| 4567 | (sequence () |
| 4568 | (set FRintk 0) |
| 4569 | (set (reg h-fr_int (add (index-of FRintk) 1)) 0) |
| 4570 | (set (reg h-fr_int (add (index-of FRintk) 2)) 0) |
| 4571 | (set (reg h-fr_int (add (index-of FRintk) 3)) 0)) |
| 4572 | (sequence () |
| 4573 | (set FRintk GRj) |
| 4574 | (set (reg h-fr_int (add (index-of FRintk) 1)) |
| 4575 | (reg h-gr (add (index-of GRj) 1))) |
| 4576 | (set (reg h-fr_int (add (index-of FRintk) 2)) |
| 4577 | (reg h-gr (add (index-of GRj) 2))) |
| 4578 | (set (reg h-fr_int (add (index-of FRintk) 3)) |
| 4579 | (reg h-gr (add (index-of GRj) 3))))) |
| 4580 | () |
| 4581 | ) |
| 4582 | |
| 4583 | (dni movfgq |
| 4584 | "move FR for GR quad" |
| 4585 | ((UNIT I0) (FR500-MAJOR I-4) (MACH frv) FR-ACCESS) |
| 4586 | "movfgq$pack $FRintk,$GRj" |
| 4587 | (+ pack FRintk OP_03 (rs-null) OPE1_0F GRj) |
| 4588 | (if (ne (index-of GRj) 0) |
| 4589 | (sequence () |
| 4590 | (set GRj FRintk) |
| 4591 | (set (reg h-gr (add (index-of GRj) 1)) |
| 4592 | (reg h-fr_int (add (index-of FRintk) 1))) |
| 4593 | (set (reg h-gr (add (index-of GRj) 2)) |
| 4594 | (reg h-fr_int (add (index-of FRintk) 2))) |
| 4595 | (set (reg h-gr (add (index-of GRj) 3)) |
| 4596 | (reg h-fr_int (add (index-of FRintk) 3))))) |
| 4597 | () |
| 4598 | ) |
| 4599 | |
| 4600 | (define-pmacro (conditional-register-transfer |
| 4601 | name op ope reg_src reg_targ pipe attrs profile comment) |
| 4602 | (dni name |
| 4603 | (comment) |
| 4604 | (.splice (UNIT pipe) CONDITIONAL FR-ACCESS (.unsplice attrs)) |
| 4605 | (.str name "$pack $" reg_src ",$" reg_targ ",$CCi,$cond") |
| 4606 | (+ pack reg_targ op (rs-null) CCi cond ope reg_src) |
| 4607 | (if (eq CCi (or cond 2)) |
| 4608 | (set reg_targ reg_src)) |
| 4609 | profile |
| 4610 | ) |
| 4611 | ) |
| 4612 | |
| 4613 | (conditional-register-transfer cmovgf OP_69 OPE4_0 GRj FRintk I0 |
| 4614 | ((FR500-MAJOR I-4) (FR400-MAJOR I-4)) |
| 4615 | ((fr400 (unit u-gr2fr)) (fr500 (unit u-gr2fr))) |
| 4616 | "transfer gr to fr") |
| 4617 | (conditional-register-transfer cmovfg OP_69 OPE4_2 FRintk GRj I0 |
| 4618 | ((FR500-MAJOR I-4) (FR400-MAJOR I-4)) |
| 4619 | ((fr400 (unit u-fr2gr)) (fr500 (unit u-fr2gr))) |
| 4620 | "transfer fr to gr") |
| 4621 | |
| 4622 | |
| 4623 | (dni cmovgfd |
| 4624 | "Conditional move GR to FR double" |
| 4625 | ((UNIT I0) (FR500-MAJOR I-4) (FR400-MAJOR I-4) CONDITIONAL FR-ACCESS) |
| 4626 | "cmovgfd$pack $GRj,$FRintk,$CCi,$cond" |
| 4627 | (+ pack FRintk OP_69 (rs-null) CCi cond OPE4_1 GRj) |
| 4628 | (register-transfer-double-from-gr-semantics (eq CCi (or cond 2))) |
| 4629 | ; TODO -- doesn't handle extra registers in double |
| 4630 | ((fr400 (unit u-gr2fr)) |
| 4631 | (fr500 (unit u-gr2fr))) |
| 4632 | ) |
| 4633 | |
| 4634 | (dni cmovfgd |
| 4635 | "Conditional move FR to GR double" |
| 4636 | ((UNIT I0) (FR500-MAJOR I-4) (FR400-MAJOR I-4) CONDITIONAL FR-ACCESS) |
| 4637 | "cmovfgd$pack $FRintk,$GRj,$CCi,$cond" |
| 4638 | (+ pack FRintk OP_69 (rs-null) CCi cond OPE4_3 GRj) |
| 4639 | (register-transfer-double-to-gr-semantics (eq CCi (or cond 2))) |
| 4640 | ; TODO -- doesn't handle second register in the pair |
| 4641 | ((fr400 (unit u-fr2gr)) |
| 4642 | (fr500 (unit u-fr2gr))) |
| 4643 | ) |
| 4644 | |
| 4645 | (define-pmacro (register-transfer-spr |
| 4646 | name op ope reg_src reg_targ unitname comment) |
| 4647 | (dni name |
| 4648 | (comment) |
| 4649 | ((UNIT C) (FR500-MAJOR C-2) (FR400-MAJOR C-2)) |
| 4650 | (.str name "$pack $" reg_src ",$" reg_targ) |
| 4651 | (+ pack reg_targ op ope reg_src) |
| 4652 | (set reg_targ reg_src) |
| 4653 | ((fr400 (unit unitname)) |
| 4654 | (fr500 (unit unitname))) |
| 4655 | ) |
| 4656 | ) |
| 4657 | |
| 4658 | (register-transfer-spr movgs OP_03 OPE1_06 GRj spr u-gr2spr "transfer gr->spr") |
| 4659 | (register-transfer-spr movsg OP_03 OPE1_07 spr GRj u-spr2gr "transfer spr->gr") |
| 4660 | |
| 4661 | ; Integer Branch Conditions |
| 4662 | (define-pmacro (Inev cc) (const BI 0)) |
| 4663 | (define-pmacro (Ira cc) (const BI 1)) |
| 4664 | (define-pmacro (Ieq cc) ( zbit cc)) |
| 4665 | (define-pmacro (Ine cc) (not (zbit cc))) |
| 4666 | (define-pmacro (Ile cc) ( orif (zbit cc) (xor (nbit cc) (vbit cc)))) |
| 4667 | (define-pmacro (Igt cc) (not (orif (zbit cc) (xor (nbit cc) (vbit cc))))) |
| 4668 | (define-pmacro (Ilt cc) ( xor (nbit cc) (vbit cc))) |
| 4669 | (define-pmacro (Ige cc) (not (xor (nbit cc) (vbit cc)))) |
| 4670 | (define-pmacro (Ils cc) ( orif (cbit cc) (zbit cc))) |
| 4671 | (define-pmacro (Ihi cc) (not (orif (cbit cc) (zbit cc)))) |
| 4672 | (define-pmacro (Ic cc) ( cbit cc)) |
| 4673 | (define-pmacro (Inc cc) (not (cbit cc))) |
| 4674 | (define-pmacro (In cc) ( nbit cc)) |
| 4675 | (define-pmacro (Ip cc) (not (nbit cc))) |
| 4676 | (define-pmacro (Iv cc) ( vbit cc)) |
| 4677 | (define-pmacro (Inv cc) (not (vbit cc))) |
| 4678 | |
| 4679 | ; Float Branch Conditions |
| 4680 | (define-pmacro (Fnev cc) (const BI 0)) |
| 4681 | (define-pmacro (Fra cc) (const BI 1)) |
| 4682 | (define-pmacro (Fne cc) (orif (lbit cc) (orif (gbit cc) (ubit cc)))) |
| 4683 | (define-pmacro (Feq cc) (ebit cc)) |
| 4684 | (define-pmacro (Flg cc) (orif (lbit cc) (gbit cc))) |
| 4685 | (define-pmacro (Fue cc) (orif (ebit cc) (ubit cc))) |
| 4686 | (define-pmacro (Ful cc) (orif (lbit cc) (ubit cc))) |
| 4687 | (define-pmacro (Fge cc) (orif (ebit cc) (gbit cc))) |
| 4688 | (define-pmacro (Flt cc) (lbit cc)) |
| 4689 | (define-pmacro (Fuge cc) (orif (ebit cc) (orif (gbit cc) (ubit cc)))) |
| 4690 | (define-pmacro (Fug cc) (orif (gbit cc) (ubit cc))) |
| 4691 | (define-pmacro (Fle cc) (orif (ebit cc) (lbit cc))) |
| 4692 | (define-pmacro (Fgt cc) (gbit cc)) |
| 4693 | (define-pmacro (Fule cc) (orif (ebit cc) (orif (lbit cc) (ubit cc)))) |
| 4694 | (define-pmacro (Fu cc) (ubit cc)) |
| 4695 | (define-pmacro (Fo cc) (orif (ebit cc) (orif (lbit cc) (gbit cc)))) |
| 4696 | |
| 4697 | (define-pmacro (conditional-branch-i prefix cc op cond comment) |
| 4698 | (dni (.sym prefix cc) |
| 4699 | (comment) |
| 4700 | ((UNIT B01) (FR500-MAJOR B-1) (FR400-MAJOR B-1)) |
| 4701 | (.str (.sym prefix cc) "$pack $ICCi_2,$hint,$label16") |
| 4702 | (+ pack (.sym ICC_ cc) ICCi_2 op hint label16) |
| 4703 | (sequence () |
| 4704 | (c-call VOID "@cpu@_model_branch" label16 hint) |
| 4705 | (if (cond ICCi_2) |
| 4706 | (set pc label16))) |
| 4707 | ((fr400 (unit u-branch)) |
| 4708 | (fr500 (unit u-branch))) |
| 4709 | ) |
| 4710 | ) |
| 4711 | |
| 4712 | (dni bra |
| 4713 | "integer branch equal" |
| 4714 | ((UNIT B01) (FR500-MAJOR B-1) (FR400-MAJOR B-1)) |
| 4715 | "bra$pack $hint_taken$label16" |
| 4716 | (+ pack ICC_ra (ICCi_2-null) OP_06 hint_taken label16) |
| 4717 | (sequence () |
| 4718 | (c-call VOID "@cpu@_model_branch" label16 hint_taken) |
| 4719 | (set pc label16)) |
| 4720 | ((fr400 (unit u-branch)) |
| 4721 | (fr500 (unit u-branch))) |
| 4722 | ) |
| 4723 | |
| 4724 | (dni bno |
| 4725 | "integer branch never" |
| 4726 | ((UNIT B01) (FR500-MAJOR B-1) (FR400-MAJOR B-1)) |
| 4727 | "bno$pack$hint_not_taken" |
| 4728 | (+ pack ICC_nev (ICCi_2-null) OP_06 hint_not_taken (label16-null)) |
| 4729 | (c-call VOID "@cpu@_model_branch" label16 hint_not_taken) |
| 4730 | ((fr400 (unit u-branch)) |
| 4731 | (fr500 (unit u-branch))) |
| 4732 | ) |
| 4733 | |
| 4734 | (conditional-branch-i b eq OP_06 Ieq "integer branch equal") |
| 4735 | (conditional-branch-i b ne OP_06 Ine "integer branch not equal") |
| 4736 | (conditional-branch-i b le OP_06 Ile "integer branch less or equal") |
| 4737 | (conditional-branch-i b gt OP_06 Igt "integer branch greater") |
| 4738 | (conditional-branch-i b lt OP_06 Ilt "integer branch less") |
| 4739 | (conditional-branch-i b ge OP_06 Ige "integer branch greater or equal") |
| 4740 | (conditional-branch-i b ls OP_06 Ils "integer branch less or equal unsigned") |
| 4741 | (conditional-branch-i b hi OP_06 Ihi "integer branch greater unsigned") |
| 4742 | (conditional-branch-i b c OP_06 Ic "integer branch carry set") |
| 4743 | (conditional-branch-i b nc OP_06 Inc "integer branch carry clear") |
| 4744 | (conditional-branch-i b n OP_06 In "integer branch negative") |
| 4745 | (conditional-branch-i b p OP_06 Ip "integer branch positive") |
| 4746 | (conditional-branch-i b v OP_06 Iv "integer branch overflow set") |
| 4747 | (conditional-branch-i b nv OP_06 Inv "integer branch overflow clear") |
| 4748 | |
| 4749 | (define-pmacro (conditional-branch-f prefix cc op cond comment) |
| 4750 | (dni (.sym prefix cc) |
| 4751 | (comment) |
| 4752 | ((UNIT B01) (FR500-MAJOR B-1) (FR400-MAJOR B-1) FR-ACCESS) |
| 4753 | (.str (.sym prefix cc) "$pack $FCCi_2,$hint,$label16") |
| 4754 | (+ pack (.sym FCC_ cc) FCCi_2 op hint label16) |
| 4755 | (sequence () |
| 4756 | (c-call VOID "@cpu@_model_branch" label16 hint) |
| 4757 | (if (cond FCCi_2) (set pc label16))) |
| 4758 | ((fr400 (unit u-branch)) |
| 4759 | (fr500 (unit u-branch))) |
| 4760 | ) |
| 4761 | ) |
| 4762 | |
| 4763 | (dni fbra |
| 4764 | "float branch equal" |
| 4765 | ((UNIT B01) (FR500-MAJOR B-1) (FR400-MAJOR B-1) FR-ACCESS) |
| 4766 | "fbra$pack $hint_taken$label16" |
| 4767 | (+ pack FCC_ra (FCCi_2-null) OP_07 hint_taken label16) |
| 4768 | (sequence () |
| 4769 | (c-call VOID "@cpu@_model_branch" label16 hint_taken) |
| 4770 | (set pc label16)) |
| 4771 | ((fr400 (unit u-branch)) |
| 4772 | (fr500 (unit u-branch))) |
| 4773 | ) |
| 4774 | |
| 4775 | (dni fbno |
| 4776 | "float branch never" |
| 4777 | ((UNIT B01) (FR500-MAJOR B-1) (FR400-MAJOR B-1) FR-ACCESS) |
| 4778 | "fbno$pack$hint_not_taken" |
| 4779 | (+ pack FCC_nev (FCCi_2-null) OP_07 hint_not_taken (label16-null)) |
| 4780 | (c-call VOID "@cpu@_model_branch" label16 hint_not_taken) |
| 4781 | ((fr400 (unit u-branch)) |
| 4782 | (fr500 (unit u-branch))) |
| 4783 | ) |
| 4784 | |
| 4785 | (conditional-branch-f fb ne OP_07 Fne "float branch not equal") |
| 4786 | (conditional-branch-f fb eq OP_07 Feq "float branch equal") |
| 4787 | (conditional-branch-f fb lg OP_07 Flg "float branch less or greater") |
| 4788 | (conditional-branch-f fb ue OP_07 Fue "float branch unordered or equal") |
| 4789 | (conditional-branch-f fb ul OP_07 Ful "float branch unordered or less") |
| 4790 | (conditional-branch-f fb ge OP_07 Fge "float branch greater or equal") |
| 4791 | (conditional-branch-f fb lt OP_07 Flt "float branch less") |
| 4792 | (conditional-branch-f fb uge OP_07 Fuge "float branch unordered, greater,equal") |
| 4793 | (conditional-branch-f fb ug OP_07 Fug "float branch unordered or greater") |
| 4794 | (conditional-branch-f fb le OP_07 Fle "float branch less or equal") |
| 4795 | (conditional-branch-f fb gt OP_07 Fgt "float branch greater") |
| 4796 | (conditional-branch-f fb ule OP_07 Fule "float branch unordered, less or equal") |
| 4797 | (conditional-branch-f fb u OP_07 Fu "float branch unordered") |
| 4798 | (conditional-branch-f fb o OP_07 Fo "float branch ordered") |
| 4799 | |
| 4800 | (define-pmacro (ctrlr-branch-semantics cond ccond) |
| 4801 | (sequence ((SI tmp)) |
| 4802 | (set tmp (sub (spr-lcr) 1)) |
| 4803 | (set (spr-lcr) tmp) |
| 4804 | (if cond |
| 4805 | (if (eq ccond 0) |
| 4806 | (if (ne tmp 0) |
| 4807 | (set pc (spr-lr))) |
| 4808 | (if (eq tmp 0) |
| 4809 | (set pc (spr-lr)))))) |
| 4810 | ) |
| 4811 | |
| 4812 | (dni bctrlr |
| 4813 | "LCR conditional branch to lr" |
| 4814 | ((UNIT B0) (FR500-MAJOR B-2) (FR400-MAJOR B-2)) |
| 4815 | ("bctrlr$pack $ccond,$hint") |
| 4816 | (+ pack (cond-null) (ICCi_2-null) OP_0E hint OPE3_01 ccond (s12-null)) |
| 4817 | (sequence () |
| 4818 | (c-call VOID "@cpu@_model_branch" (spr-lr) hint) |
| 4819 | (ctrlr-branch-semantics (const BI 1) ccond)) |
| 4820 | ((fr400 (unit u-branch)) |
| 4821 | (fr500 (unit u-branch))) |
| 4822 | ) |
| 4823 | |
| 4824 | (define-pmacro (conditional-branch-cclr prefix cc i-f op ope cond attr comment) |
| 4825 | (dni (.sym prefix cc lr) |
| 4826 | (comment) |
| 4827 | ((UNIT B01) (FR500-MAJOR B-3) (FR400-MAJOR B-3) attr) |
| 4828 | (.str (.sym prefix cc lr) "$pack $" i-f "CCi_2,$hint") |
| 4829 | (+ pack (.sym i-f CC_ cc) (.sym i-f CCi_2) op hint ope |
| 4830 | (ccond-null) (s12-null)) |
| 4831 | (sequence () |
| 4832 | (c-call VOID "@cpu@_model_branch" (spr-lr) hint) |
| 4833 | (if (cond (.sym i-f CCi_2)) (set pc (spr-lr)))) |
| 4834 | ((fr400 (unit u-branch)) |
| 4835 | (fr500 (unit u-branch))) |
| 4836 | ) |
| 4837 | ) |
| 4838 | |
| 4839 | (dni bralr |
| 4840 | "integer cclr branch always" |
| 4841 | ((UNIT B01) (FR500-MAJOR B-3) (FR400-MAJOR B-3)) |
| 4842 | "bralr$pack$hint_taken" |
| 4843 | (+ pack ICC_ra (ICCi_2-null) OP_0E hint_taken OPE3_02 (ccond-null) (s12-null)) |
| 4844 | (sequence () |
| 4845 | (c-call VOID "@cpu@_model_branch" (spr-lr) hint_taken) |
| 4846 | (set pc (spr-lr))) |
| 4847 | ((fr400 (unit u-branch)) |
| 4848 | (fr500 (unit u-branch))) |
| 4849 | ) |
| 4850 | |
| 4851 | (dni bnolr |
| 4852 | "integer cclr branch never" |
| 4853 | ((UNIT B01) (FR500-MAJOR B-3) (FR400-MAJOR B-3)) |
| 4854 | "bnolr$pack$hint_not_taken" |
| 4855 | (+ pack ICC_nev (ICCi_2-null) OP_0E hint_not_taken OPE3_02 (ccond-null) (s12-null)) |
| 4856 | (c-call VOID "@cpu@_model_branch" (spr-lr) hint_not_taken) |
| 4857 | ((fr400 (unit u-branch)) |
| 4858 | (fr500 (unit u-branch))) |
| 4859 | ) |
| 4860 | |
| 4861 | (conditional-branch-cclr b eq I OP_0E OPE3_02 Ieq NA "integer cclr branch equal") |
| 4862 | (conditional-branch-cclr b ne I OP_0E OPE3_02 Ine NA "integer cclr branch not equal") |
| 4863 | (conditional-branch-cclr b le I OP_0E OPE3_02 Ile NA "integer cclr branch less or equal") |
| 4864 | (conditional-branch-cclr b gt I OP_0E OPE3_02 Igt NA "integer cclr branch greater") |
| 4865 | (conditional-branch-cclr b lt I OP_0E OPE3_02 Ilt NA "integer cclr branch less") |
| 4866 | (conditional-branch-cclr b ge I OP_0E OPE3_02 Ige NA "integer cclr branch greater or equal") |
| 4867 | (conditional-branch-cclr b ls I OP_0E OPE3_02 Ils NA "integer cclr branch less or equal unsigned") |
| 4868 | (conditional-branch-cclr b hi I OP_0E OPE3_02 Ihi NA "integer cclr branch greater unsigned") |
| 4869 | (conditional-branch-cclr b c I OP_0E OPE3_02 Ic NA "integer cclr branch carry set") |
| 4870 | (conditional-branch-cclr b nc I OP_0E OPE3_02 Inc NA "integer cclr branch carry clear") |
| 4871 | (conditional-branch-cclr b n I OP_0E OPE3_02 In NA "integer cclr branch negative") |
| 4872 | (conditional-branch-cclr b p I OP_0E OPE3_02 Ip NA "integer cclr branch positive") |
| 4873 | (conditional-branch-cclr b v I OP_0E OPE3_02 Iv NA "integer cclr branch overflow set") |
| 4874 | (conditional-branch-cclr b nv I OP_0E OPE3_02 Inv NA "integer cclr branch overflow clear") |
| 4875 | |
| 4876 | (dni fbralr |
| 4877 | "float cclr branch always" |
| 4878 | ((UNIT B01) (FR500-MAJOR B-3) (FR400-MAJOR B-3) FR-ACCESS) |
| 4879 | "fbralr$pack$hint_taken" |
| 4880 | (+ pack FCC_ra (FCCi_2-null) OP_0E hint_taken OPE3_06 (ccond-null) (s12-null)) |
| 4881 | (sequence () |
| 4882 | (c-call VOID "@cpu@_model_branch" (spr-lr) hint_taken) |
| 4883 | (set pc (spr-lr))) |
| 4884 | ((fr400 (unit u-branch)) |
| 4885 | (fr500 (unit u-branch))) |
| 4886 | ) |
| 4887 | |
| 4888 | (dni fbnolr |
| 4889 | "float cclr branch never" |
| 4890 | ((UNIT B01) (FR500-MAJOR B-3) (FR400-MAJOR B-3) FR-ACCESS) |
| 4891 | "fbnolr$pack$hint_not_taken" |
| 4892 | (+ pack FCC_nev (FCCi_2-null) OP_0E hint_not_taken OPE3_06 (ccond-null) (s12-null)) |
| 4893 | (c-call VOID "@cpu@_model_branch" (spr-lr) hint_not_taken) |
| 4894 | ((fr400 (unit u-branch)) |
| 4895 | (fr500 (unit u-branch))) |
| 4896 | ) |
| 4897 | |
| 4898 | (conditional-branch-cclr fb eq F OP_0E OPE3_06 Feq FR-ACCESS "float cclr branch equal") |
| 4899 | (conditional-branch-cclr fb ne F OP_0E OPE3_06 Fne FR-ACCESS "float cclr branch not equal") |
| 4900 | (conditional-branch-cclr fb lg F OP_0E OPE3_06 Flg FR-ACCESS "float branch less or greater") |
| 4901 | (conditional-branch-cclr fb ue F OP_0E OPE3_06 Fue FR-ACCESS "float branch unordered or equal") |
| 4902 | (conditional-branch-cclr fb ul F OP_0E OPE3_06 Ful FR-ACCESS "float branch unordered or less") |
| 4903 | (conditional-branch-cclr fb ge F OP_0E OPE3_06 Fge FR-ACCESS "float branch greater or equal") |
| 4904 | (conditional-branch-cclr fb lt F OP_0E OPE3_06 Flt FR-ACCESS "float branch less") |
| 4905 | (conditional-branch-cclr fb uge F OP_0E OPE3_06 Fuge FR-ACCESS "float branch unordered, greater, equal") |
| 4906 | (conditional-branch-cclr fb ug F OP_0E OPE3_06 Fug FR-ACCESS "float branch unordered or greater") |
| 4907 | (conditional-branch-cclr fb le F OP_0E OPE3_06 Fle FR-ACCESS "float branch less or equal") |
| 4908 | (conditional-branch-cclr fb gt F OP_0E OPE3_06 Fgt FR-ACCESS "float branch greater") |
| 4909 | (conditional-branch-cclr fb ule F OP_0E OPE3_06 Fule FR-ACCESS "float branch unordered, less or equal") |
| 4910 | (conditional-branch-cclr fb u F OP_0E OPE3_06 Fu FR-ACCESS "float branch unordered") |
| 4911 | (conditional-branch-cclr fb o F OP_0E OPE3_06 Fo FR-ACCESS "float branch ordered") |
| 4912 | |
| 4913 | (define-pmacro (conditional-branch-ctrlr prefix cc i-f op ope cond attr comment) |
| 4914 | (dni (.sym prefix cc lr) |
| 4915 | (comment) |
| 4916 | ((UNIT B0) (FR500-MAJOR B-2) (FR400-MAJOR B-2) attr) |
| 4917 | (.str (.sym prefix cc lr) "$pack $" i-f "CCi_2,$ccond,$hint") |
| 4918 | (+ pack (.sym i-f CC_ cc) (.sym i-f CCi_2) op hint ope ccond (s12-null)) |
| 4919 | (sequence () |
| 4920 | (c-call VOID "@cpu@_model_branch" (spr-lr) hint) |
| 4921 | (ctrlr-branch-semantics (cond (.sym i-f CCi_2)) ccond)) |
| 4922 | ((fr400 (unit u-branch)) |
| 4923 | (fr500 (unit u-branch))) |
| 4924 | ) |
| 4925 | ) |
| 4926 | |
| 4927 | (dni bcralr |
| 4928 | "integer ctrlr branch always" |
| 4929 | ((UNIT B0) (FR500-MAJOR B-2) (FR400-MAJOR B-2)) |
| 4930 | "bcralr$pack $ccond$hint_taken" |
| 4931 | (+ pack ICC_ra (ICCi_2-null) OP_0E hint_taken OPE3_03 ccond (s12-null)) |
| 4932 | (sequence () |
| 4933 | (c-call VOID "@cpu@_model_branch" (spr-lr) hint_taken) |
| 4934 | (ctrlr-branch-semantics (const BI 1) ccond)) |
| 4935 | ((fr400 (unit u-branch)) |
| 4936 | (fr500 (unit u-branch))) |
| 4937 | ) |
| 4938 | |
| 4939 | (dni bcnolr |
| 4940 | "integer ctrlr branch never" |
| 4941 | ((UNIT B0) (FR500-MAJOR B-2) (FR400-MAJOR B-2)) |
| 4942 | "bcnolr$pack$hint_not_taken" |
| 4943 | (+ pack ICC_nev (ICCi_2-null) OP_0E hint_not_taken OPE3_03 (ccond-null) (s12-null)) |
| 4944 | (sequence () |
| 4945 | (c-call VOID "@cpu@_model_branch" (spr-lr) hint_not_taken) |
| 4946 | (ctrlr-branch-semantics (const BI 0) ccond)) |
| 4947 | ((fr400 (unit u-branch)) |
| 4948 | (fr500 (unit u-branch))) |
| 4949 | ) |
| 4950 | |
| 4951 | (conditional-branch-ctrlr bc eq I OP_0E OPE3_03 Ieq NA "integer ctrlr branch equal") |
| 4952 | (conditional-branch-ctrlr bc ne I OP_0E OPE3_03 Ine NA "integer ctrlr branch not equal") |
| 4953 | (conditional-branch-ctrlr bc le I OP_0E OPE3_03 Ile NA "integer ctrlr branch less equal") |
| 4954 | (conditional-branch-ctrlr bc gt I OP_0E OPE3_03 Igt NA "integer ctrlr branch greater") |
| 4955 | (conditional-branch-ctrlr bc lt I OP_0E OPE3_03 Ilt NA "integer ctrlr branch less") |
| 4956 | (conditional-branch-ctrlr bc ge I OP_0E OPE3_03 Ige NA "integer ctrlr branch greater equal") |
| 4957 | (conditional-branch-ctrlr bc ls I OP_0E OPE3_03 Ils NA "integer ctrlr branch less equal unsigned") |
| 4958 | (conditional-branch-ctrlr bc hi I OP_0E OPE3_03 Ihi NA "integer ctrlr branch greater unsigned") |
| 4959 | (conditional-branch-ctrlr bc c I OP_0E OPE3_03 Ic NA "integer ctrlr branch carry set") |
| 4960 | (conditional-branch-ctrlr bc nc I OP_0E OPE3_03 Inc NA "integer ctrlr branch carry clear") |
| 4961 | (conditional-branch-ctrlr bc n I OP_0E OPE3_03 In NA "integer ctrlr branch negative") |
| 4962 | (conditional-branch-ctrlr bc p I OP_0E OPE3_03 Ip NA "integer ctrlr branch positive") |
| 4963 | (conditional-branch-ctrlr bc v I OP_0E OPE3_03 Iv NA "integer ctrlr branch overflow set") |
| 4964 | (conditional-branch-ctrlr bc nv I OP_0E OPE3_03 Inv NA "integer ctrlr branch overflow clear") |
| 4965 | |
| 4966 | (dni fcbralr |
| 4967 | "float ctrlr branch always" |
| 4968 | ((UNIT B0) (FR500-MAJOR B-2) (FR400-MAJOR B-2) FR-ACCESS) |
| 4969 | "fcbralr$pack $ccond$hint_taken" |
| 4970 | (+ pack FCC_ra (FCCi_2-null) OP_0E hint_taken OPE3_07 ccond (s12-null)) |
| 4971 | (sequence () |
| 4972 | (c-call VOID "@cpu@_model_branch" (spr-lr) hint_taken) |
| 4973 | (ctrlr-branch-semantics (const BI 1) ccond)) |
| 4974 | ((fr400 (unit u-branch)) |
| 4975 | (fr500 (unit u-branch))) |
| 4976 | ) |
| 4977 | |
| 4978 | (dni fcbnolr |
| 4979 | "float ctrlr branch never" |
| 4980 | ((UNIT B0) (FR500-MAJOR B-2) (FR400-MAJOR B-2) FR-ACCESS) |
| 4981 | "fcbnolr$pack$hint_not_taken" |
| 4982 | (+ pack FCC_nev (FCCi_2-null) OP_0E hint_not_taken OPE3_07 (ccond-null) (s12-null)) |
| 4983 | (sequence () |
| 4984 | (c-call VOID "@cpu@_model_branch" (spr-lr) hint_not_taken) |
| 4985 | (ctrlr-branch-semantics (const BI 0) ccond)) |
| 4986 | ((fr400 (unit u-branch)) |
| 4987 | (fr500 (unit u-branch))) |
| 4988 | ) |
| 4989 | |
| 4990 | (conditional-branch-ctrlr fcb eq F OP_0E OPE3_07 Feq FR-ACCESS "float cclr branch equal") |
| 4991 | (conditional-branch-ctrlr fcb ne F OP_0E OPE3_07 Fne FR-ACCESS "float cclr branch not equal") |
| 4992 | (conditional-branch-ctrlr fcb lg F OP_0E OPE3_07 Flg FR-ACCESS "float branch less or greater") |
| 4993 | (conditional-branch-ctrlr fcb ue F OP_0E OPE3_07 Fue FR-ACCESS "float branch unordered or equal") |
| 4994 | (conditional-branch-ctrlr fcb ul F OP_0E OPE3_07 Ful FR-ACCESS "float branch unordered or less") |
| 4995 | (conditional-branch-ctrlr fcb ge F OP_0E OPE3_07 Fge FR-ACCESS "float branch greater or equal") |
| 4996 | (conditional-branch-ctrlr fcb lt F OP_0E OPE3_07 Flt FR-ACCESS "float branch less") |
| 4997 | (conditional-branch-ctrlr fcb uge F OP_0E OPE3_07 Fuge FR-ACCESS "float branch unordered, greater, equal") |
| 4998 | (conditional-branch-ctrlr fcb ug F OP_0E OPE3_07 Fug FR-ACCESS "float branch unordered or greater") |
| 4999 | (conditional-branch-ctrlr fcb le F OP_0E OPE3_07 Fle FR-ACCESS "float branch less or equal") |
| 5000 | (conditional-branch-ctrlr fcb gt F OP_0E OPE3_07 Fgt FR-ACCESS "float branch greater") |
| 5001 | (conditional-branch-ctrlr fcb ule F OP_0E OPE3_07 Fule FR-ACCESS "float branch unordered, less or equal") |
| 5002 | (conditional-branch-ctrlr fcb u F OP_0E OPE3_07 Fu FR-ACCESS "float branch unordered") |
| 5003 | (conditional-branch-ctrlr fcb o F OP_0E OPE3_07 Fo FR-ACCESS "float branch ordered") |
| 5004 | |
| 5005 | (define-pmacro (jump-and-link-semantics base offset LI) |
| 5006 | (sequence () |
| 5007 | (if (eq LI 1) |
| 5008 | (c-call VOID "@cpu@_set_write_next_vliw_addr_to_LR" 1)) |
| 5009 | ; Target address gets aligned here |
| 5010 | (set pc (and (add base offset) #xfffffffc)) |
| 5011 | (c-call VOID "@cpu@_model_branch" pc #x2)) ; hint branch taken |
| 5012 | ) |
| 5013 | |
| 5014 | (dni jmpl |
| 5015 | "jump and link" |
| 5016 | ((UNIT I0) (FR500-MAJOR I-5) (FR400-MAJOR I-5)) |
| 5017 | "jmpl$pack @($GRi,$GRj)" |
| 5018 | (+ pack (misc-null-1) (LI-off) OP_0C GRi (misc-null-2) GRj) |
| 5019 | (jump-and-link-semantics GRi GRj LI) |
| 5020 | ((fr400 (unit u-branch)) |
| 5021 | (fr500 (unit u-branch))) |
| 5022 | ) |
| 5023 | |
| 5024 | (dni calll |
| 5025 | "call and link" |
| 5026 | ((UNIT I0) (FR500-MAJOR I-5) (FR400-MAJOR I-5)) |
| 5027 | "calll$pack @($GRi,$GRj)" |
| 5028 | (+ pack (misc-null-1) (LI-on) OP_0C GRi (misc-null-2) GRj) |
| 5029 | (jump-and-link-semantics GRi GRj LI) |
| 5030 | ((fr400 (unit u-branch)) |
| 5031 | (fr500 (unit u-branch))) |
| 5032 | ) |
| 5033 | |
| 5034 | (dni jmpil |
| 5035 | "jump immediate and link" |
| 5036 | ((UNIT I0) (FR500-MAJOR I-5) (FR400-MAJOR I-5)) |
| 5037 | "jmpil$pack @($GRi,$s12)" |
| 5038 | (+ pack (misc-null-1) (LI-off) OP_0D GRi s12) |
| 5039 | (jump-and-link-semantics GRi s12 LI) |
| 5040 | ((fr400 (unit u-branch)) |
| 5041 | (fr500 (unit u-branch))) |
| 5042 | ) |
| 5043 | |
| 5044 | (dni callil |
| 5045 | "call immediate and link" |
| 5046 | ((UNIT I0) (FR500-MAJOR I-5) (FR400-MAJOR I-5)) |
| 5047 | "callil$pack @($GRi,$s12)" |
| 5048 | (+ pack (misc-null-1) (LI-on) OP_0D GRi s12) |
| 5049 | (jump-and-link-semantics GRi s12 LI) |
| 5050 | ((fr400 (unit u-branch)) |
| 5051 | (fr500 (unit u-branch))) |
| 5052 | ) |
| 5053 | |
| 5054 | (dni call |
| 5055 | "call and link" |
| 5056 | ((UNIT B0) (FR500-MAJOR B-4) (FR400-MAJOR B-4)) |
| 5057 | "call$pack $label24" |
| 5058 | (+ pack OP_0F label24) |
| 5059 | (sequence () |
| 5060 | (c-call VOID "@cpu@_set_write_next_vliw_addr_to_LR" 1) |
| 5061 | (set pc label24) |
| 5062 | (c-call VOID "@cpu@_model_branch" pc #x2)) ; hint branch taken |
| 5063 | ((fr400 (unit u-branch)) |
| 5064 | (fr500 (unit u-branch))) |
| 5065 | ) |
| 5066 | |
| 5067 | (dni rett |
| 5068 | "return from trap" |
| 5069 | ((UNIT C) (FR500-MAJOR C-2) (FR400-MAJOR C-2) PRIVILEGED) |
| 5070 | "rett$pack $debug" |
| 5071 | (+ pack (misc-null-1) debug OP_05 (rs-null) (s12-null)) |
| 5072 | ; frv_rett handles operating vs user mode |
| 5073 | (sequence () |
| 5074 | (set pc (c-call UWI "frv_rett" pc debug)) |
| 5075 | (c-call VOID "@cpu@_model_branch" pc #x2)) ; hint branch taken |
| 5076 | () |
| 5077 | ) |
| 5078 | |
| 5079 | (dni rei |
| 5080 | "run exception instruction" |
| 5081 | ((UNIT C) (FR500-MAJOR C-1) (MACH frv) PRIVILEGED) |
| 5082 | "rei$pack $eir" |
| 5083 | (+ pack (rd-null) OP_37 eir (s12-null)) |
| 5084 | (nop) ; for now |
| 5085 | () |
| 5086 | ) |
| 5087 | |
| 5088 | (define-pmacro (trap-semantics cond base offset) |
| 5089 | (if cond |
| 5090 | (sequence () |
| 5091 | ; This is defered to frv_itrap because for the breakpoint |
| 5092 | ; case we want to change as little of the machine state as |
| 5093 | ; possible. |
| 5094 | ; |
| 5095 | ; PCSR=PC |
| 5096 | ; PSR.PS=PSR.S |
| 5097 | ; PSR.ET=0 |
| 5098 | ; if PSR.ESR==1 |
| 5099 | ; SR0 through SR3=GR4 through GR7 |
| 5100 | ; TBR.TT=0x80 + ((GRi + s12) & 0x7f) |
| 5101 | ; PC=TBR |
| 5102 | ; We still should indicate what is modified by this insn. |
| 5103 | (clobber (spr-pcsr)) |
| 5104 | (clobber psr_ps) |
| 5105 | (clobber psr_et) |
| 5106 | (clobber tbr_tt) |
| 5107 | (if (ne psr_esr (const 0)) |
| 5108 | (sequence () |
| 5109 | (clobber (spr-sr0)) |
| 5110 | (clobber (spr-sr1)) |
| 5111 | (clobber (spr-sr2)) |
| 5112 | (clobber (spr-sr3)))) |
| 5113 | ; frv_itrap handles operating vs user mode |
| 5114 | (c-call VOID "frv_itrap" pc base offset))) |
| 5115 | ) |
| 5116 | |
| 5117 | (define-pmacro (trap-r prefix cc i-f op ope cond attr comment) |
| 5118 | (dni (.sym prefix cc) |
| 5119 | (comment) |
| 5120 | ((UNIT C) (FR500-MAJOR C-1) (FR400-MAJOR C-1) attr) |
| 5121 | (.str (.sym prefix cc) "$pack $" i-f "CCi_2,$GRi,$GRj") |
| 5122 | (+ pack (.sym i-f CC_ cc) (.sym i-f CCi_2) op GRi (misc-null-3) ope GRj) |
| 5123 | (trap-semantics (cond (.sym i-f CCi_2)) GRi GRj) |
| 5124 | ((fr400 (unit u-trap)) |
| 5125 | (fr500 (unit u-trap))) |
| 5126 | ) |
| 5127 | ) |
| 5128 | |
| 5129 | (dni tra |
| 5130 | "integer trap always" |
| 5131 | ((UNIT C) (FR500-MAJOR C-1) (FR400-MAJOR C-1)) |
| 5132 | "tra$pack $GRi,$GRj" |
| 5133 | (+ pack ICC_ra (ICCi_2-null) OP_04 GRi (misc-null-3) OPE4_0 GRj) |
| 5134 | (trap-semantics (const BI 1) GRi GRj) |
| 5135 | ((fr400 (unit u-trap)) |
| 5136 | (fr500 (unit u-trap))) |
| 5137 | ) |
| 5138 | |
| 5139 | (dni tno |
| 5140 | "integer trap never" |
| 5141 | ((UNIT C) (FR500-MAJOR C-1) (FR400-MAJOR C-1)) |
| 5142 | "tno$pack" |
| 5143 | (+ pack ICC_nev (ICCi_2-null) OP_04 (GRi-null) (misc-null-3) OPE4_0 (GRj-null)) |
| 5144 | (trap-semantics (const BI 0) GRi GRj) |
| 5145 | ((fr400 (unit u-trap)) |
| 5146 | (fr500 (unit u-trap))) |
| 5147 | ) |
| 5148 | |
| 5149 | (trap-r t eq I OP_04 OPE4_0 Ieq NA "integer trap equal") |
| 5150 | (trap-r t ne I OP_04 OPE4_0 Ine NA "integer trap not equal") |
| 5151 | (trap-r t le I OP_04 OPE4_0 Ile NA "integer trap less or equal") |
| 5152 | (trap-r t gt I OP_04 OPE4_0 Igt NA "integer trap greater") |
| 5153 | (trap-r t lt I OP_04 OPE4_0 Ilt NA "integer trap less") |
| 5154 | (trap-r t ge I OP_04 OPE4_0 Ige NA "integer trap greater or equal") |
| 5155 | (trap-r t ls I OP_04 OPE4_0 Ils NA "integer trap less or equal unsigned") |
| 5156 | (trap-r t hi I OP_04 OPE4_0 Ihi NA "integer trap greater unsigned") |
| 5157 | (trap-r t c I OP_04 OPE4_0 Ic NA "integer trap carry set") |
| 5158 | (trap-r t nc I OP_04 OPE4_0 Inc NA "integer trap carry clear") |
| 5159 | (trap-r t n I OP_04 OPE4_0 In NA "integer trap negative") |
| 5160 | (trap-r t p I OP_04 OPE4_0 Ip NA "integer trap positive") |
| 5161 | (trap-r t v I OP_04 OPE4_0 Iv NA "integer trap overflow set") |
| 5162 | (trap-r t nv I OP_04 OPE4_0 Inv NA "integer trap overflow clear") |
| 5163 | |
| 5164 | (dni ftra |
| 5165 | "float trap always" |
| 5166 | ((UNIT C) (FR500-MAJOR C-1) (FR400-MAJOR C-1) FR-ACCESS) |
| 5167 | "ftra$pack $GRi,$GRj" |
| 5168 | (+ pack FCC_ra (FCCi_2-null) OP_04 GRi (misc-null-3) OPE4_1 GRj) |
| 5169 | (trap-semantics (const BI 1) GRi GRj) |
| 5170 | ((fr400 (unit u-trap)) |
| 5171 | (fr500 (unit u-trap))) |
| 5172 | ) |
| 5173 | |
| 5174 | (dni ftno |
| 5175 | "flost trap never" |
| 5176 | ((UNIT C) (FR500-MAJOR C-1) (FR400-MAJOR C-1) FR-ACCESS) |
| 5177 | "ftno$pack" |
| 5178 | (+ pack FCC_nev (FCCi_2-null) OP_04 (GRi-null) (misc-null-3) OPE4_1 (GRj-null)) |
| 5179 | (trap-semantics (const BI 0) GRi GRj) |
| 5180 | ((fr400 (unit u-trap)) |
| 5181 | (fr500 (unit u-trap))) |
| 5182 | ) |
| 5183 | |
| 5184 | (trap-r ft ne F OP_04 OPE4_1 Fne FR-ACCESS "float trap not equal") |
| 5185 | (trap-r ft eq F OP_04 OPE4_1 Feq FR-ACCESS "float trap equal") |
| 5186 | (trap-r ft lg F OP_04 OPE4_1 Flg FR-ACCESS "float trap greater or less") |
| 5187 | (trap-r ft ue F OP_04 OPE4_1 Fue FR-ACCESS "float trap unordered or equal") |
| 5188 | (trap-r ft ul F OP_04 OPE4_1 Ful FR-ACCESS "float trap unordered or less") |
| 5189 | (trap-r ft ge F OP_04 OPE4_1 Fge FR-ACCESS "float trap greater or equal") |
| 5190 | (trap-r ft lt F OP_04 OPE4_1 Flt FR-ACCESS "float trap less") |
| 5191 | (trap-r ft uge F OP_04 OPE4_1 Fuge FR-ACCESS "float trap unordered greater or equal") |
| 5192 | (trap-r ft ug F OP_04 OPE4_1 Fug FR-ACCESS "float trap unordered or greater") |
| 5193 | (trap-r ft le F OP_04 OPE4_1 Fle FR-ACCESS "float trap less or equal") |
| 5194 | (trap-r ft gt F OP_04 OPE4_1 Fgt FR-ACCESS "float trap greater") |
| 5195 | (trap-r ft ule F OP_04 OPE4_1 Fule FR-ACCESS "float trap unordered less or equal") |
| 5196 | (trap-r ft u F OP_04 OPE4_1 Fu FR-ACCESS "float trap unordered") |
| 5197 | (trap-r ft o F OP_04 OPE4_1 Fo FR-ACCESS "float trap ordered") |
| 5198 | |
| 5199 | (define-pmacro (trap-immed prefix cc i-f op cond attr comment) |
| 5200 | (dni (.sym prefix cc) |
| 5201 | (comment) |
| 5202 | ((UNIT C) (FR500-MAJOR C-1) (FR400-MAJOR C-1) attr) |
| 5203 | (.str (.sym prefix cc) "$pack $" i-f "CCi_2,$GRi,$s12") |
| 5204 | (+ pack (.sym i-f CC_ cc) (.sym i-f CCi_2) op GRi s12) |
| 5205 | (trap-semantics (cond (.sym i-f CCi_2)) GRi s12) |
| 5206 | ((fr400 (unit u-trap)) |
| 5207 | (fr500 (unit u-trap))) |
| 5208 | ) |
| 5209 | ) |
| 5210 | |
| 5211 | (dni tira |
| 5212 | "integer trap always" |
| 5213 | ((UNIT C) (FR500-MAJOR C-1) (FR400-MAJOR C-1)) |
| 5214 | "tira$pack $GRi,$s12" |
| 5215 | (+ pack ICC_ra (ICCi_2-null) OP_1C GRi s12) |
| 5216 | (trap-semantics (const BI 1) GRi s12) |
| 5217 | ((fr400 (unit u-trap)) |
| 5218 | (fr500 (unit u-trap))) |
| 5219 | ) |
| 5220 | |
| 5221 | (dni tino |
| 5222 | "integer trap never" |
| 5223 | ((UNIT C) (FR500-MAJOR C-1) (FR400-MAJOR C-1)) |
| 5224 | "tino$pack" |
| 5225 | (+ pack ICC_nev (ICCi_2-null) OP_1C (GRi-null) (s12-null)) |
| 5226 | (trap-semantics (const BI 0) GRi s12) |
| 5227 | ((fr400 (unit u-trap)) |
| 5228 | (fr500 (unit u-trap))) |
| 5229 | ) |
| 5230 | |
| 5231 | (trap-immed ti eq I OP_1C Ieq NA "integer trap equal") |
| 5232 | (trap-immed ti ne I OP_1C Ine NA "integer trap not equal") |
| 5233 | (trap-immed ti le I OP_1C Ile NA "integer trap less or equal") |
| 5234 | (trap-immed ti gt I OP_1C Igt NA "integer trap greater") |
| 5235 | (trap-immed ti lt I OP_1C Ilt NA "integer trap less") |
| 5236 | (trap-immed ti ge I OP_1C Ige NA "integer trap greater or equal") |
| 5237 | (trap-immed ti ls I OP_1C Ils NA "integer trap less or equal unsigned") |
| 5238 | (trap-immed ti hi I OP_1C Ihi NA "integer trap greater unsigned") |
| 5239 | (trap-immed ti c I OP_1C Ic NA "integer trap carry set") |
| 5240 | (trap-immed ti nc I OP_1C Inc NA "integer trap carry clear") |
| 5241 | (trap-immed ti n I OP_1C In NA "integer trap negative") |
| 5242 | (trap-immed ti p I OP_1C Ip NA "integer trap positive") |
| 5243 | (trap-immed ti v I OP_1C Iv NA "integer trap overflow set") |
| 5244 | (trap-immed ti nv I OP_1C Inv NA "integer trap overflow clear") |
| 5245 | |
| 5246 | (dni ftira |
| 5247 | "float trap always" |
| 5248 | ((UNIT C) (FR500-MAJOR C-1) (FR400-MAJOR C-1) FR-ACCESS) |
| 5249 | "ftira$pack $GRi,$s12" |
| 5250 | (+ pack FCC_ra (ICCi_2-null) OP_1D GRi s12) |
| 5251 | (trap-semantics (const BI 1) GRi s12) |
| 5252 | ((fr400 (unit u-trap)) |
| 5253 | (fr500 (unit u-trap))) |
| 5254 | ) |
| 5255 | |
| 5256 | (dni ftino |
| 5257 | "float trap never" |
| 5258 | ((UNIT C) (FR500-MAJOR C-1) (FR400-MAJOR C-1) FR-ACCESS) |
| 5259 | "ftino$pack" |
| 5260 | (+ pack FCC_nev (FCCi_2-null) OP_1D (GRi-null) (s12-null)) |
| 5261 | (trap-semantics (const BI 0) GRi s12) |
| 5262 | ((fr400 (unit u-trap)) |
| 5263 | (fr500 (unit u-trap))) |
| 5264 | ) |
| 5265 | |
| 5266 | (trap-immed fti ne F OP_1D Fne FR-ACCESS "float trap not equal") |
| 5267 | (trap-immed fti eq F OP_1D Feq FR-ACCESS "float trap equal") |
| 5268 | (trap-immed fti lg F OP_1D Flg FR-ACCESS "float trap greater or less") |
| 5269 | (trap-immed fti ue F OP_1D Fue FR-ACCESS "float trap unordered or equal") |
| 5270 | (trap-immed fti ul F OP_1D Ful FR-ACCESS "float trap unordered or less") |
| 5271 | (trap-immed fti ge F OP_1D Fge FR-ACCESS "float trap greater or equal") |
| 5272 | (trap-immed fti lt F OP_1D Flt FR-ACCESS "float trap less") |
| 5273 | (trap-immed fti uge F OP_1D Fuge FR-ACCESS "float trap unordered greater or equal") |
| 5274 | (trap-immed fti ug F OP_1D Fug FR-ACCESS "float trap unordered or greater") |
| 5275 | (trap-immed fti le F OP_1D Fle FR-ACCESS "float trap less or equal") |
| 5276 | (trap-immed fti gt F OP_1D Fgt FR-ACCESS "float trap greater") |
| 5277 | (trap-immed fti ule F OP_1D Fule FR-ACCESS "float trap unordered less or equal") |
| 5278 | (trap-immed fti u F OP_1D Fu FR-ACCESS "float trap unordered") |
| 5279 | (trap-immed fti o F OP_1D Fo FR-ACCESS "float trap ordered") |
| 5280 | |
| 5281 | (dni break |
| 5282 | "break trap" |
| 5283 | ((UNIT C) (FR500-MAJOR C-1) (FR400-MAJOR C-1)) |
| 5284 | "break$pack" |
| 5285 | (+ pack (rd-null) OP_04 (rs-null) (misc-null-3) OPE4_3 (GRj-null)) |
| 5286 | (sequence () |
| 5287 | ; This is defered to frv_break because for the breakpoint |
| 5288 | ; case we want to change as little of the machine state as |
| 5289 | ; possible. |
| 5290 | ; |
| 5291 | ; BPCSR=PC |
| 5292 | ; BPSR.BS=PSR.S |
| 5293 | ; BPSR.BET=PSR.ET |
| 5294 | ; PSR.S=1 |
| 5295 | ; PSR.ET=0 |
| 5296 | ; TBR.TT=0xff |
| 5297 | ; PC=TBR |
| 5298 | ; We still should indicate what is modified by this insn. |
| 5299 | (clobber (spr-bpcsr)) |
| 5300 | (clobber bpsr_bs) |
| 5301 | (clobber bpsr_bet) |
| 5302 | (clobber psr_s) |
| 5303 | (clobber psr_et) |
| 5304 | (clobber tbr_tt) |
| 5305 | (c-call VOID "frv_break")) |
| 5306 | () |
| 5307 | ) |
| 5308 | |
| 5309 | (dni mtrap |
| 5310 | "media trap" |
| 5311 | ((UNIT C) (FR500-MAJOR C-1) (FR400-MAJOR C-1) FR-ACCESS) |
| 5312 | "mtrap$pack" |
| 5313 | (+ pack (rd-null) OP_04 (rs-null) (misc-null-3) OPE4_2 (GRj-null)) |
| 5314 | (c-call VOID "frv_mtrap") |
| 5315 | () |
| 5316 | ) |
| 5317 | |
| 5318 | (define-pmacro (condition-code-logic name operation ope comment) |
| 5319 | (dni name |
| 5320 | (comment) |
| 5321 | ((UNIT B01) (FR500-MAJOR B-6) (FR400-MAJOR B-6)) |
| 5322 | (.str name "$pack $CRi,$CRj,$CRk") |
| 5323 | (+ pack (misc-null-6) CRk OP_0A (misc-null-7) CRi ope (misc-null-8) CRj) |
| 5324 | (set CRk (c-call UQI "@cpu@_cr_logic" operation CRi CRj)) |
| 5325 | () |
| 5326 | ) |
| 5327 | ) |
| 5328 | (define-pmacro (op-andcr) 0) |
| 5329 | (define-pmacro (op-orcr) 1) |
| 5330 | (define-pmacro (op-xorcr) 2) |
| 5331 | (define-pmacro (op-nandcr) 3) |
| 5332 | (define-pmacro (op-norcr) 4) |
| 5333 | (define-pmacro (op-andncr) 5) |
| 5334 | (define-pmacro (op-orncr) 6) |
| 5335 | (define-pmacro (op-nandncr) 7) |
| 5336 | (define-pmacro (op-norncr) 8) |
| 5337 | |
| 5338 | (define-pmacro (cr-true) 3) |
| 5339 | (define-pmacro (cr-false) 2) |
| 5340 | (define-pmacro (cr-undefined) 0) |
| 5341 | |
| 5342 | (condition-code-logic andcr (op-andcr) OPE1_08 "and condition code regs") |
| 5343 | (condition-code-logic orcr (op-orcr) OPE1_09 "or condition code regs") |
| 5344 | (condition-code-logic xorcr (op-xorcr) OPE1_0A "xor condition code regs") |
| 5345 | (condition-code-logic nandcr (op-nandcr) OPE1_0C "nand condition code regs") |
| 5346 | (condition-code-logic norcr (op-norcr) OPE1_0D "nor condition code regs") |
| 5347 | (condition-code-logic andncr (op-andncr) OPE1_10 "andn condition code regs") |
| 5348 | (condition-code-logic orncr (op-orncr) OPE1_11 "orn condition code regs") |
| 5349 | (condition-code-logic nandncr (op-nandncr) OPE1_14 "nandn condition code regs") |
| 5350 | (condition-code-logic norncr (op-norncr) OPE1_15 "norn condition code regs") |
| 5351 | |
| 5352 | (dni notcr |
| 5353 | ("not cccr register") |
| 5354 | ((UNIT B01) (FR500-MAJOR B-6) (FR400-MAJOR B-6)) |
| 5355 | (.str notcr "$pack $CRj,$CRk") |
| 5356 | (+ pack (misc-null-6) CRk OP_0A (rs-null) OPE1_0B (misc-null-8) CRj) |
| 5357 | (set CRk (xor CRj 1)) |
| 5358 | () |
| 5359 | ) |
| 5360 | |
| 5361 | (define-pmacro (check-semantics cond cr) |
| 5362 | (if cond (set cr (cr-true)) (set cr (cr-false))) |
| 5363 | ) |
| 5364 | |
| 5365 | (define-pmacro (check-int-condition-code prefix cc op cond comment) |
| 5366 | (dni (.sym prefix cc) |
| 5367 | (comment) |
| 5368 | ((UNIT B01) (FR500-MAJOR B-5) (FR400-MAJOR B-5)) |
| 5369 | (.str (.sym prefix cc) "$pack $ICCi_3,$CRj_int") |
| 5370 | (+ pack (.sym ICC_ cc) CRj_int op (misc-null-5) ICCi_3) |
| 5371 | (check-semantics (cond ICCi_3) CRj_int) |
| 5372 | ((fr400 (unit u-check)) |
| 5373 | (fr500 (unit u-check))) |
| 5374 | ) |
| 5375 | ) |
| 5376 | |
| 5377 | (dni ckra |
| 5378 | "check integer cc always" |
| 5379 | ((UNIT B01) (FR500-MAJOR B-5) (FR400-MAJOR B-5)) |
| 5380 | "ckra$pack $CRj_int" |
| 5381 | (+ pack ICC_ra CRj_int OP_08 (misc-null-5) (ICCi_3-null)) |
| 5382 | (check-semantics (const BI 1) CRj_int) |
| 5383 | ((fr400 (unit u-check)) |
| 5384 | (fr500 (unit u-check))) |
| 5385 | ) |
| 5386 | |
| 5387 | (dni ckno |
| 5388 | "check integer cc never" |
| 5389 | ((UNIT B01) (FR500-MAJOR B-5) (FR400-MAJOR B-5)) |
| 5390 | "ckno$pack $CRj_int" |
| 5391 | (+ pack ICC_nev CRj_int OP_08 (misc-null-5) (ICCi_3-null)) |
| 5392 | (check-semantics (const BI 0) CRj_int) |
| 5393 | ((fr400 (unit u-check)) |
| 5394 | (fr500 (unit u-check))) |
| 5395 | ) |
| 5396 | |
| 5397 | (check-int-condition-code ck eq OP_08 Ieq "check integer cc equal") |
| 5398 | (check-int-condition-code ck ne OP_08 Ine "check integer cc not equal") |
| 5399 | (check-int-condition-code ck le OP_08 Ile "check integer cc less or equal") |
| 5400 | (check-int-condition-code ck gt OP_08 Igt "check integer cc greater") |
| 5401 | (check-int-condition-code ck lt OP_08 Ilt "check integer cc less") |
| 5402 | (check-int-condition-code ck ge OP_08 Ige "check integer cc greater or equal") |
| 5403 | (check-int-condition-code ck ls OP_08 Ils "check integer cc less or equal unsigned") |
| 5404 | (check-int-condition-code ck hi OP_08 Ihi "check integer cc greater unsigned") |
| 5405 | (check-int-condition-code ck c OP_08 Ic "check integer cc carry set") |
| 5406 | (check-int-condition-code ck nc OP_08 Inc "check integer cc carry clear") |
| 5407 | (check-int-condition-code ck n OP_08 In "check integer cc negative") |
| 5408 | (check-int-condition-code ck p OP_08 Ip "check integer cc positive") |
| 5409 | (check-int-condition-code ck v OP_08 Iv "check integer cc overflow set") |
| 5410 | (check-int-condition-code ck nv OP_08 Inv "check integer cc overflow clear") |
| 5411 | |
| 5412 | (define-pmacro (check-float-condition-code prefix cc op cond comment) |
| 5413 | (dni (.sym prefix cc) |
| 5414 | (comment) |
| 5415 | ((UNIT B01) (FR500-MAJOR B-5) (FR400-MAJOR B-5) FR-ACCESS) |
| 5416 | (.str (.sym prefix cc) "$pack $FCCi_3,$CRj_float") |
| 5417 | (+ pack (.sym FCC_ cc) CRj_float op (misc-null-5) FCCi_3) |
| 5418 | (check-semantics (cond FCCi_3) CRj_float) |
| 5419 | ((fr400 (unit u-check)) |
| 5420 | (fr500 (unit u-check))) |
| 5421 | ) |
| 5422 | ) |
| 5423 | |
| 5424 | (dni fckra |
| 5425 | "check float cc always" |
| 5426 | ((UNIT B01) (FR500-MAJOR B-5) (FR400-MAJOR B-5) FR-ACCESS) |
| 5427 | "fckra$pack $CRj_float" |
| 5428 | (+ pack FCC_ra CRj_float OP_09 (misc-null-5) FCCi_3) |
| 5429 | (check-semantics (const BI 1) CRj_float) |
| 5430 | ((fr400 (unit u-check)) |
| 5431 | (fr500 (unit u-check))) |
| 5432 | ) |
| 5433 | |
| 5434 | (dni fckno |
| 5435 | "check float cc never" |
| 5436 | ((UNIT B01) (FR500-MAJOR B-5) (FR400-MAJOR B-5) FR-ACCESS) |
| 5437 | "fckno$pack $CRj_float" |
| 5438 | (+ pack FCC_nev CRj_float OP_09 (misc-null-5) FCCi_3) |
| 5439 | (check-semantics (const BI 0) CRj_float) |
| 5440 | ((fr400 (unit u-check)) |
| 5441 | (fr500 (unit u-check))) |
| 5442 | ) |
| 5443 | |
| 5444 | (check-float-condition-code fck ne OP_09 Fne "check float cc not equal") |
| 5445 | (check-float-condition-code fck eq OP_09 Feq "check float cc equal") |
| 5446 | (check-float-condition-code fck lg OP_09 Flg "check float cc greater or less") |
| 5447 | (check-float-condition-code fck ue OP_09 Fue "check float cc unordered or equal") |
| 5448 | (check-float-condition-code fck ul OP_09 Ful "check float cc unordered or less") |
| 5449 | (check-float-condition-code fck ge OP_09 Fge "check float cc greater or equal") |
| 5450 | (check-float-condition-code fck lt OP_09 Flt "check float cc less") |
| 5451 | (check-float-condition-code fck uge OP_09 Fuge "check float cc unordered greater or equal") |
| 5452 | (check-float-condition-code fck ug OP_09 Fug "check float cc unordered or greater") |
| 5453 | (check-float-condition-code fck le OP_09 Fle "check float cc less or equal") |
| 5454 | (check-float-condition-code fck gt OP_09 Fgt "check float cc greater") |
| 5455 | (check-float-condition-code fck ule OP_09 Fule "check float cc unordered less or equal") |
| 5456 | (check-float-condition-code fck u OP_09 Fu "check float cc unordered") |
| 5457 | (check-float-condition-code fck o OP_09 Fo "check float cc ordered") |
| 5458 | |
| 5459 | (define-pmacro (conditional-check-int-condition-code prefix cc op ope test comment) |
| 5460 | (dni (.sym prefix cc) |
| 5461 | (comment) |
| 5462 | ((UNIT B01) (FR500-MAJOR B-5) (FR400-MAJOR B-5) CONDITIONAL) |
| 5463 | (.str (.sym prefix cc) "$pack $ICCi_3,$CRj_int,$CCi,$cond") |
| 5464 | (+ pack (.sym ICC_ cc) CRj_int op (rs-null) CCi cond ope |
| 5465 | (misc-null-9) ICCi_3) |
| 5466 | (if (eq CCi (or cond 2)) |
| 5467 | (check-semantics (test ICCi_3) CRj_int) |
| 5468 | (set CRj_int (cr-undefined))) |
| 5469 | ((fr400 (unit u-check)) |
| 5470 | (fr500 (unit u-check))) |
| 5471 | ) |
| 5472 | ) |
| 5473 | |
| 5474 | (dni cckra |
| 5475 | "conditional check integer cc always" |
| 5476 | ((UNIT B01) (FR500-MAJOR B-5) (FR400-MAJOR B-5) CONDITIONAL) |
| 5477 | "cckra$pack $CRj_int,$CCi,$cond" |
| 5478 | (+ pack ICC_ra CRj_int OP_6A (rs-null) CCi cond OPE4_0 |
| 5479 | (misc-null-9) (ICCi_3-null)) |
| 5480 | (if (eq CCi (or cond 2)) |
| 5481 | (check-semantics (const BI 1) CRj_int) |
| 5482 | (set CRj_int (cr-undefined))) |
| 5483 | ((fr400 (unit u-check)) |
| 5484 | (fr500 (unit u-check))) |
| 5485 | ) |
| 5486 | |
| 5487 | (dni cckno |
| 5488 | "conditional check integer cc never" |
| 5489 | ((UNIT B01) (FR500-MAJOR B-5) (FR400-MAJOR B-5) CONDITIONAL) |
| 5490 | "cckno$pack $CRj_int,$CCi,$cond" |
| 5491 | (+ pack ICC_nev CRj_int OP_6A (rs-null) CCi cond OPE4_0 |
| 5492 | (misc-null-9) (ICCi_3-null)) |
| 5493 | (if (eq CCi (or cond 2)) |
| 5494 | (check-semantics (const BI 0) CRj_int) |
| 5495 | (set CRj_int (cr-undefined))) |
| 5496 | ((fr400 (unit u-check)) |
| 5497 | (fr500 (unit u-check))) |
| 5498 | ) |
| 5499 | |
| 5500 | (conditional-check-int-condition-code cck eq OP_6A OPE4_0 Ieq "check integer cc equal") |
| 5501 | (conditional-check-int-condition-code cck ne OP_6A OPE4_0 Ine "check integer cc not equal") |
| 5502 | (conditional-check-int-condition-code cck le OP_6A OPE4_0 Ile "check integer cc less or equal") |
| 5503 | (conditional-check-int-condition-code cck gt OP_6A OPE4_0 Igt "check integer cc greater") |
| 5504 | (conditional-check-int-condition-code cck lt OP_6A OPE4_0 Ilt "check integer cc less") |
| 5505 | (conditional-check-int-condition-code cck ge OP_6A OPE4_0 Ige "check integer cc greater or equal") |
| 5506 | (conditional-check-int-condition-code cck ls OP_6A OPE4_0 Ils "check integer cc less or equal unsigned") |
| 5507 | (conditional-check-int-condition-code cck hi OP_6A OPE4_0 Ihi "check integer cc greater unsigned") |
| 5508 | (conditional-check-int-condition-code cck c OP_6A OPE4_0 Ic "check integer cc carry set") |
| 5509 | (conditional-check-int-condition-code cck nc OP_6A OPE4_0 Inc "check integer cc carry clear") |
| 5510 | (conditional-check-int-condition-code cck n OP_6A OPE4_0 In "check integer cc negative") |
| 5511 | (conditional-check-int-condition-code cck p OP_6A OPE4_0 Ip "check integer cc positive") |
| 5512 | (conditional-check-int-condition-code cck v OP_6A OPE4_0 Iv "check integer cc overflow set") |
| 5513 | (conditional-check-int-condition-code cck nv OP_6A OPE4_0 Inv "check integer cc overflow clear") |
| 5514 | |
| 5515 | (define-pmacro (conditional-check-float-condition-code prefix cc op ope test comment) |
| 5516 | (dni (.sym prefix cc) |
| 5517 | (comment) |
| 5518 | ((UNIT B01) (FR500-MAJOR B-5) (FR400-MAJOR B-5) CONDITIONAL FR-ACCESS) |
| 5519 | (.str (.sym prefix cc) "$pack $FCCi_3,$CRj_float,$CCi,$cond") |
| 5520 | (+ pack (.sym FCC_ cc) CRj_float op (rs-null) CCi cond ope |
| 5521 | (misc-null-9) FCCi_3) |
| 5522 | (if (eq CCi (or cond 2)) |
| 5523 | (check-semantics (test FCCi_3) CRj_float) |
| 5524 | (set CRj_float (cr-undefined))) |
| 5525 | ((fr400 (unit u-check)) |
| 5526 | (fr500 (unit u-check))) |
| 5527 | ) |
| 5528 | ) |
| 5529 | |
| 5530 | (dni cfckra |
| 5531 | "conditional check float cc always" |
| 5532 | ((UNIT B01) (FR500-MAJOR B-5) (FR400-MAJOR B-5) CONDITIONAL FR-ACCESS) |
| 5533 | "cfckra$pack $CRj_float,$CCi,$cond" |
| 5534 | (+ pack FCC_ra CRj_float OP_6A (rs-null) CCi cond OPE4_1 |
| 5535 | (misc-null-9) (FCCi_3-null)) |
| 5536 | (if (eq CCi (or cond 2)) |
| 5537 | (check-semantics (const BI 1) CRj_float) |
| 5538 | (set CRj_float (cr-undefined))) |
| 5539 | ((fr400 (unit u-check)) |
| 5540 | (fr500 (unit u-check))) |
| 5541 | ) |
| 5542 | |
| 5543 | (dni cfckno |
| 5544 | "conditional check float cc never" |
| 5545 | ((UNIT B01) (FR500-MAJOR B-5) (FR400-MAJOR B-5) CONDITIONAL FR-ACCESS) |
| 5546 | "cfckno$pack $CRj_float,$CCi,$cond" |
| 5547 | (+ pack FCC_nev CRj_float OP_6A (rs-null) CCi cond OPE4_1 |
| 5548 | (misc-null-9) (FCCi_3-null)) |
| 5549 | (if (eq CCi (or cond 2)) |
| 5550 | (check-semantics (const BI 0) CRj_float) |
| 5551 | (set CRj_float (cr-undefined))) |
| 5552 | ((fr400 (unit u-check)) |
| 5553 | (fr500 (unit u-check))) |
| 5554 | ) |
| 5555 | |
| 5556 | (conditional-check-float-condition-code cfck ne OP_6A OPE4_1 Fne "check float cc not equal") |
| 5557 | (conditional-check-float-condition-code cfck eq OP_6A OPE4_1 Feq "check float cc equal") |
| 5558 | (conditional-check-float-condition-code cfck lg OP_6A OPE4_1 Flg "check float cc greater or less") |
| 5559 | (conditional-check-float-condition-code cfck ue OP_6A OPE4_1 Fue "check float cc unordered or equal") |
| 5560 | (conditional-check-float-condition-code cfck ul OP_6A OPE4_1 Ful "check float cc unordered or less") |
| 5561 | (conditional-check-float-condition-code cfck ge OP_6A OPE4_1 Fge "check float cc greater or equal") |
| 5562 | (conditional-check-float-condition-code cfck lt OP_6A OPE4_1 Flt "check float cc less") |
| 5563 | (conditional-check-float-condition-code cfck uge OP_6A OPE4_1 Fuge "check float cc unordered greater or equal") |
| 5564 | (conditional-check-float-condition-code cfck ug OP_6A OPE4_1 Fug "check float cc unordered or greater") |
| 5565 | (conditional-check-float-condition-code cfck le OP_6A OPE4_1 Fle "check float cc less or equal") |
| 5566 | (conditional-check-float-condition-code cfck gt OP_6A OPE4_1 Fgt "check float cc greater") |
| 5567 | (conditional-check-float-condition-code cfck ule OP_6A OPE4_1 Fule "check float cc unordered less or equal") |
| 5568 | (conditional-check-float-condition-code cfck u OP_6A OPE4_1 Fu "check float cc unordered") |
| 5569 | (conditional-check-float-condition-code cfck o OP_6A OPE4_1 Fo "check float cc ordered") |
| 5570 | |
| 5571 | (dni cjmpl |
| 5572 | "conditional jump and link" |
| 5573 | ((UNIT I0) (FR500-MAJOR I-5) (FR400-MAJOR I-5) CONDITIONAL) |
| 5574 | "cjmpl$pack @($GRi,$GRj),$CCi,$cond" |
| 5575 | (+ pack (misc-null-1) (LI-off) OP_6A GRi CCi cond OPE4_2 GRj) |
| 5576 | (if (eq CCi (or cond 2)) |
| 5577 | (jump-and-link-semantics GRi GRj LI)) |
| 5578 | ((fr400 (unit u-branch)) |
| 5579 | (fr500 (unit u-branch))) |
| 5580 | ) |
| 5581 | |
| 5582 | (dni ccalll |
| 5583 | "conditional call and link" |
| 5584 | ((UNIT I0) (FR500-MAJOR I-5) (FR400-MAJOR I-5) CONDITIONAL) |
| 5585 | "ccalll$pack @($GRi,$GRj),$CCi,$cond" |
| 5586 | (+ pack (misc-null-1) (LI-on) OP_6A GRi CCi cond OPE4_2 GRj) |
| 5587 | (if (eq CCi (or cond 2)) |
| 5588 | (jump-and-link-semantics GRi GRj LI)) |
| 5589 | ((fr400 (unit u-branch)) |
| 5590 | (fr500 (unit u-branch))) |
| 5591 | ) |
| 5592 | |
| 5593 | (define-pmacro (cache-invalidate name cache all op ope profile comment) |
| 5594 | (dni name |
| 5595 | (comment) |
| 5596 | ((UNIT C) (FR500-MAJOR C-2) (FR400-MAJOR C-2)) |
| 5597 | (.str name "$pack @($GRi,$GRj)") |
| 5598 | (+ pack (rd-null) op GRi ope GRj) |
| 5599 | (c-call VOID (.str "@cpu@_" cache "_cache_invalidate") (add GRi GRj) all) |
| 5600 | profile |
| 5601 | ) |
| 5602 | ) |
| 5603 | |
| 5604 | (cache-invalidate ici insn 0 OP_03 OPE1_38 |
| 5605 | ((fr400 (unit u-ici)) (fr500 (unit u-ici))) |
| 5606 | "invalidate insn cache") |
| 5607 | (cache-invalidate dci data 0 OP_03 OPE1_3C |
| 5608 | ((fr400 (unit u-dci)) (fr500 (unit u-dci))) |
| 5609 | "invalidate data cache") |
| 5610 | |
| 5611 | (define-pmacro (cache-invalidate-entry name cache op ope profile comment) |
| 5612 | (dni name |
| 5613 | (comment) |
| 5614 | ((UNIT C) (FR400-MAJOR C-2) (MACH fr400)) |
| 5615 | (.str name "$pack @($GRi,$GRj),$ae") |
| 5616 | (+ pack (misc-null-1) ae op GRi ope GRj) |
| 5617 | (if (eq ae 0) |
| 5618 | (c-call VOID (.str "@cpu@_" cache "_cache_invalidate") (add GRi GRj) -1) ; Invalid ae setting for this insn |
| 5619 | (c-call VOID (.str "@cpu@_" cache "_cache_invalidate") (add GRi GRj) ae)) |
| 5620 | profile |
| 5621 | ) |
| 5622 | ) |
| 5623 | |
| 5624 | (cache-invalidate-entry icei insn OP_03 OPE1_39 |
| 5625 | ((fr400 (unit u-ici))) |
| 5626 | "invalidate insn cache entry") |
| 5627 | (cache-invalidate-entry dcei data OP_03 OPE1_3A |
| 5628 | ((fr400 (unit u-dci))) |
| 5629 | "invalidate data cache entry") |
| 5630 | |
| 5631 | (dni dcf |
| 5632 | "Data cache flush" |
| 5633 | ((UNIT C) (FR500-MAJOR C-2) (FR400-MAJOR C-2)) |
| 5634 | "dcf$pack @($GRi,$GRj)" |
| 5635 | (+ pack (rd-null) OP_03 GRi OPE1_3D GRj) |
| 5636 | (c-call VOID "@cpu@_data_cache_flush" (add GRi GRj) 0) |
| 5637 | ((fr400 (unit u-dcf)) |
| 5638 | (fr500 (unit u-dcf))) |
| 5639 | ) |
| 5640 | |
| 5641 | (dni dcef |
| 5642 | "Data cache entry flush" |
| 5643 | ((UNIT C) (FR400-MAJOR C-2) (MACH fr400)) |
| 5644 | "dcef$pack @($GRi,$GRj),$ae" |
| 5645 | (+ pack (misc-null-1) ae OP_03 GRi OPE1_3B GRj) |
| 5646 | (if (eq ae 0) |
| 5647 | (c-call VOID "@cpu@_data_cache_flush" (add GRi GRj) -1) |
| 5648 | (c-call VOID "@cpu@_data_cache_flush" (add GRi GRj) ae)) |
| 5649 | ((fr400 (unit u-dcf))) |
| 5650 | ) |
| 5651 | |
| 5652 | (define-pmacro (write-TLB name insn op ope comment) |
| 5653 | (dni name |
| 5654 | (comment) |
| 5655 | ((UNIT C) (FR500-MAJOR C-2) (MACH frv) PRIVILEGED) |
| 5656 | (.str insn "$pack $GRk,@($GRi,$GRj)") |
| 5657 | (+ pack GRk op GRi ope GRj) |
| 5658 | (nop) ; for now |
| 5659 | () |
| 5660 | ) |
| 5661 | ) |
| 5662 | |
| 5663 | (write-TLB witlb witlb OP_03 OPE1_32 "write for insn TLB") |
| 5664 | (write-TLB wdtlb wdtlb OP_03 OPE1_36 "write for data TLB") |
| 5665 | |
| 5666 | (define-pmacro (invalidate-TLB name insn op ope comment) |
| 5667 | (dni name |
| 5668 | (comment) |
| 5669 | ((UNIT C) (FR500-MAJOR C-2) (MACH frv) PRIVILEGED) |
| 5670 | (.str insn "$pack @($GRi,$GRj)") |
| 5671 | (+ pack (rd-null) op GRi ope GRj) |
| 5672 | (nop) ; for now |
| 5673 | () |
| 5674 | ) |
| 5675 | ) |
| 5676 | |
| 5677 | (invalidate-TLB itlbi itlbi OP_03 OPE1_33 "invalidate insn TLB") |
| 5678 | (invalidate-TLB dtlbi dtlbi OP_03 OPE1_37 "invalidate data TLB") |
| 5679 | |
| 5680 | (define-pmacro (cache-preload name cache pipe attrs op ope profile comment) |
| 5681 | (dni name |
| 5682 | (comment) |
| 5683 | (.splice (UNIT pipe) (FR500-MAJOR C-2) (FR400-MAJOR C-2) (.unsplice attrs)) |
| 5684 | (.str name "$pack $GRi,$GRj,$lock") |
| 5685 | (+ pack (misc-null-1) lock op GRi ope GRj) |
| 5686 | (c-call VOID (.str "@cpu@_" cache "_cache_preload") GRi GRj lock) |
| 5687 | profile |
| 5688 | ) |
| 5689 | ) |
| 5690 | |
| 5691 | (cache-preload icpl insn C () OP_03 OPE1_30 |
| 5692 | ((fr400 (unit u-icpl)) (fr500 (unit u-icpl))) |
| 5693 | "preload insn cache") |
| 5694 | (cache-preload dcpl data DCPL () OP_03 OPE1_34 |
| 5695 | ((fr400 (unit u-dcpl)) (fr500 (unit u-dcpl))) |
| 5696 | "preload data cache") |
| 5697 | |
| 5698 | (define-pmacro (cache-unlock name cache op ope profile comment) |
| 5699 | (dni name |
| 5700 | (comment) |
| 5701 | ((UNIT C) (FR500-MAJOR C-2) (FR400-MAJOR C-2)) |
| 5702 | (.str name "$pack $GRi") |
| 5703 | (+ pack (rd-null) op GRi ope (GRj-null)) |
| 5704 | (c-call VOID (.str "@cpu@_" cache "_cache_unlock") GRi) |
| 5705 | profile |
| 5706 | ) |
| 5707 | ) |
| 5708 | |
| 5709 | (cache-unlock icul insn OP_03 OPE1_31 |
| 5710 | ((fr400 (unit u-icul)) (fr500 (unit u-icul))) |
| 5711 | "unlock insn cache") |
| 5712 | (cache-unlock dcul data OP_03 OPE1_35 |
| 5713 | ((fr400 (unit u-dcul)) (fr500 (unit u-dcul))) |
| 5714 | "unlock data cache") |
| 5715 | |
| 5716 | (define-pmacro (barrier name insn op ope profile comment) |
| 5717 | (dni name |
| 5718 | (comment) |
| 5719 | ((UNIT C) (FR500-MAJOR C-2) (FR400-MAJOR C-2)) |
| 5720 | (.str insn "$pack") |
| 5721 | (+ pack (rd-null) op (rs-null) ope (GRj-null)) |
| 5722 | (nop) ; sufficient implementation |
| 5723 | profile |
| 5724 | ) |
| 5725 | ) |
| 5726 | |
| 5727 | (barrier bar bar OP_03 OPE1_3E |
| 5728 | ((fr400 (unit u-barrier)) (fr500 (unit u-barrier))) |
| 5729 | "barrier") |
| 5730 | (barrier membar membar OP_03 OPE1_3F |
| 5731 | ((fr400 (unit u-membar)) (fr500 (unit u-membar))) |
| 5732 | "memory barrier") |
| 5733 | |
| 5734 | ; Coprocessor operations |
| 5735 | (define-pmacro (cop-op num op) |
| 5736 | (dni (.sym cop num) |
| 5737 | "Coprocessor operation" |
| 5738 | ((UNIT C) (FR500-MAJOR C-2) (MACH frv)) |
| 5739 | (.str "cop" num "$pack $s6_1,$CPRi,$CPRj,$CPRk") |
| 5740 | (+ pack CPRk op CPRi s6_1 CPRj) |
| 5741 | (nop) ; sufficient implementation |
| 5742 | () |
| 5743 | ) |
| 5744 | ) |
| 5745 | |
| 5746 | (cop-op 1 OP_7E) |
| 5747 | (cop-op 2 OP_7F) |
| 5748 | |
| 5749 | (define-pmacro (clear-ne-flag-semantics target_index is_float) |
| 5750 | (c-call VOID "@cpu@_clear_ne_flags" target_index is_float) |
| 5751 | ) |
| 5752 | |
| 5753 | (define-pmacro (clear-ne-flag-r name op ope reg is_float attr profile comment) |
| 5754 | (dni name |
| 5755 | (comment) |
| 5756 | ((UNIT I01) (FR500-MAJOR I-6) (MACH simple,tomcat,fr500,frv) attr) |
| 5757 | (.str name "$pack $" reg "k") |
| 5758 | (+ pack (.sym reg k) op (rs-null) ope (GRj-null)) |
| 5759 | (sequence () |
| 5760 | ; hack to get this referenced for profiling |
| 5761 | (c-raw-call VOID "frv_ref_SI" (.sym reg k)) |
| 5762 | (clear-ne-flag-semantics (index-of (.sym reg k)) is_float)) |
| 5763 | profile |
| 5764 | ) |
| 5765 | ) |
| 5766 | |
| 5767 | (clear-ne-flag-r clrgr OP_0A OPE1_00 GR 0 NA |
| 5768 | ((fr500 (unit u-clrgr))) |
| 5769 | "Clear GR NE flag") |
| 5770 | (clear-ne-flag-r clrfr OP_0A OPE1_02 FR 1 FR-ACCESS |
| 5771 | ((fr500 (unit u-clrfr))) |
| 5772 | "Clear FR NE flag") |
| 5773 | |
| 5774 | (define-pmacro (clear-ne-flag-all name op ope is_float attr profile comment) |
| 5775 | (dni name |
| 5776 | (comment) |
| 5777 | ((UNIT I01) (FR500-MAJOR I-6) (MACH simple,tomcat,fr500,frv) attr) |
| 5778 | (.str name "$pack") |
| 5779 | (+ pack (rd-null) op (rs-null) ope (GRj-null)) |
| 5780 | (clear-ne-flag-semantics -1 is_float) |
| 5781 | profile |
| 5782 | ) |
| 5783 | ) |
| 5784 | |
| 5785 | (clear-ne-flag-all clrga OP_0A OPE1_01 0 NA |
| 5786 | ((fr500 (unit u-clrgr))) |
| 5787 | "Clear GR NE flag ALL") |
| 5788 | (clear-ne-flag-all clrfa OP_0A OPE1_03 1 FR-ACCESS |
| 5789 | ((fr500 (unit u-clrfr))) |
| 5790 | "Clear FR NE flag ALL") |
| 5791 | |
| 5792 | (define-pmacro (commit-semantics target_index is_float) |
| 5793 | (c-call VOID "@cpu@_commit" target_index is_float) |
| 5794 | ) |
| 5795 | |
| 5796 | (define-pmacro (commit-r name op ope reg is_float attr comment) |
| 5797 | (dni name |
| 5798 | (comment) |
| 5799 | ((UNIT I01) (FR500-MAJOR I-6) (MACH frv,fr500) attr) |
| 5800 | (.str name "$pack $" reg "k") |
| 5801 | (+ pack (.sym reg k) op (rs-null) ope (GRj-null)) |
| 5802 | (commit-semantics (index-of (.sym reg k)) is_float) |
| 5803 | () |
| 5804 | ) |
| 5805 | ) |
| 5806 | |
| 5807 | (commit-r commitgr OP_0A OPE1_04 GR 0 NA "commit exceptions, specific GR") |
| 5808 | (commit-r commitfr OP_0A OPE1_06 FR 1 FR-ACCESS "commit exceptions, specific FR") |
| 5809 | |
| 5810 | (define-pmacro (commit name op ope is_float attr comment) |
| 5811 | (dni name |
| 5812 | (comment) |
| 5813 | ((UNIT I01) (FR500-MAJOR I-6) (MACH frv,fr500) attr) |
| 5814 | (.str name "$pack") |
| 5815 | (+ pack (rd-null) op (rs-null) ope (GRj-null)) |
| 5816 | (commit-semantics -1 is_float) |
| 5817 | () |
| 5818 | ) |
| 5819 | ) |
| 5820 | |
| 5821 | (commit commitga OP_0A OPE1_05 0 NA "commit exceptions, any GR") |
| 5822 | (commit commitfa OP_0A OPE1_07 1 FR-ACCESS "commit exceptions, any FR") |
| 5823 | |
| 5824 | (define-pmacro (floating-point-conversion |
| 5825 | name op ope conv mode src targ attr comment) |
| 5826 | (dni name |
| 5827 | (comment) |
| 5828 | (.splice (UNIT FMALL) (FR500-MAJOR F-1) (.unsplice attr)) |
| 5829 | (.str name "$pack $" src ",$" targ) |
| 5830 | (+ pack targ op (rs-null) ope src) |
| 5831 | (set targ (conv mode src)) |
| 5832 | ((fr500 (unit u-float-convert))) |
| 5833 | ) |
| 5834 | ) |
| 5835 | |
| 5836 | (floating-point-conversion fitos OP_79 OPE1_00 float SF FRintj FRk |
| 5837 | ((MACH simple,tomcat,fr500,frv)) |
| 5838 | "Convert Integer to Single") |
| 5839 | (floating-point-conversion fstoi OP_79 OPE1_01 fix SI FRj FRintk |
| 5840 | ((MACH simple,tomcat,fr500,frv)) |
| 5841 | "Convert Single to Integer") |
| 5842 | (floating-point-conversion fitod OP_7A OPE1_00 float DF FRintj FRdoublek |
| 5843 | ((MACH frv)) |
| 5844 | "Convert Integer to Double") |
| 5845 | (floating-point-conversion fdtoi OP_7A OPE1_01 fix SI FRdoublej FRintk |
| 5846 | ((MACH frv)) |
| 5847 | "Convert Double to Integer") |
| 5848 | |
| 5849 | (define-pmacro (floating-point-dual-conversion |
| 5850 | name op ope conv mode src src_hw targ targ_hw attr comment) |
| 5851 | (dni name |
| 5852 | (comment) |
| 5853 | ((MACH frv) (UNIT FMALL) (FR500-MAJOR F-1) attr) |
| 5854 | (.str name "$pack $" src ",$" targ) |
| 5855 | (+ pack targ op (rs-null) ope src) |
| 5856 | (sequence () |
| 5857 | (set targ (conv mode src)) |
| 5858 | (set (nextreg targ_hw targ 1) |
| 5859 | (conv mode (nextreg src_hw src 1)))) |
| 5860 | ((fr500 (unit u-float-dual-convert))) |
| 5861 | ) |
| 5862 | ) |
| 5863 | |
| 5864 | (floating-point-dual-conversion fditos OP_79 OPE1_10 float SF FRintj h-fr_int FRk h-fr NA "Dual Convert Integer to Single") |
| 5865 | (floating-point-dual-conversion fdstoi OP_79 OPE1_11 fix SI FRj h-fr FRintk h-fr_int NA "Dual Convert Single to Integer") |
| 5866 | |
| 5867 | (define-pmacro (ne-floating-point-dual-conversion |
| 5868 | name op ope conv mode src src_hw targ targ_hw attr comment) |
| 5869 | (dni name |
| 5870 | (comment) |
| 5871 | ((MACH frv) (UNIT FMALL) (FR500-MAJOR F-1) NON-EXCEPTING attr) |
| 5872 | (.str name "$pack $" src ",$" targ) |
| 5873 | (+ pack targ op (rs-null) ope src) |
| 5874 | (sequence () |
| 5875 | (c-call VOID "@cpu@_set_ne_index" (index-of targ)) |
| 5876 | (set targ (conv mode src)) |
| 5877 | (c-call VOID "@cpu@_set_ne_index" (add (index-of targ) 1)) |
| 5878 | (set (nextreg targ_hw targ 1) |
| 5879 | (conv mode (nextreg src_hw src 1)))) |
| 5880 | ((fr500 (unit u-float-dual-convert))) |
| 5881 | ) |
| 5882 | ) |
| 5883 | |
| 5884 | (ne-floating-point-dual-conversion nfditos OP_79 OPE1_30 float SF FRintj h-fr_int FRk h-fr NA "Non excepting dual Convert Integer to Single") |
| 5885 | (ne-floating-point-dual-conversion nfdstoi OP_79 OPE1_31 fix SI FRj h-fr FRintk h-fr_int NA "Non excepting dual Convert Single to Integer") |
| 5886 | |
| 5887 | (define-pmacro (conditional-floating-point-conversion |
| 5888 | name op ope conv mode src targ comment) |
| 5889 | (dni name |
| 5890 | (comment) |
| 5891 | ((UNIT FMALL) (FR500-MAJOR F-1) (MACH simple,tomcat,fr500,frv)) |
| 5892 | (.str name "$pack $" src ",$" targ ",$CCi,$cond") |
| 5893 | (+ pack targ op (rs-null) CCi cond ope src) |
| 5894 | (if (eq CCi (or cond 2)) |
| 5895 | (set targ (conv mode src))) |
| 5896 | ((fr500 (unit u-float-convert))) |
| 5897 | ) |
| 5898 | ) |
| 5899 | |
| 5900 | (conditional-floating-point-conversion cfitos OP_6B OPE4_0 float SF FRintj FRk "Conditional convert Integer to Single") |
| 5901 | (conditional-floating-point-conversion cfstoi OP_6B OPE4_1 fix SI FRj FRintk "Conditional convert Single to Integer") |
| 5902 | |
| 5903 | (define-pmacro (ne-floating-point-conversion |
| 5904 | name op ope conv mode src targ comment) |
| 5905 | (dni name |
| 5906 | (comment) |
| 5907 | ((UNIT FMALL) (FR500-MAJOR F-1) (MACH simple,tomcat,fr500,frv)) |
| 5908 | (.str name "$pack $" src ",$" targ) |
| 5909 | (+ pack targ op (rs-null) ope src) |
| 5910 | (sequence () |
| 5911 | (c-call VOID "@cpu@_set_ne_index" (index-of targ)) |
| 5912 | (set targ (conv mode src))) |
| 5913 | ((fr500 (unit u-float-convert))) |
| 5914 | ) |
| 5915 | ) |
| 5916 | |
| 5917 | (ne-floating-point-conversion nfitos OP_79 OPE1_20 float SF FRintj FRk "NE convert Integer to Single") |
| 5918 | (ne-floating-point-conversion nfstoi OP_79 OPE1_21 fix SI FRj FRintk "NE convert Single to Integer") |
| 5919 | |
| 5920 | (register-transfer fmovs OP_79 OPE1_02 |
| 5921 | FRj FRk FM01 |
| 5922 | ((FR500-MAJOR F-1) (MACH simple,tomcat,fr500,frv)) |
| 5923 | ((fr500 (unit u-fr2fr))) |
| 5924 | "Move Single Float") |
| 5925 | (register-transfer fmovd OP_7A OPE1_02 |
| 5926 | ; TODO -- unit doesn't handle extra register |
| 5927 | FRdoublej FRdoublek FM01 |
| 5928 | ((FR500-MAJOR F-1) (MACH frv)) |
| 5929 | ((fr500 (unit u-fr2fr))) |
| 5930 | "Move Double Float") |
| 5931 | |
| 5932 | (dni fdmovs |
| 5933 | "Dual move single float" |
| 5934 | ((MACH frv) (UNIT FMALL) (FR500-MAJOR F-1)) |
| 5935 | "fdmovs$pack $FRj,$FRk" |
| 5936 | (+ pack FRk OP_79 (rs-null) OPE1_12 FRj) |
| 5937 | (sequence () |
| 5938 | (set FRk FRj) |
| 5939 | (set (nextreg h-fr FRk 1) (nextreg h-fr FRj 1))) |
| 5940 | ; TODO -- unit doesn't handle extra register |
| 5941 | ((fr500 (unit u-fr2fr))) |
| 5942 | ) |
| 5943 | |
| 5944 | (conditional-register-transfer cfmovs OP_6C OPE4_0 FRj FRk FM01 |
| 5945 | ((FR500-MAJOR F-1) |
| 5946 | (MACH simple,tomcat,fr500,frv)) |
| 5947 | ((fr500 (unit u-fr2fr))) |
| 5948 | "Conditional move Single Float") |
| 5949 | |
| 5950 | (define-pmacro (floating-point-neg name src targ op ope attr comment) |
| 5951 | (dni name |
| 5952 | (comment) |
| 5953 | (.splice (UNIT FMALL) (FR500-MAJOR F-1) (.unsplice attr)) |
| 5954 | (.str name "$pack $" src ",$" targ) |
| 5955 | (+ pack src op (rs-null) ope targ) |
| 5956 | (set targ (neg src)) |
| 5957 | ((fr500 (unit u-float-arith))) |
| 5958 | ) |
| 5959 | ) |
| 5960 | |
| 5961 | (floating-point-neg fnegs FRj FRk OP_79 OPE1_03 ((MACH simple,tomcat,fr500,frv)) "Floating point negate, single") |
| 5962 | (floating-point-neg fnegd FRdoublej FRdoublek OP_7A OPE1_03 ((MACH frv)) "Floating point negate, double") |
| 5963 | |
| 5964 | (dni fdnegs |
| 5965 | "Floating point dual negate, single" |
| 5966 | ((MACH frv) (UNIT FMALL) (FR500-MAJOR F-1)) |
| 5967 | "fdnegs$pack $FRj,$FRk" |
| 5968 | (+ pack FRk OP_79 (rs-null) OPE1_13 FRj) |
| 5969 | (sequence () |
| 5970 | (set FRk (neg FRj)) |
| 5971 | (set (nextreg h-fr FRk 1) (neg (nextreg h-fr FRj 1)))) |
| 5972 | ((fr500 (unit u-float-dual-arith))) |
| 5973 | ) |
| 5974 | |
| 5975 | (dni cfnegs |
| 5976 | "Conditional floating point negate, single" |
| 5977 | ((UNIT FMALL) (FR500-MAJOR F-1) (MACH simple,tomcat,fr500,frv)) |
| 5978 | "cfnegs$pack $FRj,$FRk,$CCi,$cond" |
| 5979 | (+ pack FRj OP_6C (rs-null) CCi cond OPE4_1 FRk) |
| 5980 | (if (eq CCi (or cond 2)) |
| 5981 | (set FRk (neg FRj))) |
| 5982 | ((fr500 (unit u-float-arith))) |
| 5983 | ) |
| 5984 | |
| 5985 | (define-pmacro (float-abs name src targ op ope attr comment) |
| 5986 | (dni name |
| 5987 | (comment) |
| 5988 | (.splice (UNIT FMALL) (FR500-MAJOR F-1) (.unsplice attr)) |
| 5989 | (.str name "$pack $" src ",$" targ ) |
| 5990 | (+ pack targ op (rs-null) ope src) |
| 5991 | (set targ (abs src)) |
| 5992 | ((fr500 (unit u-float-arith))) |
| 5993 | ) |
| 5994 | ) |
| 5995 | |
| 5996 | (float-abs fabss FRj FRk OP_79 OPE1_04 ((MACH simple,tomcat,fr500,frv)) "Float absolute value, single") |
| 5997 | (float-abs fabsd FRdoublej FRdoublek OP_7A OPE1_04 ((MACH frv)) "Float absolute value, double") |
| 5998 | |
| 5999 | (dni fdabss |
| 6000 | "Floating point dual absolute value, single" |
| 6001 | ((MACH frv) (UNIT FMALL) (FR500-MAJOR F-1)) |
| 6002 | "fdabss$pack $FRj,$FRk" |
| 6003 | (+ pack FRk OP_79 (rs-null) OPE1_14 FRj) |
| 6004 | (sequence () |
| 6005 | (set FRk (abs FRj)) |
| 6006 | (set (nextreg h-fr FRk 1) (abs (nextreg h-fr FRj 1)))) |
| 6007 | ((fr500 (unit u-float-dual-arith))) |
| 6008 | ) |
| 6009 | |
| 6010 | (dni cfabss |
| 6011 | "Conditional floating point absolute value, single" |
| 6012 | ((UNIT FMALL) (FR500-MAJOR F-1) (MACH simple,tomcat,fr500,frv)) |
| 6013 | "cfabss$pack $FRj,$FRk,$CCi,$cond" |
| 6014 | (+ pack FRj OP_6C (rs-null) CCi cond OPE4_2 FRk) |
| 6015 | (if (eq CCi (or cond 2)) |
| 6016 | (set FRk (abs FRj))) |
| 6017 | ((fr500 (unit u-float-arith))) |
| 6018 | ) |
| 6019 | |
| 6020 | (dni fsqrts |
| 6021 | "Square root single" |
| 6022 | ((UNIT FM01) (FR500-MAJOR F-4) (MACH simple,tomcat,fr500,frv)) |
| 6023 | "fsqrts$pack $FRj,$FRk" |
| 6024 | (+ pack FRk OP_79 (rs-null) OPE1_05 FRj) |
| 6025 | (set FRk (sqrt SF FRj)) |
| 6026 | ((fr500 (unit u-float-sqrt))) |
| 6027 | ) |
| 6028 | |
| 6029 | (dni fdsqrts |
| 6030 | "Dual square root single" |
| 6031 | ((MACH frv) (UNIT FM01) (FR500-MAJOR F-4)) |
| 6032 | "fdsqrts$pack $FRj,$FRk" |
| 6033 | (+ pack FRk OP_79 (rs-null) OPE1_15 FRj) |
| 6034 | (sequence () |
| 6035 | (set FRk (sqrt SF FRj)) |
| 6036 | (set (nextreg h-fr FRk 1) (sqrt (nextreg h-fr FRj 1)))) |
| 6037 | ((fr500 (unit u-float-dual-sqrt))) |
| 6038 | ) |
| 6039 | |
| 6040 | (dni nfdsqrts |
| 6041 | "Non excepting Dual square root single" |
| 6042 | ((MACH frv) (UNIT FM01) (FR500-MAJOR F-4) NON-EXCEPTING) |
| 6043 | "nfdsqrts$pack $FRj,$FRk" |
| 6044 | (+ pack FRk OP_79 (rs-null) OPE1_35 FRj) |
| 6045 | (sequence () |
| 6046 | (c-call VOID "@cpu@_set_ne_index" (index-of FRk)) |
| 6047 | (set FRk (sqrt SF FRj)) |
| 6048 | (c-call VOID "@cpu@_set_ne_index" (add (index-of FRk) 1)) |
| 6049 | (set (nextreg h-fr FRk 1) (sqrt (nextreg h-fr FRj 1)))) |
| 6050 | ((fr500 (unit u-float-dual-sqrt))) |
| 6051 | ) |
| 6052 | |
| 6053 | (dni fsqrtd |
| 6054 | "Square root double" |
| 6055 | ((UNIT FM01) (FR500-MAJOR F-4) (MACH frv)) |
| 6056 | "fsqrtd$pack $FRdoublej,$FRdoublek" |
| 6057 | (+ pack FRdoublek OP_7A (rs-null) OPE1_05 FRdoublej) |
| 6058 | (set FRdoublek (sqrt DF FRdoublej)) |
| 6059 | ((fr500 (unit u-float-sqrt))) |
| 6060 | ) |
| 6061 | |
| 6062 | (dni cfsqrts |
| 6063 | "Conditional square root single" |
| 6064 | ((UNIT FM01) (FR500-MAJOR F-4) (MACH simple,tomcat,fr500,frv)) |
| 6065 | "cfsqrts$pack $FRj,$FRk,$CCi,$cond" |
| 6066 | (+ pack FRk OP_6E (rs-null) CCi cond OPE4_2 FRj) |
| 6067 | (if (eq CCi (or cond 2)) |
| 6068 | (set FRk (sqrt SF FRj))) |
| 6069 | ((fr500 (unit u-float-sqrt))) |
| 6070 | ) |
| 6071 | |
| 6072 | (dni nfsqrts |
| 6073 | "Non exception square root, single" |
| 6074 | ((UNIT FM01) (FR500-MAJOR F-4) (MACH simple,tomcat,fr500,frv)) |
| 6075 | "nfsqrts$pack $FRj,$FRk" |
| 6076 | (+ pack FRk OP_79 (rs-null) OPE1_25 FRj) |
| 6077 | (sequence () |
| 6078 | (c-call VOID "@cpu@_set_ne_index" (index-of FRk)) |
| 6079 | (set FRk (sqrt SF FRj))) |
| 6080 | ((fr500 (unit u-float-sqrt))) |
| 6081 | ) |
| 6082 | |
| 6083 | (define-pmacro (float-binary-op-s name pipe attr operation op ope comment) |
| 6084 | (dni name |
| 6085 | (comment) |
| 6086 | (.splice (UNIT pipe) (MACH simple,tomcat,fr500,frv) (.unsplice attr)) |
| 6087 | (.str name "$pack $FRi,$FRj,$FRk") |
| 6088 | (+ pack FRk op FRi ope FRj) |
| 6089 | (set FRk (operation FRi FRj)) |
| 6090 | ((fr500 (unit u-float-arith))) |
| 6091 | ) |
| 6092 | ) |
| 6093 | |
| 6094 | (float-binary-op-s fadds FMALL ((FR500-MAJOR F-2)) add OP_79 OPE1_06 "add single float") |
| 6095 | (float-binary-op-s fsubs FMALL ((FR500-MAJOR F-2)) sub OP_79 OPE1_07 "sub single float") |
| 6096 | (float-binary-op-s fmuls FM01 ((FR500-MAJOR F-3)) mul OP_79 OPE1_08 "mul single float") |
| 6097 | |
| 6098 | (dni fdivs |
| 6099 | "div single float" |
| 6100 | ((UNIT FM01) (FR500-MAJOR F-4) (MACH simple,tomcat,fr500,frv)) |
| 6101 | "fdivs$pack $FRi,$FRj,$FRk" |
| 6102 | (+ pack FRk OP_79 FRi OPE1_09 FRj) |
| 6103 | (set FRk (div FRi FRj)) |
| 6104 | ((fr500 (unit u-float-div))) |
| 6105 | ) |
| 6106 | |
| 6107 | (define-pmacro (float-binary-op-d name operation op ope major comment) |
| 6108 | (dni name |
| 6109 | (comment) |
| 6110 | ((UNIT FMALL) (FR500-MAJOR major) (MACH frv)) |
| 6111 | (.str name "$pack $FRdoublei,$FRdoublej,$FRdoublek") |
| 6112 | (+ pack FRdoublek op FRdoublei ope FRdoublej) |
| 6113 | (set FRdoublek (operation FRdoublei FRdoublej)) |
| 6114 | ((fr500 (unit u-float-arith))) |
| 6115 | ) |
| 6116 | ) |
| 6117 | |
| 6118 | (float-binary-op-d faddd add OP_7A OPE1_06 F-2 "add double float") |
| 6119 | (float-binary-op-d fsubd sub OP_7A OPE1_07 F-2 "sub double float") |
| 6120 | (float-binary-op-d fmuld mul OP_7A OPE1_08 F-3 "mul double float") |
| 6121 | (float-binary-op-d fdivd div OP_7A OPE1_09 F-4 "div double float") |
| 6122 | |
| 6123 | (define-pmacro (conditional-float-binary-op name pipe attr operation op ope comment) |
| 6124 | (dni name |
| 6125 | (comment) |
| 6126 | (.splice (UNIT pipe) (MACH simple,tomcat,fr500,frv) |
| 6127 | (.unsplice attr)) |
| 6128 | (.str name "$pack $FRi,$FRj,$FRk,$CCi,$cond") |
| 6129 | (+ pack FRk op FRi CCi cond ope FRj) |
| 6130 | (if (eq CCi (or cond 2)) |
| 6131 | (set FRk (operation FRi FRj))) |
| 6132 | ((fr500 (unit u-float-arith))) |
| 6133 | ) |
| 6134 | ) |
| 6135 | |
| 6136 | (conditional-float-binary-op cfadds FMALL ((FR500-MAJOR F-2)) add OP_6D OPE4_0 "cond add single") |
| 6137 | (conditional-float-binary-op cfsubs FMALL ((FR500-MAJOR F-2)) sub OP_6D OPE4_1 "cond sub single") |
| 6138 | (conditional-float-binary-op cfmuls FM01 ((FR500-MAJOR F-3)) mul OP_6E OPE4_0 "cond mul single") |
| 6139 | (conditional-float-binary-op cfdivs FM01 ((FR500-MAJOR F-4)) div OP_6E OPE4_1 "cond div single") |
| 6140 | |
| 6141 | (define-pmacro (ne-float-binary-op name pipe attr operation op ope comment) |
| 6142 | (dni name |
| 6143 | (comment) |
| 6144 | (.splice (UNIT pipe) (MACH simple,tomcat,fr500,frv) |
| 6145 | (.unsplice attr)) |
| 6146 | (.str name "$pack $FRi,$FRj,$FRk") |
| 6147 | (+ pack FRk op FRi ope FRj) |
| 6148 | (sequence () |
| 6149 | (c-call VOID "@cpu@_set_ne_index" (index-of FRk)) |
| 6150 | (set FRk (operation FRi FRj))) |
| 6151 | ((fr500 (unit u-float-arith))) |
| 6152 | ) |
| 6153 | ) |
| 6154 | |
| 6155 | (ne-float-binary-op nfadds FMALL ((FR500-MAJOR F-2)) add OP_79 OPE1_26 "ne add single") |
| 6156 | (ne-float-binary-op nfsubs FMALL ((FR500-MAJOR F-2)) sub OP_79 OPE1_27 "ne sub single") |
| 6157 | (ne-float-binary-op nfmuls FM01 ((FR500-MAJOR F-3)) mul OP_79 OPE1_28 "ne mul single") |
| 6158 | (ne-float-binary-op nfdivs FM01 ((FR500-MAJOR F-4)) div OP_79 OPE1_29 "ne div single") |
| 6159 | |
| 6160 | (define-pmacro (fcc-eq) 8) |
| 6161 | (define-pmacro (fcc-lt) 4) |
| 6162 | (define-pmacro (fcc-gt) 2) |
| 6163 | (define-pmacro (fcc-uo) 1) |
| 6164 | |
| 6165 | (define-pmacro (compare-and-set-fcc arg1 arg2 fcc) |
| 6166 | (if (gt arg1 arg2) |
| 6167 | (set fcc (fcc-gt)) |
| 6168 | (if (eq arg1 arg2) |
| 6169 | (set fcc (fcc-eq)) |
| 6170 | (if (lt arg1 arg2) |
| 6171 | (set fcc (fcc-lt)) |
| 6172 | (set fcc (fcc-uo))))) |
| 6173 | ) |
| 6174 | |
| 6175 | (dni fcmps |
| 6176 | "compare single float" |
| 6177 | ((UNIT FMALL) (FR500-MAJOR F-2) (MACH simple,tomcat,fr500,frv)) |
| 6178 | "fcmps$pack $FRi,$FRj,$FCCi_2" |
| 6179 | (+ pack (cond-null) FCCi_2 OP_79 FRi OPE1_0A FRj) |
| 6180 | (compare-and-set-fcc FRi FRj FCCi_2) |
| 6181 | ((fr500 (unit u-float-compare))) |
| 6182 | ) |
| 6183 | |
| 6184 | (dni fcmpd |
| 6185 | "compare double float" |
| 6186 | ((UNIT FMALL) (FR500-MAJOR F-2) (MACH frv)) |
| 6187 | "fcmpd$pack $FRdoublei,$FRdoublej,$FCCi_2" |
| 6188 | (+ pack (cond-null) FCCi_2 OP_7A FRdoublei OPE1_0A FRdoublej) |
| 6189 | (compare-and-set-fcc FRdoublei FRdoublej FCCi_2) |
| 6190 | ((fr500 (unit u-float-compare))) |
| 6191 | ) |
| 6192 | |
| 6193 | (dni cfcmps |
| 6194 | "Conditional compare single, float" |
| 6195 | ((UNIT FMALL) (FR500-MAJOR F-2) (MACH simple,tomcat,fr500,frv)) |
| 6196 | "cfcmps$pack $FRi,$FRj,$FCCi_2,$CCi,$cond" |
| 6197 | (+ pack (cond-null) FCCi_2 OP_6D FRi CCi cond OPE4_2 FRj) |
| 6198 | (if (eq CCi (or cond 2)) |
| 6199 | (compare-and-set-fcc FRi FRj FCCi_2)) |
| 6200 | ((fr500 (unit u-float-compare))) |
| 6201 | ) |
| 6202 | |
| 6203 | (dni fdcmps |
| 6204 | "float dual compare single" |
| 6205 | ((UNIT FMALL) (FR500-MAJOR F-6) (MACH simple,tomcat,fr500,frv)) |
| 6206 | "fdcmps$pack $FRi,$FRj,$FCCi_2" |
| 6207 | (+ pack (cond-null) FCCi_2 OP_79 FRi OPE1_1A FRj) |
| 6208 | (sequence () |
| 6209 | (compare-and-set-fcc FRi FRj FCCi_2) |
| 6210 | (compare-and-set-fcc (nextreg h-fr FRi 1) (nextreg h-fr FRj 1) |
| 6211 | (nextreg h-fccr FCCi_2 1))) |
| 6212 | ((fr500 (unit u-float-dual-compare))) |
| 6213 | ) |
| 6214 | |
| 6215 | (define-pmacro (float-mul-with-add name add_sub arg1 arg2 targ op ope comment) |
| 6216 | (dni name |
| 6217 | (comment) |
| 6218 | ((UNIT FMALL) (FR500-MAJOR F-5) (MACH frv)) |
| 6219 | (.str name "$pack $" arg1 ",$" arg2 ",$" targ) |
| 6220 | (+ pack targ op arg1 ope arg2) |
| 6221 | (set targ (add_sub (mul arg1 arg2) targ)) |
| 6222 | ((fr500 (unit u-float-dual-arith))) |
| 6223 | ) |
| 6224 | ) |
| 6225 | |
| 6226 | (float-mul-with-add fmadds add FRi FRj FRk OP_79 OPE1_0B "mul with add, single") |
| 6227 | (float-mul-with-add fmsubs sub FRi FRj FRk OP_79 OPE1_0C "mul with sub, single") |
| 6228 | |
| 6229 | (float-mul-with-add fmaddd add FRdoublei FRdoublej FRdoublek OP_7A OPE1_0B "mul with add, double") |
| 6230 | (float-mul-with-add fmsubd sub FRdoublei FRdoublej FRdoublek OP_7A OPE1_0C "mul with sub, double") |
| 6231 | |
| 6232 | (dni fdmadds |
| 6233 | "Float dual multiply with add" |
| 6234 | ((UNIT FMALL) (FR500-MAJOR F-5) (MACH frv)) |
| 6235 | "fdmadds$pack $FRi,$FRj,$FRk" |
| 6236 | (+ pack FRk OP_79 FRi OPE1_1B FRj) |
| 6237 | (sequence () |
| 6238 | (set FRk (add (mul FRi FRj) FRk)) |
| 6239 | (set (nextreg h-fr FRk 1) |
| 6240 | (add (mul (nextreg h-fr FRi 1) (nextreg h-fr FRj 1)) |
| 6241 | (nextreg h-fr FRk 1)))) |
| 6242 | ; TODO dual registers not referenced for profiling |
| 6243 | ((fr500 (unit u-float-dual-arith))) |
| 6244 | ) |
| 6245 | |
| 6246 | (dni nfdmadds |
| 6247 | "Non excepting float dual multiply with add" |
| 6248 | ((UNIT FMALL) (FR500-MAJOR F-5) (MACH frv)) |
| 6249 | "nfdmadds$pack $FRi,$FRj,$FRk" |
| 6250 | (+ pack FRk OP_79 FRi OPE1_3B FRj) |
| 6251 | (sequence () |
| 6252 | (c-call VOID "@cpu@_set_ne_index" (index-of FRk)) |
| 6253 | (set FRk (add (mul FRi FRj) FRk)) |
| 6254 | (c-call VOID "@cpu@_set_ne_index" (add (index-of FRk) 1)) |
| 6255 | (set (nextreg h-fr FRk 1) |
| 6256 | (add (mul (nextreg h-fr FRi 1) (nextreg h-fr FRj 1)) |
| 6257 | (nextreg h-fr FRk 1)))) |
| 6258 | ; TODO dual registers not referenced for profiling |
| 6259 | ((fr500 (unit u-float-dual-arith))) |
| 6260 | ) |
| 6261 | |
| 6262 | (define-pmacro (conditional-float-mul-with-add |
| 6263 | name add_sub arg1 arg2 targ op ope comment) |
| 6264 | (dni name |
| 6265 | (comment) |
| 6266 | ((UNIT FMALL) (FR500-MAJOR F-5) (MACH frv) CONDITIONAL) |
| 6267 | (.str name "$pack $FRi,$FRj,$FRk,$CCi,$cond") |
| 6268 | (+ pack FRk op FRi CCi cond ope FRj) |
| 6269 | (if (eq CCi (or cond 2)) |
| 6270 | (set targ (add_sub (mul arg1 arg2) targ))) |
| 6271 | ((fr500 (unit u-float-dual-arith))) |
| 6272 | ) |
| 6273 | ) |
| 6274 | |
| 6275 | (conditional-float-mul-with-add cfmadds add FRi FRj FRk OP_6F OPE4_0 "conditional mul with add, single") |
| 6276 | (conditional-float-mul-with-add cfmsubs sub FRi FRj FRk OP_6F OPE4_1 "conditional mul with sub, single") |
| 6277 | |
| 6278 | (define-pmacro (ne-float-mul-with-add name add_sub arg1 arg2 targ op ope comment) |
| 6279 | (dni name |
| 6280 | (comment) |
| 6281 | ((UNIT FMALL) (FR500-MAJOR F-5) (MACH frv) NON-EXCEPTING) |
| 6282 | (.str name "$pack $" arg1 ",$" arg2 ",$" targ) |
| 6283 | (+ pack targ op arg1 ope arg2) |
| 6284 | (sequence () |
| 6285 | (c-call VOID "@cpu@_set_ne_index" (index-of targ)) |
| 6286 | (set targ (add_sub (mul arg1 arg2) targ))) |
| 6287 | ((fr500 (unit u-float-dual-arith))) |
| 6288 | ) |
| 6289 | ) |
| 6290 | |
| 6291 | (ne-float-mul-with-add nfmadds add FRi FRj FRk OP_79 OPE1_2B "non excepting mul with add, single") |
| 6292 | (ne-float-mul-with-add nfmsubs sub FRi FRj FRk OP_79 OPE1_2C "non excepting mul with sub, single") |
| 6293 | |
| 6294 | (define-pmacro (float-parallel-mul-add-semantics cond add_sub arg1 arg2 targ) |
| 6295 | (if cond |
| 6296 | (sequence () |
| 6297 | (set targ (mul arg1 arg2)) |
| 6298 | (set (nextreg h-fr targ 1) |
| 6299 | (add_sub (nextreg h-fr arg1 1) (nextreg h-fr arg2 1))))) |
| 6300 | ) |
| 6301 | |
| 6302 | (define-pmacro (float-parallel-mul-add |
| 6303 | name add_sub arg1 arg2 targ op ope comment) |
| 6304 | (dni name |
| 6305 | (comment) |
| 6306 | ((UNIT FM01) (FR500-MAJOR F-5) (MACH simple,tomcat,fr500,frv)) |
| 6307 | (.str name "$pack $" arg1 ",$" arg2 ",$" targ) |
| 6308 | (+ pack targ op arg1 ope arg2) |
| 6309 | (float-parallel-mul-add-semantics 1 add_sub arg1 arg2 targ) |
| 6310 | ((fr500 (unit u-float-dual-arith))) |
| 6311 | ) |
| 6312 | ) |
| 6313 | |
| 6314 | (float-parallel-mul-add fmas add FRi FRj FRk OP_79 OPE1_0E "parallel mul/add, single") |
| 6315 | (float-parallel-mul-add fmss sub FRi FRj FRk OP_79 OPE1_0F "parallel mul/sub, single") |
| 6316 | |
| 6317 | (define-pmacro (float-dual-parallel-mul-add-semantics add_sub arg1 arg2 targ) |
| 6318 | (sequence () |
| 6319 | (set targ (mul arg1 arg2)) |
| 6320 | (set (nextreg h-fr targ 1) |
| 6321 | (add_sub (nextreg h-fr arg1 1) (nextreg h-fr arg2 1))) |
| 6322 | (set (nextreg h-fr targ 2) |
| 6323 | (mul (nextreg h-fr arg1 2) (nextreg h-fr arg2 2))) |
| 6324 | (set (nextreg h-fr targ 3) |
| 6325 | (add_sub (nextreg h-fr arg1 3) (nextreg h-fr arg2 3)))) |
| 6326 | ) |
| 6327 | |
| 6328 | (define-pmacro (float-dual-parallel-mul-add |
| 6329 | name add_sub arg1 arg2 targ op ope comment) |
| 6330 | (dni name |
| 6331 | (comment) |
| 6332 | ((UNIT FM01) (FR500-MAJOR F-5) (MACH frv)) |
| 6333 | (.str name "$pack $" arg1 ",$" arg2 ",$" targ) |
| 6334 | (+ pack targ op arg1 ope arg2) |
| 6335 | (float-dual-parallel-mul-add-semantics add_sub arg1 arg2 targ) |
| 6336 | () |
| 6337 | ) |
| 6338 | ) |
| 6339 | |
| 6340 | (float-dual-parallel-mul-add fdmas add FRi FRj FRk OP_79 OPE1_1C "dual parallel mul/add, single") |
| 6341 | (float-dual-parallel-mul-add fdmss sub FRi FRj FRk OP_79 OPE1_1D "dual parallel mul/sub, single") |
| 6342 | |
| 6343 | (define-pmacro (ne-float-dual-parallel-mul-add-semantics add_sub arg1 arg2 targ) |
| 6344 | (sequence () |
| 6345 | (c-call VOID "@cpu@_set_ne_index" (index-of targ)) |
| 6346 | (c-call VOID "@cpu@_set_ne_index" (add (index-of targ) 1)) |
| 6347 | (c-call VOID "@cpu@_set_ne_index" (add (index-of targ) 2)) |
| 6348 | (c-call VOID "@cpu@_set_ne_index" (add (index-of targ) 3)) |
| 6349 | (set targ (mul arg1 arg2)) |
| 6350 | (set (nextreg h-fr targ 1) |
| 6351 | (add_sub (nextreg h-fr arg1 1) (nextreg h-fr arg2 1))) |
| 6352 | (set (nextreg h-fr targ 2) |
| 6353 | (mul (nextreg h-fr arg1 2) (nextreg h-fr arg2 2))) |
| 6354 | (set (nextreg h-fr targ 3) |
| 6355 | (add_sub (nextreg h-fr arg1 3) (nextreg h-fr arg2 3)))) |
| 6356 | ) |
| 6357 | |
| 6358 | (define-pmacro (ne-float-dual-parallel-mul-add |
| 6359 | name add_sub arg1 arg2 targ op ope comment) |
| 6360 | (dni name |
| 6361 | (comment) |
| 6362 | ((UNIT FM01) (FR500-MAJOR F-5) (MACH frv)) |
| 6363 | (.str name "$pack $" arg1 ",$" arg2 ",$" targ) |
| 6364 | (+ pack targ op arg1 ope arg2) |
| 6365 | (ne-float-dual-parallel-mul-add-semantics add_sub arg1 arg2 targ) |
| 6366 | () |
| 6367 | ) |
| 6368 | ) |
| 6369 | |
| 6370 | (ne-float-dual-parallel-mul-add nfdmas add FRi FRj FRk OP_79 OPE1_3C "non excepting dual parallel mul/add, single") |
| 6371 | (ne-float-dual-parallel-mul-add nfdmss sub FRi FRj FRk OP_79 OPE1_3D "non excepting dual parallel mul/sub, single") |
| 6372 | |
| 6373 | (define-pmacro (conditional-float-parallel-mul-add name add_sub op ope comment) |
| 6374 | (dni name |
| 6375 | (comment) |
| 6376 | ((UNIT FM01) (FR500-MAJOR F-5) CONDITIONAL (MACH simple,tomcat,fr500,frv)) |
| 6377 | (.str name "$pack $FRi,$FRj,$FRk,$CCi,$cond") |
| 6378 | (+ pack FRk op FRi CCi cond ope FRj) |
| 6379 | (float-parallel-mul-add-semantics (eq CCi (or cond 2)) |
| 6380 | add_sub FRi FRj FRk) |
| 6381 | ((fr500 (unit u-float-dual-arith))) |
| 6382 | ) |
| 6383 | ) |
| 6384 | |
| 6385 | (conditional-float-parallel-mul-add cfmas add OP_6F OPE4_2 "conditional parallel mul/add, single") |
| 6386 | (conditional-float-parallel-mul-add cfmss sub OP_6F OPE4_3 "conditional parallel mul/sub, single") |
| 6387 | |
| 6388 | (define-pmacro (float-parallel-mul-add-double-semantics add_sub arg1 arg2 targ) |
| 6389 | (sequence () |
| 6390 | (set targ (ftrunc SF (mul DF (fext DF arg1) (fext DF arg2)))) |
| 6391 | (set (nextreg h-fr targ 1) |
| 6392 | (ftrunc SF (add_sub DF |
| 6393 | (fext DF (nextreg h-fr arg1 1)) |
| 6394 | (fext DF (nextreg h-fr arg2 1)))))) |
| 6395 | ) |
| 6396 | |
| 6397 | (define-pmacro (float-parallel-mul-add-double |
| 6398 | name add_sub arg1 arg2 targ op ope comment) |
| 6399 | (dni name |
| 6400 | (comment) |
| 6401 | ((UNIT FM01) (FR500-MAJOR F-5) (MACH frv)) |
| 6402 | (.str name "$pack $" arg1 ",$" arg2 ",$" targ) |
| 6403 | (+ pack targ op arg1 ope arg2) |
| 6404 | (float-parallel-mul-add-double-semantics add_sub arg1 arg2 targ) |
| 6405 | () |
| 6406 | ) |
| 6407 | ) |
| 6408 | |
| 6409 | (float-parallel-mul-add-double fmad add FRi FRj FRk OP_7A OPE1_0E "parallel mul/add, double") |
| 6410 | (float-parallel-mul-add-double fmsd sub FRi FRj FRk OP_7A OPE1_0F "parallel mul/sub, double") |
| 6411 | |
| 6412 | (define-pmacro (ne-float-parallel-mul-add name add_sub op ope comment) |
| 6413 | (dni name |
| 6414 | (comment) |
| 6415 | ((UNIT FM01) (FR500-MAJOR F-5) (MACH simple,tomcat,fr500,frv)) |
| 6416 | (.str name "$pack $FRi,$FRj,$FRk") |
| 6417 | (+ pack FRk op FRi ope FRj) |
| 6418 | (sequence () |
| 6419 | (c-call VOID "@cpu@_set_ne_index" (index-of FRk)) |
| 6420 | (set FRk (mul FRi FRj)) |
| 6421 | (c-call VOID "@cpu@_set_ne_index" (add (index-of FRk) 1)) |
| 6422 | (set (nextreg h-fr FRk 1) |
| 6423 | (add_sub (nextreg h-fr FRi 1) (nextreg h-fr FRj 1)))) |
| 6424 | ((fr500 (unit u-float-dual-arith))) |
| 6425 | ) |
| 6426 | ) |
| 6427 | |
| 6428 | (ne-float-parallel-mul-add nfmas add OP_79 OPE1_2E "ne parallel mul/add,single") |
| 6429 | (ne-float-parallel-mul-add nfmss sub OP_79 OPE1_2F "ne parallel mul/sub,single") |
| 6430 | |
| 6431 | (define-pmacro (float-dual-arith name attr oper1 oper2 op ope comment) |
| 6432 | (dni name |
| 6433 | (comment) |
| 6434 | (.splice (UNIT FM01) (.unsplice attr)) |
| 6435 | (.str name "$pack $FRi,$FRj,$FRk") |
| 6436 | (+ pack FRk op FRi ope FRj) |
| 6437 | (sequence () |
| 6438 | (set FRk (oper1 FRi FRj)) |
| 6439 | (set (nextreg h-fr FRk 1) |
| 6440 | (oper2 (nextreg h-fr FRi 1) (nextreg h-fr FRj 1)))) |
| 6441 | ((fr500 (unit u-float-dual-arith))) |
| 6442 | ) |
| 6443 | ) |
| 6444 | |
| 6445 | (float-dual-arith fdadds ((FR500-MAJOR F-6) (MACH simple,tomcat,fr500,frv)) add add OP_79 OPE1_16 "dual add, single") |
| 6446 | (float-dual-arith fdsubs ((FR500-MAJOR F-6) (MACH simple,tomcat,fr500,frv)) sub sub OP_79 OPE1_17 "dual sub, single") |
| 6447 | (float-dual-arith fdmuls ((FR500-MAJOR F-7) (MACH simple,tomcat,fr500,frv)) mul mul OP_79 OPE1_18 "dual mul, single") |
| 6448 | (float-dual-arith fddivs ((FR500-MAJOR F-7) (MACH frv)) div div OP_79 OPE1_19 "dual div,single") |
| 6449 | (float-dual-arith fdsads ((FR500-MAJOR F-6) (MACH simple,tomcat,fr500,frv)) add sub OP_79 OPE1_1E "dual add/sub, single") |
| 6450 | |
| 6451 | (dni fdmulcs |
| 6452 | "Float dual cross multiply single" |
| 6453 | ((UNIT FM01) (FR500-MAJOR F-7) (MACH simple,tomcat,fr500,frv)) |
| 6454 | "fdmulcs$pack $FRi,$FRj,$FRk" |
| 6455 | (+ pack FRk OP_79 FRi OPE1_1F FRj) |
| 6456 | (sequence () |
| 6457 | (set FRk (mul FRi (nextreg h-fr FRj 1))) |
| 6458 | (set (nextreg h-fr FRk 1) (mul (nextreg h-fr FRi 1) FRj))) |
| 6459 | ((fr500 (unit u-float-dual-arith))) |
| 6460 | ) |
| 6461 | |
| 6462 | (dni nfdmulcs |
| 6463 | "NE float dual cross multiply single" |
| 6464 | ((UNIT FM01) (FR500-MAJOR F-7) (MACH simple,tomcat,fr500,frv)) |
| 6465 | "nfdmulcs$pack $FRi,$FRj,$FRk" |
| 6466 | (+ pack FRk OP_79 FRi OPE1_3F FRj) |
| 6467 | (sequence () |
| 6468 | (c-call VOID "@cpu@_set_ne_index" (index-of FRk)) |
| 6469 | (set FRk (mul FRi (nextreg h-fr FRj 1))) |
| 6470 | (c-call VOID "@cpu@_set_ne_index" (add (index-of FRk) 1)) |
| 6471 | (set (nextreg h-fr FRk 1) (mul (nextreg h-fr FRi 1) FRj))) |
| 6472 | ((fr500 (unit u-float-dual-arith))) |
| 6473 | ) |
| 6474 | |
| 6475 | (define-pmacro (ne-float-dual-arith name attr oper1 oper2 op ope comment) |
| 6476 | (dni name |
| 6477 | (comment) |
| 6478 | (.splice (UNIT FM01) (.unsplice attr)) |
| 6479 | (.str name "$pack $FRi,$FRj,$FRk") |
| 6480 | (+ pack FRk op FRi ope FRj) |
| 6481 | (sequence () |
| 6482 | (c-call VOID "@cpu@_set_ne_index" (index-of FRk)) |
| 6483 | (set FRk (oper1 FRi FRj)) |
| 6484 | (c-call VOID "@cpu@_set_ne_index" (add (index-of FRk) 1)) |
| 6485 | (set (nextreg h-fr FRk 1) |
| 6486 | (oper2 (nextreg h-fr FRi 1) (nextreg h-fr FRj 1)))) |
| 6487 | ((fr500 (unit u-float-dual-arith))) |
| 6488 | ) |
| 6489 | ) |
| 6490 | |
| 6491 | (ne-float-dual-arith nfdadds ((FR500-MAJOR F-6) (MACH simple,tomcat,fr500,frv)) add add OP_79 OPE1_36 "ne dual add, single") |
| 6492 | (ne-float-dual-arith nfdsubs ((FR500-MAJOR F-6) (MACH simple,tomcat,fr500,frv)) sub sub OP_79 OPE1_37 "ne dual sub, single") |
| 6493 | (ne-float-dual-arith nfdmuls ((FR500-MAJOR F-7) (MACH simple,tomcat,fr500,frv)) mul mul OP_79 OPE1_38 "ne dual mul, single") |
| 6494 | (ne-float-dual-arith nfddivs ((FR500-MAJOR F-7) (MACH frv)) div div OP_79 OPE1_39 "ne dual div,single") |
| 6495 | (ne-float-dual-arith nfdsads ((FR500-MAJOR F-6) (MACH simple,tomcat,fr500,frv)) add sub OP_79 OPE1_3E "ne dual add/sub, single") |
| 6496 | |
| 6497 | (dni nfdcmps |
| 6498 | "non-excepting dual float compare" |
| 6499 | ((UNIT FM01) (FR500-MAJOR F-6) (MACH simple,tomcat,frv)) |
| 6500 | "nfdcmps$pack $FRi,$FRj,$FCCi_2" |
| 6501 | (+ pack (cond-null) FCCi_2 OP_79 FRi OPE1_3A FRj) |
| 6502 | (sequence () |
| 6503 | (c-call VOID "@cpu@_set_ne_index" (index-of FRk)) |
| 6504 | (compare-and-set-fcc FRi FRj FCCi_2) |
| 6505 | (c-call VOID "@cpu@_set_ne_index" (add (index-of FRk) 1)) |
| 6506 | (compare-and-set-fcc (nextreg h-fr FRi 1) (nextreg h-fr FRj 1) |
| 6507 | (nextreg h-fccr FCCi_2 1))) |
| 6508 | ((fr500 (unit u-float-dual-compare))) |
| 6509 | ) |
| 6510 | |
| 6511 | ; Media Instructions |
| 6512 | ; |
| 6513 | (define-pmacro (halfword hilo arg offset) |
| 6514 | (reg (.sym h-fr_ hilo) (add (index-of arg) offset))) |
| 6515 | |
| 6516 | (dni mhsetlos |
| 6517 | "Media set lower signed 12 bits" |
| 6518 | ((UNIT FMALL) (MACH fr400) (FR400-MAJOR M-1)) |
| 6519 | "mhsetlos$pack $u12,$FRklo" |
| 6520 | (+ pack FRklo OP_78 OPE1_20 u12) |
| 6521 | (set FRklo u12) |
| 6522 | ((fr400 (unit u-media-hilo))) |
| 6523 | ) |
| 6524 | |
| 6525 | (dni mhsethis |
| 6526 | "Media set upper signed 12 bits" |
| 6527 | ((UNIT FMALL) (MACH fr400) (FR400-MAJOR M-1)) |
| 6528 | "mhsethis$pack $u12,$FRkhi" |
| 6529 | (+ pack FRkhi OP_78 OPE1_22 u12) |
| 6530 | (set FRkhi u12) |
| 6531 | ((fr400 (unit u-media-hilo))) |
| 6532 | ) |
| 6533 | |
| 6534 | (dni mhdsets |
| 6535 | "Media dual set halfword signed 12 bits" |
| 6536 | ((UNIT FMALL) (MACH fr400) (FR400-MAJOR M-1)) |
| 6537 | "mhdsets$pack $u12,$FRintk" |
| 6538 | (+ pack FRintk OP_78 OPE1_24 u12) |
| 6539 | (sequence () |
| 6540 | ; hack to get FRintk passed to modelling functions |
| 6541 | (set FRintk (c-raw-call SI "frv_ref_SI" FRintk)) |
| 6542 | (set (halfword hi FRintk 0) u12) |
| 6543 | (set (halfword lo FRintk 0) u12)) |
| 6544 | ((fr400 (unit u-media-1))) |
| 6545 | ) |
| 6546 | |
| 6547 | (define-pmacro (set-5-semantics target value) |
| 6548 | (sequence ((HI tmp)) |
| 6549 | (set tmp target) |
| 6550 | (set tmp (and tmp #x07ff)) |
| 6551 | (set tmp (or tmp (sll (and s5 #x1f) 11))) |
| 6552 | (set target tmp)) |
| 6553 | ) |
| 6554 | |
| 6555 | (define-pmacro (media-set-5 name hilo op ope comment) |
| 6556 | (dni name |
| 6557 | (comment) |
| 6558 | ((UNIT FMALL) (MACH fr400) (FR400-MAJOR M-1)) |
| 6559 | (.str name "$pack $s5,$FRk" hilo) |
| 6560 | (+ pack (.sym FRk hilo) op (FRi-null) ope (misc-null-11) s5) |
| 6561 | (set-5-semantics (.sym FRk hilo) s5) |
| 6562 | ((fr400 (unit u-media-hilo))) |
| 6563 | ) |
| 6564 | ) |
| 6565 | |
| 6566 | (media-set-5 mhsetloh lo OP_78 OPE1_21 "Media set upper 5 bits lo") |
| 6567 | (media-set-5 mhsethih hi OP_78 OPE1_23 "Media set upper 5 bits hi") |
| 6568 | |
| 6569 | (dni mhdseth |
| 6570 | "Media dual set halfword upper 5 bits" |
| 6571 | ((UNIT FMALL) (MACH fr400) (FR400-MAJOR M-1)) |
| 6572 | "mhdseth$pack $s5,$FRintk" |
| 6573 | (+ pack FRintk OP_78 (FRi-null) OPE1_25 (misc-null-11) s5) |
| 6574 | (sequence () |
| 6575 | ; hack to get FRintk passed to modelling functions |
| 6576 | (set FRintk (c-raw-call SI "frv_ref_SI" FRintk)) |
| 6577 | (set-5-semantics (halfword hi FRintk 0) s5) |
| 6578 | (set-5-semantics (halfword lo FRintk 0) s5)) |
| 6579 | ((fr400 (unit u-media-1))) |
| 6580 | ) |
| 6581 | |
| 6582 | (define-pmacro (media-logic-r-r name operation op ope comment) |
| 6583 | (dni name |
| 6584 | (comment) |
| 6585 | ((UNIT FMALL) (FR500-MAJOR M-1) (FR400-MAJOR M-1)) |
| 6586 | (.str name "$pack $FRinti,$FRintj,$FRintk") |
| 6587 | (+ pack FRintk op FRinti ope FRintj) |
| 6588 | (set FRintk (operation FRinti FRintj)) |
| 6589 | ((fr400 (unit u-media-1)) |
| 6590 | (fr500 (unit u-media))) |
| 6591 | ) |
| 6592 | ) |
| 6593 | |
| 6594 | (media-logic-r-r mand and OP_7B OPE1_00 "and reg/reg") |
| 6595 | (media-logic-r-r mor or OP_7B OPE1_01 "or reg/reg") |
| 6596 | (media-logic-r-r mxor xor OP_7B OPE1_02 "xor reg/reg") |
| 6597 | |
| 6598 | (define-pmacro (conditional-media-logic name operation op ope comment) |
| 6599 | (dni name |
| 6600 | (comment) |
| 6601 | ((UNIT FMALL) (FR500-MAJOR M-1) (FR400-MAJOR M-1) CONDITIONAL) |
| 6602 | (.str name "$pack $FRinti,$FRintj,$FRintk,$CCi,$cond") |
| 6603 | (+ pack FRintk op FRinti CCi cond ope FRintj) |
| 6604 | (if (eq CCi (or cond 2)) |
| 6605 | (set FRintk (operation FRinti FRintj))) |
| 6606 | ((fr400 (unit u-media-1)) |
| 6607 | (fr500 (unit u-media))) |
| 6608 | ) |
| 6609 | ) |
| 6610 | |
| 6611 | (conditional-media-logic cmand and OP_70 OPE4_0 "conditional and reg/reg") |
| 6612 | (conditional-media-logic cmor or OP_70 OPE4_1 "conditional or reg/reg") |
| 6613 | (conditional-media-logic cmxor xor OP_70 OPE4_2 "conditional xor reg/reg") |
| 6614 | |
| 6615 | (dni mnot |
| 6616 | ("mnot") |
| 6617 | ((UNIT FMALL) (FR500-MAJOR M-1) (FR400-MAJOR M-1)) |
| 6618 | ("mnot$pack $FRintj,$FRintk") |
| 6619 | (+ pack FRintk OP_7B (rs-null) OPE1_03 FRintj) |
| 6620 | (set FRintk (inv FRintj)) |
| 6621 | ((fr400 (unit u-media-1)) |
| 6622 | (fr500 (unit u-media))) |
| 6623 | ) |
| 6624 | |
| 6625 | (dni cmnot |
| 6626 | ("cmnot") |
| 6627 | ((UNIT FMALL) (FR500-MAJOR M-1) (FR400-MAJOR M-1) CONDITIONAL) |
| 6628 | ("cmnot$pack $FRintj,$FRintk,$CCi,$cond") |
| 6629 | (+ pack FRintk OP_70 (rs-null) CCi cond OPE4_3 FRintj) |
| 6630 | (if (eq CCi (or cond 2)) |
| 6631 | (set FRintk (inv FRintj))) |
| 6632 | ((fr400 (unit u-media-1)) |
| 6633 | (fr500 (unit u-media))) |
| 6634 | ) |
| 6635 | |
| 6636 | (define-pmacro (media-rotate-r-r name operation op ope comment) |
| 6637 | (dni name |
| 6638 | (comment) |
| 6639 | ((UNIT FM01) (FR500-MAJOR M-2) (FR400-MAJOR M-1)) |
| 6640 | (.str name "$pack $FRinti,$u6,$FRintk") |
| 6641 | (+ pack FRintk op FRinti ope u6) |
| 6642 | (set FRintk (operation FRinti (and u6 #x1f))) |
| 6643 | ((fr400 (unit u-media-3)) |
| 6644 | (fr500 (unit u-media))) |
| 6645 | ) |
| 6646 | ) |
| 6647 | |
| 6648 | (media-rotate-r-r mrotli rol OP_7B OPE1_04 "rotate left reg/reg") |
| 6649 | (media-rotate-r-r mrotri ror OP_7B OPE1_05 "rotate right reg/reg") |
| 6650 | |
| 6651 | (define-pmacro (media-cut-r-r name arg op ope comment) |
| 6652 | (dni name |
| 6653 | (comment) |
| 6654 | ((UNIT FM01) (FR500-MAJOR M-2) (FR400-MAJOR M-2)) |
| 6655 | (.str name "$pack $FRinti,$" arg ",$FRintk") |
| 6656 | (+ pack FRintk op FRinti ope arg) |
| 6657 | (set FRintk (c-call SI "@cpu@_cut" FRinti (nextreg h-fr_int FRinti 1) arg)) |
| 6658 | ((fr400 (unit u-media-3)) |
| 6659 | (fr500 (unit u-media))) |
| 6660 | ) |
| 6661 | ) |
| 6662 | |
| 6663 | (media-cut-r-r mwcut FRintj OP_7B OPE1_06 "media cut") |
| 6664 | (media-cut-r-r mwcuti u6 OP_7B OPE1_07 "media cut") |
| 6665 | |
| 6666 | (define-pmacro (media-cut-acc name arg op ope comment) |
| 6667 | (dni name |
| 6668 | (comment) |
| 6669 | ((UNIT FM01) (FR500-MAJOR M-2) (FR400-MAJOR M-1)) |
| 6670 | (.str name "$pack $ACC40Si,$" arg ",$FRintk") |
| 6671 | (+ pack FRintk op ACC40Si ope arg) |
| 6672 | (set FRintk (c-call SI "@cpu@_media_cut" ACC40Si arg)) |
| 6673 | ((fr400 (unit u-media-4)) |
| 6674 | (fr500 (unit u-media))) |
| 6675 | ) |
| 6676 | ) |
| 6677 | |
| 6678 | (media-cut-acc mcut FRintj OP_7B OPE1_2C "media accumulator cut reg") |
| 6679 | (media-cut-acc mcuti s6 OP_7B OPE1_2E "media accumulator cut immed") |
| 6680 | |
| 6681 | (define-pmacro (media-cut-acc-ss name arg op ope comment) |
| 6682 | (dni name |
| 6683 | (comment) |
| 6684 | ((UNIT FM01) (FR500-MAJOR M-2) (FR400-MAJOR M-1)) |
| 6685 | (.str name "$pack $ACC40Si,$" arg ",$FRintk") |
| 6686 | (+ pack FRintk op ACC40Si ope arg) |
| 6687 | (set FRintk (c-call SI "@cpu@_media_cut_ss" ACC40Si arg)) |
| 6688 | ((fr400 (unit u-media-4)) |
| 6689 | (fr500 (unit u-media))) |
| 6690 | ) |
| 6691 | ) |
| 6692 | |
| 6693 | (media-cut-acc-ss mcutss FRintj OP_7B OPE1_2D "media accumulator cut reg with saturation") |
| 6694 | (media-cut-acc-ss mcutssi s6 OP_7B OPE1_2F "media accumulator cut immed with saturation") |
| 6695 | |
| 6696 | ; Dual Media Instructions |
| 6697 | ; |
| 6698 | (define-pmacro (register-unaligned register alignment) |
| 6699 | (and (index-of register) (sub alignment 1)) |
| 6700 | ) |
| 6701 | |
| 6702 | (dni mdcutssi |
| 6703 | "Media dual cut with signed saturation" |
| 6704 | ((UNIT FMLOW) (MACH fr400) (FR400-MAJOR M-2)) |
| 6705 | "mdcutssi$pack $ACC40Si,$s6,$FRintkeven" |
| 6706 | (+ pack FRintkeven OP_78 ACC40Si OPE1_0E s6) |
| 6707 | (if (register-unaligned ACC40Si 2) |
| 6708 | (c-call VOID "@cpu@_media_acc_not_aligned") |
| 6709 | (if (register-unaligned FRintkeven 2) |
| 6710 | (c-call VOID "@cpu@_media_register_not_aligned") |
| 6711 | (sequence () |
| 6712 | (set FRintkeven (c-call SI "@cpu@_media_cut_ss" ACC40Si s6)) |
| 6713 | (set (nextreg h-fr_int FRintkeven 1) |
| 6714 | (c-call SI "@cpu@_media_cut_ss" |
| 6715 | (nextreg h-acc40S ACC40Si 1) s6))))) |
| 6716 | ((fr400 (unit u-media-4-acc-dual |
| 6717 | (out FRintk FRintkeven)))) |
| 6718 | ) |
| 6719 | |
| 6720 | ; The (add (xxxx) (mul arg 0)) is a hack to get a reference to arg generated |
| 6721 | ; so it will be passed to the unit modelers. YUCK!!!!! |
| 6722 | (define-pmacro (extract-hilo reg1 off1 reg2 off2 arg1hi arg1lo arg2hi arg2lo) |
| 6723 | (sequence () |
| 6724 | (set arg1hi (add (halfword hi reg1 off1) (mul reg1 0))) |
| 6725 | (set arg1lo (add (halfword lo reg1 off1) (mul reg1 0))) |
| 6726 | (set arg2hi (add (halfword hi reg2 off2) (mul reg2 0))) |
| 6727 | (set arg2lo (add (halfword lo reg2 off2) (mul reg2 0)))) |
| 6728 | ) |
| 6729 | |
| 6730 | (dni maveh |
| 6731 | "Media dual average" |
| 6732 | ((UNIT FMALL) (FR500-MAJOR M-1) (FR400-MAJOR M-1)) |
| 6733 | "maveh$pack $FRinti,$FRintj,$FRintk" |
| 6734 | (+ pack FRintk OP_7B FRinti OPE1_08 FRintj) |
| 6735 | (set FRintk (c-call SI "@cpu@_media_average" FRinti FRintj)) |
| 6736 | ((fr400 (unit u-media-1)) |
| 6737 | (fr500 (unit u-media))) |
| 6738 | ) |
| 6739 | |
| 6740 | (define-pmacro (media-dual-shift name operation op ope profile comment) |
| 6741 | (dni name |
| 6742 | (comment) |
| 6743 | ((UNIT FM01) (FR500-MAJOR M-2) (FR400-MAJOR M-1)) |
| 6744 | (.str name "$pack $FRinti,$u6,$FRintk") |
| 6745 | (+ pack FRintk op FRinti ope u6) |
| 6746 | (sequence () |
| 6747 | ; hack to get these referenced for profiling |
| 6748 | (set FRinti (c-raw-call SI "frv_ref_SI" FRinti)) |
| 6749 | (set FRintk (c-raw-call SI "frv_ref_SI" FRintk)) |
| 6750 | (set (halfword hi FRintk 0) |
| 6751 | (operation (halfword hi FRinti 0) (and u6 #xf))) |
| 6752 | (set (halfword lo FRintk 0) |
| 6753 | (operation (halfword lo FRinti 0) (and u6 #xf)))) |
| 6754 | profile |
| 6755 | ) |
| 6756 | ) |
| 6757 | |
| 6758 | (media-dual-shift msllhi sll OP_7B OPE1_09 |
| 6759 | ((fr400 (unit u-media-3)) (fr500 (unit u-media))) |
| 6760 | "Media dual shift left logical") |
| 6761 | (media-dual-shift msrlhi srl OP_7B OPE1_0A |
| 6762 | ((fr400 (unit u-media-3)) (fr500 (unit u-media))) |
| 6763 | "Media dual shift right logical") |
| 6764 | (media-dual-shift msrahi sra OP_7B OPE1_0B |
| 6765 | ((fr400 (unit u-media-6)) (fr500 (unit u-media))) |
| 6766 | "Media dual shift right arithmetic") |
| 6767 | |
| 6768 | (define-pmacro (media-dual-word-rotate-r-r name operation op ope comment) |
| 6769 | (dni name |
| 6770 | (comment) |
| 6771 | ((UNIT FMLOW) (MACH fr400) (FR400-MAJOR M-2)) |
| 6772 | (.str name "$pack $FRintieven,$s6,$FRintkeven") |
| 6773 | (+ pack FRintkeven op FRintieven ope s6) |
| 6774 | (if (orif (register-unaligned FRintieven 2) |
| 6775 | (register-unaligned FRintkeven 2)) |
| 6776 | (c-call VOID "@cpu@_media_register_not_aligned") |
| 6777 | (sequence () |
| 6778 | (set FRintkeven (operation FRintieven (and s6 #x1f))) |
| 6779 | (set (nextreg h-fr_int FRintkeven 1) |
| 6780 | (operation (nextreg h-fr_int FRintieven 1) |
| 6781 | (and s6 #x1f))))) |
| 6782 | ((fr400 (unit u-media-3-quad |
| 6783 | (in FRinti FRintieven) |
| 6784 | (out FRintk FRintkeven)))) |
| 6785 | ) |
| 6786 | ) |
| 6787 | |
| 6788 | (media-dual-word-rotate-r-r mdrotli rol OP_78 OPE1_0B "rotate left reg/reg") |
| 6789 | |
| 6790 | (dni mcplhi |
| 6791 | "Media dual couple, halfword" |
| 6792 | ((UNIT FMLOW) (MACH fr400) (FR400-MAJOR M-2)) |
| 6793 | "mcplhi$pack $FRinti,$u6,$FRintk" |
| 6794 | (+ pack FRintk OP_78 FRinti OPE1_0C u6) |
| 6795 | (sequence ((HI arg1) (HI arg2) (HI shift)) |
| 6796 | (set FRinti (c-raw-call SI "frv_ref_SI" FRinti)) |
| 6797 | (set FRintk (c-raw-call SI "frv_ref_SI" FRintk)) |
| 6798 | (set shift (and u6 #xf)) |
| 6799 | (set arg1 (sll (halfword hi FRinti 0) shift)) |
| 6800 | (if (ne shift 0) |
| 6801 | (sequence () |
| 6802 | (set arg2 (halfword hi FRinti 1)) |
| 6803 | (set arg2 (srl HI (sll HI arg2 (sub 15 shift)) |
| 6804 | (sub 15 shift))) |
| 6805 | (set arg1 (or HI arg1 arg2)))) |
| 6806 | (set (halfword hi FRintk 0) arg1)) |
| 6807 | ((fr400 (unit u-media-3-dual))) |
| 6808 | ) |
| 6809 | |
| 6810 | (dni mcpli |
| 6811 | "Media dual couple, word" |
| 6812 | ((UNIT FMLOW) (MACH fr400) (FR400-MAJOR M-2)) |
| 6813 | "mcpli$pack $FRinti,$u6,$FRintk" |
| 6814 | (+ pack FRintk OP_78 FRinti OPE1_0D u6) |
| 6815 | (sequence ((SI tmp) (SI shift)) |
| 6816 | (set shift (and u6 #x1f)) |
| 6817 | (set tmp (sll FRinti shift)) |
| 6818 | (if (ne shift 0) |
| 6819 | (sequence ((SI tmp1)) |
| 6820 | (set tmp1 (srl (sll (nextreg h-fr_int FRinti 1) |
| 6821 | (sub 31 shift)) |
| 6822 | (sub 31 shift))) |
| 6823 | (set tmp (or tmp tmp1)))) |
| 6824 | (set FRintk tmp)) |
| 6825 | ((fr400 (unit u-media-3-dual))) |
| 6826 | ) |
| 6827 | |
| 6828 | (define-pmacro (saturate arg max min result) |
| 6829 | (if (gt arg max) |
| 6830 | (set result max) |
| 6831 | (if (lt arg min) |
| 6832 | (set result min) |
| 6833 | (set result arg))) |
| 6834 | ) |
| 6835 | |
| 6836 | (dni msaths |
| 6837 | "Media dual saturation signed" |
| 6838 | ((UNIT FMALL) (FR500-MAJOR M-1) (FR400-MAJOR M-1)) |
| 6839 | "msaths$pack $FRinti,$FRintj,$FRintk" |
| 6840 | (+ pack FRintk OP_7B FRinti OPE1_0C FRintj) |
| 6841 | (sequence ((HI argihi) (HI argilo) (HI argjhi) (HI argjlo)) |
| 6842 | (extract-hilo FRinti 0 FRintj 0 argihi argilo argjhi argjlo) |
| 6843 | (saturate argihi argjhi (inv argjhi) (halfword hi FRintk 0)) |
| 6844 | (saturate argilo argjlo (inv argjlo) (halfword lo FRintk 0))) |
| 6845 | ((fr400 (unit u-media-1)) |
| 6846 | (fr500 (unit u-media))) |
| 6847 | ) |
| 6848 | |
| 6849 | (dni mqsaths |
| 6850 | "Media quad saturation signed" |
| 6851 | ((UNIT FMALL) (MACH fr400) (FR400-MAJOR M-1)) |
| 6852 | "mqsaths$pack $FRintieven,$FRintjeven,$FRintkeven" |
| 6853 | (+ pack FRintkeven OP_78 FRintieven OPE1_0F FRintjeven) |
| 6854 | (if (orif (register-unaligned FRintieven 2) |
| 6855 | (orif (register-unaligned FRintjeven 2) |
| 6856 | (register-unaligned FRintkeven 2))) |
| 6857 | (c-call VOID "@cpu@_media_register_not_aligned") |
| 6858 | (sequence ((HI argihi) (HI argilo) (HI argjhi) (HI argjlo)) |
| 6859 | ; hack to get FRintkeven referenced as a target for profiling |
| 6860 | (set FRintkeven (c-raw-call SI "frv_ref_SI" FRintkeven)) |
| 6861 | (extract-hilo FRintieven 0 FRintjeven 0 argihi argilo argjhi argjlo) |
| 6862 | (saturate argihi argjhi (inv argjhi) (halfword hi FRintkeven 0)) |
| 6863 | (saturate argilo argjlo (inv argjlo) (halfword lo FRintkeven 0)) |
| 6864 | (extract-hilo FRintieven 1 FRintjeven 1 argihi argilo argjhi argjlo) |
| 6865 | (saturate argihi argjhi (inv argjhi) (halfword hi FRintkeven 1)) |
| 6866 | (saturate argilo argjlo (inv argjlo) (halfword lo FRintkeven 1)))) |
| 6867 | ((fr400 (unit u-media-1-quad |
| 6868 | (in FRinti FRintieven) |
| 6869 | (in FRintj FRintjeven) |
| 6870 | (out FRintk FRintkeven)))) |
| 6871 | ) |
| 6872 | |
| 6873 | (define-pmacro (saturate-unsigned arg max result) |
| 6874 | (if (gt arg max) |
| 6875 | (set result max) |
| 6876 | (set result arg)) |
| 6877 | ) |
| 6878 | |
| 6879 | (dni msathu |
| 6880 | "Media dual saturation unsigned" |
| 6881 | ((UNIT FMALL) (FR500-MAJOR M-1) (FR400-MAJOR M-1)) |
| 6882 | "msathu$pack $FRinti,$FRintj,$FRintk" |
| 6883 | (+ pack FRintk OP_7B FRinti OPE1_0D FRintj) |
| 6884 | (sequence ((UHI argihi) (UHI argilo) (UHI argjhi) (UHI argjlo)) |
| 6885 | (extract-hilo FRinti 0 FRintj 0 argihi argilo argjhi argjlo) |
| 6886 | (saturate-unsigned argihi argjhi (halfword hi FRintk 0)) |
| 6887 | (saturate-unsigned argilo argjlo (halfword lo FRintk 0))) |
| 6888 | ((fr400 (unit u-media-1)) |
| 6889 | (fr500 (unit u-media))) |
| 6890 | ) |
| 6891 | |
| 6892 | (define-pmacro (media-dual-compare name mode op ope comment) |
| 6893 | (dni name |
| 6894 | (comment) |
| 6895 | ((UNIT FMALL) (FR500-MAJOR M-1) (FR400-MAJOR M-1)) |
| 6896 | (.str name "$pack $FRinti,$FRintj,$FCCk") |
| 6897 | (+ pack (cond-null) FCCk op FRinti ope FRintj) |
| 6898 | (if (register-unaligned FCCk 2) |
| 6899 | (c-call VOID "@cpu@_media_cr_not_aligned") |
| 6900 | (sequence ((mode argihi) (mode argilo) (mode argjhi) (mode argjlo)) |
| 6901 | (extract-hilo FRinti 0 FRintj 0 |
| 6902 | argihi argilo argjhi argjlo) |
| 6903 | (compare-and-set-fcc argihi argjhi FCCk) |
| 6904 | (compare-and-set-fcc argilo argjlo (nextreg h-fccr FCCk 1)))) |
| 6905 | ; TODO - doesn't handle second FCC |
| 6906 | ((fr400 (unit u-media-7)) |
| 6907 | (fr500 (unit u-media))) |
| 6908 | ) |
| 6909 | ) |
| 6910 | |
| 6911 | (media-dual-compare mcmpsh HI OP_7B OPE1_0E "Media dual compare signed") |
| 6912 | (media-dual-compare mcmpuh UHI OP_7B OPE1_0F "Media dual compare unsigned") |
| 6913 | |
| 6914 | ; Bits for the MSR.SIE field |
| 6915 | (define-pmacro (msr-sie-nil) 0) |
| 6916 | (define-pmacro (msr-sie-fri-hi) 8) |
| 6917 | (define-pmacro (msr-sie-fri-lo) 4) |
| 6918 | (define-pmacro (msr-sie-fri-1-hi) 2) |
| 6919 | (define-pmacro (msr-sie-fri-1-lo) 1) |
| 6920 | (define-pmacro (msr-sie-acci) 8) |
| 6921 | (define-pmacro (msr-sie-acci-1) 4) |
| 6922 | (define-pmacro (msr-sie-acci-2) 2) |
| 6923 | (define-pmacro (msr-sie-acci-3) 1) |
| 6924 | |
| 6925 | (define-pmacro (saturate-v arg max min sie result) |
| 6926 | (if (gt DI arg max) |
| 6927 | (sequence () |
| 6928 | (set result max) |
| 6929 | (c-call VOID "@cpu@_media_overflow" sie)) |
| 6930 | (if (lt DI arg min) |
| 6931 | (sequence () |
| 6932 | (set result min) |
| 6933 | (c-call VOID "@cpu@_media_overflow" sie)) |
| 6934 | (set result arg))) |
| 6935 | ) |
| 6936 | |
| 6937 | (dni mabshs |
| 6938 | "Media dual absolute value, halfword" |
| 6939 | ((UNIT FMALL) (MACH fr400) (FR400-MAJOR M-1)) |
| 6940 | "mabshs$pack $FRintj,$FRintk" |
| 6941 | (+ pack FRintk OP_78 (FRi-null) OPE1_0A FRintj) |
| 6942 | (sequence ((HI arghi) (HI arglo)) |
| 6943 | (set FRintj (c-raw-call SI "frv_ref_SI" FRintj)) |
| 6944 | (set FRintk (c-raw-call SI "frv_ref_SI" FRintk)) |
| 6945 | (set arghi (halfword hi FRintj 0)) |
| 6946 | (set arglo (halfword lo FRintj 0)) |
| 6947 | (saturate-v (abs arghi) 32767 -32768 (msr-sie-fri-hi) |
| 6948 | (halfword hi FRintk 0)) |
| 6949 | (saturate-v (abs arglo) 32767 -32768 (msr-sie-fri-lo) |
| 6950 | (halfword lo FRintk 0))) |
| 6951 | ((fr400 (unit u-media-1))) |
| 6952 | ) |
| 6953 | |
| 6954 | (define-pmacro (media-arith-sat-semantics |
| 6955 | operation arg1 arg2 res mode max min sie) |
| 6956 | (sequence ((DI tmp)) |
| 6957 | (set tmp (operation arg1 arg2)) |
| 6958 | (saturate-v tmp max min sie res)) |
| 6959 | ) |
| 6960 | |
| 6961 | (define-pmacro (media-dual-arith-sat-semantics operation mode max min) |
| 6962 | (sequence ((mode argihi) (mode argilo) (mode argjhi) (mode argjlo)) |
| 6963 | (extract-hilo FRinti 0 FRintj 0 argihi argilo argjhi argjlo) |
| 6964 | (media-arith-sat-semantics operation argihi argjhi |
| 6965 | (halfword hi FRintk 0) mode max min |
| 6966 | (msr-sie-fri-hi)) |
| 6967 | (media-arith-sat-semantics operation argilo argjlo |
| 6968 | (halfword lo FRintk 0) mode max min |
| 6969 | (msr-sie-fri-lo))) |
| 6970 | ) |
| 6971 | |
| 6972 | (define-pmacro (media-dual-arith-sat name operation mode max min op ope comment) |
| 6973 | (dni name |
| 6974 | (comment) |
| 6975 | ((UNIT FMALL) (FR500-MAJOR M-1) (FR400-MAJOR M-1)) |
| 6976 | (.str name "$pack $FRinti,$FRintj,$FRintk") |
| 6977 | (+ pack FRintk op FRinti ope FRintj) |
| 6978 | (media-dual-arith-sat-semantics operation mode max min) |
| 6979 | ((fr400 (unit u-media-1)) |
| 6980 | (fr500 (unit u-media))) |
| 6981 | ) |
| 6982 | ) |
| 6983 | |
| 6984 | (media-dual-arith-sat maddhss add HI 32767 -32768 OP_7B OPE1_10 "Media dual add signed with saturation") |
| 6985 | (media-dual-arith-sat maddhus add UHI 65535 0 OP_7B OPE1_11 "Media dual add unsigned with saturation") |
| 6986 | |
| 6987 | (media-dual-arith-sat msubhss sub HI 32767 -32768 OP_7B OPE1_12 "Media dual sub signed with saturation") |
| 6988 | (media-dual-arith-sat msubhus sub UHI 65535 0 OP_7B OPE1_13 "Media dual sub unsigned with saturation") |
| 6989 | |
| 6990 | (define-pmacro (conditional-media-dual-arith-sat |
| 6991 | name operation mode max min op ope comment) |
| 6992 | (dni name |
| 6993 | (comment) |
| 6994 | ((UNIT FMALL) (FR500-MAJOR M-1) (FR400-MAJOR M-1) CONDITIONAL) |
| 6995 | (.str name "$pack $FRinti,$FRintj,$FRintk,$CCi,$cond") |
| 6996 | (+ pack FRintk op FRinti CCi cond ope FRintj) |
| 6997 | (if (eq CCi (or cond 2)) |
| 6998 | (media-dual-arith-sat-semantics operation mode max min)) |
| 6999 | ((fr400 (unit u-media-1)) |
| 7000 | (fr500 (unit u-media))) |
| 7001 | ) |
| 7002 | ) |
| 7003 | |
| 7004 | (conditional-media-dual-arith-sat cmaddhss add HI 32767 -32768 OP_71 OPE4_0 "Conditional Media dual add signed with saturation") |
| 7005 | (conditional-media-dual-arith-sat cmaddhus add UHI 65535 0 OP_71 OPE4_1 "Conditional Media dual add unsigned with saturation") |
| 7006 | |
| 7007 | (conditional-media-dual-arith-sat cmsubhss sub HI 32767 -32768 OP_71 OPE4_2 "Conditional Media dual sub signed with saturation") |
| 7008 | (conditional-media-dual-arith-sat cmsubhus sub UHI 65535 0 OP_71 OPE4_3 "Conditional Media dual sub unsigned with saturation") |
| 7009 | |
| 7010 | (define-pmacro (media-quad-arith-sat-semantics cond operation mode max min) |
| 7011 | (if (orif (register-unaligned FRintieven 2) |
| 7012 | (orif (register-unaligned FRintjeven 2) |
| 7013 | (register-unaligned FRintkeven 2))) |
| 7014 | (c-call VOID "@cpu@_media_register_not_aligned") |
| 7015 | (if cond |
| 7016 | (sequence ((mode argihi) (mode argilo) (mode argjhi) (mode argjlo)) |
| 7017 | ; hack to get FRintkeven referenced as a target for profiling |
| 7018 | (set FRintkeven (c-raw-call SI "frv_ref_SI" FRintkeven)) |
| 7019 | (extract-hilo FRintieven 0 FRintjeven 0 |
| 7020 | argihi argilo argjhi argjlo) |
| 7021 | (media-arith-sat-semantics operation argihi argjhi |
| 7022 | (halfword hi FRintkeven 0) mode |
| 7023 | max min (msr-sie-fri-hi)) |
| 7024 | (media-arith-sat-semantics operation argilo argjlo |
| 7025 | (halfword lo FRintkeven 0) mode |
| 7026 | max min (msr-sie-fri-lo)) |
| 7027 | (extract-hilo FRintieven 1 FRintjeven 1 |
| 7028 | argihi argilo argjhi argjlo) |
| 7029 | (media-arith-sat-semantics operation argihi argjhi |
| 7030 | (halfword hi FRintkeven 1) mode |
| 7031 | max min (msr-sie-fri-1-hi)) |
| 7032 | (media-arith-sat-semantics operation argilo argjlo |
| 7033 | (halfword lo FRintkeven 1) mode |
| 7034 | max min (msr-sie-fri-1-lo))))) |
| 7035 | ) |
| 7036 | |
| 7037 | (define-pmacro (media-quad-arith-sat name operation mode max min op ope comment) |
| 7038 | (dni name |
| 7039 | (comment) |
| 7040 | ((UNIT FMALL) (FR500-MAJOR M-1) (FR400-MAJOR M-2)) |
| 7041 | (.str name "$pack $FRintieven,$FRintjeven,$FRintkeven") |
| 7042 | (+ pack FRintkeven op FRintieven ope FRintjeven) |
| 7043 | (media-quad-arith-sat-semantics 1 operation mode max min) |
| 7044 | ((fr400 (unit u-media-1-quad |
| 7045 | (in FRinti FRintieven) |
| 7046 | (in FRintj FRintjeven) |
| 7047 | (out FRintk FRintkeven))) |
| 7048 | (fr500 (unit u-media-quad-arith |
| 7049 | (in FRinti FRintieven) |
| 7050 | (in FRintj FRintjeven) |
| 7051 | (out FRintk FRintkeven)))) |
| 7052 | ) |
| 7053 | ) |
| 7054 | |
| 7055 | (media-quad-arith-sat mqaddhss add HI 32767 -32768 OP_7B OPE1_18 "Media quad add signed with saturation") |
| 7056 | (media-quad-arith-sat mqaddhus add UHI 65535 0 OP_7B OPE1_19 "Media quad add unsigned with saturation") |
| 7057 | |
| 7058 | (media-quad-arith-sat mqsubhss sub HI 32767 -32768 OP_7B OPE1_1A "Media quad sub signed with saturation") |
| 7059 | (media-quad-arith-sat mqsubhus sub UHI 65535 0 OP_7B OPE1_1B "Media quad sub unsigned with saturation") |
| 7060 | |
| 7061 | (define-pmacro (conditional-media-quad-arith-sat |
| 7062 | name operation mode max min op ope comment) |
| 7063 | (dni name |
| 7064 | (comment) |
| 7065 | ((UNIT FMALL) (FR500-MAJOR M-1) (FR400-MAJOR M-2) CONDITIONAL) |
| 7066 | (.str name "$pack $FRintieven,$FRintjeven,$FRintkeven,$CCi,$cond") |
| 7067 | (+ pack FRintkeven op FRintieven CCi cond ope FRintjeven) |
| 7068 | (media-quad-arith-sat-semantics (eq CCi (or cond 2)) |
| 7069 | operation mode max min) |
| 7070 | ((fr400 (unit u-media-1-quad |
| 7071 | (in FRinti FRintieven) |
| 7072 | (in FRintj FRintjeven) |
| 7073 | (out FRintk FRintkeven))) |
| 7074 | (fr500 (unit u-media-quad-arith |
| 7075 | (in FRinti FRintieven) |
| 7076 | (in FRintj FRintjeven) |
| 7077 | (out FRintk FRintkeven)))) |
| 7078 | ) |
| 7079 | ) |
| 7080 | |
| 7081 | (conditional-media-quad-arith-sat cmqaddhss add HI 32767 -32768 OP_73 OPE4_0 "Conditional Media quad add signed with saturation") |
| 7082 | (conditional-media-quad-arith-sat cmqaddhus add UHI 65535 0 OP_73 OPE4_1 "Conditional Media quad add unsigned with saturation") |
| 7083 | |
| 7084 | (conditional-media-quad-arith-sat cmqsubhss sub HI 32767 -32768 OP_73 OPE4_2 "Conditional Media quad sub signed with saturation") |
| 7085 | (conditional-media-quad-arith-sat cmqsubhus sub UHI 65535 0 OP_73 OPE4_3 "Conditional Media quad sub unsigned with saturation") |
| 7086 | |
| 7087 | (define-pmacro (media-acc-arith-sat name operation mode max min op ope comment) |
| 7088 | (dni name |
| 7089 | (comment) |
| 7090 | ((UNIT FMALL) (MACH fr400) (FR400-MAJOR M-1)) |
| 7091 | (.str name "$pack $ACC40Si,$ACC40Sk") |
| 7092 | (+ pack ACC40Sk op ACC40Si ope (ACCj-null)) |
| 7093 | (if (register-unaligned ACC40Si 2) |
| 7094 | (c-call VOID "@cpu@_media_acc_not_aligned") |
| 7095 | (media-arith-sat-semantics operation ACC40Si |
| 7096 | (nextreg h-acc40S ACC40Si 1) |
| 7097 | ACC40Sk mode max min (msr-sie-acci))) |
| 7098 | ((fr400 (unit u-media-2-acc))) |
| 7099 | ) |
| 7100 | ) |
| 7101 | |
| 7102 | (media-acc-arith-sat maddaccs add DI #x7fffffffff (inv DI #x7fffffffff) |
| 7103 | OP_78 OPE1_04 "Media accumulator addition") |
| 7104 | (media-acc-arith-sat msubaccs sub DI #x7fffffffff (inv DI #x7fffffffff) |
| 7105 | OP_78 OPE1_05 "Media accumulator subtraction") |
| 7106 | |
| 7107 | (define-pmacro (media-dual-acc-arith-sat name operation mode max min op ope |
| 7108 | comment) |
| 7109 | (dni name |
| 7110 | (comment) |
| 7111 | ((UNIT MDUALACC) (MACH fr400) (FR400-MAJOR M-2)) |
| 7112 | (.str name "$pack $ACC40Si,$ACC40Sk") |
| 7113 | (+ pack ACC40Sk op ACC40Si ope (ACCj-null)) |
| 7114 | (if (register-unaligned ACC40Si 4) |
| 7115 | (c-call VOID "@cpu@_media_acc_not_aligned") |
| 7116 | (if (register-unaligned ACC40Sk 2) |
| 7117 | (c-call VOID "@cpu@_media_acc_not_aligned") |
| 7118 | (sequence () |
| 7119 | (media-arith-sat-semantics operation ACC40Si |
| 7120 | (nextreg h-acc40S ACC40Si 1) |
| 7121 | ACC40Sk mode max min |
| 7122 | (msr-sie-acci)) |
| 7123 | (media-arith-sat-semantics operation |
| 7124 | (nextreg h-acc40S ACC40Si 2) |
| 7125 | (nextreg h-acc40S ACC40Si 3) |
| 7126 | (nextreg h-acc40S ACC40Sk 1) |
| 7127 | mode max min |
| 7128 | (msr-sie-acci-1))))) |
| 7129 | ((fr400 (unit u-media-2-acc-dual))) |
| 7130 | ) |
| 7131 | ) |
| 7132 | |
| 7133 | (media-dual-acc-arith-sat mdaddaccs add DI #x7fffffffff (inv DI #x7fffffffff) |
| 7134 | OP_78 OPE1_06 "Media accumulator addition") |
| 7135 | (media-dual-acc-arith-sat mdsubaccs sub DI #x7fffffffff (inv DI #x7fffffffff) |
| 7136 | OP_78 OPE1_07 "Media accumulator subtraction") |
| 7137 | |
| 7138 | (dni masaccs |
| 7139 | "Media add and subtract signed accumulator with saturation" |
| 7140 | ((UNIT FMALL) (MACH fr400) (FR400-MAJOR M-1)) |
| 7141 | "masaccs$pack $ACC40Si,$ACC40Sk" |
| 7142 | (+ pack ACC40Sk OP_78 ACC40Si OPE1_08 (ACCj-null)) |
| 7143 | (if (register-unaligned ACC40Si 2) |
| 7144 | (c-call VOID "@cpu@_media_acc_not_aligned") |
| 7145 | (if (register-unaligned ACC40Sk 2) |
| 7146 | (c-call VOID "@cpu@_media_acc_not_aligned") |
| 7147 | (sequence () |
| 7148 | (media-arith-sat-semantics add ACC40Si |
| 7149 | (nextreg h-acc40S ACC40Si 1) |
| 7150 | ACC40Sk DI |
| 7151 | #x7fffffffff |
| 7152 | (inv DI #x7fffffffff) |
| 7153 | (msr-sie-acci)) |
| 7154 | (media-arith-sat-semantics sub ACC40Si |
| 7155 | (nextreg h-acc40S ACC40Si 1) |
| 7156 | (nextreg h-acc40S ACC40Sk 1) |
| 7157 | DI |
| 7158 | #x7fffffffff |
| 7159 | (inv DI #x7fffffffff) |
| 7160 | (msr-sie-acci-1))))) |
| 7161 | ((fr400 (unit u-media-2-add-sub))) |
| 7162 | ) |
| 7163 | |
| 7164 | (dni mdasaccs |
| 7165 | "Media add and subtract signed accumulator with saturation" |
| 7166 | ((UNIT MDUALACC) (MACH fr400) (FR400-MAJOR M-2)) |
| 7167 | "mdasaccs$pack $ACC40Si,$ACC40Sk" |
| 7168 | (+ pack ACC40Sk OP_78 ACC40Si OPE1_09 (ACCj-null)) |
| 7169 | (if (register-unaligned ACC40Si 4) |
| 7170 | (c-call VOID "@cpu@_media_acc_not_aligned") |
| 7171 | (if (register-unaligned ACC40Sk 4) |
| 7172 | (c-call VOID "@cpu@_media_acc_not_aligned") |
| 7173 | (sequence () |
| 7174 | (media-arith-sat-semantics add ACC40Si |
| 7175 | (nextreg h-acc40S ACC40Si 1) |
| 7176 | ACC40Sk DI |
| 7177 | #x7fffffffff |
| 7178 | (inv DI #x7fffffffff) |
| 7179 | (msr-sie-acci)) |
| 7180 | (media-arith-sat-semantics sub ACC40Si |
| 7181 | (nextreg h-acc40S ACC40Si 1) |
| 7182 | (nextreg h-acc40S ACC40Sk 1) |
| 7183 | DI |
| 7184 | #x7fffffffff |
| 7185 | (inv DI #x7fffffffff) |
| 7186 | (msr-sie-acci-1)) |
| 7187 | (media-arith-sat-semantics add |
| 7188 | (nextreg h-acc40S ACC40Si 2) |
| 7189 | (nextreg h-acc40S ACC40Si 3) |
| 7190 | (nextreg h-acc40S ACC40Sk 2) |
| 7191 | DI |
| 7192 | #x7fffffffff |
| 7193 | (inv DI #x7fffffffff) |
| 7194 | (msr-sie-acci-2)) |
| 7195 | (media-arith-sat-semantics sub |
| 7196 | (nextreg h-acc40S ACC40Si 2) |
| 7197 | (nextreg h-acc40S ACC40Si 3) |
| 7198 | (nextreg h-acc40S ACC40Sk 3) |
| 7199 | DI |
| 7200 | #x7fffffffff |
| 7201 | (inv DI #x7fffffffff) |
| 7202 | (msr-sie-acci-3))))) |
| 7203 | ((fr400 (unit u-media-2-add-sub-dual))) |
| 7204 | ) |
| 7205 | |
| 7206 | (define-pmacro (media-multiply-semantics conv arg1 arg2 res) |
| 7207 | (set res (mul DI (conv DI arg1) (conv DI arg2))) |
| 7208 | ) |
| 7209 | |
| 7210 | (define-pmacro (media-dual-multiply-semantics cond mode conv rhs1 rhs2) |
| 7211 | (if (register-unaligned ACC40Sk 2) |
| 7212 | (c-call VOID "@cpu@_media_acc_not_aligned") |
| 7213 | (if cond |
| 7214 | (sequence ((mode argihi) (mode argilo) (mode argjhi) (mode argjlo)) |
| 7215 | (extract-hilo FRinti 0 FRintj 0 |
| 7216 | argihi argilo argjhi argjlo) |
| 7217 | (media-multiply-semantics conv argihi rhs1 ACC40Sk) |
| 7218 | (media-multiply-semantics conv argilo rhs2 |
| 7219 | (nextreg h-acc40S ACC40Sk 1))))) |
| 7220 | ) |
| 7221 | |
| 7222 | (define-pmacro (media-dual-multiply name mode conv rhs1 rhs2 op ope comment) |
| 7223 | (dni name |
| 7224 | (comment) |
| 7225 | ((UNIT FMALL) (FR500-MAJOR M-4) (FR400-MAJOR M-1) PRESERVE-OVF) |
| 7226 | (.str name "$pack $FRinti,$FRintj,$ACC40Sk") |
| 7227 | (+ pack ACC40Sk op FRinti ope FRintj) |
| 7228 | (media-dual-multiply-semantics 1 mode conv rhs1 rhs2) |
| 7229 | ((fr400 (unit u-media-2)) |
| 7230 | (fr500 (unit u-media-dual-mul))) |
| 7231 | ) |
| 7232 | ) |
| 7233 | |
| 7234 | (media-dual-multiply mmulhs HI ext argjhi argjlo OP_7B OPE1_14 "Media dual multiply signed") |
| 7235 | (media-dual-multiply mmulhu UHI zext argjhi argjlo OP_7B OPE1_15 "Media dual multiply unsigned") |
| 7236 | |
| 7237 | (media-dual-multiply mmulxhs HI ext argjlo argjhi OP_7B OPE1_28 "Media dual cross multiply signed") |
| 7238 | (media-dual-multiply mmulxhu UHI zext argjlo argjhi OP_7B OPE1_29 "Media dual cross multiply unsigned") |
| 7239 | |
| 7240 | (define-pmacro (conditional-media-dual-multiply |
| 7241 | name mode conv rhs1 rhs2 op ope comment) |
| 7242 | (dni name |
| 7243 | (comment) |
| 7244 | ((UNIT FMALL) (FR500-MAJOR M-4) (FR400-MAJOR M-1) |
| 7245 | PRESERVE-OVF CONDITIONAL) |
| 7246 | (.str name "$pack $FRinti,$FRintj,$ACC40Sk,$CCi,$cond") |
| 7247 | (+ pack ACC40Sk op FRinti CCi cond ope FRintj) |
| 7248 | (media-dual-multiply-semantics (eq CCi (or cond 2)) mode conv rhs1 rhs2) |
| 7249 | ((fr400 (unit u-media-2)) |
| 7250 | (fr500 (unit u-media-dual-mul))) |
| 7251 | ) |
| 7252 | ) |
| 7253 | |
| 7254 | (conditional-media-dual-multiply cmmulhs HI ext argjhi argjlo OP_72 OPE4_0 "Conditional Media dual multiply signed") |
| 7255 | (conditional-media-dual-multiply cmmulhu UHI zext argjhi argjlo OP_72 OPE4_1 "Conditional Media dual multiply unsigned") |
| 7256 | |
| 7257 | (define-pmacro (media-quad-multiply-semantics cond mode conv rhs1 rhs2) |
| 7258 | (if (register-unaligned ACC40Sk 4) |
| 7259 | (c-call VOID "@cpu@_media_acc_not_aligned") |
| 7260 | (if (orif (register-unaligned FRintieven 2) |
| 7261 | (register-unaligned FRintjeven 2)) |
| 7262 | (c-call VOID "@cpu@_media_register_not_aligned") |
| 7263 | (if cond |
| 7264 | (sequence ((mode argihi) (mode argilo) |
| 7265 | (mode argjhi) (mode argjlo)) |
| 7266 | (extract-hilo FRintieven 0 FRintjeven 0 |
| 7267 | argihi argilo argjhi argjlo) |
| 7268 | (media-multiply-semantics conv argihi rhs1 ACC40Sk) |
| 7269 | (media-multiply-semantics conv argilo rhs2 |
| 7270 | (nextreg h-acc40S ACC40Sk 1)) |
| 7271 | (extract-hilo FRintieven 1 FRintjeven 1 |
| 7272 | argihi argilo argjhi argjlo) |
| 7273 | (media-multiply-semantics conv argihi rhs1 |
| 7274 | (nextreg h-acc40S ACC40Sk 2)) |
| 7275 | (media-multiply-semantics conv argilo rhs2 |
| 7276 | (nextreg h-acc40S ACC40Sk 3)))))) |
| 7277 | ) |
| 7278 | |
| 7279 | (define-pmacro (media-quad-multiply name mode conv rhs1 rhs2 op ope comment) |
| 7280 | (dni name |
| 7281 | (comment) |
| 7282 | ((UNIT FMALL) (FR500-MAJOR M-4) (FR400-MAJOR M-2) PRESERVE-OVF) |
| 7283 | (.str name "$pack $FRintieven,$FRintjeven,$ACC40Sk") |
| 7284 | (+ pack ACC40Sk op FRintieven ope FRintjeven) |
| 7285 | (media-quad-multiply-semantics 1 mode conv rhs1 rhs2) |
| 7286 | ((fr400 (unit u-media-2-quad |
| 7287 | (in FRinti FRintieven) |
| 7288 | (in FRintj FRintjeven))) |
| 7289 | (fr500 (unit u-media-quad-mul |
| 7290 | (in FRinti FRintieven) |
| 7291 | (in FRintj FRintjeven)))) |
| 7292 | ) |
| 7293 | ) |
| 7294 | |
| 7295 | (media-quad-multiply mqmulhs HI ext argjhi argjlo OP_7B OPE1_1C "Media quad multiply signed") |
| 7296 | (media-quad-multiply mqmulhu UHI zext argjhi argjlo OP_7B OPE1_1D "Media quad multiply unsigned") |
| 7297 | |
| 7298 | (media-quad-multiply mqmulxhs HI ext argjlo argjhi OP_7B OPE1_2A "Media quad cross multiply signed") |
| 7299 | (media-quad-multiply mqmulxhu UHI zext argjlo argjhi OP_7B OPE1_2B "Media quad cross multiply unsigned") |
| 7300 | |
| 7301 | (define-pmacro (conditional-media-quad-multiply |
| 7302 | name mode conv rhs1 rhs2 op ope comment) |
| 7303 | (dni name |
| 7304 | (comment) |
| 7305 | ((UNIT FMALL) (FR500-MAJOR M-4) (FR400-MAJOR M-2) |
| 7306 | PRESERVE-OVF CONDITIONAL) |
| 7307 | (.str name "$pack $FRintieven,$FRintjeven,$ACC40Sk,$CCi,$cond") |
| 7308 | (+ pack ACC40Sk op FRintieven CCi cond ope FRintjeven) |
| 7309 | (media-quad-multiply-semantics (eq CCi (or cond 2)) mode conv rhs1 rhs2) |
| 7310 | ((fr400 (unit u-media-2-quad |
| 7311 | (in FRinti FRintieven) |
| 7312 | (in FRintj FRintjeven))) |
| 7313 | (fr500 (unit u-media-quad-mul |
| 7314 | (in FRinti FRintieven) |
| 7315 | (in FRintj FRintjeven)))) |
| 7316 | ) |
| 7317 | ) |
| 7318 | |
| 7319 | (conditional-media-quad-multiply cmqmulhs HI ext argjhi argjlo OP_74 OPE4_0 "Conditional Media quad multiply signed") |
| 7320 | (conditional-media-quad-multiply cmqmulhu UHI zext argjhi argjlo OP_74 OPE4_1 "Conditional Media quad multiply unsigned") |
| 7321 | |
| 7322 | (define-pmacro (media-multiply-acc-semantics |
| 7323 | conv arg1 addop arg2 res max min sie) |
| 7324 | (sequence ((DI tmp)) |
| 7325 | (set tmp (addop res (mul DI (conv DI arg1) (conv DI arg2)))) |
| 7326 | (saturate-v tmp max min sie res)) |
| 7327 | ) |
| 7328 | |
| 7329 | (define-pmacro (media-dual-multiply-acc-semantics |
| 7330 | cond mode conv addop rhw res max min) |
| 7331 | (if (register-unaligned res 2) |
| 7332 | (c-call VOID "@cpu@_media_acc_not_aligned") |
| 7333 | (if cond |
| 7334 | (sequence ((mode argihi) (mode argilo) (mode argjhi) (mode argjlo)) |
| 7335 | (extract-hilo FRinti 0 FRintj 0 |
| 7336 | argihi argilo argjhi argjlo) |
| 7337 | (media-multiply-acc-semantics conv argihi addop argjhi |
| 7338 | res |
| 7339 | max min (msr-sie-acci)) |
| 7340 | (media-multiply-acc-semantics conv argilo addop argjlo |
| 7341 | (nextreg rhw res 1) |
| 7342 | max min (msr-sie-acci-1))))) |
| 7343 | ) |
| 7344 | |
| 7345 | (define-pmacro (media-dual-multiply-acc |
| 7346 | name mode conv addop rhw res max min op ope comment) |
| 7347 | (dni name |
| 7348 | (comment) |
| 7349 | ((UNIT FMALL) (FR500-MAJOR M-4) (FR400-MAJOR M-1)) |
| 7350 | (.str name "$pack $FRinti,$FRintj,$" res) |
| 7351 | (+ pack res op FRinti ope FRintj) |
| 7352 | (media-dual-multiply-acc-semantics 1 mode conv addop rhw res max min) |
| 7353 | ((fr400 (unit u-media-2)) |
| 7354 | (fr500 (unit u-media-dual-mul))) |
| 7355 | ) |
| 7356 | ) |
| 7357 | |
| 7358 | (media-dual-multiply-acc mmachs HI ext add h-acc40S ACC40Sk |
| 7359 | (const DI #x7fffffffff) (const DI #xffffff8000000000) |
| 7360 | OP_7B OPE1_16 |
| 7361 | "Media dual multiply and accumulate signed") |
| 7362 | |
| 7363 | (media-dual-multiply-acc mmachu UHI zext add h-acc40U ACC40Uk |
| 7364 | (const DI #xffffffffff) (const DI 0) |
| 7365 | OP_7B OPE1_17 |
| 7366 | "Media dual multiply and accumulate unsigned") |
| 7367 | |
| 7368 | (media-dual-multiply-acc mmrdhs HI ext sub h-acc40S ACC40Sk |
| 7369 | (const DI #x7fffffffff) (const DI #xffffff8000000000) |
| 7370 | OP_7B OPE1_30 |
| 7371 | "Media dual multiply and reduce signed") |
| 7372 | |
| 7373 | (media-dual-multiply-acc mmrdhu UHI zext sub h-acc40U ACC40Uk |
| 7374 | (const DI #xffffffffff) (const DI 0) |
| 7375 | OP_7B OPE1_31 |
| 7376 | "Media dual multiply and reduce unsigned") |
| 7377 | |
| 7378 | (define-pmacro (conditional-media-dual-multiply-acc |
| 7379 | name mode conv addop rhw res max min op ope comment) |
| 7380 | (dni name |
| 7381 | (comment) |
| 7382 | ((UNIT FMALL) (FR500-MAJOR M-4) (FR400-MAJOR M-1) CONDITIONAL) |
| 7383 | (.str name "$pack $FRinti,$FRintj,$" res ",$CCi,$cond") |
| 7384 | (+ pack res op FRinti CCi cond ope FRintj) |
| 7385 | (media-dual-multiply-acc-semantics (eq CCi (or cond 2)) |
| 7386 | mode conv addop rhw res max min) |
| 7387 | ((fr400 (unit u-media-2)) |
| 7388 | (fr500 (unit u-media-dual-mul))) |
| 7389 | ) |
| 7390 | ) |
| 7391 | |
| 7392 | (conditional-media-dual-multiply-acc cmmachs HI ext add h-acc40S ACC40Sk |
| 7393 | (const DI #x7fffffffff) (const DI #xffffff8000000000) |
| 7394 | OP_72 OPE4_2 |
| 7395 | "Conditional Media dual multiply and accumulate signed") |
| 7396 | |
| 7397 | (conditional-media-dual-multiply-acc cmmachu UHI zext add h-acc40U ACC40Uk |
| 7398 | (const DI #xffffffffff) (const DI 0) |
| 7399 | OP_72 OPE4_3 |
| 7400 | "Conditional Media dual multiply and accumulate unsigned") |
| 7401 | |
| 7402 | (define-pmacro (media-quad-multiply-acc-semantics |
| 7403 | cond mode conv addop rhw res max min) |
| 7404 | (if (register-unaligned res 4) |
| 7405 | (c-call VOID "@cpu@_media_acc_not_aligned") |
| 7406 | (if (orif (register-unaligned FRintieven 2) |
| 7407 | (register-unaligned FRintjeven 2)) |
| 7408 | (c-call VOID "@cpu@_media_register_not_aligned") |
| 7409 | (if cond |
| 7410 | (sequence ((mode argihi) (mode argilo) |
| 7411 | (mode argjhi) (mode argjlo)) |
| 7412 | (extract-hilo FRintieven 0 FRintjeven 0 |
| 7413 | argihi argilo argjhi argjlo) |
| 7414 | (media-multiply-acc-semantics conv argihi addop argjhi |
| 7415 | res |
| 7416 | max min (msr-sie-acci)) |
| 7417 | (media-multiply-acc-semantics conv argilo addop argjlo |
| 7418 | (nextreg rhw res 1) |
| 7419 | max min (msr-sie-acci-1)) |
| 7420 | (extract-hilo FRintieven 1 FRintjeven 1 |
| 7421 | argihi argilo argjhi argjlo) |
| 7422 | (media-multiply-acc-semantics conv argihi addop argjhi |
| 7423 | (nextreg rhw res 2) |
| 7424 | max min (msr-sie-acci-2)) |
| 7425 | (media-multiply-acc-semantics conv argilo addop argjlo |
| 7426 | (nextreg rhw res 3) |
| 7427 | max min |
| 7428 | (msr-sie-acci-3)))))) |
| 7429 | ) |
| 7430 | |
| 7431 | (define-pmacro (media-quad-multiply-acc |
| 7432 | name mode conv addop rhw res max min op ope comment) |
| 7433 | (dni name |
| 7434 | (comment) |
| 7435 | ((UNIT FMALL) (FR500-MAJOR M-4) (FR400-MAJOR M-2)) |
| 7436 | (.str name "$pack $FRintieven,$FRintjeven,$" res) |
| 7437 | (+ pack res op FRintieven ope FRintjeven) |
| 7438 | (media-quad-multiply-acc-semantics 1 mode conv addop rhw res max min) |
| 7439 | ((fr400 (unit u-media-2-quad |
| 7440 | (in FRinti FRintieven) |
| 7441 | (in FRintj FRintjeven))) |
| 7442 | (fr500 (unit u-media-quad-mul |
| 7443 | (in FRinti FRintieven) |
| 7444 | (in FRintj FRintjeven)))) |
| 7445 | ) |
| 7446 | ) |
| 7447 | |
| 7448 | (media-quad-multiply-acc mqmachs HI ext add h-acc40S ACC40Sk |
| 7449 | (const DI #x7fffffffff) (const DI #xffffff8000000000) |
| 7450 | OP_7B OPE1_1E |
| 7451 | "Media quad multiply and accumulate signed") |
| 7452 | |
| 7453 | (media-quad-multiply-acc mqmachu UHI zext add h-acc40U ACC40Uk |
| 7454 | (const DI #xffffffffff) (const DI 0) |
| 7455 | OP_7B OPE1_1F |
| 7456 | "Media quad multiply and accumulate unsigned") |
| 7457 | |
| 7458 | (define-pmacro (conditional-media-quad-multiply-acc |
| 7459 | name mode conv addop rhw res max min op ope comment) |
| 7460 | (dni name |
| 7461 | (comment) |
| 7462 | ((UNIT FMALL) (FR500-MAJOR M-4) (FR400-MAJOR M-2) CONDITIONAL) |
| 7463 | (.str name "$pack $FRintieven,$FRintjeven,$" res ",$CCi,$cond") |
| 7464 | (+ pack res op FRintieven CCi cond ope FRintjeven) |
| 7465 | (media-quad-multiply-acc-semantics (eq CCi (or cond 2)) |
| 7466 | mode conv addop rhw res max min) |
| 7467 | ((fr400 (unit u-media-2-quad |
| 7468 | (in FRinti FRintieven) |
| 7469 | (in FRintj FRintjeven))) |
| 7470 | (fr500 (unit u-media-quad-mul |
| 7471 | (in FRinti FRintieven) |
| 7472 | (in FRintj FRintjeven)))) |
| 7473 | ) |
| 7474 | ) |
| 7475 | |
| 7476 | (conditional-media-quad-multiply-acc cmqmachs HI ext add h-acc40S ACC40Sk |
| 7477 | (const DI #x7fffffffff) (const DI #xffffff8000000000) |
| 7478 | OP_74 OPE4_2 |
| 7479 | "Conditional Media quad multiply and accumulate signed") |
| 7480 | |
| 7481 | (conditional-media-quad-multiply-acc cmqmachu UHI zext add h-acc40U ACC40Uk |
| 7482 | (const DI #xffffffffff) (const DI 0) |
| 7483 | OP_74 OPE4_3 |
| 7484 | "Conditional media quad multiply and accumulate unsigned") |
| 7485 | |
| 7486 | (define-pmacro (media-quad-multiply-cross-acc-semantics |
| 7487 | cond mode conv addop rhw res max min) |
| 7488 | (if (register-unaligned res 4) |
| 7489 | (c-call VOID "@cpu@_media_acc_not_aligned") |
| 7490 | (if (orif (register-unaligned FRintieven 2) |
| 7491 | (register-unaligned FRintjeven 2)) |
| 7492 | (c-call VOID "@cpu@_media_register_not_aligned") |
| 7493 | (if cond |
| 7494 | (sequence ((mode argihi) (mode argilo) |
| 7495 | (mode argjhi) (mode argjlo)) |
| 7496 | (extract-hilo FRintieven 0 FRintjeven 0 |
| 7497 | argihi argilo argjhi argjlo) |
| 7498 | (media-multiply-acc-semantics conv argihi addop argjhi |
| 7499 | (nextreg rhw res 2) |
| 7500 | max min (msr-sie-acci-2)) |
| 7501 | (media-multiply-acc-semantics conv argilo addop argjlo |
| 7502 | (nextreg rhw res 3) |
| 7503 | max min (msr-sie-acci-3)) |
| 7504 | (extract-hilo FRintieven 1 FRintjeven 1 |
| 7505 | argihi argilo argjhi argjlo) |
| 7506 | (media-multiply-acc-semantics conv argihi addop argjhi |
| 7507 | res |
| 7508 | max min (msr-sie-acci)) |
| 7509 | (media-multiply-acc-semantics conv argilo addop argjlo |
| 7510 | (nextreg rhw res 1) |
| 7511 | max min |
| 7512 | (msr-sie-acci-1)))))) |
| 7513 | ) |
| 7514 | |
| 7515 | (define-pmacro (media-quad-multiply-cross-acc |
| 7516 | name mode conv addop rhw res max min op ope comment) |
| 7517 | (dni name |
| 7518 | (comment) |
| 7519 | ((UNIT MDUALACC) (MACH fr400) (FR400-MAJOR M-2)) |
| 7520 | (.str name "$pack $FRintieven,$FRintjeven,$" res) |
| 7521 | (+ pack res op FRintieven ope FRintjeven) |
| 7522 | (media-quad-multiply-cross-acc-semantics 1 mode conv addop rhw res |
| 7523 | max min) |
| 7524 | ((fr400 (unit u-media-2-quad |
| 7525 | (in FRinti FRintieven) |
| 7526 | (in FRintj FRintjeven)))) |
| 7527 | ) |
| 7528 | ) |
| 7529 | |
| 7530 | (media-quad-multiply-cross-acc mqxmachs HI ext add h-acc40S ACC40Sk |
| 7531 | (const DI #x7fffffffff) (const DI #xffffff8000000000) |
| 7532 | OP_78 OPE1_00 |
| 7533 | "Media quad multiply and cross accumulate signed") |
| 7534 | |
| 7535 | (define-pmacro (media-quad-cross-multiply-cross-acc-semantics |
| 7536 | cond mode conv addop rhw res max min) |
| 7537 | (if (register-unaligned res 4) |
| 7538 | (c-call VOID "@cpu@_media_acc_not_aligned") |
| 7539 | (if (orif (register-unaligned FRintieven 2) |
| 7540 | (register-unaligned FRintjeven 2)) |
| 7541 | (c-call VOID "@cpu@_media_register_not_aligned") |
| 7542 | (if cond |
| 7543 | (sequence ((mode argihi) (mode argilo) |
| 7544 | (mode argjhi) (mode argjlo)) |
| 7545 | (extract-hilo FRintieven 0 FRintjeven 0 |
| 7546 | argihi argilo argjhi argjlo) |
| 7547 | (media-multiply-acc-semantics conv argihi addop argjlo |
| 7548 | (nextreg rhw res 2) |
| 7549 | max min (msr-sie-acci-2)) |
| 7550 | (media-multiply-acc-semantics conv argilo addop argjhi |
| 7551 | (nextreg rhw res 3) |
| 7552 | max min (msr-sie-acci-3)) |
| 7553 | (extract-hilo FRintieven 1 FRintjeven 1 |
| 7554 | argihi argilo argjhi argjlo) |
| 7555 | (media-multiply-acc-semantics conv argihi addop argjlo |
| 7556 | res |
| 7557 | max min (msr-sie-acci)) |
| 7558 | (media-multiply-acc-semantics conv argilo addop argjhi |
| 7559 | (nextreg rhw res 1) |
| 7560 | max min |
| 7561 | (msr-sie-acci-1)))))) |
| 7562 | ) |
| 7563 | |
| 7564 | (define-pmacro (media-quad-cross-multiply-cross-acc |
| 7565 | name mode conv addop rhw res max min op ope comment) |
| 7566 | (dni name |
| 7567 | (comment) |
| 7568 | ((UNIT MDUALACC) (MACH fr400) (FR400-MAJOR M-2)) |
| 7569 | (.str name "$pack $FRintieven,$FRintjeven,$" res) |
| 7570 | (+ pack res op FRintieven ope FRintjeven) |
| 7571 | (media-quad-cross-multiply-cross-acc-semantics 1 mode conv addop rhw res |
| 7572 | max min) |
| 7573 | ((fr400 (unit u-media-2-quad |
| 7574 | (in FRinti FRintieven) |
| 7575 | (in FRintj FRintjeven)))) |
| 7576 | ) |
| 7577 | ) |
| 7578 | |
| 7579 | (media-quad-cross-multiply-cross-acc mqxmacxhs HI ext add h-acc40S ACC40Sk |
| 7580 | (const DI #x7fffffffff) (const DI #xffffff8000000000) |
| 7581 | OP_78 OPE1_01 |
| 7582 | "Media quad cross multiply and cross accumulate signed") |
| 7583 | |
| 7584 | (define-pmacro (media-quad-cross-multiply-acc-semantics |
| 7585 | cond mode conv addop rhw res max min) |
| 7586 | (if (register-unaligned res 4) |
| 7587 | (c-call VOID "@cpu@_media_acc_not_aligned") |
| 7588 | (if (orif (register-unaligned FRintieven 2) |
| 7589 | (register-unaligned FRintjeven 2)) |
| 7590 | (c-call VOID "@cpu@_media_register_not_aligned") |
| 7591 | (if cond |
| 7592 | (sequence ((mode argihi) (mode argilo) |
| 7593 | (mode argjhi) (mode argjlo)) |
| 7594 | (extract-hilo FRintieven 0 FRintjeven 0 |
| 7595 | argihi argilo argjhi argjlo) |
| 7596 | (media-multiply-acc-semantics conv argihi addop argjlo |
| 7597 | res |
| 7598 | max min (msr-sie-acci)) |
| 7599 | (media-multiply-acc-semantics conv argilo addop argjhi |
| 7600 | (nextreg rhw res 1) |
| 7601 | max min (msr-sie-acci-1)) |
| 7602 | (extract-hilo FRintieven 1 FRintjeven 1 |
| 7603 | argihi argilo argjhi argjlo) |
| 7604 | (media-multiply-acc-semantics conv argihi addop argjlo |
| 7605 | (nextreg rhw res 2) |
| 7606 | max min (msr-sie-acci-2)) |
| 7607 | (media-multiply-acc-semantics conv argilo addop argjhi |
| 7608 | (nextreg rhw res 3) |
| 7609 | max min |
| 7610 | (msr-sie-acci-3)))))) |
| 7611 | ) |
| 7612 | |
| 7613 | (define-pmacro (media-quad-cross-multiply-acc |
| 7614 | name mode conv addop rhw res max min op ope comment) |
| 7615 | (dni name |
| 7616 | (comment) |
| 7617 | ((UNIT MDUALACC) (MACH fr400) (FR400-MAJOR M-2)) |
| 7618 | (.str name "$pack $FRintieven,$FRintjeven,$" res) |
| 7619 | (+ pack res op FRintieven ope FRintjeven) |
| 7620 | (media-quad-cross-multiply-acc-semantics 1 mode conv addop rhw res |
| 7621 | max min) |
| 7622 | ((fr400 (unit u-media-2-quad |
| 7623 | (in FRinti FRintieven) |
| 7624 | (in FRintj FRintjeven)))) |
| 7625 | ) |
| 7626 | ) |
| 7627 | |
| 7628 | (media-quad-cross-multiply-acc mqmacxhs HI ext add h-acc40S ACC40Sk |
| 7629 | (const DI #x7fffffffff) (const DI #xffffff8000000000) |
| 7630 | OP_78 OPE1_02 |
| 7631 | "Media quad cross multiply and accumulate signed") |
| 7632 | |
| 7633 | (define-pmacro (media-complex-semantics |
| 7634 | conv lhs1 rhs1 lhs2 rhs2 res max min sie) |
| 7635 | (sequence ((DI tmp1) (DI tmp2)) |
| 7636 | (media-multiply-semantics conv lhs1 rhs1 tmp1) |
| 7637 | (media-multiply-semantics conv lhs2 rhs2 tmp2) |
| 7638 | (set tmp1 (sub tmp1 tmp2)) |
| 7639 | (saturate-v tmp1 max min sie res)) |
| 7640 | ) |
| 7641 | |
| 7642 | (define-pmacro (media-complex-semantics-i |
| 7643 | conv lhs1 rhs1 lhs2 rhs2 res max min sie) |
| 7644 | (sequence ((DI tmp1) (DI tmp2)) |
| 7645 | (media-multiply-semantics conv lhs1 rhs1 tmp1) |
| 7646 | (media-multiply-semantics conv lhs2 rhs2 tmp2) |
| 7647 | (set tmp1 (add tmp1 tmp2)) |
| 7648 | (saturate-v tmp1 max min sie res)) |
| 7649 | ) |
| 7650 | |
| 7651 | (define-pmacro (media-dual-complex-semantics mode conv rhs1 rhs2 max min) |
| 7652 | (sequence ((mode argihi) (mode argilo) (mode argjhi) (mode argjlo)) |
| 7653 | (extract-hilo FRinti 0 FRintj 0 argihi argilo argjhi argjlo) |
| 7654 | (media-complex-semantics conv argihi rhs1 argilo rhs2 ACC40Sk |
| 7655 | max min (msr-sie-acci))) |
| 7656 | ) |
| 7657 | |
| 7658 | (define-pmacro (media-dual-complex-semantics-i mode conv rhs1 rhs2 max min) |
| 7659 | (sequence ((mode argihi) (mode argilo) (mode argjhi) (mode argjlo)) |
| 7660 | (extract-hilo FRinti 0 FRintj 0 argihi argilo argjhi argjlo) |
| 7661 | (media-complex-semantics-i conv argihi rhs1 argilo rhs2 ACC40Sk |
| 7662 | max min (msr-sie-acci))) |
| 7663 | ) |
| 7664 | |
| 7665 | (define-pmacro (media-dual-complex |
| 7666 | name mode conv rhs1 rhs2 max min op ope comment) |
| 7667 | (dni name |
| 7668 | (comment) |
| 7669 | ((UNIT FMALL) (FR500-MAJOR M-4) (FR400-MAJOR M-1)) |
| 7670 | (.str name "$pack $FRinti,$FRintj,$ACC40Sk") |
| 7671 | (+ pack ACC40Sk op FRinti ope FRintj) |
| 7672 | (media-dual-complex-semantics mode conv rhs1 rhs2 max min) |
| 7673 | ((fr400 (unit u-media-2)) |
| 7674 | (fr500 (unit u-media))) |
| 7675 | ) |
| 7676 | ) |
| 7677 | |
| 7678 | (define-pmacro (media-dual-complex-i |
| 7679 | name mode conv rhs1 rhs2 max min op ope comment) |
| 7680 | (dni name |
| 7681 | (comment) |
| 7682 | ((UNIT FMALL) (FR500-MAJOR M-4) (FR400-MAJOR M-1)) |
| 7683 | (.str name "$pack $FRinti,$FRintj,$ACC40Sk") |
| 7684 | (+ pack ACC40Sk op FRinti ope FRintj) |
| 7685 | (media-dual-complex-semantics-i mode conv rhs1 rhs2 max min) |
| 7686 | ((fr400 (unit u-media-2)) |
| 7687 | (fr500 (unit u-media-dual-mul))) |
| 7688 | ) |
| 7689 | ) |
| 7690 | |
| 7691 | (media-dual-complex mcpxrs HI ext argjhi argjlo |
| 7692 | (const DI #x7fffffffff) (const DI #xffffff8000000000) |
| 7693 | OP_7B OPE1_20 |
| 7694 | "Media dual complex real signed with saturation") |
| 7695 | |
| 7696 | (media-dual-complex mcpxru UHI zext argjhi argjlo |
| 7697 | (const DI #xffffffffff) (const DI 0) |
| 7698 | OP_7B OPE1_21 |
| 7699 | "Media dual complex real unsigned with saturation") |
| 7700 | |
| 7701 | (media-dual-complex-i mcpxis HI ext argjlo argjhi |
| 7702 | (const DI #x7fffffffff) (const DI #xffffff8000000000) |
| 7703 | OP_7B OPE1_22 |
| 7704 | "Media dual complex imaginary signed with saturation") |
| 7705 | |
| 7706 | (media-dual-complex-i mcpxiu UHI zext argjlo argjhi |
| 7707 | (const DI #xffffffffff) (const DI 0) |
| 7708 | OP_7B OPE1_23 |
| 7709 | "Media dual complex imaginary unsigned with saturation") |
| 7710 | |
| 7711 | (define-pmacro (conditional-media-dual-complex |
| 7712 | name mode conv rhs1 rhs2 max min op ope comment) |
| 7713 | (dni name |
| 7714 | (comment) |
| 7715 | ((UNIT FMALL) (FR500-MAJOR M-4) (FR400-MAJOR M-1) CONDITIONAL) |
| 7716 | (.str name "$pack $FRinti,$FRintj,$ACC40Sk,$CCi,$cond") |
| 7717 | (+ pack ACC40Sk op FRinti CCi cond ope FRintj) |
| 7718 | (if (eq CCi (or cond 2)) |
| 7719 | (media-dual-complex-semantics mode conv rhs1 rhs2 max min)) |
| 7720 | ((fr400 (unit u-media-2)) |
| 7721 | (fr500 (unit u-media))) |
| 7722 | ) |
| 7723 | ) |
| 7724 | |
| 7725 | (define-pmacro (conditional-media-dual-complex-i |
| 7726 | name mode conv rhs1 rhs2 max min op ope comment) |
| 7727 | (dni name |
| 7728 | (comment) |
| 7729 | ((UNIT FMALL) (FR500-MAJOR M-4) (FR400-MAJOR M-1) CONDITIONAL) |
| 7730 | (.str name "$pack $FRinti,$FRintj,$ACC40Sk,$CCi,$cond") |
| 7731 | (+ pack ACC40Sk op FRinti CCi cond ope FRintj) |
| 7732 | (if (eq CCi (or cond 2)) |
| 7733 | (media-dual-complex-semantics-i mode conv rhs1 rhs2 max min)) |
| 7734 | ((fr400 (unit u-media-2)) |
| 7735 | (fr500 (unit u-media-dual-mul))) |
| 7736 | ) |
| 7737 | ) |
| 7738 | |
| 7739 | (conditional-media-dual-complex cmcpxrs HI ext argjhi argjlo |
| 7740 | (const DI #x7fffffffff) (const DI #xffffff8000000000) |
| 7741 | OP_75 OPE4_0 |
| 7742 | "Conditional Media dual complex real signed with saturation") |
| 7743 | |
| 7744 | (conditional-media-dual-complex cmcpxru UHI zext argjhi argjlo |
| 7745 | (const DI #xffffffffff) (const DI 0) |
| 7746 | OP_75 OPE4_1 |
| 7747 | "Conditional Media dual complex real unsigned with saturation") |
| 7748 | |
| 7749 | (conditional-media-dual-complex-i cmcpxis HI ext argjlo argjhi |
| 7750 | (const DI #x7fffffffff) (const DI #xffffff8000000000) |
| 7751 | OP_75 OPE4_2 |
| 7752 | "Conditional Media dual complex imaginary signed with saturation") |
| 7753 | |
| 7754 | (conditional-media-dual-complex-i cmcpxiu UHI zext argjlo argjhi |
| 7755 | (const DI #xffffffffff) (const DI 0) |
| 7756 | OP_75 OPE4_3 |
| 7757 | "Conditional Media dual complex imaginary unsigned with saturation") |
| 7758 | |
| 7759 | (define-pmacro (media-quad-complex |
| 7760 | name mode conv rhs1 rhs2 max min op ope comment) |
| 7761 | (dni name |
| 7762 | (comment) |
| 7763 | ((UNIT FMALL) (FR500-MAJOR M-4) (FR400-MAJOR M-2)) |
| 7764 | (.str name "$pack $FRintieven,$FRintjeven,$ACC40Sk") |
| 7765 | (+ pack ACC40Sk op FRintieven ope FRintjeven) |
| 7766 | (if (register-unaligned ACC40Sk 2) |
| 7767 | (c-call VOID "@cpu@_media_acc_not_aligned") |
| 7768 | (if (orif (register-unaligned FRintieven 2) |
| 7769 | (register-unaligned FRintjeven 2)) |
| 7770 | (c-call VOID "@cpu@_media_register_not_aligned") |
| 7771 | (sequence ((mode argihi) (mode argilo) |
| 7772 | (mode argjhi) (mode argjlo)) |
| 7773 | (extract-hilo FRintieven 0 FRintjeven 0 |
| 7774 | argihi argilo argjhi argjlo) |
| 7775 | (media-complex-semantics conv argihi rhs1 argilo rhs2 |
| 7776 | ACC40Sk |
| 7777 | max min (msr-sie-acci)) |
| 7778 | (extract-hilo FRintieven 1 FRintjeven 1 |
| 7779 | argihi argilo argjhi argjlo) |
| 7780 | (media-complex-semantics conv argihi rhs1 argilo rhs2 |
| 7781 | (nextreg h-acc40S ACC40Sk 1) |
| 7782 | max min (msr-sie-acci-1))))) |
| 7783 | ((fr400 (unit u-media-2-quad |
| 7784 | (in FRinti FRintieven) |
| 7785 | (in FRintj FRintjeven))) |
| 7786 | (fr500 (unit u-media-quad-complex |
| 7787 | (in FRinti FRintieven) |
| 7788 | (in FRintj FRintjeven)))) |
| 7789 | ) |
| 7790 | ) |
| 7791 | |
| 7792 | (define-pmacro (media-quad-complex-i |
| 7793 | name mode conv rhs1 rhs2 max min op ope comment) |
| 7794 | (dni name |
| 7795 | (comment) |
| 7796 | ((UNIT FMALL) (FR500-MAJOR M-4) (FR400-MAJOR M-2)) |
| 7797 | (.str name "$pack $FRintieven,$FRintjeven,$ACC40Sk") |
| 7798 | (+ pack ACC40Sk op FRintieven ope FRintjeven) |
| 7799 | (if (register-unaligned ACC40Sk 2) |
| 7800 | (c-call VOID "@cpu@_media_acc_not_aligned") |
| 7801 | (if (orif (register-unaligned FRintieven 2) |
| 7802 | (register-unaligned FRintjeven 2)) |
| 7803 | (c-call VOID "@cpu@_media_register_not_aligned") |
| 7804 | (sequence ((mode argihi) (mode argilo) |
| 7805 | (mode argjhi) (mode argjlo)) |
| 7806 | (extract-hilo FRintieven 0 FRintjeven 0 |
| 7807 | argihi argilo argjhi argjlo) |
| 7808 | (media-complex-semantics-i conv argihi rhs1 argilo rhs2 |
| 7809 | ACC40Sk |
| 7810 | max min (msr-sie-acci)) |
| 7811 | (extract-hilo FRintieven 1 FRintjeven 1 |
| 7812 | argihi argilo argjhi argjlo) |
| 7813 | (media-complex-semantics-i conv argihi rhs1 argilo rhs2 |
| 7814 | (nextreg h-acc40S ACC40Sk 1) |
| 7815 | max min (msr-sie-acci-1))))) |
| 7816 | ((fr400 (unit u-media-2-quad |
| 7817 | (in FRinti FRintieven) |
| 7818 | (in FRintj FRintjeven))) |
| 7819 | (fr500 (unit u-media-quad-complex |
| 7820 | (in FRinti FRintieven) |
| 7821 | (in FRintj FRintjeven)))) |
| 7822 | ) |
| 7823 | ) |
| 7824 | |
| 7825 | (media-quad-complex mqcpxrs HI ext argjhi argjlo |
| 7826 | (const DI #x7fffffffff) (const DI #xffffff8000000000) |
| 7827 | OP_7B OPE1_24 |
| 7828 | "Media quad complex real signed with saturation") |
| 7829 | |
| 7830 | (media-quad-complex mqcpxru UHI zext argjhi argjlo |
| 7831 | (const DI #xffffffffff) (const DI 0) |
| 7832 | OP_7B OPE1_25 |
| 7833 | "Media quad complex real unsigned with saturation") |
| 7834 | |
| 7835 | (media-quad-complex-i mqcpxis HI ext argjlo argjhi |
| 7836 | (const DI #x7fffffffff) (const DI #xffffff8000000000) |
| 7837 | OP_7B OPE1_26 |
| 7838 | "Media quad complex imaginary signed with saturation") |
| 7839 | |
| 7840 | (media-quad-complex-i mqcpxiu UHI zext argjlo argjhi |
| 7841 | (const DI #xffffffffff) (const DI 0) |
| 7842 | OP_7B OPE1_27 |
| 7843 | "Media quad complex imaginary unsigned with saturation") |
| 7844 | |
| 7845 | (define-pmacro (media-pack src1 src2 targ offset) |
| 7846 | (sequence () |
| 7847 | (set (halfword hi targ offset) (halfword lo src1 offset)) |
| 7848 | (set (halfword lo targ offset) (halfword lo src2 offset))) |
| 7849 | ) |
| 7850 | |
| 7851 | (define-pmacro (media-expand-halfword-to-word-semantics cond) |
| 7852 | (if cond |
| 7853 | (sequence ((UHI tmp)) |
| 7854 | (if (and u6 1) |
| 7855 | (set tmp (halfword lo FRinti 0)) |
| 7856 | (set tmp (halfword hi FRinti 0))) |
| 7857 | (set (halfword hi FRintk 0) tmp) |
| 7858 | (set (halfword lo FRintk 0) tmp))) |
| 7859 | ) |
| 7860 | |
| 7861 | (dni mexpdhw |
| 7862 | "Media expand halfword to word" |
| 7863 | ((UNIT FM01) (FR500-MAJOR M-2) (FR400-MAJOR M-1)) |
| 7864 | "mexpdhw$pack $FRinti,$u6,$FRintk" |
| 7865 | (+ pack FRintk OP_7B FRinti OPE1_32 u6) |
| 7866 | (media-expand-halfword-to-word-semantics 1) |
| 7867 | ((fr400 (unit u-media-3)) |
| 7868 | (fr500 (unit u-media))) |
| 7869 | ) |
| 7870 | |
| 7871 | (dni cmexpdhw |
| 7872 | "Conditional media expand halfword to word" |
| 7873 | ((UNIT FM01) (FR500-MAJOR M-2) (FR400-MAJOR M-1) CONDITIONAL) |
| 7874 | "cmexpdhw$pack $FRinti,$u6,$FRintk,$CCi,$cond" |
| 7875 | (+ pack FRintk OP_76 FRinti CCi cond OPE4_2 u6) |
| 7876 | (media-expand-halfword-to-word-semantics (eq CCi (or cond 2))) |
| 7877 | ((fr400 (unit u-media-3)) |
| 7878 | (fr500 (unit u-media))) |
| 7879 | ) |
| 7880 | |
| 7881 | (define-pmacro (media-expand-halfword-to-double-semantics cond) |
| 7882 | (if (register-unaligned FRintkeven 2) |
| 7883 | (c-call VOID "@cpu@_media_register_not_aligned") |
| 7884 | (if cond |
| 7885 | (sequence ((UHI tmp)) |
| 7886 | ; a hack to get FRintkeven referenced for profiling |
| 7887 | (set FRintkeven (c-raw-call SI "frv_ref_SI" FRintkeven)) |
| 7888 | (if (and u6 1) |
| 7889 | (set tmp (halfword lo FRinti 0)) |
| 7890 | (set tmp (halfword hi FRinti 0))) |
| 7891 | (set (halfword hi FRintkeven 0) tmp) |
| 7892 | (set (halfword lo FRintkeven 0) tmp) |
| 7893 | (set (halfword hi FRintkeven 1) tmp) |
| 7894 | (set (halfword lo FRintkeven 1) tmp)))) |
| 7895 | ) |
| 7896 | |
| 7897 | (dni mexpdhd |
| 7898 | "Media expand halfword to double" |
| 7899 | ((UNIT FM01) (FR500-MAJOR M-2) (FR400-MAJOR M-2)) |
| 7900 | "mexpdhd$pack $FRinti,$u6,$FRintkeven" |
| 7901 | (+ pack FRintkeven OP_7B FRinti OPE1_33 u6) |
| 7902 | (media-expand-halfword-to-double-semantics 1) |
| 7903 | ((fr400 (unit u-media-dual-expand |
| 7904 | (out FRintk FRintkeven))) |
| 7905 | (fr500 (unit u-media-dual-expand |
| 7906 | (out FRintk FRintkeven)))) |
| 7907 | ) |
| 7908 | |
| 7909 | (dni cmexpdhd |
| 7910 | "Conditional media expand halfword to double" |
| 7911 | ((UNIT FM01) (FR500-MAJOR M-2) (FR400-MAJOR M-2) CONDITIONAL) |
| 7912 | "cmexpdhd$pack $FRinti,$u6,$FRintkeven,$CCi,$cond" |
| 7913 | (+ pack FRintkeven OP_76 FRinti CCi cond OPE4_3 u6) |
| 7914 | (media-expand-halfword-to-double-semantics (eq CCi (or cond 2))) |
| 7915 | ((fr400 (unit u-media-dual-expand |
| 7916 | (out FRintk FRintkeven))) |
| 7917 | (fr500 (unit u-media-dual-expand |
| 7918 | (out FRintk FRintkeven)))) |
| 7919 | ) |
| 7920 | |
| 7921 | (dni mpackh |
| 7922 | "Media halfword pack" |
| 7923 | ((UNIT FM01) (FR500-MAJOR M-2) (FR400-MAJOR M-1)) |
| 7924 | "mpackh$pack $FRinti,$FRintj,$FRintk" |
| 7925 | (+ pack FRintk OP_7B FRinti OPE1_34 FRintj) |
| 7926 | (media-pack FRinti FRintj FRintk 0) |
| 7927 | ((fr400 (unit u-media-3)) |
| 7928 | (fr500 (unit u-media))) |
| 7929 | ) |
| 7930 | |
| 7931 | (dni mdpackh |
| 7932 | "Media dual pack" |
| 7933 | ((UNIT FM01) (FR500-MAJOR M-5) (FR400-MAJOR M-2)) |
| 7934 | "mdpackh$pack $FRintieven,$FRintjeven,$FRintkeven" |
| 7935 | (+ pack FRintkeven OP_7B FRintieven OPE1_36 FRintjeven) |
| 7936 | (if (orif (register-unaligned FRintieven 2) |
| 7937 | (orif (register-unaligned FRintjeven 2) |
| 7938 | (register-unaligned FRintkeven 2))) |
| 7939 | (c-call VOID "@cpu@_media_register_not_aligned") |
| 7940 | (sequence () |
| 7941 | ; hack to get these referenced for profiling |
| 7942 | (set FRintieven (c-raw-call SI "frv_ref_SI" FRintieven)) |
| 7943 | (set FRintjeven (c-raw-call SI "frv_ref_SI" FRintjeven)) |
| 7944 | (set FRintkeven (c-raw-call SI "frv_ref_SI" FRintkeven)) |
| 7945 | (media-pack FRintieven FRintjeven FRintkeven 0) |
| 7946 | (media-pack FRintieven FRintjeven FRintkeven 1))) |
| 7947 | ((fr400 (unit u-media-3-quad |
| 7948 | (in FRinti FRintieven) |
| 7949 | (in FRintj FRintjeven) |
| 7950 | (out FRintk FRintkeven))) |
| 7951 | (fr500 (unit u-media-quad-arith |
| 7952 | (in FRinti FRintieven) |
| 7953 | (in FRintj FRintjeven) |
| 7954 | (out FRintk FRintkeven)))) |
| 7955 | ) |
| 7956 | |
| 7957 | (define-pmacro (media-unpack src soff targ toff) |
| 7958 | (sequence () |
| 7959 | (set (halfword hi targ toff) (halfword hi src soff)) |
| 7960 | (set (halfword lo targ toff) (halfword hi src soff)) |
| 7961 | (set (halfword hi targ (add toff 1)) (halfword lo src soff)) |
| 7962 | (set (halfword lo targ (add toff 1)) (halfword lo src soff))) |
| 7963 | ) |
| 7964 | |
| 7965 | (dni munpackh |
| 7966 | "Media halfword unpack" |
| 7967 | ((UNIT FM01) (FR500-MAJOR M-2) (FR400-MAJOR M-2)) |
| 7968 | "munpackh$pack $FRinti,$FRintkeven" |
| 7969 | (+ pack FRintkeven OP_7B FRinti OPE1_35 (FRj-null)) |
| 7970 | (if (register-unaligned FRintkeven 2) |
| 7971 | (c-call VOID "@cpu@_media_register_not_aligned") |
| 7972 | (sequence () |
| 7973 | ; hack to get these referenced for profiling |
| 7974 | (set FRinti (c-raw-call SI "frv_ref_SI" FRinti)) |
| 7975 | (set FRintkeven (c-raw-call SI "frv_ref_SI" FRintkeven)) |
| 7976 | (media-unpack FRinti 0 FRintkeven 0))) |
| 7977 | ((fr400 (unit u-media-dual-expand |
| 7978 | (out FRintk FRintkeven))) |
| 7979 | (fr500 (unit u-media-dual-expand |
| 7980 | (out FRintk FRintkeven)))) |
| 7981 | ) |
| 7982 | |
| 7983 | (dni mdunpackh |
| 7984 | "Media dual unpack" |
| 7985 | ((UNIT FM01) (FR500-MAJOR M-7) (MACH simple,tomcat,frv)) |
| 7986 | "mdunpackh$pack $FRintieven,$FRintk" |
| 7987 | (+ pack FRintk OP_7B FRintieven OPE1_37 (FRj-null)) |
| 7988 | (if (orif (register-unaligned FRintieven 2) (register-unaligned FRintk 4)) |
| 7989 | (c-call VOID "@cpu@_media_register_not_aligned") |
| 7990 | (sequence () |
| 7991 | ; hack to get these referenced for profiling |
| 7992 | (set FRintieven (c-raw-call SI "frv_ref_SI" FRintieven)) |
| 7993 | (set FRintk (c-raw-call SI "frv_ref_SI" FRintk)) |
| 7994 | (media-unpack FRintieven 0 FRintk 0) |
| 7995 | (media-unpack FRintieven 1 FRintk 2))) |
| 7996 | ((fr500 (unit u-media-dual-unpack |
| 7997 | (in FRinti FRintieven)))) |
| 7998 | ) |
| 7999 | |
| 8000 | (define-pmacro (ubyte num arg offset) |
| 8001 | (reg (.sym h-fr_ num) (add (index-of arg) offset))) |
| 8002 | |
| 8003 | (define-pmacro (mbtoh-semantics cond) |
| 8004 | (if (register-unaligned FRintkeven 2) |
| 8005 | (c-call VOID "@cpu@_media_register_not_aligned") |
| 8006 | (if cond |
| 8007 | (sequence () |
| 8008 | (set (halfword hi FRintkeven 0) (ubyte 3 FRintj 0)) |
| 8009 | (set (halfword lo FRintkeven 0) (ubyte 2 FRintj 0)) |
| 8010 | (set (halfword hi FRintkeven 1) (ubyte 1 FRintj 0)) |
| 8011 | (set (halfword lo FRintkeven 1) (ubyte 0 FRintj 0))))) |
| 8012 | ) |
| 8013 | |
| 8014 | (dni mbtoh |
| 8015 | "Media convert byte to halfword" |
| 8016 | ((UNIT FM01) (FR500-MAJOR M-2) (FR400-MAJOR M-2)) |
| 8017 | "mbtoh$pack $FRintj,$FRintkeven" |
| 8018 | (+ pack FRintkeven OP_7B (FRi-null) OPE1_38 FRintj) |
| 8019 | (sequence () |
| 8020 | ; hack to get these referenced for profiling |
| 8021 | (set FRintj (c-raw-call SI "frv_ref_SI" FRintj)) |
| 8022 | (set FRintkeven (c-raw-call SI "frv_ref_SI" FRintkeven)) |
| 8023 | (mbtoh-semantics 1)) |
| 8024 | ((fr400 (unit u-media-dual-expand |
| 8025 | (out FRintk FRintkeven))) |
| 8026 | (fr500 (unit u-media-dual-btoh |
| 8027 | (out FRintk FRintkeven)))) |
| 8028 | ) |
| 8029 | |
| 8030 | (dni cmbtoh |
| 8031 | "Conditional media convert byte to halfword" |
| 8032 | ((UNIT FM01) (FR500-MAJOR M-2) (FR400-MAJOR M-2) CONDITIONAL) |
| 8033 | "cmbtoh$pack $FRintj,$FRintkeven,$CCi,$cond" |
| 8034 | (+ pack FRintkeven OP_77 (FRi-null) CCi cond OPE4_0 FRintj) |
| 8035 | (sequence () |
| 8036 | ; hack to get these referenced for profiling |
| 8037 | (set FRintj (c-raw-call SI "frv_ref_SI" FRintj)) |
| 8038 | (set FRintkeven (c-raw-call SI "frv_ref_SI" FRintkeven)) |
| 8039 | (mbtoh-semantics (eq CCi (or cond 2)))) |
| 8040 | ((fr400 (unit u-media-dual-expand |
| 8041 | (out FRintk FRintkeven))) |
| 8042 | (fr500 (unit u-media-dual-btoh |
| 8043 | (out FRintk FRintkeven)))) |
| 8044 | ) |
| 8045 | |
| 8046 | (define-pmacro (mhtob-semantics cond) |
| 8047 | (if (register-unaligned FRintjeven 2) |
| 8048 | (c-call VOID "@cpu@_media_register_not_aligned") |
| 8049 | (if cond |
| 8050 | (sequence () |
| 8051 | (set (ubyte 3 FRintk 0) (halfword hi FRintjeven 0)) |
| 8052 | (set (ubyte 2 FRintk 0) (halfword lo FRintjeven 0)) |
| 8053 | (set (ubyte 1 FRintk 0) (halfword hi FRintjeven 1)) |
| 8054 | (set (ubyte 0 FRintk 0) (halfword lo FRintjeven 1))))) |
| 8055 | ) |
| 8056 | |
| 8057 | (dni mhtob |
| 8058 | "Media convert halfword to byte" |
| 8059 | ((UNIT FM01) (FR500-MAJOR M-2) (FR400-MAJOR M-2)) |
| 8060 | "mhtob$pack $FRintjeven,$FRintk" |
| 8061 | (+ pack FRintk OP_7B (FRi-null) OPE1_39 FRintjeven) |
| 8062 | (sequence () |
| 8063 | ; hack to get these referenced for profiling |
| 8064 | (set FRintjeven (c-raw-call SI "frv_ref_SI" FRintjeven)) |
| 8065 | (set FRintk (c-raw-call SI "frv_ref_SI" FRintk)) |
| 8066 | (mhtob-semantics 1)) |
| 8067 | ((fr400 (unit u-media-dual-htob |
| 8068 | (in FRintj FRintjeven))) |
| 8069 | (fr500 (unit u-media-dual-htob |
| 8070 | (in FRintj FRintjeven)))) |
| 8071 | ) |
| 8072 | |
| 8073 | (dni cmhtob |
| 8074 | "Conditional media convert halfword to byte" |
| 8075 | ((UNIT FM01) (FR500-MAJOR M-2) (FR400-MAJOR M-2) CONDITIONAL) |
| 8076 | "cmhtob$pack $FRintjeven,$FRintk,$CCi,$cond" |
| 8077 | (+ pack FRintk OP_77 (FRi-null) CCi cond OPE4_1 FRintjeven) |
| 8078 | (sequence () |
| 8079 | ; hack to get these referenced for profiling |
| 8080 | (set FRintjeven (c-raw-call SI "frv_ref_SI" FRintjeven)) |
| 8081 | (set FRintk (c-raw-call SI "frv_ref_SI" FRintk)) |
| 8082 | (mhtob-semantics (eq CCi (or cond 2)))) |
| 8083 | ((fr400 (unit u-media-dual-htob |
| 8084 | (in FRintj FRintjeven))) |
| 8085 | (fr500 (unit u-media-dual-htob |
| 8086 | (in FRintj FRintjeven)))) |
| 8087 | ) |
| 8088 | |
| 8089 | (define-pmacro (mbtohe-semantics cond) |
| 8090 | (if (register-unaligned FRintk 4) |
| 8091 | (c-call VOID "@cpu@_media_register_not_aligned") |
| 8092 | (if cond |
| 8093 | (sequence () |
| 8094 | (set (halfword hi FRintk 0) (ubyte 3 FRintj 0)) |
| 8095 | (set (halfword lo FRintk 0) (ubyte 3 FRintj 0)) |
| 8096 | (set (halfword hi FRintk 1) (ubyte 2 FRintj 0)) |
| 8097 | (set (halfword lo FRintk 1) (ubyte 2 FRintj 0)) |
| 8098 | (set (halfword hi FRintk 2) (ubyte 1 FRintj 0)) |
| 8099 | (set (halfword lo FRintk 2) (ubyte 1 FRintj 0)) |
| 8100 | (set (halfword hi FRintk 3) (ubyte 0 FRintj 0)) |
| 8101 | (set (halfword lo FRintk 3) (ubyte 0 FRintj 0))))) |
| 8102 | ) |
| 8103 | |
| 8104 | (dni mbtohe |
| 8105 | "Media convert byte to halfword extended" |
| 8106 | ((UNIT FM01) (FR500-MAJOR M-7) (MACH simple,tomcat,frv)) |
| 8107 | "mbtohe$pack $FRintj,$FRintk" |
| 8108 | (+ pack FRintk OP_7B (FRi-null) OPE1_3A FRintj) |
| 8109 | (sequence () |
| 8110 | ; hack to get these referenced for profiling |
| 8111 | (set FRintj (c-raw-call SI "frv_ref_SI" FRintj)) |
| 8112 | (set FRintk (c-raw-call SI "frv_ref_SI" FRintk)) |
| 8113 | (mbtohe-semantics 1)) |
| 8114 | ((fr500 (unit u-media-dual-btohe))) |
| 8115 | ) |
| 8116 | |
| 8117 | (dni cmbtohe |
| 8118 | "Conditional media convert byte to halfword extended" |
| 8119 | ((UNIT FM01) (FR500-MAJOR M-7) CONDITIONAL (MACH simple,tomcat,frv)) |
| 8120 | "cmbtohe$pack $FRintj,$FRintk,$CCi,$cond" |
| 8121 | (+ pack FRintk OP_77 (FRi-null) CCi cond OPE4_2 FRintj) |
| 8122 | (sequence () |
| 8123 | ; hack to get these referenced for profiling |
| 8124 | (set FRintj (c-raw-call SI "frv_ref_SI" FRintj)) |
| 8125 | (set FRintk (c-raw-call SI "frv_ref_SI" FRintk)) |
| 8126 | (mbtohe-semantics (eq CCi (or cond 2)))) |
| 8127 | ((fr500 (unit u-media-dual-btohe))) |
| 8128 | ) |
| 8129 | |
| 8130 | ; Media NOP |
| 8131 | ; A special case of mclracc |
| 8132 | (dni mnop "Media nop" |
| 8133 | ((UNIT FMALL) (FR500-MAJOR M-1) (FR400-MAJOR M-1)) |
| 8134 | "mnop$pack" |
| 8135 | (+ pack (f-ACC40Sk 63) OP_7B (f-A 1) (misc-null-10) OPE1_3B (FRj-null)) |
| 8136 | (nop) |
| 8137 | () |
| 8138 | ) |
| 8139 | |
| 8140 | ; mclracc with #A==0 |
| 8141 | (dni mclracc-0 |
| 8142 | "Media clear accumulator(s)" |
| 8143 | ((UNIT FM01) (FR500-MAJOR M-3) (FR400-MAJOR M-1)) |
| 8144 | "mclracc$pack $ACC40Sk,$A0" |
| 8145 | (+ pack ACC40Sk OP_7B (f-A 0) (misc-null-10) OPE1_3B (FRj-null)) |
| 8146 | (c-call VOID "@cpu@_clear_accumulators" (index-of ACC40Sk) 0) |
| 8147 | ((fr400 (unit u-media-4)) |
| 8148 | (fr500 (unit u-media))) |
| 8149 | ) |
| 8150 | |
| 8151 | ; mclracc with #A==1 |
| 8152 | (dni mclracc-1 |
| 8153 | "Media clear accumulator(s)" |
| 8154 | ((UNIT MCLRACC-1) (FR500-MAJOR M-6) (FR400-MAJOR M-2)) |
| 8155 | "mclracc$pack $ACC40Sk,$A1" |
| 8156 | (+ pack ACC40Sk OP_7B (f-A 1) (misc-null-10) OPE1_3B (FRj-null)) |
| 8157 | (c-call VOID "@cpu@_clear_accumulators" (index-of ACC40Sk) 1) |
| 8158 | ((fr400 (unit u-media-4)) |
| 8159 | (fr500 (unit u-media))) |
| 8160 | ) |
| 8161 | |
| 8162 | (dni mrdacc |
| 8163 | "Media read accumulator" |
| 8164 | ((UNIT FM01) (FR500-MAJOR M-2) (FR400-MAJOR M-1)) |
| 8165 | "mrdacc$pack $ACC40Si,$FRintk" |
| 8166 | (+ pack FRintk OP_7B ACC40Si OPE1_3C (FRj-null)) |
| 8167 | (set FRintk ACC40Si) |
| 8168 | ((fr400 (unit u-media-4)) |
| 8169 | (fr500 (unit u-media))) |
| 8170 | ) |
| 8171 | |
| 8172 | (dni mrdaccg |
| 8173 | "Media read accumulator guard" |
| 8174 | ((UNIT FM01) (FR500-MAJOR M-2) (FR400-MAJOR M-1)) |
| 8175 | "mrdaccg$pack $ACCGi,$FRintk" |
| 8176 | (+ pack FRintk OP_7B ACCGi OPE1_3E (FRj-null)) |
| 8177 | (set FRintk ACCGi) |
| 8178 | ((fr400 (unit u-media-4-accg)) |
| 8179 | (fr500 (unit u-media))) |
| 8180 | ) |
| 8181 | |
| 8182 | (dni mwtacc |
| 8183 | "Media write accumulator" |
| 8184 | ((UNIT FM01) (FR500-MAJOR M-3) (FR400-MAJOR M-1)) |
| 8185 | "mwtacc$pack $FRinti,$ACC40Sk" |
| 8186 | (+ pack ACC40Sk OP_7B FRinti OPE1_3D (FRj-null)) |
| 8187 | (set ACC40Sk (or (and ACC40Sk (const DI #xffffffff00000000)) |
| 8188 | FRinti)) |
| 8189 | ((fr400 (unit u-media-4)) |
| 8190 | (fr500 (unit u-media))) |
| 8191 | ) |
| 8192 | |
| 8193 | (dni mwtaccg |
| 8194 | "Media write accumulator guard" |
| 8195 | ((UNIT FM01) (FR500-MAJOR M-3) (FR400-MAJOR M-1)) |
| 8196 | "mwtaccg$pack $FRinti,$ACCGk" |
| 8197 | (+ pack ACCGk OP_7B FRinti OPE1_3F (FRj-null)) |
| 8198 | (set ACCGk FRinti) |
| 8199 | ((fr400 (unit u-media-4-accg)) |
| 8200 | (fr500 (unit u-media))) |
| 8201 | ) |
| 8202 | |
| 8203 | (define-pmacro (media-cop num op) |
| 8204 | (dni (.sym mcop num) |
| 8205 | "Media custom instruction" |
| 8206 | ((UNIT FM01) (FR500-MAJOR M-1) (MACH frv)) |
| 8207 | (.str "mcop" num "$pack $FRi,$FRj,$FRk") |
| 8208 | (+ pack FRk op FRi OPE1_00 FRj) |
| 8209 | (c-call VOID "@cpu@_media_cop" num) |
| 8210 | () |
| 8211 | ) |
| 8212 | ) |
| 8213 | |
| 8214 | (media-cop 1 OP_7C) |
| 8215 | (media-cop 2 OP_7D) |
| 8216 | |
| 8217 | ; nop |
| 8218 | ; A nop is defined to be a "ori gr0,0,gr0" |
| 8219 | ; This needn't be a macro-insn, but making it one greatly simplifies decode.c |
| 8220 | ; On the other hand spending a little time in the decoder is often worth it. |
| 8221 | ; |
| 8222 | (dnmi nop "nop" |
| 8223 | ((UNIT IALL) (FR500-MAJOR I-1) (FR400-MAJOR I-1)) |
| 8224 | "nop$pack" |
| 8225 | (emit ori pack (GRi 0) (s12 0) (GRk 0)) |
| 8226 | ) |
| 8227 | |
| 8228 | ; Floating point NOP |
| 8229 | (dni fnop |
| 8230 | "Floating point nop" |
| 8231 | ((UNIT FMALL) (FR500-MAJOR F-8) (MACH simple,tomcat,fr500,frv)) |
| 8232 | "fnop$pack" |
| 8233 | (+ pack (rd-null) OP_79 (FRi-null) OPE1_0D (FRj-null)) |
| 8234 | (nop) |
| 8235 | () |
| 8236 | ) |
| 8237 | |
| 8238 | ; A return instruction |
| 8239 | (dnmi ret "return" |
| 8240 | (NO-DIS (UNIT B01) (FR500-MAJOR B-3) (FR400-MAJOR B-3)) |
| 8241 | "ret$pack" |
| 8242 | (emit bralr pack (hint_taken 2)) |
| 8243 | ) |
| 8244 | |
| 8245 | (dnmi cmp "compare" |
| 8246 | (NO-DIS (UNIT IALL) (FR500-MAJOR I-1) (FR400-MAJOR I-1)) |
| 8247 | "cmp$pack $GRi,$GRj,$ICCi_1" |
| 8248 | (emit subcc pack GRi GRj (GRk 0) ICCi_1) |
| 8249 | ) |
| 8250 | |
| 8251 | (dnmi cmpi "compare immediate" |
| 8252 | (NO-DIS (UNIT IALL) (FR500-MAJOR I-1) (FR400-MAJOR I-1)) |
| 8253 | "cmpi$pack $GRi,$s10,$ICCi_1" |
| 8254 | (emit subicc pack GRi s10 (GRk 0) ICCi_1) |
| 8255 | ) |
| 8256 | |
| 8257 | (dnmi ccmp "conditional compare" |
| 8258 | (NO-DIS (UNIT IALL) (FR500-MAJOR I-1) (FR400-MAJOR I-1) CONDITIONAL) |
| 8259 | "ccmp$pack $GRi,$GRj,$CCi,$cond" |
| 8260 | (emit csubcc pack GRi GRj (GRk 0) CCi cond) |
| 8261 | ) |
| 8262 | |
| 8263 | (dnmi mov "move" |
| 8264 | (NO-DIS (UNIT IALL) (FR500-MAJOR I-1) (FR400-MAJOR I-1)) |
| 8265 | "mov$pack $GRi,$GRk" |
| 8266 | (emit ori pack GRi (s12 0) GRk) |
| 8267 | ) |
| 8268 | |
| 8269 | (dnmi cmov "conditional move" |
| 8270 | (NO-DIS (UNIT IALL) (FR500-MAJOR I-1) (FR400-MAJOR I-1) CONDITIONAL) |
| 8271 | "cmov$pack $GRi,$GRk,$CCi,$cond" |
| 8272 | (emit cor pack GRi (GRj 0) GRk CCi cond) |
| 8273 | ) |