| 1 | ; Toshiba MeP AVC Coprocessor description. -*- Scheme -*- |
| 2 | ; Copyright 2011 Free Software Foundation, Inc. |
| 3 | ; |
| 4 | ; Contributed by Red Hat Inc; |
| 5 | ; |
| 6 | ; This file is part of the GNU Binutils. |
| 7 | ; |
| 8 | ; This program is free software; you can redistribute it and/or modify |
| 9 | ; it under the terms of the GNU General Public License as published by |
| 10 | ; the Free Software Foundation; either version 3 of the License, or |
| 11 | ; (at your option) any later version. |
| 12 | ; |
| 13 | ; This program is distributed in the hope that it will be useful, |
| 14 | ; but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 15 | ; MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 16 | ; GNU General Public License for more details. |
| 17 | ; |
| 18 | ; You should have received a copy of the GNU General Public License |
| 19 | ; along with this program; if not, write to the Free Software |
| 20 | ; Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston, |
| 21 | ; MA 02110-1301, USA. |
| 22 | |
| 23 | ; This file was customized based upon the output of a2cgen 0.42 |
| 24 | |
| 25 | ;------------------------------------------------------------------------------ |
| 26 | ; MeP-Integrator will redefine the isa pmacros below to allow the bit widths |
| 27 | ; specified below for each ME_MODULE using this coprocessor. |
| 28 | ; This coprocessor requires 16 and 32 bit insns. |
| 29 | ;------------------------------------------------------------------------------ |
| 30 | ; begin-isas |
| 31 | (define-pmacro avc-core-isa () (ISA ext_core1)) |
| 32 | (define-pmacro avc-16-isa () (ISA ext_cop1_16)) |
| 33 | (define-pmacro avc-32-isa () (ISA ext_cop1_32)) |
| 34 | (define-pmacro all-avc-isas () (ISA ext_core1,ext_cop1_16,ext_cop1_32)) |
| 35 | ; end-isas |
| 36 | |
| 37 | (define-pmacro (dncpi xname xcomment xattrs xsyntax xformat xsemantics xtiming) |
| 38 | (dni xname xcomment (.splice (.unsplice xattrs) avc-core-isa) xsyntax xformat xsemantics xtiming)) |
| 39 | (define-pmacro (dn16i xname xcomment xattrs xsyntax xformat xsemantics xtiming) |
| 40 | (dni xname xcomment (.splice (.unsplice xattrs) avc-16-isa) xsyntax xformat xsemantics xtiming)) |
| 41 | (define-pmacro (dn32i xname xcomment xattrs xsyntax xformat xsemantics xtiming) |
| 42 | (dni xname xcomment (.splice (.unsplice xattrs) avc-32-isa) xsyntax xformat xsemantics xtiming)) |
| 43 | |
| 44 | ; register definitions |
| 45 | ; --------------------- |
| 46 | ; NOTE: This exists solely for the purpose of providing the proper register names for this coprocessor. |
| 47 | ; GDB will use the hardware table generated from this declaration. The operands use h-cr |
| 48 | ; from mep-core.cpu so that SID's semantic trace will be consistent between |
| 49 | ; the core and the coprocessor but use parse/print handlers which reference the hardware table |
| 50 | ; generated from this declarations |
| 51 | (define-hardware |
| 52 | (name h-cr-avc) |
| 53 | (comment "32-bit coprocessor registers for avc coprocessor") |
| 54 | (attrs VIRTUAL all-avc-isas) |
| 55 | (type register SI (32)) |
| 56 | (set (index newval) (c-call VOID "h_cr64_set" index (ext DI newval))) |
| 57 | (get (index) (trunc SI (c-call DI "h_cr64_get" index))) |
| 58 | (indices keyword "$c" (.map -reg-pair (.iota 8))) |
| 59 | ) |
| 60 | ; NOTE: This exists solely for the purpose of providing the proper register names for this coprocessor. |
| 61 | ; GDB will use the hardware table generated from this declaration. The operands use h-ccr |
| 62 | ; from mep-core.cpu so that SID's semantic trace will be consistent between |
| 63 | ; the core and the coprocessor but use parse/print handlers which reference the hardware table |
| 64 | ; generated from this declarations |
| 65 | (define-hardware |
| 66 | (name h-ccr-avc) |
| 67 | (comment "Coprocessor control registers for avc coprocessor") |
| 68 | (attrs VIRTUAL all-avc-isas) |
| 69 | (type register SI (64)) |
| 70 | (set (index newval) (c-call VOID "h_ccr_set" index newval)) |
| 71 | (get (index) (c-call SI "h_ccr_get" index)) |
| 72 | (indices keyword "" |
| 73 | (.splice |
| 74 | ($accl1 5) ($acch1 4) ($accl0 3) ($acch0 2) ($CBCR 1) ($csar 0) |
| 75 | ($cbcr 1) |
| 76 | (.unsplice (.map -ccr-reg-pair (.iota 6))) |
| 77 | ) |
| 78 | ) |
| 79 | ) |
| 80 | (dnop avccopCCR5 "Audio Copro Accumulator" (all-avc-isas) h-ccr 5) |
| 81 | (dnop avccopCCR4 "Audio Copro Accumulator" (all-avc-isas) h-ccr 4) |
| 82 | (dnop avccopCCR3 "Audio Copro Accumulator" (all-avc-isas) h-ccr 3) |
| 83 | (dnop avccopCCR2 "Audio Copro Accumulator" (all-avc-isas) h-ccr 2) |
| 84 | (dnop avccopCCR1 "Audio Copro Branch Condition Register" (all-avc-isas) h-ccr 1) |
| 85 | (dnop avccopCCR0 "Audio Copro Shift-Amount Register" (all-avc-isas) h-ccr 0) |
| 86 | |
| 87 | ; instruction field and operand definitions |
| 88 | (dnf f-avc-v3sub4u0 "sub opecode field" (avc-32-isa) 0 4) |
| 89 | (dnf f-avc-v1sub4u0 "sub opecode field" (avc-16-isa) 0 4) |
| 90 | (dnf f-avc-v3Rn "register field" (avc-32-isa) 4 4) |
| 91 | (dnop avcv3Rn "the operand definition" (avc-32-isa) h-gpr f-avc-v3Rn) |
| 92 | (dnf f-avc-v3CCRn "register field" (avc-32-isa) 4 4) |
| 93 | (define-full-operand avcv3CCRn "the operand definition" (avc-32-isa (CDATA REGNUM)) h-ccr DFLT f-avc-v3CCRn ( (parse "avc_ccr") (print "avc_ccr")) () ()) |
| 94 | (df f-avc-v3Imm16s4x24e32-hi "split immediate field hi" (avc-32-isa) 4 8 INT #f #f) |
| 95 | (df f-avc-v3Imm16s4x24e32-lo "split immediate field lo" (avc-32-isa) 24 8 UINT #f #f) |
| 96 | (define-multi-ifield |
| 97 | (name f-avc-v3Imm16s4x24e32) |
| 98 | (comment "split immediate field") |
| 99 | (attrs avc-32-isa) |
| 100 | (mode INT) |
| 101 | (subfields f-avc-v3Imm16s4x24e32-hi f-avc-v3Imm16s4x24e32-lo) |
| 102 | (insert (sequence () |
| 103 | (set (ifield f-avc-v3Imm16s4x24e32-hi) (sra INT (ifield f-avc-v3Imm16s4x24e32) 8)) |
| 104 | (set (ifield f-avc-v3Imm16s4x24e32-lo) (and (ifield f-avc-v3Imm16s4x24e32) #xff)))) |
| 105 | (extract (set (ifield f-avc-v3Imm16s4x24e32) |
| 106 | (or (sll (ifield f-avc-v3Imm16s4x24e32-hi) 8) (ifield f-avc-v3Imm16s4x24e32-lo)))) |
| 107 | ) |
| 108 | (dnop avcv3Imm16s4x24e32 "the operand definition" (avc-32-isa) h-sint f-avc-v3Imm16s4x24e32) |
| 109 | (dnf f-avc-v3CRn "register field" (avc-32-isa) 4 4) |
| 110 | (define-full-operand avcv3CRn "the operand definition" (avc-32-isa) h-cr DFLT f-avc-v3CRn ((parse "avc_cr") (print "avc_cr")) () ()) |
| 111 | (dnf f-avc-v1CRq "register field" (avc-16-isa) 4 4) |
| 112 | (define-full-operand avcv1CRq "the operand definition" (avc-16-isa) h-cr DFLT f-avc-v1CRq ((parse "avc_cr") (print "avc_cr")) () ()) |
| 113 | (dnf f-avc-v1sub4u4 "sub opecode field" (avc-16-isa) 4 4) |
| 114 | (dnf f-avc-c3Rn "register field" (avc-core-isa) 4 4) |
| 115 | (dnop avcc3Rn "the operand definition" (avc-core-isa) h-gpr f-avc-c3Rn) |
| 116 | (dnf f-avc-c3CCRn "register field" (avc-core-isa) 4 4) |
| 117 | (define-full-operand avcc3CCRn "the operand definition" (avc-core-isa (CDATA REGNUM)) h-ccr DFLT f-avc-c3CCRn ( (parse "avc_ccr") (print "avc_ccr")) () ()) |
| 118 | (df f-avc-c3Imm16s4x24e32-hi "split immediate field hi" (avc-core-isa) 4 8 INT #f #f) |
| 119 | (df f-avc-c3Imm16s4x24e32-lo "split immediate field lo" (avc-core-isa) 24 8 UINT #f #f) |
| 120 | (define-multi-ifield |
| 121 | (name f-avc-c3Imm16s4x24e32) |
| 122 | (comment "split immediate field") |
| 123 | (attrs avc-core-isa) |
| 124 | (mode INT) |
| 125 | (subfields f-avc-c3Imm16s4x24e32-hi f-avc-c3Imm16s4x24e32-lo) |
| 126 | (insert (sequence () |
| 127 | (set (ifield f-avc-c3Imm16s4x24e32-hi) (sra INT (ifield f-avc-c3Imm16s4x24e32) 8)) |
| 128 | (set (ifield f-avc-c3Imm16s4x24e32-lo) (and (ifield f-avc-c3Imm16s4x24e32) #xff)))) |
| 129 | (extract (set (ifield f-avc-c3Imm16s4x24e32) |
| 130 | (or (sll (ifield f-avc-c3Imm16s4x24e32-hi) 8) (ifield f-avc-c3Imm16s4x24e32-lo)))) |
| 131 | ) |
| 132 | (dnop avcc3Imm16s4x24e32 "the operand definition" (avc-core-isa) h-sint f-avc-c3Imm16s4x24e32) |
| 133 | (dnf f-avc-c3CRn "register field" (avc-core-isa) 4 4) |
| 134 | (define-full-operand avcc3CRn "the operand definition" (avc-core-isa) h-cr DFLT f-avc-c3CRn ((parse "avc_cr") (print "avc_cr")) () ()) |
| 135 | (dnf f-avc-c3sub4u4 "sub opecode field" (avc-core-isa) 4 4) |
| 136 | (dnf f-avc-v3Rm "register field" (avc-32-isa) 8 4) |
| 137 | (dnop avcv3Rm "the operand definition" (avc-32-isa) h-gpr f-avc-v3Rm) |
| 138 | (df f-avc-v1Imm5u8 "immediate field" (avc-16-isa) 8 5 UINT #f #f) |
| 139 | (dnop avcv1Imm5u8 "the operand definition" (avc-16-isa) h-uint f-avc-v1Imm5u8) |
| 140 | (df f-avc-v1Imm6s8 "immediate field" (avc-16-isa) 8 6 INT #f #f) |
| 141 | (dnop avcv1Imm6s8 "the operand definition" (avc-16-isa) h-sint f-avc-v1Imm6s8) |
| 142 | (df f-avc-v1Imm8s8 "immediate field" (avc-16-isa) 8 8 INT #f #f) |
| 143 | (dnop avcv1Imm8s8 "the operand definition" (avc-16-isa) h-sint f-avc-v1Imm8s8) |
| 144 | (dnf f-avc-v1CRp "register field" (avc-16-isa) 8 4) |
| 145 | (define-full-operand avcv1CRp "the operand definition" (avc-16-isa) h-cr DFLT f-avc-v1CRp ((parse "avc_cr") (print "avc_cr")) () ()) |
| 146 | (dnf f-avc-v1sub4u8 "sub opecode field" (avc-16-isa) 8 4) |
| 147 | (dnf f-avc-c3Rm "register field" (avc-core-isa) 8 4) |
| 148 | (dnop avcc3Rm "the operand definition" (avc-core-isa) h-gpr f-avc-c3Rm) |
| 149 | (dnf f-avc-c3sub4u8 "sub opecode field" (avc-core-isa) 8 4) |
| 150 | (dnf f-avc-v3sub4u12 "sub opecode field" (avc-32-isa) 12 4) |
| 151 | (dnf f-avc-v1CRo "register field" (avc-16-isa) 12 4) |
| 152 | (define-full-operand avcv1CRo "the operand definition" (avc-16-isa) h-cr DFLT f-avc-v1CRo ((parse "avc_cr") (print "avc_cr")) () ()) |
| 153 | (dnf f-avc-v1sub4u12 "sub opecode field" (avc-16-isa) 12 4) |
| 154 | (dnf f-avc-v1sub3u13 "sub opecode field" (avc-16-isa) 13 3) |
| 155 | (dnf f-avc-v1sub2u14 "sub opecode field" (avc-16-isa) 14 2) |
| 156 | (dnf f-avc-v3sub4u16 "sub opecode field" (avc-32-isa) 16 4) |
| 157 | (dnf f-avc-c3sub4u16 "sub opecode field" (avc-core-isa) 16 4) |
| 158 | (dnf f-avc-v3CRq "register field" (avc-32-isa) 20 4) |
| 159 | (define-full-operand avcv3CRq "the operand definition" (avc-32-isa) h-cr DFLT f-avc-v3CRq ((parse "avc_cr") (print "avc_cr")) () ()) |
| 160 | (dnf f-avc-v3sub4u20 "sub opecode field" (avc-32-isa) 20 4) |
| 161 | (dnf f-avc-c3CRq "register field" (avc-core-isa) 20 4) |
| 162 | (define-full-operand avcc3CRq "the operand definition" (avc-core-isa) h-cr DFLT f-avc-c3CRq ((parse "avc_cr") (print "avc_cr")) () ()) |
| 163 | (dnf f-avc-c3sub4u20 "sub opecode field" (avc-core-isa) 20 4) |
| 164 | (dnf f-avc-v3sub4u24 "sub opecode field" (avc-32-isa) 24 4) |
| 165 | (df f-avc-c3Imm5u24 "immediate field" (avc-core-isa) 24 5 UINT #f #f) |
| 166 | (dnop avcc3Imm5u24 "the operand definition" (avc-core-isa) h-uint f-avc-c3Imm5u24) |
| 167 | (df f-avc-c3Imm6s24 "immediate field" (avc-core-isa) 24 6 INT #f #f) |
| 168 | (dnop avcc3Imm6s24 "the operand definition" (avc-core-isa) h-sint f-avc-c3Imm6s24) |
| 169 | (dnf f-avc-c3CRp "register field" (avc-core-isa) 24 4) |
| 170 | (define-full-operand avcc3CRp "the operand definition" (avc-core-isa) h-cr DFLT f-avc-c3CRp ((parse "avc_cr") (print "avc_cr")) () ()) |
| 171 | (dnf f-avc-c3sub4u24 "sub opecode field" (avc-core-isa) 24 4) |
| 172 | (dnf f-avc-v3sub4u28 "sub opecode field" (avc-32-isa) 28 4) |
| 173 | (dnf f-avc-c3CRo "register field" (avc-core-isa) 28 4) |
| 174 | (define-full-operand avcc3CRo "the operand definition" (avc-core-isa) h-cr DFLT f-avc-c3CRo ((parse "avc_cr") (print "avc_cr")) () ()) |
| 175 | (dnf f-avc-c3sub4u28 "sub opecode field" (avc-core-isa) 28 4) |
| 176 | (dnf f-avc-c3sub3u29 "sub opecode field" (avc-core-isa) 29 3) |
| 177 | (dnf f-avc-c3sub2u30 "sub opecode field" (avc-core-isa) 30 2) |
| 178 | |
| 179 | ; instruction definitions |
| 180 | (dncpi cnop_avc_c3 "cnop" (OPTIONAL_CP_INSN (SLOT C3) (INTRINSIC "cnop")) |
| 181 | "cnop" |
| 182 | (+ MAJ_15 (f-sub4 7) (f-avc-c3sub4u28 #x0) (f-avc-c3sub4u24 #x0) (f-avc-c3sub4u20 #x0) (f-avc-c3sub4u16 #x0) (f-avc-c3sub4u8 #x0) (f-avc-c3sub4u4 #x0)) |
| 183 | (c-call "check_option_cp" pc) |
| 184 | ()) |
| 185 | (dncpi cmov1_avc_c3 "cmov1" (OPTIONAL_CP_INSN (SLOT C3) (INTRINSIC "cmov1")) |
| 186 | "cmov $avcc3CRn,$avcc3Rm" |
| 187 | (+ MAJ_15 (f-sub4 7) avcc3CRn avcc3Rm (f-avc-c3sub4u28 #x0) (f-avc-c3sub4u24 #x0) (f-avc-c3sub4u20 #x0) (f-avc-c3sub4u16 #xf)) |
| 188 | (sequence() (c-call "check_option_cp" pc) |
| 189 | (set avcc3CRn avcc3Rm) |
| 190 | ) |
| 191 | ()) |
| 192 | (dncpi cmov2_avc_c3 "cmov2" (OPTIONAL_CP_INSN (SLOT C3) (INTRINSIC "cmov2")) |
| 193 | "cmov $avcc3Rm,$avcc3CRn" |
| 194 | (+ MAJ_15 (f-sub4 7) avcc3Rm avcc3CRn (f-avc-c3sub4u28 #x1) (f-avc-c3sub4u24 #x0) (f-avc-c3sub4u20 #x0) (f-avc-c3sub4u16 #xf)) |
| 195 | (sequence() (c-call "check_option_cp" pc) |
| 196 | (set avcc3Rm avcc3CRn) |
| 197 | ) |
| 198 | ()) |
| 199 | (dncpi cmovi_avc_c3 "cmovi" (OPTIONAL_CP_INSN (SLOT C3) (INTRINSIC "cmovi")) |
| 200 | "cmovi $avcc3CRq,$avcc3Imm16s4x24e32" |
| 201 | (+ MAJ_15 (f-sub4 7) avcc3CRq avcc3Imm16s4x24e32 (f-avc-c3sub4u16 #xe)) |
| 202 | (sequence() (c-call "check_option_cp" pc) |
| 203 | (set avcc3CRq (ext SI avcc3Imm16s4x24e32)) |
| 204 | ) |
| 205 | ()) |
| 206 | (dncpi cmovc1_avc_c3 "cmovc1" (OPTIONAL_CP_INSN (SLOT C3) (INTRINSIC "cmovc1")) |
| 207 | "cmovc $avcc3CCRn,$avcc3Rm" |
| 208 | (+ MAJ_15 (f-sub4 7) avcc3CCRn avcc3Rm (f-avc-c3sub4u28 #x2) (f-avc-c3sub4u24 #x0) (f-avc-c3sub4u20 #x0) (f-avc-c3sub4u16 #xf)) |
| 209 | (sequence() (c-call "check_option_cp" pc) |
| 210 | (set avcc3CCRn avcc3Rm) |
| 211 | ) |
| 212 | ()) |
| 213 | (dncpi cmovc2_avc_c3 "cmovc2" (OPTIONAL_CP_INSN (SLOT C3) (INTRINSIC "cmovc2")) |
| 214 | "cmovc $avcc3Rm,$avcc3CCRn" |
| 215 | (+ MAJ_15 (f-sub4 7) avcc3Rm avcc3CCRn (f-avc-c3sub4u28 #x3) (f-avc-c3sub4u24 #x0) (f-avc-c3sub4u20 #x0) (f-avc-c3sub4u16 #xf)) |
| 216 | (sequence() (c-call "check_option_cp" pc) |
| 217 | (set avcc3Rm avcc3CCRn) |
| 218 | ) |
| 219 | ()) |
| 220 | (dncpi cmov_avc_c3 "cmov" (OPTIONAL_CP_INSN (SLOT C3) (INTRINSIC "cmov")) |
| 221 | "cmov $avcc3CRq,$avcc3CRp" |
| 222 | (+ MAJ_15 (f-sub4 7) avcc3CRq avcc3CRp (f-avc-c3sub4u28 #x3) (f-avc-c3sub4u16 #x0) (f-avc-c3sub4u8 #x0) (f-avc-c3sub4u4 #x0)) |
| 223 | (sequence() (c-call "check_option_cp" pc) |
| 224 | (set avcc3CRq avcc3CRp) |
| 225 | ) |
| 226 | ()) |
| 227 | (dncpi cadd3_avc_c3 "cadd3" (OPTIONAL_CP_INSN (SLOT C3) (INTRINSIC "cadd3")) |
| 228 | "cadd3 $avcc3CRo,$avcc3CRq,$avcc3CRp" |
| 229 | (+ MAJ_15 (f-sub4 7) avcc3CRo avcc3CRq avcc3CRp (f-avc-c3sub4u16 #x3) (f-avc-c3sub4u8 #x0) (f-avc-c3sub4u4 #x0)) |
| 230 | (sequence() (c-call "check_option_cp" pc) |
| 231 | (set avcc3CRo (add avcc3CRq avcc3CRp)) |
| 232 | ) |
| 233 | ()) |
| 234 | (dncpi caddi_avc_c3 "caddi" (OPTIONAL_CP_INSN (SLOT C3) (INTRINSIC "caddi")) |
| 235 | "caddi $avcc3CRq,$avcc3Imm6s24" |
| 236 | (+ MAJ_15 (f-sub4 7) avcc3CRq avcc3Imm6s24 (f-avc-c3sub2u30 #x0) (f-avc-c3sub4u16 #x1) (f-avc-c3sub4u8 #x0) (f-avc-c3sub4u4 #x0)) |
| 237 | (sequence() (c-call "check_option_cp" pc) |
| 238 | (set avcc3CRq (add avcc3CRq (ext SI avcc3Imm6s24))) |
| 239 | ) |
| 240 | ()) |
| 241 | (dncpi csub_avc_c3 "csub" (OPTIONAL_CP_INSN (SLOT C3) (INTRINSIC "csub")) |
| 242 | "csub $avcc3CRq,$avcc3CRp" |
| 243 | (+ MAJ_15 (f-sub4 7) avcc3CRq avcc3CRp (f-avc-c3sub4u28 #x2) (f-avc-c3sub4u16 #x0) (f-avc-c3sub4u8 #x0) (f-avc-c3sub4u4 #x0)) |
| 244 | (sequence() (c-call "check_option_cp" pc) |
| 245 | (set avcc3CRq (sub avcc3CRq avcc3CRp)) |
| 246 | ) |
| 247 | ()) |
| 248 | (dncpi cneg_avc_c3 "cneg" (OPTIONAL_CP_INSN (SLOT C3) (INTRINSIC "cneg")) |
| 249 | "cneg $avcc3CRq,$avcc3CRp" |
| 250 | (+ MAJ_15 (f-sub4 7) avcc3CRq avcc3CRp (f-avc-c3sub4u28 #x1) (f-avc-c3sub4u16 #x0) (f-avc-c3sub4u8 #x0) (f-avc-c3sub4u4 #x0)) |
| 251 | (sequence() (c-call "check_option_cp" pc) |
| 252 | (set avcc3CRq (neg avcc3CRp)) |
| 253 | ) |
| 254 | ()) |
| 255 | (dncpi cextb_avc_c3 "cextb" (OPTIONAL_CP_INSN (SLOT C3) (INTRINSIC "cextb")) |
| 256 | "cextb $avcc3CRq" |
| 257 | (+ MAJ_15 (f-sub4 7) avcc3CRq (f-avc-c3sub4u28 #x9) (f-avc-c3sub4u24 #x0) (f-avc-c3sub4u16 #x0) (f-avc-c3sub4u8 #x0) (f-avc-c3sub4u4 #x0)) |
| 258 | (sequence() (c-call "check_option_cp" pc) |
| 259 | (set avcc3CRq (ext SI (and QI (srl avcc3CRq 0) #xff))) |
| 260 | ) |
| 261 | ()) |
| 262 | (dncpi cexth_avc_c3 "cexth" (OPTIONAL_CP_INSN (SLOT C3) (INTRINSIC "cexth")) |
| 263 | "cexth $avcc3CRq" |
| 264 | (+ MAJ_15 (f-sub4 7) avcc3CRq (f-avc-c3sub4u28 #x9) (f-avc-c3sub4u24 #x2) (f-avc-c3sub4u16 #x0) (f-avc-c3sub4u8 #x0) (f-avc-c3sub4u4 #x0)) |
| 265 | (sequence() (c-call "check_option_cp" pc) |
| 266 | (set avcc3CRq (ext SI (and HI (srl avcc3CRq 0) #xffff))) |
| 267 | ) |
| 268 | ()) |
| 269 | (dncpi cextub_avc_c3 "cextub" (OPTIONAL_CP_INSN (SLOT C3) (INTRINSIC "cextub")) |
| 270 | "cextub $avcc3CRq" |
| 271 | (+ MAJ_15 (f-sub4 7) avcc3CRq (f-avc-c3sub4u28 #x9) (f-avc-c3sub4u24 #x8) (f-avc-c3sub4u16 #x0) (f-avc-c3sub4u8 #x0) (f-avc-c3sub4u4 #x0)) |
| 272 | (sequence() (c-call "check_option_cp" pc) |
| 273 | (set avcc3CRq (zext SI (and QI (srl avcc3CRq 0) #xff))) |
| 274 | ) |
| 275 | ()) |
| 276 | (dncpi cextuh_avc_c3 "cextuh" (OPTIONAL_CP_INSN (SLOT C3) (INTRINSIC "cextuh")) |
| 277 | "cextuh $avcc3CRq" |
| 278 | (+ MAJ_15 (f-sub4 7) avcc3CRq (f-avc-c3sub4u28 #x9) (f-avc-c3sub4u24 #xa) (f-avc-c3sub4u16 #x0) (f-avc-c3sub4u8 #x0) (f-avc-c3sub4u4 #x0)) |
| 279 | (sequence() (c-call "check_option_cp" pc) |
| 280 | (set avcc3CRq (zext SI (and HI (srl avcc3CRq 0) #xffff))) |
| 281 | ) |
| 282 | ()) |
| 283 | (dncpi cscltz_avc_c3 "cscltz" (OPTIONAL_CP_INSN (SLOT C3) (INTRINSIC "cscltz")) |
| 284 | "cscltz $avcc3CRq" |
| 285 | (+ MAJ_15 (f-sub4 7) avcc3CRq (f-avc-c3sub4u28 #xa) (f-avc-c3sub4u24 #xa) (f-avc-c3sub4u16 #x0) (f-avc-c3sub4u8 #x0) (f-avc-c3sub4u4 #x0)) |
| 286 | (sequence() (c-call "check_option_cp" pc) |
| 287 | (if (lt (ext SI avcc3CRq) (ext SI 0)) (set avccopCCR1 (or (sll (srl avccopCCR1 1) 1) (srl (sll (zext SI 1) 31) 31))) |
| 288 | (set avccopCCR1 (or (sll (srl avccopCCR1 1) 1) (srl (sll (zext SI 0) 31) 31))) |
| 289 | ) |
| 290 | ) |
| 291 | ()) |
| 292 | (dncpi cldz_avc_c3 "cldz" (OPTIONAL_CP_INSN (SLOT C3) (INTRINSIC "cldz")) |
| 293 | "cldz $avcc3CRq,$avcc3CRp" |
| 294 | (+ MAJ_15 (f-sub4 7) avcc3CRq avcc3CRp (f-avc-c3sub4u28 #x0) (f-avc-c3sub4u16 #x5) (f-avc-c3sub4u8 #x0) (f-avc-c3sub4u4 #x0)) |
| 295 | (sequence() (c-call "check_option_cp" pc) |
| 296 | (if (and avcc3CRp #x80000000) (set avcc3CRq 0) |
| 297 | (if (and avcc3CRp #x40000000) (set avcc3CRq 1) |
| 298 | (if (and avcc3CRp #x20000000) (set avcc3CRq 2) |
| 299 | (if (and avcc3CRp #x10000000) (set avcc3CRq 3) |
| 300 | (if (and avcc3CRp #x8000000) (set avcc3CRq 4) |
| 301 | (if (and avcc3CRp #x4000000) (set avcc3CRq 5) |
| 302 | (if (and avcc3CRp #x2000000) (set avcc3CRq 6) |
| 303 | (if (and avcc3CRp #x1000000) (set avcc3CRq 7) |
| 304 | (if (and avcc3CRp #x800000) (set avcc3CRq 8) |
| 305 | (if (and avcc3CRp #x400000) (set avcc3CRq 9) |
| 306 | (if (and avcc3CRp #x200000) (set avcc3CRq 10) |
| 307 | (if (and avcc3CRp #x100000) (set avcc3CRq 11) |
| 308 | (if (and avcc3CRp #x80000) (set avcc3CRq 12) |
| 309 | (if (and avcc3CRp #x40000) (set avcc3CRq 13) |
| 310 | (if (and avcc3CRp #x20000) (set avcc3CRq 14) |
| 311 | (if (and avcc3CRp #x10000) (set avcc3CRq 15) |
| 312 | (if (and avcc3CRp #x8000) (set avcc3CRq 16) |
| 313 | (if (and avcc3CRp #x4000) (set avcc3CRq 17) |
| 314 | (if (and avcc3CRp #x2000) (set avcc3CRq 18) |
| 315 | (if (and avcc3CRp #x1000) (set avcc3CRq 19) |
| 316 | (if (and avcc3CRp #x800) (set avcc3CRq 20) |
| 317 | (if (and avcc3CRp #x400) (set avcc3CRq 21) |
| 318 | (if (and avcc3CRp #x200) (set avcc3CRq 22) |
| 319 | (if (and avcc3CRp #x100) (set avcc3CRq 23) |
| 320 | (if (and avcc3CRp #x80) (set avcc3CRq 24) |
| 321 | (if (and avcc3CRp #x40) (set avcc3CRq 25) |
| 322 | (if (and avcc3CRp #x20) (set avcc3CRq 26) |
| 323 | (if (and avcc3CRp #x10) (set avcc3CRq 27) |
| 324 | (if (and avcc3CRp #x8) (set avcc3CRq 28) |
| 325 | (if (and avcc3CRp #x4) (set avcc3CRq 29) |
| 326 | (if (and avcc3CRp #x2) (set avcc3CRq 30) |
| 327 | (if (and avcc3CRp #x1) (set avcc3CRq 31) |
| 328 | (set avcc3CRq 32) |
| 329 | ) |
| 330 | ) |
| 331 | ) |
| 332 | ) |
| 333 | ) |
| 334 | ) |
| 335 | ) |
| 336 | ) |
| 337 | ) |
| 338 | ) |
| 339 | ) |
| 340 | ) |
| 341 | ) |
| 342 | ) |
| 343 | ) |
| 344 | ) |
| 345 | ) |
| 346 | ) |
| 347 | ) |
| 348 | ) |
| 349 | ) |
| 350 | ) |
| 351 | ) |
| 352 | ) |
| 353 | ) |
| 354 | ) |
| 355 | ) |
| 356 | ) |
| 357 | ) |
| 358 | ) |
| 359 | ) |
| 360 | ) |
| 361 | ) |
| 362 | ()) |
| 363 | (dncpi cabs_avc_c3 "cabs" (OPTIONAL_CP_INSN (SLOT C3) (INTRINSIC "cabs")) |
| 364 | "cabs $avcc3CRq,$avcc3CRp" |
| 365 | (+ MAJ_15 (f-sub4 7) avcc3CRq avcc3CRp (f-avc-c3sub4u28 #x3) (f-avc-c3sub4u16 #x5) (f-avc-c3sub4u8 #x0) (f-avc-c3sub4u4 #x0)) |
| 366 | (sequence() (c-call "check_option_cp" pc) |
| 367 | (set avcc3CRq (abs (ext SI (subword SI (sub avcc3CRq avcc3CRp) 1)))) |
| 368 | ) |
| 369 | ()) |
| 370 | (dncpi cad1s_avc_c3 "cad1s" (OPTIONAL_CP_INSN (SLOT C3) (INTRINSIC "cad1s")) |
| 371 | "cad1s $avcc3CRq,$avcc3CRp" |
| 372 | (+ MAJ_15 (f-sub4 7) avcc3CRq avcc3CRp (f-avc-c3sub4u28 #x1) (f-avc-c3sub4u16 #x5) (f-avc-c3sub4u8 #x0) (f-avc-c3sub4u4 #x0)) |
| 373 | (sequence((DI tmp0)) (c-call "check_option_cp" pc) |
| 374 | (set tmp0 (ext SI (subword SI (add avcc3CRq avcc3CRp) 1))) |
| 375 | (set avcc3CRq (subword SI (sra tmp0 1) 1)) |
| 376 | ) |
| 377 | ()) |
| 378 | (dncpi csb1s_avc_c3 "csb1s" (OPTIONAL_CP_INSN (SLOT C3) (INTRINSIC "csb1s")) |
| 379 | "csb1s $avcc3CRq,$avcc3CRp" |
| 380 | (+ MAJ_15 (f-sub4 7) avcc3CRq avcc3CRp (f-avc-c3sub4u28 #x2) (f-avc-c3sub4u16 #x5) (f-avc-c3sub4u8 #x0) (f-avc-c3sub4u4 #x0)) |
| 381 | (sequence((DI tmp0)) (c-call "check_option_cp" pc) |
| 382 | (set tmp0 (ext SI (subword SI (sub avcc3CRq avcc3CRp) 1))) |
| 383 | (set avcc3CRq (subword SI (sra tmp0 1) 1)) |
| 384 | ) |
| 385 | ()) |
| 386 | (dncpi cmin_avc_c3 "cmin" (OPTIONAL_CP_INSN (SLOT C3) (INTRINSIC "cmin")) |
| 387 | "cmin $avcc3CRq,$avcc3CRp" |
| 388 | (+ MAJ_15 (f-sub4 7) avcc3CRq avcc3CRp (f-avc-c3sub4u28 #x8) (f-avc-c3sub4u16 #x5) (f-avc-c3sub4u8 #x0) (f-avc-c3sub4u4 #x0)) |
| 389 | (sequence() (c-call "check_option_cp" pc) |
| 390 | (if (lt (ext SI avcc3CRq) (ext SI avcc3CRp)) (set avcc3CRq avcc3CRq) |
| 391 | (set avcc3CRq avcc3CRp) |
| 392 | ) |
| 393 | ) |
| 394 | ()) |
| 395 | (dncpi cmax_avc_c3 "cmax" (OPTIONAL_CP_INSN (SLOT C3) (INTRINSIC "cmax")) |
| 396 | "cmax $avcc3CRq,$avcc3CRp" |
| 397 | (+ MAJ_15 (f-sub4 7) avcc3CRq avcc3CRp (f-avc-c3sub4u28 #x9) (f-avc-c3sub4u16 #x5) (f-avc-c3sub4u8 #x0) (f-avc-c3sub4u4 #x0)) |
| 398 | (sequence() (c-call "check_option_cp" pc) |
| 399 | (if (gt (ext SI avcc3CRq) (ext SI avcc3CRp)) (set avcc3CRq avcc3CRq) |
| 400 | (set avcc3CRq avcc3CRp) |
| 401 | ) |
| 402 | ) |
| 403 | ()) |
| 404 | (dncpi cminu_avc_c3 "cminu" (OPTIONAL_CP_INSN (SLOT C3) (INTRINSIC "cminu")) |
| 405 | "cminu $avcc3CRq,$avcc3CRp" |
| 406 | (+ MAJ_15 (f-sub4 7) avcc3CRq avcc3CRp (f-avc-c3sub4u28 #xa) (f-avc-c3sub4u16 #x5) (f-avc-c3sub4u8 #x0) (f-avc-c3sub4u4 #x0)) |
| 407 | (sequence() (c-call "check_option_cp" pc) |
| 408 | (if (ltu (zext SI avcc3CRq) (zext SI avcc3CRp)) (set avcc3CRq avcc3CRq) |
| 409 | (set avcc3CRq avcc3CRp) |
| 410 | ) |
| 411 | ) |
| 412 | ()) |
| 413 | (dncpi cmaxu_avc_c3 "cmaxu" (OPTIONAL_CP_INSN (SLOT C3) (INTRINSIC "cmaxu")) |
| 414 | "cmaxu $avcc3CRq,$avcc3CRp" |
| 415 | (+ MAJ_15 (f-sub4 7) avcc3CRq avcc3CRp (f-avc-c3sub4u28 #xb) (f-avc-c3sub4u16 #x5) (f-avc-c3sub4u8 #x0) (f-avc-c3sub4u4 #x0)) |
| 416 | (sequence() (c-call "check_option_cp" pc) |
| 417 | (if (gtu (zext SI avcc3CRq) (zext SI avcc3CRp)) (set avcc3CRq avcc3CRq) |
| 418 | (set avcc3CRq avcc3CRp) |
| 419 | ) |
| 420 | ) |
| 421 | ()) |
| 422 | (dncpi cclipi_avc_c3 "cclipi" (OPTIONAL_CP_INSN (SLOT C3) (INTRINSIC "cclipi")) |
| 423 | "cclipi $avcc3CRq,$avcc3Imm5u24" |
| 424 | (+ MAJ_15 (f-sub4 7) avcc3CRq avcc3Imm5u24 (f-avc-c3sub3u29 #x4) (f-avc-c3sub4u16 #x5) (f-avc-c3sub4u8 #x0) (f-avc-c3sub4u4 #x0)) |
| 425 | (sequence((DI tmp1)(DI tmp0)) (c-call "check_option_cp" pc) |
| 426 | (if (eq (zext SI avcc3Imm5u24) (ext SI 0)) (set avcc3CRq 0) |
| 427 | (sequence() (set tmp0 (sll 1 (sub avcc3Imm5u24 1))) |
| 428 | (set tmp1 (sub (subword SI tmp0 1) 1)) |
| 429 | (if (gt (ext SI avcc3CRq) (ext SI (subword SI tmp1 1))) (set avcc3CRq (subword SI tmp1 1)) |
| 430 | (if (lt (ext SI avcc3CRq) (ext SI (neg (subword SI tmp0 1)))) (set avcc3CRq (neg (subword SI tmp0 1))) |
| 431 | (set avcc3CRq avcc3CRq) |
| 432 | ) |
| 433 | ) |
| 434 | ) |
| 435 | ) |
| 436 | ) |
| 437 | ()) |
| 438 | (dncpi cclipiu_avc_c3 "cclipiu" (OPTIONAL_CP_INSN (SLOT C3) (INTRINSIC "cclipiu")) |
| 439 | "cclipiu $avcc3CRq,$avcc3Imm5u24" |
| 440 | (+ MAJ_15 (f-sub4 7) avcc3CRq avcc3Imm5u24 (f-avc-c3sub3u29 #x5) (f-avc-c3sub4u16 #x5) (f-avc-c3sub4u8 #x0) (f-avc-c3sub4u4 #x0)) |
| 441 | (sequence((DI tmp1)(DI tmp0)) (c-call "check_option_cp" pc) |
| 442 | (if (eq (zext SI avcc3Imm5u24) (ext SI 0)) (set avcc3CRq 0) |
| 443 | (sequence() (set tmp0 (sub (sll 1 avcc3Imm5u24) 1)) |
| 444 | (if (gt (ext SI avcc3CRq) (ext SI (subword SI tmp0 1))) (set avcc3CRq (subword SI tmp0 1)) |
| 445 | (if (lt (ext SI avcc3CRq) (ext SI 0)) (set avcc3CRq 0) |
| 446 | (set avcc3CRq avcc3CRq) |
| 447 | ) |
| 448 | ) |
| 449 | ) |
| 450 | ) |
| 451 | ) |
| 452 | ()) |
| 453 | (dncpi cor_avc_c3 "cor" (OPTIONAL_CP_INSN (SLOT C3) (INTRINSIC "cor")) |
| 454 | "cor $avcc3CRq,$avcc3CRp" |
| 455 | (+ MAJ_15 (f-sub4 7) avcc3CRq avcc3CRp (f-avc-c3sub4u28 #x4) (f-avc-c3sub4u16 #x0) (f-avc-c3sub4u8 #x0) (f-avc-c3sub4u4 #x0)) |
| 456 | (sequence() (c-call "check_option_cp" pc) |
| 457 | (set avcc3CRq (or avcc3CRq avcc3CRp)) |
| 458 | ) |
| 459 | ()) |
| 460 | (dncpi cand_avc_c3 "cand" (OPTIONAL_CP_INSN (SLOT C3) (INTRINSIC "cand")) |
| 461 | "cand $avcc3CRq,$avcc3CRp" |
| 462 | (+ MAJ_15 (f-sub4 7) avcc3CRq avcc3CRp (f-avc-c3sub4u28 #x5) (f-avc-c3sub4u16 #x0) (f-avc-c3sub4u8 #x0) (f-avc-c3sub4u4 #x0)) |
| 463 | (sequence() (c-call "check_option_cp" pc) |
| 464 | (set avcc3CRq (and avcc3CRq avcc3CRp)) |
| 465 | ) |
| 466 | ()) |
| 467 | (dncpi cxor_avc_c3 "cxor" (OPTIONAL_CP_INSN (SLOT C3) (INTRINSIC "cxor")) |
| 468 | "cxor $avcc3CRq,$avcc3CRp" |
| 469 | (+ MAJ_15 (f-sub4 7) avcc3CRq avcc3CRp (f-avc-c3sub4u28 #x6) (f-avc-c3sub4u16 #x0) (f-avc-c3sub4u8 #x0) (f-avc-c3sub4u4 #x0)) |
| 470 | (sequence() (c-call "check_option_cp" pc) |
| 471 | (set avcc3CRq (xor avcc3CRq avcc3CRp)) |
| 472 | ) |
| 473 | ()) |
| 474 | (dncpi cnor_avc_c3 "cnor" (OPTIONAL_CP_INSN (SLOT C3) (INTRINSIC "cnor")) |
| 475 | "cnor $avcc3CRq,$avcc3CRp" |
| 476 | (+ MAJ_15 (f-sub4 7) avcc3CRq avcc3CRp (f-avc-c3sub4u28 #x7) (f-avc-c3sub4u16 #x0) (f-avc-c3sub4u8 #x0) (f-avc-c3sub4u4 #x0)) |
| 477 | (sequence() (c-call "check_option_cp" pc) |
| 478 | (set avcc3CRq (inv (or avcc3CRq avcc3CRp))) |
| 479 | ) |
| 480 | ()) |
| 481 | (dncpi csra_avc_c3 "csra" (OPTIONAL_CP_INSN (SLOT C3) (INTRINSIC "csra")) |
| 482 | "csra $avcc3CRq,$avcc3CRp" |
| 483 | (+ MAJ_15 (f-sub4 7) avcc3CRq avcc3CRp (f-avc-c3sub4u28 #xc) (f-avc-c3sub4u16 #x0) (f-avc-c3sub4u8 #x0) (f-avc-c3sub4u4 #x0)) |
| 484 | (sequence() (c-call "check_option_cp" pc) |
| 485 | (set avcc3CRq (sra avcc3CRq (and QI (srl avcc3CRp 0) #x1f))) |
| 486 | ) |
| 487 | ()) |
| 488 | (dncpi csrl_avc_c3 "csrl" (OPTIONAL_CP_INSN (SLOT C3) (INTRINSIC "csrl")) |
| 489 | "csrl $avcc3CRq,$avcc3CRp" |
| 490 | (+ MAJ_15 (f-sub4 7) avcc3CRq avcc3CRp (f-avc-c3sub4u28 #xd) (f-avc-c3sub4u16 #x0) (f-avc-c3sub4u8 #x0) (f-avc-c3sub4u4 #x0)) |
| 491 | (sequence() (c-call "check_option_cp" pc) |
| 492 | (set avcc3CRq (srl avcc3CRq (and QI (srl avcc3CRp 0) #x1f))) |
| 493 | ) |
| 494 | ()) |
| 495 | (dncpi csll_avc_c3 "csll" (OPTIONAL_CP_INSN (SLOT C3) (INTRINSIC "csll")) |
| 496 | "csll $avcc3CRq,$avcc3CRp" |
| 497 | (+ MAJ_15 (f-sub4 7) avcc3CRq avcc3CRp (f-avc-c3sub4u28 #xe) (f-avc-c3sub4u16 #x0) (f-avc-c3sub4u8 #x0) (f-avc-c3sub4u4 #x0)) |
| 498 | (sequence() (c-call "check_option_cp" pc) |
| 499 | (set avcc3CRq (sll avcc3CRq (and QI (srl avcc3CRp 0) #x1f))) |
| 500 | ) |
| 501 | ()) |
| 502 | (dncpi csrai_avc_c3 "csrai" (OPTIONAL_CP_INSN (SLOT C3) (INTRINSIC "csrai")) |
| 503 | "csrai $avcc3CRq,$avcc3Imm5u24" |
| 504 | (+ MAJ_15 (f-sub4 7) avcc3CRq avcc3Imm5u24 (f-avc-c3sub3u29 #x2) (f-avc-c3sub4u16 #x1) (f-avc-c3sub4u8 #x0) (f-avc-c3sub4u4 #x0)) |
| 505 | (sequence() (c-call "check_option_cp" pc) |
| 506 | (set avcc3CRq (sra avcc3CRq avcc3Imm5u24)) |
| 507 | ) |
| 508 | ()) |
| 509 | (dncpi csrli_avc_c3 "csrli" (OPTIONAL_CP_INSN (SLOT C3) (INTRINSIC "csrli")) |
| 510 | "csrli $avcc3CRq,$avcc3Imm5u24" |
| 511 | (+ MAJ_15 (f-sub4 7) avcc3CRq avcc3Imm5u24 (f-avc-c3sub3u29 #x3) (f-avc-c3sub4u16 #x1) (f-avc-c3sub4u8 #x0) (f-avc-c3sub4u4 #x0)) |
| 512 | (sequence() (c-call "check_option_cp" pc) |
| 513 | (set avcc3CRq (srl avcc3CRq avcc3Imm5u24)) |
| 514 | ) |
| 515 | ()) |
| 516 | (dncpi cslli_avc_c3 "cslli" (OPTIONAL_CP_INSN (SLOT C3) (INTRINSIC "cslli")) |
| 517 | "cslli $avcc3CRq,$avcc3Imm5u24" |
| 518 | (+ MAJ_15 (f-sub4 7) avcc3CRq avcc3Imm5u24 (f-avc-c3sub3u29 #x6) (f-avc-c3sub4u16 #x1) (f-avc-c3sub4u8 #x0) (f-avc-c3sub4u4 #x0)) |
| 519 | (sequence() (c-call "check_option_cp" pc) |
| 520 | (set avcc3CRq (sll avcc3CRq avcc3Imm5u24)) |
| 521 | ) |
| 522 | ()) |
| 523 | (dncpi cfsft_avc_c3 "cfsft" (OPTIONAL_CP_INSN (SLOT C3) (INTRINSIC "cfsft")) |
| 524 | "cfsft $avcc3CRq,$avcc3CRp" |
| 525 | (+ MAJ_15 (f-sub4 7) avcc3CRq avcc3CRp (f-avc-c3sub4u28 #xf) (f-avc-c3sub4u16 #x0) (f-avc-c3sub4u8 #x0) (f-avc-c3sub4u4 #x0)) |
| 526 | (sequence() (c-call "check_option_cp" pc) |
| 527 | (set avcc3CRq (subword SI (sll (or (sll (zext DI (zext SI avcc3CRq)) 32) (zext DI avcc3CRp)) (and QI (srl avccopCCR0 0) #x3f)) 0)) |
| 528 | ) |
| 529 | ()) |
| 530 | (dncpi cfsfta0_avc_c3 "cfsfta0" (OPTIONAL_CP_INSN (SLOT C3) (INTRINSIC "cfsfta0")) |
| 531 | "cfsfta0 $avcc3CRq" |
| 532 | (+ MAJ_15 (f-sub4 7) avcc3CRq (f-avc-c3sub4u28 #x7) (f-avc-c3sub4u24 #x0) (f-avc-c3sub4u16 #x1) (f-avc-c3sub4u8 #x0) (f-avc-c3sub4u4 #x0)) |
| 533 | (sequence() (c-call "check_option_cp" pc) |
| 534 | (set avcc3CRq (subword SI (sll (or (sll (zext DI (zext SI avccopCCR2)) 32) (zext DI avccopCCR3)) (and QI (srl avccopCCR0 0) #x3f)) 0)) |
| 535 | ) |
| 536 | ()) |
| 537 | (dncpi cfsfta1_avc_c3 "cfsfta1" (OPTIONAL_CP_INSN (SLOT C3) (INTRINSIC "cfsfta1")) |
| 538 | "cfsfta1 $avcc3CRq" |
| 539 | (+ MAJ_15 (f-sub4 7) avcc3CRq (f-avc-c3sub4u28 #xf) (f-avc-c3sub4u24 #x0) (f-avc-c3sub4u16 #x1) (f-avc-c3sub4u8 #x0) (f-avc-c3sub4u4 #x0)) |
| 540 | (sequence() (c-call "check_option_cp" pc) |
| 541 | (set avcc3CRq (subword SI (sll (or (sll (zext DI (zext SI avccopCCR4)) 32) (zext DI avccopCCR5)) (and QI (srl avccopCCR0 0) #x3f)) 0)) |
| 542 | ) |
| 543 | ()) |
| 544 | (dncpi cmula0_avc_c3 "cmula0" (OPTIONAL_CP_INSN (SLOT C3) (INTRINSIC "cmula0")) |
| 545 | "cmula0 $avcc3CRq,$avcc3CRp" |
| 546 | (+ MAJ_15 (f-sub4 7) avcc3CRq avcc3CRp (f-avc-c3sub4u28 #x0) (f-avc-c3sub4u16 #x4) (f-avc-c3sub4u8 #x0) (f-avc-c3sub4u4 #x0)) |
| 547 | (sequence((DI concat0)) (c-call "check_option_cp" pc) |
| 548 | (set concat0 (mul (ext DI avcc3CRq) (ext DI avcc3CRp))) |
| 549 | (set avccopCCR2 (subword SI concat0 0)) |
| 550 | (set avccopCCR3 (subword SI concat0 1)) |
| 551 | ) |
| 552 | ()) |
| 553 | (dncpi cmulua0_avc_c3 "cmulua0" (OPTIONAL_CP_INSN (SLOT C3) (INTRINSIC "cmulua0")) |
| 554 | "cmulua0 $avcc3CRq,$avcc3CRp" |
| 555 | (+ MAJ_15 (f-sub4 7) avcc3CRq avcc3CRp (f-avc-c3sub4u28 #x1) (f-avc-c3sub4u16 #x4) (f-avc-c3sub4u8 #x0) (f-avc-c3sub4u4 #x0)) |
| 556 | (sequence((DI concat1)) (c-call "check_option_cp" pc) |
| 557 | (set concat1 (mul (zext DI avcc3CRq) (zext DI avcc3CRp))) |
| 558 | (set avccopCCR2 (subword SI concat1 0)) |
| 559 | (set avccopCCR3 (subword SI concat1 1)) |
| 560 | ) |
| 561 | ()) |
| 562 | (dncpi cnmula0_avc_c3 "cnmula0" (OPTIONAL_CP_INSN (SLOT C3) (INTRINSIC "cnmula0")) |
| 563 | "cnmula0 $avcc3CRq,$avcc3CRp" |
| 564 | (+ MAJ_15 (f-sub4 7) avcc3CRq avcc3CRp (f-avc-c3sub4u28 #x2) (f-avc-c3sub4u16 #x4) (f-avc-c3sub4u8 #x0) (f-avc-c3sub4u4 #x0)) |
| 565 | (sequence((DI concat2)) (c-call "check_option_cp" pc) |
| 566 | (set concat2 (neg (mul (ext DI avcc3CRq) (ext DI avcc3CRp)))) |
| 567 | (set avccopCCR2 (subword SI concat2 0)) |
| 568 | (set avccopCCR3 (subword SI concat2 1)) |
| 569 | ) |
| 570 | ()) |
| 571 | (dncpi cmada0_avc_c3 "cmada0" (OPTIONAL_CP_INSN (SLOT C3) (INTRINSIC "cmada0")) |
| 572 | "cmada0 $avcc3CRq,$avcc3CRp" |
| 573 | (+ MAJ_15 (f-sub4 7) avcc3CRq avcc3CRp (f-avc-c3sub4u28 #x4) (f-avc-c3sub4u16 #x4) (f-avc-c3sub4u8 #x0) (f-avc-c3sub4u4 #x0)) |
| 574 | (sequence((DI concat3)) (c-call "check_option_cp" pc) |
| 575 | (set concat3 (add (or (sll (zext DI (zext SI avccopCCR2)) 32) (zext DI avccopCCR3)) (mul (ext DI avcc3CRq) (ext DI avcc3CRp)))) |
| 576 | (set avccopCCR2 (subword SI concat3 0)) |
| 577 | (set avccopCCR3 (subword SI concat3 1)) |
| 578 | ) |
| 579 | ()) |
| 580 | (dncpi cmadua0_avc_c3 "cmadua0" (OPTIONAL_CP_INSN (SLOT C3) (INTRINSIC "cmadua0")) |
| 581 | "cmadua0 $avcc3CRq,$avcc3CRp" |
| 582 | (+ MAJ_15 (f-sub4 7) avcc3CRq avcc3CRp (f-avc-c3sub4u28 #x5) (f-avc-c3sub4u16 #x4) (f-avc-c3sub4u8 #x0) (f-avc-c3sub4u4 #x0)) |
| 583 | (sequence((DI concat4)) (c-call "check_option_cp" pc) |
| 584 | (set concat4 (add (or (sll (zext DI (zext SI avccopCCR2)) 32) (zext DI avccopCCR3)) (mul (zext DI avcc3CRq) (zext DI avcc3CRp)))) |
| 585 | (set avccopCCR2 (subword SI concat4 0)) |
| 586 | (set avccopCCR3 (subword SI concat4 1)) |
| 587 | ) |
| 588 | ()) |
| 589 | (dncpi cmsba0_avc_c3 "cmsba0" (OPTIONAL_CP_INSN (SLOT C3) (INTRINSIC "cmsba0")) |
| 590 | "cmsba0 $avcc3CRq,$avcc3CRp" |
| 591 | (+ MAJ_15 (f-sub4 7) avcc3CRq avcc3CRp (f-avc-c3sub4u28 #x6) (f-avc-c3sub4u16 #x4) (f-avc-c3sub4u8 #x0) (f-avc-c3sub4u4 #x0)) |
| 592 | (sequence((DI concat5)) (c-call "check_option_cp" pc) |
| 593 | (set concat5 (sub (or (sll (zext DI (zext SI avccopCCR2)) 32) (zext DI avccopCCR3)) (mul (ext DI avcc3CRq) (ext DI avcc3CRp)))) |
| 594 | (set avccopCCR2 (subword SI concat5 0)) |
| 595 | (set avccopCCR3 (subword SI concat5 1)) |
| 596 | ) |
| 597 | ()) |
| 598 | (dncpi cmsbua0_avc_c3 "cmsbua0" (OPTIONAL_CP_INSN (SLOT C3) (INTRINSIC "cmsbua0")) |
| 599 | "cmsbua0 $avcc3CRq,$avcc3CRp" |
| 600 | (+ MAJ_15 (f-sub4 7) avcc3CRq avcc3CRp (f-avc-c3sub4u28 #x7) (f-avc-c3sub4u16 #x4) (f-avc-c3sub4u8 #x0) (f-avc-c3sub4u4 #x0)) |
| 601 | (sequence((DI concat6)) (c-call "check_option_cp" pc) |
| 602 | (set concat6 (sub (or (sll (zext DI (zext SI avccopCCR2)) 32) (zext DI avccopCCR3)) (mul (zext DI avcc3CRq) (zext DI avcc3CRp)))) |
| 603 | (set avccopCCR2 (subword SI concat6 0)) |
| 604 | (set avccopCCR3 (subword SI concat6 1)) |
| 605 | ) |
| 606 | ()) |
| 607 | (dncpi cmula1_avc_c3 "cmula1" (OPTIONAL_CP_INSN (SLOT C3) (INTRINSIC "cmula1")) |
| 608 | "cmula1 $avcc3CRq,$avcc3CRp" |
| 609 | (+ MAJ_15 (f-sub4 7) avcc3CRq avcc3CRp (f-avc-c3sub4u28 #x8) (f-avc-c3sub4u16 #x4) (f-avc-c3sub4u8 #x0) (f-avc-c3sub4u4 #x0)) |
| 610 | (sequence((DI concat7)) (c-call "check_option_cp" pc) |
| 611 | (set concat7 (mul (ext DI avcc3CRq) (ext DI avcc3CRp))) |
| 612 | (set avccopCCR4 (subword SI concat7 0)) |
| 613 | (set avccopCCR5 (subword SI concat7 1)) |
| 614 | ) |
| 615 | ()) |
| 616 | (dncpi cmulua1_avc_c3 "cmulua1" (OPTIONAL_CP_INSN (SLOT C3) (INTRINSIC "cmulua1")) |
| 617 | "cmulua1 $avcc3CRq,$avcc3CRp" |
| 618 | (+ MAJ_15 (f-sub4 7) avcc3CRq avcc3CRp (f-avc-c3sub4u28 #x9) (f-avc-c3sub4u16 #x4) (f-avc-c3sub4u8 #x0) (f-avc-c3sub4u4 #x0)) |
| 619 | (sequence((DI concat8)) (c-call "check_option_cp" pc) |
| 620 | (set concat8 (mul (zext DI avcc3CRq) (zext DI avcc3CRp))) |
| 621 | (set avccopCCR4 (subword SI concat8 0)) |
| 622 | (set avccopCCR5 (subword SI concat8 1)) |
| 623 | ) |
| 624 | ()) |
| 625 | (dncpi cnmula1_avc_c3 "cnmula1" (OPTIONAL_CP_INSN (SLOT C3) (INTRINSIC "cnmula1")) |
| 626 | "cnmula1 $avcc3CRq,$avcc3CRp" |
| 627 | (+ MAJ_15 (f-sub4 7) avcc3CRq avcc3CRp (f-avc-c3sub4u28 #xa) (f-avc-c3sub4u16 #x4) (f-avc-c3sub4u8 #x0) (f-avc-c3sub4u4 #x0)) |
| 628 | (sequence((DI concat9)) (c-call "check_option_cp" pc) |
| 629 | (set concat9 (neg (mul (ext DI avcc3CRq) (ext DI avcc3CRp)))) |
| 630 | (set avccopCCR4 (subword SI concat9 0)) |
| 631 | (set avccopCCR5 (subword SI concat9 1)) |
| 632 | ) |
| 633 | ()) |
| 634 | (dncpi cmada1_avc_c3 "cmada1" (OPTIONAL_CP_INSN (SLOT C3) (INTRINSIC "cmada1")) |
| 635 | "cmada1 $avcc3CRq,$avcc3CRp" |
| 636 | (+ MAJ_15 (f-sub4 7) avcc3CRq avcc3CRp (f-avc-c3sub4u28 #xc) (f-avc-c3sub4u16 #x4) (f-avc-c3sub4u8 #x0) (f-avc-c3sub4u4 #x0)) |
| 637 | (sequence((DI concat10)) (c-call "check_option_cp" pc) |
| 638 | (set concat10 (add (or (sll (zext DI (zext SI avccopCCR4)) 32) (zext DI avccopCCR5)) (mul (ext DI avcc3CRq) (ext DI avcc3CRp)))) |
| 639 | (set avccopCCR4 (subword SI concat10 0)) |
| 640 | (set avccopCCR5 (subword SI concat10 1)) |
| 641 | ) |
| 642 | ()) |
| 643 | (dncpi cmadua1_avc_c3 "cmadua1" (OPTIONAL_CP_INSN (SLOT C3) (INTRINSIC "cmadua1")) |
| 644 | "cmadua1 $avcc3CRq,$avcc3CRp" |
| 645 | (+ MAJ_15 (f-sub4 7) avcc3CRq avcc3CRp (f-avc-c3sub4u28 #xd) (f-avc-c3sub4u16 #x4) (f-avc-c3sub4u8 #x0) (f-avc-c3sub4u4 #x0)) |
| 646 | (sequence((DI concat11)) (c-call "check_option_cp" pc) |
| 647 | (set concat11 (add (or (sll (zext DI (zext SI avccopCCR4)) 32) (zext DI avccopCCR5)) (mul (zext DI avcc3CRq) (zext DI avcc3CRp)))) |
| 648 | (set avccopCCR4 (subword SI concat11 0)) |
| 649 | (set avccopCCR5 (subword SI concat11 1)) |
| 650 | ) |
| 651 | ()) |
| 652 | (dncpi cmsba1_avc_c3 "cmsba1" (OPTIONAL_CP_INSN (SLOT C3) (INTRINSIC "cmsba1")) |
| 653 | "cmsba1 $avcc3CRq,$avcc3CRp" |
| 654 | (+ MAJ_15 (f-sub4 7) avcc3CRq avcc3CRp (f-avc-c3sub4u28 #xe) (f-avc-c3sub4u16 #x4) (f-avc-c3sub4u8 #x0) (f-avc-c3sub4u4 #x0)) |
| 655 | (sequence((DI concat12)) (c-call "check_option_cp" pc) |
| 656 | (set concat12 (sub (or (sll (zext DI (zext SI avccopCCR4)) 32) (zext DI avccopCCR5)) (mul (ext DI avcc3CRq) (ext DI avcc3CRp)))) |
| 657 | (set avccopCCR4 (subword SI concat12 0)) |
| 658 | (set avccopCCR5 (subword SI concat12 1)) |
| 659 | ) |
| 660 | ()) |
| 661 | (dncpi cmsbua1_avc_c3 "cmsbua1" (OPTIONAL_CP_INSN (SLOT C3) (INTRINSIC "cmsbua1")) |
| 662 | "cmsbua1 $avcc3CRq,$avcc3CRp" |
| 663 | (+ MAJ_15 (f-sub4 7) avcc3CRq avcc3CRp (f-avc-c3sub4u28 #xf) (f-avc-c3sub4u16 #x4) (f-avc-c3sub4u8 #x0) (f-avc-c3sub4u4 #x0)) |
| 664 | (sequence((DI concat13)) (c-call "check_option_cp" pc) |
| 665 | (set concat13 (sub (or (sll (zext DI (zext SI avccopCCR4)) 32) (zext DI avccopCCR5)) (mul (zext DI avcc3CRq) (zext DI avcc3CRp)))) |
| 666 | (set avccopCCR4 (subword SI concat13 0)) |
| 667 | (set avccopCCR5 (subword SI concat13 1)) |
| 668 | ) |
| 669 | ()) |
| 670 | (dncpi xmula0_avc_c3 "xmula0" (OPTIONAL_CP_INSN (SLOT C3) (INTRINSIC "xmula0")) |
| 671 | "xmula0 $avcc3Rn,$avcc3Rm" |
| 672 | (+ MAJ_15 (f-sub4 7) avcc3Rn avcc3Rm (f-avc-c3sub4u28 #x0) (f-avc-c3sub4u24 #x0) (f-avc-c3sub4u20 #x0) (f-avc-c3sub4u16 #xc)) |
| 673 | (sequence((DI concat14)) (c-call "check_option_cp" pc) |
| 674 | (set concat14 (mul (ext DI avcc3Rn) (ext DI avcc3Rm))) |
| 675 | (set avccopCCR2 (subword SI concat14 0)) |
| 676 | (set avccopCCR3 (subword SI concat14 1)) |
| 677 | ) |
| 678 | ()) |
| 679 | (dncpi xmulua0_avc_c3 "xmulua0" (OPTIONAL_CP_INSN (SLOT C3) (INTRINSIC "xmulua0")) |
| 680 | "xmulua0 $avcc3Rn,$avcc3Rm" |
| 681 | (+ MAJ_15 (f-sub4 7) avcc3Rn avcc3Rm (f-avc-c3sub4u28 #x1) (f-avc-c3sub4u24 #x0) (f-avc-c3sub4u20 #x0) (f-avc-c3sub4u16 #xc)) |
| 682 | (sequence((DI concat15)) (c-call "check_option_cp" pc) |
| 683 | (set concat15 (mul (zext DI avcc3Rn) (zext DI avcc3Rm))) |
| 684 | (set avccopCCR2 (subword SI concat15 0)) |
| 685 | (set avccopCCR3 (subword SI concat15 1)) |
| 686 | ) |
| 687 | ()) |
| 688 | (dncpi xnmula0_avc_c3 "xnmula0" (OPTIONAL_CP_INSN (SLOT C3) (INTRINSIC "xnmula0")) |
| 689 | "xnmula0 $avcc3Rn,$avcc3Rm" |
| 690 | (+ MAJ_15 (f-sub4 7) avcc3Rn avcc3Rm (f-avc-c3sub4u28 #x2) (f-avc-c3sub4u24 #x0) (f-avc-c3sub4u20 #x0) (f-avc-c3sub4u16 #xc)) |
| 691 | (sequence((DI concat16)) (c-call "check_option_cp" pc) |
| 692 | (set concat16 (neg (mul (ext DI avcc3Rn) (ext DI avcc3Rm)))) |
| 693 | (set avccopCCR2 (subword SI concat16 0)) |
| 694 | (set avccopCCR3 (subword SI concat16 1)) |
| 695 | ) |
| 696 | ()) |
| 697 | (dncpi xmada0_avc_c3 "xmada0" (OPTIONAL_CP_INSN (SLOT C3) (INTRINSIC "xmada0")) |
| 698 | "xmada0 $avcc3Rn,$avcc3Rm" |
| 699 | (+ MAJ_15 (f-sub4 7) avcc3Rn avcc3Rm (f-avc-c3sub4u28 #x4) (f-avc-c3sub4u24 #x0) (f-avc-c3sub4u20 #x0) (f-avc-c3sub4u16 #xc)) |
| 700 | (sequence((DI concat17)) (c-call "check_option_cp" pc) |
| 701 | (set concat17 (add (or (sll (zext DI (zext SI avccopCCR2)) 32) (zext DI avccopCCR3)) (mul (ext DI avcc3Rn) (ext DI avcc3Rm)))) |
| 702 | (set avccopCCR2 (subword SI concat17 0)) |
| 703 | (set avccopCCR3 (subword SI concat17 1)) |
| 704 | ) |
| 705 | ()) |
| 706 | (dncpi xmadua0_avc_c3 "xmadua0" (OPTIONAL_CP_INSN (SLOT C3) (INTRINSIC "xmadua0")) |
| 707 | "xmadua0 $avcc3Rn,$avcc3Rm" |
| 708 | (+ MAJ_15 (f-sub4 7) avcc3Rn avcc3Rm (f-avc-c3sub4u28 #x5) (f-avc-c3sub4u24 #x0) (f-avc-c3sub4u20 #x0) (f-avc-c3sub4u16 #xc)) |
| 709 | (sequence((DI concat18)) (c-call "check_option_cp" pc) |
| 710 | (set concat18 (add (or (sll (zext DI (zext SI avccopCCR2)) 32) (zext DI avccopCCR3)) (mul (zext DI avcc3Rn) (zext DI avcc3Rm)))) |
| 711 | (set avccopCCR2 (subword SI concat18 0)) |
| 712 | (set avccopCCR3 (subword SI concat18 1)) |
| 713 | ) |
| 714 | ()) |
| 715 | (dncpi xmsba0_avc_c3 "xmsba0" (OPTIONAL_CP_INSN (SLOT C3) (INTRINSIC "xmsba0")) |
| 716 | "xmsba0 $avcc3Rn,$avcc3Rm" |
| 717 | (+ MAJ_15 (f-sub4 7) avcc3Rn avcc3Rm (f-avc-c3sub4u28 #x6) (f-avc-c3sub4u24 #x0) (f-avc-c3sub4u20 #x0) (f-avc-c3sub4u16 #xc)) |
| 718 | (sequence((DI concat19)) (c-call "check_option_cp" pc) |
| 719 | (set concat19 (sub (or (sll (zext DI (zext SI avccopCCR2)) 32) (zext DI avccopCCR3)) (mul (ext DI avcc3Rn) (ext DI avcc3Rm)))) |
| 720 | (set avccopCCR2 (subword SI concat19 0)) |
| 721 | (set avccopCCR3 (subword SI concat19 1)) |
| 722 | ) |
| 723 | ()) |
| 724 | (dncpi xmsbua0_avc_c3 "xmsbua0" (OPTIONAL_CP_INSN (SLOT C3) (INTRINSIC "xmsbua0")) |
| 725 | "xmsbua0 $avcc3Rn,$avcc3Rm" |
| 726 | (+ MAJ_15 (f-sub4 7) avcc3Rn avcc3Rm (f-avc-c3sub4u28 #x7) (f-avc-c3sub4u24 #x0) (f-avc-c3sub4u20 #x0) (f-avc-c3sub4u16 #xc)) |
| 727 | (sequence((DI concat20)) (c-call "check_option_cp" pc) |
| 728 | (set concat20 (sub (or (sll (zext DI (zext SI avccopCCR2)) 32) (zext DI avccopCCR3)) (mul (zext DI avcc3Rn) (zext DI avcc3Rm)))) |
| 729 | (set avccopCCR2 (subword SI concat20 0)) |
| 730 | (set avccopCCR3 (subword SI concat20 1)) |
| 731 | ) |
| 732 | ()) |
| 733 | (dncpi xmula1_avc_c3 "xmula1" (OPTIONAL_CP_INSN (SLOT C3) (INTRINSIC "xmula1")) |
| 734 | "xmula1 $avcc3Rn,$avcc3Rm" |
| 735 | (+ MAJ_15 (f-sub4 7) avcc3Rn avcc3Rm (f-avc-c3sub4u28 #x8) (f-avc-c3sub4u24 #x0) (f-avc-c3sub4u20 #x0) (f-avc-c3sub4u16 #xc)) |
| 736 | (sequence((DI concat21)) (c-call "check_option_cp" pc) |
| 737 | (set concat21 (mul (ext DI avcc3Rn) (ext DI avcc3Rm))) |
| 738 | (set avccopCCR4 (subword SI concat21 0)) |
| 739 | (set avccopCCR5 (subword SI concat21 1)) |
| 740 | ) |
| 741 | ()) |
| 742 | (dncpi xmulua1_avc_c3 "xmulua1" (OPTIONAL_CP_INSN (SLOT C3) (INTRINSIC "xmulua1")) |
| 743 | "xmulua1 $avcc3Rn,$avcc3Rm" |
| 744 | (+ MAJ_15 (f-sub4 7) avcc3Rn avcc3Rm (f-avc-c3sub4u28 #x9) (f-avc-c3sub4u24 #x0) (f-avc-c3sub4u20 #x0) (f-avc-c3sub4u16 #xc)) |
| 745 | (sequence((DI concat22)) (c-call "check_option_cp" pc) |
| 746 | (set concat22 (mul (zext DI avcc3Rn) (zext DI avcc3Rm))) |
| 747 | (set avccopCCR4 (subword SI concat22 0)) |
| 748 | (set avccopCCR5 (subword SI concat22 1)) |
| 749 | ) |
| 750 | ()) |
| 751 | (dncpi xnmula1_avc_c3 "xnmula1" (OPTIONAL_CP_INSN (SLOT C3) (INTRINSIC "xnmula1")) |
| 752 | "xnmula1 $avcc3Rn,$avcc3Rm" |
| 753 | (+ MAJ_15 (f-sub4 7) avcc3Rn avcc3Rm (f-avc-c3sub4u28 #xa) (f-avc-c3sub4u24 #x0) (f-avc-c3sub4u20 #x0) (f-avc-c3sub4u16 #xc)) |
| 754 | (sequence((DI concat23)) (c-call "check_option_cp" pc) |
| 755 | (set concat23 (neg (mul (ext DI avcc3Rn) (ext DI avcc3Rm)))) |
| 756 | (set avccopCCR4 (subword SI concat23 0)) |
| 757 | (set avccopCCR5 (subword SI concat23 1)) |
| 758 | ) |
| 759 | ()) |
| 760 | (dncpi xmada1_avc_c3 "xmada1" (OPTIONAL_CP_INSN (SLOT C3) (INTRINSIC "xmada1")) |
| 761 | "xmada1 $avcc3Rn,$avcc3Rm" |
| 762 | (+ MAJ_15 (f-sub4 7) avcc3Rn avcc3Rm (f-avc-c3sub4u28 #xc) (f-avc-c3sub4u24 #x0) (f-avc-c3sub4u20 #x0) (f-avc-c3sub4u16 #xc)) |
| 763 | (sequence((DI concat24)) (c-call "check_option_cp" pc) |
| 764 | (set concat24 (add (or (sll (zext DI (zext SI avccopCCR4)) 32) (zext DI avccopCCR5)) (mul (ext DI avcc3Rn) (ext DI avcc3Rm)))) |
| 765 | (set avccopCCR4 (subword SI concat24 0)) |
| 766 | (set avccopCCR5 (subword SI concat24 1)) |
| 767 | ) |
| 768 | ()) |
| 769 | (dncpi xmadua1_avc_c3 "xmadua1" (OPTIONAL_CP_INSN (SLOT C3) (INTRINSIC "xmadua1")) |
| 770 | "xmadua1 $avcc3Rn,$avcc3Rm" |
| 771 | (+ MAJ_15 (f-sub4 7) avcc3Rn avcc3Rm (f-avc-c3sub4u28 #xd) (f-avc-c3sub4u24 #x0) (f-avc-c3sub4u20 #x0) (f-avc-c3sub4u16 #xc)) |
| 772 | (sequence((DI concat25)) (c-call "check_option_cp" pc) |
| 773 | (set concat25 (add (or (sll (zext DI (zext SI avccopCCR4)) 32) (zext DI avccopCCR5)) (mul (zext DI avcc3Rn) (zext DI avcc3Rm)))) |
| 774 | (set avccopCCR4 (subword SI concat25 0)) |
| 775 | (set avccopCCR5 (subword SI concat25 1)) |
| 776 | ) |
| 777 | ()) |
| 778 | (dncpi xmsba1_avc_c3 "xmsba1" (OPTIONAL_CP_INSN (SLOT C3) (INTRINSIC "xmsba1")) |
| 779 | "xmsba1 $avcc3Rn,$avcc3Rm" |
| 780 | (+ MAJ_15 (f-sub4 7) avcc3Rn avcc3Rm (f-avc-c3sub4u28 #xe) (f-avc-c3sub4u24 #x0) (f-avc-c3sub4u20 #x0) (f-avc-c3sub4u16 #xc)) |
| 781 | (sequence((DI concat26)) (c-call "check_option_cp" pc) |
| 782 | (set concat26 (sub (or (sll (zext DI (zext SI avccopCCR4)) 32) (zext DI avccopCCR5)) (mul (ext DI avcc3Rn) (ext DI avcc3Rm)))) |
| 783 | (set avccopCCR4 (subword SI concat26 0)) |
| 784 | (set avccopCCR5 (subword SI concat26 1)) |
| 785 | ) |
| 786 | ()) |
| 787 | (dncpi xmsbua1_avc_c3 "xmsbua1" (OPTIONAL_CP_INSN (SLOT C3) (INTRINSIC "xmsbua1")) |
| 788 | "xmsbua1 $avcc3Rn,$avcc3Rm" |
| 789 | (+ MAJ_15 (f-sub4 7) avcc3Rn avcc3Rm (f-avc-c3sub4u28 #xf) (f-avc-c3sub4u24 #x0) (f-avc-c3sub4u20 #x0) (f-avc-c3sub4u16 #xc)) |
| 790 | (sequence((DI concat27)) (c-call "check_option_cp" pc) |
| 791 | (set concat27 (sub (or (sll (zext DI (zext SI avccopCCR4)) 32) (zext DI avccopCCR5)) (mul (zext DI avcc3Rn) (zext DI avcc3Rm)))) |
| 792 | (set avccopCCR4 (subword SI concat27 0)) |
| 793 | (set avccopCCR5 (subword SI concat27 1)) |
| 794 | ) |
| 795 | ()) |
| 796 | (dn16i cnop_avc_v1 "cnop" (VLIW64_NO_MATCHING_NOP (SLOT V1) (INTRINSIC "cnop")) |
| 797 | "cnop" |
| 798 | (+ (f-avc-v1sub4u12 #x0) (f-avc-v1sub4u8 #x0) (f-avc-v1sub4u4 #x0) (f-avc-v1sub4u0 #x0)) |
| 799 | (c-call "check_option_cp" pc) |
| 800 | ()) |
| 801 | (dnmi cpnop16_avc_v1 "cpnop16" |
| 802 | (avc-16-isa NO-DIS) |
| 803 | "cpnop16" |
| 804 | (emit cnop_avc_v1) |
| 805 | ) |
| 806 | (dn16i cmov_avc_v1 "cmov" (VLIW64_NO_MATCHING_NOP (SLOT V1) (INTRINSIC "cmov")) |
| 807 | "cmov $avcv1CRq,$avcv1CRp" |
| 808 | (+ avcv1CRq avcv1CRp (f-avc-v1sub4u12 #x3) (f-avc-v1sub4u0 #x0)) |
| 809 | (sequence() (c-call "check_option_cp" pc) |
| 810 | (set avcv1CRq avcv1CRp) |
| 811 | ) |
| 812 | ()) |
| 813 | (dn16i cmovi_avc_v1 "cmovi" (VLIW64_NO_MATCHING_NOP (SLOT V1) (INTRINSIC "cmovi")) |
| 814 | "cmovi $avcv1CRq,$avcv1Imm8s8" |
| 815 | (+ avcv1CRq avcv1Imm8s8 (f-avc-v1sub4u0 #x2)) |
| 816 | (sequence() (c-call "check_option_cp" pc) |
| 817 | (set avcv1CRq (ext SI avcv1Imm8s8)) |
| 818 | ) |
| 819 | ()) |
| 820 | (dn16i cadd3_avc_v1 "cadd3" (VLIW64_NO_MATCHING_NOP (SLOT V1) (INTRINSIC "cadd3")) |
| 821 | "cadd3 $avcv1CRo,$avcv1CRq,$avcv1CRp" |
| 822 | (+ avcv1CRo avcv1CRq avcv1CRp (f-avc-v1sub4u0 #x3)) |
| 823 | (sequence() (c-call "check_option_cp" pc) |
| 824 | (set avcv1CRo (add avcv1CRq avcv1CRp)) |
| 825 | ) |
| 826 | ()) |
| 827 | (dn16i caddi_avc_v1 "caddi" (VLIW64_NO_MATCHING_NOP (SLOT V1) (INTRINSIC "caddi")) |
| 828 | "caddi $avcv1CRq,$avcv1Imm6s8" |
| 829 | (+ avcv1CRq avcv1Imm6s8 (f-avc-v1sub2u14 #x0) (f-avc-v1sub4u0 #x1)) |
| 830 | (sequence() (c-call "check_option_cp" pc) |
| 831 | (set avcv1CRq (add avcv1CRq (ext SI avcv1Imm6s8))) |
| 832 | ) |
| 833 | ()) |
| 834 | (dn16i csub_avc_v1 "csub" (VLIW64_NO_MATCHING_NOP (SLOT V1) (INTRINSIC "csub")) |
| 835 | "csub $avcv1CRq,$avcv1CRp" |
| 836 | (+ avcv1CRq avcv1CRp (f-avc-v1sub4u12 #x2) (f-avc-v1sub4u0 #x0)) |
| 837 | (sequence() (c-call "check_option_cp" pc) |
| 838 | (set avcv1CRq (sub avcv1CRq avcv1CRp)) |
| 839 | ) |
| 840 | ()) |
| 841 | (dn16i cneg_avc_v1 "cneg" (VLIW64_NO_MATCHING_NOP (SLOT V1) (INTRINSIC "cneg")) |
| 842 | "cneg $avcv1CRq,$avcv1CRp" |
| 843 | (+ avcv1CRq avcv1CRp (f-avc-v1sub4u12 #x1) (f-avc-v1sub4u0 #x0)) |
| 844 | (sequence() (c-call "check_option_cp" pc) |
| 845 | (set avcv1CRq (neg avcv1CRp)) |
| 846 | ) |
| 847 | ()) |
| 848 | (dn16i cextb_avc_v1 "cextb" (VLIW64_NO_MATCHING_NOP (SLOT V1) (INTRINSIC "cextb")) |
| 849 | "cextb $avcv1CRq" |
| 850 | (+ avcv1CRq (f-avc-v1sub4u12 #x9) (f-avc-v1sub4u8 #x0) (f-avc-v1sub4u0 #x0)) |
| 851 | (sequence() (c-call "check_option_cp" pc) |
| 852 | (set avcv1CRq (ext SI (and QI (srl avcv1CRq 0) #xff))) |
| 853 | ) |
| 854 | ()) |
| 855 | (dn16i cexth_avc_v1 "cexth" (VLIW64_NO_MATCHING_NOP (SLOT V1) (INTRINSIC "cexth")) |
| 856 | "cexth $avcv1CRq" |
| 857 | (+ avcv1CRq (f-avc-v1sub4u12 #x9) (f-avc-v1sub4u8 #x2) (f-avc-v1sub4u0 #x0)) |
| 858 | (sequence() (c-call "check_option_cp" pc) |
| 859 | (set avcv1CRq (ext SI (and HI (srl avcv1CRq 0) #xffff))) |
| 860 | ) |
| 861 | ()) |
| 862 | (dn16i cextub_avc_v1 "cextub" (VLIW64_NO_MATCHING_NOP (SLOT V1) (INTRINSIC "cextub")) |
| 863 | "cextub $avcv1CRq" |
| 864 | (+ avcv1CRq (f-avc-v1sub4u12 #x9) (f-avc-v1sub4u8 #x8) (f-avc-v1sub4u0 #x0)) |
| 865 | (sequence() (c-call "check_option_cp" pc) |
| 866 | (set avcv1CRq (zext SI (and QI (srl avcv1CRq 0) #xff))) |
| 867 | ) |
| 868 | ()) |
| 869 | (dn16i cextuh_avc_v1 "cextuh" (VLIW64_NO_MATCHING_NOP (SLOT V1) (INTRINSIC "cextuh")) |
| 870 | "cextuh $avcv1CRq" |
| 871 | (+ avcv1CRq (f-avc-v1sub4u12 #x9) (f-avc-v1sub4u8 #xa) (f-avc-v1sub4u0 #x0)) |
| 872 | (sequence() (c-call "check_option_cp" pc) |
| 873 | (set avcv1CRq (zext SI (and HI (srl avcv1CRq 0) #xffff))) |
| 874 | ) |
| 875 | ()) |
| 876 | (dn16i cscltz_avc_v1 "cscltz" (VLIW64_NO_MATCHING_NOP (SLOT V1) (INTRINSIC "cscltz")) |
| 877 | "cscltz $avcv1CRq" |
| 878 | (+ avcv1CRq (f-avc-v1sub4u12 #xa) (f-avc-v1sub4u8 #xa) (f-avc-v1sub4u0 #x0)) |
| 879 | (sequence() (c-call "check_option_cp" pc) |
| 880 | (if (lt (ext SI avcv1CRq) (ext SI 0)) (set avccopCCR1 (or (sll (srl avccopCCR1 1) 1) (srl (sll (zext SI 1) 31) 31))) |
| 881 | (set avccopCCR1 (or (sll (srl avccopCCR1 1) 1) (srl (sll (zext SI 0) 31) 31))) |
| 882 | ) |
| 883 | ) |
| 884 | ()) |
| 885 | (dn16i cldz_avc_v1 "cldz" (VLIW64_NO_MATCHING_NOP (SLOT V1) (INTRINSIC "cldz")) |
| 886 | "cldz $avcv1CRq,$avcv1CRp" |
| 887 | (+ avcv1CRq avcv1CRp (f-avc-v1sub4u12 #x0) (f-avc-v1sub4u0 #x5)) |
| 888 | (sequence() (c-call "check_option_cp" pc) |
| 889 | (if (and avcv1CRp #x80000000) (set avcv1CRq 0) |
| 890 | (if (and avcv1CRp #x40000000) (set avcv1CRq 1) |
| 891 | (if (and avcv1CRp #x20000000) (set avcv1CRq 2) |
| 892 | (if (and avcv1CRp #x10000000) (set avcv1CRq 3) |
| 893 | (if (and avcv1CRp #x8000000) (set avcv1CRq 4) |
| 894 | (if (and avcv1CRp #x4000000) (set avcv1CRq 5) |
| 895 | (if (and avcv1CRp #x2000000) (set avcv1CRq 6) |
| 896 | (if (and avcv1CRp #x1000000) (set avcv1CRq 7) |
| 897 | (if (and avcv1CRp #x800000) (set avcv1CRq 8) |
| 898 | (if (and avcv1CRp #x400000) (set avcv1CRq 9) |
| 899 | (if (and avcv1CRp #x200000) (set avcv1CRq 10) |
| 900 | (if (and avcv1CRp #x100000) (set avcv1CRq 11) |
| 901 | (if (and avcv1CRp #x80000) (set avcv1CRq 12) |
| 902 | (if (and avcv1CRp #x40000) (set avcv1CRq 13) |
| 903 | (if (and avcv1CRp #x20000) (set avcv1CRq 14) |
| 904 | (if (and avcv1CRp #x10000) (set avcv1CRq 15) |
| 905 | (if (and avcv1CRp #x8000) (set avcv1CRq 16) |
| 906 | (if (and avcv1CRp #x4000) (set avcv1CRq 17) |
| 907 | (if (and avcv1CRp #x2000) (set avcv1CRq 18) |
| 908 | (if (and avcv1CRp #x1000) (set avcv1CRq 19) |
| 909 | (if (and avcv1CRp #x800) (set avcv1CRq 20) |
| 910 | (if (and avcv1CRp #x400) (set avcv1CRq 21) |
| 911 | (if (and avcv1CRp #x200) (set avcv1CRq 22) |
| 912 | (if (and avcv1CRp #x100) (set avcv1CRq 23) |
| 913 | (if (and avcv1CRp #x80) (set avcv1CRq 24) |
| 914 | (if (and avcv1CRp #x40) (set avcv1CRq 25) |
| 915 | (if (and avcv1CRp #x20) (set avcv1CRq 26) |
| 916 | (if (and avcv1CRp #x10) (set avcv1CRq 27) |
| 917 | (if (and avcv1CRp #x8) (set avcv1CRq 28) |
| 918 | (if (and avcv1CRp #x4) (set avcv1CRq 29) |
| 919 | (if (and avcv1CRp #x2) (set avcv1CRq 30) |
| 920 | (if (and avcv1CRp #x1) (set avcv1CRq 31) |
| 921 | (set avcv1CRq 32) |
| 922 | ) |
| 923 | ) |
| 924 | ) |
| 925 | ) |
| 926 | ) |
| 927 | ) |
| 928 | ) |
| 929 | ) |
| 930 | ) |
| 931 | ) |
| 932 | ) |
| 933 | ) |
| 934 | ) |
| 935 | ) |
| 936 | ) |
| 937 | ) |
| 938 | ) |
| 939 | ) |
| 940 | ) |
| 941 | ) |
| 942 | ) |
| 943 | ) |
| 944 | ) |
| 945 | ) |
| 946 | ) |
| 947 | ) |
| 948 | ) |
| 949 | ) |
| 950 | ) |
| 951 | ) |
| 952 | ) |
| 953 | ) |
| 954 | ) |
| 955 | ()) |
| 956 | (dn16i cabs_avc_v1 "cabs" (VLIW64_NO_MATCHING_NOP (SLOT V1) (INTRINSIC "cabs")) |
| 957 | "cabs $avcv1CRq,$avcv1CRp" |
| 958 | (+ avcv1CRq avcv1CRp (f-avc-v1sub4u12 #x3) (f-avc-v1sub4u0 #x5)) |
| 959 | (sequence() (c-call "check_option_cp" pc) |
| 960 | (set avcv1CRq (abs (ext SI (subword SI (sub avcv1CRq avcv1CRp) 1)))) |
| 961 | ) |
| 962 | ()) |
| 963 | (dn16i cad1s_avc_v1 "cad1s" (VLIW64_NO_MATCHING_NOP (SLOT V1) (INTRINSIC "cad1s")) |
| 964 | "cad1s $avcv1CRq,$avcv1CRp" |
| 965 | (+ avcv1CRq avcv1CRp (f-avc-v1sub4u12 #x1) (f-avc-v1sub4u0 #x5)) |
| 966 | (sequence((DI tmp0)) (c-call "check_option_cp" pc) |
| 967 | (set tmp0 (ext SI (subword SI (add avcv1CRq avcv1CRp) 1))) |
| 968 | (set avcv1CRq (subword SI (sra tmp0 1) 1)) |
| 969 | ) |
| 970 | ()) |
| 971 | (dn16i csb1s_avc_v1 "csb1s" (VLIW64_NO_MATCHING_NOP (SLOT V1) (INTRINSIC "csb1s")) |
| 972 | "csb1s $avcv1CRq,$avcv1CRp" |
| 973 | (+ avcv1CRq avcv1CRp (f-avc-v1sub4u12 #x2) (f-avc-v1sub4u0 #x5)) |
| 974 | (sequence((DI tmp0)) (c-call "check_option_cp" pc) |
| 975 | (set tmp0 (ext SI (subword SI (sub avcv1CRq avcv1CRp) 1))) |
| 976 | (set avcv1CRq (subword SI (sra tmp0 1) 1)) |
| 977 | ) |
| 978 | ()) |
| 979 | (dn16i cmin_avc_v1 "cmin" (VLIW64_NO_MATCHING_NOP (SLOT V1) (INTRINSIC "cmin")) |
| 980 | "cmin $avcv1CRq,$avcv1CRp" |
| 981 | (+ avcv1CRq avcv1CRp (f-avc-v1sub4u12 #x8) (f-avc-v1sub4u0 #x5)) |
| 982 | (sequence() (c-call "check_option_cp" pc) |
| 983 | (if (lt (ext SI avcv1CRq) (ext SI avcv1CRp)) (set avcv1CRq avcv1CRq) |
| 984 | (set avcv1CRq avcv1CRp) |
| 985 | ) |
| 986 | ) |
| 987 | ()) |
| 988 | (dn16i cmax_avc_v1 "cmax" (VLIW64_NO_MATCHING_NOP (SLOT V1) (INTRINSIC "cmax")) |
| 989 | "cmax $avcv1CRq,$avcv1CRp" |
| 990 | (+ avcv1CRq avcv1CRp (f-avc-v1sub4u12 #x9) (f-avc-v1sub4u0 #x5)) |
| 991 | (sequence() (c-call "check_option_cp" pc) |
| 992 | (if (gt (ext SI avcv1CRq) (ext SI avcv1CRp)) (set avcv1CRq avcv1CRq) |
| 993 | (set avcv1CRq avcv1CRp) |
| 994 | ) |
| 995 | ) |
| 996 | ()) |
| 997 | (dn16i cminu_avc_v1 "cminu" (VLIW64_NO_MATCHING_NOP (SLOT V1) (INTRINSIC "cminu")) |
| 998 | "cminu $avcv1CRq,$avcv1CRp" |
| 999 | (+ avcv1CRq avcv1CRp (f-avc-v1sub4u12 #xa) (f-avc-v1sub4u0 #x5)) |
| 1000 | (sequence() (c-call "check_option_cp" pc) |
| 1001 | (if (ltu (zext SI avcv1CRq) (zext SI avcv1CRp)) (set avcv1CRq avcv1CRq) |
| 1002 | (set avcv1CRq avcv1CRp) |
| 1003 | ) |
| 1004 | ) |
| 1005 | ()) |
| 1006 | (dn16i cmaxu_avc_v1 "cmaxu" (VLIW64_NO_MATCHING_NOP (SLOT V1) (INTRINSIC "cmaxu")) |
| 1007 | "cmaxu $avcv1CRq,$avcv1CRp" |
| 1008 | (+ avcv1CRq avcv1CRp (f-avc-v1sub4u12 #xb) (f-avc-v1sub4u0 #x5)) |
| 1009 | (sequence() (c-call "check_option_cp" pc) |
| 1010 | (if (gtu (zext SI avcv1CRq) (zext SI avcv1CRp)) (set avcv1CRq avcv1CRq) |
| 1011 | (set avcv1CRq avcv1CRp) |
| 1012 | ) |
| 1013 | ) |
| 1014 | ()) |
| 1015 | (dn16i cclipi_avc_v1 "cclipi" (VLIW64_NO_MATCHING_NOP (SLOT V1) (INTRINSIC "cclipi")) |
| 1016 | "cclipi $avcv1CRq,$avcv1Imm5u8" |
| 1017 | (+ avcv1CRq avcv1Imm5u8 (f-avc-v1sub3u13 #x4) (f-avc-v1sub4u0 #x5)) |
| 1018 | (sequence((DI tmp1)(DI tmp0)) (c-call "check_option_cp" pc) |
| 1019 | (if (eq (zext SI avcv1Imm5u8) (ext SI 0)) (set avcv1CRq 0) |
| 1020 | (sequence() (set tmp0 (sll 1 (sub avcv1Imm5u8 1))) |
| 1021 | (set tmp1 (sub (subword SI tmp0 1) 1)) |
| 1022 | (if (gt (ext SI avcv1CRq) (ext SI (subword SI tmp1 1))) (set avcv1CRq (subword SI tmp1 1)) |
| 1023 | (if (lt (ext SI avcv1CRq) (ext SI (neg (subword SI tmp0 1)))) (set avcv1CRq (neg (subword SI tmp0 1))) |
| 1024 | (set avcv1CRq avcv1CRq) |
| 1025 | ) |
| 1026 | ) |
| 1027 | ) |
| 1028 | ) |
| 1029 | ) |
| 1030 | ()) |
| 1031 | (dn16i cclipiu_avc_v1 "cclipiu" (VLIW64_NO_MATCHING_NOP (SLOT V1) (INTRINSIC "cclipiu")) |
| 1032 | "cclipiu $avcv1CRq,$avcv1Imm5u8" |
| 1033 | (+ avcv1CRq avcv1Imm5u8 (f-avc-v1sub3u13 #x5) (f-avc-v1sub4u0 #x5)) |
| 1034 | (sequence((DI tmp0)) (c-call "check_option_cp" pc) |
| 1035 | (if (eq (zext SI avcv1Imm5u8) (ext SI 0)) (set avcv1CRq 0) |
| 1036 | (sequence() (set tmp0 (sub (sll 1 avcv1Imm5u8) 1)) |
| 1037 | (if (gt (ext SI avcv1CRq) (ext SI (subword SI tmp0 1))) (set avcv1CRq (subword SI tmp0 1)) |
| 1038 | (if (lt (ext SI avcv1CRq) (ext SI 0)) (set avcv1CRq 0) |
| 1039 | (set avcv1CRq avcv1CRq) |
| 1040 | ) |
| 1041 | ) |
| 1042 | ) |
| 1043 | ) |
| 1044 | ) |
| 1045 | ()) |
| 1046 | (dn16i cor_avc_v1 "cor" (VLIW64_NO_MATCHING_NOP (SLOT V1) (INTRINSIC "cor")) |
| 1047 | "cor $avcv1CRq,$avcv1CRp" |
| 1048 | (+ avcv1CRq avcv1CRp (f-avc-v1sub4u12 #x4) (f-avc-v1sub4u0 #x0)) |
| 1049 | (sequence() (c-call "check_option_cp" pc) |
| 1050 | (set avcv1CRq (or avcv1CRq avcv1CRp)) |
| 1051 | ) |
| 1052 | ()) |
| 1053 | (dn16i cand_avc_v1 "cand" (VLIW64_NO_MATCHING_NOP (SLOT V1) (INTRINSIC "cand")) |
| 1054 | "cand $avcv1CRq,$avcv1CRp" |
| 1055 | (+ avcv1CRq avcv1CRp (f-avc-v1sub4u12 #x5) (f-avc-v1sub4u0 #x0)) |
| 1056 | (sequence() (c-call "check_option_cp" pc) |
| 1057 | (set avcv1CRq (and avcv1CRq avcv1CRp)) |
| 1058 | ) |
| 1059 | ()) |
| 1060 | (dn16i cxor_avc_v1 "cxor" (VLIW64_NO_MATCHING_NOP (SLOT V1) (INTRINSIC "cxor")) |
| 1061 | "cxor $avcv1CRq,$avcv1CRp" |
| 1062 | (+ avcv1CRq avcv1CRp (f-avc-v1sub4u12 #x6) (f-avc-v1sub4u0 #x0)) |
| 1063 | (sequence() (c-call "check_option_cp" pc) |
| 1064 | (set avcv1CRq (xor avcv1CRq avcv1CRp)) |
| 1065 | ) |
| 1066 | ()) |
| 1067 | (dn16i cnor_avc_v1 "cnor" (VLIW64_NO_MATCHING_NOP (SLOT V1) (INTRINSIC "cnor")) |
| 1068 | "cnor $avcv1CRq,$avcv1CRp" |
| 1069 | (+ avcv1CRq avcv1CRp (f-avc-v1sub4u12 #x7) (f-avc-v1sub4u0 #x0)) |
| 1070 | (sequence() (c-call "check_option_cp" pc) |
| 1071 | (set avcv1CRq (inv (or avcv1CRq avcv1CRp))) |
| 1072 | ) |
| 1073 | ()) |
| 1074 | (dn16i csra_avc_v1 "csra" (VLIW64_NO_MATCHING_NOP (SLOT V1) (INTRINSIC "csra")) |
| 1075 | "csra $avcv1CRq,$avcv1CRp" |
| 1076 | (+ avcv1CRq avcv1CRp (f-avc-v1sub4u12 #xc) (f-avc-v1sub4u0 #x0)) |
| 1077 | (sequence() (c-call "check_option_cp" pc) |
| 1078 | (set avcv1CRq (sra avcv1CRq (and QI (srl avcv1CRp 0) #x1f))) |
| 1079 | ) |
| 1080 | ()) |
| 1081 | (dn16i csrl_avc_v1 "csrl" (VLIW64_NO_MATCHING_NOP (SLOT V1) (INTRINSIC "csrl")) |
| 1082 | "csrl $avcv1CRq,$avcv1CRp" |
| 1083 | (+ avcv1CRq avcv1CRp (f-avc-v1sub4u12 #xd) (f-avc-v1sub4u0 #x0)) |
| 1084 | (sequence() (c-call "check_option_cp" pc) |
| 1085 | (set avcv1CRq (srl avcv1CRq (and QI (srl avcv1CRp 0) #x1f))) |
| 1086 | ) |
| 1087 | ()) |
| 1088 | (dn16i csll_avc_v1 "csll" (VLIW64_NO_MATCHING_NOP (SLOT V1) (INTRINSIC "csll")) |
| 1089 | "csll $avcv1CRq,$avcv1CRp" |
| 1090 | (+ avcv1CRq avcv1CRp (f-avc-v1sub4u12 #xe) (f-avc-v1sub4u0 #x0)) |
| 1091 | (sequence() (c-call "check_option_cp" pc) |
| 1092 | (set avcv1CRq (sll avcv1CRq (and QI (srl avcv1CRp 0) #x1f))) |
| 1093 | ) |
| 1094 | ()) |
| 1095 | (dn16i csrai_avc_v1 "csrai" (VLIW64_NO_MATCHING_NOP (SLOT V1) (INTRINSIC "csrai")) |
| 1096 | "csrai $avcv1CRq,$avcv1Imm5u8" |
| 1097 | (+ avcv1CRq avcv1Imm5u8 (f-avc-v1sub3u13 #x2) (f-avc-v1sub4u0 #x1)) |
| 1098 | (sequence() (c-call "check_option_cp" pc) |
| 1099 | (set avcv1CRq (sra avcv1CRq avcv1Imm5u8)) |
| 1100 | ) |
| 1101 | ()) |
| 1102 | (dn16i csrli_avc_v1 "csrli" (VLIW64_NO_MATCHING_NOP (SLOT V1) (INTRINSIC "csrli")) |
| 1103 | "csrli $avcv1CRq,$avcv1Imm5u8" |
| 1104 | (+ avcv1CRq avcv1Imm5u8 (f-avc-v1sub3u13 #x3) (f-avc-v1sub4u0 #x1)) |
| 1105 | (sequence() (c-call "check_option_cp" pc) |
| 1106 | (set avcv1CRq (srl avcv1CRq avcv1Imm5u8)) |
| 1107 | ) |
| 1108 | ()) |
| 1109 | (dn16i cslli_avc_v1 "cslli" (VLIW64_NO_MATCHING_NOP (SLOT V1) (INTRINSIC "cslli")) |
| 1110 | "cslli $avcv1CRq,$avcv1Imm5u8" |
| 1111 | (+ avcv1CRq avcv1Imm5u8 (f-avc-v1sub3u13 #x6) (f-avc-v1sub4u0 #x1)) |
| 1112 | (sequence() (c-call "check_option_cp" pc) |
| 1113 | (set avcv1CRq (sll avcv1CRq avcv1Imm5u8)) |
| 1114 | ) |
| 1115 | ()) |
| 1116 | (dn16i cfsft_avc_v1 "cfsft" (VLIW64_NO_MATCHING_NOP (SLOT V1) (INTRINSIC "cfsft")) |
| 1117 | "cfsft $avcv1CRq,$avcv1CRp" |
| 1118 | (+ avcv1CRq avcv1CRp (f-avc-v1sub4u12 #xf) (f-avc-v1sub4u0 #x0)) |
| 1119 | (sequence() (c-call "check_option_cp" pc) |
| 1120 | (set avcv1CRq (subword SI (sll (or (sll (zext DI (zext SI avcv1CRq)) 32) (zext DI avcv1CRp)) (and QI (srl avccopCCR0 0) #x3f)) 0)) |
| 1121 | ) |
| 1122 | ()) |
| 1123 | (dn16i cfsfta0_avc_v1 "cfsfta0" (VLIW64_NO_MATCHING_NOP (SLOT V1) (INTRINSIC "cfsfta0")) |
| 1124 | "cfsfta0 $avcv1CRq" |
| 1125 | (+ avcv1CRq (f-avc-v1sub4u12 #x7) (f-avc-v1sub4u8 #x0) (f-avc-v1sub4u0 #x1)) |
| 1126 | (sequence() (c-call "check_option_cp" pc) |
| 1127 | (set avcv1CRq (subword SI (sll (or (sll (zext DI (zext SI avccopCCR2)) 32) (zext DI avccopCCR3)) (and QI (srl avccopCCR0 0) #x3f)) 0)) |
| 1128 | ) |
| 1129 | ()) |
| 1130 | (dn16i cfsfta1_avc_v1 "cfsfta1" (VLIW64_NO_MATCHING_NOP (SLOT V1) (INTRINSIC "cfsfta1")) |
| 1131 | "cfsfta1 $avcv1CRq" |
| 1132 | (+ avcv1CRq (f-avc-v1sub4u12 #xf) (f-avc-v1sub4u8 #x0) (f-avc-v1sub4u0 #x1)) |
| 1133 | (sequence() (c-call "check_option_cp" pc) |
| 1134 | (set avcv1CRq (subword SI (sll (or (sll (zext DI (zext SI avccopCCR4)) 32) (zext DI avccopCCR5)) (and QI (srl avccopCCR0 0) #x3f)) 0)) |
| 1135 | ) |
| 1136 | ()) |
| 1137 | (dn16i cmula0_avc_v1 "cmula0" (VLIW64_NO_MATCHING_NOP (SLOT V1) (INTRINSIC "cmula0")) |
| 1138 | "cmula0 $avcv1CRq,$avcv1CRp" |
| 1139 | (+ avcv1CRq avcv1CRp (f-avc-v1sub4u12 #x0) (f-avc-v1sub4u0 #x4)) |
| 1140 | (sequence((DI concat28)) (c-call "check_option_cp" pc) |
| 1141 | (set concat28 (mul (ext DI avcv1CRq) (ext DI avcv1CRp))) |
| 1142 | (set avccopCCR2 (subword SI concat28 0)) |
| 1143 | (set avccopCCR3 (subword SI concat28 1)) |
| 1144 | ) |
| 1145 | ()) |
| 1146 | (dn16i cmulua0_avc_v1 "cmulua0" (VLIW64_NO_MATCHING_NOP (SLOT V1) (INTRINSIC "cmulua0")) |
| 1147 | "cmulua0 $avcv1CRq,$avcv1CRp" |
| 1148 | (+ avcv1CRq avcv1CRp (f-avc-v1sub4u12 #x1) (f-avc-v1sub4u0 #x4)) |
| 1149 | (sequence((DI concat29)) (c-call "check_option_cp" pc) |
| 1150 | (set concat29 (mul (zext DI avcv1CRq) (zext DI avcv1CRp))) |
| 1151 | (set avccopCCR2 (subword SI concat29 0)) |
| 1152 | (set avccopCCR3 (subword SI concat29 1)) |
| 1153 | ) |
| 1154 | ()) |
| 1155 | (dn16i cnmula0_avc_v1 "cnmula0" (VLIW64_NO_MATCHING_NOP (SLOT V1) (INTRINSIC "cnmula0")) |
| 1156 | "cnmula0 $avcv1CRq,$avcv1CRp" |
| 1157 | (+ avcv1CRq avcv1CRp (f-avc-v1sub4u12 #x2) (f-avc-v1sub4u0 #x4)) |
| 1158 | (sequence((DI concat30)) (c-call "check_option_cp" pc) |
| 1159 | (set concat30 (neg (mul (ext DI avcv1CRq) (ext DI avcv1CRp)))) |
| 1160 | (set avccopCCR2 (subword SI concat30 0)) |
| 1161 | (set avccopCCR3 (subword SI concat30 1)) |
| 1162 | ) |
| 1163 | ()) |
| 1164 | (dn16i cmada0_avc_v1 "cmada0" (VLIW64_NO_MATCHING_NOP (SLOT V1) (INTRINSIC "cmada0")) |
| 1165 | "cmada0 $avcv1CRq,$avcv1CRp" |
| 1166 | (+ avcv1CRq avcv1CRp (f-avc-v1sub4u12 #x4) (f-avc-v1sub4u0 #x4)) |
| 1167 | (sequence((DI concat31)) (c-call "check_option_cp" pc) |
| 1168 | (set concat31 (add (or (sll (zext DI (zext SI avccopCCR2)) 32) (zext DI avccopCCR3)) (mul (ext DI avcv1CRq) (ext DI avcv1CRp)))) |
| 1169 | (set avccopCCR2 (subword SI concat31 0)) |
| 1170 | (set avccopCCR3 (subword SI concat31 1)) |
| 1171 | ) |
| 1172 | ()) |
| 1173 | (dn16i cmadua0_avc_v1 "cmadua0" (VLIW64_NO_MATCHING_NOP (SLOT V1) (INTRINSIC "cmadua0")) |
| 1174 | "cmadua0 $avcv1CRq,$avcv1CRp" |
| 1175 | (+ avcv1CRq avcv1CRp (f-avc-v1sub4u12 #x5) (f-avc-v1sub4u0 #x4)) |
| 1176 | (sequence((DI concat32)) (c-call "check_option_cp" pc) |
| 1177 | (set concat32 (add (or (sll (zext DI (zext SI avccopCCR2)) 32) (zext DI avccopCCR3)) (mul (zext DI avcv1CRq) (zext DI avcv1CRp)))) |
| 1178 | (set avccopCCR2 (subword SI concat32 0)) |
| 1179 | (set avccopCCR3 (subword SI concat32 1)) |
| 1180 | ) |
| 1181 | ()) |
| 1182 | (dn16i cmsba0_avc_v1 "cmsba0" (VLIW64_NO_MATCHING_NOP (SLOT V1) (INTRINSIC "cmsba0")) |
| 1183 | "cmsba0 $avcv1CRq,$avcv1CRp" |
| 1184 | (+ avcv1CRq avcv1CRp (f-avc-v1sub4u12 #x6) (f-avc-v1sub4u0 #x4)) |
| 1185 | (sequence((DI concat33)) (c-call "check_option_cp" pc) |
| 1186 | (set concat33 (sub (or (sll (zext DI (zext SI avccopCCR2)) 32) (zext DI avccopCCR3)) (mul (ext DI avcv1CRq) (ext DI avcv1CRp)))) |
| 1187 | (set avccopCCR2 (subword SI concat33 0)) |
| 1188 | (set avccopCCR3 (subword SI concat33 1)) |
| 1189 | ) |
| 1190 | ()) |
| 1191 | (dn16i cmsbua0_avc_v1 "cmsbua0" (VLIW64_NO_MATCHING_NOP (SLOT V1) (INTRINSIC "cmsbua0")) |
| 1192 | "cmsbua0 $avcv1CRq,$avcv1CRp" |
| 1193 | (+ avcv1CRq avcv1CRp (f-avc-v1sub4u12 #x7) (f-avc-v1sub4u0 #x4)) |
| 1194 | (sequence((DI concat34)) (c-call "check_option_cp" pc) |
| 1195 | (set concat34 (sub (or (sll (zext DI (zext SI avccopCCR2)) 32) (zext DI avccopCCR3)) (mul (zext DI avcv1CRq) (zext DI avcv1CRp)))) |
| 1196 | (set avccopCCR2 (subword SI concat34 0)) |
| 1197 | (set avccopCCR3 (subword SI concat34 1)) |
| 1198 | ) |
| 1199 | ()) |
| 1200 | (dn16i cmula1_avc_v1 "cmula1" (VLIW64_NO_MATCHING_NOP (SLOT V1) (INTRINSIC "cmula1")) |
| 1201 | "cmula1 $avcv1CRq,$avcv1CRp" |
| 1202 | (+ avcv1CRq avcv1CRp (f-avc-v1sub4u12 #x8) (f-avc-v1sub4u0 #x4)) |
| 1203 | (sequence((DI concat35)) (c-call "check_option_cp" pc) |
| 1204 | (set concat35 (mul (ext DI avcv1CRq) (ext DI avcv1CRp))) |
| 1205 | (set avccopCCR4 (subword SI concat35 0)) |
| 1206 | (set avccopCCR5 (subword SI concat35 1)) |
| 1207 | ) |
| 1208 | ()) |
| 1209 | (dn16i cmulua1_avc_v1 "cmulua1" (VLIW64_NO_MATCHING_NOP (SLOT V1) (INTRINSIC "cmulua1")) |
| 1210 | "cmulua1 $avcv1CRq,$avcv1CRp" |
| 1211 | (+ avcv1CRq avcv1CRp (f-avc-v1sub4u12 #x9) (f-avc-v1sub4u0 #x4)) |
| 1212 | (sequence((DI concat36)) (c-call "check_option_cp" pc) |
| 1213 | (set concat36 (mul (zext DI avcv1CRq) (zext DI avcv1CRp))) |
| 1214 | (set avccopCCR4 (subword SI concat36 0)) |
| 1215 | (set avccopCCR5 (subword SI concat36 1)) |
| 1216 | ) |
| 1217 | ()) |
| 1218 | (dn16i cnmula1_avc_v1 "cnmula1" (VLIW64_NO_MATCHING_NOP (SLOT V1) (INTRINSIC "cnmula1")) |
| 1219 | "cnmula1 $avcv1CRq,$avcv1CRp" |
| 1220 | (+ avcv1CRq avcv1CRp (f-avc-v1sub4u12 #xa) (f-avc-v1sub4u0 #x4)) |
| 1221 | (sequence((DI concat37)) (c-call "check_option_cp" pc) |
| 1222 | (set concat37 (neg (mul (ext DI avcv1CRq) (ext DI avcv1CRp)))) |
| 1223 | (set avccopCCR4 (subword SI concat37 0)) |
| 1224 | (set avccopCCR5 (subword SI concat37 1)) |
| 1225 | ) |
| 1226 | ()) |
| 1227 | (dn16i cmada1_avc_v1 "cmada1" (VLIW64_NO_MATCHING_NOP (SLOT V1) (INTRINSIC "cmada1")) |
| 1228 | "cmada1 $avcv1CRq,$avcv1CRp" |
| 1229 | (+ avcv1CRq avcv1CRp (f-avc-v1sub4u12 #xc) (f-avc-v1sub4u0 #x4)) |
| 1230 | (sequence((DI concat38)) (c-call "check_option_cp" pc) |
| 1231 | (set concat38 (add (or (sll (zext DI (zext SI avccopCCR4)) 32) (zext DI avccopCCR5)) (mul (ext DI avcv1CRq) (ext DI avcv1CRp)))) |
| 1232 | (set avccopCCR4 (subword SI concat38 0)) |
| 1233 | (set avccopCCR5 (subword SI concat38 1)) |
| 1234 | ) |
| 1235 | ()) |
| 1236 | (dn16i cmadua1_avc_v1 "cmadua1" (VLIW64_NO_MATCHING_NOP (SLOT V1) (INTRINSIC "cmadua1")) |
| 1237 | "cmadua1 $avcv1CRq,$avcv1CRp" |
| 1238 | (+ avcv1CRq avcv1CRp (f-avc-v1sub4u12 #xd) (f-avc-v1sub4u0 #x4)) |
| 1239 | (sequence((DI concat39)) (c-call "check_option_cp" pc) |
| 1240 | (set concat39 (add (or (sll (zext DI (zext SI avccopCCR4)) 32) (zext DI avccopCCR5)) (mul (zext DI avcv1CRq) (zext DI avcv1CRp)))) |
| 1241 | (set avccopCCR4 (subword SI concat39 0)) |
| 1242 | (set avccopCCR5 (subword SI concat39 1)) |
| 1243 | ) |
| 1244 | ()) |
| 1245 | (dn16i cmsba1_avc_v1 "cmsba1" (VLIW64_NO_MATCHING_NOP (SLOT V1) (INTRINSIC "cmsba1")) |
| 1246 | "cmsba1 $avcv1CRq,$avcv1CRp" |
| 1247 | (+ avcv1CRq avcv1CRp (f-avc-v1sub4u12 #xe) (f-avc-v1sub4u0 #x4)) |
| 1248 | (sequence((DI concat40)) (c-call "check_option_cp" pc) |
| 1249 | (set concat40 (sub (or (sll (zext DI (zext SI avccopCCR4)) 32) (zext DI avccopCCR5)) (mul (ext DI avcv1CRq) (ext DI avcv1CRp)))) |
| 1250 | (set avccopCCR4 (subword SI concat40 0)) |
| 1251 | (set avccopCCR5 (subword SI concat40 1)) |
| 1252 | ) |
| 1253 | ()) |
| 1254 | (dn16i cmsbua1_avc_v1 "cmsbua1" (VLIW64_NO_MATCHING_NOP (SLOT V1) (INTRINSIC "cmsbua1")) |
| 1255 | "cmsbua1 $avcv1CRq,$avcv1CRp" |
| 1256 | (+ avcv1CRq avcv1CRp (f-avc-v1sub4u12 #xf) (f-avc-v1sub4u0 #x4)) |
| 1257 | (sequence((DI concat41)) (c-call "check_option_cp" pc) |
| 1258 | (set concat41 (sub (or (sll (zext DI (zext SI avccopCCR4)) 32) (zext DI avccopCCR5)) (mul (zext DI avcv1CRq) (zext DI avcv1CRp)))) |
| 1259 | (set avccopCCR4 (subword SI concat41 0)) |
| 1260 | (set avccopCCR5 (subword SI concat41 1)) |
| 1261 | ) |
| 1262 | ()) |
| 1263 | (dn32i cmov1_avc_v3 "cmov1" (VLIW64_NO_MATCHING_NOP (SLOT V3) (INTRINSIC "cmov1")) |
| 1264 | "cmov $avcv3CRn,$avcv3Rm" |
| 1265 | (+ (f-avc-v3sub4u0 #xf) (f-avc-v3sub4u12 #x7) avcv3CRn avcv3Rm (f-avc-v3sub4u28 #x0) (f-avc-v3sub4u24 #x0) (f-avc-v3sub4u20 #x0) (f-avc-v3sub4u16 #xf)) |
| 1266 | (sequence() (c-call "check_option_cp" pc) |
| 1267 | (set avcv3CRn avcv3Rm) |
| 1268 | ) |
| 1269 | ()) |
| 1270 | (dn32i cmov2_avc_v3 "cmov2" (VLIW64_NO_MATCHING_NOP (SLOT V3) (INTRINSIC "cmov2")) |
| 1271 | "cmov $avcv3Rm,$avcv3CRn" |
| 1272 | (+ (f-avc-v3sub4u0 #xf) (f-avc-v3sub4u12 #x7) avcv3Rm avcv3CRn (f-avc-v3sub4u28 #x1) (f-avc-v3sub4u24 #x0) (f-avc-v3sub4u20 #x0) (f-avc-v3sub4u16 #xf)) |
| 1273 | (sequence() (c-call "check_option_cp" pc) |
| 1274 | (set avcv3Rm avcv3CRn) |
| 1275 | ) |
| 1276 | ()) |
| 1277 | (dn32i cmovi_avc_v3 "cmovi" (VLIW64_NO_MATCHING_NOP (SLOT V3) (INTRINSIC "cmovi")) |
| 1278 | "cmovi $avcv3CRq,$avcv3Imm16s4x24e32" |
| 1279 | (+ (f-avc-v3sub4u0 #xf) (f-avc-v3sub4u12 #x7) avcv3CRq avcv3Imm16s4x24e32 (f-avc-v3sub4u16 #xe)) |
| 1280 | (sequence() (c-call "check_option_cp" pc) |
| 1281 | (set avcv3CRq (ext SI avcv3Imm16s4x24e32)) |
| 1282 | ) |
| 1283 | ()) |
| 1284 | (dn32i cmovc1_avc_v3 "cmovc1" (VLIW64_NO_MATCHING_NOP (SLOT V3) (INTRINSIC "cmovc1")) |
| 1285 | "cmovc $avcv3CCRn,$avcv3Rm" |
| 1286 | (+ (f-avc-v3sub4u0 #xf) (f-avc-v3sub4u12 #x7) avcv3CCRn avcv3Rm (f-avc-v3sub4u28 #x2) (f-avc-v3sub4u24 #x0) (f-avc-v3sub4u20 #x0) (f-avc-v3sub4u16 #xf)) |
| 1287 | (sequence() (c-call "check_option_cp" pc) |
| 1288 | (set avcv3CCRn avcv3Rm) |
| 1289 | ) |
| 1290 | ()) |
| 1291 | (dn32i cmovc2_avc_v3 "cmovc2" (VLIW64_NO_MATCHING_NOP (SLOT V3) (INTRINSIC "cmovc2")) |
| 1292 | "cmovc $avcv3Rm,$avcv3CCRn" |
| 1293 | (+ (f-avc-v3sub4u0 #xf) (f-avc-v3sub4u12 #x7) avcv3Rm avcv3CCRn (f-avc-v3sub4u28 #x3) (f-avc-v3sub4u24 #x0) (f-avc-v3sub4u20 #x0) (f-avc-v3sub4u16 #xf)) |
| 1294 | (sequence() (c-call "check_option_cp" pc) |
| 1295 | (set avcv3Rm avcv3CCRn) |
| 1296 | ) |
| 1297 | ()) |
| 1298 | (dn32i xmula0_avc_v3 "xmula0" (VLIW64_NO_MATCHING_NOP (SLOT V3) (INTRINSIC "xmula0")) |
| 1299 | "xmula0 $avcv3Rn,$avcv3Rm" |
| 1300 | (+ (f-avc-v3sub4u0 #xf) (f-avc-v3sub4u12 #x7) avcv3Rn avcv3Rm (f-avc-v3sub4u28 #x0) (f-avc-v3sub4u24 #x0) (f-avc-v3sub4u20 #x0) (f-avc-v3sub4u16 #xc)) |
| 1301 | (sequence((DI concat42)) (c-call "check_option_cp" pc) |
| 1302 | (set concat42 (mul (ext DI avcv3Rn) (ext DI avcv3Rm))) |
| 1303 | (set avccopCCR2 (subword SI concat42 0)) |
| 1304 | (set avccopCCR3 (subword SI concat42 1)) |
| 1305 | ) |
| 1306 | ()) |
| 1307 | (dn32i xmulua0_avc_v3 "xmulua0" (VLIW64_NO_MATCHING_NOP (SLOT V3) (INTRINSIC "xmulua0")) |
| 1308 | "xmulua0 $avcv3Rn,$avcv3Rm" |
| 1309 | (+ (f-avc-v3sub4u0 #xf) (f-avc-v3sub4u12 #x7) avcv3Rn avcv3Rm (f-avc-v3sub4u28 #x1) (f-avc-v3sub4u24 #x0) (f-avc-v3sub4u20 #x0) (f-avc-v3sub4u16 #xc)) |
| 1310 | (sequence((DI concat43)) (c-call "check_option_cp" pc) |
| 1311 | (set concat43 (mul (zext DI avcv3Rn) (zext DI avcv3Rm))) |
| 1312 | (set avccopCCR2 (subword SI concat43 0)) |
| 1313 | (set avccopCCR3 (subword SI concat43 1)) |
| 1314 | ) |
| 1315 | ()) |
| 1316 | (dn32i xnmula0_avc_v3 "xnmula0" (VLIW64_NO_MATCHING_NOP (SLOT V3) (INTRINSIC "xnmula0")) |
| 1317 | "xnmula0 $avcv3Rn,$avcv3Rm" |
| 1318 | (+ (f-avc-v3sub4u0 #xf) (f-avc-v3sub4u12 #x7) avcv3Rn avcv3Rm (f-avc-v3sub4u28 #x2) (f-avc-v3sub4u24 #x0) (f-avc-v3sub4u20 #x0) (f-avc-v3sub4u16 #xc)) |
| 1319 | (sequence((DI concat44)) (c-call "check_option_cp" pc) |
| 1320 | (set concat44 (neg (mul (ext DI avcv3Rn) (ext DI avcv3Rm)))) |
| 1321 | (set avccopCCR2 (subword SI concat44 0)) |
| 1322 | (set avccopCCR3 (subword SI concat44 1)) |
| 1323 | ) |
| 1324 | ()) |
| 1325 | (dn32i xmada0_avc_v3 "xmada0" (VLIW64_NO_MATCHING_NOP (SLOT V3) (INTRINSIC "xmada0")) |
| 1326 | "xmada0 $avcv3Rn,$avcv3Rm" |
| 1327 | (+ (f-avc-v3sub4u0 #xf) (f-avc-v3sub4u12 #x7) avcv3Rn avcv3Rm (f-avc-v3sub4u28 #x4) (f-avc-v3sub4u24 #x0) (f-avc-v3sub4u20 #x0) (f-avc-v3sub4u16 #xc)) |
| 1328 | (sequence((DI concat45)) (c-call "check_option_cp" pc) |
| 1329 | (set concat45 (add (or (sll (zext DI (zext SI avccopCCR2)) 32) (zext DI avccopCCR3)) (mul (ext DI avcv3Rn) (ext DI avcv3Rm)))) |
| 1330 | (set avccopCCR2 (subword SI concat45 0)) |
| 1331 | (set avccopCCR3 (subword SI concat45 1)) |
| 1332 | ) |
| 1333 | ()) |
| 1334 | (dn32i xmadua0_avc_v3 "xmadua0" (VLIW64_NO_MATCHING_NOP (SLOT V3) (INTRINSIC "xmadua0")) |
| 1335 | "xmadua0 $avcv3Rn,$avcv3Rm" |
| 1336 | (+ (f-avc-v3sub4u0 #xf) (f-avc-v3sub4u12 #x7) avcv3Rn avcv3Rm (f-avc-v3sub4u28 #x5) (f-avc-v3sub4u24 #x0) (f-avc-v3sub4u20 #x0) (f-avc-v3sub4u16 #xc)) |
| 1337 | (sequence((DI concat46)) (c-call "check_option_cp" pc) |
| 1338 | (set concat46 (add (or (sll (zext DI (zext SI avccopCCR2)) 32) (zext DI avccopCCR3)) (mul (zext DI avcv3Rn) (zext DI avcv3Rm)))) |
| 1339 | (set avccopCCR2 (subword SI concat46 0)) |
| 1340 | (set avccopCCR3 (subword SI concat46 1)) |
| 1341 | ) |
| 1342 | ()) |
| 1343 | (dn32i xmsba0_avc_v3 "xmsba0" (VLIW64_NO_MATCHING_NOP (SLOT V3) (INTRINSIC "xmsba0")) |
| 1344 | "xmsba0 $avcv3Rn,$avcv3Rm" |
| 1345 | (+ (f-avc-v3sub4u0 #xf) (f-avc-v3sub4u12 #x7) avcv3Rn avcv3Rm (f-avc-v3sub4u28 #x6) (f-avc-v3sub4u24 #x0) (f-avc-v3sub4u20 #x0) (f-avc-v3sub4u16 #xc)) |
| 1346 | (sequence((DI concat47)) (c-call "check_option_cp" pc) |
| 1347 | (set concat47 (sub (or (sll (zext DI (zext SI avccopCCR2)) 32) (zext DI avccopCCR3)) (mul (ext DI avcv3Rn) (ext DI avcv3Rm)))) |
| 1348 | (set avccopCCR2 (subword SI concat47 0)) |
| 1349 | (set avccopCCR3 (subword SI concat47 1)) |
| 1350 | ) |
| 1351 | ()) |
| 1352 | (dn32i xmsbua0_avc_v3 "xmsbua0" (VLIW64_NO_MATCHING_NOP (SLOT V3) (INTRINSIC "xmsbua0")) |
| 1353 | "xmsbua0 $avcv3Rn,$avcv3Rm" |
| 1354 | (+ (f-avc-v3sub4u0 #xf) (f-avc-v3sub4u12 #x7) avcv3Rn avcv3Rm (f-avc-v3sub4u28 #x7) (f-avc-v3sub4u24 #x0) (f-avc-v3sub4u20 #x0) (f-avc-v3sub4u16 #xc)) |
| 1355 | (sequence((DI concat48)) (c-call "check_option_cp" pc) |
| 1356 | (set concat48 (sub (or (sll (zext DI (zext SI avccopCCR2)) 32) (zext DI avccopCCR3)) (mul (zext DI avcv3Rn) (zext DI avcv3Rm)))) |
| 1357 | (set avccopCCR2 (subword SI concat48 0)) |
| 1358 | (set avccopCCR3 (subword SI concat48 1)) |
| 1359 | ) |
| 1360 | ()) |
| 1361 | (dn32i xmula1_avc_v3 "xmula1" (VLIW64_NO_MATCHING_NOP (SLOT V3) (INTRINSIC "xmula1")) |
| 1362 | "xmula1 $avcv3Rn,$avcv3Rm" |
| 1363 | (+ (f-avc-v3sub4u0 #xf) (f-avc-v3sub4u12 #x7) avcv3Rn avcv3Rm (f-avc-v3sub4u28 #x8) (f-avc-v3sub4u24 #x0) (f-avc-v3sub4u20 #x0) (f-avc-v3sub4u16 #xc)) |
| 1364 | (sequence((DI concat49)) (c-call "check_option_cp" pc) |
| 1365 | (set concat49 (mul (ext DI avcv3Rn) (ext DI avcv3Rm))) |
| 1366 | (set avccopCCR4 (subword SI concat49 0)) |
| 1367 | (set avccopCCR5 (subword SI concat49 1)) |
| 1368 | ) |
| 1369 | ()) |
| 1370 | (dn32i xmulua1_avc_v3 "xmulua1" (VLIW64_NO_MATCHING_NOP (SLOT V3) (INTRINSIC "xmulua1")) |
| 1371 | "xmulua1 $avcv3Rn,$avcv3Rm" |
| 1372 | (+ (f-avc-v3sub4u0 #xf) (f-avc-v3sub4u12 #x7) avcv3Rn avcv3Rm (f-avc-v3sub4u28 #x9) (f-avc-v3sub4u24 #x0) (f-avc-v3sub4u20 #x0) (f-avc-v3sub4u16 #xc)) |
| 1373 | (sequence((DI concat50)) (c-call "check_option_cp" pc) |
| 1374 | (set concat50 (mul (zext DI avcv3Rn) (zext DI avcv3Rm))) |
| 1375 | (set avccopCCR4 (subword SI concat50 0)) |
| 1376 | (set avccopCCR5 (subword SI concat50 1)) |
| 1377 | ) |
| 1378 | ()) |
| 1379 | (dn32i xnmula1_avc_v3 "xnmula1" (VLIW64_NO_MATCHING_NOP (SLOT V3) (INTRINSIC "xnmula1")) |
| 1380 | "xnmula1 $avcv3Rn,$avcv3Rm" |
| 1381 | (+ (f-avc-v3sub4u0 #xf) (f-avc-v3sub4u12 #x7) avcv3Rn avcv3Rm (f-avc-v3sub4u28 #xa) (f-avc-v3sub4u24 #x0) (f-avc-v3sub4u20 #x0) (f-avc-v3sub4u16 #xc)) |
| 1382 | (sequence((DI concat51)) (c-call "check_option_cp" pc) |
| 1383 | (set concat51 (neg (mul (ext DI avcv3Rn) (ext DI avcv3Rm)))) |
| 1384 | (set avccopCCR4 (subword SI concat51 0)) |
| 1385 | (set avccopCCR5 (subword SI concat51 1)) |
| 1386 | ) |
| 1387 | ()) |
| 1388 | (dn32i xmada1_avc_v3 "xmada1" (VLIW64_NO_MATCHING_NOP (SLOT V3) (INTRINSIC "xmada1")) |
| 1389 | "xmada1 $avcv3Rn,$avcv3Rm" |
| 1390 | (+ (f-avc-v3sub4u0 #xf) (f-avc-v3sub4u12 #x7) avcv3Rn avcv3Rm (f-avc-v3sub4u28 #xc) (f-avc-v3sub4u24 #x0) (f-avc-v3sub4u20 #x0) (f-avc-v3sub4u16 #xc)) |
| 1391 | (sequence((DI concat52)) (c-call "check_option_cp" pc) |
| 1392 | (set concat52 (add (or (sll (zext DI (zext SI avccopCCR4)) 32) (zext DI avccopCCR5)) (mul (ext DI avcv3Rn) (ext DI avcv3Rm)))) |
| 1393 | (set avccopCCR4 (subword SI concat52 0)) |
| 1394 | (set avccopCCR5 (subword SI concat52 1)) |
| 1395 | ) |
| 1396 | ()) |
| 1397 | (dn32i xmadua1_avc_v3 "xmadua1" (VLIW64_NO_MATCHING_NOP (SLOT V3) (INTRINSIC "xmadua1")) |
| 1398 | "xmadua1 $avcv3Rn,$avcv3Rm" |
| 1399 | (+ (f-avc-v3sub4u0 #xf) (f-avc-v3sub4u12 #x7) avcv3Rn avcv3Rm (f-avc-v3sub4u28 #xd) (f-avc-v3sub4u24 #x0) (f-avc-v3sub4u20 #x0) (f-avc-v3sub4u16 #xc)) |
| 1400 | (sequence((DI concat53)) (c-call "check_option_cp" pc) |
| 1401 | (set concat53 (add (or (sll (zext DI (zext SI avccopCCR4)) 32) (zext DI avccopCCR5)) (mul (zext DI avcv3Rn) (zext DI avcv3Rm)))) |
| 1402 | (set avccopCCR4 (subword SI concat53 0)) |
| 1403 | (set avccopCCR5 (subword SI concat53 1)) |
| 1404 | ) |
| 1405 | ()) |
| 1406 | (dn32i xmsba1_avc_v3 "xmsba1" (VLIW64_NO_MATCHING_NOP (SLOT V3) (INTRINSIC "xmsba1")) |
| 1407 | "xmsba1 $avcv3Rn,$avcv3Rm" |
| 1408 | (+ (f-avc-v3sub4u0 #xf) (f-avc-v3sub4u12 #x7) avcv3Rn avcv3Rm (f-avc-v3sub4u28 #xe) (f-avc-v3sub4u24 #x0) (f-avc-v3sub4u20 #x0) (f-avc-v3sub4u16 #xc)) |
| 1409 | (sequence((DI concat54)) (c-call "check_option_cp" pc) |
| 1410 | (set concat54 (sub (or (sll (zext DI (zext SI avccopCCR4)) 32) (zext DI avccopCCR5)) (mul (ext DI avcv3Rn) (ext DI avcv3Rm)))) |
| 1411 | (set avccopCCR4 (subword SI concat54 0)) |
| 1412 | (set avccopCCR5 (subword SI concat54 1)) |
| 1413 | ) |
| 1414 | ()) |
| 1415 | (dn32i xmsbua1_avc_v3 "xmsbua1" (VLIW64_NO_MATCHING_NOP (SLOT V3) (INTRINSIC "xmsbua1")) |
| 1416 | "xmsbua1 $avcv3Rn,$avcv3Rm" |
| 1417 | (+ (f-avc-v3sub4u0 #xf) (f-avc-v3sub4u12 #x7) avcv3Rn avcv3Rm (f-avc-v3sub4u28 #xf) (f-avc-v3sub4u24 #x0) (f-avc-v3sub4u20 #x0) (f-avc-v3sub4u16 #xc)) |
| 1418 | (sequence((DI concat55)) (c-call "check_option_cp" pc) |
| 1419 | (set concat55 (sub (or (sll (zext DI (zext SI avccopCCR4)) 32) (zext DI avccopCCR5)) (mul (zext DI avcv3Rn) (zext DI avcv3Rm)))) |
| 1420 | (set avccopCCR4 (subword SI concat55 0)) |
| 1421 | (set avccopCCR5 (subword SI concat55 1)) |
| 1422 | ) |
| 1423 | ()) |