[deliverable/linux.git] / drivers / char / watchdog / mv64x60_wdt.c

/*
 * mv64x60_wdt.c - MV64X60 (Marvell Discovery) watchdog userspace interface
 *
 * Author: James Chapman <jchapman@katalix.com>
 *
 * Platform-specific setup code should configure the dog to generate
 * interrupt or reset as required.  This code only enables/disables
 * and services the watchdog.
 *
 * Derived from mpc8xx_wdt.c, with the following copyright.
 * 
 * 2002 (c) Florian Schirmer <jolt@tuxbox.org> This file is licensed under
 * the terms of the GNU General Public License version 2. This program
 * is licensed "as is" without any warranty of any kind, whether express
 * or implied.
 */

#include <linux/fs.h>
#include <linux/init.h>
#include <linux/kernel.h>
#include <linux/miscdevice.h>
#include <linux/module.h>
#include <linux/watchdog.h>
#include <linux/platform_device.h>

#include <linux/mv643xx.h>
#include <asm/uaccess.h>
#include <asm/io.h>

#define MV64x60_WDT_WDC_OFFSET	0

/* MV64x60 WDC (config) register access definitions */
#define MV64x60_WDC_CTL1_MASK	(3 << 24)
#define MV64x60_WDC_CTL1(val)	((val & 3) << 24)
#define MV64x60_WDC_CTL2_MASK	(3 << 26)
#define MV64x60_WDC_CTL2(val)	((val & 3) << 26)

/* Flags bits */
#define MV64x60_WDOG_FLAG_OPENED	0
#define MV64x60_WDOG_FLAG_ENABLED	1

static unsigned long wdt_flags;
static int wdt_status;
static void __iomem *mv64x60_wdt_regs;
static int mv64x60_wdt_timeout;
static unsigned int bus_clk;
static char expect_close;

static int nowayout = WATCHDOG_NOWAYOUT;
module_param(nowayout, int, 0);
MODULE_PARM_DESC(nowayout, "Watchdog cannot be stopped once started (default=" __MODULE_STRING(WATCHDOG_NOWAYOUT) ")");

static void mv64x60_wdt_reg_write(u32 val)
{
	/* Allow write only to CTL1 / CTL2 fields, retaining values in
	 * other fields.
	 */
	u32 data = readl(mv64x60_wdt_regs + MV64x60_WDT_WDC_OFFSET);
	data &= ~(MV64x60_WDC_CTL1_MASK | MV64x60_WDC_CTL2_MASK);
	data |= val;
	writel(data, mv64x60_wdt_regs + MV64x60_WDT_WDC_OFFSET);
}

static void mv64x60_wdt_service(void)
{
	/* Write 01 followed by 10 to CTL2 */
	mv64x60_wdt_reg_write(MV64x60_WDC_CTL2(0x01));
	mv64x60_wdt_reg_write(MV64x60_WDC_CTL2(0x02));
}

static void mv64x60_wdt_handler_disable(void)
{
	if (test_and_clear_bit(MV64x60_WDOG_FLAG_ENABLED, &wdt_flags)) {
		/* Write 01 followed by 10 to CTL1 */
		mv64x60_wdt_reg_write(MV64x60_WDC_CTL1(0x01));
		mv64x60_wdt_reg_write(MV64x60_WDC_CTL1(0x02));
		printk(KERN_NOTICE "mv64x60_wdt: watchdog deactivated\n");
	}
}

static void mv64x60_wdt_handler_enable(void)
{
	if (!test_and_set_bit(MV64x60_WDOG_FLAG_ENABLED, &wdt_flags)) {
		/* Write 01 followed by 10 to CTL1 */
		mv64x60_wdt_reg_write(MV64x60_WDC_CTL1(0x01));
		mv64x60_wdt_reg_write(MV64x60_WDC_CTL1(0x02));
		printk(KERN_NOTICE "mv64x60_wdt: watchdog activated\n");
	}
}

static void mv64x60_wdt_set_timeout(int timeout)
{
	/* maximum bus cycle count is 0xFFFFFFFF */
	if (timeout > 0xFFFFFFFF / bus_clk)
		timeout = 0xFFFFFFFF / bus_clk;

	mv64x60_wdt_timeout = timeout;
	writel((timeout * bus_clk) >> 8,
	       mv64x60_wdt_regs + MV64x60_WDT_WDC_OFFSET);
	mv64x60_wdt_service();
}

static int mv64x60_wdt_open(struct inode *inode, struct file *file)
{
	if (test_and_set_bit(MV64x60_WDOG_FLAG_OPENED, &wdt_flags))
		return -EBUSY;

	if (nowayout)
		__module_get(THIS_MODULE);

	mv64x60_wdt_service();
	mv64x60_wdt_handler_enable();

	return nonseekable_open(inode, file);
}

static int mv64x60_wdt_release(struct inode *inode, struct file *file)
{
	if (expect_close == 42)
		mv64x60_wdt_handler_disable();
	else {
		printk(KERN_CRIT
		       "mv64x60_wdt: unexpected close, not stopping timer!\n");
		mv64x60_wdt_service();
	}
	expect_close = 0;

	clear_bit(MV64x60_WDOG_FLAG_OPENED, &wdt_flags);

	return 0;
}

static ssize_t mv64x60_wdt_write(struct file *file, const char __user *data,
				 size_t len, loff_t * ppos)
{
	if (len) {
		if (!nowayout) {
			size_t i;

			expect_close = 0;

			for (i = 0; i != len; i++) {
				char c;
				if(get_user(c, data + i))
					return -EFAULT;
				if (c == 'V')
					expect_close = 42;
			}
		}
		mv64x60_wdt_service();
	}

	return len;
}

static int mv64x60_wdt_ioctl(struct inode *inode, struct file *file,
			     unsigned int cmd, unsigned long arg)
{
	int timeout;
	int options;
	void __user *argp = (void __user *)arg;
	static struct watchdog_info info = {
		.options =	WDIOF_SETTIMEOUT	|
				WDIOF_MAGICCLOSE	|
				WDIOF_KEEPALIVEPING,
		.firmware_version = 0,
		.identity = "MV64x60 watchdog",
	};

	switch (cmd) {
	case WDIOC_GETSUPPORT:
		if (copy_to_user(argp, &info, sizeof(info)))
			return -EFAULT;
		break;

	case WDIOC_GETSTATUS:
	case WDIOC_GETBOOTSTATUS:
		if (put_user(wdt_status, (int __user *)argp))
			return -EFAULT;
		wdt_status &= ~WDIOF_KEEPALIVEPING;
		break;

	case WDIOC_GETTEMP:
		return -EOPNOTSUPP;

	case WDIOC_SETOPTIONS:
		if (get_user(options, (int __user *)argp))
			return -EFAULT;

		if (options & WDIOS_DISABLECARD)
			mv64x60_wdt_handler_disable();

		if (options & WDIOS_ENABLECARD)
			mv64x60_wdt_handler_enable();
		break;

	case WDIOC_KEEPALIVE:
		mv64x60_wdt_service();
		wdt_status |= WDIOF_KEEPALIVEPING;
		break;

	case WDIOC_SETTIMEOUT:
		if (get_user(timeout, (int __user *)argp))
			return -EFAULT;
		mv64x60_wdt_set_timeout(timeout);
		/* Fall through */

	case WDIOC_GETTIMEOUT:
		if (put_user(mv64x60_wdt_timeout, (int __user *)argp))
			return -EFAULT;
		break;

	default:
		return -ENOTTY;
	}

	return 0;
}

static const struct file_operations mv64x60_wdt_fops = {
	.owner = THIS_MODULE,
	.llseek = no_llseek,
	.write = mv64x60_wdt_write,
	.ioctl = mv64x60_wdt_ioctl,
	.open = mv64x60_wdt_open,
	.release = mv64x60_wdt_release,
};

static struct miscdevice mv64x60_wdt_miscdev = {
	.minor = WATCHDOG_MINOR,
	.name = "watchdog",
	.fops = &mv64x60_wdt_fops,
};

static int __devinit mv64x60_wdt_probe(struct platform_device *dev)
{
	struct mv64x60_wdt_pdata *pdata = dev->dev.platform_data;
	struct resource *r;
	int timeout = 10;

	bus_clk = 133;			/* in MHz */
	if (pdata) {
		timeout = pdata->timeout;
		bus_clk = pdata->bus_clk;
	}

	/* Since bus_clk is truncated MHz, actual frequency could be
	 * up to 1MHz higher.  Round up, since it's better to time out
	 * too late than too soon.
	 */
	bus_clk++;
	bus_clk *= 1000000;		/* convert to Hz */

	r = platform_get_resource(dev, IORESOURCE_MEM, 0);
	if (!r)
		return -ENODEV;

	mv64x60_wdt_regs = ioremap(r->start, r->end - r->start + 1);
	if (mv64x60_wdt_regs == NULL)
		return -ENOMEM;

	mv64x60_wdt_set_timeout(timeout);

	mv64x60_wdt_handler_disable();	/* in case timer was already running */

	return misc_register(&mv64x60_wdt_miscdev);
}

static int __devexit mv64x60_wdt_remove(struct platform_device *dev)
{
	misc_deregister(&mv64x60_wdt_miscdev);

	mv64x60_wdt_service();
	mv64x60_wdt_handler_disable();

	iounmap(mv64x60_wdt_regs);

	return 0;
}

static struct platform_driver mv64x60_wdt_driver = {
	.probe = mv64x60_wdt_probe,
	.remove = __devexit_p(mv64x60_wdt_remove),
	.driver = {
		.owner = THIS_MODULE,
		.name = MV64x60_WDT_NAME,
	},
};

static int __init mv64x60_wdt_init(void)
{
	printk(KERN_INFO "MV64x60 watchdog driver\n");

	return platform_driver_register(&mv64x60_wdt_driver);
}

static void __exit mv64x60_wdt_exit(void)
{
	platform_driver_unregister(&mv64x60_wdt_driver);
}

module_init(mv64x60_wdt_init);
module_exit(mv64x60_wdt_exit);

MODULE_AUTHOR("James Chapman <jchapman@katalix.com>");
MODULE_DESCRIPTION("MV64x60 watchdog driver");
MODULE_LICENSE("GPL");
MODULE_ALIAS_MISCDEV(WATCHDOG_MINOR);
Commit	Line	Data
	1	/*
	2	* mv64x60_wdt.c - MV64X60 (Marvell Discovery) watchdog userspace interface
	3	*
	4	* Author: James Chapman <jchapman@katalix.com>
	5	*
	6	* Platform-specific setup code should configure the dog to generate
	7	* interrupt or reset as required. This code only enables/disables
	8	* and services the watchdog.
	9	*
	10	* Derived from mpc8xx_wdt.c, with the following copyright.
	11	*
	12	* 2002 (c) Florian Schirmer <jolt@tuxbox.org> This file is licensed under
	13	* the terms of the GNU General Public License version 2. This program
	14	* is licensed "as is" without any warranty of any kind, whether express
	15	* or implied.
	16	*/
	17
	18	#include <linux/fs.h>
	19	#include <linux/init.h>
	20	#include <linux/kernel.h>
	21	#include <linux/miscdevice.h>
	22	#include <linux/module.h>
	23	#include <linux/watchdog.h>
	24	#include <linux/platform_device.h>
	25
	26	#include <linux/mv643xx.h>
	27	#include <asm/uaccess.h>
	28	#include <asm/io.h>
	29
	30	#define MV64x60_WDT_WDC_OFFSET 0
	31
	32	/* MV64x60 WDC (config) register access definitions */
	33	#define MV64x60_WDC_CTL1_MASK (3 << 24)
	34	#define MV64x60_WDC_CTL1(val) ((val & 3) << 24)
	35	#define MV64x60_WDC_CTL2_MASK (3 << 26)
	36	#define MV64x60_WDC_CTL2(val) ((val & 3) << 26)
	37
	38	/* Flags bits */
	39	#define MV64x60_WDOG_FLAG_OPENED 0
	40	#define MV64x60_WDOG_FLAG_ENABLED 1
	41
	42	static unsigned long wdt_flags;
	43	static int wdt_status;
	44	static void __iomem *mv64x60_wdt_regs;
	45	static int mv64x60_wdt_timeout;
	46	static unsigned int bus_clk;
	47	static char expect_close;
	48
	49	static int nowayout = WATCHDOG_NOWAYOUT;
	50	module_param(nowayout, int, 0);
	51	MODULE_PARM_DESC(nowayout, "Watchdog cannot be stopped once started (default=" __MODULE_STRING(WATCHDOG_NOWAYOUT) ")");
	52
	53	static void mv64x60_wdt_reg_write(u32 val)
	54	{
	55	/* Allow write only to CTL1 / CTL2 fields, retaining values in
	56	* other fields.
	57	*/
	58	u32 data = readl(mv64x60_wdt_regs + MV64x60_WDT_WDC_OFFSET);
	59	data &= ~(MV64x60_WDC_CTL1_MASK \| MV64x60_WDC_CTL2_MASK);
	60	data \|= val;
	61	writel(data, mv64x60_wdt_regs + MV64x60_WDT_WDC_OFFSET);
	62	}
	63
	64	static void mv64x60_wdt_service(void)
	65	{
	66	/* Write 01 followed by 10 to CTL2 */
	67	mv64x60_wdt_reg_write(MV64x60_WDC_CTL2(0x01));
	68	mv64x60_wdt_reg_write(MV64x60_WDC_CTL2(0x02));
	69	}
	70
	71	static void mv64x60_wdt_handler_disable(void)
	72	{
	73	if (test_and_clear_bit(MV64x60_WDOG_FLAG_ENABLED, &wdt_flags)) {
	74	/* Write 01 followed by 10 to CTL1 */
	75	mv64x60_wdt_reg_write(MV64x60_WDC_CTL1(0x01));
	76	mv64x60_wdt_reg_write(MV64x60_WDC_CTL1(0x02));
	77	printk(KERN_NOTICE "mv64x60_wdt: watchdog deactivated\n");
	78	}
	79	}
	80
	81	static void mv64x60_wdt_handler_enable(void)
	82	{
	83	if (!test_and_set_bit(MV64x60_WDOG_FLAG_ENABLED, &wdt_flags)) {
	84	/* Write 01 followed by 10 to CTL1 */
	85	mv64x60_wdt_reg_write(MV64x60_WDC_CTL1(0x01));
	86	mv64x60_wdt_reg_write(MV64x60_WDC_CTL1(0x02));
	87	printk(KERN_NOTICE "mv64x60_wdt: watchdog activated\n");
	88	}
	89	}
	90
	91	static void mv64x60_wdt_set_timeout(int timeout)
	92	{
	93	/* maximum bus cycle count is 0xFFFFFFFF */
	94	if (timeout > 0xFFFFFFFF / bus_clk)
	95	timeout = 0xFFFFFFFF / bus_clk;
	96
	97	mv64x60_wdt_timeout = timeout;
	98	writel((timeout * bus_clk) >> 8,
	99	mv64x60_wdt_regs + MV64x60_WDT_WDC_OFFSET);
	100	mv64x60_wdt_service();
	101	}
	102
	103	static int mv64x60_wdt_open(struct inode inode, struct file file)
	104	{
	105	if (test_and_set_bit(MV64x60_WDOG_FLAG_OPENED, &wdt_flags))
	106	return -EBUSY;
	107
	108	if (nowayout)
	109	__module_get(THIS_MODULE);
	110
	111	mv64x60_wdt_service();
	112	mv64x60_wdt_handler_enable();
	113
	114	return nonseekable_open(inode, file);
	115	}
	116
	117	static int mv64x60_wdt_release(struct inode inode, struct file file)
	118	{
	119	if (expect_close == 42)
	120	mv64x60_wdt_handler_disable();
	121	else {
	122	printk(KERN_CRIT
	123	"mv64x60_wdt: unexpected close, not stopping timer!\n");
	124	mv64x60_wdt_service();
	125	}
	126	expect_close = 0;
	127
	128	clear_bit(MV64x60_WDOG_FLAG_OPENED, &wdt_flags);
	129
	130	return 0;
	131	}
	132
	133	static ssize_t mv64x60_wdt_write(struct file file, const char __user data,
	134	size_t len, loff_t * ppos)
	135	{
	136	if (len) {
	137	if (!nowayout) {
	138	size_t i;
	139
	140	expect_close = 0;
	141
	142	for (i = 0; i != len; i++) {
	143	char c;
	144	if(get_user(c, data + i))
	145	return -EFAULT;
	146	if (c == 'V')
	147	expect_close = 42;
	148	}
	149	}
	150	mv64x60_wdt_service();
	151	}
	152
	153	return len;
	154	}
	155
	156	static int mv64x60_wdt_ioctl(struct inode inode, struct file file,
	157	unsigned int cmd, unsigned long arg)
	158	{
	159	int timeout;
	160	int options;
	161	void __user argp = (void __user )arg;
	162	static struct watchdog_info info = {
	163	.options = WDIOF_SETTIMEOUT \|
	164	WDIOF_MAGICCLOSE \|
	165	WDIOF_KEEPALIVEPING,
	166	.firmware_version = 0,
	167	.identity = "MV64x60 watchdog",
	168	};
	169
	170	switch (cmd) {
	171	case WDIOC_GETSUPPORT:
	172	if (copy_to_user(argp, &info, sizeof(info)))
	173	return -EFAULT;
	174	break;
	175
	176	case WDIOC_GETSTATUS:
	177	case WDIOC_GETBOOTSTATUS:
	178	if (put_user(wdt_status, (int __user *)argp))
	179	return -EFAULT;
	180	wdt_status &= ~WDIOF_KEEPALIVEPING;
	181	break;
	182
	183	case WDIOC_GETTEMP:
	184	return -EOPNOTSUPP;
	185
	186	case WDIOC_SETOPTIONS:
	187	if (get_user(options, (int __user *)argp))
	188	return -EFAULT;
	189
	190	if (options & WDIOS_DISABLECARD)
	191	mv64x60_wdt_handler_disable();
	192
	193	if (options & WDIOS_ENABLECARD)
	194	mv64x60_wdt_handler_enable();
	195	break;
	196
	197	case WDIOC_KEEPALIVE:
	198	mv64x60_wdt_service();
	199	wdt_status \|= WDIOF_KEEPALIVEPING;
	200	break;
	201
	202	case WDIOC_SETTIMEOUT:
	203	if (get_user(timeout, (int __user *)argp))
	204	return -EFAULT;
	205	mv64x60_wdt_set_timeout(timeout);
	206	/* Fall through */
	207
	208	case WDIOC_GETTIMEOUT:
	209	if (put_user(mv64x60_wdt_timeout, (int __user *)argp))
	210	return -EFAULT;
	211	break;
	212
	213	default:
	214	return -ENOTTY;
	215	}
	216
	217	return 0;
	218	}
	219
	220	static const struct file_operations mv64x60_wdt_fops = {
	221	.owner = THIS_MODULE,
	222	.llseek = no_llseek,
	223	.write = mv64x60_wdt_write,
	224	.ioctl = mv64x60_wdt_ioctl,
	225	.open = mv64x60_wdt_open,
	226	.release = mv64x60_wdt_release,
	227	};
	228
	229	static struct miscdevice mv64x60_wdt_miscdev = {
	230	.minor = WATCHDOG_MINOR,
	231	.name = "watchdog",
	232	.fops = &mv64x60_wdt_fops,
	233	};
	234
	235	static int __devinit mv64x60_wdt_probe(struct platform_device *dev)
	236	{
	237	struct mv64x60_wdt_pdata *pdata = dev->dev.platform_data;
	238	struct resource *r;
	239	int timeout = 10;
	240
	241	bus_clk = 133; /* in MHz */
	242	if (pdata) {
	243	timeout = pdata->timeout;
	244	bus_clk = pdata->bus_clk;
	245	}
	246
	247	/* Since bus_clk is truncated MHz, actual frequency could be
	248	* up to 1MHz higher. Round up, since it's better to time out
	249	* too late than too soon.
	250	*/
	251	bus_clk++;
	252	bus_clk = 1000000; / convert to Hz */
	253
	254	r = platform_get_resource(dev, IORESOURCE_MEM, 0);
	255	if (!r)
	256	return -ENODEV;
	257
	258	mv64x60_wdt_regs = ioremap(r->start, r->end - r->start + 1);
	259	if (mv64x60_wdt_regs == NULL)
	260	return -ENOMEM;
	261
	262	mv64x60_wdt_set_timeout(timeout);
	263
	264	mv64x60_wdt_handler_disable(); /* in case timer was already running */
	265
	266	return misc_register(&mv64x60_wdt_miscdev);
	267	}
	268
	269	static int __devexit mv64x60_wdt_remove(struct platform_device *dev)
	270	{
	271	misc_deregister(&mv64x60_wdt_miscdev);
	272
	273	mv64x60_wdt_service();
	274	mv64x60_wdt_handler_disable();
	275
	276	iounmap(mv64x60_wdt_regs);
	277
	278	return 0;
	279	}
	280
	281	static struct platform_driver mv64x60_wdt_driver = {
	282	.probe = mv64x60_wdt_probe,
	283	.remove = __devexit_p(mv64x60_wdt_remove),
	284	.driver = {
	285	.owner = THIS_MODULE,
	286	.name = MV64x60_WDT_NAME,
	287	},
	288	};
	289
	290	static int __init mv64x60_wdt_init(void)
	291	{
	292	printk(KERN_INFO "MV64x60 watchdog driver\n");
	293
	294	return platform_driver_register(&mv64x60_wdt_driver);
	295	}
	296
	297	static void __exit mv64x60_wdt_exit(void)
	298	{
	299	platform_driver_unregister(&mv64x60_wdt_driver);
	300	}
	301
	302	module_init(mv64x60_wdt_init);
	303	module_exit(mv64x60_wdt_exit);
	304
	305	MODULE_AUTHOR("James Chapman <jchapman@katalix.com>");
	306	MODULE_DESCRIPTION("MV64x60 watchdog driver");
	307	MODULE_LICENSE("GPL");
	308	MODULE_ALIAS_MISCDEV(WATCHDOG_MINOR);