| 1 | /* |
| 2 | * (c) 2003-2012 Advanced Micro Devices, Inc. |
| 3 | * Your use of this code is subject to the terms and conditions of the |
| 4 | * GNU general public license version 2. See "COPYING" or |
| 5 | * http://www.gnu.org/licenses/gpl.html |
| 6 | * |
| 7 | * Maintainer: |
| 8 | * Andreas Herrmann <herrmann.der.user@googlemail.com> |
| 9 | * |
| 10 | * Based on the powernow-k7.c module written by Dave Jones. |
| 11 | * (C) 2003 Dave Jones on behalf of SuSE Labs |
| 12 | * (C) 2004 Dominik Brodowski <linux@brodo.de> |
| 13 | * (C) 2004 Pavel Machek <pavel@ucw.cz> |
| 14 | * Licensed under the terms of the GNU GPL License version 2. |
| 15 | * Based upon datasheets & sample CPUs kindly provided by AMD. |
| 16 | * |
| 17 | * Valuable input gratefully received from Dave Jones, Pavel Machek, |
| 18 | * Dominik Brodowski, Jacob Shin, and others. |
| 19 | * Originally developed by Paul Devriendt. |
| 20 | * |
| 21 | * Processor information obtained from Chapter 9 (Power and Thermal |
| 22 | * Management) of the "BIOS and Kernel Developer's Guide (BKDG) for |
| 23 | * the AMD Athlon 64 and AMD Opteron Processors" and section "2.x |
| 24 | * Power Management" in BKDGs for newer AMD CPU families. |
| 25 | * |
| 26 | * Tables for specific CPUs can be inferred from AMD's processor |
| 27 | * power and thermal data sheets, (e.g. 30417.pdf, 30430.pdf, 43375.pdf) |
| 28 | */ |
| 29 | |
| 30 | #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt |
| 31 | |
| 32 | #include <linux/kernel.h> |
| 33 | #include <linux/smp.h> |
| 34 | #include <linux/module.h> |
| 35 | #include <linux/init.h> |
| 36 | #include <linux/cpufreq.h> |
| 37 | #include <linux/slab.h> |
| 38 | #include <linux/string.h> |
| 39 | #include <linux/cpumask.h> |
| 40 | #include <linux/io.h> |
| 41 | #include <linux/delay.h> |
| 42 | |
| 43 | #include <asm/msr.h> |
| 44 | #include <asm/cpu_device_id.h> |
| 45 | |
| 46 | #include <linux/acpi.h> |
| 47 | #include <linux/mutex.h> |
| 48 | #include <acpi/processor.h> |
| 49 | |
| 50 | #define VERSION "version 2.20.00" |
| 51 | #include "powernow-k8.h" |
| 52 | |
| 53 | /* serialize freq changes */ |
| 54 | static DEFINE_MUTEX(fidvid_mutex); |
| 55 | |
| 56 | static DEFINE_PER_CPU(struct powernow_k8_data *, powernow_data); |
| 57 | |
| 58 | static struct cpufreq_driver cpufreq_amd64_driver; |
| 59 | |
| 60 | /* Return a frequency in MHz, given an input fid */ |
| 61 | static u32 find_freq_from_fid(u32 fid) |
| 62 | { |
| 63 | return 800 + (fid * 100); |
| 64 | } |
| 65 | |
| 66 | /* Return a frequency in KHz, given an input fid */ |
| 67 | static u32 find_khz_freq_from_fid(u32 fid) |
| 68 | { |
| 69 | return 1000 * find_freq_from_fid(fid); |
| 70 | } |
| 71 | |
| 72 | /* Return the vco fid for an input fid |
| 73 | * |
| 74 | * Each "low" fid has corresponding "high" fid, and you can get to "low" fids |
| 75 | * only from corresponding high fids. This returns "high" fid corresponding to |
| 76 | * "low" one. |
| 77 | */ |
| 78 | static u32 convert_fid_to_vco_fid(u32 fid) |
| 79 | { |
| 80 | if (fid < HI_FID_TABLE_BOTTOM) |
| 81 | return 8 + (2 * fid); |
| 82 | else |
| 83 | return fid; |
| 84 | } |
| 85 | |
| 86 | /* |
| 87 | * Return 1 if the pending bit is set. Unless we just instructed the processor |
| 88 | * to transition to a new state, seeing this bit set is really bad news. |
| 89 | */ |
| 90 | static int pending_bit_stuck(void) |
| 91 | { |
| 92 | u32 lo, hi; |
| 93 | |
| 94 | rdmsr(MSR_FIDVID_STATUS, lo, hi); |
| 95 | return lo & MSR_S_LO_CHANGE_PENDING ? 1 : 0; |
| 96 | } |
| 97 | |
| 98 | /* |
| 99 | * Update the global current fid / vid values from the status msr. |
| 100 | * Returns 1 on error. |
| 101 | */ |
| 102 | static int query_current_values_with_pending_wait(struct powernow_k8_data *data) |
| 103 | { |
| 104 | u32 lo, hi; |
| 105 | u32 i = 0; |
| 106 | |
| 107 | do { |
| 108 | if (i++ > 10000) { |
| 109 | pr_debug("detected change pending stuck\n"); |
| 110 | return 1; |
| 111 | } |
| 112 | rdmsr(MSR_FIDVID_STATUS, lo, hi); |
| 113 | } while (lo & MSR_S_LO_CHANGE_PENDING); |
| 114 | |
| 115 | data->currvid = hi & MSR_S_HI_CURRENT_VID; |
| 116 | data->currfid = lo & MSR_S_LO_CURRENT_FID; |
| 117 | |
| 118 | return 0; |
| 119 | } |
| 120 | |
| 121 | /* the isochronous relief time */ |
| 122 | static void count_off_irt(struct powernow_k8_data *data) |
| 123 | { |
| 124 | udelay((1 << data->irt) * 10); |
| 125 | return; |
| 126 | } |
| 127 | |
| 128 | /* the voltage stabilization time */ |
| 129 | static void count_off_vst(struct powernow_k8_data *data) |
| 130 | { |
| 131 | udelay(data->vstable * VST_UNITS_20US); |
| 132 | return; |
| 133 | } |
| 134 | |
| 135 | /* need to init the control msr to a safe value (for each cpu) */ |
| 136 | static void fidvid_msr_init(void) |
| 137 | { |
| 138 | u32 lo, hi; |
| 139 | u8 fid, vid; |
| 140 | |
| 141 | rdmsr(MSR_FIDVID_STATUS, lo, hi); |
| 142 | vid = hi & MSR_S_HI_CURRENT_VID; |
| 143 | fid = lo & MSR_S_LO_CURRENT_FID; |
| 144 | lo = fid | (vid << MSR_C_LO_VID_SHIFT); |
| 145 | hi = MSR_C_HI_STP_GNT_BENIGN; |
| 146 | pr_debug("cpu%d, init lo 0x%x, hi 0x%x\n", smp_processor_id(), lo, hi); |
| 147 | wrmsr(MSR_FIDVID_CTL, lo, hi); |
| 148 | } |
| 149 | |
| 150 | /* write the new fid value along with the other control fields to the msr */ |
| 151 | static int write_new_fid(struct powernow_k8_data *data, u32 fid) |
| 152 | { |
| 153 | u32 lo; |
| 154 | u32 savevid = data->currvid; |
| 155 | u32 i = 0; |
| 156 | |
| 157 | if ((fid & INVALID_FID_MASK) || (data->currvid & INVALID_VID_MASK)) { |
| 158 | pr_err("internal error - overflow on fid write\n"); |
| 159 | return 1; |
| 160 | } |
| 161 | |
| 162 | lo = fid; |
| 163 | lo |= (data->currvid << MSR_C_LO_VID_SHIFT); |
| 164 | lo |= MSR_C_LO_INIT_FID_VID; |
| 165 | |
| 166 | pr_debug("writing fid 0x%x, lo 0x%x, hi 0x%x\n", |
| 167 | fid, lo, data->plllock * PLL_LOCK_CONVERSION); |
| 168 | |
| 169 | do { |
| 170 | wrmsr(MSR_FIDVID_CTL, lo, data->plllock * PLL_LOCK_CONVERSION); |
| 171 | if (i++ > 100) { |
| 172 | pr_err("Hardware error - pending bit very stuck - no further pstate changes possible\n"); |
| 173 | return 1; |
| 174 | } |
| 175 | } while (query_current_values_with_pending_wait(data)); |
| 176 | |
| 177 | count_off_irt(data); |
| 178 | |
| 179 | if (savevid != data->currvid) { |
| 180 | pr_err("vid change on fid trans, old 0x%x, new 0x%x\n", |
| 181 | savevid, data->currvid); |
| 182 | return 1; |
| 183 | } |
| 184 | |
| 185 | if (fid != data->currfid) { |
| 186 | pr_err("fid trans failed, fid 0x%x, curr 0x%x\n", fid, |
| 187 | data->currfid); |
| 188 | return 1; |
| 189 | } |
| 190 | |
| 191 | return 0; |
| 192 | } |
| 193 | |
| 194 | /* Write a new vid to the hardware */ |
| 195 | static int write_new_vid(struct powernow_k8_data *data, u32 vid) |
| 196 | { |
| 197 | u32 lo; |
| 198 | u32 savefid = data->currfid; |
| 199 | int i = 0; |
| 200 | |
| 201 | if ((data->currfid & INVALID_FID_MASK) || (vid & INVALID_VID_MASK)) { |
| 202 | pr_err("internal error - overflow on vid write\n"); |
| 203 | return 1; |
| 204 | } |
| 205 | |
| 206 | lo = data->currfid; |
| 207 | lo |= (vid << MSR_C_LO_VID_SHIFT); |
| 208 | lo |= MSR_C_LO_INIT_FID_VID; |
| 209 | |
| 210 | pr_debug("writing vid 0x%x, lo 0x%x, hi 0x%x\n", |
| 211 | vid, lo, STOP_GRANT_5NS); |
| 212 | |
| 213 | do { |
| 214 | wrmsr(MSR_FIDVID_CTL, lo, STOP_GRANT_5NS); |
| 215 | if (i++ > 100) { |
| 216 | pr_err("internal error - pending bit very stuck - no further pstate changes possible\n"); |
| 217 | return 1; |
| 218 | } |
| 219 | } while (query_current_values_with_pending_wait(data)); |
| 220 | |
| 221 | if (savefid != data->currfid) { |
| 222 | pr_err("fid changed on vid trans, old 0x%x new 0x%x\n", |
| 223 | savefid, data->currfid); |
| 224 | return 1; |
| 225 | } |
| 226 | |
| 227 | if (vid != data->currvid) { |
| 228 | pr_err("vid trans failed, vid 0x%x, curr 0x%x\n", |
| 229 | vid, data->currvid); |
| 230 | return 1; |
| 231 | } |
| 232 | |
| 233 | return 0; |
| 234 | } |
| 235 | |
| 236 | /* |
| 237 | * Reduce the vid by the max of step or reqvid. |
| 238 | * Decreasing vid codes represent increasing voltages: |
| 239 | * vid of 0 is 1.550V, vid of 0x1e is 0.800V, vid of VID_OFF is off. |
| 240 | */ |
| 241 | static int decrease_vid_code_by_step(struct powernow_k8_data *data, |
| 242 | u32 reqvid, u32 step) |
| 243 | { |
| 244 | if ((data->currvid - reqvid) > step) |
| 245 | reqvid = data->currvid - step; |
| 246 | |
| 247 | if (write_new_vid(data, reqvid)) |
| 248 | return 1; |
| 249 | |
| 250 | count_off_vst(data); |
| 251 | |
| 252 | return 0; |
| 253 | } |
| 254 | |
| 255 | /* Change Opteron/Athlon64 fid and vid, by the 3 phases. */ |
| 256 | static int transition_fid_vid(struct powernow_k8_data *data, |
| 257 | u32 reqfid, u32 reqvid) |
| 258 | { |
| 259 | if (core_voltage_pre_transition(data, reqvid, reqfid)) |
| 260 | return 1; |
| 261 | |
| 262 | if (core_frequency_transition(data, reqfid)) |
| 263 | return 1; |
| 264 | |
| 265 | if (core_voltage_post_transition(data, reqvid)) |
| 266 | return 1; |
| 267 | |
| 268 | if (query_current_values_with_pending_wait(data)) |
| 269 | return 1; |
| 270 | |
| 271 | if ((reqfid != data->currfid) || (reqvid != data->currvid)) { |
| 272 | pr_err("failed (cpu%d): req 0x%x 0x%x, curr 0x%x 0x%x\n", |
| 273 | smp_processor_id(), |
| 274 | reqfid, reqvid, data->currfid, data->currvid); |
| 275 | return 1; |
| 276 | } |
| 277 | |
| 278 | pr_debug("transitioned (cpu%d): new fid 0x%x, vid 0x%x\n", |
| 279 | smp_processor_id(), data->currfid, data->currvid); |
| 280 | |
| 281 | return 0; |
| 282 | } |
| 283 | |
| 284 | /* Phase 1 - core voltage transition ... setup voltage */ |
| 285 | static int core_voltage_pre_transition(struct powernow_k8_data *data, |
| 286 | u32 reqvid, u32 reqfid) |
| 287 | { |
| 288 | u32 rvosteps = data->rvo; |
| 289 | u32 savefid = data->currfid; |
| 290 | u32 maxvid, lo, rvomult = 1; |
| 291 | |
| 292 | pr_debug("ph1 (cpu%d): start, currfid 0x%x, currvid 0x%x, reqvid 0x%x, rvo 0x%x\n", |
| 293 | smp_processor_id(), |
| 294 | data->currfid, data->currvid, reqvid, data->rvo); |
| 295 | |
| 296 | if ((savefid < LO_FID_TABLE_TOP) && (reqfid < LO_FID_TABLE_TOP)) |
| 297 | rvomult = 2; |
| 298 | rvosteps *= rvomult; |
| 299 | rdmsr(MSR_FIDVID_STATUS, lo, maxvid); |
| 300 | maxvid = 0x1f & (maxvid >> 16); |
| 301 | pr_debug("ph1 maxvid=0x%x\n", maxvid); |
| 302 | if (reqvid < maxvid) /* lower numbers are higher voltages */ |
| 303 | reqvid = maxvid; |
| 304 | |
| 305 | while (data->currvid > reqvid) { |
| 306 | pr_debug("ph1: curr 0x%x, req vid 0x%x\n", |
| 307 | data->currvid, reqvid); |
| 308 | if (decrease_vid_code_by_step(data, reqvid, data->vidmvs)) |
| 309 | return 1; |
| 310 | } |
| 311 | |
| 312 | while ((rvosteps > 0) && |
| 313 | ((rvomult * data->rvo + data->currvid) > reqvid)) { |
| 314 | if (data->currvid == maxvid) { |
| 315 | rvosteps = 0; |
| 316 | } else { |
| 317 | pr_debug("ph1: changing vid for rvo, req 0x%x\n", |
| 318 | data->currvid - 1); |
| 319 | if (decrease_vid_code_by_step(data, data->currvid-1, 1)) |
| 320 | return 1; |
| 321 | rvosteps--; |
| 322 | } |
| 323 | } |
| 324 | |
| 325 | if (query_current_values_with_pending_wait(data)) |
| 326 | return 1; |
| 327 | |
| 328 | if (savefid != data->currfid) { |
| 329 | pr_err("ph1 err, currfid changed 0x%x\n", data->currfid); |
| 330 | return 1; |
| 331 | } |
| 332 | |
| 333 | pr_debug("ph1 complete, currfid 0x%x, currvid 0x%x\n", |
| 334 | data->currfid, data->currvid); |
| 335 | |
| 336 | return 0; |
| 337 | } |
| 338 | |
| 339 | /* Phase 2 - core frequency transition */ |
| 340 | static int core_frequency_transition(struct powernow_k8_data *data, u32 reqfid) |
| 341 | { |
| 342 | u32 vcoreqfid, vcocurrfid, vcofiddiff; |
| 343 | u32 fid_interval, savevid = data->currvid; |
| 344 | |
| 345 | if (data->currfid == reqfid) { |
| 346 | pr_err("ph2 null fid transition 0x%x\n", data->currfid); |
| 347 | return 0; |
| 348 | } |
| 349 | |
| 350 | pr_debug("ph2 (cpu%d): starting, currfid 0x%x, currvid 0x%x, reqfid 0x%x\n", |
| 351 | smp_processor_id(), |
| 352 | data->currfid, data->currvid, reqfid); |
| 353 | |
| 354 | vcoreqfid = convert_fid_to_vco_fid(reqfid); |
| 355 | vcocurrfid = convert_fid_to_vco_fid(data->currfid); |
| 356 | vcofiddiff = vcocurrfid > vcoreqfid ? vcocurrfid - vcoreqfid |
| 357 | : vcoreqfid - vcocurrfid; |
| 358 | |
| 359 | if ((reqfid <= LO_FID_TABLE_TOP) && (data->currfid <= LO_FID_TABLE_TOP)) |
| 360 | vcofiddiff = 0; |
| 361 | |
| 362 | while (vcofiddiff > 2) { |
| 363 | (data->currfid & 1) ? (fid_interval = 1) : (fid_interval = 2); |
| 364 | |
| 365 | if (reqfid > data->currfid) { |
| 366 | if (data->currfid > LO_FID_TABLE_TOP) { |
| 367 | if (write_new_fid(data, |
| 368 | data->currfid + fid_interval)) |
| 369 | return 1; |
| 370 | } else { |
| 371 | if (write_new_fid |
| 372 | (data, |
| 373 | 2 + convert_fid_to_vco_fid(data->currfid))) |
| 374 | return 1; |
| 375 | } |
| 376 | } else { |
| 377 | if (write_new_fid(data, data->currfid - fid_interval)) |
| 378 | return 1; |
| 379 | } |
| 380 | |
| 381 | vcocurrfid = convert_fid_to_vco_fid(data->currfid); |
| 382 | vcofiddiff = vcocurrfid > vcoreqfid ? vcocurrfid - vcoreqfid |
| 383 | : vcoreqfid - vcocurrfid; |
| 384 | } |
| 385 | |
| 386 | if (write_new_fid(data, reqfid)) |
| 387 | return 1; |
| 388 | |
| 389 | if (query_current_values_with_pending_wait(data)) |
| 390 | return 1; |
| 391 | |
| 392 | if (data->currfid != reqfid) { |
| 393 | pr_err("ph2: mismatch, failed fid transition, curr 0x%x, req 0x%x\n", |
| 394 | data->currfid, reqfid); |
| 395 | return 1; |
| 396 | } |
| 397 | |
| 398 | if (savevid != data->currvid) { |
| 399 | pr_err("ph2: vid changed, save 0x%x, curr 0x%x\n", |
| 400 | savevid, data->currvid); |
| 401 | return 1; |
| 402 | } |
| 403 | |
| 404 | pr_debug("ph2 complete, currfid 0x%x, currvid 0x%x\n", |
| 405 | data->currfid, data->currvid); |
| 406 | |
| 407 | return 0; |
| 408 | } |
| 409 | |
| 410 | /* Phase 3 - core voltage transition flow ... jump to the final vid. */ |
| 411 | static int core_voltage_post_transition(struct powernow_k8_data *data, |
| 412 | u32 reqvid) |
| 413 | { |
| 414 | u32 savefid = data->currfid; |
| 415 | u32 savereqvid = reqvid; |
| 416 | |
| 417 | pr_debug("ph3 (cpu%d): starting, currfid 0x%x, currvid 0x%x\n", |
| 418 | smp_processor_id(), |
| 419 | data->currfid, data->currvid); |
| 420 | |
| 421 | if (reqvid != data->currvid) { |
| 422 | if (write_new_vid(data, reqvid)) |
| 423 | return 1; |
| 424 | |
| 425 | if (savefid != data->currfid) { |
| 426 | pr_err("ph3: bad fid change, save 0x%x, curr 0x%x\n", |
| 427 | savefid, data->currfid); |
| 428 | return 1; |
| 429 | } |
| 430 | |
| 431 | if (data->currvid != reqvid) { |
| 432 | pr_err("ph3: failed vid transition\n, req 0x%x, curr 0x%x", |
| 433 | reqvid, data->currvid); |
| 434 | return 1; |
| 435 | } |
| 436 | } |
| 437 | |
| 438 | if (query_current_values_with_pending_wait(data)) |
| 439 | return 1; |
| 440 | |
| 441 | if (savereqvid != data->currvid) { |
| 442 | pr_debug("ph3 failed, currvid 0x%x\n", data->currvid); |
| 443 | return 1; |
| 444 | } |
| 445 | |
| 446 | if (savefid != data->currfid) { |
| 447 | pr_debug("ph3 failed, currfid changed 0x%x\n", |
| 448 | data->currfid); |
| 449 | return 1; |
| 450 | } |
| 451 | |
| 452 | pr_debug("ph3 complete, currfid 0x%x, currvid 0x%x\n", |
| 453 | data->currfid, data->currvid); |
| 454 | |
| 455 | return 0; |
| 456 | } |
| 457 | |
| 458 | static const struct x86_cpu_id powernow_k8_ids[] = { |
| 459 | /* IO based frequency switching */ |
| 460 | { X86_VENDOR_AMD, 0xf }, |
| 461 | {} |
| 462 | }; |
| 463 | MODULE_DEVICE_TABLE(x86cpu, powernow_k8_ids); |
| 464 | |
| 465 | static void check_supported_cpu(void *_rc) |
| 466 | { |
| 467 | u32 eax, ebx, ecx, edx; |
| 468 | int *rc = _rc; |
| 469 | |
| 470 | *rc = -ENODEV; |
| 471 | |
| 472 | eax = cpuid_eax(CPUID_PROCESSOR_SIGNATURE); |
| 473 | |
| 474 | if ((eax & CPUID_XFAM) == CPUID_XFAM_K8) { |
| 475 | if (((eax & CPUID_USE_XFAM_XMOD) != CPUID_USE_XFAM_XMOD) || |
| 476 | ((eax & CPUID_XMOD) > CPUID_XMOD_REV_MASK)) { |
| 477 | pr_info("Processor cpuid %x not supported\n", eax); |
| 478 | return; |
| 479 | } |
| 480 | |
| 481 | eax = cpuid_eax(CPUID_GET_MAX_CAPABILITIES); |
| 482 | if (eax < CPUID_FREQ_VOLT_CAPABILITIES) { |
| 483 | pr_info("No frequency change capabilities detected\n"); |
| 484 | return; |
| 485 | } |
| 486 | |
| 487 | cpuid(CPUID_FREQ_VOLT_CAPABILITIES, &eax, &ebx, &ecx, &edx); |
| 488 | if ((edx & P_STATE_TRANSITION_CAPABLE) |
| 489 | != P_STATE_TRANSITION_CAPABLE) { |
| 490 | pr_info("Power state transitions not supported\n"); |
| 491 | return; |
| 492 | } |
| 493 | *rc = 0; |
| 494 | } |
| 495 | } |
| 496 | |
| 497 | static int check_pst_table(struct powernow_k8_data *data, struct pst_s *pst, |
| 498 | u8 maxvid) |
| 499 | { |
| 500 | unsigned int j; |
| 501 | u8 lastfid = 0xff; |
| 502 | |
| 503 | for (j = 0; j < data->numps; j++) { |
| 504 | if (pst[j].vid > LEAST_VID) { |
| 505 | pr_err(FW_BUG "vid %d invalid : 0x%x\n", j, |
| 506 | pst[j].vid); |
| 507 | return -EINVAL; |
| 508 | } |
| 509 | if (pst[j].vid < data->rvo) { |
| 510 | /* vid + rvo >= 0 */ |
| 511 | pr_err(FW_BUG "0 vid exceeded with pstate %d\n", j); |
| 512 | return -ENODEV; |
| 513 | } |
| 514 | if (pst[j].vid < maxvid + data->rvo) { |
| 515 | /* vid + rvo >= maxvid */ |
| 516 | pr_err(FW_BUG "maxvid exceeded with pstate %d\n", j); |
| 517 | return -ENODEV; |
| 518 | } |
| 519 | if (pst[j].fid > MAX_FID) { |
| 520 | pr_err(FW_BUG "maxfid exceeded with pstate %d\n", j); |
| 521 | return -ENODEV; |
| 522 | } |
| 523 | if (j && (pst[j].fid < HI_FID_TABLE_BOTTOM)) { |
| 524 | /* Only first fid is allowed to be in "low" range */ |
| 525 | pr_err(FW_BUG "two low fids - %d : 0x%x\n", j, |
| 526 | pst[j].fid); |
| 527 | return -EINVAL; |
| 528 | } |
| 529 | if (pst[j].fid < lastfid) |
| 530 | lastfid = pst[j].fid; |
| 531 | } |
| 532 | if (lastfid & 1) { |
| 533 | pr_err(FW_BUG "lastfid invalid\n"); |
| 534 | return -EINVAL; |
| 535 | } |
| 536 | if (lastfid > LO_FID_TABLE_TOP) |
| 537 | pr_info(FW_BUG "first fid not from lo freq table\n"); |
| 538 | |
| 539 | return 0; |
| 540 | } |
| 541 | |
| 542 | static void invalidate_entry(struct cpufreq_frequency_table *powernow_table, |
| 543 | unsigned int entry) |
| 544 | { |
| 545 | powernow_table[entry].frequency = CPUFREQ_ENTRY_INVALID; |
| 546 | } |
| 547 | |
| 548 | static void print_basics(struct powernow_k8_data *data) |
| 549 | { |
| 550 | int j; |
| 551 | for (j = 0; j < data->numps; j++) { |
| 552 | if (data->powernow_table[j].frequency != |
| 553 | CPUFREQ_ENTRY_INVALID) { |
| 554 | pr_info("fid 0x%x (%d MHz), vid 0x%x\n", |
| 555 | data->powernow_table[j].driver_data & 0xff, |
| 556 | data->powernow_table[j].frequency/1000, |
| 557 | data->powernow_table[j].driver_data >> 8); |
| 558 | } |
| 559 | } |
| 560 | if (data->batps) |
| 561 | pr_info("Only %d pstates on battery\n", data->batps); |
| 562 | } |
| 563 | |
| 564 | static int fill_powernow_table(struct powernow_k8_data *data, |
| 565 | struct pst_s *pst, u8 maxvid) |
| 566 | { |
| 567 | struct cpufreq_frequency_table *powernow_table; |
| 568 | unsigned int j; |
| 569 | |
| 570 | if (data->batps) { |
| 571 | /* use ACPI support to get full speed on mains power */ |
| 572 | pr_warn("Only %d pstates usable (use ACPI driver for full range\n", |
| 573 | data->batps); |
| 574 | data->numps = data->batps; |
| 575 | } |
| 576 | |
| 577 | for (j = 1; j < data->numps; j++) { |
| 578 | if (pst[j-1].fid >= pst[j].fid) { |
| 579 | pr_err("PST out of sequence\n"); |
| 580 | return -EINVAL; |
| 581 | } |
| 582 | } |
| 583 | |
| 584 | if (data->numps < 2) { |
| 585 | pr_err("no p states to transition\n"); |
| 586 | return -ENODEV; |
| 587 | } |
| 588 | |
| 589 | if (check_pst_table(data, pst, maxvid)) |
| 590 | return -EINVAL; |
| 591 | |
| 592 | powernow_table = kzalloc((sizeof(*powernow_table) |
| 593 | * (data->numps + 1)), GFP_KERNEL); |
| 594 | if (!powernow_table) { |
| 595 | pr_err("powernow_table memory alloc failure\n"); |
| 596 | return -ENOMEM; |
| 597 | } |
| 598 | |
| 599 | for (j = 0; j < data->numps; j++) { |
| 600 | int freq; |
| 601 | powernow_table[j].driver_data = pst[j].fid; /* lower 8 bits */ |
| 602 | powernow_table[j].driver_data |= (pst[j].vid << 8); /* upper 8 bits */ |
| 603 | freq = find_khz_freq_from_fid(pst[j].fid); |
| 604 | powernow_table[j].frequency = freq; |
| 605 | } |
| 606 | powernow_table[data->numps].frequency = CPUFREQ_TABLE_END; |
| 607 | powernow_table[data->numps].driver_data = 0; |
| 608 | |
| 609 | if (query_current_values_with_pending_wait(data)) { |
| 610 | kfree(powernow_table); |
| 611 | return -EIO; |
| 612 | } |
| 613 | |
| 614 | pr_debug("cfid 0x%x, cvid 0x%x\n", data->currfid, data->currvid); |
| 615 | data->powernow_table = powernow_table; |
| 616 | if (cpumask_first(topology_core_cpumask(data->cpu)) == data->cpu) |
| 617 | print_basics(data); |
| 618 | |
| 619 | for (j = 0; j < data->numps; j++) |
| 620 | if ((pst[j].fid == data->currfid) && |
| 621 | (pst[j].vid == data->currvid)) |
| 622 | return 0; |
| 623 | |
| 624 | pr_debug("currfid/vid do not match PST, ignoring\n"); |
| 625 | return 0; |
| 626 | } |
| 627 | |
| 628 | /* Find and validate the PSB/PST table in BIOS. */ |
| 629 | static int find_psb_table(struct powernow_k8_data *data) |
| 630 | { |
| 631 | struct psb_s *psb; |
| 632 | unsigned int i; |
| 633 | u32 mvs; |
| 634 | u8 maxvid; |
| 635 | u32 cpst = 0; |
| 636 | u32 thiscpuid; |
| 637 | |
| 638 | for (i = 0xc0000; i < 0xffff0; i += 0x10) { |
| 639 | /* Scan BIOS looking for the signature. */ |
| 640 | /* It can not be at ffff0 - it is too big. */ |
| 641 | |
| 642 | psb = phys_to_virt(i); |
| 643 | if (memcmp(psb, PSB_ID_STRING, PSB_ID_STRING_LEN) != 0) |
| 644 | continue; |
| 645 | |
| 646 | pr_debug("found PSB header at 0x%p\n", psb); |
| 647 | |
| 648 | pr_debug("table vers: 0x%x\n", psb->tableversion); |
| 649 | if (psb->tableversion != PSB_VERSION_1_4) { |
| 650 | pr_err(FW_BUG "PSB table is not v1.4\n"); |
| 651 | return -ENODEV; |
| 652 | } |
| 653 | |
| 654 | pr_debug("flags: 0x%x\n", psb->flags1); |
| 655 | if (psb->flags1) { |
| 656 | pr_err(FW_BUG "unknown flags\n"); |
| 657 | return -ENODEV; |
| 658 | } |
| 659 | |
| 660 | data->vstable = psb->vstable; |
| 661 | pr_debug("voltage stabilization time: %d(*20us)\n", |
| 662 | data->vstable); |
| 663 | |
| 664 | pr_debug("flags2: 0x%x\n", psb->flags2); |
| 665 | data->rvo = psb->flags2 & 3; |
| 666 | data->irt = ((psb->flags2) >> 2) & 3; |
| 667 | mvs = ((psb->flags2) >> 4) & 3; |
| 668 | data->vidmvs = 1 << mvs; |
| 669 | data->batps = ((psb->flags2) >> 6) & 3; |
| 670 | |
| 671 | pr_debug("ramp voltage offset: %d\n", data->rvo); |
| 672 | pr_debug("isochronous relief time: %d\n", data->irt); |
| 673 | pr_debug("maximum voltage step: %d - 0x%x\n", mvs, data->vidmvs); |
| 674 | |
| 675 | pr_debug("numpst: 0x%x\n", psb->num_tables); |
| 676 | cpst = psb->num_tables; |
| 677 | if ((psb->cpuid == 0x00000fc0) || |
| 678 | (psb->cpuid == 0x00000fe0)) { |
| 679 | thiscpuid = cpuid_eax(CPUID_PROCESSOR_SIGNATURE); |
| 680 | if ((thiscpuid == 0x00000fc0) || |
| 681 | (thiscpuid == 0x00000fe0)) |
| 682 | cpst = 1; |
| 683 | } |
| 684 | if (cpst != 1) { |
| 685 | pr_err(FW_BUG "numpst must be 1\n"); |
| 686 | return -ENODEV; |
| 687 | } |
| 688 | |
| 689 | data->plllock = psb->plllocktime; |
| 690 | pr_debug("plllocktime: 0x%x (units 1us)\n", psb->plllocktime); |
| 691 | pr_debug("maxfid: 0x%x\n", psb->maxfid); |
| 692 | pr_debug("maxvid: 0x%x\n", psb->maxvid); |
| 693 | maxvid = psb->maxvid; |
| 694 | |
| 695 | data->numps = psb->numps; |
| 696 | pr_debug("numpstates: 0x%x\n", data->numps); |
| 697 | return fill_powernow_table(data, |
| 698 | (struct pst_s *)(psb+1), maxvid); |
| 699 | } |
| 700 | /* |
| 701 | * If you see this message, complain to BIOS manufacturer. If |
| 702 | * he tells you "we do not support Linux" or some similar |
| 703 | * nonsense, remember that Windows 2000 uses the same legacy |
| 704 | * mechanism that the old Linux PSB driver uses. Tell them it |
| 705 | * is broken with Windows 2000. |
| 706 | * |
| 707 | * The reference to the AMD documentation is chapter 9 in the |
| 708 | * BIOS and Kernel Developer's Guide, which is available on |
| 709 | * www.amd.com |
| 710 | */ |
| 711 | pr_err(FW_BUG "No PSB or ACPI _PSS objects\n"); |
| 712 | pr_err("Make sure that your BIOS is up to date and Cool'N'Quiet support is enabled in BIOS setup\n"); |
| 713 | return -ENODEV; |
| 714 | } |
| 715 | |
| 716 | static void powernow_k8_acpi_pst_values(struct powernow_k8_data *data, |
| 717 | unsigned int index) |
| 718 | { |
| 719 | u64 control; |
| 720 | |
| 721 | if (!data->acpi_data.state_count) |
| 722 | return; |
| 723 | |
| 724 | control = data->acpi_data.states[index].control; |
| 725 | data->irt = (control >> IRT_SHIFT) & IRT_MASK; |
| 726 | data->rvo = (control >> RVO_SHIFT) & RVO_MASK; |
| 727 | data->exttype = (control >> EXT_TYPE_SHIFT) & EXT_TYPE_MASK; |
| 728 | data->plllock = (control >> PLL_L_SHIFT) & PLL_L_MASK; |
| 729 | data->vidmvs = 1 << ((control >> MVS_SHIFT) & MVS_MASK); |
| 730 | data->vstable = (control >> VST_SHIFT) & VST_MASK; |
| 731 | } |
| 732 | |
| 733 | static int powernow_k8_cpu_init_acpi(struct powernow_k8_data *data) |
| 734 | { |
| 735 | struct cpufreq_frequency_table *powernow_table; |
| 736 | int ret_val = -ENODEV; |
| 737 | u64 control, status; |
| 738 | |
| 739 | if (acpi_processor_register_performance(&data->acpi_data, data->cpu)) { |
| 740 | pr_debug("register performance failed: bad ACPI data\n"); |
| 741 | return -EIO; |
| 742 | } |
| 743 | |
| 744 | /* verify the data contained in the ACPI structures */ |
| 745 | if (data->acpi_data.state_count <= 1) { |
| 746 | pr_debug("No ACPI P-States\n"); |
| 747 | goto err_out; |
| 748 | } |
| 749 | |
| 750 | control = data->acpi_data.control_register.space_id; |
| 751 | status = data->acpi_data.status_register.space_id; |
| 752 | |
| 753 | if ((control != ACPI_ADR_SPACE_FIXED_HARDWARE) || |
| 754 | (status != ACPI_ADR_SPACE_FIXED_HARDWARE)) { |
| 755 | pr_debug("Invalid control/status registers (%llx - %llx)\n", |
| 756 | control, status); |
| 757 | goto err_out; |
| 758 | } |
| 759 | |
| 760 | /* fill in data->powernow_table */ |
| 761 | powernow_table = kzalloc((sizeof(*powernow_table) |
| 762 | * (data->acpi_data.state_count + 1)), GFP_KERNEL); |
| 763 | if (!powernow_table) { |
| 764 | pr_debug("powernow_table memory alloc failure\n"); |
| 765 | goto err_out; |
| 766 | } |
| 767 | |
| 768 | /* fill in data */ |
| 769 | data->numps = data->acpi_data.state_count; |
| 770 | powernow_k8_acpi_pst_values(data, 0); |
| 771 | |
| 772 | ret_val = fill_powernow_table_fidvid(data, powernow_table); |
| 773 | if (ret_val) |
| 774 | goto err_out_mem; |
| 775 | |
| 776 | powernow_table[data->acpi_data.state_count].frequency = |
| 777 | CPUFREQ_TABLE_END; |
| 778 | data->powernow_table = powernow_table; |
| 779 | |
| 780 | if (cpumask_first(topology_core_cpumask(data->cpu)) == data->cpu) |
| 781 | print_basics(data); |
| 782 | |
| 783 | /* notify BIOS that we exist */ |
| 784 | acpi_processor_notify_smm(THIS_MODULE); |
| 785 | |
| 786 | if (!zalloc_cpumask_var(&data->acpi_data.shared_cpu_map, GFP_KERNEL)) { |
| 787 | pr_err("unable to alloc powernow_k8_data cpumask\n"); |
| 788 | ret_val = -ENOMEM; |
| 789 | goto err_out_mem; |
| 790 | } |
| 791 | |
| 792 | return 0; |
| 793 | |
| 794 | err_out_mem: |
| 795 | kfree(powernow_table); |
| 796 | |
| 797 | err_out: |
| 798 | acpi_processor_unregister_performance(&data->acpi_data, data->cpu); |
| 799 | |
| 800 | /* data->acpi_data.state_count informs us at ->exit() |
| 801 | * whether ACPI was used */ |
| 802 | data->acpi_data.state_count = 0; |
| 803 | |
| 804 | return ret_val; |
| 805 | } |
| 806 | |
| 807 | static int fill_powernow_table_fidvid(struct powernow_k8_data *data, |
| 808 | struct cpufreq_frequency_table *powernow_table) |
| 809 | { |
| 810 | int i; |
| 811 | |
| 812 | for (i = 0; i < data->acpi_data.state_count; i++) { |
| 813 | u32 fid; |
| 814 | u32 vid; |
| 815 | u32 freq, index; |
| 816 | u64 status, control; |
| 817 | |
| 818 | if (data->exttype) { |
| 819 | status = data->acpi_data.states[i].status; |
| 820 | fid = status & EXT_FID_MASK; |
| 821 | vid = (status >> VID_SHIFT) & EXT_VID_MASK; |
| 822 | } else { |
| 823 | control = data->acpi_data.states[i].control; |
| 824 | fid = control & FID_MASK; |
| 825 | vid = (control >> VID_SHIFT) & VID_MASK; |
| 826 | } |
| 827 | |
| 828 | pr_debug(" %d : fid 0x%x, vid 0x%x\n", i, fid, vid); |
| 829 | |
| 830 | index = fid | (vid<<8); |
| 831 | powernow_table[i].driver_data = index; |
| 832 | |
| 833 | freq = find_khz_freq_from_fid(fid); |
| 834 | powernow_table[i].frequency = freq; |
| 835 | |
| 836 | /* verify frequency is OK */ |
| 837 | if ((freq > (MAX_FREQ * 1000)) || (freq < (MIN_FREQ * 1000))) { |
| 838 | pr_debug("invalid freq %u kHz, ignoring\n", freq); |
| 839 | invalidate_entry(powernow_table, i); |
| 840 | continue; |
| 841 | } |
| 842 | |
| 843 | /* verify voltage is OK - |
| 844 | * BIOSs are using "off" to indicate invalid */ |
| 845 | if (vid == VID_OFF) { |
| 846 | pr_debug("invalid vid %u, ignoring\n", vid); |
| 847 | invalidate_entry(powernow_table, i); |
| 848 | continue; |
| 849 | } |
| 850 | |
| 851 | if (freq != (data->acpi_data.states[i].core_frequency * 1000)) { |
| 852 | pr_info("invalid freq entries %u kHz vs. %u kHz\n", |
| 853 | freq, (unsigned int) |
| 854 | (data->acpi_data.states[i].core_frequency |
| 855 | * 1000)); |
| 856 | invalidate_entry(powernow_table, i); |
| 857 | continue; |
| 858 | } |
| 859 | } |
| 860 | return 0; |
| 861 | } |
| 862 | |
| 863 | static void powernow_k8_cpu_exit_acpi(struct powernow_k8_data *data) |
| 864 | { |
| 865 | if (data->acpi_data.state_count) |
| 866 | acpi_processor_unregister_performance(&data->acpi_data, |
| 867 | data->cpu); |
| 868 | free_cpumask_var(data->acpi_data.shared_cpu_map); |
| 869 | } |
| 870 | |
| 871 | static int get_transition_latency(struct powernow_k8_data *data) |
| 872 | { |
| 873 | int max_latency = 0; |
| 874 | int i; |
| 875 | for (i = 0; i < data->acpi_data.state_count; i++) { |
| 876 | int cur_latency = data->acpi_data.states[i].transition_latency |
| 877 | + data->acpi_data.states[i].bus_master_latency; |
| 878 | if (cur_latency > max_latency) |
| 879 | max_latency = cur_latency; |
| 880 | } |
| 881 | if (max_latency == 0) { |
| 882 | pr_err(FW_WARN "Invalid zero transition latency\n"); |
| 883 | max_latency = 1; |
| 884 | } |
| 885 | /* value in usecs, needs to be in nanoseconds */ |
| 886 | return 1000 * max_latency; |
| 887 | } |
| 888 | |
| 889 | /* Take a frequency, and issue the fid/vid transition command */ |
| 890 | static int transition_frequency_fidvid(struct powernow_k8_data *data, |
| 891 | unsigned int index) |
| 892 | { |
| 893 | struct cpufreq_policy *policy; |
| 894 | u32 fid = 0; |
| 895 | u32 vid = 0; |
| 896 | int res; |
| 897 | struct cpufreq_freqs freqs; |
| 898 | |
| 899 | pr_debug("cpu %d transition to index %u\n", smp_processor_id(), index); |
| 900 | |
| 901 | /* fid/vid correctness check for k8 */ |
| 902 | /* fid are the lower 8 bits of the index we stored into |
| 903 | * the cpufreq frequency table in find_psb_table, vid |
| 904 | * are the upper 8 bits. |
| 905 | */ |
| 906 | fid = data->powernow_table[index].driver_data & 0xFF; |
| 907 | vid = (data->powernow_table[index].driver_data & 0xFF00) >> 8; |
| 908 | |
| 909 | pr_debug("table matched fid 0x%x, giving vid 0x%x\n", fid, vid); |
| 910 | |
| 911 | if (query_current_values_with_pending_wait(data)) |
| 912 | return 1; |
| 913 | |
| 914 | if ((data->currvid == vid) && (data->currfid == fid)) { |
| 915 | pr_debug("target matches current values (fid 0x%x, vid 0x%x)\n", |
| 916 | fid, vid); |
| 917 | return 0; |
| 918 | } |
| 919 | |
| 920 | pr_debug("cpu %d, changing to fid 0x%x, vid 0x%x\n", |
| 921 | smp_processor_id(), fid, vid); |
| 922 | freqs.old = find_khz_freq_from_fid(data->currfid); |
| 923 | freqs.new = find_khz_freq_from_fid(fid); |
| 924 | |
| 925 | policy = cpufreq_cpu_get(smp_processor_id()); |
| 926 | cpufreq_cpu_put(policy); |
| 927 | |
| 928 | cpufreq_freq_transition_begin(policy, &freqs); |
| 929 | res = transition_fid_vid(data, fid, vid); |
| 930 | cpufreq_freq_transition_end(policy, &freqs, res); |
| 931 | |
| 932 | return res; |
| 933 | } |
| 934 | |
| 935 | struct powernowk8_target_arg { |
| 936 | struct cpufreq_policy *pol; |
| 937 | unsigned newstate; |
| 938 | }; |
| 939 | |
| 940 | static long powernowk8_target_fn(void *arg) |
| 941 | { |
| 942 | struct powernowk8_target_arg *pta = arg; |
| 943 | struct cpufreq_policy *pol = pta->pol; |
| 944 | unsigned newstate = pta->newstate; |
| 945 | struct powernow_k8_data *data = per_cpu(powernow_data, pol->cpu); |
| 946 | u32 checkfid; |
| 947 | u32 checkvid; |
| 948 | int ret; |
| 949 | |
| 950 | if (!data) |
| 951 | return -EINVAL; |
| 952 | |
| 953 | checkfid = data->currfid; |
| 954 | checkvid = data->currvid; |
| 955 | |
| 956 | if (pending_bit_stuck()) { |
| 957 | pr_err("failing targ, change pending bit set\n"); |
| 958 | return -EIO; |
| 959 | } |
| 960 | |
| 961 | pr_debug("targ: cpu %d, %d kHz, min %d, max %d\n", |
| 962 | pol->cpu, data->powernow_table[newstate].frequency, pol->min, |
| 963 | pol->max); |
| 964 | |
| 965 | if (query_current_values_with_pending_wait(data)) |
| 966 | return -EIO; |
| 967 | |
| 968 | pr_debug("targ: curr fid 0x%x, vid 0x%x\n", |
| 969 | data->currfid, data->currvid); |
| 970 | |
| 971 | if ((checkvid != data->currvid) || |
| 972 | (checkfid != data->currfid)) { |
| 973 | pr_info("error - out of sync, fix 0x%x 0x%x, vid 0x%x 0x%x\n", |
| 974 | checkfid, data->currfid, |
| 975 | checkvid, data->currvid); |
| 976 | } |
| 977 | |
| 978 | mutex_lock(&fidvid_mutex); |
| 979 | |
| 980 | powernow_k8_acpi_pst_values(data, newstate); |
| 981 | |
| 982 | ret = transition_frequency_fidvid(data, newstate); |
| 983 | |
| 984 | if (ret) { |
| 985 | pr_err("transition frequency failed\n"); |
| 986 | mutex_unlock(&fidvid_mutex); |
| 987 | return 1; |
| 988 | } |
| 989 | mutex_unlock(&fidvid_mutex); |
| 990 | |
| 991 | pol->cur = find_khz_freq_from_fid(data->currfid); |
| 992 | |
| 993 | return 0; |
| 994 | } |
| 995 | |
| 996 | /* Driver entry point to switch to the target frequency */ |
| 997 | static int powernowk8_target(struct cpufreq_policy *pol, unsigned index) |
| 998 | { |
| 999 | struct powernowk8_target_arg pta = { .pol = pol, .newstate = index }; |
| 1000 | |
| 1001 | return work_on_cpu(pol->cpu, powernowk8_target_fn, &pta); |
| 1002 | } |
| 1003 | |
| 1004 | struct init_on_cpu { |
| 1005 | struct powernow_k8_data *data; |
| 1006 | int rc; |
| 1007 | }; |
| 1008 | |
| 1009 | static void powernowk8_cpu_init_on_cpu(void *_init_on_cpu) |
| 1010 | { |
| 1011 | struct init_on_cpu *init_on_cpu = _init_on_cpu; |
| 1012 | |
| 1013 | if (pending_bit_stuck()) { |
| 1014 | pr_err("failing init, change pending bit set\n"); |
| 1015 | init_on_cpu->rc = -ENODEV; |
| 1016 | return; |
| 1017 | } |
| 1018 | |
| 1019 | if (query_current_values_with_pending_wait(init_on_cpu->data)) { |
| 1020 | init_on_cpu->rc = -ENODEV; |
| 1021 | return; |
| 1022 | } |
| 1023 | |
| 1024 | fidvid_msr_init(); |
| 1025 | |
| 1026 | init_on_cpu->rc = 0; |
| 1027 | } |
| 1028 | |
| 1029 | #define MISSING_PSS_MSG \ |
| 1030 | FW_BUG "No compatible ACPI _PSS objects found.\n" \ |
| 1031 | FW_BUG "First, make sure Cool'N'Quiet is enabled in the BIOS.\n" \ |
| 1032 | FW_BUG "If that doesn't help, try upgrading your BIOS.\n" |
| 1033 | |
| 1034 | /* per CPU init entry point to the driver */ |
| 1035 | static int powernowk8_cpu_init(struct cpufreq_policy *pol) |
| 1036 | { |
| 1037 | struct powernow_k8_data *data; |
| 1038 | struct init_on_cpu init_on_cpu; |
| 1039 | int rc, cpu; |
| 1040 | |
| 1041 | smp_call_function_single(pol->cpu, check_supported_cpu, &rc, 1); |
| 1042 | if (rc) |
| 1043 | return -ENODEV; |
| 1044 | |
| 1045 | data = kzalloc(sizeof(*data), GFP_KERNEL); |
| 1046 | if (!data) { |
| 1047 | pr_err("unable to alloc powernow_k8_data"); |
| 1048 | return -ENOMEM; |
| 1049 | } |
| 1050 | |
| 1051 | data->cpu = pol->cpu; |
| 1052 | |
| 1053 | if (powernow_k8_cpu_init_acpi(data)) { |
| 1054 | /* |
| 1055 | * Use the PSB BIOS structure. This is only available on |
| 1056 | * an UP version, and is deprecated by AMD. |
| 1057 | */ |
| 1058 | if (num_online_cpus() != 1) { |
| 1059 | pr_err_once(MISSING_PSS_MSG); |
| 1060 | goto err_out; |
| 1061 | } |
| 1062 | if (pol->cpu != 0) { |
| 1063 | pr_err(FW_BUG "No ACPI _PSS objects for CPU other than CPU0. Complain to your BIOS vendor.\n"); |
| 1064 | goto err_out; |
| 1065 | } |
| 1066 | rc = find_psb_table(data); |
| 1067 | if (rc) |
| 1068 | goto err_out; |
| 1069 | |
| 1070 | /* Take a crude guess here. |
| 1071 | * That guess was in microseconds, so multiply with 1000 */ |
| 1072 | pol->cpuinfo.transition_latency = ( |
| 1073 | ((data->rvo + 8) * data->vstable * VST_UNITS_20US) + |
| 1074 | ((1 << data->irt) * 30)) * 1000; |
| 1075 | } else /* ACPI _PSS objects available */ |
| 1076 | pol->cpuinfo.transition_latency = get_transition_latency(data); |
| 1077 | |
| 1078 | /* only run on specific CPU from here on */ |
| 1079 | init_on_cpu.data = data; |
| 1080 | smp_call_function_single(data->cpu, powernowk8_cpu_init_on_cpu, |
| 1081 | &init_on_cpu, 1); |
| 1082 | rc = init_on_cpu.rc; |
| 1083 | if (rc != 0) |
| 1084 | goto err_out_exit_acpi; |
| 1085 | |
| 1086 | cpumask_copy(pol->cpus, topology_core_cpumask(pol->cpu)); |
| 1087 | data->available_cores = pol->cpus; |
| 1088 | |
| 1089 | /* min/max the cpu is capable of */ |
| 1090 | if (cpufreq_table_validate_and_show(pol, data->powernow_table)) { |
| 1091 | pr_err(FW_BUG "invalid powernow_table\n"); |
| 1092 | powernow_k8_cpu_exit_acpi(data); |
| 1093 | kfree(data->powernow_table); |
| 1094 | kfree(data); |
| 1095 | return -EINVAL; |
| 1096 | } |
| 1097 | |
| 1098 | pr_debug("cpu_init done, current fid 0x%x, vid 0x%x\n", |
| 1099 | data->currfid, data->currvid); |
| 1100 | |
| 1101 | /* Point all the CPUs in this policy to the same data */ |
| 1102 | for_each_cpu(cpu, pol->cpus) |
| 1103 | per_cpu(powernow_data, cpu) = data; |
| 1104 | |
| 1105 | return 0; |
| 1106 | |
| 1107 | err_out_exit_acpi: |
| 1108 | powernow_k8_cpu_exit_acpi(data); |
| 1109 | |
| 1110 | err_out: |
| 1111 | kfree(data); |
| 1112 | return -ENODEV; |
| 1113 | } |
| 1114 | |
| 1115 | static int powernowk8_cpu_exit(struct cpufreq_policy *pol) |
| 1116 | { |
| 1117 | struct powernow_k8_data *data = per_cpu(powernow_data, pol->cpu); |
| 1118 | int cpu; |
| 1119 | |
| 1120 | if (!data) |
| 1121 | return -EINVAL; |
| 1122 | |
| 1123 | powernow_k8_cpu_exit_acpi(data); |
| 1124 | |
| 1125 | kfree(data->powernow_table); |
| 1126 | kfree(data); |
| 1127 | for_each_cpu(cpu, pol->cpus) |
| 1128 | per_cpu(powernow_data, cpu) = NULL; |
| 1129 | |
| 1130 | return 0; |
| 1131 | } |
| 1132 | |
| 1133 | static void query_values_on_cpu(void *_err) |
| 1134 | { |
| 1135 | int *err = _err; |
| 1136 | struct powernow_k8_data *data = __this_cpu_read(powernow_data); |
| 1137 | |
| 1138 | *err = query_current_values_with_pending_wait(data); |
| 1139 | } |
| 1140 | |
| 1141 | static unsigned int powernowk8_get(unsigned int cpu) |
| 1142 | { |
| 1143 | struct powernow_k8_data *data = per_cpu(powernow_data, cpu); |
| 1144 | unsigned int khz = 0; |
| 1145 | int err; |
| 1146 | |
| 1147 | if (!data) |
| 1148 | return 0; |
| 1149 | |
| 1150 | smp_call_function_single(cpu, query_values_on_cpu, &err, true); |
| 1151 | if (err) |
| 1152 | goto out; |
| 1153 | |
| 1154 | khz = find_khz_freq_from_fid(data->currfid); |
| 1155 | |
| 1156 | |
| 1157 | out: |
| 1158 | return khz; |
| 1159 | } |
| 1160 | |
| 1161 | static struct cpufreq_driver cpufreq_amd64_driver = { |
| 1162 | .flags = CPUFREQ_ASYNC_NOTIFICATION, |
| 1163 | .verify = cpufreq_generic_frequency_table_verify, |
| 1164 | .target_index = powernowk8_target, |
| 1165 | .bios_limit = acpi_processor_get_bios_limit, |
| 1166 | .init = powernowk8_cpu_init, |
| 1167 | .exit = powernowk8_cpu_exit, |
| 1168 | .get = powernowk8_get, |
| 1169 | .name = "powernow-k8", |
| 1170 | .attr = cpufreq_generic_attr, |
| 1171 | }; |
| 1172 | |
| 1173 | static void __request_acpi_cpufreq(void) |
| 1174 | { |
| 1175 | const char *cur_drv, *drv = "acpi-cpufreq"; |
| 1176 | |
| 1177 | cur_drv = cpufreq_get_current_driver(); |
| 1178 | if (!cur_drv) |
| 1179 | goto request; |
| 1180 | |
| 1181 | if (strncmp(cur_drv, drv, min_t(size_t, strlen(cur_drv), strlen(drv)))) |
| 1182 | pr_warn("WTF driver: %s\n", cur_drv); |
| 1183 | |
| 1184 | return; |
| 1185 | |
| 1186 | request: |
| 1187 | pr_warn("This CPU is not supported anymore, using acpi-cpufreq instead.\n"); |
| 1188 | request_module(drv); |
| 1189 | } |
| 1190 | |
| 1191 | /* driver entry point for init */ |
| 1192 | static int powernowk8_init(void) |
| 1193 | { |
| 1194 | unsigned int i, supported_cpus = 0; |
| 1195 | int ret; |
| 1196 | |
| 1197 | if (static_cpu_has(X86_FEATURE_HW_PSTATE)) { |
| 1198 | __request_acpi_cpufreq(); |
| 1199 | return -ENODEV; |
| 1200 | } |
| 1201 | |
| 1202 | if (!x86_match_cpu(powernow_k8_ids)) |
| 1203 | return -ENODEV; |
| 1204 | |
| 1205 | get_online_cpus(); |
| 1206 | for_each_online_cpu(i) { |
| 1207 | smp_call_function_single(i, check_supported_cpu, &ret, 1); |
| 1208 | if (!ret) |
| 1209 | supported_cpus++; |
| 1210 | } |
| 1211 | |
| 1212 | if (supported_cpus != num_online_cpus()) { |
| 1213 | put_online_cpus(); |
| 1214 | return -ENODEV; |
| 1215 | } |
| 1216 | put_online_cpus(); |
| 1217 | |
| 1218 | ret = cpufreq_register_driver(&cpufreq_amd64_driver); |
| 1219 | if (ret) |
| 1220 | return ret; |
| 1221 | |
| 1222 | pr_info("Found %d %s (%d cpu cores) (" VERSION ")\n", |
| 1223 | num_online_nodes(), boot_cpu_data.x86_model_id, supported_cpus); |
| 1224 | |
| 1225 | return ret; |
| 1226 | } |
| 1227 | |
| 1228 | /* driver entry point for term */ |
| 1229 | static void __exit powernowk8_exit(void) |
| 1230 | { |
| 1231 | pr_debug("exit\n"); |
| 1232 | |
| 1233 | cpufreq_unregister_driver(&cpufreq_amd64_driver); |
| 1234 | } |
| 1235 | |
| 1236 | MODULE_AUTHOR("Paul Devriendt <paul.devriendt@amd.com>"); |
| 1237 | MODULE_AUTHOR("Mark Langsdorf <mark.langsdorf@amd.com>"); |
| 1238 | MODULE_DESCRIPTION("AMD Athlon 64 and Opteron processor frequency driver."); |
| 1239 | MODULE_LICENSE("GPL"); |
| 1240 | |
| 1241 | late_initcall(powernowk8_init); |
| 1242 | module_exit(powernowk8_exit); |