| 1 | /* |
| 2 | * Driver for One Laptop Per Child ‘CAFÉ’ controller, aka Marvell 88ALP01 |
| 3 | * |
| 4 | * Copyright © 2006 Red Hat, Inc. |
| 5 | * Copyright © 2006 David Woodhouse <dwmw2@infradead.org> |
| 6 | */ |
| 7 | |
| 8 | #define DEBUG |
| 9 | |
| 10 | #include <linux/device.h> |
| 11 | #undef DEBUG |
| 12 | #include <linux/mtd/mtd.h> |
| 13 | #include <linux/mtd/nand.h> |
| 14 | #include <linux/pci.h> |
| 15 | #include <linux/delay.h> |
| 16 | #include <linux/interrupt.h> |
| 17 | #include <asm/io.h> |
| 18 | |
| 19 | #define CAFE_NAND_CTRL1 0x00 |
| 20 | #define CAFE_NAND_CTRL2 0x04 |
| 21 | #define CAFE_NAND_CTRL3 0x08 |
| 22 | #define CAFE_NAND_STATUS 0x0c |
| 23 | #define CAFE_NAND_IRQ 0x10 |
| 24 | #define CAFE_NAND_IRQ_MASK 0x14 |
| 25 | #define CAFE_NAND_DATA_LEN 0x18 |
| 26 | #define CAFE_NAND_ADDR1 0x1c |
| 27 | #define CAFE_NAND_ADDR2 0x20 |
| 28 | #define CAFE_NAND_TIMING1 0x24 |
| 29 | #define CAFE_NAND_TIMING2 0x28 |
| 30 | #define CAFE_NAND_TIMING3 0x2c |
| 31 | #define CAFE_NAND_NONMEM 0x30 |
| 32 | #define CAFE_NAND_ECC_RESULT 0x3C |
| 33 | #define CAFE_NAND_DMA_CTRL 0x40 |
| 34 | #define CAFE_NAND_DMA_ADDR0 0x44 |
| 35 | #define CAFE_NAND_DMA_ADDR1 0x48 |
| 36 | #define CAFE_NAND_ECC_SYN01 0x50 |
| 37 | #define CAFE_NAND_ECC_SYN23 0x54 |
| 38 | #define CAFE_NAND_ECC_SYN45 0x58 |
| 39 | #define CAFE_NAND_ECC_SYN67 0x5c |
| 40 | #define CAFE_NAND_READ_DATA 0x1000 |
| 41 | #define CAFE_NAND_WRITE_DATA 0x2000 |
| 42 | |
| 43 | int cafe_correct_ecc(unsigned char *buf, |
| 44 | unsigned short *chk_syndrome_list); |
| 45 | |
| 46 | struct cafe_priv { |
| 47 | struct nand_chip nand; |
| 48 | struct pci_dev *pdev; |
| 49 | void __iomem *mmio; |
| 50 | uint32_t ctl1; |
| 51 | uint32_t ctl2; |
| 52 | int datalen; |
| 53 | int nr_data; |
| 54 | int data_pos; |
| 55 | int page_addr; |
| 56 | dma_addr_t dmaaddr; |
| 57 | unsigned char *dmabuf; |
| 58 | |
| 59 | }; |
| 60 | |
| 61 | static int usedma = 0; |
| 62 | module_param(usedma, int, 0644); |
| 63 | |
| 64 | static int skipbbt = 0; |
| 65 | module_param(skipbbt, int, 0644); |
| 66 | |
| 67 | static int debug = 0; |
| 68 | module_param(debug, int, 0644); |
| 69 | |
| 70 | static int checkecc = 0; |
| 71 | module_param(checkecc, int, 0644); |
| 72 | |
| 73 | /* Hrm. Why isn't this already conditional on something in the struct device? */ |
| 74 | #define cafe_dev_dbg(dev, args...) do { if (debug) dev_dbg(dev, ##args); } while(0) |
| 75 | |
| 76 | |
| 77 | static int cafe_device_ready(struct mtd_info *mtd) |
| 78 | { |
| 79 | struct cafe_priv *cafe = mtd->priv; |
| 80 | int result = !!(readl(cafe->mmio + CAFE_NAND_STATUS) | 0x40000000); |
| 81 | uint32_t irqs = readl(cafe->mmio + CAFE_NAND_IRQ); |
| 82 | |
| 83 | writel(irqs, cafe->mmio+CAFE_NAND_IRQ); |
| 84 | |
| 85 | cafe_dev_dbg(&cafe->pdev->dev, "NAND device is%s ready, IRQ %x (%x) (%x,%x)\n", |
| 86 | result?"":" not", irqs, readl(cafe->mmio + CAFE_NAND_IRQ), |
| 87 | readl(cafe->mmio + 0x3008), readl(cafe->mmio + 0x300c)); |
| 88 | |
| 89 | return result; |
| 90 | } |
| 91 | |
| 92 | |
| 93 | static void cafe_write_buf(struct mtd_info *mtd, const uint8_t *buf, int len) |
| 94 | { |
| 95 | struct cafe_priv *cafe = mtd->priv; |
| 96 | |
| 97 | if (usedma) |
| 98 | memcpy(cafe->dmabuf + cafe->datalen, buf, len); |
| 99 | else |
| 100 | memcpy_toio(cafe->mmio + CAFE_NAND_WRITE_DATA + cafe->datalen, buf, len); |
| 101 | |
| 102 | cafe->datalen += len; |
| 103 | |
| 104 | cafe_dev_dbg(&cafe->pdev->dev, "Copy 0x%x bytes to write buffer. datalen 0x%x\n", |
| 105 | len, cafe->datalen); |
| 106 | } |
| 107 | |
| 108 | static void cafe_read_buf(struct mtd_info *mtd, uint8_t *buf, int len) |
| 109 | { |
| 110 | struct cafe_priv *cafe = mtd->priv; |
| 111 | |
| 112 | if (usedma) |
| 113 | memcpy(buf, cafe->dmabuf + cafe->datalen, len); |
| 114 | else |
| 115 | memcpy_fromio(buf, cafe->mmio + CAFE_NAND_READ_DATA + cafe->datalen, len); |
| 116 | |
| 117 | cafe_dev_dbg(&cafe->pdev->dev, "Copy 0x%x bytes from position 0x%x in read buffer.\n", |
| 118 | len, cafe->datalen); |
| 119 | cafe->datalen += len; |
| 120 | } |
| 121 | |
| 122 | static uint8_t cafe_read_byte(struct mtd_info *mtd) |
| 123 | { |
| 124 | struct cafe_priv *cafe = mtd->priv; |
| 125 | uint8_t d; |
| 126 | |
| 127 | cafe_read_buf(mtd, &d, 1); |
| 128 | cafe_dev_dbg(&cafe->pdev->dev, "Read %02x\n", d); |
| 129 | |
| 130 | return d; |
| 131 | } |
| 132 | |
| 133 | static void cafe_nand_cmdfunc(struct mtd_info *mtd, unsigned command, |
| 134 | int column, int page_addr) |
| 135 | { |
| 136 | struct cafe_priv *cafe = mtd->priv; |
| 137 | int adrbytes = 0; |
| 138 | uint32_t ctl1; |
| 139 | uint32_t doneint = 0x80000000; |
| 140 | |
| 141 | cafe_dev_dbg(&cafe->pdev->dev, "cmdfunc %02x, 0x%x, 0x%x\n", |
| 142 | command, column, page_addr); |
| 143 | |
| 144 | if (command == NAND_CMD_ERASE2 || command == NAND_CMD_PAGEPROG) { |
| 145 | /* Second half of a command we already calculated */ |
| 146 | writel(cafe->ctl2 | 0x100 | command, cafe->mmio + CAFE_NAND_CTRL2); |
| 147 | ctl1 = cafe->ctl1; |
| 148 | cafe_dev_dbg(&cafe->pdev->dev, "Continue command, ctl1 %08x, #data %d\n", |
| 149 | cafe->ctl1, cafe->nr_data); |
| 150 | goto do_command; |
| 151 | } |
| 152 | /* Reset ECC engine */ |
| 153 | writel(0, cafe->mmio + CAFE_NAND_CTRL2); |
| 154 | |
| 155 | /* Emulate NAND_CMD_READOOB on large-page chips */ |
| 156 | if (mtd->writesize > 512 && |
| 157 | command == NAND_CMD_READOOB) { |
| 158 | column += mtd->writesize; |
| 159 | command = NAND_CMD_READ0; |
| 160 | } |
| 161 | |
| 162 | /* FIXME: Do we need to send read command before sending data |
| 163 | for small-page chips, to position the buffer correctly? */ |
| 164 | |
| 165 | if (column != -1) { |
| 166 | writel(column, cafe->mmio + CAFE_NAND_ADDR1); |
| 167 | adrbytes = 2; |
| 168 | if (page_addr != -1) |
| 169 | goto write_adr2; |
| 170 | } else if (page_addr != -1) { |
| 171 | writel(page_addr & 0xffff, cafe->mmio + CAFE_NAND_ADDR1); |
| 172 | page_addr >>= 16; |
| 173 | write_adr2: |
| 174 | writel(page_addr, cafe->mmio+0x20); |
| 175 | adrbytes += 2; |
| 176 | if (mtd->size > mtd->writesize << 16) |
| 177 | adrbytes++; |
| 178 | } |
| 179 | |
| 180 | cafe->data_pos = cafe->datalen = 0; |
| 181 | |
| 182 | /* Set command valid bit */ |
| 183 | ctl1 = 0x80000000 | command; |
| 184 | |
| 185 | /* Set RD or WR bits as appropriate */ |
| 186 | if (command == NAND_CMD_READID || command == NAND_CMD_STATUS) { |
| 187 | ctl1 |= (1<<26); /* rd */ |
| 188 | /* Always 5 bytes, for now */ |
| 189 | cafe->datalen = 4; |
| 190 | /* And one address cycle -- even for STATUS, since the controller doesn't work without */ |
| 191 | adrbytes = 1; |
| 192 | } else if (command == NAND_CMD_READ0 || command == NAND_CMD_READ1 || |
| 193 | command == NAND_CMD_READOOB || command == NAND_CMD_RNDOUT) { |
| 194 | ctl1 |= 1<<26; /* rd */ |
| 195 | /* For now, assume just read to end of page */ |
| 196 | cafe->datalen = mtd->writesize + mtd->oobsize - column; |
| 197 | } else if (command == NAND_CMD_SEQIN) |
| 198 | ctl1 |= 1<<25; /* wr */ |
| 199 | |
| 200 | /* Set number of address bytes */ |
| 201 | if (adrbytes) |
| 202 | ctl1 |= ((adrbytes-1)|8) << 27; |
| 203 | |
| 204 | if (command == NAND_CMD_SEQIN || command == NAND_CMD_ERASE1) { |
| 205 | /* Ignore the first command of a pair; the hardware |
| 206 | deals with them both at once, later */ |
| 207 | cafe->ctl1 = ctl1; |
| 208 | cafe->ctl2 = 0; |
| 209 | cafe_dev_dbg(&cafe->pdev->dev, "Setup for delayed command, ctl1 %08x, dlen %x\n", |
| 210 | cafe->ctl1, cafe->datalen); |
| 211 | return; |
| 212 | } |
| 213 | /* RNDOUT and READ0 commands need a following byte */ |
| 214 | if (command == NAND_CMD_RNDOUT) |
| 215 | writel(cafe->ctl2 | 0x100 | NAND_CMD_RNDOUTSTART, cafe->mmio + CAFE_NAND_CTRL2); |
| 216 | else if (command == NAND_CMD_READ0 && mtd->writesize > 512) |
| 217 | writel(cafe->ctl2 | 0x100 | NAND_CMD_READSTART, cafe->mmio + CAFE_NAND_CTRL2); |
| 218 | |
| 219 | do_command: |
| 220 | #if 0 |
| 221 | /* http://dev.laptop.org/ticket/200 |
| 222 | ECC on read only works if we read precisely 0x80e bytes */ |
| 223 | if (cafe->datalen == 2112) |
| 224 | cafe->datalen = 2062; |
| 225 | #endif |
| 226 | cafe_dev_dbg(&cafe->pdev->dev, "dlen %x, ctl1 %x, ctl2 %x\n", |
| 227 | cafe->datalen, ctl1, readl(cafe->mmio+CAFE_NAND_CTRL2)); |
| 228 | |
| 229 | /* NB: The datasheet lies -- we really should be subtracting 1 here */ |
| 230 | writel(cafe->datalen, cafe->mmio + CAFE_NAND_DATA_LEN); |
| 231 | writel(0x90000000, cafe->mmio + CAFE_NAND_IRQ); |
| 232 | if (usedma && (ctl1 & (3<<25))) { |
| 233 | uint32_t dmactl = 0xc0000000 + cafe->datalen; |
| 234 | /* If WR or RD bits set, set up DMA */ |
| 235 | if (ctl1 & (1<<26)) { |
| 236 | /* It's a read */ |
| 237 | dmactl |= (1<<29); |
| 238 | /* ... so it's done when the DMA is done, not just |
| 239 | the command. */ |
| 240 | doneint = 0x10000000; |
| 241 | } |
| 242 | writel(dmactl, cafe->mmio + CAFE_NAND_DMA_CTRL); |
| 243 | } |
| 244 | cafe->datalen = 0; |
| 245 | |
| 246 | #if 0 |
| 247 | { int i; |
| 248 | printk("About to write command %08x\n", ctl1); |
| 249 | for (i=0; i< 0x5c; i+=4) |
| 250 | printk("Register %x: %08x\n", i, readl(cafe->mmio + i)); |
| 251 | } |
| 252 | #endif |
| 253 | writel(ctl1, cafe->mmio + CAFE_NAND_CTRL1); |
| 254 | /* Apply this short delay always to ensure that we do wait tWB in |
| 255 | * any case on any machine. */ |
| 256 | ndelay(100); |
| 257 | |
| 258 | if (1) { |
| 259 | int c = 500000; |
| 260 | uint32_t irqs; |
| 261 | |
| 262 | while (c--) { |
| 263 | irqs = readl(cafe->mmio + CAFE_NAND_IRQ); |
| 264 | if (irqs & doneint) |
| 265 | break; |
| 266 | udelay(1); |
| 267 | if (!(c % 100000)) |
| 268 | cafe_dev_dbg(&cafe->pdev->dev, "Wait for ready, IRQ %x\n", irqs); |
| 269 | cpu_relax(); |
| 270 | } |
| 271 | writel(doneint, cafe->mmio + CAFE_NAND_IRQ); |
| 272 | cafe_dev_dbg(&cafe->pdev->dev, "Command %x completed after %d usec, irqs %x (%x)\n", command, 50000-c, irqs, readl(cafe->mmio + CAFE_NAND_IRQ)); |
| 273 | } |
| 274 | |
| 275 | |
| 276 | cafe->ctl2 &= ~(1<<8); |
| 277 | cafe->ctl2 &= ~(1<<30); |
| 278 | |
| 279 | switch (command) { |
| 280 | |
| 281 | case NAND_CMD_CACHEDPROG: |
| 282 | case NAND_CMD_PAGEPROG: |
| 283 | case NAND_CMD_ERASE1: |
| 284 | case NAND_CMD_ERASE2: |
| 285 | case NAND_CMD_SEQIN: |
| 286 | case NAND_CMD_RNDIN: |
| 287 | case NAND_CMD_STATUS: |
| 288 | case NAND_CMD_DEPLETE1: |
| 289 | case NAND_CMD_RNDOUT: |
| 290 | case NAND_CMD_STATUS_ERROR: |
| 291 | case NAND_CMD_STATUS_ERROR0: |
| 292 | case NAND_CMD_STATUS_ERROR1: |
| 293 | case NAND_CMD_STATUS_ERROR2: |
| 294 | case NAND_CMD_STATUS_ERROR3: |
| 295 | writel(cafe->ctl2, cafe->mmio + CAFE_NAND_CTRL2); |
| 296 | return; |
| 297 | } |
| 298 | nand_wait_ready(mtd); |
| 299 | writel(cafe->ctl2, cafe->mmio + CAFE_NAND_CTRL2); |
| 300 | } |
| 301 | |
| 302 | static void cafe_select_chip(struct mtd_info *mtd, int chipnr) |
| 303 | { |
| 304 | //struct cafe_priv *cafe = mtd->priv; |
| 305 | // cafe_dev_dbg(&cafe->pdev->dev, "select_chip %d\n", chipnr); |
| 306 | } |
| 307 | |
| 308 | static int cafe_nand_interrupt(int irq, void *id, struct pt_regs *regs) |
| 309 | { |
| 310 | struct mtd_info *mtd = id; |
| 311 | struct cafe_priv *cafe = mtd->priv; |
| 312 | uint32_t irqs = readl(cafe->mmio + CAFE_NAND_IRQ); |
| 313 | writel(irqs & ~0x90000000, cafe->mmio + CAFE_NAND_IRQ); |
| 314 | if (!irqs) |
| 315 | return IRQ_NONE; |
| 316 | |
| 317 | cafe_dev_dbg(&cafe->pdev->dev, "irq, bits %x (%x)\n", irqs, readl(cafe->mmio + CAFE_NAND_IRQ)); |
| 318 | return IRQ_HANDLED; |
| 319 | } |
| 320 | |
| 321 | static void cafe_nand_bug(struct mtd_info *mtd) |
| 322 | { |
| 323 | BUG(); |
| 324 | } |
| 325 | |
| 326 | static int cafe_nand_write_oob(struct mtd_info *mtd, |
| 327 | struct nand_chip *chip, int page) |
| 328 | { |
| 329 | int status = 0; |
| 330 | |
| 331 | chip->cmdfunc(mtd, NAND_CMD_SEQIN, mtd->writesize, page); |
| 332 | chip->write_buf(mtd, chip->oob_poi, mtd->oobsize); |
| 333 | chip->cmdfunc(mtd, NAND_CMD_PAGEPROG, -1, -1); |
| 334 | status = chip->waitfunc(mtd, chip); |
| 335 | |
| 336 | return status & NAND_STATUS_FAIL ? -EIO : 0; |
| 337 | } |
| 338 | |
| 339 | /* Don't use -- use nand_read_oob_std for now */ |
| 340 | static int cafe_nand_read_oob(struct mtd_info *mtd, struct nand_chip *chip, |
| 341 | int page, int sndcmd) |
| 342 | { |
| 343 | chip->cmdfunc(mtd, NAND_CMD_READOOB, 0, page); |
| 344 | chip->read_buf(mtd, chip->oob_poi, mtd->oobsize); |
| 345 | return 1; |
| 346 | } |
| 347 | /** |
| 348 | * cafe_nand_read_page_syndrome - {REPLACABLE] hardware ecc syndrom based page read |
| 349 | * @mtd: mtd info structure |
| 350 | * @chip: nand chip info structure |
| 351 | * @buf: buffer to store read data |
| 352 | * |
| 353 | * The hw generator calculates the error syndrome automatically. Therefor |
| 354 | * we need a special oob layout and handling. |
| 355 | */ |
| 356 | |
| 357 | static unsigned short cafe_empty_syndromes[8] = { 4095, 748, 2629, 2920, 875, 1454, 51, 1456 }; |
| 358 | |
| 359 | static int is_all_ff(unsigned char *buf, int len) |
| 360 | { |
| 361 | unsigned long *lbuf = (void *)buf; |
| 362 | int i; |
| 363 | |
| 364 | for (i=0; i < (len/sizeof(long)); i++) { |
| 365 | if (lbuf[i] != ~0UL) |
| 366 | return 0; |
| 367 | } |
| 368 | i *= sizeof(long); |
| 369 | for (; i< len; i++) { |
| 370 | if (buf[i] != 0xff) |
| 371 | return 0; |
| 372 | } |
| 373 | return 1; |
| 374 | } |
| 375 | |
| 376 | static int cafe_nand_read_page(struct mtd_info *mtd, struct nand_chip *chip, |
| 377 | uint8_t *buf) |
| 378 | { |
| 379 | struct cafe_priv *cafe = mtd->priv; |
| 380 | |
| 381 | cafe_dev_dbg(&cafe->pdev->dev, "ECC result %08x SYN1,2 %08x\n", |
| 382 | readl(cafe->mmio + CAFE_NAND_ECC_RESULT), |
| 383 | readl(cafe->mmio + CAFE_NAND_ECC_SYN01)); |
| 384 | |
| 385 | chip->read_buf(mtd, buf, mtd->writesize); |
| 386 | chip->read_buf(mtd, chip->oob_poi, mtd->oobsize); |
| 387 | |
| 388 | if (checkecc && readl(cafe->mmio + CAFE_NAND_ECC_RESULT) & (1<<18)) { |
| 389 | unsigned short syn[8]; |
| 390 | int i; |
| 391 | |
| 392 | for (i=0; i<8; i+=2) { |
| 393 | uint32_t tmp = readl(cafe->mmio + CAFE_NAND_ECC_SYN01 + (i*2)); |
| 394 | syn[i] = tmp & 0xfff; |
| 395 | syn[i+1] = (tmp >> 16) & 0xfff; |
| 396 | } |
| 397 | |
| 398 | /* FIXME: http://dev.laptop.org/ticket/215 */ |
| 399 | if (!memcmp(syn, cafe_empty_syndromes, sizeof(syn)) |
| 400 | && is_all_ff(chip->oob_poi, 14) |
| 401 | && is_all_ff(buf, mtd->writesize)) { |
| 402 | dev_dbg(&cafe->pdev->dev, "ECC error reported on empty block\n"); |
| 403 | /* It was an empty block. Nothing to fix here except the hardware */ |
| 404 | } else if ((i = cafe_correct_ecc(buf, syn)) < 0) { |
| 405 | dev_dbg(&cafe->pdev->dev, "Failed to correct ECC\n"); |
| 406 | mtd->ecc_stats.failed++; |
| 407 | } else { |
| 408 | dev_dbg(&cafe->pdev->dev, "Corrected %d symbol errors\n", i); |
| 409 | mtd->ecc_stats.corrected += i; |
| 410 | } |
| 411 | } |
| 412 | |
| 413 | |
| 414 | return 0; |
| 415 | } |
| 416 | |
| 417 | static struct nand_ecclayout cafe_oobinfo_2048 = { |
| 418 | .eccbytes = 14, |
| 419 | .eccpos = { 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13}, |
| 420 | .oobfree = {{14, 50}} |
| 421 | }; |
| 422 | |
| 423 | /* Ick. The BBT code really ought to be able to work this bit out |
| 424 | for itself from the above, at least for the 2KiB case */ |
| 425 | static uint8_t cafe_bbt_pattern_2048[] = { 'B', 'b', 't', '0' }; |
| 426 | static uint8_t cafe_mirror_pattern_2048[] = { '1', 't', 'b', 'B' }; |
| 427 | |
| 428 | static uint8_t cafe_bbt_pattern_512[] = { 0xBB }; |
| 429 | static uint8_t cafe_mirror_pattern_512[] = { 0xBC }; |
| 430 | |
| 431 | |
| 432 | static struct nand_bbt_descr cafe_bbt_main_descr_2048 = { |
| 433 | .options = NAND_BBT_LASTBLOCK | NAND_BBT_CREATE | NAND_BBT_WRITE |
| 434 | | NAND_BBT_2BIT | NAND_BBT_VERSION | NAND_BBT_PERCHIP, |
| 435 | .offs = 14, |
| 436 | .len = 4, |
| 437 | .veroffs = 18, |
| 438 | .maxblocks = 4, |
| 439 | .pattern = cafe_bbt_pattern_2048 |
| 440 | }; |
| 441 | |
| 442 | static struct nand_bbt_descr cafe_bbt_mirror_descr_2048 = { |
| 443 | .options = NAND_BBT_LASTBLOCK | NAND_BBT_CREATE | NAND_BBT_WRITE |
| 444 | | NAND_BBT_2BIT | NAND_BBT_VERSION | NAND_BBT_PERCHIP, |
| 445 | .offs = 14, |
| 446 | .len = 4, |
| 447 | .veroffs = 18, |
| 448 | .maxblocks = 4, |
| 449 | .pattern = cafe_mirror_pattern_2048 |
| 450 | }; |
| 451 | |
| 452 | static struct nand_ecclayout cafe_oobinfo_512 = { |
| 453 | .eccbytes = 14, |
| 454 | .eccpos = { 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13}, |
| 455 | .oobfree = {{14, 2}} |
| 456 | }; |
| 457 | |
| 458 | static struct nand_bbt_descr cafe_bbt_main_descr_512 = { |
| 459 | .options = NAND_BBT_LASTBLOCK | NAND_BBT_CREATE | NAND_BBT_WRITE |
| 460 | | NAND_BBT_2BIT | NAND_BBT_VERSION | NAND_BBT_PERCHIP, |
| 461 | .offs = 14, |
| 462 | .len = 1, |
| 463 | .veroffs = 15, |
| 464 | .maxblocks = 4, |
| 465 | .pattern = cafe_bbt_pattern_512 |
| 466 | }; |
| 467 | |
| 468 | static struct nand_bbt_descr cafe_bbt_mirror_descr_512 = { |
| 469 | .options = NAND_BBT_LASTBLOCK | NAND_BBT_CREATE | NAND_BBT_WRITE |
| 470 | | NAND_BBT_2BIT | NAND_BBT_VERSION | NAND_BBT_PERCHIP, |
| 471 | .offs = 14, |
| 472 | .len = 1, |
| 473 | .veroffs = 15, |
| 474 | .maxblocks = 4, |
| 475 | .pattern = cafe_mirror_pattern_512 |
| 476 | }; |
| 477 | |
| 478 | |
| 479 | static void cafe_nand_write_page_lowlevel(struct mtd_info *mtd, |
| 480 | struct nand_chip *chip, const uint8_t *buf) |
| 481 | { |
| 482 | struct cafe_priv *cafe = mtd->priv; |
| 483 | |
| 484 | chip->write_buf(mtd, buf, mtd->writesize); |
| 485 | chip->write_buf(mtd, chip->oob_poi, mtd->oobsize); |
| 486 | |
| 487 | /* Set up ECC autogeneration */ |
| 488 | cafe->ctl2 |= (1<<27) | (1<<30); |
| 489 | if (mtd->writesize == 2048) |
| 490 | cafe->ctl2 |= (1<<29); |
| 491 | } |
| 492 | |
| 493 | static int cafe_nand_write_page(struct mtd_info *mtd, struct nand_chip *chip, |
| 494 | const uint8_t *buf, int page, int cached, int raw) |
| 495 | { |
| 496 | int status; |
| 497 | |
| 498 | chip->cmdfunc(mtd, NAND_CMD_SEQIN, 0x00, page); |
| 499 | |
| 500 | if (unlikely(raw)) |
| 501 | chip->ecc.write_page_raw(mtd, chip, buf); |
| 502 | else |
| 503 | chip->ecc.write_page(mtd, chip, buf); |
| 504 | |
| 505 | /* |
| 506 | * Cached progamming disabled for now, Not sure if its worth the |
| 507 | * trouble. The speed gain is not very impressive. (2.3->2.6Mib/s) |
| 508 | */ |
| 509 | cached = 0; |
| 510 | |
| 511 | if (!cached || !(chip->options & NAND_CACHEPRG)) { |
| 512 | |
| 513 | chip->cmdfunc(mtd, NAND_CMD_PAGEPROG, -1, -1); |
| 514 | status = chip->waitfunc(mtd, chip); |
| 515 | /* |
| 516 | * See if operation failed and additional status checks are |
| 517 | * available |
| 518 | */ |
| 519 | if ((status & NAND_STATUS_FAIL) && (chip->errstat)) |
| 520 | status = chip->errstat(mtd, chip, FL_WRITING, status, |
| 521 | page); |
| 522 | |
| 523 | if (status & NAND_STATUS_FAIL) |
| 524 | return -EIO; |
| 525 | } else { |
| 526 | chip->cmdfunc(mtd, NAND_CMD_CACHEDPROG, -1, -1); |
| 527 | status = chip->waitfunc(mtd, chip); |
| 528 | } |
| 529 | |
| 530 | #ifdef CONFIG_MTD_NAND_VERIFY_WRITE |
| 531 | /* Send command to read back the data */ |
| 532 | chip->cmdfunc(mtd, NAND_CMD_READ0, 0, page); |
| 533 | |
| 534 | if (chip->verify_buf(mtd, buf, mtd->writesize)) |
| 535 | return -EIO; |
| 536 | #endif |
| 537 | return 0; |
| 538 | } |
| 539 | |
| 540 | static int cafe_nand_block_bad(struct mtd_info *mtd, loff_t ofs, int getchip) |
| 541 | { |
| 542 | return 0; |
| 543 | } |
| 544 | |
| 545 | static int __devinit cafe_nand_probe(struct pci_dev *pdev, |
| 546 | const struct pci_device_id *ent) |
| 547 | { |
| 548 | struct mtd_info *mtd; |
| 549 | struct cafe_priv *cafe; |
| 550 | uint32_t ctrl; |
| 551 | int err = 0; |
| 552 | |
| 553 | err = pci_enable_device(pdev); |
| 554 | if (err) |
| 555 | return err; |
| 556 | |
| 557 | pci_set_master(pdev); |
| 558 | |
| 559 | mtd = kzalloc(sizeof(*mtd) + sizeof(struct cafe_priv), GFP_KERNEL); |
| 560 | if (!mtd) { |
| 561 | dev_warn(&pdev->dev, "failed to alloc mtd_info\n"); |
| 562 | return -ENOMEM; |
| 563 | } |
| 564 | cafe = (void *)(&mtd[1]); |
| 565 | |
| 566 | mtd->priv = cafe; |
| 567 | mtd->owner = THIS_MODULE; |
| 568 | |
| 569 | cafe->pdev = pdev; |
| 570 | cafe->mmio = pci_iomap(pdev, 0, 0); |
| 571 | if (!cafe->mmio) { |
| 572 | dev_warn(&pdev->dev, "failed to iomap\n"); |
| 573 | err = -ENOMEM; |
| 574 | goto out_free_mtd; |
| 575 | } |
| 576 | cafe->dmabuf = dma_alloc_coherent(&cafe->pdev->dev, 2112 + sizeof(struct nand_buffers), |
| 577 | &cafe->dmaaddr, GFP_KERNEL); |
| 578 | if (!cafe->dmabuf) { |
| 579 | err = -ENOMEM; |
| 580 | goto out_ior; |
| 581 | } |
| 582 | cafe->nand.buffers = (void *)cafe->dmabuf + 2112; |
| 583 | |
| 584 | cafe->nand.cmdfunc = cafe_nand_cmdfunc; |
| 585 | cafe->nand.dev_ready = cafe_device_ready; |
| 586 | cafe->nand.read_byte = cafe_read_byte; |
| 587 | cafe->nand.read_buf = cafe_read_buf; |
| 588 | cafe->nand.write_buf = cafe_write_buf; |
| 589 | cafe->nand.select_chip = cafe_select_chip; |
| 590 | |
| 591 | cafe->nand.chip_delay = 0; |
| 592 | |
| 593 | /* Enable the following for a flash based bad block table */ |
| 594 | cafe->nand.options = NAND_USE_FLASH_BBT | NAND_NO_AUTOINCR | NAND_OWN_BUFFERS; |
| 595 | |
| 596 | if (skipbbt) { |
| 597 | cafe->nand.options |= NAND_SKIP_BBTSCAN; |
| 598 | cafe->nand.block_bad = cafe_nand_block_bad; |
| 599 | } |
| 600 | |
| 601 | /* Timings from Marvell's test code (not verified or calculated by us) */ |
| 602 | writel(0xffffffff, cafe->mmio + CAFE_NAND_IRQ_MASK); |
| 603 | #if 1 |
| 604 | writel(0x01010a0a, cafe->mmio + CAFE_NAND_TIMING1); |
| 605 | writel(0x24121212, cafe->mmio + CAFE_NAND_TIMING2); |
| 606 | writel(0x11000000, cafe->mmio + CAFE_NAND_TIMING3); |
| 607 | #else |
| 608 | writel(0xffffffff, cafe->mmio + CAFE_NAND_TIMING1); |
| 609 | writel(0xffffffff, cafe->mmio + CAFE_NAND_TIMING2); |
| 610 | writel(0xffffffff, cafe->mmio + CAFE_NAND_TIMING3); |
| 611 | #endif |
| 612 | writel(0xffffffff, cafe->mmio + CAFE_NAND_IRQ_MASK); |
| 613 | err = request_irq(pdev->irq, &cafe_nand_interrupt, SA_SHIRQ, "CAFE NAND", mtd); |
| 614 | if (err) { |
| 615 | dev_warn(&pdev->dev, "Could not register IRQ %d\n", pdev->irq); |
| 616 | |
| 617 | goto out_free_dma; |
| 618 | } |
| 619 | #if 1 |
| 620 | /* Disable master reset, enable NAND clock */ |
| 621 | ctrl = readl(cafe->mmio + 0x3004); |
| 622 | ctrl &= 0xffffeff0; |
| 623 | ctrl |= 0x00007000; |
| 624 | writel(ctrl | 0x05, cafe->mmio + 0x3004); |
| 625 | writel(ctrl | 0x0a, cafe->mmio + 0x3004); |
| 626 | writel(0, cafe->mmio + CAFE_NAND_DMA_CTRL); |
| 627 | |
| 628 | writel(0x7006, cafe->mmio + 0x3004); |
| 629 | writel(0x700a, cafe->mmio + 0x3004); |
| 630 | |
| 631 | /* Set up DMA address */ |
| 632 | writel(cafe->dmaaddr & 0xffffffff, cafe->mmio + CAFE_NAND_DMA_ADDR0); |
| 633 | if (sizeof(cafe->dmaaddr) > 4) |
| 634 | /* Shift in two parts to shut the compiler up */ |
| 635 | writel((cafe->dmaaddr >> 16) >> 16, cafe->mmio + CAFE_NAND_DMA_ADDR1); |
| 636 | else |
| 637 | writel(0, cafe->mmio + CAFE_NAND_DMA_ADDR1); |
| 638 | |
| 639 | cafe_dev_dbg(&cafe->pdev->dev, "Set DMA address to %x (virt %p)\n", |
| 640 | readl(cafe->mmio + CAFE_NAND_DMA_ADDR0), cafe->dmabuf); |
| 641 | |
| 642 | /* Enable NAND IRQ in global IRQ mask register */ |
| 643 | writel(0x80000007, cafe->mmio + 0x300c); |
| 644 | cafe_dev_dbg(&cafe->pdev->dev, "Control %x, IRQ mask %x\n", |
| 645 | readl(cafe->mmio + 0x3004), readl(cafe->mmio + 0x300c)); |
| 646 | #endif |
| 647 | #if 1 |
| 648 | mtd->writesize=2048; |
| 649 | mtd->oobsize = 0x40; |
| 650 | memset(cafe->dmabuf, 0x5a, 2112); |
| 651 | cafe->nand.cmdfunc(mtd, NAND_CMD_READID, 0, -1); |
| 652 | cafe->nand.read_byte(mtd); |
| 653 | cafe->nand.read_byte(mtd); |
| 654 | cafe->nand.read_byte(mtd); |
| 655 | cafe->nand.read_byte(mtd); |
| 656 | cafe->nand.read_byte(mtd); |
| 657 | #endif |
| 658 | #if 0 |
| 659 | cafe->nand.cmdfunc(mtd, NAND_CMD_READ0, 0, 0); |
| 660 | // nand_wait_ready(mtd); |
| 661 | cafe->nand.read_byte(mtd); |
| 662 | cafe->nand.read_byte(mtd); |
| 663 | cafe->nand.read_byte(mtd); |
| 664 | cafe->nand.read_byte(mtd); |
| 665 | #endif |
| 666 | #if 0 |
| 667 | writel(0x84600070, cafe->mmio); |
| 668 | udelay(10); |
| 669 | cafe_dev_dbg(&cafe->pdev->dev, "Status %x\n", readl(cafe->mmio + 0x30)); |
| 670 | #endif |
| 671 | /* Scan to find existance of the device */ |
| 672 | if (nand_scan_ident(mtd, 1)) { |
| 673 | err = -ENXIO; |
| 674 | goto out_irq; |
| 675 | } |
| 676 | |
| 677 | cafe->ctl2 = 1<<27; /* Reed-Solomon ECC */ |
| 678 | if (mtd->writesize == 2048) |
| 679 | cafe->ctl2 |= 1<<29; /* 2KiB page size */ |
| 680 | |
| 681 | /* Set up ECC according to the type of chip we found */ |
| 682 | if (mtd->writesize == 2048) { |
| 683 | cafe->nand.ecc.layout = &cafe_oobinfo_2048; |
| 684 | cafe->nand.bbt_td = &cafe_bbt_main_descr_2048; |
| 685 | cafe->nand.bbt_md = &cafe_bbt_mirror_descr_2048; |
| 686 | } else if (mtd->writesize == 512) { |
| 687 | cafe->nand.ecc.layout = &cafe_oobinfo_512; |
| 688 | cafe->nand.bbt_td = &cafe_bbt_main_descr_512; |
| 689 | cafe->nand.bbt_md = &cafe_bbt_mirror_descr_512; |
| 690 | } else { |
| 691 | printk(KERN_WARNING "Unexpected NAND flash writesize %d. Aborting\n", |
| 692 | mtd->writesize); |
| 693 | goto out_irq; |
| 694 | } |
| 695 | cafe->nand.ecc.mode = NAND_ECC_HW_SYNDROME; |
| 696 | cafe->nand.ecc.size = mtd->writesize; |
| 697 | cafe->nand.ecc.bytes = 14; |
| 698 | cafe->nand.ecc.hwctl = (void *)cafe_nand_bug; |
| 699 | cafe->nand.ecc.calculate = (void *)cafe_nand_bug; |
| 700 | cafe->nand.ecc.correct = (void *)cafe_nand_bug; |
| 701 | cafe->nand.write_page = cafe_nand_write_page; |
| 702 | cafe->nand.ecc.write_page = cafe_nand_write_page_lowlevel; |
| 703 | cafe->nand.ecc.write_oob = cafe_nand_write_oob; |
| 704 | cafe->nand.ecc.read_page = cafe_nand_read_page; |
| 705 | cafe->nand.ecc.read_oob = cafe_nand_read_oob; |
| 706 | |
| 707 | err = nand_scan_tail(mtd); |
| 708 | if (err) |
| 709 | goto out_irq; |
| 710 | |
| 711 | pci_set_drvdata(pdev, mtd); |
| 712 | add_mtd_device(mtd); |
| 713 | goto out; |
| 714 | |
| 715 | out_irq: |
| 716 | /* Disable NAND IRQ in global IRQ mask register */ |
| 717 | writel(~1 & readl(cafe->mmio + 0x300c), cafe->mmio + 0x300c); |
| 718 | free_irq(pdev->irq, mtd); |
| 719 | out_free_dma: |
| 720 | dma_free_coherent(&cafe->pdev->dev, 2112, cafe->dmabuf, cafe->dmaaddr); |
| 721 | out_ior: |
| 722 | pci_iounmap(pdev, cafe->mmio); |
| 723 | out_free_mtd: |
| 724 | kfree(mtd); |
| 725 | out: |
| 726 | return err; |
| 727 | } |
| 728 | |
| 729 | static void __devexit cafe_nand_remove(struct pci_dev *pdev) |
| 730 | { |
| 731 | struct mtd_info *mtd = pci_get_drvdata(pdev); |
| 732 | struct cafe_priv *cafe = mtd->priv; |
| 733 | |
| 734 | del_mtd_device(mtd); |
| 735 | /* Disable NAND IRQ in global IRQ mask register */ |
| 736 | writel(~1 & readl(cafe->mmio + 0x300c), cafe->mmio + 0x300c); |
| 737 | free_irq(pdev->irq, mtd); |
| 738 | nand_release(mtd); |
| 739 | pci_iounmap(pdev, cafe->mmio); |
| 740 | dma_free_coherent(&cafe->pdev->dev, 2112, cafe->dmabuf, cafe->dmaaddr); |
| 741 | kfree(mtd); |
| 742 | } |
| 743 | |
| 744 | static struct pci_device_id cafe_nand_tbl[] = { |
| 745 | { 0x11ab, 0x4100, PCI_ANY_ID, PCI_ANY_ID, PCI_CLASS_MEMORY_FLASH << 8, 0xFFFF0 } |
| 746 | }; |
| 747 | |
| 748 | MODULE_DEVICE_TABLE(pci, cafe_nand_tbl); |
| 749 | |
| 750 | static struct pci_driver cafe_nand_pci_driver = { |
| 751 | .name = "CAFÉ NAND", |
| 752 | .id_table = cafe_nand_tbl, |
| 753 | .probe = cafe_nand_probe, |
| 754 | .remove = __devexit_p(cafe_nand_remove), |
| 755 | #ifdef CONFIG_PMx |
| 756 | .suspend = cafe_nand_suspend, |
| 757 | .resume = cafe_nand_resume, |
| 758 | #endif |
| 759 | }; |
| 760 | |
| 761 | static int cafe_nand_init(void) |
| 762 | { |
| 763 | return pci_register_driver(&cafe_nand_pci_driver); |
| 764 | } |
| 765 | |
| 766 | static void cafe_nand_exit(void) |
| 767 | { |
| 768 | pci_unregister_driver(&cafe_nand_pci_driver); |
| 769 | } |
| 770 | module_init(cafe_nand_init); |
| 771 | module_exit(cafe_nand_exit); |
| 772 | |
| 773 | MODULE_LICENSE("GPL"); |
| 774 | MODULE_AUTHOR("David Woodhouse <dwmw2@infradead.org>"); |
| 775 | MODULE_DESCRIPTION("NAND flash driver for OLPC CAFE chip"); |
| 776 | |
| 777 | /* Correct ECC for 2048 bytes of 0xff: |
| 778 | 41 a0 71 65 54 27 f3 93 ec a9 be ed 0b a1 */ |
| 779 | |
| 780 | /* dwmw2's B-test board, in case of completely screwing it: |
| 781 | Bad eraseblock 2394 at 0x12b40000 |
| 782 | Bad eraseblock 2627 at 0x14860000 |
| 783 | Bad eraseblock 3349 at 0x1a2a0000 |
| 784 | */ |