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[deliverable/linux.git] / drivers / net / wireless / ath / ath9k / main.c
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1/*
2 * Copyright (c) 2008-2011 Atheros Communications Inc.
3 *
4 * Permission to use, copy, modify, and/or distribute this software for any
5 * purpose with or without fee is hereby granted, provided that the above
6 * copyright notice and this permission notice appear in all copies.
7 *
8 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
9 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
10 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
11 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
12 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
13 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
14 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
15 */
16
17#include <linux/nl80211.h>
18#include <linux/delay.h>
19#include "ath9k.h"
20#include "btcoex.h"
21
22static u8 parse_mpdudensity(u8 mpdudensity)
23{
24 /*
25 * 802.11n D2.0 defined values for "Minimum MPDU Start Spacing":
26 * 0 for no restriction
27 * 1 for 1/4 us
28 * 2 for 1/2 us
29 * 3 for 1 us
30 * 4 for 2 us
31 * 5 for 4 us
32 * 6 for 8 us
33 * 7 for 16 us
34 */
35 switch (mpdudensity) {
36 case 0:
37 return 0;
38 case 1:
39 case 2:
40 case 3:
41 /* Our lower layer calculations limit our precision to
42 1 microsecond */
43 return 1;
44 case 4:
45 return 2;
46 case 5:
47 return 4;
48 case 6:
49 return 8;
50 case 7:
51 return 16;
52 default:
53 return 0;
54 }
55}
56
57static bool ath9k_has_pending_frames(struct ath_softc *sc, struct ath_txq *txq)
58{
59 bool pending = false;
60
61 spin_lock_bh(&txq->axq_lock);
62
63 if (txq->axq_depth || !list_empty(&txq->axq_acq))
64 pending = true;
65
66 spin_unlock_bh(&txq->axq_lock);
67 return pending;
68}
69
70static bool ath9k_setpower(struct ath_softc *sc, enum ath9k_power_mode mode)
71{
72 unsigned long flags;
73 bool ret;
74
75 spin_lock_irqsave(&sc->sc_pm_lock, flags);
76 ret = ath9k_hw_setpower(sc->sc_ah, mode);
77 spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
78
79 return ret;
80}
81
82void ath9k_ps_wakeup(struct ath_softc *sc)
83{
84 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
85 unsigned long flags;
86 enum ath9k_power_mode power_mode;
87
88 spin_lock_irqsave(&sc->sc_pm_lock, flags);
89 if (++sc->ps_usecount != 1)
90 goto unlock;
91
92 power_mode = sc->sc_ah->power_mode;
93 ath9k_hw_setpower(sc->sc_ah, ATH9K_PM_AWAKE);
94
95 /*
96 * While the hardware is asleep, the cycle counters contain no
97 * useful data. Better clear them now so that they don't mess up
98 * survey data results.
99 */
100 if (power_mode != ATH9K_PM_AWAKE) {
101 spin_lock(&common->cc_lock);
102 ath_hw_cycle_counters_update(common);
103 memset(&common->cc_survey, 0, sizeof(common->cc_survey));
104 spin_unlock(&common->cc_lock);
105 }
106
107 unlock:
108 spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
109}
110
111void ath9k_ps_restore(struct ath_softc *sc)
112{
113 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
114 enum ath9k_power_mode mode;
115 unsigned long flags;
116
117 spin_lock_irqsave(&sc->sc_pm_lock, flags);
118 if (--sc->ps_usecount != 0)
119 goto unlock;
120
121 if (sc->ps_flags & PS_WAIT_FOR_TX_ACK)
122 goto unlock;
123
124 if (sc->ps_idle)
125 mode = ATH9K_PM_FULL_SLEEP;
126 else if (sc->ps_enabled &&
127 !(sc->ps_flags & (PS_WAIT_FOR_BEACON |
128 PS_WAIT_FOR_CAB |
129 PS_WAIT_FOR_PSPOLL_DATA)))
130 mode = ATH9K_PM_NETWORK_SLEEP;
131 else
132 goto unlock;
133
134 spin_lock(&common->cc_lock);
135 ath_hw_cycle_counters_update(common);
136 spin_unlock(&common->cc_lock);
137
138 ath9k_hw_setpower(sc->sc_ah, mode);
139
140 unlock:
141 spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
142}
143
144void ath_start_ani(struct ath_common *common)
145{
146 struct ath_hw *ah = common->ah;
147 unsigned long timestamp = jiffies_to_msecs(jiffies);
148 struct ath_softc *sc = (struct ath_softc *) common->priv;
149
150 if (!(sc->sc_flags & SC_OP_ANI_RUN))
151 return;
152
153 if (sc->sc_flags & SC_OP_OFFCHANNEL)
154 return;
155
156 common->ani.longcal_timer = timestamp;
157 common->ani.shortcal_timer = timestamp;
158 common->ani.checkani_timer = timestamp;
159
160 mod_timer(&common->ani.timer,
161 jiffies +
162 msecs_to_jiffies((u32)ah->config.ani_poll_interval));
163}
164
165static void ath_update_survey_nf(struct ath_softc *sc, int channel)
166{
167 struct ath_hw *ah = sc->sc_ah;
168 struct ath9k_channel *chan = &ah->channels[channel];
169 struct survey_info *survey = &sc->survey[channel];
170
171 if (chan->noisefloor) {
172 survey->filled |= SURVEY_INFO_NOISE_DBM;
173 survey->noise = ath9k_hw_getchan_noise(ah, chan);
174 }
175}
176
177/*
178 * Updates the survey statistics and returns the busy time since last
179 * update in %, if the measurement duration was long enough for the
180 * result to be useful, -1 otherwise.
181 */
182static int ath_update_survey_stats(struct ath_softc *sc)
183{
184 struct ath_hw *ah = sc->sc_ah;
185 struct ath_common *common = ath9k_hw_common(ah);
186 int pos = ah->curchan - &ah->channels[0];
187 struct survey_info *survey = &sc->survey[pos];
188 struct ath_cycle_counters *cc = &common->cc_survey;
189 unsigned int div = common->clockrate * 1000;
190 int ret = 0;
191
192 if (!ah->curchan)
193 return -1;
194
195 if (ah->power_mode == ATH9K_PM_AWAKE)
196 ath_hw_cycle_counters_update(common);
197
198 if (cc->cycles > 0) {
199 survey->filled |= SURVEY_INFO_CHANNEL_TIME |
200 SURVEY_INFO_CHANNEL_TIME_BUSY |
201 SURVEY_INFO_CHANNEL_TIME_RX |
202 SURVEY_INFO_CHANNEL_TIME_TX;
203 survey->channel_time += cc->cycles / div;
204 survey->channel_time_busy += cc->rx_busy / div;
205 survey->channel_time_rx += cc->rx_frame / div;
206 survey->channel_time_tx += cc->tx_frame / div;
207 }
208
209 if (cc->cycles < div)
210 return -1;
211
212 if (cc->cycles > 0)
213 ret = cc->rx_busy * 100 / cc->cycles;
214
215 memset(cc, 0, sizeof(*cc));
216
217 ath_update_survey_nf(sc, pos);
218
219 return ret;
220}
221
222static void __ath_cancel_work(struct ath_softc *sc)
223{
224 cancel_work_sync(&sc->paprd_work);
225 cancel_work_sync(&sc->hw_check_work);
226 cancel_delayed_work_sync(&sc->tx_complete_work);
227 cancel_delayed_work_sync(&sc->hw_pll_work);
228}
229
230static void ath_cancel_work(struct ath_softc *sc)
231{
232 __ath_cancel_work(sc);
233 cancel_work_sync(&sc->hw_reset_work);
234}
235
236static bool ath_prepare_reset(struct ath_softc *sc, bool retry_tx, bool flush)
237{
238 struct ath_hw *ah = sc->sc_ah;
239 struct ath_common *common = ath9k_hw_common(ah);
240 bool ret;
241
242 ieee80211_stop_queues(sc->hw);
243
244 sc->hw_busy_count = 0;
245 del_timer_sync(&common->ani.timer);
246
247 ath9k_debug_samp_bb_mac(sc);
248 ath9k_hw_disable_interrupts(ah);
249
250 ret = ath_drain_all_txq(sc, retry_tx);
251
252 if (!ath_stoprecv(sc))
253 ret = false;
254
255 if (!flush) {
256 if (ah->caps.hw_caps & ATH9K_HW_CAP_EDMA)
257 ath_rx_tasklet(sc, 1, true);
258 ath_rx_tasklet(sc, 1, false);
259 } else {
260 ath_flushrecv(sc);
261 }
262
263 return ret;
264}
265
266static bool ath_complete_reset(struct ath_softc *sc, bool start)
267{
268 struct ath_hw *ah = sc->sc_ah;
269 struct ath_common *common = ath9k_hw_common(ah);
270
271 if (ath_startrecv(sc) != 0) {
272 ath_err(common, "Unable to restart recv logic\n");
273 return false;
274 }
275
276 ath9k_cmn_update_txpow(ah, sc->curtxpow,
277 sc->config.txpowlimit, &sc->curtxpow);
278 ath9k_hw_set_interrupts(ah);
279 ath9k_hw_enable_interrupts(ah);
280
281 if (!(sc->sc_flags & (SC_OP_OFFCHANNEL)) && start) {
282 if (sc->sc_flags & SC_OP_BEACONS)
283 ath_set_beacon(sc);
284
285 ieee80211_queue_delayed_work(sc->hw, &sc->tx_complete_work, 0);
286 ieee80211_queue_delayed_work(sc->hw, &sc->hw_pll_work, HZ/2);
287 if (!common->disable_ani)
288 ath_start_ani(common);
289 }
290
291 if ((ah->caps.hw_caps & ATH9K_HW_CAP_ANT_DIV_COMB) && sc->ant_rx != 3) {
292 struct ath_hw_antcomb_conf div_ant_conf;
293 u8 lna_conf;
294
295 ath9k_hw_antdiv_comb_conf_get(ah, &div_ant_conf);
296
297 if (sc->ant_rx == 1)
298 lna_conf = ATH_ANT_DIV_COMB_LNA1;
299 else
300 lna_conf = ATH_ANT_DIV_COMB_LNA2;
301 div_ant_conf.main_lna_conf = lna_conf;
302 div_ant_conf.alt_lna_conf = lna_conf;
303
304 ath9k_hw_antdiv_comb_conf_set(ah, &div_ant_conf);
305 }
306
307 ieee80211_wake_queues(sc->hw);
308
309 return true;
310}
311
312static int ath_reset_internal(struct ath_softc *sc, struct ath9k_channel *hchan,
313 bool retry_tx)
314{
315 struct ath_hw *ah = sc->sc_ah;
316 struct ath_common *common = ath9k_hw_common(ah);
317 struct ath9k_hw_cal_data *caldata = NULL;
318 bool fastcc = true;
319 bool flush = false;
320 int r;
321
322 __ath_cancel_work(sc);
323
324 spin_lock_bh(&sc->sc_pcu_lock);
325
326 if (!(sc->sc_flags & SC_OP_OFFCHANNEL)) {
327 fastcc = false;
328 caldata = &sc->caldata;
329 }
330
331 if (!hchan) {
332 fastcc = false;
333 flush = true;
334 hchan = ah->curchan;
335 }
336
337 if (!ath_prepare_reset(sc, retry_tx, flush))
338 fastcc = false;
339
340 ath_dbg(common, CONFIG, "Reset to %u MHz, HT40: %d fastcc: %d\n",
341 hchan->channel, IS_CHAN_HT40(hchan), fastcc);
342
343 r = ath9k_hw_reset(ah, hchan, caldata, fastcc);
344 if (r) {
345 ath_err(common,
346 "Unable to reset channel, reset status %d\n", r);
347 goto out;
348 }
349
350 if (!ath_complete_reset(sc, true))
351 r = -EIO;
352
353out:
354 spin_unlock_bh(&sc->sc_pcu_lock);
355 return r;
356}
357
358
359/*
360 * Set/change channels. If the channel is really being changed, it's done
361 * by reseting the chip. To accomplish this we must first cleanup any pending
362 * DMA, then restart stuff.
363*/
364static int ath_set_channel(struct ath_softc *sc, struct ieee80211_hw *hw,
365 struct ath9k_channel *hchan)
366{
367 int r;
368
369 if (sc->sc_flags & SC_OP_INVALID)
370 return -EIO;
371
372 r = ath_reset_internal(sc, hchan, false);
373
374 return r;
375}
376
377static void ath_paprd_activate(struct ath_softc *sc)
378{
379 struct ath_hw *ah = sc->sc_ah;
380 struct ath9k_hw_cal_data *caldata = ah->caldata;
381 int chain;
382
383 if (!caldata || !caldata->paprd_done)
384 return;
385
386 ath9k_ps_wakeup(sc);
387 ar9003_paprd_enable(ah, false);
388 for (chain = 0; chain < AR9300_MAX_CHAINS; chain++) {
389 if (!(ah->txchainmask & BIT(chain)))
390 continue;
391
392 ar9003_paprd_populate_single_table(ah, caldata, chain);
393 }
394
395 ar9003_paprd_enable(ah, true);
396 ath9k_ps_restore(sc);
397}
398
399static bool ath_paprd_send_frame(struct ath_softc *sc, struct sk_buff *skb, int chain)
400{
401 struct ieee80211_hw *hw = sc->hw;
402 struct ieee80211_tx_info *tx_info = IEEE80211_SKB_CB(skb);
403 struct ath_hw *ah = sc->sc_ah;
404 struct ath_common *common = ath9k_hw_common(ah);
405 struct ath_tx_control txctl;
406 int time_left;
407
408 memset(&txctl, 0, sizeof(txctl));
409 txctl.txq = sc->tx.txq_map[WME_AC_BE];
410
411 memset(tx_info, 0, sizeof(*tx_info));
412 tx_info->band = hw->conf.channel->band;
413 tx_info->flags |= IEEE80211_TX_CTL_NO_ACK;
414 tx_info->control.rates[0].idx = 0;
415 tx_info->control.rates[0].count = 1;
416 tx_info->control.rates[0].flags = IEEE80211_TX_RC_MCS;
417 tx_info->control.rates[1].idx = -1;
418
419 init_completion(&sc->paprd_complete);
420 txctl.paprd = BIT(chain);
421
422 if (ath_tx_start(hw, skb, &txctl) != 0) {
423 ath_dbg(common, CALIBRATE, "PAPRD TX failed\n");
424 dev_kfree_skb_any(skb);
425 return false;
426 }
427
428 time_left = wait_for_completion_timeout(&sc->paprd_complete,
429 msecs_to_jiffies(ATH_PAPRD_TIMEOUT));
430
431 if (!time_left)
432 ath_dbg(common, CALIBRATE,
433 "Timeout waiting for paprd training on TX chain %d\n",
434 chain);
435
436 return !!time_left;
437}
438
439void ath_paprd_calibrate(struct work_struct *work)
440{
441 struct ath_softc *sc = container_of(work, struct ath_softc, paprd_work);
442 struct ieee80211_hw *hw = sc->hw;
443 struct ath_hw *ah = sc->sc_ah;
444 struct ieee80211_hdr *hdr;
445 struct sk_buff *skb = NULL;
446 struct ath9k_hw_cal_data *caldata = ah->caldata;
447 struct ath_common *common = ath9k_hw_common(ah);
448 int ftype;
449 int chain_ok = 0;
450 int chain;
451 int len = 1800;
452
453 if (!caldata)
454 return;
455
456 ath9k_ps_wakeup(sc);
457
458 if (ar9003_paprd_init_table(ah) < 0)
459 goto fail_paprd;
460
461 skb = alloc_skb(len, GFP_KERNEL);
462 if (!skb)
463 goto fail_paprd;
464
465 skb_put(skb, len);
466 memset(skb->data, 0, len);
467 hdr = (struct ieee80211_hdr *)skb->data;
468 ftype = IEEE80211_FTYPE_DATA | IEEE80211_STYPE_NULLFUNC;
469 hdr->frame_control = cpu_to_le16(ftype);
470 hdr->duration_id = cpu_to_le16(10);
471 memcpy(hdr->addr1, hw->wiphy->perm_addr, ETH_ALEN);
472 memcpy(hdr->addr2, hw->wiphy->perm_addr, ETH_ALEN);
473 memcpy(hdr->addr3, hw->wiphy->perm_addr, ETH_ALEN);
474
475 for (chain = 0; chain < AR9300_MAX_CHAINS; chain++) {
476 if (!(ah->txchainmask & BIT(chain)))
477 continue;
478
479 chain_ok = 0;
480
481 ath_dbg(common, CALIBRATE,
482 "Sending PAPRD frame for thermal measurement on chain %d\n",
483 chain);
484 if (!ath_paprd_send_frame(sc, skb, chain))
485 goto fail_paprd;
486
487 ar9003_paprd_setup_gain_table(ah, chain);
488
489 ath_dbg(common, CALIBRATE,
490 "Sending PAPRD training frame on chain %d\n", chain);
491 if (!ath_paprd_send_frame(sc, skb, chain))
492 goto fail_paprd;
493
494 if (!ar9003_paprd_is_done(ah)) {
495 ath_dbg(common, CALIBRATE,
496 "PAPRD not yet done on chain %d\n", chain);
497 break;
498 }
499
500 if (ar9003_paprd_create_curve(ah, caldata, chain)) {
501 ath_dbg(common, CALIBRATE,
502 "PAPRD create curve failed on chain %d\n",
503 chain);
504 break;
505 }
506
507 chain_ok = 1;
508 }
509 kfree_skb(skb);
510
511 if (chain_ok) {
512 caldata->paprd_done = true;
513 ath_paprd_activate(sc);
514 }
515
516fail_paprd:
517 ath9k_ps_restore(sc);
518}
519
520/*
521 * This routine performs the periodic noise floor calibration function
522 * that is used to adjust and optimize the chip performance. This
523 * takes environmental changes (location, temperature) into account.
524 * When the task is complete, it reschedules itself depending on the
525 * appropriate interval that was calculated.
526 */
527void ath_ani_calibrate(unsigned long data)
528{
529 struct ath_softc *sc = (struct ath_softc *)data;
530 struct ath_hw *ah = sc->sc_ah;
531 struct ath_common *common = ath9k_hw_common(ah);
532 bool longcal = false;
533 bool shortcal = false;
534 bool aniflag = false;
535 unsigned int timestamp = jiffies_to_msecs(jiffies);
536 u32 cal_interval, short_cal_interval, long_cal_interval;
537 unsigned long flags;
538
539 if (ah->caldata && ah->caldata->nfcal_interference)
540 long_cal_interval = ATH_LONG_CALINTERVAL_INT;
541 else
542 long_cal_interval = ATH_LONG_CALINTERVAL;
543
544 short_cal_interval = (ah->opmode == NL80211_IFTYPE_AP) ?
545 ATH_AP_SHORT_CALINTERVAL : ATH_STA_SHORT_CALINTERVAL;
546
547 /* Only calibrate if awake */
548 if (sc->sc_ah->power_mode != ATH9K_PM_AWAKE)
549 goto set_timer;
550
551 ath9k_ps_wakeup(sc);
552
553 /* Long calibration runs independently of short calibration. */
554 if ((timestamp - common->ani.longcal_timer) >= long_cal_interval) {
555 longcal = true;
556 common->ani.longcal_timer = timestamp;
557 }
558
559 /* Short calibration applies only while caldone is false */
560 if (!common->ani.caldone) {
561 if ((timestamp - common->ani.shortcal_timer) >= short_cal_interval) {
562 shortcal = true;
563 common->ani.shortcal_timer = timestamp;
564 common->ani.resetcal_timer = timestamp;
565 }
566 } else {
567 if ((timestamp - common->ani.resetcal_timer) >=
568 ATH_RESTART_CALINTERVAL) {
569 common->ani.caldone = ath9k_hw_reset_calvalid(ah);
570 if (common->ani.caldone)
571 common->ani.resetcal_timer = timestamp;
572 }
573 }
574
575 /* Verify whether we must check ANI */
576 if (sc->sc_ah->config.enable_ani
577 && (timestamp - common->ani.checkani_timer) >=
578 ah->config.ani_poll_interval) {
579 aniflag = true;
580 common->ani.checkani_timer = timestamp;
581 }
582
583 /* Call ANI routine if necessary */
584 if (aniflag) {
585 spin_lock_irqsave(&common->cc_lock, flags);
586 ath9k_hw_ani_monitor(ah, ah->curchan);
587 ath_update_survey_stats(sc);
588 spin_unlock_irqrestore(&common->cc_lock, flags);
589 }
590
591 /* Perform calibration if necessary */
592 if (longcal || shortcal) {
593 common->ani.caldone =
594 ath9k_hw_calibrate(ah, ah->curchan,
595 ah->rxchainmask, longcal);
596 }
597
598 ath_dbg(common, ANI,
599 "Calibration @%lu finished: %s %s %s, caldone: %s\n",
600 jiffies,
601 longcal ? "long" : "", shortcal ? "short" : "",
602 aniflag ? "ani" : "", common->ani.caldone ? "true" : "false");
603
604 ath9k_ps_restore(sc);
605
606set_timer:
607 /*
608 * Set timer interval based on previous results.
609 * The interval must be the shortest necessary to satisfy ANI,
610 * short calibration and long calibration.
611 */
612 ath9k_debug_samp_bb_mac(sc);
613 cal_interval = ATH_LONG_CALINTERVAL;
614 if (sc->sc_ah->config.enable_ani)
615 cal_interval = min(cal_interval,
616 (u32)ah->config.ani_poll_interval);
617 if (!common->ani.caldone)
618 cal_interval = min(cal_interval, (u32)short_cal_interval);
619
620 mod_timer(&common->ani.timer, jiffies + msecs_to_jiffies(cal_interval));
621 if ((sc->sc_ah->caps.hw_caps & ATH9K_HW_CAP_PAPRD) && ah->caldata) {
622 if (!ah->caldata->paprd_done)
623 ieee80211_queue_work(sc->hw, &sc->paprd_work);
624 else if (!ah->paprd_table_write_done)
625 ath_paprd_activate(sc);
626 }
627}
628
629static void ath_node_attach(struct ath_softc *sc, struct ieee80211_sta *sta,
630 struct ieee80211_vif *vif)
631{
632 struct ath_node *an;
633 an = (struct ath_node *)sta->drv_priv;
634
635#ifdef CONFIG_ATH9K_DEBUGFS
636 spin_lock(&sc->nodes_lock);
637 list_add(&an->list, &sc->nodes);
638 spin_unlock(&sc->nodes_lock);
639#endif
640 an->sta = sta;
641 an->vif = vif;
642
643 if (sta->ht_cap.ht_supported) {
644 ath_tx_node_init(sc, an);
645 an->maxampdu = 1 << (IEEE80211_HT_MAX_AMPDU_FACTOR +
646 sta->ht_cap.ampdu_factor);
647 an->mpdudensity = parse_mpdudensity(sta->ht_cap.ampdu_density);
648 }
649}
650
651static void ath_node_detach(struct ath_softc *sc, struct ieee80211_sta *sta)
652{
653 struct ath_node *an = (struct ath_node *)sta->drv_priv;
654
655#ifdef CONFIG_ATH9K_DEBUGFS
656 spin_lock(&sc->nodes_lock);
657 list_del(&an->list);
658 spin_unlock(&sc->nodes_lock);
659 an->sta = NULL;
660#endif
661
662 if (sta->ht_cap.ht_supported)
663 ath_tx_node_cleanup(sc, an);
664}
665
666
667void ath9k_tasklet(unsigned long data)
668{
669 struct ath_softc *sc = (struct ath_softc *)data;
670 struct ath_hw *ah = sc->sc_ah;
671 struct ath_common *common = ath9k_hw_common(ah);
672
673 u32 status = sc->intrstatus;
674 u32 rxmask;
675
676 ath9k_ps_wakeup(sc);
677 spin_lock(&sc->sc_pcu_lock);
678
679 if ((status & ATH9K_INT_FATAL) ||
680 (status & ATH9K_INT_BB_WATCHDOG)) {
681#ifdef CONFIG_ATH9K_DEBUGFS
682 enum ath_reset_type type;
683
684 if (status & ATH9K_INT_FATAL)
685 type = RESET_TYPE_FATAL_INT;
686 else
687 type = RESET_TYPE_BB_WATCHDOG;
688
689 RESET_STAT_INC(sc, type);
690#endif
691 ieee80211_queue_work(sc->hw, &sc->hw_reset_work);
692 goto out;
693 }
694
695 /*
696 * Only run the baseband hang check if beacons stop working in AP or
697 * IBSS mode, because it has a high false positive rate. For station
698 * mode it should not be necessary, since the upper layers will detect
699 * this through a beacon miss automatically and the following channel
700 * change will trigger a hardware reset anyway
701 */
702 if (ath9k_hw_numtxpending(ah, sc->beacon.beaconq) != 0 &&
703 !ath9k_hw_check_alive(ah))
704 ieee80211_queue_work(sc->hw, &sc->hw_check_work);
705
706 if ((status & ATH9K_INT_TSFOOR) && sc->ps_enabled) {
707 /*
708 * TSF sync does not look correct; remain awake to sync with
709 * the next Beacon.
710 */
711 ath_dbg(common, PS, "TSFOOR - Sync with next Beacon\n");
712 sc->ps_flags |= PS_WAIT_FOR_BEACON | PS_BEACON_SYNC;
713 }
714
715 if (ah->caps.hw_caps & ATH9K_HW_CAP_EDMA)
716 rxmask = (ATH9K_INT_RXHP | ATH9K_INT_RXLP | ATH9K_INT_RXEOL |
717 ATH9K_INT_RXORN);
718 else
719 rxmask = (ATH9K_INT_RX | ATH9K_INT_RXEOL | ATH9K_INT_RXORN);
720
721 if (status & rxmask) {
722 /* Check for high priority Rx first */
723 if ((ah->caps.hw_caps & ATH9K_HW_CAP_EDMA) &&
724 (status & ATH9K_INT_RXHP))
725 ath_rx_tasklet(sc, 0, true);
726
727 ath_rx_tasklet(sc, 0, false);
728 }
729
730 if (status & ATH9K_INT_TX) {
731 if (ah->caps.hw_caps & ATH9K_HW_CAP_EDMA)
732 ath_tx_edma_tasklet(sc);
733 else
734 ath_tx_tasklet(sc);
735 }
736
737 ath9k_btcoex_handle_interrupt(sc, status);
738
739out:
740 /* re-enable hardware interrupt */
741 ath9k_hw_enable_interrupts(ah);
742
743 spin_unlock(&sc->sc_pcu_lock);
744 ath9k_ps_restore(sc);
745}
746
747irqreturn_t ath_isr(int irq, void *dev)
748{
749#define SCHED_INTR ( \
750 ATH9K_INT_FATAL | \
751 ATH9K_INT_BB_WATCHDOG | \
752 ATH9K_INT_RXORN | \
753 ATH9K_INT_RXEOL | \
754 ATH9K_INT_RX | \
755 ATH9K_INT_RXLP | \
756 ATH9K_INT_RXHP | \
757 ATH9K_INT_TX | \
758 ATH9K_INT_BMISS | \
759 ATH9K_INT_CST | \
760 ATH9K_INT_TSFOOR | \
761 ATH9K_INT_GENTIMER | \
762 ATH9K_INT_MCI)
763
764 struct ath_softc *sc = dev;
765 struct ath_hw *ah = sc->sc_ah;
766 struct ath_common *common = ath9k_hw_common(ah);
767 enum ath9k_int status;
768 bool sched = false;
769
770 /*
771 * The hardware is not ready/present, don't
772 * touch anything. Note this can happen early
773 * on if the IRQ is shared.
774 */
775 if (sc->sc_flags & SC_OP_INVALID)
776 return IRQ_NONE;
777
778
779 /* shared irq, not for us */
780
781 if (!ath9k_hw_intrpend(ah))
782 return IRQ_NONE;
783
784 /*
785 * Figure out the reason(s) for the interrupt. Note
786 * that the hal returns a pseudo-ISR that may include
787 * bits we haven't explicitly enabled so we mask the
788 * value to insure we only process bits we requested.
789 */
790 ath9k_hw_getisr(ah, &status); /* NB: clears ISR too */
791 status &= ah->imask; /* discard unasked-for bits */
792
793 /*
794 * If there are no status bits set, then this interrupt was not
795 * for me (should have been caught above).
796 */
797 if (!status)
798 return IRQ_NONE;
799
800 /* Cache the status */
801 sc->intrstatus = status;
802
803 if (status & SCHED_INTR)
804 sched = true;
805
806 /*
807 * If a FATAL or RXORN interrupt is received, we have to reset the
808 * chip immediately.
809 */
810 if ((status & ATH9K_INT_FATAL) || ((status & ATH9K_INT_RXORN) &&
811 !(ah->caps.hw_caps & ATH9K_HW_CAP_EDMA)))
812 goto chip_reset;
813
814 if ((ah->caps.hw_caps & ATH9K_HW_CAP_EDMA) &&
815 (status & ATH9K_INT_BB_WATCHDOG)) {
816
817 spin_lock(&common->cc_lock);
818 ath_hw_cycle_counters_update(common);
819 ar9003_hw_bb_watchdog_dbg_info(ah);
820 spin_unlock(&common->cc_lock);
821
822 goto chip_reset;
823 }
824
825 if (status & ATH9K_INT_SWBA)
826 tasklet_schedule(&sc->bcon_tasklet);
827
828 if (status & ATH9K_INT_TXURN)
829 ath9k_hw_updatetxtriglevel(ah, true);
830
831 if (status & ATH9K_INT_RXEOL) {
832 ah->imask &= ~(ATH9K_INT_RXEOL | ATH9K_INT_RXORN);
833 ath9k_hw_set_interrupts(ah);
834 }
835
836 if (status & ATH9K_INT_MIB) {
837 /*
838 * Disable interrupts until we service the MIB
839 * interrupt; otherwise it will continue to
840 * fire.
841 */
842 ath9k_hw_disable_interrupts(ah);
843 /*
844 * Let the hal handle the event. We assume
845 * it will clear whatever condition caused
846 * the interrupt.
847 */
848 spin_lock(&common->cc_lock);
849 ath9k_hw_proc_mib_event(ah);
850 spin_unlock(&common->cc_lock);
851 ath9k_hw_enable_interrupts(ah);
852 }
853
854 if (!(ah->caps.hw_caps & ATH9K_HW_CAP_AUTOSLEEP))
855 if (status & ATH9K_INT_TIM_TIMER) {
856 if (ATH_DBG_WARN_ON_ONCE(sc->ps_idle))
857 goto chip_reset;
858 /* Clear RxAbort bit so that we can
859 * receive frames */
860 ath9k_setpower(sc, ATH9K_PM_AWAKE);
861 ath9k_hw_setrxabort(sc->sc_ah, 0);
862 sc->ps_flags |= PS_WAIT_FOR_BEACON;
863 }
864
865chip_reset:
866
867 ath_debug_stat_interrupt(sc, status);
868
869 if (sched) {
870 /* turn off every interrupt */
871 ath9k_hw_disable_interrupts(ah);
872 tasklet_schedule(&sc->intr_tq);
873 }
874
875 return IRQ_HANDLED;
876
877#undef SCHED_INTR
878}
879
880static int ath_reset(struct ath_softc *sc, bool retry_tx)
881{
882 int r;
883
884 ath9k_ps_wakeup(sc);
885
886 r = ath_reset_internal(sc, NULL, retry_tx);
887
888 if (retry_tx) {
889 int i;
890 for (i = 0; i < ATH9K_NUM_TX_QUEUES; i++) {
891 if (ATH_TXQ_SETUP(sc, i)) {
892 spin_lock_bh(&sc->tx.txq[i].axq_lock);
893 ath_txq_schedule(sc, &sc->tx.txq[i]);
894 spin_unlock_bh(&sc->tx.txq[i].axq_lock);
895 }
896 }
897 }
898
899 ath9k_ps_restore(sc);
900
901 return r;
902}
903
904void ath_reset_work(struct work_struct *work)
905{
906 struct ath_softc *sc = container_of(work, struct ath_softc, hw_reset_work);
907
908 ath_reset(sc, true);
909}
910
911void ath_hw_check(struct work_struct *work)
912{
913 struct ath_softc *sc = container_of(work, struct ath_softc, hw_check_work);
914 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
915 unsigned long flags;
916 int busy;
917
918 ath9k_ps_wakeup(sc);
919 if (ath9k_hw_check_alive(sc->sc_ah))
920 goto out;
921
922 spin_lock_irqsave(&common->cc_lock, flags);
923 busy = ath_update_survey_stats(sc);
924 spin_unlock_irqrestore(&common->cc_lock, flags);
925
926 ath_dbg(common, RESET, "Possible baseband hang, busy=%d (try %d)\n",
927 busy, sc->hw_busy_count + 1);
928 if (busy >= 99) {
929 if (++sc->hw_busy_count >= 3) {
930 RESET_STAT_INC(sc, RESET_TYPE_BB_HANG);
931 ieee80211_queue_work(sc->hw, &sc->hw_reset_work);
932 }
933
934 } else if (busy >= 0)
935 sc->hw_busy_count = 0;
936
937out:
938 ath9k_ps_restore(sc);
939}
940
941static void ath_hw_pll_rx_hang_check(struct ath_softc *sc, u32 pll_sqsum)
942{
943 static int count;
944 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
945
946 if (pll_sqsum >= 0x40000) {
947 count++;
948 if (count == 3) {
949 /* Rx is hung for more than 500ms. Reset it */
950 ath_dbg(common, RESET, "Possible RX hang, resetting\n");
951 RESET_STAT_INC(sc, RESET_TYPE_PLL_HANG);
952 ieee80211_queue_work(sc->hw, &sc->hw_reset_work);
953 count = 0;
954 }
955 } else
956 count = 0;
957}
958
959void ath_hw_pll_work(struct work_struct *work)
960{
961 struct ath_softc *sc = container_of(work, struct ath_softc,
962 hw_pll_work.work);
963 u32 pll_sqsum;
964
965 if (AR_SREV_9485(sc->sc_ah)) {
966
967 ath9k_ps_wakeup(sc);
968 pll_sqsum = ar9003_get_pll_sqsum_dvc(sc->sc_ah);
969 ath9k_ps_restore(sc);
970
971 ath_hw_pll_rx_hang_check(sc, pll_sqsum);
972
973 ieee80211_queue_delayed_work(sc->hw, &sc->hw_pll_work, HZ/5);
974 }
975}
976
977/**********************/
978/* mac80211 callbacks */
979/**********************/
980
981static int ath9k_start(struct ieee80211_hw *hw)
982{
983 struct ath_softc *sc = hw->priv;
984 struct ath_hw *ah = sc->sc_ah;
985 struct ath_common *common = ath9k_hw_common(ah);
986 struct ieee80211_channel *curchan = hw->conf.channel;
987 struct ath9k_channel *init_channel;
988 int r;
989
990 ath_dbg(common, CONFIG,
991 "Starting driver with initial channel: %d MHz\n",
992 curchan->center_freq);
993
994 ath9k_ps_wakeup(sc);
995 mutex_lock(&sc->mutex);
996
997 init_channel = ath9k_cmn_get_curchannel(hw, ah);
998
999 /* Reset SERDES registers */
1000 ath9k_hw_configpcipowersave(ah, false);
1001
1002 /*
1003 * The basic interface to setting the hardware in a good
1004 * state is ``reset''. On return the hardware is known to
1005 * be powered up and with interrupts disabled. This must
1006 * be followed by initialization of the appropriate bits
1007 * and then setup of the interrupt mask.
1008 */
1009 spin_lock_bh(&sc->sc_pcu_lock);
1010
1011 atomic_set(&ah->intr_ref_cnt, -1);
1012
1013 r = ath9k_hw_reset(ah, init_channel, ah->caldata, false);
1014 if (r) {
1015 ath_err(common,
1016 "Unable to reset hardware; reset status %d (freq %u MHz)\n",
1017 r, curchan->center_freq);
1018 spin_unlock_bh(&sc->sc_pcu_lock);
1019 goto mutex_unlock;
1020 }
1021
1022 /* Setup our intr mask. */
1023 ah->imask = ATH9K_INT_TX | ATH9K_INT_RXEOL |
1024 ATH9K_INT_RXORN | ATH9K_INT_FATAL |
1025 ATH9K_INT_GLOBAL;
1026
1027 if (ah->caps.hw_caps & ATH9K_HW_CAP_EDMA)
1028 ah->imask |= ATH9K_INT_RXHP |
1029 ATH9K_INT_RXLP |
1030 ATH9K_INT_BB_WATCHDOG;
1031 else
1032 ah->imask |= ATH9K_INT_RX;
1033
1034 ah->imask |= ATH9K_INT_GTT;
1035
1036 if (ah->caps.hw_caps & ATH9K_HW_CAP_HT)
1037 ah->imask |= ATH9K_INT_CST;
1038
1039 if (ah->caps.hw_caps & ATH9K_HW_CAP_MCI)
1040 ah->imask |= ATH9K_INT_MCI;
1041
1042 sc->sc_flags &= ~SC_OP_INVALID;
1043 sc->sc_ah->is_monitoring = false;
1044
1045 if (!ath_complete_reset(sc, false)) {
1046 r = -EIO;
1047 spin_unlock_bh(&sc->sc_pcu_lock);
1048 goto mutex_unlock;
1049 }
1050
1051 if (ah->led_pin >= 0) {
1052 ath9k_hw_cfg_output(ah, ah->led_pin,
1053 AR_GPIO_OUTPUT_MUX_AS_OUTPUT);
1054 ath9k_hw_set_gpio(ah, ah->led_pin, 0);
1055 }
1056
1057 /*
1058 * Reset key cache to sane defaults (all entries cleared) instead of
1059 * semi-random values after suspend/resume.
1060 */
1061 ath9k_cmn_init_crypto(sc->sc_ah);
1062
1063 spin_unlock_bh(&sc->sc_pcu_lock);
1064
1065 ath9k_start_btcoex(sc);
1066
1067 if (ah->caps.pcie_lcr_extsync_en && common->bus_ops->extn_synch_en)
1068 common->bus_ops->extn_synch_en(common);
1069
1070mutex_unlock:
1071 mutex_unlock(&sc->mutex);
1072
1073 ath9k_ps_restore(sc);
1074
1075 return r;
1076}
1077
1078static void ath9k_tx(struct ieee80211_hw *hw, struct sk_buff *skb)
1079{
1080 struct ath_softc *sc = hw->priv;
1081 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1082 struct ath_tx_control txctl;
1083 struct ieee80211_hdr *hdr = (struct ieee80211_hdr *) skb->data;
1084
1085 if (sc->ps_enabled) {
1086 /*
1087 * mac80211 does not set PM field for normal data frames, so we
1088 * need to update that based on the current PS mode.
1089 */
1090 if (ieee80211_is_data(hdr->frame_control) &&
1091 !ieee80211_is_nullfunc(hdr->frame_control) &&
1092 !ieee80211_has_pm(hdr->frame_control)) {
1093 ath_dbg(common, PS,
1094 "Add PM=1 for a TX frame while in PS mode\n");
1095 hdr->frame_control |= cpu_to_le16(IEEE80211_FCTL_PM);
1096 }
1097 }
1098
1099 /*
1100 * Cannot tx while the hardware is in full sleep, it first needs a full
1101 * chip reset to recover from that
1102 */
1103 if (unlikely(sc->sc_ah->power_mode == ATH9K_PM_FULL_SLEEP))
1104 goto exit;
1105
1106 if (unlikely(sc->sc_ah->power_mode != ATH9K_PM_AWAKE)) {
1107 /*
1108 * We are using PS-Poll and mac80211 can request TX while in
1109 * power save mode. Need to wake up hardware for the TX to be
1110 * completed and if needed, also for RX of buffered frames.
1111 */
1112 ath9k_ps_wakeup(sc);
1113 if (!(sc->sc_ah->caps.hw_caps & ATH9K_HW_CAP_AUTOSLEEP))
1114 ath9k_hw_setrxabort(sc->sc_ah, 0);
1115 if (ieee80211_is_pspoll(hdr->frame_control)) {
1116 ath_dbg(common, PS,
1117 "Sending PS-Poll to pick a buffered frame\n");
1118 sc->ps_flags |= PS_WAIT_FOR_PSPOLL_DATA;
1119 } else {
1120 ath_dbg(common, PS, "Wake up to complete TX\n");
1121 sc->ps_flags |= PS_WAIT_FOR_TX_ACK;
1122 }
1123 /*
1124 * The actual restore operation will happen only after
1125 * the sc_flags bit is cleared. We are just dropping
1126 * the ps_usecount here.
1127 */
1128 ath9k_ps_restore(sc);
1129 }
1130
1131 memset(&txctl, 0, sizeof(struct ath_tx_control));
1132 txctl.txq = sc->tx.txq_map[skb_get_queue_mapping(skb)];
1133
1134 ath_dbg(common, XMIT, "transmitting packet, skb: %p\n", skb);
1135
1136 if (ath_tx_start(hw, skb, &txctl) != 0) {
1137 ath_dbg(common, XMIT, "TX failed\n");
1138 goto exit;
1139 }
1140
1141 return;
1142exit:
1143 dev_kfree_skb_any(skb);
1144}
1145
1146static void ath9k_stop(struct ieee80211_hw *hw)
1147{
1148 struct ath_softc *sc = hw->priv;
1149 struct ath_hw *ah = sc->sc_ah;
1150 struct ath_common *common = ath9k_hw_common(ah);
1151 bool prev_idle;
1152
1153 mutex_lock(&sc->mutex);
1154
1155 ath_cancel_work(sc);
1156
1157 if (sc->sc_flags & SC_OP_INVALID) {
1158 ath_dbg(common, ANY, "Device not present\n");
1159 mutex_unlock(&sc->mutex);
1160 return;
1161 }
1162
1163 /* Ensure HW is awake when we try to shut it down. */
1164 ath9k_ps_wakeup(sc);
1165
1166 ath9k_stop_btcoex(sc);
1167
1168 spin_lock_bh(&sc->sc_pcu_lock);
1169
1170 /* prevent tasklets to enable interrupts once we disable them */
1171 ah->imask &= ~ATH9K_INT_GLOBAL;
1172
1173 /* make sure h/w will not generate any interrupt
1174 * before setting the invalid flag. */
1175 ath9k_hw_disable_interrupts(ah);
1176
1177 spin_unlock_bh(&sc->sc_pcu_lock);
1178
1179 /* we can now sync irq and kill any running tasklets, since we already
1180 * disabled interrupts and not holding a spin lock */
1181 synchronize_irq(sc->irq);
1182 tasklet_kill(&sc->intr_tq);
1183 tasklet_kill(&sc->bcon_tasklet);
1184
1185 prev_idle = sc->ps_idle;
1186 sc->ps_idle = true;
1187
1188 spin_lock_bh(&sc->sc_pcu_lock);
1189
1190 if (ah->led_pin >= 0) {
1191 ath9k_hw_set_gpio(ah, ah->led_pin, 1);
1192 ath9k_hw_cfg_gpio_input(ah, ah->led_pin);
1193 }
1194
1195 ath_prepare_reset(sc, false, true);
1196
1197 if (sc->rx.frag) {
1198 dev_kfree_skb_any(sc->rx.frag);
1199 sc->rx.frag = NULL;
1200 }
1201
1202 if (!ah->curchan)
1203 ah->curchan = ath9k_cmn_get_curchannel(hw, ah);
1204
1205 ath9k_hw_reset(ah, ah->curchan, ah->caldata, false);
1206 ath9k_hw_phy_disable(ah);
1207
1208 ath9k_hw_configpcipowersave(ah, true);
1209
1210 spin_unlock_bh(&sc->sc_pcu_lock);
1211
1212 ath9k_ps_restore(sc);
1213
1214 sc->sc_flags |= SC_OP_INVALID;
1215 sc->ps_idle = prev_idle;
1216
1217 mutex_unlock(&sc->mutex);
1218
1219 ath_dbg(common, CONFIG, "Driver halt\n");
1220}
1221
1222bool ath9k_uses_beacons(int type)
1223{
1224 switch (type) {
1225 case NL80211_IFTYPE_AP:
1226 case NL80211_IFTYPE_ADHOC:
1227 case NL80211_IFTYPE_MESH_POINT:
1228 return true;
1229 default:
1230 return false;
1231 }
1232}
1233
1234static void ath9k_reclaim_beacon(struct ath_softc *sc,
1235 struct ieee80211_vif *vif)
1236{
1237 struct ath_vif *avp = (void *)vif->drv_priv;
1238
1239 ath9k_set_beaconing_status(sc, false);
1240 ath_beacon_return(sc, avp);
1241 ath9k_set_beaconing_status(sc, true);
1242 sc->sc_flags &= ~SC_OP_BEACONS;
1243}
1244
1245static void ath9k_vif_iter(void *data, u8 *mac, struct ieee80211_vif *vif)
1246{
1247 struct ath9k_vif_iter_data *iter_data = data;
1248 int i;
1249
1250 if (iter_data->hw_macaddr)
1251 for (i = 0; i < ETH_ALEN; i++)
1252 iter_data->mask[i] &=
1253 ~(iter_data->hw_macaddr[i] ^ mac[i]);
1254
1255 switch (vif->type) {
1256 case NL80211_IFTYPE_AP:
1257 iter_data->naps++;
1258 break;
1259 case NL80211_IFTYPE_STATION:
1260 iter_data->nstations++;
1261 break;
1262 case NL80211_IFTYPE_ADHOC:
1263 iter_data->nadhocs++;
1264 break;
1265 case NL80211_IFTYPE_MESH_POINT:
1266 iter_data->nmeshes++;
1267 break;
1268 case NL80211_IFTYPE_WDS:
1269 iter_data->nwds++;
1270 break;
1271 default:
1272 break;
1273 }
1274}
1275
1276/* Called with sc->mutex held. */
1277void ath9k_calculate_iter_data(struct ieee80211_hw *hw,
1278 struct ieee80211_vif *vif,
1279 struct ath9k_vif_iter_data *iter_data)
1280{
1281 struct ath_softc *sc = hw->priv;
1282 struct ath_hw *ah = sc->sc_ah;
1283 struct ath_common *common = ath9k_hw_common(ah);
1284
1285 /*
1286 * Use the hardware MAC address as reference, the hardware uses it
1287 * together with the BSSID mask when matching addresses.
1288 */
1289 memset(iter_data, 0, sizeof(*iter_data));
1290 iter_data->hw_macaddr = common->macaddr;
1291 memset(&iter_data->mask, 0xff, ETH_ALEN);
1292
1293 if (vif)
1294 ath9k_vif_iter(iter_data, vif->addr, vif);
1295
1296 /* Get list of all active MAC addresses */
1297 ieee80211_iterate_active_interfaces_atomic(sc->hw, ath9k_vif_iter,
1298 iter_data);
1299}
1300
1301/* Called with sc->mutex held. */
1302static void ath9k_calculate_summary_state(struct ieee80211_hw *hw,
1303 struct ieee80211_vif *vif)
1304{
1305 struct ath_softc *sc = hw->priv;
1306 struct ath_hw *ah = sc->sc_ah;
1307 struct ath_common *common = ath9k_hw_common(ah);
1308 struct ath9k_vif_iter_data iter_data;
1309
1310 ath9k_calculate_iter_data(hw, vif, &iter_data);
1311
1312 /* Set BSSID mask. */
1313 memcpy(common->bssidmask, iter_data.mask, ETH_ALEN);
1314 ath_hw_setbssidmask(common);
1315
1316 /* Set op-mode & TSF */
1317 if (iter_data.naps > 0) {
1318 ath9k_hw_set_tsfadjust(ah, 1);
1319 sc->sc_flags |= SC_OP_TSF_RESET;
1320 ah->opmode = NL80211_IFTYPE_AP;
1321 } else {
1322 ath9k_hw_set_tsfadjust(ah, 0);
1323 sc->sc_flags &= ~SC_OP_TSF_RESET;
1324
1325 if (iter_data.nmeshes)
1326 ah->opmode = NL80211_IFTYPE_MESH_POINT;
1327 else if (iter_data.nwds)
1328 ah->opmode = NL80211_IFTYPE_AP;
1329 else if (iter_data.nadhocs)
1330 ah->opmode = NL80211_IFTYPE_ADHOC;
1331 else
1332 ah->opmode = NL80211_IFTYPE_STATION;
1333 }
1334
1335 /*
1336 * Enable MIB interrupts when there are hardware phy counters.
1337 */
1338 if ((iter_data.nstations + iter_data.nadhocs + iter_data.nmeshes) > 0) {
1339 if (ah->config.enable_ani)
1340 ah->imask |= ATH9K_INT_MIB;
1341 ah->imask |= ATH9K_INT_TSFOOR;
1342 } else {
1343 ah->imask &= ~ATH9K_INT_MIB;
1344 ah->imask &= ~ATH9K_INT_TSFOOR;
1345 }
1346
1347 ath9k_hw_set_interrupts(ah);
1348
1349 /* Set up ANI */
1350 if (iter_data.naps > 0) {
1351 sc->sc_ah->stats.avgbrssi = ATH_RSSI_DUMMY_MARKER;
1352
1353 if (!common->disable_ani) {
1354 sc->sc_flags |= SC_OP_ANI_RUN;
1355 ath_start_ani(common);
1356 }
1357
1358 } else {
1359 sc->sc_flags &= ~SC_OP_ANI_RUN;
1360 del_timer_sync(&common->ani.timer);
1361 }
1362}
1363
1364/* Called with sc->mutex held, vif counts set up properly. */
1365static void ath9k_do_vif_add_setup(struct ieee80211_hw *hw,
1366 struct ieee80211_vif *vif)
1367{
1368 struct ath_softc *sc = hw->priv;
1369
1370 ath9k_calculate_summary_state(hw, vif);
1371
1372 if (ath9k_uses_beacons(vif->type)) {
1373 int error;
1374 /* This may fail because upper levels do not have beacons
1375 * properly configured yet. That's OK, we assume it
1376 * will be properly configured and then we will be notified
1377 * in the info_changed method and set up beacons properly
1378 * there.
1379 */
1380 ath9k_set_beaconing_status(sc, false);
1381 error = ath_beacon_alloc(sc, vif);
1382 if (!error)
1383 ath_beacon_config(sc, vif);
1384 ath9k_set_beaconing_status(sc, true);
1385 }
1386}
1387
1388
1389static int ath9k_add_interface(struct ieee80211_hw *hw,
1390 struct ieee80211_vif *vif)
1391{
1392 struct ath_softc *sc = hw->priv;
1393 struct ath_hw *ah = sc->sc_ah;
1394 struct ath_common *common = ath9k_hw_common(ah);
1395 int ret = 0;
1396
1397 ath9k_ps_wakeup(sc);
1398 mutex_lock(&sc->mutex);
1399
1400 switch (vif->type) {
1401 case NL80211_IFTYPE_STATION:
1402 case NL80211_IFTYPE_WDS:
1403 case NL80211_IFTYPE_ADHOC:
1404 case NL80211_IFTYPE_AP:
1405 case NL80211_IFTYPE_MESH_POINT:
1406 break;
1407 default:
1408 ath_err(common, "Interface type %d not yet supported\n",
1409 vif->type);
1410 ret = -EOPNOTSUPP;
1411 goto out;
1412 }
1413
1414 if (ath9k_uses_beacons(vif->type)) {
1415 if (sc->nbcnvifs >= ATH_BCBUF) {
1416 ath_err(common, "Not enough beacon buffers when adding"
1417 " new interface of type: %i\n",
1418 vif->type);
1419 ret = -ENOBUFS;
1420 goto out;
1421 }
1422 }
1423
1424 if ((ah->opmode == NL80211_IFTYPE_ADHOC) ||
1425 ((vif->type == NL80211_IFTYPE_ADHOC) &&
1426 sc->nvifs > 0)) {
1427 ath_err(common, "Cannot create ADHOC interface when other"
1428 " interfaces already exist.\n");
1429 ret = -EINVAL;
1430 goto out;
1431 }
1432
1433 ath_dbg(common, CONFIG, "Attach a VIF of type: %d\n", vif->type);
1434
1435 sc->nvifs++;
1436
1437 ath9k_do_vif_add_setup(hw, vif);
1438out:
1439 mutex_unlock(&sc->mutex);
1440 ath9k_ps_restore(sc);
1441 return ret;
1442}
1443
1444static int ath9k_change_interface(struct ieee80211_hw *hw,
1445 struct ieee80211_vif *vif,
1446 enum nl80211_iftype new_type,
1447 bool p2p)
1448{
1449 struct ath_softc *sc = hw->priv;
1450 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1451 int ret = 0;
1452
1453 ath_dbg(common, CONFIG, "Change Interface\n");
1454 mutex_lock(&sc->mutex);
1455 ath9k_ps_wakeup(sc);
1456
1457 /* See if new interface type is valid. */
1458 if ((new_type == NL80211_IFTYPE_ADHOC) &&
1459 (sc->nvifs > 1)) {
1460 ath_err(common, "When using ADHOC, it must be the only"
1461 " interface.\n");
1462 ret = -EINVAL;
1463 goto out;
1464 }
1465
1466 if (ath9k_uses_beacons(new_type) &&
1467 !ath9k_uses_beacons(vif->type)) {
1468 if (sc->nbcnvifs >= ATH_BCBUF) {
1469 ath_err(common, "No beacon slot available\n");
1470 ret = -ENOBUFS;
1471 goto out;
1472 }
1473 }
1474
1475 /* Clean up old vif stuff */
1476 if (ath9k_uses_beacons(vif->type))
1477 ath9k_reclaim_beacon(sc, vif);
1478
1479 /* Add new settings */
1480 vif->type = new_type;
1481 vif->p2p = p2p;
1482
1483 ath9k_do_vif_add_setup(hw, vif);
1484out:
1485 ath9k_ps_restore(sc);
1486 mutex_unlock(&sc->mutex);
1487 return ret;
1488}
1489
1490static void ath9k_remove_interface(struct ieee80211_hw *hw,
1491 struct ieee80211_vif *vif)
1492{
1493 struct ath_softc *sc = hw->priv;
1494 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1495
1496 ath_dbg(common, CONFIG, "Detach Interface\n");
1497
1498 ath9k_ps_wakeup(sc);
1499 mutex_lock(&sc->mutex);
1500
1501 sc->nvifs--;
1502
1503 /* Reclaim beacon resources */
1504 if (ath9k_uses_beacons(vif->type))
1505 ath9k_reclaim_beacon(sc, vif);
1506
1507 ath9k_calculate_summary_state(hw, NULL);
1508
1509 mutex_unlock(&sc->mutex);
1510 ath9k_ps_restore(sc);
1511}
1512
1513static void ath9k_enable_ps(struct ath_softc *sc)
1514{
1515 struct ath_hw *ah = sc->sc_ah;
1516
1517 sc->ps_enabled = true;
1518 if (!(ah->caps.hw_caps & ATH9K_HW_CAP_AUTOSLEEP)) {
1519 if ((ah->imask & ATH9K_INT_TIM_TIMER) == 0) {
1520 ah->imask |= ATH9K_INT_TIM_TIMER;
1521 ath9k_hw_set_interrupts(ah);
1522 }
1523 ath9k_hw_setrxabort(ah, 1);
1524 }
1525}
1526
1527static void ath9k_disable_ps(struct ath_softc *sc)
1528{
1529 struct ath_hw *ah = sc->sc_ah;
1530
1531 sc->ps_enabled = false;
1532 ath9k_hw_setpower(ah, ATH9K_PM_AWAKE);
1533 if (!(ah->caps.hw_caps & ATH9K_HW_CAP_AUTOSLEEP)) {
1534 ath9k_hw_setrxabort(ah, 0);
1535 sc->ps_flags &= ~(PS_WAIT_FOR_BEACON |
1536 PS_WAIT_FOR_CAB |
1537 PS_WAIT_FOR_PSPOLL_DATA |
1538 PS_WAIT_FOR_TX_ACK);
1539 if (ah->imask & ATH9K_INT_TIM_TIMER) {
1540 ah->imask &= ~ATH9K_INT_TIM_TIMER;
1541 ath9k_hw_set_interrupts(ah);
1542 }
1543 }
1544
1545}
1546
1547static int ath9k_config(struct ieee80211_hw *hw, u32 changed)
1548{
1549 struct ath_softc *sc = hw->priv;
1550 struct ath_hw *ah = sc->sc_ah;
1551 struct ath_common *common = ath9k_hw_common(ah);
1552 struct ieee80211_conf *conf = &hw->conf;
1553
1554 ath9k_ps_wakeup(sc);
1555 mutex_lock(&sc->mutex);
1556
1557 if (changed & IEEE80211_CONF_CHANGE_IDLE) {
1558 sc->ps_idle = !!(conf->flags & IEEE80211_CONF_IDLE);
1559 if (sc->ps_idle)
1560 ath_cancel_work(sc);
1561 }
1562
1563 /*
1564 * We just prepare to enable PS. We have to wait until our AP has
1565 * ACK'd our null data frame to disable RX otherwise we'll ignore
1566 * those ACKs and end up retransmitting the same null data frames.
1567 * IEEE80211_CONF_CHANGE_PS is only passed by mac80211 for STA mode.
1568 */
1569 if (changed & IEEE80211_CONF_CHANGE_PS) {
1570 unsigned long flags;
1571 spin_lock_irqsave(&sc->sc_pm_lock, flags);
1572 if (conf->flags & IEEE80211_CONF_PS)
1573 ath9k_enable_ps(sc);
1574 else
1575 ath9k_disable_ps(sc);
1576 spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
1577 }
1578
1579 if (changed & IEEE80211_CONF_CHANGE_MONITOR) {
1580 if (conf->flags & IEEE80211_CONF_MONITOR) {
1581 ath_dbg(common, CONFIG, "Monitor mode is enabled\n");
1582 sc->sc_ah->is_monitoring = true;
1583 } else {
1584 ath_dbg(common, CONFIG, "Monitor mode is disabled\n");
1585 sc->sc_ah->is_monitoring = false;
1586 }
1587 }
1588
1589 if (changed & IEEE80211_CONF_CHANGE_CHANNEL) {
1590 struct ieee80211_channel *curchan = hw->conf.channel;
1591 int pos = curchan->hw_value;
1592 int old_pos = -1;
1593 unsigned long flags;
1594
1595 if (ah->curchan)
1596 old_pos = ah->curchan - &ah->channels[0];
1597
1598 if (hw->conf.flags & IEEE80211_CONF_OFFCHANNEL)
1599 sc->sc_flags |= SC_OP_OFFCHANNEL;
1600 else
1601 sc->sc_flags &= ~SC_OP_OFFCHANNEL;
1602
1603 ath_dbg(common, CONFIG, "Set channel: %d MHz type: %d\n",
1604 curchan->center_freq, conf->channel_type);
1605
1606 /* update survey stats for the old channel before switching */
1607 spin_lock_irqsave(&common->cc_lock, flags);
1608 ath_update_survey_stats(sc);
1609 spin_unlock_irqrestore(&common->cc_lock, flags);
1610
1611 /*
1612 * Preserve the current channel values, before updating
1613 * the same channel
1614 */
1615 if (ah->curchan && (old_pos == pos))
1616 ath9k_hw_getnf(ah, ah->curchan);
1617
1618 ath9k_cmn_update_ichannel(&sc->sc_ah->channels[pos],
1619 curchan, conf->channel_type);
1620
1621 /*
1622 * If the operating channel changes, change the survey in-use flags
1623 * along with it.
1624 * Reset the survey data for the new channel, unless we're switching
1625 * back to the operating channel from an off-channel operation.
1626 */
1627 if (!(hw->conf.flags & IEEE80211_CONF_OFFCHANNEL) &&
1628 sc->cur_survey != &sc->survey[pos]) {
1629
1630 if (sc->cur_survey)
1631 sc->cur_survey->filled &= ~SURVEY_INFO_IN_USE;
1632
1633 sc->cur_survey = &sc->survey[pos];
1634
1635 memset(sc->cur_survey, 0, sizeof(struct survey_info));
1636 sc->cur_survey->filled |= SURVEY_INFO_IN_USE;
1637 } else if (!(sc->survey[pos].filled & SURVEY_INFO_IN_USE)) {
1638 memset(&sc->survey[pos], 0, sizeof(struct survey_info));
1639 }
1640
1641 if (ath_set_channel(sc, hw, &sc->sc_ah->channels[pos]) < 0) {
1642 ath_err(common, "Unable to set channel\n");
1643 mutex_unlock(&sc->mutex);
1644 return -EINVAL;
1645 }
1646
1647 /*
1648 * The most recent snapshot of channel->noisefloor for the old
1649 * channel is only available after the hardware reset. Copy it to
1650 * the survey stats now.
1651 */
1652 if (old_pos >= 0)
1653 ath_update_survey_nf(sc, old_pos);
1654 }
1655
1656 if (changed & IEEE80211_CONF_CHANGE_POWER) {
1657 ath_dbg(common, CONFIG, "Set power: %d\n", conf->power_level);
1658 sc->config.txpowlimit = 2 * conf->power_level;
1659 ath9k_cmn_update_txpow(ah, sc->curtxpow,
1660 sc->config.txpowlimit, &sc->curtxpow);
1661 }
1662
1663 mutex_unlock(&sc->mutex);
1664 ath9k_ps_restore(sc);
1665
1666 return 0;
1667}
1668
1669#define SUPPORTED_FILTERS \
1670 (FIF_PROMISC_IN_BSS | \
1671 FIF_ALLMULTI | \
1672 FIF_CONTROL | \
1673 FIF_PSPOLL | \
1674 FIF_OTHER_BSS | \
1675 FIF_BCN_PRBRESP_PROMISC | \
1676 FIF_PROBE_REQ | \
1677 FIF_FCSFAIL)
1678
1679/* FIXME: sc->sc_full_reset ? */
1680static void ath9k_configure_filter(struct ieee80211_hw *hw,
1681 unsigned int changed_flags,
1682 unsigned int *total_flags,
1683 u64 multicast)
1684{
1685 struct ath_softc *sc = hw->priv;
1686 u32 rfilt;
1687
1688 changed_flags &= SUPPORTED_FILTERS;
1689 *total_flags &= SUPPORTED_FILTERS;
1690
1691 sc->rx.rxfilter = *total_flags;
1692 ath9k_ps_wakeup(sc);
1693 rfilt = ath_calcrxfilter(sc);
1694 ath9k_hw_setrxfilter(sc->sc_ah, rfilt);
1695 ath9k_ps_restore(sc);
1696
1697 ath_dbg(ath9k_hw_common(sc->sc_ah), CONFIG, "Set HW RX filter: 0x%x\n",
1698 rfilt);
1699}
1700
1701static int ath9k_sta_add(struct ieee80211_hw *hw,
1702 struct ieee80211_vif *vif,
1703 struct ieee80211_sta *sta)
1704{
1705 struct ath_softc *sc = hw->priv;
1706 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1707 struct ath_node *an = (struct ath_node *) sta->drv_priv;
1708 struct ieee80211_key_conf ps_key = { };
1709
1710 ath_node_attach(sc, sta, vif);
1711
1712 if (vif->type != NL80211_IFTYPE_AP &&
1713 vif->type != NL80211_IFTYPE_AP_VLAN)
1714 return 0;
1715
1716 an->ps_key = ath_key_config(common, vif, sta, &ps_key);
1717
1718 return 0;
1719}
1720
1721static void ath9k_del_ps_key(struct ath_softc *sc,
1722 struct ieee80211_vif *vif,
1723 struct ieee80211_sta *sta)
1724{
1725 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1726 struct ath_node *an = (struct ath_node *) sta->drv_priv;
1727 struct ieee80211_key_conf ps_key = { .hw_key_idx = an->ps_key };
1728
1729 if (!an->ps_key)
1730 return;
1731
1732 ath_key_delete(common, &ps_key);
1733}
1734
1735static int ath9k_sta_remove(struct ieee80211_hw *hw,
1736 struct ieee80211_vif *vif,
1737 struct ieee80211_sta *sta)
1738{
1739 struct ath_softc *sc = hw->priv;
1740
1741 ath9k_del_ps_key(sc, vif, sta);
1742 ath_node_detach(sc, sta);
1743
1744 return 0;
1745}
1746
1747static void ath9k_sta_notify(struct ieee80211_hw *hw,
1748 struct ieee80211_vif *vif,
1749 enum sta_notify_cmd cmd,
1750 struct ieee80211_sta *sta)
1751{
1752 struct ath_softc *sc = hw->priv;
1753 struct ath_node *an = (struct ath_node *) sta->drv_priv;
1754
1755 if (!sta->ht_cap.ht_supported)
1756 return;
1757
1758 switch (cmd) {
1759 case STA_NOTIFY_SLEEP:
1760 an->sleeping = true;
1761 ath_tx_aggr_sleep(sta, sc, an);
1762 break;
1763 case STA_NOTIFY_AWAKE:
1764 an->sleeping = false;
1765 ath_tx_aggr_wakeup(sc, an);
1766 break;
1767 }
1768}
1769
1770static int ath9k_conf_tx(struct ieee80211_hw *hw,
1771 struct ieee80211_vif *vif, u16 queue,
1772 const struct ieee80211_tx_queue_params *params)
1773{
1774 struct ath_softc *sc = hw->priv;
1775 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1776 struct ath_txq *txq;
1777 struct ath9k_tx_queue_info qi;
1778 int ret = 0;
1779
1780 if (queue >= WME_NUM_AC)
1781 return 0;
1782
1783 txq = sc->tx.txq_map[queue];
1784
1785 ath9k_ps_wakeup(sc);
1786 mutex_lock(&sc->mutex);
1787
1788 memset(&qi, 0, sizeof(struct ath9k_tx_queue_info));
1789
1790 qi.tqi_aifs = params->aifs;
1791 qi.tqi_cwmin = params->cw_min;
1792 qi.tqi_cwmax = params->cw_max;
1793 qi.tqi_burstTime = params->txop;
1794
1795 ath_dbg(common, CONFIG,
1796 "Configure tx [queue/halq] [%d/%d], aifs: %d, cw_min: %d, cw_max: %d, txop: %d\n",
1797 queue, txq->axq_qnum, params->aifs, params->cw_min,
1798 params->cw_max, params->txop);
1799
1800 ret = ath_txq_update(sc, txq->axq_qnum, &qi);
1801 if (ret)
1802 ath_err(common, "TXQ Update failed\n");
1803
1804 if (sc->sc_ah->opmode == NL80211_IFTYPE_ADHOC)
1805 if (queue == WME_AC_BE && !ret)
1806 ath_beaconq_config(sc);
1807
1808 mutex_unlock(&sc->mutex);
1809 ath9k_ps_restore(sc);
1810
1811 return ret;
1812}
1813
1814static int ath9k_set_key(struct ieee80211_hw *hw,
1815 enum set_key_cmd cmd,
1816 struct ieee80211_vif *vif,
1817 struct ieee80211_sta *sta,
1818 struct ieee80211_key_conf *key)
1819{
1820 struct ath_softc *sc = hw->priv;
1821 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1822 int ret = 0;
1823
1824 if (ath9k_modparam_nohwcrypt)
1825 return -ENOSPC;
1826
1827 if ((vif->type == NL80211_IFTYPE_ADHOC ||
1828 vif->type == NL80211_IFTYPE_MESH_POINT) &&
1829 (key->cipher == WLAN_CIPHER_SUITE_TKIP ||
1830 key->cipher == WLAN_CIPHER_SUITE_CCMP) &&
1831 !(key->flags & IEEE80211_KEY_FLAG_PAIRWISE)) {
1832 /*
1833 * For now, disable hw crypto for the RSN IBSS group keys. This
1834 * could be optimized in the future to use a modified key cache
1835 * design to support per-STA RX GTK, but until that gets
1836 * implemented, use of software crypto for group addressed
1837 * frames is a acceptable to allow RSN IBSS to be used.
1838 */
1839 return -EOPNOTSUPP;
1840 }
1841
1842 mutex_lock(&sc->mutex);
1843 ath9k_ps_wakeup(sc);
1844 ath_dbg(common, CONFIG, "Set HW Key\n");
1845
1846 switch (cmd) {
1847 case SET_KEY:
1848 if (sta)
1849 ath9k_del_ps_key(sc, vif, sta);
1850
1851 ret = ath_key_config(common, vif, sta, key);
1852 if (ret >= 0) {
1853 key->hw_key_idx = ret;
1854 /* push IV and Michael MIC generation to stack */
1855 key->flags |= IEEE80211_KEY_FLAG_GENERATE_IV;
1856 if (key->cipher == WLAN_CIPHER_SUITE_TKIP)
1857 key->flags |= IEEE80211_KEY_FLAG_GENERATE_MMIC;
1858 if (sc->sc_ah->sw_mgmt_crypto &&
1859 key->cipher == WLAN_CIPHER_SUITE_CCMP)
1860 key->flags |= IEEE80211_KEY_FLAG_SW_MGMT;
1861 ret = 0;
1862 }
1863 break;
1864 case DISABLE_KEY:
1865 ath_key_delete(common, key);
1866 break;
1867 default:
1868 ret = -EINVAL;
1869 }
1870
1871 ath9k_ps_restore(sc);
1872 mutex_unlock(&sc->mutex);
1873
1874 return ret;
1875}
1876static void ath9k_bss_iter(void *data, u8 *mac, struct ieee80211_vif *vif)
1877{
1878 struct ath_softc *sc = data;
1879 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1880 struct ieee80211_bss_conf *bss_conf = &vif->bss_conf;
1881 struct ath_vif *avp = (void *)vif->drv_priv;
1882
1883 /*
1884 * Skip iteration if primary station vif's bss info
1885 * was not changed
1886 */
1887 if (sc->sc_flags & SC_OP_PRIM_STA_VIF)
1888 return;
1889
1890 if (bss_conf->assoc) {
1891 sc->sc_flags |= SC_OP_PRIM_STA_VIF;
1892 avp->primary_sta_vif = true;
1893 memcpy(common->curbssid, bss_conf->bssid, ETH_ALEN);
1894 common->curaid = bss_conf->aid;
1895 ath9k_hw_write_associd(sc->sc_ah);
1896 ath_dbg(common, CONFIG, "Bss Info ASSOC %d, bssid: %pM\n",
1897 bss_conf->aid, common->curbssid);
1898 ath_beacon_config(sc, vif);
1899 /*
1900 * Request a re-configuration of Beacon related timers
1901 * on the receipt of the first Beacon frame (i.e.,
1902 * after time sync with the AP).
1903 */
1904 sc->ps_flags |= PS_BEACON_SYNC | PS_WAIT_FOR_BEACON;
1905 /* Reset rssi stats */
1906 sc->last_rssi = ATH_RSSI_DUMMY_MARKER;
1907 sc->sc_ah->stats.avgbrssi = ATH_RSSI_DUMMY_MARKER;
1908
1909 if (!common->disable_ani) {
1910 sc->sc_flags |= SC_OP_ANI_RUN;
1911 ath_start_ani(common);
1912 }
1913
1914 }
1915}
1916
1917static void ath9k_config_bss(struct ath_softc *sc, struct ieee80211_vif *vif)
1918{
1919 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1920 struct ieee80211_bss_conf *bss_conf = &vif->bss_conf;
1921 struct ath_vif *avp = (void *)vif->drv_priv;
1922
1923 if (sc->sc_ah->opmode != NL80211_IFTYPE_STATION)
1924 return;
1925
1926 /* Reconfigure bss info */
1927 if (avp->primary_sta_vif && !bss_conf->assoc) {
1928 ath_dbg(common, CONFIG, "Bss Info DISASSOC %d, bssid %pM\n",
1929 common->curaid, common->curbssid);
1930 sc->sc_flags &= ~(SC_OP_PRIM_STA_VIF | SC_OP_BEACONS);
1931 avp->primary_sta_vif = false;
1932 memset(common->curbssid, 0, ETH_ALEN);
1933 common->curaid = 0;
1934 }
1935
1936 ieee80211_iterate_active_interfaces_atomic(
1937 sc->hw, ath9k_bss_iter, sc);
1938
1939 /*
1940 * None of station vifs are associated.
1941 * Clear bssid & aid
1942 */
1943 if (!(sc->sc_flags & SC_OP_PRIM_STA_VIF)) {
1944 ath9k_hw_write_associd(sc->sc_ah);
1945 /* Stop ANI */
1946 sc->sc_flags &= ~SC_OP_ANI_RUN;
1947 del_timer_sync(&common->ani.timer);
1948 memset(&sc->caldata, 0, sizeof(sc->caldata));
1949 }
1950}
1951
1952static void ath9k_bss_info_changed(struct ieee80211_hw *hw,
1953 struct ieee80211_vif *vif,
1954 struct ieee80211_bss_conf *bss_conf,
1955 u32 changed)
1956{
1957 struct ath_softc *sc = hw->priv;
1958 struct ath_hw *ah = sc->sc_ah;
1959 struct ath_common *common = ath9k_hw_common(ah);
1960 struct ath_vif *avp = (void *)vif->drv_priv;
1961 int slottime;
1962 int error;
1963
1964 ath9k_ps_wakeup(sc);
1965 mutex_lock(&sc->mutex);
1966
1967 if (changed & BSS_CHANGED_ASSOC) {
1968 ath9k_config_bss(sc, vif);
1969
1970 ath_dbg(common, CONFIG, "BSSID: %pM aid: 0x%x\n",
1971 common->curbssid, common->curaid);
1972 }
1973
1974 if (changed & BSS_CHANGED_IBSS) {
1975 /* There can be only one vif available */
1976 memcpy(common->curbssid, bss_conf->bssid, ETH_ALEN);
1977 common->curaid = bss_conf->aid;
1978 ath9k_hw_write_associd(sc->sc_ah);
1979
1980 if (bss_conf->ibss_joined) {
1981 sc->sc_ah->stats.avgbrssi = ATH_RSSI_DUMMY_MARKER;
1982
1983 if (!common->disable_ani) {
1984 sc->sc_flags |= SC_OP_ANI_RUN;
1985 ath_start_ani(common);
1986 }
1987
1988 } else {
1989 sc->sc_flags &= ~SC_OP_ANI_RUN;
1990 del_timer_sync(&common->ani.timer);
1991 }
1992 }
1993
1994 /* Enable transmission of beacons (AP, IBSS, MESH) */
1995 if ((changed & BSS_CHANGED_BEACON) ||
1996 ((changed & BSS_CHANGED_BEACON_ENABLED) && bss_conf->enable_beacon)) {
1997 ath9k_set_beaconing_status(sc, false);
1998 error = ath_beacon_alloc(sc, vif);
1999 if (!error)
2000 ath_beacon_config(sc, vif);
2001 ath9k_set_beaconing_status(sc, true);
2002 }
2003
2004 if (changed & BSS_CHANGED_ERP_SLOT) {
2005 if (bss_conf->use_short_slot)
2006 slottime = 9;
2007 else
2008 slottime = 20;
2009 if (vif->type == NL80211_IFTYPE_AP) {
2010 /*
2011 * Defer update, so that connected stations can adjust
2012 * their settings at the same time.
2013 * See beacon.c for more details
2014 */
2015 sc->beacon.slottime = slottime;
2016 sc->beacon.updateslot = UPDATE;
2017 } else {
2018 ah->slottime = slottime;
2019 ath9k_hw_init_global_settings(ah);
2020 }
2021 }
2022
2023 /* Disable transmission of beacons */
2024 if ((changed & BSS_CHANGED_BEACON_ENABLED) &&
2025 !bss_conf->enable_beacon) {
2026 ath9k_set_beaconing_status(sc, false);
2027 avp->is_bslot_active = false;
2028 ath9k_set_beaconing_status(sc, true);
2029 }
2030
2031 if (changed & BSS_CHANGED_BEACON_INT) {
2032 /*
2033 * In case of AP mode, the HW TSF has to be reset
2034 * when the beacon interval changes.
2035 */
2036 if (vif->type == NL80211_IFTYPE_AP) {
2037 sc->sc_flags |= SC_OP_TSF_RESET;
2038 ath9k_set_beaconing_status(sc, false);
2039 error = ath_beacon_alloc(sc, vif);
2040 if (!error)
2041 ath_beacon_config(sc, vif);
2042 ath9k_set_beaconing_status(sc, true);
2043 } else
2044 ath_beacon_config(sc, vif);
2045 }
2046
2047 mutex_unlock(&sc->mutex);
2048 ath9k_ps_restore(sc);
2049}
2050
2051static u64 ath9k_get_tsf(struct ieee80211_hw *hw, struct ieee80211_vif *vif)
2052{
2053 struct ath_softc *sc = hw->priv;
2054 u64 tsf;
2055
2056 mutex_lock(&sc->mutex);
2057 ath9k_ps_wakeup(sc);
2058 tsf = ath9k_hw_gettsf64(sc->sc_ah);
2059 ath9k_ps_restore(sc);
2060 mutex_unlock(&sc->mutex);
2061
2062 return tsf;
2063}
2064
2065static void ath9k_set_tsf(struct ieee80211_hw *hw,
2066 struct ieee80211_vif *vif,
2067 u64 tsf)
2068{
2069 struct ath_softc *sc = hw->priv;
2070
2071 mutex_lock(&sc->mutex);
2072 ath9k_ps_wakeup(sc);
2073 ath9k_hw_settsf64(sc->sc_ah, tsf);
2074 ath9k_ps_restore(sc);
2075 mutex_unlock(&sc->mutex);
2076}
2077
2078static void ath9k_reset_tsf(struct ieee80211_hw *hw, struct ieee80211_vif *vif)
2079{
2080 struct ath_softc *sc = hw->priv;
2081
2082 mutex_lock(&sc->mutex);
2083
2084 ath9k_ps_wakeup(sc);
2085 ath9k_hw_reset_tsf(sc->sc_ah);
2086 ath9k_ps_restore(sc);
2087
2088 mutex_unlock(&sc->mutex);
2089}
2090
2091static int ath9k_ampdu_action(struct ieee80211_hw *hw,
2092 struct ieee80211_vif *vif,
2093 enum ieee80211_ampdu_mlme_action action,
2094 struct ieee80211_sta *sta,
2095 u16 tid, u16 *ssn, u8 buf_size)
2096{
2097 struct ath_softc *sc = hw->priv;
2098 int ret = 0;
2099
2100 local_bh_disable();
2101
2102 switch (action) {
2103 case IEEE80211_AMPDU_RX_START:
2104 break;
2105 case IEEE80211_AMPDU_RX_STOP:
2106 break;
2107 case IEEE80211_AMPDU_TX_START:
2108 ath9k_ps_wakeup(sc);
2109 ret = ath_tx_aggr_start(sc, sta, tid, ssn);
2110 if (!ret)
2111 ieee80211_start_tx_ba_cb_irqsafe(vif, sta->addr, tid);
2112 ath9k_ps_restore(sc);
2113 break;
2114 case IEEE80211_AMPDU_TX_STOP:
2115 ath9k_ps_wakeup(sc);
2116 ath_tx_aggr_stop(sc, sta, tid);
2117 ieee80211_stop_tx_ba_cb_irqsafe(vif, sta->addr, tid);
2118 ath9k_ps_restore(sc);
2119 break;
2120 case IEEE80211_AMPDU_TX_OPERATIONAL:
2121 ath9k_ps_wakeup(sc);
2122 ath_tx_aggr_resume(sc, sta, tid);
2123 ath9k_ps_restore(sc);
2124 break;
2125 default:
2126 ath_err(ath9k_hw_common(sc->sc_ah), "Unknown AMPDU action\n");
2127 }
2128
2129 local_bh_enable();
2130
2131 return ret;
2132}
2133
2134static int ath9k_get_survey(struct ieee80211_hw *hw, int idx,
2135 struct survey_info *survey)
2136{
2137 struct ath_softc *sc = hw->priv;
2138 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
2139 struct ieee80211_supported_band *sband;
2140 struct ieee80211_channel *chan;
2141 unsigned long flags;
2142 int pos;
2143
2144 spin_lock_irqsave(&common->cc_lock, flags);
2145 if (idx == 0)
2146 ath_update_survey_stats(sc);
2147
2148 sband = hw->wiphy->bands[IEEE80211_BAND_2GHZ];
2149 if (sband && idx >= sband->n_channels) {
2150 idx -= sband->n_channels;
2151 sband = NULL;
2152 }
2153
2154 if (!sband)
2155 sband = hw->wiphy->bands[IEEE80211_BAND_5GHZ];
2156
2157 if (!sband || idx >= sband->n_channels) {
2158 spin_unlock_irqrestore(&common->cc_lock, flags);
2159 return -ENOENT;
2160 }
2161
2162 chan = &sband->channels[idx];
2163 pos = chan->hw_value;
2164 memcpy(survey, &sc->survey[pos], sizeof(*survey));
2165 survey->channel = chan;
2166 spin_unlock_irqrestore(&common->cc_lock, flags);
2167
2168 return 0;
2169}
2170
2171static void ath9k_set_coverage_class(struct ieee80211_hw *hw, u8 coverage_class)
2172{
2173 struct ath_softc *sc = hw->priv;
2174 struct ath_hw *ah = sc->sc_ah;
2175
2176 mutex_lock(&sc->mutex);
2177 ah->coverage_class = coverage_class;
2178
2179 ath9k_ps_wakeup(sc);
2180 ath9k_hw_init_global_settings(ah);
2181 ath9k_ps_restore(sc);
2182
2183 mutex_unlock(&sc->mutex);
2184}
2185
2186static void ath9k_flush(struct ieee80211_hw *hw, bool drop)
2187{
2188 struct ath_softc *sc = hw->priv;
2189 struct ath_hw *ah = sc->sc_ah;
2190 struct ath_common *common = ath9k_hw_common(ah);
2191 int timeout = 200; /* ms */
2192 int i, j;
2193 bool drain_txq;
2194
2195 mutex_lock(&sc->mutex);
2196 cancel_delayed_work_sync(&sc->tx_complete_work);
2197
2198 if (ah->ah_flags & AH_UNPLUGGED) {
2199 ath_dbg(common, ANY, "Device has been unplugged!\n");
2200 mutex_unlock(&sc->mutex);
2201 return;
2202 }
2203
2204 if (sc->sc_flags & SC_OP_INVALID) {
2205 ath_dbg(common, ANY, "Device not present\n");
2206 mutex_unlock(&sc->mutex);
2207 return;
2208 }
2209
2210 for (j = 0; j < timeout; j++) {
2211 bool npend = false;
2212
2213 if (j)
2214 usleep_range(1000, 2000);
2215
2216 for (i = 0; i < ATH9K_NUM_TX_QUEUES; i++) {
2217 if (!ATH_TXQ_SETUP(sc, i))
2218 continue;
2219
2220 npend = ath9k_has_pending_frames(sc, &sc->tx.txq[i]);
2221
2222 if (npend)
2223 break;
2224 }
2225
2226 if (!npend)
2227 break;
2228 }
2229
2230 if (drop) {
2231 ath9k_ps_wakeup(sc);
2232 spin_lock_bh(&sc->sc_pcu_lock);
2233 drain_txq = ath_drain_all_txq(sc, false);
2234 spin_unlock_bh(&sc->sc_pcu_lock);
2235
2236 if (!drain_txq)
2237 ath_reset(sc, false);
2238
2239 ath9k_ps_restore(sc);
2240 ieee80211_wake_queues(hw);
2241 }
2242
2243 ieee80211_queue_delayed_work(hw, &sc->tx_complete_work, 0);
2244 mutex_unlock(&sc->mutex);
2245}
2246
2247static bool ath9k_tx_frames_pending(struct ieee80211_hw *hw)
2248{
2249 struct ath_softc *sc = hw->priv;
2250 int i;
2251
2252 for (i = 0; i < ATH9K_NUM_TX_QUEUES; i++) {
2253 if (!ATH_TXQ_SETUP(sc, i))
2254 continue;
2255
2256 if (ath9k_has_pending_frames(sc, &sc->tx.txq[i]))
2257 return true;
2258 }
2259 return false;
2260}
2261
2262static int ath9k_tx_last_beacon(struct ieee80211_hw *hw)
2263{
2264 struct ath_softc *sc = hw->priv;
2265 struct ath_hw *ah = sc->sc_ah;
2266 struct ieee80211_vif *vif;
2267 struct ath_vif *avp;
2268 struct ath_buf *bf;
2269 struct ath_tx_status ts;
2270 bool edma = !!(ah->caps.hw_caps & ATH9K_HW_CAP_EDMA);
2271 int status;
2272
2273 vif = sc->beacon.bslot[0];
2274 if (!vif)
2275 return 0;
2276
2277 avp = (void *)vif->drv_priv;
2278 if (!avp->is_bslot_active)
2279 return 0;
2280
2281 if (!sc->beacon.tx_processed && !edma) {
2282 tasklet_disable(&sc->bcon_tasklet);
2283
2284 bf = avp->av_bcbuf;
2285 if (!bf || !bf->bf_mpdu)
2286 goto skip;
2287
2288 status = ath9k_hw_txprocdesc(ah, bf->bf_desc, &ts);
2289 if (status == -EINPROGRESS)
2290 goto skip;
2291
2292 sc->beacon.tx_processed = true;
2293 sc->beacon.tx_last = !(ts.ts_status & ATH9K_TXERR_MASK);
2294
2295skip:
2296 tasklet_enable(&sc->bcon_tasklet);
2297 }
2298
2299 return sc->beacon.tx_last;
2300}
2301
2302static int ath9k_get_stats(struct ieee80211_hw *hw,
2303 struct ieee80211_low_level_stats *stats)
2304{
2305 struct ath_softc *sc = hw->priv;
2306 struct ath_hw *ah = sc->sc_ah;
2307 struct ath9k_mib_stats *mib_stats = &ah->ah_mibStats;
2308
2309 stats->dot11ACKFailureCount = mib_stats->ackrcv_bad;
2310 stats->dot11RTSFailureCount = mib_stats->rts_bad;
2311 stats->dot11FCSErrorCount = mib_stats->fcs_bad;
2312 stats->dot11RTSSuccessCount = mib_stats->rts_good;
2313 return 0;
2314}
2315
2316static u32 fill_chainmask(u32 cap, u32 new)
2317{
2318 u32 filled = 0;
2319 int i;
2320
2321 for (i = 0; cap && new; i++, cap >>= 1) {
2322 if (!(cap & BIT(0)))
2323 continue;
2324
2325 if (new & BIT(0))
2326 filled |= BIT(i);
2327
2328 new >>= 1;
2329 }
2330
2331 return filled;
2332}
2333
2334static int ath9k_set_antenna(struct ieee80211_hw *hw, u32 tx_ant, u32 rx_ant)
2335{
2336 struct ath_softc *sc = hw->priv;
2337 struct ath_hw *ah = sc->sc_ah;
2338
2339 if (!rx_ant || !tx_ant)
2340 return -EINVAL;
2341
2342 sc->ant_rx = rx_ant;
2343 sc->ant_tx = tx_ant;
2344
2345 if (ah->caps.rx_chainmask == 1)
2346 return 0;
2347
2348 /* AR9100 runs into calibration issues if not all rx chains are enabled */
2349 if (AR_SREV_9100(ah))
2350 ah->rxchainmask = 0x7;
2351 else
2352 ah->rxchainmask = fill_chainmask(ah->caps.rx_chainmask, rx_ant);
2353
2354 ah->txchainmask = fill_chainmask(ah->caps.tx_chainmask, tx_ant);
2355 ath9k_reload_chainmask_settings(sc);
2356
2357 return 0;
2358}
2359
2360static int ath9k_get_antenna(struct ieee80211_hw *hw, u32 *tx_ant, u32 *rx_ant)
2361{
2362 struct ath_softc *sc = hw->priv;
2363
2364 *tx_ant = sc->ant_tx;
2365 *rx_ant = sc->ant_rx;
2366 return 0;
2367}
2368
2369struct ieee80211_ops ath9k_ops = {
2370 .tx = ath9k_tx,
2371 .start = ath9k_start,
2372 .stop = ath9k_stop,
2373 .add_interface = ath9k_add_interface,
2374 .change_interface = ath9k_change_interface,
2375 .remove_interface = ath9k_remove_interface,
2376 .config = ath9k_config,
2377 .configure_filter = ath9k_configure_filter,
2378 .sta_add = ath9k_sta_add,
2379 .sta_remove = ath9k_sta_remove,
2380 .sta_notify = ath9k_sta_notify,
2381 .conf_tx = ath9k_conf_tx,
2382 .bss_info_changed = ath9k_bss_info_changed,
2383 .set_key = ath9k_set_key,
2384 .get_tsf = ath9k_get_tsf,
2385 .set_tsf = ath9k_set_tsf,
2386 .reset_tsf = ath9k_reset_tsf,
2387 .ampdu_action = ath9k_ampdu_action,
2388 .get_survey = ath9k_get_survey,
2389 .rfkill_poll = ath9k_rfkill_poll_state,
2390 .set_coverage_class = ath9k_set_coverage_class,
2391 .flush = ath9k_flush,
2392 .tx_frames_pending = ath9k_tx_frames_pending,
2393 .tx_last_beacon = ath9k_tx_last_beacon,
2394 .get_stats = ath9k_get_stats,
2395 .set_antenna = ath9k_set_antenna,
2396 .get_antenna = ath9k_get_antenna,
2397};
Linux kernel - Deliverables
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