| 1 | /* |
| 2 | * Real Time Clock interface for StrongARM SA1x00 and XScale PXA2xx |
| 3 | * |
| 4 | * Copyright (c) 2000 Nils Faerber |
| 5 | * |
| 6 | * Based on rtc.c by Paul Gortmaker |
| 7 | * |
| 8 | * Original Driver by Nils Faerber <nils@kernelconcepts.de> |
| 9 | * |
| 10 | * Modifications from: |
| 11 | * CIH <cih@coventive.com> |
| 12 | * Nicolas Pitre <nico@cam.org> |
| 13 | * Andrew Christian <andrew.christian@hp.com> |
| 14 | * |
| 15 | * Converted to the RTC subsystem and Driver Model |
| 16 | * by Richard Purdie <rpurdie@rpsys.net> |
| 17 | * |
| 18 | * This program is free software; you can redistribute it and/or |
| 19 | * modify it under the terms of the GNU General Public License |
| 20 | * as published by the Free Software Foundation; either version |
| 21 | * 2 of the License, or (at your option) any later version. |
| 22 | */ |
| 23 | |
| 24 | #include <linux/platform_device.h> |
| 25 | #include <linux/module.h> |
| 26 | #include <linux/rtc.h> |
| 27 | #include <linux/init.h> |
| 28 | #include <linux/fs.h> |
| 29 | #include <linux/interrupt.h> |
| 30 | #include <linux/string.h> |
| 31 | #include <linux/pm.h> |
| 32 | #include <linux/bitops.h> |
| 33 | |
| 34 | #include <mach/hardware.h> |
| 35 | #include <asm/irq.h> |
| 36 | |
| 37 | #ifdef CONFIG_ARCH_PXA |
| 38 | #include <mach/pxa-regs.h> |
| 39 | #endif |
| 40 | |
| 41 | #define TIMER_FREQ CLOCK_TICK_RATE |
| 42 | #define RTC_DEF_DIVIDER 32768 - 1 |
| 43 | #define RTC_DEF_TRIM 0 |
| 44 | |
| 45 | static unsigned long rtc_freq = 1024; |
| 46 | static struct rtc_time rtc_alarm; |
| 47 | static DEFINE_SPINLOCK(sa1100_rtc_lock); |
| 48 | |
| 49 | static inline int rtc_periodic_alarm(struct rtc_time *tm) |
| 50 | { |
| 51 | return (tm->tm_year == -1) || |
| 52 | ((unsigned)tm->tm_mon >= 12) || |
| 53 | ((unsigned)(tm->tm_mday - 1) >= 31) || |
| 54 | ((unsigned)tm->tm_hour > 23) || |
| 55 | ((unsigned)tm->tm_min > 59) || |
| 56 | ((unsigned)tm->tm_sec > 59); |
| 57 | } |
| 58 | |
| 59 | /* |
| 60 | * Calculate the next alarm time given the requested alarm time mask |
| 61 | * and the current time. |
| 62 | */ |
| 63 | static void rtc_next_alarm_time(struct rtc_time *next, struct rtc_time *now, struct rtc_time *alrm) |
| 64 | { |
| 65 | unsigned long next_time; |
| 66 | unsigned long now_time; |
| 67 | |
| 68 | next->tm_year = now->tm_year; |
| 69 | next->tm_mon = now->tm_mon; |
| 70 | next->tm_mday = now->tm_mday; |
| 71 | next->tm_hour = alrm->tm_hour; |
| 72 | next->tm_min = alrm->tm_min; |
| 73 | next->tm_sec = alrm->tm_sec; |
| 74 | |
| 75 | rtc_tm_to_time(now, &now_time); |
| 76 | rtc_tm_to_time(next, &next_time); |
| 77 | |
| 78 | if (next_time < now_time) { |
| 79 | /* Advance one day */ |
| 80 | next_time += 60 * 60 * 24; |
| 81 | rtc_time_to_tm(next_time, next); |
| 82 | } |
| 83 | } |
| 84 | |
| 85 | static int rtc_update_alarm(struct rtc_time *alrm) |
| 86 | { |
| 87 | struct rtc_time alarm_tm, now_tm; |
| 88 | unsigned long now, time; |
| 89 | int ret; |
| 90 | |
| 91 | do { |
| 92 | now = RCNR; |
| 93 | rtc_time_to_tm(now, &now_tm); |
| 94 | rtc_next_alarm_time(&alarm_tm, &now_tm, alrm); |
| 95 | ret = rtc_tm_to_time(&alarm_tm, &time); |
| 96 | if (ret != 0) |
| 97 | break; |
| 98 | |
| 99 | RTSR = RTSR & (RTSR_HZE|RTSR_ALE|RTSR_AL); |
| 100 | RTAR = time; |
| 101 | } while (now != RCNR); |
| 102 | |
| 103 | return ret; |
| 104 | } |
| 105 | |
| 106 | static irqreturn_t sa1100_rtc_interrupt(int irq, void *dev_id) |
| 107 | { |
| 108 | struct platform_device *pdev = to_platform_device(dev_id); |
| 109 | struct rtc_device *rtc = platform_get_drvdata(pdev); |
| 110 | unsigned int rtsr; |
| 111 | unsigned long events = 0; |
| 112 | |
| 113 | spin_lock(&sa1100_rtc_lock); |
| 114 | |
| 115 | rtsr = RTSR; |
| 116 | /* clear interrupt sources */ |
| 117 | RTSR = 0; |
| 118 | RTSR = (RTSR_AL | RTSR_HZ) & (rtsr >> 2); |
| 119 | |
| 120 | /* clear alarm interrupt if it has occurred */ |
| 121 | if (rtsr & RTSR_AL) |
| 122 | rtsr &= ~RTSR_ALE; |
| 123 | RTSR = rtsr & (RTSR_ALE | RTSR_HZE); |
| 124 | |
| 125 | /* update irq data & counter */ |
| 126 | if (rtsr & RTSR_AL) |
| 127 | events |= RTC_AF | RTC_IRQF; |
| 128 | if (rtsr & RTSR_HZ) |
| 129 | events |= RTC_UF | RTC_IRQF; |
| 130 | |
| 131 | rtc_update_irq(rtc, 1, events); |
| 132 | |
| 133 | if (rtsr & RTSR_AL && rtc_periodic_alarm(&rtc_alarm)) |
| 134 | rtc_update_alarm(&rtc_alarm); |
| 135 | |
| 136 | spin_unlock(&sa1100_rtc_lock); |
| 137 | |
| 138 | return IRQ_HANDLED; |
| 139 | } |
| 140 | |
| 141 | static int rtc_timer1_count; |
| 142 | |
| 143 | static irqreturn_t timer1_interrupt(int irq, void *dev_id) |
| 144 | { |
| 145 | struct platform_device *pdev = to_platform_device(dev_id); |
| 146 | struct rtc_device *rtc = platform_get_drvdata(pdev); |
| 147 | |
| 148 | /* |
| 149 | * If we match for the first time, rtc_timer1_count will be 1. |
| 150 | * Otherwise, we wrapped around (very unlikely but |
| 151 | * still possible) so compute the amount of missed periods. |
| 152 | * The match reg is updated only when the data is actually retrieved |
| 153 | * to avoid unnecessary interrupts. |
| 154 | */ |
| 155 | OSSR = OSSR_M1; /* clear match on timer1 */ |
| 156 | |
| 157 | rtc_update_irq(rtc, rtc_timer1_count, RTC_PF | RTC_IRQF); |
| 158 | |
| 159 | if (rtc_timer1_count == 1) |
| 160 | rtc_timer1_count = (rtc_freq * ((1<<30)/(TIMER_FREQ>>2))); |
| 161 | |
| 162 | return IRQ_HANDLED; |
| 163 | } |
| 164 | |
| 165 | static int sa1100_rtc_read_callback(struct device *dev, int data) |
| 166 | { |
| 167 | if (data & RTC_PF) { |
| 168 | /* interpolate missed periods and set match for the next */ |
| 169 | unsigned long period = TIMER_FREQ/rtc_freq; |
| 170 | unsigned long oscr = OSCR; |
| 171 | unsigned long osmr1 = OSMR1; |
| 172 | unsigned long missed = (oscr - osmr1)/period; |
| 173 | data += missed << 8; |
| 174 | OSSR = OSSR_M1; /* clear match on timer 1 */ |
| 175 | OSMR1 = osmr1 + (missed + 1)*period; |
| 176 | /* Ensure we didn't miss another match in the mean time. |
| 177 | * Here we compare (match - OSCR) 8 instead of 0 -- |
| 178 | * see comment in pxa_timer_interrupt() for explanation. |
| 179 | */ |
| 180 | while( (signed long)((osmr1 = OSMR1) - OSCR) <= 8 ) { |
| 181 | data += 0x100; |
| 182 | OSSR = OSSR_M1; /* clear match on timer 1 */ |
| 183 | OSMR1 = osmr1 + period; |
| 184 | } |
| 185 | } |
| 186 | return data; |
| 187 | } |
| 188 | |
| 189 | static int sa1100_rtc_open(struct device *dev) |
| 190 | { |
| 191 | int ret; |
| 192 | |
| 193 | ret = request_irq(IRQ_RTC1Hz, sa1100_rtc_interrupt, IRQF_DISABLED, |
| 194 | "rtc 1Hz", dev); |
| 195 | if (ret) { |
| 196 | dev_err(dev, "IRQ %d already in use.\n", IRQ_RTC1Hz); |
| 197 | goto fail_ui; |
| 198 | } |
| 199 | ret = request_irq(IRQ_RTCAlrm, sa1100_rtc_interrupt, IRQF_DISABLED, |
| 200 | "rtc Alrm", dev); |
| 201 | if (ret) { |
| 202 | dev_err(dev, "IRQ %d already in use.\n", IRQ_RTCAlrm); |
| 203 | goto fail_ai; |
| 204 | } |
| 205 | ret = request_irq(IRQ_OST1, timer1_interrupt, IRQF_DISABLED, |
| 206 | "rtc timer", dev); |
| 207 | if (ret) { |
| 208 | dev_err(dev, "IRQ %d already in use.\n", IRQ_OST1); |
| 209 | goto fail_pi; |
| 210 | } |
| 211 | return 0; |
| 212 | |
| 213 | fail_pi: |
| 214 | free_irq(IRQ_RTCAlrm, dev); |
| 215 | fail_ai: |
| 216 | free_irq(IRQ_RTC1Hz, dev); |
| 217 | fail_ui: |
| 218 | return ret; |
| 219 | } |
| 220 | |
| 221 | static void sa1100_rtc_release(struct device *dev) |
| 222 | { |
| 223 | spin_lock_irq(&sa1100_rtc_lock); |
| 224 | RTSR = 0; |
| 225 | OIER &= ~OIER_E1; |
| 226 | OSSR = OSSR_M1; |
| 227 | spin_unlock_irq(&sa1100_rtc_lock); |
| 228 | |
| 229 | free_irq(IRQ_OST1, dev); |
| 230 | free_irq(IRQ_RTCAlrm, dev); |
| 231 | free_irq(IRQ_RTC1Hz, dev); |
| 232 | } |
| 233 | |
| 234 | |
| 235 | static int sa1100_rtc_ioctl(struct device *dev, unsigned int cmd, |
| 236 | unsigned long arg) |
| 237 | { |
| 238 | switch(cmd) { |
| 239 | case RTC_AIE_OFF: |
| 240 | spin_lock_irq(&sa1100_rtc_lock); |
| 241 | RTSR &= ~RTSR_ALE; |
| 242 | spin_unlock_irq(&sa1100_rtc_lock); |
| 243 | return 0; |
| 244 | case RTC_AIE_ON: |
| 245 | spin_lock_irq(&sa1100_rtc_lock); |
| 246 | RTSR |= RTSR_ALE; |
| 247 | spin_unlock_irq(&sa1100_rtc_lock); |
| 248 | return 0; |
| 249 | case RTC_UIE_OFF: |
| 250 | spin_lock_irq(&sa1100_rtc_lock); |
| 251 | RTSR &= ~RTSR_HZE; |
| 252 | spin_unlock_irq(&sa1100_rtc_lock); |
| 253 | return 0; |
| 254 | case RTC_UIE_ON: |
| 255 | spin_lock_irq(&sa1100_rtc_lock); |
| 256 | RTSR |= RTSR_HZE; |
| 257 | spin_unlock_irq(&sa1100_rtc_lock); |
| 258 | return 0; |
| 259 | case RTC_PIE_OFF: |
| 260 | spin_lock_irq(&sa1100_rtc_lock); |
| 261 | OIER &= ~OIER_E1; |
| 262 | spin_unlock_irq(&sa1100_rtc_lock); |
| 263 | return 0; |
| 264 | case RTC_PIE_ON: |
| 265 | spin_lock_irq(&sa1100_rtc_lock); |
| 266 | OSMR1 = TIMER_FREQ/rtc_freq + OSCR; |
| 267 | OIER |= OIER_E1; |
| 268 | rtc_timer1_count = 1; |
| 269 | spin_unlock_irq(&sa1100_rtc_lock); |
| 270 | return 0; |
| 271 | case RTC_IRQP_READ: |
| 272 | return put_user(rtc_freq, (unsigned long *)arg); |
| 273 | case RTC_IRQP_SET: |
| 274 | if (arg < 1 || arg > TIMER_FREQ) |
| 275 | return -EINVAL; |
| 276 | rtc_freq = arg; |
| 277 | return 0; |
| 278 | } |
| 279 | return -ENOIOCTLCMD; |
| 280 | } |
| 281 | |
| 282 | static int sa1100_rtc_read_time(struct device *dev, struct rtc_time *tm) |
| 283 | { |
| 284 | rtc_time_to_tm(RCNR, tm); |
| 285 | return 0; |
| 286 | } |
| 287 | |
| 288 | static int sa1100_rtc_set_time(struct device *dev, struct rtc_time *tm) |
| 289 | { |
| 290 | unsigned long time; |
| 291 | int ret; |
| 292 | |
| 293 | ret = rtc_tm_to_time(tm, &time); |
| 294 | if (ret == 0) |
| 295 | RCNR = time; |
| 296 | return ret; |
| 297 | } |
| 298 | |
| 299 | static int sa1100_rtc_read_alarm(struct device *dev, struct rtc_wkalrm *alrm) |
| 300 | { |
| 301 | u32 rtsr; |
| 302 | |
| 303 | memcpy(&alrm->time, &rtc_alarm, sizeof(struct rtc_time)); |
| 304 | rtsr = RTSR; |
| 305 | alrm->enabled = (rtsr & RTSR_ALE) ? 1 : 0; |
| 306 | alrm->pending = (rtsr & RTSR_AL) ? 1 : 0; |
| 307 | return 0; |
| 308 | } |
| 309 | |
| 310 | static int sa1100_rtc_set_alarm(struct device *dev, struct rtc_wkalrm *alrm) |
| 311 | { |
| 312 | int ret; |
| 313 | |
| 314 | spin_lock_irq(&sa1100_rtc_lock); |
| 315 | ret = rtc_update_alarm(&alrm->time); |
| 316 | if (ret == 0) { |
| 317 | if (alrm->enabled) |
| 318 | RTSR |= RTSR_ALE; |
| 319 | else |
| 320 | RTSR &= ~RTSR_ALE; |
| 321 | } |
| 322 | spin_unlock_irq(&sa1100_rtc_lock); |
| 323 | |
| 324 | return ret; |
| 325 | } |
| 326 | |
| 327 | static int sa1100_rtc_proc(struct device *dev, struct seq_file *seq) |
| 328 | { |
| 329 | seq_printf(seq, "trim/divider\t: 0x%08x\n", (u32) RTTR); |
| 330 | seq_printf(seq, "update_IRQ\t: %s\n", |
| 331 | (RTSR & RTSR_HZE) ? "yes" : "no"); |
| 332 | seq_printf(seq, "periodic_IRQ\t: %s\n", |
| 333 | (OIER & OIER_E1) ? "yes" : "no"); |
| 334 | seq_printf(seq, "periodic_freq\t: %ld\n", rtc_freq); |
| 335 | |
| 336 | return 0; |
| 337 | } |
| 338 | |
| 339 | static const struct rtc_class_ops sa1100_rtc_ops = { |
| 340 | .open = sa1100_rtc_open, |
| 341 | .read_callback = sa1100_rtc_read_callback, |
| 342 | .release = sa1100_rtc_release, |
| 343 | .ioctl = sa1100_rtc_ioctl, |
| 344 | .read_time = sa1100_rtc_read_time, |
| 345 | .set_time = sa1100_rtc_set_time, |
| 346 | .read_alarm = sa1100_rtc_read_alarm, |
| 347 | .set_alarm = sa1100_rtc_set_alarm, |
| 348 | .proc = sa1100_rtc_proc, |
| 349 | }; |
| 350 | |
| 351 | static int sa1100_rtc_probe(struct platform_device *pdev) |
| 352 | { |
| 353 | struct rtc_device *rtc; |
| 354 | |
| 355 | /* |
| 356 | * According to the manual we should be able to let RTTR be zero |
| 357 | * and then a default diviser for a 32.768KHz clock is used. |
| 358 | * Apparently this doesn't work, at least for my SA1110 rev 5. |
| 359 | * If the clock divider is uninitialized then reset it to the |
| 360 | * default value to get the 1Hz clock. |
| 361 | */ |
| 362 | if (RTTR == 0) { |
| 363 | RTTR = RTC_DEF_DIVIDER + (RTC_DEF_TRIM << 16); |
| 364 | dev_warn(&pdev->dev, "warning: initializing default clock divider/trim value\n"); |
| 365 | /* The current RTC value probably doesn't make sense either */ |
| 366 | RCNR = 0; |
| 367 | } |
| 368 | |
| 369 | device_init_wakeup(&pdev->dev, 1); |
| 370 | |
| 371 | rtc = rtc_device_register(pdev->name, &pdev->dev, &sa1100_rtc_ops, |
| 372 | THIS_MODULE); |
| 373 | |
| 374 | if (IS_ERR(rtc)) |
| 375 | return PTR_ERR(rtc); |
| 376 | |
| 377 | platform_set_drvdata(pdev, rtc); |
| 378 | |
| 379 | return 0; |
| 380 | } |
| 381 | |
| 382 | static int sa1100_rtc_remove(struct platform_device *pdev) |
| 383 | { |
| 384 | struct rtc_device *rtc = platform_get_drvdata(pdev); |
| 385 | |
| 386 | if (rtc) |
| 387 | rtc_device_unregister(rtc); |
| 388 | |
| 389 | return 0; |
| 390 | } |
| 391 | |
| 392 | #ifdef CONFIG_PM |
| 393 | static int sa1100_rtc_suspend(struct platform_device *pdev, pm_message_t state) |
| 394 | { |
| 395 | if (device_may_wakeup(&pdev->dev)) |
| 396 | enable_irq_wake(IRQ_RTCAlrm); |
| 397 | return 0; |
| 398 | } |
| 399 | |
| 400 | static int sa1100_rtc_resume(struct platform_device *pdev) |
| 401 | { |
| 402 | if (device_may_wakeup(&pdev->dev)) |
| 403 | disable_irq_wake(IRQ_RTCAlrm); |
| 404 | return 0; |
| 405 | } |
| 406 | #else |
| 407 | #define sa1100_rtc_suspend NULL |
| 408 | #define sa1100_rtc_resume NULL |
| 409 | #endif |
| 410 | |
| 411 | static struct platform_driver sa1100_rtc_driver = { |
| 412 | .probe = sa1100_rtc_probe, |
| 413 | .remove = sa1100_rtc_remove, |
| 414 | .suspend = sa1100_rtc_suspend, |
| 415 | .resume = sa1100_rtc_resume, |
| 416 | .driver = { |
| 417 | .name = "sa1100-rtc", |
| 418 | }, |
| 419 | }; |
| 420 | |
| 421 | static int __init sa1100_rtc_init(void) |
| 422 | { |
| 423 | return platform_driver_register(&sa1100_rtc_driver); |
| 424 | } |
| 425 | |
| 426 | static void __exit sa1100_rtc_exit(void) |
| 427 | { |
| 428 | platform_driver_unregister(&sa1100_rtc_driver); |
| 429 | } |
| 430 | |
| 431 | module_init(sa1100_rtc_init); |
| 432 | module_exit(sa1100_rtc_exit); |
| 433 | |
| 434 | MODULE_AUTHOR("Richard Purdie <rpurdie@rpsys.net>"); |
| 435 | MODULE_DESCRIPTION("SA11x0/PXA2xx Realtime Clock Driver (RTC)"); |
| 436 | MODULE_LICENSE("GPL"); |
| 437 | MODULE_ALIAS("platform:sa1100-rtc"); |