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2013-09-17 Doug Gilmore <Doug.Gilmore@imgtec.com>
[deliverable/binutils-gdb.git] / gas / ChangeLog
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12013-09-17 Doug Gilmore <Doug.Gilmore@imgtec.com>
2
3 * config/tc-mips.c (mips_elf_final_processing): Set
4 EF_MIPS_FP64 for -mgp32 -mfp64, removing old FIXME.
5
62013-09-16 Will Newton <will.newton@linaro.org>
7
8 * config/tc-arm.c (do_neon_ld_st_interleave): Add constraint
9 disallowing element size 64 with interleave other than 1.
10
112013-09-12 Chao-ying Fu <Chao-ying.Fu@imgtec.com>
12
13 * config/tc-mips.c (match_insn): Set error when $31 is used for
14 bltzal* and bgezal*.
15
162013-09-04 Tristan Gingold <gingold@adacore.com>
17
18 * config/tc-ppc.c (md_apply_fix): Handle defined after use toc
19 symbols.
20
212013-09-04 Roland McGrath <mcgrathr@google.com>
22
23 PR gas/15914
24 * config/tc-arm.c (T16_32_TAB): Add _udf.
25 (do_t_udf): New function.
26 (insns): Add "udf".
27
282013-08-23 Sandeep Kumar Singh <Sandeep.Singh2@kpitcummins.com>
29
30 * config/rx-parse.y: Rearrange the components of a bison grammar to issue
31 assembler errors at correct position.
32
332013-08-23 Yuri Chornoivan <yurchor@ukr.net>
34
35 PR binutils/15834
36 * config/tc-ia64.c: Fix typos.
37 * config/tc-sparc.c: Likewise.
38 * config/tc-z80.c: Likewise.
39 * doc/c-i386.texi: Likewise.
40 * doc/c-m32r.texi: Likewise.
41
422013-08-23 Will Newton <will.newton@linaro.org>
43
44 * config/tc-arm.c: (do_neon_ldx_stx): Add extra constraints
45 for pre-indexed addressing modes.
46
472013-08-21 Alan Modra <amodra@gmail.com>
48
49 * symbols.c (fb_label_instance_inc, fb_label_instance): Properly
50 range check label number for use with fb_low_counter array.
51
522013-08-19 Richard Sandiford <rdsandiford@googlemail.com>
53
54 * config/tc-mips.c (mips_check_isa_supports_ase, reg_lookup)
55 (mips_parse_argument_token, validate_micromips_insn, md_begin)
56 (check_regno, match_float_constant, check_completed_insn, append_insn)
57 (match_insn, match_mips16_insn, match_insns, macro_start)
58 (macro_build_ldst_constoffset, load_register, macro, mips_ip)
59 (mips16_ip, mips_set_option_string, md_parse_option)
60 (mips_after_parse_args, mips_after_parse_args, md_pcrel_from)
61 (md_apply_fix, s_align, s_option, s_mipsset, s_tls_rel_directive)
62 (s_gpword, s_gpdword, s_ehword, s_nan, tc_gen_reloc, md_convert_frag)
63 (s_mips_end, s_mips_ent, s_mips_frame, s_mips_mask, mips_parse_cpu):
64 Start error messages with a lower-case letter. Do not end error
65 messages with a period. Wrap long messages to 80 character-lines.
66 Use "cannot" instead of "can't" and "can not".
67
682013-08-19 Richard Sandiford <rdsandiford@googlemail.com>
69
70 * config/tc-mips.c (imm_expr): Expand comment.
71 (set_at, macro, mips16_macro): Expect imm_expr to be O_constant
72 when populated.
73
742013-08-19 Richard Sandiford <rdsandiford@googlemail.com>
75
76 * config/tc-mips.c (imm2_expr): Delete.
77 (md_assemble, match_insn, imm2_expr.X_op, mips_ip): Update accordingly.
78
792013-08-19 Richard Sandiford <rdsandiford@googlemail.com>
80
81 * config/tc-mips.c (report_bad_range, report_bad_field): Delete.
82 (macro): Remove M_DEXT and M_DINS handling.
83
842013-08-19 Richard Sandiford <rdsandiford@googlemail.com>
85
86 * config/tc-mips.c (mips_arg_info): Replace allow_nonconst and
87 lax_max with lax_match.
88 (match_int_operand): Update accordingly. Don't report an error
89 for !lax_match-only cases.
90 (match_insn): Replace more_alts with lax_match and use it to
91 initialize the mips_arg_info field. Add a complete_p parameter.
92 Handle implicit VU0 suffixes here.
93 (match_invalid_for_isa, match_insns, match_mips16_insns): New
94 functions.
95 (mips_ip, mips16_ip): Use them.
96
972013-08-19 Richard Sandiford <rdsandiford@googlemail.com>
98
99 * config/tc-mips.c (match_expression): Report uses of registers here.
100 Add a "must be an immediate expression" error. Handle elided offsets
101 here rather than...
102 (match_int_operand): ...here.
103
1042013-08-19 Richard Sandiford <rdsandiford@googlemail.com>
105
106 * config/tc-mips.c (mips_arg_info): Remove soft_match.
107 (match_out_of_range, match_not_constant): New functions.
108 (match_const_int): Remove fallback parameter and check for soft_match.
109 Use match_not_constant.
110 (match_mapped_int_operand, match_addiusp_operand)
111 (match_perf_reg_operand, match_save_restore_list_operand)
112 (match_mdmx_imm_reg_operand): Update accordingly. Use
113 match_out_of_range and set_insn_error* instead of as_bad.
114 (match_int_operand): Likewise. Use match_not_constant in the
115 !allows_nonconst case.
116 (match_float_constant): Report invalid float constants.
117 (match_insn, match_mips16_insn): Remove soft_match code. Rely on
118 match_float_constant to check for invalid constants. Fail the
119 match if match_const_int or match_float_constant return false.
120 (mips_ip): Update accordingly.
121 (mips16_ip): Likewise. Undo null termination of instruction name
122 once lookup is complete.
123
1242013-08-19 Richard Sandiford <rdsandiford@googlemail.com>
125
126 * config/tc-mips.c (mips_insn_error_format): New enum.
127 (mips_insn_error): New struct.
128 (insn_error): Change to a mips_insn_error.
129 (clear_insn_error, set_insn_error_format, set_insn_error)
130 (set_insn_error_i, set_insn_error_ss, report_insn_error): New
131 functions.
132 (mips_parse_argument_token, md_assemble, match_insn)
133 (match_mips16_insn): Use them instead of manipulating insn_error
134 directly.
135 (mips_ip, mips16_ip): Likewise. Simplify control flow.
136
1372013-08-19 Richard Sandiford <rdsandiford@googlemail.com>
138
139 * config/tc-mips.c (normalize_constant_expr): Move further up file.
140 (normalize_address_expr): Likewise.
141 (match_insn, match_mips16_insn): New functions, split out from...
142 (mips_ip, mips16_ip): ...here.
143
1442013-08-19 Richard Sandiford <rdsandiford@googlemail.com>
145
146 * config/tc-mips.c (operand_reg_mask, match_operand): Handle
147 OP_OPTIONAL_REG.
148 (mips_ip, mips16_ip): Use mips_optional_operand_p to check
149 for optional operands.
150
1512013-08-16 Alan Modra <amodra@gmail.com>
152
153 * config/tc-ppc.c (ppc_elf_cons): Allow @l and other reloc
154 modifiers generally.
155
1562013-08-16 Alan Modra <amodra@gmail.com>
157
158 * config/tc-ppc.c (ppc_elf_lcomm): Use subsection 1.
159
1602013-08-14 David Edelsohn <dje.gcc@gmail.com>
161
162 * config/tc-ppc.c (ppc_comm): Accept optional fourth .lcomm
163 argument as alignment.
164
1652013-08-09 Nick Clifton <nickc@redhat.com>
166
167 * config/tc-rl78.c (elf_flags): New variable.
168 (enum options): Add OPTION_G10.
169 (md_longopts): Add mg10.
170 (md_parse_option): Parse -mg10.
171 (rl78_elf_final_processing): New function.
172 * config/tc-rl78.c (tc_final_processing): Define.
173 * doc/c-rl78.texi: Document -mg10 option.
174
1752013-08-06 Jürgen Urban <JuergenUrban@gmx.de>
176
177 * config/tc-mips.c (match_vu0_suffix_operand): Allow single-channel
178 suffixes to be elided too.
179 (mips_lookup_insn): Don't reject INSN2_VU0_CHANNEL_SUFFIX here.
180 (mips_ip): Assume .xyzw if no VU0 suffix is specified. Allow +N
181 to be omitted too.
182
1832013-08-05 John Tytgat <john@bass-software.com>
184
185 * po/POTFILES.in: Regenerate.
186
1872013-08-05 Eric Botcazou <ebotcazou@adacore.com>
188 Konrad Eisele <konrad@gaisler.com>
189
190 * config/tc-sparc.c (sparc_arch_types): Add leon.
191 (sparc_arch): Move sparc4 around and add leon.
192 (sparc_target_format): Document -Aleon.
193 * doc/c-sparc.texi: Likewise.
194
1952013-08-05 Richard Sandiford <rdsandiford@googlemail.com>
196
197 * config/tc-mips.c (mips_lookup_insn): Make length and opend signed.
198
1992013-08-04 Jürgen Urban <JuergenUrban@gmx.de>
200 Richard Sandiford <rdsandiford@googlemail.com>
201
202 * config/tc-mips.c (MAX_OPERANDS): Bump to 6.
203 (RWARN): Bump to 0x8000000.
204 (RTYPE_VI, RTYPE_VF, RTYPE_R5900_I, RTYPE_R5900_Q, RTYPE_R5900_R)
205 (RTYPE_R5900_ACC): New register types.
206 (RTYPE_MASK): Include them.
207 (R5900_I_NAMES, R5900_Q_NAMES, R5900_R_NAMES, R5900_ACC_NAMES): New
208 macros.
209 (reg_names): Include them.
210 (mips_parse_register_1): New function, split out from...
211 (mips_parse_register): ...here. Add a channels_ptr parameter.
212 Look for VU0 channel suffixes when nonnull.
213 (reg_lookup): Update the call to mips_parse_register.
214 (mips_parse_vu0_channels): New function.
215 (OT_CHANNELS, OT_DOUBLE_CHAR): New mips_operand_token_types.
216 (mips_operand_token): Add a "channels" field to the union.
217 Extend the comment above "ch" to OT_DOUBLE_CHAR.
218 (mips_parse_base_start): Match -- and ++. Handle channel suffixes.
219 (mips_parse_argument_token): Handle channel suffixes here too.
220 (validate_mips_insn): Handle INSN2_VU0_CHANNEL_SUFFIX.
221 Ignore OP_VU0_MATCH_SUFFIX when calculating the used bits.
222 Handle '#' formats.
223 (md_begin): Register $vfN and $vfI registers.
224 (operand_reg_mask): Handle OP_VU0_SUFFIX and OP_VU0_MATCH_SUFFIX.
225 (convert_reg_type): Handle OP_REG_VI, OP_REG_VF, OP_REG_R5900_I,
226 OP_REG_R5900_Q, OP_REG_R5900_R and OP_REG_R5900_ACC.
227 (match_vu0_suffix_operand): New function.
228 (match_operand): Handle OP_VU0_SUFFIX and OP_VU0_MATCH_SUFFIX.
229 (macro): Use "+7" rather than "E" for LDQ2 and STQ2.
230 (mips_lookup_insn): New function.
231 (mips_ip): Use it. Allow "+K" operands to be elided at the end
232 of an instruction. Handle '#' sequences.
233
2342013-08-03 Richard Sandiford <rdsandiford@googlemail.com>
235
236 * config/tc-mips.c (macro, mips16_macro): Create an array of operand
237 values and use it instead of sreg, treg, xreg, etc.
238
2392013-08-03 Richard Sandiford <rdsandiford@googlemail.com>
240
241 * config/tc-mips.c (match_int_operand): Use mips_int_operand_min
242 and mips_int_operand_max.
243 (mips16_immed_operand, mips16_immed_operands, MIPS16_NUM_IMMED):
244 Delete.
245 (mips16_immed_operand, mips16_immed_in_range_p): New functions.
246 (mips16_immed, mips16_extended_frag): Use them. Use mips_int_operand
247 instead of mips16_immed_operand.
248
2492013-08-03 Richard Sandiford <rdsandiford@googlemail.com>
250
251 * config/tc-mips.c (mips16_macro): Don't use move_register.
252 (mips16_ip): Allow macros to use 'p'.
253
2542013-08-01 Richard Sandiford <rdsandiford@googlemail.com>
255
256 * config/tc-mips.c (MAX_OPERANDS): New macro.
257 (mips_operand_array): New structure.
258 (mips_operands, mips16_operands, micromips_operands): New arrays.
259 (micromips_to_32_reg_b_map, micromips_to_32_reg_c_map)
260 (micromips_to_32_reg_e_map, micromips_to_32_reg_f_map)
261 (micromips_to_32_reg_g_map, micromips_to_32_reg_l_map)
262 (micromips_to_32_reg_q_map): Delete.
263 (insn_operands, insn_opno, insn_extract_operand): New functions.
264 (validate_mips_insn): Take a mips_operand_array as argument and
265 use it to build up a list of operands. Extend to handle INSN_MACRO
266 and MIPS16.
267 (validate_mips16_insn): New function.
268 (validate_micromips_insn): Take a mips_operand_array as argument.
269 Handle INSN_MACRO.
270 (md_begin): Initialize mips_operands, mips16_operands and
271 micromips_operands. Call validate_mips_insn and
272 validate_micromips_insn for macro instructions too.
273 Call validate_mips16_insn for MIPS16 instructions.
274 (insn_read_mask, insn_write_mask, operand_reg_mask, insn_reg_mask):
275 New functions.
276 (gpr_read_mask, gpr_write_mask, fpr_read_mask, fpr_write_mask): Use
277 them. Handle INSN_UDI.
278 (get_append_method): Use gpr_read_mask.
279
2802013-08-01 Richard Sandiford <rdsandiford@googlemail.com>
281
282 * config/tc-mips.c (compact_branch_p, uncond_branch_p): Use the same
283 flags for MIPS16 and non-MIPS16 instructions.
284 (gpr_mod_mask): Move the INSN2_MOD_SP case outside the micromips block.
285 (gpr_read_mask): Use INSN2_READ_GPR_31 for MIPS16 instructions too.
286 (gpr_write_mask): Remove MIPS16_INSN_WRITE_SP handling.
287 (can_swap_branch_p, get_append_method): Use the same flags for MIPS16
288 and non-MIPS16 instructions. Fix formatting.
289
2902013-08-01 Richard Sandiford <rdsandiford@googlemail.com>
291
292 * config/tc-mips.c (reg_needs_delay): Move later in file.
293 Use gpr_write_mask.
294 (insns_between): Use gpr_read_mask instead of EXTRACT_OPERAND.
295
2962013-07-26 Sergey Guriev <sergey.s.guriev@intel.com>
297 Alexander Ivchenko <alexander.ivchenko@intel.com>
298 Maxim Kuznetsov <maxim.kuznetsov@intel.com>
299 Sergey Lega <sergey.s.lega@intel.com>
300 Anna Tikhonova <anna.tikhonova@intel.com>
301 Ilya Tocar <ilya.tocar@intel.com>
302 Andrey Turetskiy <andrey.turetskiy@intel.com>
303 Ilya Verbin <ilya.verbin@intel.com>
304 Kirill Yukhin <kirill.yukhin@intel.com>
305 Michael Zolotukhin <michael.v.zolotukhin@intel.com>
306
307 * config/tc-i386-intel.c (O_zmmword_ptr): New.
308 (i386_types): Add zmmword.
309 (i386_intel_simplify_register): Allow regzmm.
310 (i386_intel_simplify): Handle zmmwords.
311 (i386_intel_operand): Handle RC/SAE, vector operations and
312 zmmwords.
313 * config/tc-i386.c (ZMMWORD_MNEM_SUFFIX): New.
314 (struct RC_Operation): New.
315 (struct Mask_Operation): New.
316 (struct Broadcast_Operation): New.
317 (vex_prefix): Size of bytes increased to 4 to support EVEX
318 encoding.
319 (enum i386_error): Add new error codes: unsupported_broadcast,
320 broadcast_not_on_src_operand, broadcast_needed,
321 unsupported_masking, mask_not_on_destination, no_default_mask,
322 unsupported_rc_sae, rc_sae_operand_not_last_imm,
323 invalid_register_operand, try_vector_disp8.
324 (struct _i386_insn): Add new fields vrex, need_vrex, mask,
325 rounding, broadcast, memshift.
326 (struct RC_name): New.
327 (RC_NamesTable): New.
328 (evexlig): New.
329 (evexwig): New.
330 (extra_symbol_chars): Add '{'.
331 (cpu_arch): Add AVX512F, AVX512CD, AVX512ER and AVX512PF.
332 (i386_operand_type): Add regzmm, regmask and vec_disp8.
333 (match_mem_size): Handle zmmwords.
334 (operand_type_match): Handle zmm-registers.
335 (mode_from_disp_size): Handle vec_disp8.
336 (fits_in_vec_disp8): New.
337 (md_begin): Handle {} properly.
338 (type_names): Add "rZMM", "Mask reg" and "Vector d8".
339 (build_vex_prefix): Handle vrex.
340 (build_evex_prefix): New.
341 (process_immext): Adjust to properly handle EVEX.
342 (md_assemble): Add EVEX encoding support.
343 (swap_2_operands): Correctly handle operands with masking,
344 broadcasting or RC/SAE.
345 (check_VecOperands): Support EVEX features.
346 (VEX_check_operands): Properly handle 16 upper [xyz]mm registers.
347 (match_template): Support regzmm and handle new error codes.
348 (process_suffix): Handle zmmwords and zmm-registers.
349 (check_byte_reg): Extend to zmm-registers.
350 (process_operands): Extend to zmm-registers.
351 (build_modrm_byte): Handle EVEX.
352 (output_insn): Adjust to properly handle EVEX case.
353 (disp_size): Handle vec_disp8.
354 (output_disp): Support compressed disp8*N evex feature.
355 (output_imm): Handle RC/SAE immediates properly.
356 (check_VecOperations): New.
357 (i386_immediate): Handle EVEX features.
358 (i386_index_check): Handle zmmwords and zmm-registers.
359 (RC_SAE_immediate): New.
360 (i386_att_operand): Handle EVEX features.
361 (parse_real_register): Add a check for ZMM/Mask registers.
362 (OPTION_MEVEXLIG): New.
363 (OPTION_MEVEXWIG): New.
364 (md_longopts): Add mevexlig and mevexwig.
365 (md_parse_option): Handle mevexlig and mevexwig options.
366 (md_show_usage): Add description for mevexlig and mevexwig.
367 * doc/c-i386.texi: Document avx512f/.avx512f, avx512cd/.avx512cd,
368 avx512er/.avx512er, avx512pf/.avx512pf, mevexlig and mevexwig.
369
3702013-07-25 Michael Zolotukhin <michael.v.zolotukhin@intel.com>
371
372 * config/tc-i386.c (cpu_arch): Add .sha.
373 * doc/c-i386.texi: Document sha/.sha.
374
3752013-07-24 Anna Tikhonova <anna.tikhonova@intel.com>
376 Kirill Yukhin <kirill.yukhin@intel.com>
377 Michael Zolotukhin <michael.v.zolotukhin@intel.com>
378
379 * config/tc-i386.c (BND_PREFIX): New.
380 (struct _i386_insn): Add new field bnd_prefix.
381 (add_bnd_prefix): New.
382 (cpu_arch): Add MPX.
383 (i386_operand_type): Add regbnd.
384 (md_assemble): Handle BND prefixes.
385 (parse_insn): Likewise.
386 (output_branch): Likewise.
387 (output_jump): Likewise.
388 (build_modrm_byte): Handle regbnd.
389 (OPTION_MADD_BND_PREFIX): New.
390 (md_longopts): Add entry for 'madd-bnd-prefix'.
391 (md_parse_option): Handle madd-bnd-prefix option.
392 (md_show_usage): Add description for madd-bnd-prefix
393 option.
394 * doc/c-i386.texi: Document mpx/.mpx and -madd-bnd-prefix.
395
3962013-07-24 Tristan Gingold <gingold@adacore.com>
397
398 * config/tc-ppc.c (md_apply_fix): Adjust BFD_RELOC_PPC_B16 on
399 xcoff targets.
400
4012013-07-24 Andreas Krebbel <Andreas.Krebbel@de.ibm.com>
402
403 * config/tc-s390.c (s390_machine): Don't force the .machine
404 argument to lower case.
405
4062013-07-22 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
407
408 * config/tc-arm.c (s_arm_arch_extension): Improve error message
409 for invalid extension.
410
4112013-07-19 Yufeng Zhang <yufeng.zhang@arm.com>
412
413 * config/tc-aarch64.c (enum aarch64_abi_type): New enumeration tag.
414 (AARCH64_ABI_LP64, AARCH64_ABI_ILP32): New enumerators.
415 (aarch64_abi): New variable.
416 (ilp32_p): Change to be a macro.
417 (aarch64_opts): Remove the support for option -milp32 and -mlp64.
418 (struct aarch64_option_abi_value_table): New struct.
419 (aarch64_abis): New table.
420 (aarch64_parse_abi): New function.
421 (aarch64_long_opts): Add entry for -mabi=.
422 * doc/as.texinfo (Target AArch64 options): Document -mabi.
423 * doc/c-aarch64.texi: Likewise.
424
4252013-07-18 Jim Thomas <thomas@cfht.hawaii.edu>
426
427 * config/tc-i386-intel.c (i386_intel_operand): Fixed signed vs
428 unsigned comparison.
429
4302013-07-18 Sandeep Kumar Singh <Sandeep.Singh2@kpitcummins.com>
431
432 * config/rx-defs.h: Add macros for RX100, RX200, RX600, and
433 RX610.
434 * config/rx-parse.y: (rx_check_float_support): Add function to
435 check floating point operation support for target RX100 and
436 RX200.
437 * config/tc-rx.c: Add CPU options RX100, RX200, RX600, and RX610.
438 * doc/c-rx.texi: Add -mcpu option to recognize macros for RX100,
439 RX200, RX600, and RX610
440
4412013-07-18 Senthil Kumar Selvaraj <senthil_kumar.selvaraj@atmel.com>
442
443 * config/tc-avr.c (md_show_usage): Add avrxmega2 to help text
444
4452013-07-18 Vishnu K.S <vishnu.k_s@atmel.com>
446
447 * config/tc-avr.c: Make ata6289's ISA to AVR_ISA_AVR4.
448 * doc/c-avr.texi: Likewise.
449
4502013-07-15 Richard Sandiford <rdsandiford@googlemail.com>
451
452 * config/tc-mips.c (match_save_restore_list_operand): Avoid -Wformat
453 error with older GCCs.
454 (mips16_macro_build): Dereference args.
455
4562013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
457
458 * config/tc-mips.c (mips_prefer_vec_regno, mips_parse_register):
459 New functions, split out from...
460 (reg_lookup): ...here. Remove itbl support.
461 (reglist_lookup): Delete.
462 (mips_operand_token_type): New enum.
463 (mips_operand_token): New structure.
464 (mips_operand_tokens): New variable.
465 (mips_add_token, mips_parse_base_start, mips_parse_argument_token)
466 (mips_parse_arguments): New functions.
467 (md_begin): Initialize mips_operand_tokens.
468 (mips_arg_info): Add a token field. Remove optional_reg field.
469 (match_char, match_expression): New functions.
470 (match_const_int): Use match_expression. Remove "s" argument
471 and return a boolean result. Remove O_register handling.
472 (match_regno, match_reg, match_reg_range): New functions.
473 (match_int_operand, match_mapped_int_operand, match_msb_operand)
474 (match_reg_operand, match_reg_pair_operand, match_perf_reg_operand)
475 (match_addiusp_operand, match_clo_clz_dest_operand)
476 (match_lwm_swm_list_operand, match_entry_exit_operand)
477 (match_save_restore_list_operand, match_mdmx_imm_reg_operand)
478 (match_tied_reg_operand): Remove "s" argument and return a boolean
479 result. Match tokens rather than text. Update calls to
480 match_const_int. Rely on match_regno to call check_regno.
481 (match_pcrel_operand, match_pc_operand): Replace "s" argument with
482 "arg" argument. Return a boolean result.
483 (parse_float_constant): Replace with...
484 (match_float_constant): ...this new function.
485 (match_operand): Remove "s" argument and return a boolean result.
486 Update calls to subfunctions.
487 (mips_ip, mips16_ip): Call mips_parse_arguments. Use match routines
488 rather than string-parsing routines. Update handling of optional
489 registers for token scheme.
490
4912013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
492
493 * config/tc-mips.c (parse_float_constant): Split out from...
494 (mips_ip): ...here.
495
4962013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
497
498 * config/tc-mips.c (INSERT_BITS, INSERT_OPERAND, MIPS16_INSERT_OPERAND):
499 Delete.
500
5012013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
502
503 * config/tc-mips.c (mips32_to_16_reg_map): Delete.
504 (match_entry_exit_operand): New function.
505 (match_save_restore_list_operand): Likewise.
506 (match_operand): Use them.
507 (check_absolute_expr): Delete.
508 (mips16_ip): Rewrite main parsing loop to use mips_operands.
509
5102013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
511
512 * config/tc-mips.c: Enable functions commented out in previous patch.
513 (SKIP_SPACE_TABS): Move further up file.
514 (mips32_to_micromips_reg_b_map, mips32_to_micromips_reg_c_map)
515 (mips32_to_micromips_reg_d_map, mips32_to_micromips_reg_e_map)
516 (ips32_to_micromips_reg_f_map, mips32_to_micromips_reg_g_map)
517 (mips32_to_micromips_reg_l_map, mips32_to_micromips_reg_m_map)
518 (mips32_to_micromips_reg_q_map, mips32_to_micromips_reg_n_map)
519 (micromips_imm_b_map, micromips_imm_c_map): Delete.
520 (mips_lookup_reg_pair): Delete.
521 (macro): Use report_bad_range and report_bad_field.
522 (mips_immed, expr_const_in_range): Delete.
523 (mips_ip): Rewrite main parsing loop to use new functions.
524
5252013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
526
527 * config/tc-mips.c (mips_oddfpreg_ok): Move further up file.
528 Change return type to bfd_boolean.
529 (report_bad_range, report_bad_field): New functions.
530 (mips_arg_info): New structure.
531 (match_const_int, convert_reg_type, check_regno, match_int_operand)
532 (match_mapped_int_operand, match_msb_operand, match_reg_operand)
533 (match_reg_pair_operand, match_pcrel_operand, match_perf_reg_operand)
534 (match_addiusp_operand, match_clo_clz_dest_operand)
535 (match_lwm_swm_list_operand, match_mdmx_imm_reg_operand)
536 (match_pc_operand, match_tied_reg_operand, match_operand)
537 (check_completed_insn): New functions, commented out for now.
538
5392013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
540
541 * config/tc-mips.c (insn_insert_operand): New function.
542 (macro_build, mips16_macro_build): Put null character check
543 in the for loop and convert continues to breaks. Use operand
544 structures to handle constant operands.
545
5462013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
547
548 * config/tc-mips.c (validate_mips_insn): Move further up file.
549 Add insn_bits and decode_operand arguments. Use the mips_operand
550 fields to work out which bits an operand occupies. Detect double
551 definitions.
552 (validate_micromips_insn): Move further up file. Call into
553 validate_mips_insn.
554
5552013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
556
557 * config/tc-mips.c (mips16_macro_build): Remove 'Y' case.
558
5592013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
560
561 * config/tc-mips.c (macro_build): Take an int for "C", "k", "\\"
562 and "~".
563 (macro): Update accordingly.
564
5652013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
566
567 * config/tc-mips.c (imm_expr, imm2_expr, offset_expr): Tweak commentary.
568 (imm_reloc): Delete.
569 (md_assemble): Remove imm_reloc handling.
570 (mips_ip): Update commentary. Use offset_expr and offset_reloc
571 rather than imm_expr and imm_reloc for 'i', 'j' and 'u'.
572 Use a temporary array rather than imm_reloc when parsing
573 constant expressions. Remove imm_reloc initialization.
574 (mips16_ip): Update commentary. Use offset_expr and offset_reloc
575 for the relaxable field. Use a relax_char variable to track the
576 type of this field. Remove imm_reloc initialization.
577
5782013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
579
580 * config/tc-mips.c (mips16_ip): Handle "I".
581
5822013-07-12 Maciej W. Rozycki <macro@codesourcery.com>
583
584 * config/tc-mips.c (mips_flag_nan2008): New variable.
585 (options): Add OPTION_NAN enum value.
586 (md_longopts): Handle it.
587 (md_parse_option): Likewise.
588 (s_nan): New function.
589 (mips_elf_final_processing): Handle EF_MIPS_NAN2008.
590 (md_show_usage): Add -mnan.
591
592 * doc/as.texinfo (Overview): Add -mnan.
593 * doc/c-mips.texi (MIPS Opts): Document -mnan.
594 (MIPS NaN Encodings): New node. Document .nan directive.
595 (MIPS-Dependent): List the new node.
596
5972013-07-09 Tristan Gingold <gingold@adacore.com>
598
599 * configure.com: Define HAVE_SYS_TYPES_H and HAVE_UNISTD_H
600
6012013-07-08 Richard Sandiford <rdsandiford@googlemail.com>
602
603 * config/tc-mips.c (mips_ip): Unconditionally parse an expression
604 for 'A' and assume that the constant has been elided if the result
605 is an O_register.
606
6072013-07-07 Richard Sandiford <rdsandiford@googlemail.com>
608
609 * config/tc-mips.c (gprel16_reloc_p): New function.
610 (macro_read_relocs): Assume BFD_RELOC_LO16 if all relocs are
611 BFD_RELOC_UNUSED.
612 (offset_high_part, small_offset_p): New functions.
613 (nacro): Use them. Remove *_OB and *_DOB cases. For single-
614 register load and store macros, handle the 16-bit offset case first.
615 If a 16-bit offset is not suitable for the instruction we're
616 generating, load it into the temporary register using
617 ADDRESS_ADDI_INSN. Make the M_LI_DD code fall through into the
618 M_L_DAB code once the address has been constructed. For double load
619 and store macros, again handle the 16-bit offset case first.
620 If the second register cannot be accessed from the same high
621 part as the first, load it into AT using ADDRESS_ADDI_INSN.
622 Fix the handling of LD in cases where the first register is the
623 same as the base. Also handle the case where the offset is
624 not 16 bits and the second register cannot be accessed from the
625 same high part as the first. For unaligned loads and stores,
626 fuse the offbits == 12 and old "ab" handling. Apply this handling
627 whenever the second offset needs a different high part from the first.
628 Construct the offset using ADDRESS_ADDI_INSN where possible,
629 for offbits == 16 as well as offbits == 12. Use offset_reloc
630 when constructing the individual loads and stores.
631 (mips_ip): Set up imm_expr, imm2_expr, offset_expr, imm_reloc
632 and offset_reloc before matching against a particular opcode.
633 Handle elided 'A' constants. Allow 'A' constants to use
634 relocation operators.
635
6362013-07-07 Richard Sandiford <rdsandiford@googlemail.com>
637
638 * config/tc-mips.c (validate_mips_insn): Remove "[" and "]" handling.
639 (mips_ip): Likewise. Do not set is_mdmx for INSN_5400 instructions.
640 Check constraints on the VR5400 RZU.OB, SLL.OB and SRL.OB instructions.
641
6422013-07-07 Richard Sandiford <rdsandiford@googlemail.com>
643
644 * config/tc-mips.c (mips_ip): Preserve the real bit number for "+p".
645 Require the msb to be <= 31 for "+s". Check that the size is <= 31
646 for both "+s" and "+S".
647
6482013-07-07 Richard Sandiford <rdsandiford@googlemail.com>
649
650 * config/tc-mips.c (validate_mips_insn, validate_micromips_insn):
651 (mips_ip, mips16_ip): Handle "+i".
652
6532013-07-07 Richard Sandiford <rdsandiford@googlemail.com>
654
655 * config/tc-mips.c (mips32_to_micromips_reg_h_map): Delete.
656 (micromips_to_32_reg_h_map): Rename to...
657 (micromips_to_32_reg_h_map1): ...this.
658 (micromips_to_32_reg_i_map): Rename to...
659 (micromips_to_32_reg_h_map2): ...this.
660 (mips_lookup_reg_pair): New function.
661 (gpr_write_mask, macro): Adjust after above renaming.
662 (validate_micromips_insn): Remove "mi" handling.
663 (mips_ip): Likewise. Parse both registers in a pair for "mh".
664
6652013-07-07 Richard Sandiford <rdsandiford@googlemail.com>
666
667 * config/tc-mips.c (validate_mips_insn, validate_micromips_insn)
668 (mips_ip): Remove "+D" and "+T" handling.
669
6702013-07-05 Andreas Krebbel <Andreas.Krebbel@de.ibm.com>
671
672 * config/tc-s390.c (md_gather_operands, md_apply_fix): Support new
673 relocs.
674
6752013-07-03 Marcus Shawcroft <marcus.shawcroft@arm.com>
676
677 * config/tc-aarch64.c (reloc_table): Merge got_prel19 into got.
678
6792013-07-02 Marcus Shawcroft <marcus.shawcroft@arm.com>
680
681 * config/tc-aarch64.c (md_apply_fix): Reorder case values.
682 (aarch64_force_relocation): Likewise.
683
6842013-07-02 Alan Modra <amodra@gmail.com>
685
686 * config/tc-ppc.c (ppc_elf_adjust_symtab): Don't make .TOC. weak.
687
6882013-06-26 Maciej W. Rozycki <macro@codesourcery.com>
689
690 * doc/as.texinfo (Overview): Remove @samp from MIPS ISA names.
691 * doc/c-mips.texi (MIPS Options): Remove @sc from MIPS ISA names.
692 Replace @sc{mips16} with literal `MIPS16'.
693 (MIPS ISA): Replace @sc{mips3} with literal `MIPS III'.
694
6952013-06-26 Yufeng Zhang <yufeng.zhang@arm.com>
696
697 * config/tc-aarch64.c (reloc_table): Replace
698 BFD_RELOC_AARCH64_LD64_GOT_LO12_NC with
699 BFD_RELOC_AARCH64_LD_GOT_LO12_NC; likewise to
700 BFD_RELOC_AARCH64_TLSDESC_LD64_LO12_NC and
701 BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC.
702 (md_apply_fix): Handle BFD_RELOC_AARCH64_LD_GOT_LO12_NC,
703 BFD_RELOC_AARCH64_LD32_GOT_LO12_NC,
704 BFD_RELOC_AARCH64_TLSDESC_LD_LO12_NC,
705 BFD_RELOC_AARCH64_TLSDESC_LD32_LO12_NC,
706 BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC and
707 BFD_RELOC_AARCH64_TLSIE_LD32_GOTTPREL_LO12_NC.
708 (aarch64_force_relocation): Likewise.
709
7102013-06-26 Yufeng Zhang <yufeng.zhang@arm.com>
711
712 * config/tc-aarch64.c (ilp32_p): New static variable.
713 (elf64_aarch64_target_format): Return the target according to the
714 value of 'ilp32_p'.
715 (md_begin): Determine 'mach' according to the value of 'ilp32_p'.
716 (aarch64_opts): Add support for options '-milp32' and '-mlp64'.
717 (aarch64_dwarf2_addr_size): New function.
718 * config/tc-aarch64.h (aarch64_dwarf2_addr_size): New declaration.
719 (DWARF2_ADDR_SIZE): New define.
720
7212013-06-26 Richard Sandiford <rdsandiford@googlemail.com>
722
723 * doc/c-mips.texi: Use ISA instead of @sc{isa}.
724
7252013-06-26 Richard Sandiford <rdsandiford@googlemail.com>
726
727 * config/tc-mips.c (validate_mips_insn): Use STYPE rather than SHAMT.
728
7292013-06-25 Maciej W. Rozycki <macro@codesourcery.com>
730
731 * config/tc-mips.c (mips_set_options): Add insn32 member.
732 (mips_opts): Initialize it.
733 (NOP_INSN, NOP_INSN_SIZE): Handle insn32 mode.
734 (options): Add OPTION_INSN32 and OPTION_NO_INSN32 enum values.
735 (md_longopts): Add "minsn32" and "mno-insn32" options.
736 (is_size_valid): Handle insn32 mode.
737 (md_assemble): Pass instruction string down to macro.
738 (brk_fmt): Add second dimension and insn32 mode initializers.
739 (mfhl_fmt): Likewise.
740 (BRK_FMT, MFHL_FMT): Handle insn32 mode.
741 (macro_build) <'c'>: Handle microMIPS 32-bit BREAK encoding.
742 (macro_build_jalr, move_register): Handle insn32 mode.
743 (macro_build_branch_rs): Likewise.
744 (macro): Handle insn32 mode.
745 <M_JRADDIUSP>, <M_JRC>, <M_MOVEP>: New cases.
746 (mips_ip): Handle insn32 mode.
747 (md_parse_option): Handle OPTION_INSN32 and OPTION_NO_INSN32.
748 (s_mipsset): Handle "insn32" and "noinsn32" pseudo-ops.
749 (mips_handle_align): Handle insn32 mode.
750 (md_show_usage): Add -minsn32 and -mno-insn32.
751
752 * doc/as.texinfo (Target MIPS options): Add -minsn32 and
753 -mno-insn32 options.
754 (-minsn32, -mno-insn32): New options.
755 * doc/c-mips.texi (MIPS Opts): Add -minsn32 and -mno-insn32
756 options.
757 (MIPS assembly options): New node. Document .set insn32 and
758 .set noinsn32.
759 (MIPS-Dependent): List the new node.
760
7612013-06-25 Nick Clifton <nickc@redhat.com>
762
763 * config/tc-msp430.c (msp430_srcoperand): Do not allow the use of
764 the PC in indirect addressing on 430xv2 parts.
765 (msp430_operands): Add version test to hardware bug encoding
766 restrictions.
767
7682013-06-24 Roland McGrath <mcgrathr@google.com>
769
770 * config/tc-arm.c (parse_reg_list): Use skip_past_char for '}',
771 so it skips whitespace before it.
772 (s_arm_unwind_save_mmxwr, s_arm_unwind_save_mmxwcg): Likewise.
773
774 * config/tc-arm.c (arm_symbol_chars): Include '{' and '}'.
775 (arm_reg_parse_multi): Skip whitespace first.
776 (parse_reg_list): Likewise.
777 (parse_vfp_reg_list): Likewise.
778 (s_arm_unwind_save_mmxwcg): Likewise.
779
7802013-06-24 Nick Clifton <nickc@redhat.com>
781
782 PR gas/15623
783 * config/tc-arm.c (do_t_smc): Mark as ending an IT block.
784
7852013-06-23 Richard Sandiford <rdsandiford@googlemail.com>
786
787 * config/tc-mips.c (mips_ip): Fix swapped bit numbers in comments.
788
7892013-06-23 Richard Sandiford <rdsandiford@googlemail.com>
790
791 * config/tc-mips.c: Assert that offsetT and valueT are at least
792 8 bytes in size.
793 (GPR_SMIN, GPR_SMAX): New macros.
794 (macro, mips_ip): Remove code for 4-byte valueT and offsetT.
795
7962013-06-22 Richard Sandiford <rdsandiford@googlemail.com>
797
798 * config/tc-mips.c: Remove OBJ_ELF, OBJ_MAYBE_ELF and IS_ELF
799 conditions. Remove any code deselected by them.
800 (s_mips_frame, s_mips_mask): Handle ECOFF_DEBUGGING case first.
801
8022013-06-22 Richard Sandiford <rdsandiford@googlemail.com>
803
804 * NEWS: Note removal of ECOFF support.
805 * doc/as.texinfo (--emulation): Update for the removal of MIPS ECOFF.
806 * Makefile.am (TARG_ENV_HFILES): Remove config/te-lnews.h.
807 (MULTI_CFILES): Remove config/e-mipsecoff.c.
808 * Makefile.in: Regenerate.
809 * configure.in: Remove MIPS ECOFF references.
810 (mips-sony-bsd*, mips-*-bsd*, mips-*-lnews*-ecoff, mips-*-*-ecoff):
811 Delete cases.
812 (mips-*-irix5*-*, mips*-*-linux*-*, mips*-*-freebsd*)
813 (mips*-*-kfreebsd*-gnu, mips-*-*-elf): Fold into...
814 (mips-*-*): ...this single case.
815 (mipsbecoff, mipslecoff, mipsecoff): Remove emulations. Expect
816 MIPS emulations to be e-mipself*.
817 * configure: Regenerate.
818 * configure.tgt (mips-sony-bsd*, mips-*-ultrix*, mips-*-osf*)
819 (mips-*-ecoff*, mips-*-pe*, mips-*-irix*, ips-*-lnews*, mips-*-riscos*)
820 (mips-*-sysv*): Remove coff and ecoff cases.
821 * as.c (mipsbecoff, mipslecoff, mipsecoff): Remove.
822 * ecoff.c: Remove reference to MIPS ECOFF.
823 * config/e-mipsecoff.c, config/te-lnews.h: Delete files.
824 * config/tc-mips.c (ECOFF_LITTLE_FORMAT): Delete.
825 (RDATA_SECTION_NAME, mips_target_form): Remove COFF and ECOFF cases.
826 (mips_hi_fixup): Tweak comment.
827 (append_insn): Require a howto.
828 (mips_after_parse_args): Remove OBJ_MAYBE_ECOFF code.
829
8302013-06-22 Richard Sandiford <rdsandiford@googlemail.com>
831
832 * doc/as.texinfo: Use MIPS rather than @sc{mips} throughout.
833 Use "CPU" instead of "cpu".
834 * doc/c-mips.texi: Likewise.
835 (MIPS Opts): Rename to MIPS Options.
836 (MIPS option stack): Rename to MIPS Option Stack.
837 (MIPS ASE instruction generation overrides): Rename to
838 MIPS ASE Instruction Generation Overrides (for now).
839 (MIPS floating-point): Rename to MIPS Floating-Point.
840
8412013-06-22 Richard Sandiford <rdsandiford@googlemail.com>
842
843 * doc/c-mips.texi (MIPS Macros): New section.
844 (MIPS Object): Replace with...
845 (MIPS Small Data): ...this new section.
846
8472013-06-22 Richard Sandiford <rdsandiford@googlemail.com>
848
849 * doc/c-mips.texi (MIPS symbol sizes): Move section further up file.
850 Capitalize name. Use @kindex instead of @cindex for .set entries.
851
8522013-06-22 Richard Sandiford <rdsandiford@googlemail.com>
853
854 * doc/c-mips.texi (MIPS Stabs): Remove section.
855
8562013-06-20 Richard Sandiford <rdsandiford@googlemail.com>
857
858 * config/tc-mips.c (ISA_SUPPORTS_SMARTMIPS, ISA_SUPPORTS_DSP_ASE)
859 (ISA_SUPPORTS_DSP64_ASE, ISA_SUPPORTS_DSPR2_ASE, ISA_SUPPORTS_EVA_ASE)
860 (ISA_SUPPORTS_MT_ASE, ISA_SUPPORTS_MCU_ASE, ISA_SUPPORTS_VIRT_ASE)
861 (ISA_SUPPORTS_VIRT64_ASE): Delete.
862 (mips_ase): New structure.
863 (mips_ases): New table.
864 (FP64_ASES): New macro.
865 (mips_ase_groups): New array.
866 (mips_isa_rev, mips_ase_mask, mips_check_isa_supports_ase)
867 (mips_check_isa_supports_ases, mips_set_ase, mips_lookup_ase): New
868 functions.
869 (is_opcode_valid): Use mips_ases to get the 64-bit ASE flags.
870 (md_parse_option): Use mips_ases and mips_set_ase instead of
871 separate case statements for each ASE option.
872 (mips_after_parse_args): Use FP64_ASES. Use
873 mips_check_isa_supports_ases to check the ASEs against
874 other options.
875 (s_mipsset): Use mips_ases and mips_set_ase instead of
876 separate if statements for each ASE option. Use
877 mips_check_isa_supports_ases, even when a non-ASE option
878 is specified.
879
8802013-06-19 Greta Yorsh <Greta.Yorsh@arm.com>
881
882 * config/tc-arm.c (arm_cpus): Add support for Cortex-A12.
883
8842013-06-18 Richard Sandiford <rdsandiford@googlemail.com>
885
886 * config/tc-mips.c (md_shortopts, options, md_longopts)
887 (md_longopts_size): Move earlier in file.
888
8892013-06-18 Richard Sandiford <rdsandiford@googlemail.com>
890
891 * config/tc-mips.c (mips_set_options): Replace separate "ase_*" fields
892 with a single "ase" bitmask.
893 (mips_opts): Update accordingly.
894 (file_ase, file_ase_explicit): New variables.
895 (file_ase_mips3d, file_ase_mdmx, file_ase_smartmips, file_ase_dsp)
896 (file_ase_dspr2, file_ase_eva, file_ase_mt, file_ase_virt): Delete.
897 (ISA_HAS_ROR): Adjust for mips_set_options change.
898 (is_opcode_valid): Take the base ase mask directly from mips_opts.
899 (mips_ip): Adjust for mips_set_options change.
900 (md_parse_option): Likewise. Update file_ase_explicit.
901 (mips_after_parse_args): Adjust for mips_set_options change.
902 Use bitmask operations to select the default ASEs. Set file_ase
903 rather than individual per-ASE variables.
904 (s_mipsset): Adjust for mips_set_options change.
905 (mips_elf_final_processing): Test file_ase rather than
906 file_ase_mdmx. Remove commented-out code.
907
9082013-06-18 Richard Sandiford <rdsandiford@googlemail.com>
909
910 * config/tc-mips.c (mips_cpu_info): Add an "ase" field.
911 (MIPS_CPU_ASE_SMARTMIPS, MIPS_CPU_ASE_DSP, MIPS_CPU_ASE_MT)
912 (MIPS_CPU_ASE_MIPS3D, MIPS_CPU_ASE_MDMX, MIPS_CPU_ASE_DSPR2)
913 (MIPS_CPU_ASE_MCU, MIPS_CPU_ASE_VIRT, MIPS_CPU_ASE_EVA): Delete.
914 (mips_after_parse_args): Use the new "ase" field to choose
915 the default ASEs.
916 (mips_cpu_info_table): Move ASEs from the "flags" field to the
917 "ase" field.
918
9192013-06-18 Richard Earnshaw <rearnsha@arm.com>
920
921 * config/tc-arm.c (symbol_preemptible): New function.
922 (relax_branch): Use it.
923
9242013-06-17 Catherine Moore <clm@codesourcery.com>
925 Maciej W. Rozycki <macro@codesourcery.com>
926 Chao-Ying Fu <fu@mips.com>
927
928 * config/tc-mips.c (mips_set_options): Add ase_eva.
929 (mips_set_options mips_opts): Add ase_eva.
930 (file_ase_eva): Declare.
931 (ISA_SUPPORTS_EVA_ASE): Define.
932 (IS_SEXT_9BIT_NUM): Define.
933 (MIPS_CPU_ASE_EVA): Define.
934 (is_opcode_valid): Add support for ase_eva.
935 (macro_build): Likewise.
936 (macro): Likewise.
937 (validate_mips_insn): Likewise.
938 (validate_micromips_insn): Likewise.
939 (mips_ip): Likewise.
940 (options): Add OPTION_EVA and OPTION_NO_EVA.
941 (md_longopts): Add -meva and -mno-eva.
942 (md_parse_option): Process new options.
943 (mips_after_parse_args): Check for valid EVA combinations.
944 (s_mipsset): Likewise.
945
9462013-06-14 Richard Sandiford <rsandifo@linux.vnet.ibm.com>
947
948 * dwarf2dbg.h (dwarf2_move_insn): Declare.
949 * dwarf2dbg.c (line_subseg): Add pmove_tail.
950 (get_line_subseg): Add create_p argument. Initialize pmove_tail.
951 (dwarf2_gen_line_info_1): Update call accordingly.
952 (dwarf2_move_insn): New function.
953 * config/tc-mips.c (append_insn): Use dwarf2_move_insn.
954
9552013-06-14 Richard Sandiford <rsandifo@linux.vnet.ibm.com>
956
957 Revert:
958
959 2011-09-05 Richard Sandiford <rdsandiford@googlemail.com>
960
961 PR gas/13024
962 * dwarf2dbg.c (pending_lines, pending_lines_tail): New variables.
963 (dwarf2_gen_line_info_1): Delete.
964 (dwarf2_push_line, dwarf2_flush_pending_lines): New functions.
965 (dwarf2_gen_line_info, dwarf2_emit_label): Use them.
966 (dwarf2_consume_line_info): Call dwarf2_flush_pending_lines.
967 (dwarf2_directive_loc): Push previous .locs instead of generating
968 them immediately.
969
9702013-06-13 Chao-ying Fu <Chao-ying.Fu@imgtec.com>
971
972 * config/tc-mips.c (ISA_SUPPORTS_VIRT_ASE): Support micromips.
973 (ISA_SUPPORTS_VIRT64_ASE): Support 64-bit micromips.
974
9752013-06-13 Nick Clifton <nickc@redhat.com>
976
977 PR gas/15602
978 * config/tc-m68k.h (TC_CHECK_ADJUSTED_BROKEN_DOT_WORD): Define.
979 * config/tc-m68k.c (tc_m68k_check_adjusted_broken_word): New
980 function. Generates an error if the adjusted offset is out of a
981 16-bit range.
982
9832013-06-12 Sandra Loosemore <sandra@codesourcery.com>
984
985 * config/tc-nios2.c (md_apply_fix): Mask constant
986 BFD_RELOC_NIOS2_HIADJ16 value to 16 bits.
987
9882013-06-10 Maciej W. Rozycki <macro@codesourcery.com>
989
990 * config/tc-mips.c (append_insn): Don't do branch relaxation for
991 MIPS-3D instructions either.
992 (md_convert_frag): Update the COPx branch mask accordingly.
993
994 * config/tc-mips.c (md_show_usage): Document --[no-]relax-branch
995 option.
996 * doc/as.texinfo (Overview): Add --relax-branch and
997 --no-relax-branch.
998 * doc/c-mips.texi (MIPS Opts): Document --relax-branch and
999 --no-relax-branch.
1000
10012013-06-09 Sandra Loosemore <sandra@codesourcery.com>
1002
1003 * config/tc-nios2.c (nios2_parse_args): Allow trap argument to
1004 omitted.
1005
10062013-06-08 Catherine Moore <clm@codesourcery.com>
1007
1008 * config/tc-mips.c (is_opcode_valid): Build ASE mask.
1009 (is_opcode_valid_16): Pass ase value to opcode_is_member.
1010 (append_insn): Change INSN_xxxx to ASE_xxxx.
1011
10122013-06-01 George Thomas <george.thomas@atmel.com>
1013
1014 * gas/config/tc-avr.c: Change ISA for devices with USB support to
1015 AVR_ISA_XMEGAU
1016
10172013-05-31 H.J. Lu <hongjiu.lu@intel.com>
1018
1019 * config/tc-i386.c (md_begin): Don't align text/data/bss sections
1020 for ELF.
1021
10222013-05-31 Paul Brook <paul@codesourcery.com>
1023
1024 * config/tc-mips.c (s_ehword): New.
1025
10262013-05-30 Paul Brook <paul@codesourcery.com>
1027
1028 * config/tc-mips.c (md_apply_fix): Support BFD_RELOC_MIPS_EH.
1029
10302013-05-29 Maciej W. Rozycki <macro@codesourcery.com>
1031
1032 * write.c (resolve_reloc_expr_symbols): On REL targets don't
1033 convert relocs who have no relocatable field either. Rephrase
1034 the conditional so that the PC-relative check is only applied
1035 for REL targets.
1036
10372013-05-28 Chao-ying Fu <Chao-ying.Fu@imgtec.com>
1038
1039 * config/tc-mips.c (macro) <ld>: Don't use $zero for address
1040 calculation.
1041
10422013-05-28 Yufeng Zhang <yufeng.zhang@arm.com>
1043
1044 * config/tc-aarch64.c (reloc_table): Update to use
1045 BFD_RELOC_AARCH64_TLSDESC_ADR_PAGE21 instead of
1046 BFD_RELOC_AARCH64_TLSDESC_ADR_PAGE.
1047 (md_apply_fix): Likewise.
1048 (aarch64_force_relocation): Likewise.
1049
10502013-05-28 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
1051
1052 * config/tc-arm.c (it_fsm_post_encode): Improve
1053 warning messages about deprecated IT block formats.
1054
10552013-05-28 Marcus Shawcroft <marcus.shawcroft@arm.com>
1056
1057 * config/tc-aarch64.c (md_apply_fix): Move value range checking
1058 inside fx_done condition.
1059
10602013-05-22 Jürgen Urban <JuergenUrban@gmx.de>
1061
1062 * config/tc-mips.c (macro): Handle M_LQC2_AB and M_SQC2_AB.
1063
10642013-05-20 Peter Bergner <bergner@vnet.ibm.com>
1065
1066 * config/tc-ppc.c (ppc_setup_opcodes): Use new_seg to fix error
1067 and clean up warning when using PRINT_OPCODE_TABLE.
1068
10692013-05-20 Alan Modra <amodra@gmail.com>
1070
1071 * config/tc-ppc.c (md_apply_fix): Hoist code common to insn
1072 and data fixups performing shift/high adjust/sign extension on
1073 fieldval. Sink fx_pcrel handling and checks. Use fixP->fx_size
1074 when writing data fixups rather than recalculating size.
1075
10762013-05-16 Jan-Benedict Glaw <jbglaw@lug-owl.de>
1077
1078 * doc/c-msp430.texi: Fix typo.
1079
10802013-05-16 Tristan Gingold <gingold@adacore.com>
1081
1082 * config/tc-ppc.c (ppc_is_toc_sym): Symbols of class XMC_TC
1083 are also TOC symbols.
1084
10852013-05-16 Nick Clifton <nickc@redhat.com>
1086
1087 * config/tc-msp430.c: Make -mmcu recognise more part numbers.
1088 Add -mcpu command to specify core type.
1089 * doc/c-msp430.texi: Update documentation.
1090
10912013-05-09 Andrew Pinski <apinski@cavium.com>
1092
1093 * config/tc-mips.c (struct mips_set_options): New ase_virt field.
1094 (mips_opts): Update for the new field.
1095 (file_ase_virt): New variable.
1096 (ISA_SUPPORTS_VIRT_ASE): New macro.
1097 (ISA_SUPPORTS_VIRT64_ASE): New macro.
1098 (MIPS_CPU_ASE_VIRT): New define.
1099 (is_opcode_valid): Handle ase_virt.
1100 (macro_build): Handle "+J".
1101 (validate_mips_insn): Likewise.
1102 (mips_ip): Likewise.
1103 (enum options): Add OPTION_VIRT and OPTION_NO_VIRT.
1104 (md_longopts): Add mvirt and mnovirt
1105 (md_parse_option): Handle OPTION_VIRT and OPTION_NO_VIRT.
1106 (mips_after_parse_args): Handle ase_virt field.
1107 (s_mipsset): Handle "virt" and "novirt".
1108 (mips_elf_final_processing): Add a comment about virt ASE might need
1109 a new flag.
1110 (md_show_usage): Print out the usage of -mvirt and mno-virt options.
1111 * doc/c-mips.texi: Document -mvirt and -mno-virt.
1112 Document ".set virt" and ".set novirt".
1113
11142013-05-09 Alan Modra <amodra@gmail.com>
1115
1116 * config/tc-ppc.c (md_apply_fix): Sign extend fieldval under
1117 control of operand flag bits.
1118
11192013-05-07 Alan Modra <amodra@gmail.com>
1120
1121 * config/tc-ppc.c (PPC_VLE_SPLIT16A): Delete unused macro.
1122 (PPC_VLE_SPLIT16D, PPC_VLE_LO16A, PPC_VLE_LO16D): Likewise.
1123 (PPC_VLE_HI16A, PPC_VLE_HI16D): Likewise.
1124 (PPC_VLE_HA16A, PPC_VLE_HA16D): Likewise.
1125 (md_apply_fix): Set fx_no_overflow for assorted relocations.
1126 Shift and sign-extend fieldval for use by some VLE reloc
1127 operand->insert functions.
1128
11292013-05-06 Paul Brook <paul@codesourcery.com>
1130 Catherine Moore <clm@codesourcery.com>
1131
1132 * config/tc-mips.c (md_pcrel_from): Handle BFD_RELOC_32_PCREL.
1133 (limited_pcrel_reloc_p): Likewise.
1134 (md_apply_fix): Likewise.
1135 (tc_gen_reloc): Likewise.
1136
11372013-05-06 Richard Sandiford <rdsandiford@googlemail.com>
1138
1139 * config/tc-mips.c (limited_pcrel_reloc_p): New function.
1140 (mips_fix_adjustable): Adjust pc-relative check to use
1141 limited_pc_reloc_p.
1142
11432013-05-02 Richard Sandiford <rdsandiford@googlemail.com>
1144
1145 * config/tc-mips.c (mips_pseudo_table): Add stabd and stabs entries.
1146 (s_mips_stab): Do not restrict to stabn only.
1147
11482013-05-02 Nick Clifton <nickc@redhat.com>
1149
1150 * config/tc-msp430.c: Add support for the MSP430X architecture.
1151 Add code to insert a NOP instruction after any instruction that
1152 might change the interrupt state.
1153 Add support for the LARGE memory model.
1154 Add code to initialise the .MSP430.attributes section.
1155 * config/tc-msp430.h: Add support for the MSP430X architecture.
1156 * doc/c-msp430.texi: Document the new -mL and -mN command line
1157 options.
1158 * NEWS: Mention support for the MSP430X architecture.
1159
11602013-05-01 Maciej W. Rozycki <macro@codesourcery.com>
1161
1162 * configure.tgt: Replace alpha*-*-linuxecoff* pattern with
1163 alpha*-*-linux*ecoff*.
1164
11652013-04-30 Chao-ying Fu <Chao-ying.Fu@imgtec.com>
1166
1167 * config/tc-mips.c (mips_ip): Add sizelo.
1168 For "+C", "+G", and "+H", set sizelo and compare against it.
1169
11702013-04-29 Nick Clifton <nickc@redhat.com>
1171
1172 * as.c (Options): Add -gdwarf-sections.
1173 (parse_args): Likewise.
1174 * as.h (flag_dwarf_sections): Declare.
1175 * dwarf2dbg.c (emit_fixed_inc_line_addr): Skip section changes.
1176 (process_entries): When -gdwarf-sections is enabled generate
1177 fragmentary .debug_line sections.
1178 (out_debug_line): Set the section for the .debug_line section end
1179 symbol.
1180 * doc/as.texinfo: Document -gdwarf-sections.
1181 * NEWS: Mention -gdwarf-sections.
1182
11832013-04-26 Christian Groessler <chris@groessler.org>
1184
1185 * config/tc-z8k.c (md_parse_option): Set z8k_target_from_cmdline
1186 according to the target parameter. Don't call s_segm since s_segm
1187 calls bfd_set_arch_mach using stdoutput, but stdoutput isn't
1188 initialized yet.
1189 (md_begin): Call s_segm according to target parameter from command
1190 line.
1191
11922013-04-25 Alan Modra <amodra@gmail.com>
1193
1194 * configure.in: Allow little-endian linux.
1195 * configure: Regenerate.
1196
11972013-04-24 Sandra Loosemore <sandra@codesourcery.com>
1198
1199 * config/tc-nios2.c (nios2_control_register_arg_p): Rename
1200 "fstatus" control register to "eccinj".
1201
12022013-04-19 Kai Tietz <ktietz@redhat.com>
1203
1204 * configure.tgt (i386-*-cygwin): Handle x86_64 cygwin.
1205
12062013-04-15 Julian Brown <julian@codesourcery.com>
1207
1208 * expr.c (add_to_result, subtract_from_result): Make global.
1209 * expr.h (add_to_result, subtract_from_result): Add prototypes.
1210 * config/tc-sh.c (sh_optimize_expr): Use add_to_result,
1211 subtract_from_result to handle extra bit of precision for .sleb128
1212 directive operands.
1213
12142013-04-10 Julian Brown <julian@codesourcery.com>
1215
1216 * read.c (convert_to_bignum): Add sign parameter. Use it
1217 instead of X_unsigned to determine sign of resulting bignum.
1218 (emit_expr): Pass extra argument to convert_to_bignum.
1219 (emit_leb128_expr): Use X_extrabit instead of X_unsigned. Pass
1220 X_extrabit to convert_to_bignum.
1221 (parse_bitfield_cons): Set X_extrabit.
1222 * expr.c (make_expr_symbol, expr_build_uconstant, operand):
1223 Initialise X_extrabit field as appropriate.
1224 (add_to_result): New.
1225 (subtract_from_result): New.
1226 (expr): Use above.
1227 * expr.h (expressionS): Add X_extrabit field.
1228
12292013-04-10 Jan Beulich <jbeulich@suse.com>
1230
1231 * gas/config/tc-arm.c (encode_arm_addr_mode_3): Only reject base
1232 register being PC when is_t or writeback, and use distinct
1233 diagnostic for the latter case.
1234
12352013-04-10 Jan Beulich <jbeulich@suse.com>
1236
1237 * gas/config/tc-arm.c (parse_operands): Re-write
1238 po_barrier_or_imm().
1239 (do_barrier): Remove bogus constraint().
1240 (do_t_barrier): Remove.
1241
12422013-04-09 Joerg Wunsch <joerg.wunsch@atmel.com>
1243
1244 * gas/config/tc-avr.c (mcu_types): Add ATmega64RFR2,
1245 ATmega644RFR2, ATmega128RFR2, ATmega1284RFR2, ATmega256RFR2,
1246 ATmega2564RFR2
1247 * gas/doc/c-avr.texi (-mmcu documentation): Likewise.
1248
12492013-04-09 Jan Beulich <jbeulich@suse.com>
1250
1251 * gas/config/tc-arm.c (do_vmrs): Accept all control registers.
1252 Use local variable Rt in more places.
1253 (do_vmsr): Accept all control registers.
1254
12552013-04-09 Jan Beulich <jbeulich@suse.com>
1256
1257 * gas/config/tc-arm.c (do_neon_mov): Fake an instruction suffix
1258 if there was none specified for moves between scalar and core
1259 register.
1260
12612013-04-09 Jan Beulich <jbeulich@suse.com>
1262
1263 * gas/config/tc-arm.c (do_neon_ldx_stx): Reject VSTn in the
1264 NEON_ALL_LANES case.
1265
12662013-04-08 Jan Beulich <jbeulich@suse.com>
1267
1268 * gas/config/tc-arm.c (do_neon_ldr_str): Correct disgnostics for
1269 PC-relative VSTR.
1270
12712013-04-08 Jan Beulich <jbeulich@suse.com>
1272
1273 * gas/config/tc-arm.c (reg_names): Convert duplicate SP_fiq
1274 entry to sp_fiq.
1275
12762013-04-03 Alan Modra <amodra@gmail.com>
1277
1278 * doc/as.texinfo: Add support to generate man options for h8300.
1279 * doc/c-h8300.texi: Likewise.
1280
12812013-03-28 Ramana Radhakrishnan <ramana.radhakrishnan@arm.com>
1282
1283 * config/tc-arm.c (arm_cpus): Add support for Cortex-A53 and
1284 Cortex-A57.
1285
12862013-03-27 Alexis Deruelle <alexis.deruelle@gmail.com>
1287
1288 PR binutils/15068
1289 * config/tc-tic6x.c (tic6x_try_encode): Add use of bitfields array.
1290
12912013-03-26 Nick Clifton <nickc@redhat.com>
1292
1293 PR gas/15295
1294 * listing.c (rebuffer_line): Rewrite to avoid seeking back to the
1295 start of the file each time.
1296
1297 PR gas/15178
1298 * config/tc-sparc.h (ELF_TARGET_FORMAT): Set to elf32-sparc for
1299 FreeBSD targets.
1300
13012013-03-26 Douglas B Rupp <rupp@gnat.com>
1302
1303 * config/tc-ia64.c (emit_one_bundle): Move last_slot adjustment
1304 after fixup.
1305
13062013-03-21 Will Newton <will.newton@linaro.org>
1307
1308 * config/tc-arm.c (encode_thumb32_addr_mode): Emit an error for all
1309 pc-relative str instructions in Thumb mode.
1310
13112013-03-21 Michael Schewe <michael.schewe@gmx.net>
1312
1313 * config/tc-h8300.c (do_a_fix_imm): Add relaxation of mov
1314 @(disp:32,ERx) to mov @(disp:16,ERx) insns by new reloc
1315 R_H8_DISP32A16.
1316 * config/tc-h8300.h: Remove duplicated defines.
1317
13182013-03-21 Senthil Kumar Selvaraj <senthil_kumar.selvaraj@atmel.com>
1319
1320 PR gas/15282
1321 * tc-avr.c (mcu_has_3_byte_pc): New function.
1322 (tc_cfi_frame_initial_instructions): Call it to find return
1323 address size.
1324
13252013-03-20 Alexis Deruelle <alexis.deruelle@gmail.com>
1326
1327 PR gas/15095
1328 * config/tc-tic6x.c (tic6x_try_encode): Handle
1329 tic6x_coding_dreg_(msb|lsb) field coding types and use it to
1330 encode register pair numbers when required.
1331
13322013-03-15 Will Newton <will.newton@linaro.org>
1333
1334 * config/tc-arm.c (do_neon_ldr_str): Fix error check for PC register
1335 in vstr in Thumb mode for pre-ARMv7 cores.
1336
13372013-03-14 Andreas Schwab <schwab@suse.de>
1338
1339 * doc/c-arc.texi (ARC Directives): Revert last change and use
1340 @itemize instead of @table.
1341 * doc/c-arm.texi (ARM-Instruction-Set): Likewise.
1342
13432013-03-14 Nick Clifton <nickc@redhat.com>
1344
1345 PR gas/15273
1346 * config/tc-arm.c (do_co_reg): Do not call check_obsolete with a
1347 NULL message, instead just check ARM_CPU_IS_ANY directly.
1348
13492013-03-14 Nick Clifton <nickc@redhat.com>
1350
1351 PR gas/15212
1352 * doc/c-arc.texi (ARC Directives): Use @code instead of @bullet
1353 for table format.
1354 * doc/c-arm.texi (ARM-Instruction-Set): Likewise. Also add text
1355 to the @item directives.
1356 (ARM-Neon-Alignment): Move to correct place in the document.
1357 * doc/c-cr16.texi (CR16 Operand Qualifiers): Fix up table
1358 formatting.
1359 * doc/c-tic54x.texi (TIC54X-Subsyms): Correct use of
1360 @smallexample.
1361
13622013-03-12 Sebastian Huber <sebastian.huber@embedded-brains.de>
1363
1364 * config/tc-nios2.c (nios2_consume_arg): Delete 'k' case. Add 'o'
1365 case. Add default BAD_CASE to switch.
1366
13672013-03-11 Sebastian Huber <sebastian.huber@embedded-brains.de>
1368
1369 * config/tc-nios2.c (nios2_assemble_args_ds): New function.
1370 (nios2_arg_info_structs): Add "d,s" and "d,s,E" entries.
1371
13722013-03-11 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
1373
1374 * config/tc-arm.c (crc_ext_armv8): New feature set.
1375 (UNPRED_REG): New macro.
1376 (do_crc32_1): New function.
1377 (do_crc32b, do_crc32h, do_crc32w, do_crc32cb,
1378 do_crc32ch, do_crc32cw): Likewise.
1379 (TUEc): New macro.
1380 (insns): Add entries for crc32 mnemonics.
1381 (arm_extensions): Add entry for crc.
1382
13832013-03-08 Chung-Lin Tang <cltang@codesourcery.com>
1384
1385 * write.h (struct fix): Add fx_dot_frag field.
1386 (dot_frag): Declare.
1387 * write.c (dot_frag): New variable.
1388 (fix_new_internal): Set fx_dot_frag field with dot_frag.
1389 (fixup_segment): Base calculation of fx_offset with fx_dot_frag.
1390 * expr.c (expr): Save value of frag_now in dot_frag when setting
1391 dot_value.
1392 * read.c (emit_expr): Likewise. Delete comments.
1393
13942013-03-07 H.J. Lu <hongjiu.lu@intel.com>
1395
1396 * config/tc-i386.c (flag_code_names): Removed.
1397 (i386_index_check): Rewrote.
1398
13992013-03-05 Yufeng Zhang <yufeng.zhang@arm.com>
1400
1401 * config/tc-aarch64.c (aarch64_imm_float_p): Rename 'e' to 'pattern';
1402 add comment.
1403 (aarch64_double_precision_fmovable): New function.
1404 (parse_aarch64_imm_float): Add parameter 'dp_p'; call the new
1405 function; handle hexadecimal representation of IEEE754 encoding.
1406 (parse_operands): Update the call to parse_aarch64_imm_float.
1407
14082013-02-28 H.J. Lu <hongjiu.lu@intel.com>
1409
1410 * config/tc-i386.c (_i386_insn): Replace have_hle with hle_prefix.
1411 (check_hle): Updated.
1412 (md_assemble): Likewise.
1413 (parse_insn): Likewise.
1414
14152013-02-28 H.J. Lu <hongjiu.lu@intel.com>
1416
1417 * config/tc-i386.c (_i386_insn): Add rep_prefix.
1418 (md_assemble): Check if REP prefix is OK.
1419 (parse_insn): Remove expecting_string_instruction. Set
1420 i.rep_prefix.
1421
14222013-02-28 Yufeng Zhang <yufeng.zhang@arm.com>
1423
1424 * config/tc-aarch64.c (aarch64_features): Add the 'crc' option.
1425
14262013-02-28 Yufeng Zhang <yufeng.zhang@arm.com>
1427
1428 * config/tc-aarch64.c (parse_sys_reg): Allow the full range of CRn
1429 for system registers.
1430
14312013-02-27 DJ Delorie <dj@redhat.com>
1432
1433 * config/tc-rl78.c (reloc_function): Add %code -> BFD_RELOC_RL78_CODE.
1434 (rl78_op): Handle %code().
1435 (rl78_cons_fix_new): Likewise, but ignore for 20-bit operands.
1436 (tc_gen_reloc): Likwise; convert to a computed reloc.
1437 (md_apply_fix): Likewise.
1438
14392013-02-25 Kaushik Phatak <Kaushik.Phatak@kpitcummins.com>
1440
1441 * config/rl78-parse.y: Fix encoding of DIVWU insn.
1442
14432013-02-25 Terry Guo <terry.guo@arm.com>
1444
1445 * config/tc-arm.c (arm_cpus): Add cortex-r7 entry.
1446 * doc/c-arm.texi: Add cortex-r7 and missing cortex-r5 to
1447 list of accepted CPUs.
1448
14492013-02-19 H.J. Lu <hongjiu.lu@intel.com>
1450
1451 PR gas/15159
1452 * config/tc-i386.c (cpu_arch): Add ".smap".
1453
1454 * doc/c-i386.texi: Document smap.
1455
14562013-02-18 Maciej W. Rozycki <macro@codesourcery.com>
1457
1458 * config/tc-mips.c (s_cpload): Call mips_mark_labels and set
1459 mips_assembling_insn appropriately.
1460 (s_cpsetup, s_cprestore, s_cpreturn, s_cpadd): Likewise.
1461
14622013-02-18 Maciej W. Rozycki <macro@codesourcery.com>
1463
1464 * config/tc-mips.c (append_insn): Correct indentation, remove
1465 extraneous braces.
1466
14672013-02-15 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
1468
1469 * config/tc-arm.c (do_neon_mov): Break on NS_NULL.
1470
14712013-02-15 Sebastian Huber <sebastian.huber@embedded-brains.de>
1472
1473 * configure.tgt: Add nios2-*-rtems*.
1474
14752013-02-14 Yufeng Zhang <yufeng.zhang@arm.com>
1476
1477 * config/tc-aarch64.c (md_begin): Change to check if 'name' is
1478 NULL.
1479
14802013-02-09 Jürgen Urban <JuergenUrban@gmx.de>
1481
1482 * config/tc-mips.c (CPU_HAS_LDC1_SDC1): New macro.
1483 (macro): Use it. Assert that trunc.w.s is not used for r5900.
1484
14852013-02-08 Yi-Hsiu, Hsu <ahsu@marvell.com>
1486
1487 * gas/config/tc-arm.c (arm_cpus): Add support for mcpu=marvell-pj4
1488 core.
1489
14902013-02-06 Sandra Loosemore <sandra@codesourcery.com>
1491 Andrew Jenner <andrew@codesourcery.com>
1492
1493 Based on patches from Altera Corporation.
1494
1495 * Makefile.am (TARGET_CPU_CFILES): Add config/tc-nios2.c.
1496 (TARGET_CPU_HFILES): Add config/tc-nios2.h.
1497 * Makefile.in: Regenerated.
1498 * configure.tgt: Add case for nios2*-linux*.
1499 * config/obj-elf.c: Conditionally include elf/nios2.h.
1500 * config/tc-nios2.c: New file.
1501 * config/tc-nios2.h: New file.
1502 * doc/Makefile.am (CPU_DOCS): Add c-nios2.texi.
1503 * doc/Makefile.in: Regenerated.
1504 * doc/all.texi: Set NIOSII.
1505 * doc/as.texinfo (Overview): Add Nios II options.
1506 (Machine Dependencies): Include c-nios2.texi.
1507 * doc/c-nios2.texi: New file.
1508 * NEWS: Note Altera Nios II support.
1509
15102013-02-06 Alan Modra <amodra@gmail.com>
1511
1512 PR gas/14255
1513 * config/tc-avr.h (TC_VALIDATE_FIX): Mark symbol used by reloc.
1514 Don't skip fixups with fx_subsy non-NULL.
1515 * config/tc-avr.c (tc_gen_reloc): Don't specially handle fixups
1516 with fx_subsy non-NULL.
1517
15182013-02-04 H.J. Lu <hongjiu.lu@intel.com>
1519
1520 * doc/c-metag.texi: Add "@c man" markers.
1521
15222013-02-04 Alan Modra <amodra@gmail.com>
1523
1524 * write.c (fixup_segment): Return void. Delete seg_reloc_count
1525 related code.
1526 (TC_ADJUST_RELOC_COUNT): Delete.
1527 * config/tc-i960.h (TC_ADJUST_RELOC_COUNT): Delete.
1528
15292013-02-04 Alan Modra <amodra@gmail.com>
1530
1531 * po/POTFILES.in: Regenerate.
1532
15332013-01-30 Markos Chandras <markos.chandras@imgtec.com>
1534
1535 * config/tc-metag.c: Make SWAP instruction less permissive with
1536 its operands.
1537
15382013-01-29 DJ Delorie <dj@redhat.com>
1539
1540 * config/tc-rl78.c (rl78_cons_fix_new): Handle user-specified
1541 relocs in .word/.etc statements.
1542
15432013-01-29 Roland McGrath <mcgrathr@google.com>
1544
1545 * config/tc-arm.c (md_apply_fix): Use as_bad_where for "bad
1546 immediate value for 8-bit offset" error so it shows line info.
1547
15482013-01-24 Joseph Myers <joseph@codesourcery.com>
1549
1550 * config/tc-ppc.c (md_assemble): Do not generate APUinfo sections
1551 for 64-bit output.
1552
15532013-01-24 Nick Clifton <nickc@redhat.com>
1554
1555 * config/tc-v850.c: Add support for e3v5 architecture.
1556 * doc/c-v850.texi: Mention new support.
1557
15582013-01-23 Nick Clifton <nickc@redhat.com>
1559
1560 PR gas/15039
1561 * config/tc-avr.c: Include dwarf2dbg.h.
1562
15632013-01-18 H.J. Lu <hongjiu.lu@intel.com>
1564
1565 * config/tc-i386.c (reloc): Support size relocation only for ELF.
1566 (tc_i386_fix_adjustable): Likewise.
1567 (lex_got): Likewise.
1568 (tc_gen_reloc): Likewise.
1569
15702013-01-17 Yufeng Zhang <yufeng.zhang@arm.com>
1571
1572 * config/tc-aarch64.c (output_operand_error_record): Change to output
1573 the out-of-range error message as value-expected message if there is
1574 only one single value in the expected range.
1575 (programmer_friendly_fixup): Remove the handling of 8-bit MOVI with
1576 LSL #0 as a programmer-friendly feature.
1577
15782013-01-16 H.J. Lu <hongjiu.lu@intel.com>
1579
1580 * config/tc-i386.c (reloc): Support BFD_RELOC_SIZE32.
1581 (tc_i386_fix_adjustable): Keep symbol for BFD_RELOC_32_SIZE and
1582 BFD_RELOC_64_SIZE relocations.
1583 (lex_got): Support "symbol@SIZE" and don't create GOT symbol
1584 for it.
1585 (tc_gen_reloc): Resolve BFD_RELOC_SIZE32 and BFD_RELOC_SIZE64
1586 relocations against local symbols.
1587
15882013-01-16 Alan Modra <amodra@gmail.com>
1589
1590 * config/tc-ppc.c (md_assemble <TE_PE>): Ignore line after
1591 finding some sort of toc syntax error, and break to avoid
1592 compiler uninit warning.
1593
15942013-01-15 H.J. Lu <hongjiu.lu@intel.com>
1595
1596 PR gas/15019
1597 * config/tc-i386.c (lex_got): Increment length by 1 if the
1598 relocation token is removed.
1599
16002013-01-15 Nick Clifton <nickc@redhat.com>
1601
1602 * config/tc-v850.c (md_assemble): Allow signed values for
1603 V850E_IMMEDIATE.
1604
16052013-01-11 Sean Keys <skeys@ipdatasys.com>
1606
1607 * config/tc-xgate.c (md_begin): Fix mistake made when going from
1608 git to cvs.
1609
16102013-01-10 Peter Bergner <bergner@vnet.ibm.com>
1611
1612 * doc/as.texinfo (Target PowerPC): Document -mpower8 and -mhtm.
1613 * doc/c-ppc.texi (PowerPC-Opts): Likewise.
1614 * config/tc-ppc.c (md_show_usage): Likewise.
1615 (ppc_handle_align): Handle power8's group ending nop.
1616
16172013-01-10 Sean Keys <skeys@ipdatasys.com>
1618
1619 * config/tc-xgate.c (md_begin): Fix the printing of opcodes so
1620 that the assember exits after the opcodes have been printed.
1621
16222013-01-10 H.J. Lu <hongjiu.lu@intel.com>
1623
1624 * app.c: Remove trailing white spaces.
1625 * as.c: Likewise.
1626 * as.h: Likewise.
1627 * cond.c: Likewise.
1628 * dw2gencfi.c: Likewise.
1629 * dwarf2dbg.h: Likewise.
1630 * ecoff.c: Likewise.
1631 * input-file.c: Likewise.
1632 * itbl-lex.h: Likewise.
1633 * output-file.c: Likewise.
1634 * read.c: Likewise.
1635 * sb.c: Likewise.
1636 * subsegs.c: Likewise.
1637 * symbols.c: Likewise.
1638 * write.c: Likewise.
1639 * config/tc-i386.c: Likewise.
1640 * doc/Makefile.am: Likewise.
1641 * doc/Makefile.in: Likewise.
1642 * doc/c-aarch64.texi: Likewise.
1643 * doc/c-alpha.texi: Likewise.
1644 * doc/c-arc.texi: Likewise.
1645 * doc/c-arm.texi: Likewise.
1646 * doc/c-avr.texi: Likewise.
1647 * doc/c-bfin.texi: Likewise.
1648 * doc/c-cr16.texi: Likewise.
1649 * doc/c-d10v.texi: Likewise.
1650 * doc/c-d30v.texi: Likewise.
1651 * doc/c-h8300.texi: Likewise.
1652 * doc/c-hppa.texi: Likewise.
1653 * doc/c-i370.texi: Likewise.
1654 * doc/c-i386.texi: Likewise.
1655 * doc/c-i860.texi: Likewise.
1656 * doc/c-m32c.texi: Likewise.
1657 * doc/c-m32r.texi: Likewise.
1658 * doc/c-m68hc11.texi: Likewise.
1659 * doc/c-m68k.texi: Likewise.
1660 * doc/c-microblaze.texi: Likewise.
1661 * doc/c-mips.texi: Likewise.
1662 * doc/c-msp430.texi: Likewise.
1663 * doc/c-mt.texi: Likewise.
1664 * doc/c-s390.texi: Likewise.
1665 * doc/c-score.texi: Likewise.
1666 * doc/c-sh.texi: Likewise.
1667 * doc/c-sh64.texi: Likewise.
1668 * doc/c-tic54x.texi: Likewise.
1669 * doc/c-tic6x.texi: Likewise.
1670 * doc/c-v850.texi: Likewise.
1671 * doc/c-xc16x.texi: Likewise.
1672 * doc/c-xgate.texi: Likewise.
1673 * doc/c-xtensa.texi: Likewise.
1674 * doc/c-z80.texi: Likewise.
1675 * doc/internals.texi: Likewise.
1676
16772013-01-10 Roland McGrath <mcgrathr@google.com>
1678
1679 * hash.c (hash_new_sized): Make it global.
1680 * hash.h: Declare it.
1681 * macro.c (define_macro): Use hash_new_sized instead of hash_new,
1682 pass a small size.
1683
16842013-01-10 Will Newton <will.newton@imgtec.com>
1685
1686 * Makefile.am: Add Meta.
1687 * Makefile.in: Regenerate.
1688 * config/tc-metag.c: New file.
1689 * config/tc-metag.h: New file.
1690 * configure.tgt: Add Meta.
1691 * doc/Makefile.am: Add Meta.
1692 * doc/Makefile.in: Regenerate.
1693 * doc/all.texi: Add Meta.
1694 * doc/as.texiinfo: Document Meta options.
1695 * doc/c-metag.texi: New file.
1696
16972013-01-09 Steve Ellcey <sellcey@mips.com>
1698
1699 * config/tc-i386.c (md_begin): Remove 'internal Error' from as_fatal
1700 calls.
1701 * config/tc-mips.c (internalError): Remove, replace with abort.
1702
17032013-01-08 Yufeng Zhang <yufeng.zhang@arm.com>
1704
1705 * config/tc-aarch64.c (parse_operands): Change to compare the result
1706 of function call 'parse_sys_reg' with 'PARSE_FAIL' instead of 'FALSE'.
1707
17082013-01-07 Nick Clifton <nickc@redhat.com>
1709
1710 PR gas/14887
1711 * config/tc-arm.c (skip_past_char): Skip whitespace before the
1712 anticipated character.
1713 * config/tc-arm.c (parse_address_main): Delete skip of whitespace
1714 here as it is no longer needed.
1715
17162013-01-06 Andreas Schwab <schwab@linux-m68k.org>
1717
1718 * doc/c-mips.texi (MIPS Opts): Fix use of @itemx.
1719 * doc/c-score.texi (SCORE-Opts): Likewise.
1720 * doc/c-tic54x.texi (TIC54X-Directives): Likewise.
1721
17222013-01-04 Juergen Urban <JuergenUrban@gmx.de>
1723
1724 * config/tc-mips.c: Add support for MIPS r5900.
1725 Add M_LQ_AB and M_SQ_AB to support large values for instructions
1726 lq and sq.
1727 (can_swap_branch_p, get_append_method): Detect some conditional
1728 short loops to fix a bug on the r5900 by NOP in the branch delay
1729 slot.
1730 (M_MUL): Support 3 operands in multu on r5900.
1731 (M_TRUNCWS): Support trunc.w.s on r5900 in MIPS ISA I.
1732 (s_mipsset): Force 32 bit floating point on r5900.
1733 (mips_ip): Check parameter range of instructions mfps and mtps on
1734 r5900.
1735 * configure.in: Detect CPU type when target string contains r5900
1736 (e.g. mips64r5900el-linux-gnu).
1737
17382013-01-02 H.J. Lu <hongjiu.lu@intel.com>
1739
1740 * as.c (parse_args): Update copyright year to 2013.
1741
17422013-01-02 Yufeng Zhang <yufeng.zhang@arm.com>
1743
1744 * config/tc-aarch64.c (aarch64_cpus): Add entries for "cortex-a53"
1745 and "cortex57".
1746
17472013-01-02 Nick Clifton <nickc@redhat.com>
1748
1749 PR gas/14987
1750 * config/tc-arm.c (parse_address_main): Skip whitespace before a
1751 closing bracket.
1752
1753For older changes see ChangeLog-2012
1754\f
1755Copyright (C) 2013 Free Software Foundation, Inc.
1756
1757Copying and distribution of this file, with or without modification,
1758are permitted in any medium without royalty provided the copyright
1759notice and this notice are preserved.
1760
1761Local Variables:
1762mode: change-log
1763left-margin: 8
1764fill-column: 74
1765version-control: never
1766End:
GDB Binutils - Deliverables
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