| 1 | -*- text -*- |
| 2 | |
| 3 | PORTING: |
| 4 | |
| 5 | Sorry, no description of the interfaces is written up yet. Look at existing |
| 6 | back ends and work from there. |
| 7 | |
| 8 | New hosts: If your host system has a strange header file setup, create a |
| 9 | config/ho-foo.h file for it and include the appropriate header files or |
| 10 | definitions there. If your host has a broken compiler, or some broken macros |
| 11 | in header files, create a host-specific file and repair the damage there. |
| 12 | (See, for example, ho-rs6000.h. The "assert" macro on that system doesn't work |
| 13 | right, and a flag is set to rewrite an expression in tc-m68k.c that the native |
| 14 | compiler mis-compiles.) |
| 15 | |
| 16 | New target formats: Look at the BFD_ASSEMBLER code. The a.out code might be a |
| 17 | fair example. There are no "good" examples yet, unfortunately, nor any good |
| 18 | documentation of the changes. |
| 19 | |
| 20 | New target processors: Check first to see if the BFD_ASSEMBLER interface is |
| 21 | supported by the file format code you need to use. |
| 22 | |
| 23 | New environments: ??? |
| 24 | |
| 25 | DOCUMENTATION: |
| 26 | |
| 27 | The internals of gas need documenting. |
| 28 | |
| 29 | The documentation should also contain a "Trouble" section similar to gcc's |
| 30 | manual: real bugs, common problems, incompatibilities, etc. |
| 31 | |
| 32 | Anyone want to offer to maintain a man page? |
| 33 | |
| 34 | BFD CONVERSION: |
| 35 | |
| 36 | The "#ifdef BFD_ASSEMBLER" code is on its way in; the "#ifndef BFD_ASSEMBLER" |
| 37 | code is on its way out. The new code uses BFD data structures, and calls BFD |
| 38 | for anything that needs to be written to the output file. The old code did all |
| 39 | the writing itself, or in a couple of cases, used BFD as a slightly higher |
| 40 | level than stdio (i.e., bfd_seek, bfd_write -- these are not the preferred |
| 41 | interface). |
| 42 | |
| 43 | Because of this, some of this code is messy. Lots of ifdef's, and the |
| 44 | non-BFD_ASSEMBLER version often has multiple conditional tests inside it for |
| 45 | various processors or formats. As the various targets get converted over, |
| 46 | these will gradually go away. |
| 47 | |
| 48 | As of the moment I'm editing this file, only the "sun4" and "decstation-bsd" |
| 49 | targets can really use the BFD code. Other back ends still need merging or |
| 50 | touching up. |
| 51 | |
| 52 | TO DO: |
| 53 | |
| 54 | Remove DONTDEF code, commented-out code. |
| 55 | |
| 56 | Eliminate, as much as possible, anything not in config that is conditionalized |
| 57 | on a CPU, format, or environment. |
| 58 | |
| 59 | Merge COFF support into one version, supporting all the pseudo-ops used in |
| 60 | either versions now, but using BFD for high-level operations. (See second |
| 61 | following item.) Currently there are two versions (plus the new BFD code), |
| 62 | which support different features, and are used on different targets. |
| 63 | |
| 64 | Convert remaining a.out/b.out targets to using the BFD_ASSEMBLER code by |
| 65 | default. |
| 66 | |
| 67 | Finish conversion to using BFD for all object file writing. (This is the |
| 68 | BFD_ASSEMBLER code, not BFD or BFD_HEADERS.) VMS might be the tough one here, |
| 69 | since there's no BFD support for it at all yet. Eliminate the old code. Some |
| 70 | of this can be done target by target, so doing a target where the CPU or |
| 71 | format already supports BFD_ASSEMBLER mode may be easiest. |
| 72 | |
| 73 | Fix lots of uses of empty strings to use null pointers. Will improve |
| 74 | efficiency, and should make code clearer too. |
| 75 | |
| 76 | Clean up comments; lots of 'em are one previous maintainer griping about |
| 77 | another previous maintainer, unrelated to the code. (And with no names, |
| 78 | they're not so fun to read. :-) |
| 79 | |
| 80 | For sparc: "call 0" becomes "jmpl %g0,%l7", and similarly for absolute |
| 81 | addresses in -4096...4095. (Solaris assembler does this. No |
| 82 | relocation required, no absolute symbol needed.) For addresses |
| 83 | outside the range, for COFF, keep generating an absolute symbol to use |
| 84 | for relocs. |
| 85 | |
| 86 | Get Steve to document H8/500 stuff (and others). |
| 87 | |
| 88 | Improve test suite. Incorporate more reported net bugs, and non-confidential |
| 89 | Cygnus customer bugs, and anything else. |
| 90 | |
| 91 | Add support for i386/i486 16-bit mode, so operating system initialization code |
| 92 | doesn't require a separate assembler nor lots of `.byte' directives. |
| 93 | |
| 94 | See if it's more maintainable (and not too much of a performance loss) to use |
| 95 | a yacc grammar for parsing input. The lexer will have to be flexible, and the |
| 96 | grammar will have to contain any construct used on any platform, but it may be |
| 97 | easier to maintain, instead of having code in most of the back ends. |
| 98 | |
| 99 | PIC support. |
| 100 | |
| 101 | Torbjorn Granlund <tege@cygnus.com> writes, regarding alpha .align: |
| 102 | |
| 103 | Please make sure the .align directive works as in digital's assembler. |
| 104 | They fill the space with a sequence of "bis $31,$31,$31;ldq_u $31,0($30)" |
| 105 | since these two instructions can dual-issue. Since .align is ued a lot by |
| 106 | gcc, it is an important optimization. |
| 107 | |
| 108 | Torbjorn Granlund <tege@cygnus.com> writes, regarding i386/i486/pentium: |
| 109 | |
| 110 | In a new publication from Intel, "Optimization for Intel's 32 bit |
| 111 | Processors", they recommended code alignment on a 16 byte boundary if that |
| 112 | requires less than 8 bytes of fill instructions. The Pentium is not |
| 113 | affected by such alignment, the 386 wants alignment on a 4 byte boundary. |
| 114 | It is the 486 that is most helped by large alignment. |
| 115 | |
| 116 | Recommended nop instructions: |
| 117 | 1 byte: 90 xchg %eax,%eax |
| 118 | 2 bytes: 8b c0 movl %eax,%eax |
| 119 | 3 bytes: 8d 76 00 leal 0(%esi),%esi |
| 120 | 4 bytes: 8d 74 26 00 leal 0(%esi),%esi |
| 121 | 5 bytes: 8b c0 8d 76 00 movl %eax,%eax; leal 0(%esi),%esi |
| 122 | 6 bytes: 8d b6 00 00 00 00 leal 0(%esi),%esi |
| 123 | 7 bytes: 8d b4 26 00 00 00 00 leal 0(%esi),%esi |
| 124 | |
| 125 | Note that `leal 0(%esi),%esi' has a few different encodings... |
| 126 | |
| 127 | There are faster instructions for certain lengths, that are not true nops. |
| 128 | If you can determine that a register and the condition code is dead (by |
| 129 | scanning forwards for a register that is written before it is read, and |
| 130 | similar for cc) you can use a `incl reg' for a 3 times faster 1 cycle nop... |
| 131 | |
| 132 | (From old "NOTES" file to-do list, not really reviewed:) |
| 133 | |
| 134 | fix relocation types for i860, perhaps by adding a ref pointer to fixS? |
| 135 | |
| 136 | remove the ifdef's from fx_callj tests? |
| 137 | |
| 138 | space tighten sparc alignment? |
| 139 | |
| 140 | md_ => tc_ |
| 141 | |
| 142 | share b.out with a.out. |