| 1 | /* GAS interface for targets using CGEN: Cpu tools GENerator. |
| 2 | Copyright (C) 1996, 1997, 1998 Free Software Foundation, Inc. |
| 3 | |
| 4 | This file is part of GAS, the GNU Assembler. |
| 5 | |
| 6 | GAS is free software; you can redistribute it and/or modify |
| 7 | it under the terms of the GNU General Public License as published by |
| 8 | the Free Software Foundation; either version 2, or (at your option) |
| 9 | any later version. |
| 10 | |
| 11 | GAS is distributed in the hope that it will be useful, |
| 12 | but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 13 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 14 | GNU General Public License for more details. |
| 15 | |
| 16 | You should have received a copy of the GNU General Public License |
| 17 | along with GAS; see the file COPYING. If not, write to the Free Software |
| 18 | Foundation, 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */ |
| 19 | |
| 20 | #include <setjmp.h> |
| 21 | #include "ansidecl.h" |
| 22 | #include "libiberty.h" |
| 23 | #include "bfd.h" |
| 24 | #include "symcat.h" |
| 25 | #include "cgen-opc.h" |
| 26 | #include "as.h" |
| 27 | #include "subsegs.h" |
| 28 | #include "cgen.h" |
| 29 | |
| 30 | /* Opcode table descriptor, must be set by md_begin. */ |
| 31 | |
| 32 | CGEN_OPCODE_DESC gas_cgen_opcode_desc; |
| 33 | |
| 34 | /* Callback to insert a register into the symbol table. |
| 35 | A target may choose to let GAS parse the registers. |
| 36 | ??? Not currently used. */ |
| 37 | |
| 38 | void |
| 39 | cgen_asm_record_register (name, number) |
| 40 | char * name; |
| 41 | int number; |
| 42 | { |
| 43 | /* Use symbol_create here instead of symbol_new so we don't try to |
| 44 | output registers into the object file's symbol table. */ |
| 45 | symbol_table_insert (symbol_create (name, reg_section, |
| 46 | number, & zero_address_frag)); |
| 47 | } |
| 48 | |
| 49 | /* We need to keep a list of fixups. We can't simply generate them as |
| 50 | we go, because that would require us to first create the frag, and |
| 51 | that would screw up references to ``.''. |
| 52 | |
| 53 | This is used by cpu's with simple operands. It keeps knowledge of what |
| 54 | an `expressionS' is and what a `fixup' is out of CGEN which for the time |
| 55 | being is preferable. |
| 56 | |
| 57 | OPINDEX is the index in the operand table. |
| 58 | OPINFO is something the caller chooses to help in reloc determination. */ |
| 59 | |
| 60 | struct fixup |
| 61 | { |
| 62 | int opindex; |
| 63 | int opinfo; |
| 64 | expressionS exp; |
| 65 | }; |
| 66 | |
| 67 | static struct fixup fixups [GAS_CGEN_MAX_FIXUPS]; |
| 68 | static int num_fixups; |
| 69 | |
| 70 | /* Prepare to parse an instruction. |
| 71 | ??? May wish to make this static and delete calls in md_assemble. */ |
| 72 | |
| 73 | void |
| 74 | gas_cgen_init_parse () |
| 75 | { |
| 76 | num_fixups = 0; |
| 77 | } |
| 78 | |
| 79 | /* Queue a fixup. */ |
| 80 | |
| 81 | static void |
| 82 | queue_fixup (opindex, opinfo, expP) |
| 83 | int opindex; |
| 84 | expressionS * expP; |
| 85 | { |
| 86 | /* We need to generate a fixup for this expression. */ |
| 87 | if (num_fixups >= GAS_CGEN_MAX_FIXUPS) |
| 88 | as_fatal (_("too many fixups")); |
| 89 | fixups[num_fixups].exp = * expP; |
| 90 | fixups[num_fixups].opindex = opindex; |
| 91 | fixups[num_fixups].opinfo = opinfo; |
| 92 | ++ num_fixups; |
| 93 | } |
| 94 | |
| 95 | /* The following three functions allow a backup of the fixup chain to be made, |
| 96 | and to have this backup be swapped with the current chain. This allows |
| 97 | certain ports, eg the m32r, to swap two instructions and swap their fixups |
| 98 | at the same time. */ |
| 99 | /* ??? I think with cgen_asm_finish_insn (or something else) there is no |
| 100 | more need for this. */ |
| 101 | |
| 102 | static struct fixup saved_fixups [GAS_CGEN_MAX_FIXUPS]; |
| 103 | static int saved_num_fixups; |
| 104 | |
| 105 | void |
| 106 | gas_cgen_save_fixups () |
| 107 | { |
| 108 | saved_num_fixups = num_fixups; |
| 109 | |
| 110 | memcpy (saved_fixups, fixups, sizeof (fixups[0]) * num_fixups); |
| 111 | |
| 112 | num_fixups = 0; |
| 113 | } |
| 114 | |
| 115 | void |
| 116 | gas_cgen_restore_fixups () |
| 117 | { |
| 118 | num_fixups = saved_num_fixups; |
| 119 | |
| 120 | memcpy (fixups, saved_fixups, sizeof (fixups[0]) * num_fixups); |
| 121 | |
| 122 | saved_num_fixups = 0; |
| 123 | } |
| 124 | |
| 125 | void |
| 126 | gas_cgen_swap_fixups () |
| 127 | { |
| 128 | int tmp; |
| 129 | struct fixup tmp_fixup; |
| 130 | |
| 131 | if (num_fixups == 0) |
| 132 | { |
| 133 | gas_cgen_restore_fixups (); |
| 134 | } |
| 135 | else if (saved_num_fixups == 0) |
| 136 | { |
| 137 | gas_cgen_save_fixups (); |
| 138 | } |
| 139 | else |
| 140 | { |
| 141 | tmp = saved_num_fixups; |
| 142 | saved_num_fixups = num_fixups; |
| 143 | num_fixups = tmp; |
| 144 | |
| 145 | for (tmp = GAS_CGEN_MAX_FIXUPS; tmp--;) |
| 146 | { |
| 147 | tmp_fixup = saved_fixups [tmp]; |
| 148 | saved_fixups [tmp] = fixups [tmp]; |
| 149 | fixups [tmp] = tmp_fixup; |
| 150 | } |
| 151 | } |
| 152 | } |
| 153 | |
| 154 | /* Default routine to record a fixup. |
| 155 | This is a cover function to fix_new. |
| 156 | It exists because we record INSN with the fixup. |
| 157 | |
| 158 | FRAG and WHERE are their respective arguments to fix_new_exp. |
| 159 | LENGTH is in bits. |
| 160 | OPINFO is something the caller chooses to help in reloc determination. |
| 161 | |
| 162 | At this point we do not use a bfd_reloc_code_real_type for |
| 163 | operands residing in the insn, but instead just use the |
| 164 | operand index. This lets us easily handle fixups for any |
| 165 | operand type. We pick a BFD reloc type in md_apply_fix. */ |
| 166 | |
| 167 | fixS * |
| 168 | gas_cgen_record_fixup (frag, where, insn, length, operand, opinfo, symbol, offset) |
| 169 | fragS * frag; |
| 170 | int where; |
| 171 | const CGEN_INSN * insn; |
| 172 | int length; |
| 173 | const CGEN_OPERAND * operand; |
| 174 | int opinfo; |
| 175 | symbolS * symbol; |
| 176 | offsetT offset; |
| 177 | { |
| 178 | fixS * fixP; |
| 179 | |
| 180 | /* It may seem strange to use operand->attrs and not insn->attrs here, |
| 181 | but it is the operand that has a pc relative relocation. */ |
| 182 | |
| 183 | fixP = fix_new (frag, where, length / 8, symbol, offset, |
| 184 | CGEN_OPERAND_ATTR (operand, CGEN_OPERAND_PCREL_ADDR) != 0, |
| 185 | (bfd_reloc_code_real_type) ((int) BFD_RELOC_UNUSED + CGEN_OPERAND_INDEX (operand))); |
| 186 | fixP->tc_fix_data.insn = (PTR) insn; |
| 187 | fixP->tc_fix_data.opinfo = opinfo; |
| 188 | |
| 189 | return fixP; |
| 190 | } |
| 191 | |
| 192 | /* Default routine to record a fixup given an expression. |
| 193 | This is a cover function to fix_new_exp. |
| 194 | It exists because we record INSN with the fixup. |
| 195 | |
| 196 | FRAG and WHERE are their respective arguments to fix_new_exp. |
| 197 | LENGTH is in bits. |
| 198 | OPINFO is something the caller chooses to help in reloc determination. |
| 199 | |
| 200 | At this point we do not use a bfd_reloc_code_real_type for |
| 201 | operands residing in the insn, but instead just use the |
| 202 | operand index. This lets us easily handle fixups for any |
| 203 | operand type. We pick a BFD reloc type in md_apply_fix. */ |
| 204 | |
| 205 | fixS * |
| 206 | gas_cgen_record_fixup_exp (frag, where, insn, length, operand, opinfo, exp) |
| 207 | fragS * frag; |
| 208 | int where; |
| 209 | const CGEN_INSN * insn; |
| 210 | int length; |
| 211 | const CGEN_OPERAND * operand; |
| 212 | int opinfo; |
| 213 | expressionS * exp; |
| 214 | { |
| 215 | fixS * fixP; |
| 216 | |
| 217 | /* It may seem strange to use operand->attrs and not insn->attrs here, |
| 218 | but it is the operand that has a pc relative relocation. */ |
| 219 | |
| 220 | fixP = fix_new_exp (frag, where, length / 8, exp, |
| 221 | CGEN_OPERAND_ATTR (operand, CGEN_OPERAND_PCREL_ADDR) != 0, |
| 222 | (bfd_reloc_code_real_type) ((int) BFD_RELOC_UNUSED + CGEN_OPERAND_INDEX (operand))); |
| 223 | fixP->tc_fix_data.insn = (PTR) insn; |
| 224 | fixP->tc_fix_data.opinfo = opinfo; |
| 225 | |
| 226 | return fixP; |
| 227 | } |
| 228 | |
| 229 | /* Used for communication between the next two procedures. */ |
| 230 | static jmp_buf expr_jmp_buf; |
| 231 | |
| 232 | /* Callback for cgen interface. Parse the expression at *STRP. |
| 233 | The result is an error message or NULL for success (in which case |
| 234 | *STRP is advanced past the parsed text). |
| 235 | WANT is an indication of what the caller is looking for. |
| 236 | If WANT == CGEN_ASM_PARSE_INIT the caller is beginning to try to match |
| 237 | a table entry with the insn, reset the queued fixups counter. |
| 238 | An enum cgen_parse_operand_result is stored in RESULTP. |
| 239 | OPINDEX is the operand's table entry index. |
| 240 | OPINFO is something the caller chooses to help in reloc determination. |
| 241 | The resulting value is stored in VALUEP. */ |
| 242 | |
| 243 | const char * |
| 244 | gas_cgen_parse_operand (od, want, strP, opindex, opinfo, resultP, valueP) |
| 245 | CGEN_OPCODE_DESC od; |
| 246 | enum cgen_parse_operand_type want; |
| 247 | const char ** strP; |
| 248 | int opindex; |
| 249 | int opinfo; |
| 250 | enum cgen_parse_operand_result * resultP; |
| 251 | bfd_vma * valueP; |
| 252 | { |
| 253 | #ifdef __STDC__ |
| 254 | /* These are volatile to survive the setjmp. */ |
| 255 | char * volatile hold; |
| 256 | enum cgen_parse_operand_result * volatile resultP_1; |
| 257 | #else |
| 258 | static char * hold; |
| 259 | static enum cgen_parse_operand_result * resultP_1; |
| 260 | #endif |
| 261 | const char * errmsg = NULL; |
| 262 | expressionS exp; |
| 263 | |
| 264 | if (want == CGEN_PARSE_OPERAND_INIT) |
| 265 | { |
| 266 | gas_cgen_init_parse (); |
| 267 | return NULL; |
| 268 | } |
| 269 | |
| 270 | resultP_1 = resultP; |
| 271 | hold = input_line_pointer; |
| 272 | input_line_pointer = (char *) * strP; |
| 273 | |
| 274 | /* We rely on md_operand to longjmp back to us. |
| 275 | This is done via gas_cgen_md_operand. */ |
| 276 | if (setjmp (expr_jmp_buf) != 0) |
| 277 | { |
| 278 | input_line_pointer = (char *) hold; |
| 279 | * resultP_1 = CGEN_PARSE_OPERAND_RESULT_ERROR; |
| 280 | return "illegal operand"; |
| 281 | } |
| 282 | |
| 283 | expression (& exp); |
| 284 | |
| 285 | * strP = input_line_pointer; |
| 286 | input_line_pointer = hold; |
| 287 | |
| 288 | /* FIXME: Need to check `want'. */ |
| 289 | |
| 290 | switch (exp.X_op) |
| 291 | { |
| 292 | case O_illegal : |
| 293 | errmsg = _("illegal operand"); |
| 294 | * resultP = CGEN_PARSE_OPERAND_RESULT_ERROR; |
| 295 | break; |
| 296 | case O_absent : |
| 297 | errmsg = _("missing operand"); |
| 298 | * resultP = CGEN_PARSE_OPERAND_RESULT_ERROR; |
| 299 | break; |
| 300 | case O_constant : |
| 301 | * valueP = exp.X_add_number; |
| 302 | * resultP = CGEN_PARSE_OPERAND_RESULT_NUMBER; |
| 303 | break; |
| 304 | case O_register : |
| 305 | * valueP = exp.X_add_number; |
| 306 | * resultP = CGEN_PARSE_OPERAND_RESULT_REGISTER; |
| 307 | break; |
| 308 | default : |
| 309 | queue_fixup (opindex, opinfo, & exp); |
| 310 | * valueP = 0; |
| 311 | * resultP = CGEN_PARSE_OPERAND_RESULT_QUEUED; |
| 312 | break; |
| 313 | } |
| 314 | |
| 315 | return errmsg; |
| 316 | } |
| 317 | |
| 318 | /* md_operand handler to catch unrecognized expressions and halt the |
| 319 | parsing process so the next entry can be tried. |
| 320 | |
| 321 | ??? This could be done differently by adding code to `expression'. */ |
| 322 | |
| 323 | void |
| 324 | gas_cgen_md_operand (expressionP) |
| 325 | expressionS * expressionP; |
| 326 | { |
| 327 | longjmp (expr_jmp_buf, 1); |
| 328 | } |
| 329 | |
| 330 | /* Finish assembling instruction INSN. |
| 331 | BUF contains what we've built up so far. |
| 332 | LENGTH is the size of the insn in bits. |
| 333 | RELAX_P is non-zero if relaxable insns should be emitted as such. |
| 334 | Otherwise they're emitted in non-relaxable forms. |
| 335 | The "result" is stored in RESULT if non-NULL. */ |
| 336 | |
| 337 | void |
| 338 | gas_cgen_finish_insn (insn, buf, length, relax_p, result) |
| 339 | const CGEN_INSN * insn; |
| 340 | cgen_insn_t * buf; |
| 341 | unsigned int length; |
| 342 | int relax_p; |
| 343 | finished_insnS * result; |
| 344 | { |
| 345 | int i; |
| 346 | int relax_operand; |
| 347 | char * f; |
| 348 | unsigned int byte_len = length / 8; |
| 349 | |
| 350 | /* ??? Target foo issues various warnings here, so one might want to provide |
| 351 | a hook here. However, our caller is defined in tc-foo.c so there |
| 352 | shouldn't be a need for a hook. */ |
| 353 | |
| 354 | /* Write out the instruction. |
| 355 | It is important to fetch enough space in one call to `frag_more'. |
| 356 | We use (f - frag_now->fr_literal) to compute where we are and we |
| 357 | don't want frag_now to change between calls. |
| 358 | |
| 359 | Relaxable instructions: We need to ensure we allocate enough |
| 360 | space for the largest insn. */ |
| 361 | |
| 362 | if (CGEN_INSN_ATTR (insn, CGEN_INSN_RELAX) != 0) |
| 363 | abort (); /* These currently shouldn't get here. */ |
| 364 | |
| 365 | /* Is there a relaxable insn with the relaxable operand needing a fixup? */ |
| 366 | |
| 367 | relax_operand = -1; |
| 368 | if (relax_p && CGEN_INSN_ATTR (insn, CGEN_INSN_RELAXABLE) != 0) |
| 369 | { |
| 370 | /* Scan the fixups for the operand affected by relaxing |
| 371 | (i.e. the branch address). */ |
| 372 | |
| 373 | for (i = 0; i < num_fixups; ++ i) |
| 374 | { |
| 375 | if (CGEN_OPERAND_ATTR (& CGEN_SYM (operand_table) [fixups[i].opindex], |
| 376 | CGEN_OPERAND_RELAX) != 0) |
| 377 | { |
| 378 | relax_operand = i; |
| 379 | break; |
| 380 | } |
| 381 | } |
| 382 | } |
| 383 | |
| 384 | if (relax_operand != -1) |
| 385 | { |
| 386 | int max_len; |
| 387 | fragS * old_frag; |
| 388 | |
| 389 | #ifdef TC_CGEN_MAX_RELAX |
| 390 | max_len = TC_CGEN_MAX_RELAX (insn, byte_len); |
| 391 | #else |
| 392 | max_len = CGEN_MAX_INSN_SIZE; |
| 393 | #endif |
| 394 | /* Ensure variable part and fixed part are in same fragment. */ |
| 395 | /* FIXME: Having to do this seems like a hack. */ |
| 396 | frag_grow (max_len); |
| 397 | |
| 398 | /* Allocate space for the fixed part. */ |
| 399 | f = frag_more (byte_len); |
| 400 | |
| 401 | /* Create a relaxable fragment for this instruction. */ |
| 402 | old_frag = frag_now; |
| 403 | |
| 404 | frag_var (rs_machine_dependent, |
| 405 | max_len - byte_len /* max chars */, |
| 406 | 0 /* variable part already allocated */, |
| 407 | /* FIXME: When we machine generate the relax table, |
| 408 | machine generate a macro to compute subtype. */ |
| 409 | 1 /* subtype */, |
| 410 | fixups[relax_operand].exp.X_add_symbol, |
| 411 | fixups[relax_operand].exp.X_add_number, |
| 412 | f); |
| 413 | |
| 414 | /* Record the operand number with the fragment so md_convert_frag |
| 415 | can use gas_cgen_md_record_fixup to record the appropriate reloc. */ |
| 416 | old_frag->fr_cgen.insn = insn; |
| 417 | old_frag->fr_cgen.opindex = fixups[relax_operand].opindex; |
| 418 | old_frag->fr_cgen.opinfo = fixups[relax_operand].opinfo; |
| 419 | if (result) |
| 420 | result->frag = old_frag; |
| 421 | } |
| 422 | else |
| 423 | { |
| 424 | f = frag_more (byte_len); |
| 425 | if (result) |
| 426 | result->frag = frag_now; |
| 427 | } |
| 428 | |
| 429 | /* If we're recording insns as numbers (rather than a string of bytes), |
| 430 | target byte order handling is deferred until now. */ |
| 431 | #if 0 /*def CGEN_INT_INSN*/ |
| 432 | switch (length) |
| 433 | { |
| 434 | case 16: |
| 435 | if (cgen_big_endian_p) |
| 436 | bfd_putb16 ((bfd_vma) * buf, f); |
| 437 | else |
| 438 | bfd_putl16 ((bfd_vma) * buf, f); |
| 439 | break; |
| 440 | case 32: |
| 441 | if (cgen_big_endian_p) |
| 442 | bfd_putb32 ((bfd_vma) * buf, f); |
| 443 | else |
| 444 | bfd_putl32 ((bfd_vma) * buf, f); |
| 445 | break; |
| 446 | default: |
| 447 | abort (); |
| 448 | } |
| 449 | #else |
| 450 | memcpy (f, buf, byte_len); |
| 451 | #endif |
| 452 | |
| 453 | /* Create any fixups. */ |
| 454 | for (i = 0; i < num_fixups; ++i) |
| 455 | { |
| 456 | fixS * fixP; |
| 457 | |
| 458 | /* Don't create fixups for these. That's done during relaxation. |
| 459 | We don't need to test for CGEN_INSN_RELAX as they can't get here |
| 460 | (see above). */ |
| 461 | if (relax_p |
| 462 | && CGEN_INSN_ATTR (insn, CGEN_INSN_RELAXABLE) != 0 |
| 463 | && CGEN_OPERAND_ATTR (& CGEN_SYM (operand_table) [fixups[i].opindex], |
| 464 | CGEN_OPERAND_RELAX) != 0) |
| 465 | continue; |
| 466 | |
| 467 | #ifndef md_cgen_record_fixup_exp |
| 468 | #define md_cgen_record_fixup_exp gas_cgen_record_fixup_exp |
| 469 | #endif |
| 470 | |
| 471 | fixP = md_cgen_record_fixup_exp (frag_now, f - frag_now->fr_literal, |
| 472 | insn, length, |
| 473 | & CGEN_SYM (operand_table) [fixups[i].opindex], |
| 474 | fixups[i].opinfo, |
| 475 | & fixups[i].exp); |
| 476 | if (result) |
| 477 | result->fixups[i] = fixP; |
| 478 | } |
| 479 | |
| 480 | if (result) |
| 481 | { |
| 482 | result->num_fixups = num_fixups; |
| 483 | result->addr = f; |
| 484 | } |
| 485 | } |
| 486 | |
| 487 | /* Apply a fixup to the object code. This is called for all the |
| 488 | fixups we generated by the call to fix_new_exp, above. In the call |
| 489 | above we used a reloc code which was the largest legal reloc code |
| 490 | plus the operand index. Here we undo that to recover the operand |
| 491 | index. At this point all symbol values should be fully resolved, |
| 492 | and we attempt to completely resolve the reloc. If we can not do |
| 493 | that, we determine the correct reloc code and put it back in the fixup. */ |
| 494 | |
| 495 | /* FIXME: This function handles some of the fixups and bfd_install_relocation |
| 496 | handles the rest. bfd_install_relocation (or some other bfd function) |
| 497 | should handle them all. */ |
| 498 | |
| 499 | int |
| 500 | gas_cgen_md_apply_fix3 (fixP, valueP, seg) |
| 501 | fixS * fixP; |
| 502 | valueT * valueP; |
| 503 | segT seg; |
| 504 | { |
| 505 | char * where = fixP->fx_frag->fr_literal + fixP->fx_where; |
| 506 | valueT value; |
| 507 | |
| 508 | |
| 509 | /* FIXME FIXME FIXME: The value we are passed in *valuep includes |
| 510 | the symbol values. Since we are using BFD_ASSEMBLER, if we are |
| 511 | doing this relocation the code in write.c is going to call |
| 512 | bfd_install_relocation, which is also going to use the symbol |
| 513 | value. That means that if the reloc is fully resolved we want to |
| 514 | use *valuep since bfd_install_relocation is not being used. |
| 515 | However, if the reloc is not fully resolved we do not want to use |
| 516 | *valuep, and must use fx_offset instead. However, if the reloc |
| 517 | is PC relative, we do want to use *valuep since it includes the |
| 518 | result of md_pcrel_from. This is confusing. */ |
| 519 | |
| 520 | if (fixP->fx_addsy == (symbolS *) NULL) |
| 521 | { |
| 522 | value = * valueP; |
| 523 | fixP->fx_done = 1; |
| 524 | } |
| 525 | else if (fixP->fx_pcrel) |
| 526 | value = * valueP; |
| 527 | else |
| 528 | { |
| 529 | value = fixP->fx_offset; |
| 530 | if (fixP->fx_subsy != (symbolS *) NULL) |
| 531 | { |
| 532 | if (S_GET_SEGMENT (fixP->fx_subsy) == absolute_section) |
| 533 | value -= S_GET_VALUE (fixP->fx_subsy); |
| 534 | else |
| 535 | { |
| 536 | /* We don't actually support subtracting a symbol. */ |
| 537 | as_bad_where (fixP->fx_file, fixP->fx_line, |
| 538 | _("expression too complex")); |
| 539 | } |
| 540 | } |
| 541 | } |
| 542 | |
| 543 | if ((int) fixP->fx_r_type >= (int) BFD_RELOC_UNUSED) |
| 544 | { |
| 545 | int opindex = (int) fixP->fx_r_type - (int) BFD_RELOC_UNUSED; |
| 546 | const CGEN_OPERAND * operand = & CGEN_SYM (operand_table) [opindex]; |
| 547 | const char * errmsg; |
| 548 | bfd_reloc_code_real_type reloc_type; |
| 549 | CGEN_FIELDS fields; |
| 550 | const CGEN_INSN * insn = (CGEN_INSN *) fixP->tc_fix_data.insn; |
| 551 | |
| 552 | |
| 553 | if (fixP->fx_r_type == BFD_RELOC_VTABLE_INHERIT |
| 554 | || fixP->fx_r_type == BFD_RELOC_VTABLE_ENTRY) |
| 555 | { |
| 556 | fixP->fx_done = 0; |
| 557 | return 1; |
| 558 | } |
| 559 | |
| 560 | /* If the reloc has been fully resolved finish the operand here. */ |
| 561 | /* FIXME: This duplicates the capabilities of code in BFD. */ |
| 562 | if (fixP->fx_done |
| 563 | /* FIXME: If partial_inplace isn't set bfd_install_relocation won't |
| 564 | finish the job. Testing for pcrel is a temporary hack. */ |
| 565 | || fixP->fx_pcrel) |
| 566 | { |
| 567 | CGEN_FIELDS_BITSIZE (& fields) = CGEN_INSN_BITSIZE (insn); |
| 568 | CGEN_SYM (set_vma_operand) (opindex, & fields, (bfd_vma) value); |
| 569 | /* ??? 0 is passed for `pc' */ |
| 570 | errmsg = CGEN_SYM (insert_operand) (gas_cgen_opcode_desc, opindex, |
| 571 | & fields, where, (bfd_vma) 0); |
| 572 | if (errmsg) |
| 573 | as_warn_where (fixP->fx_file, fixP->fx_line, "%s", errmsg); |
| 574 | } |
| 575 | |
| 576 | if (fixP->fx_done) |
| 577 | return 1; |
| 578 | |
| 579 | /* The operand isn't fully resolved. Determine a BFD reloc value |
| 580 | based on the operand information and leave it to |
| 581 | bfd_install_relocation. Note that this doesn't work when |
| 582 | partial_inplace == false. */ |
| 583 | |
| 584 | reloc_type = md_cgen_lookup_reloc (insn, operand, fixP); |
| 585 | if (reloc_type != BFD_RELOC_NONE) |
| 586 | { |
| 587 | fixP->fx_r_type = reloc_type; |
| 588 | } |
| 589 | else |
| 590 | { |
| 591 | as_bad_where (fixP->fx_file, fixP->fx_line, |
| 592 | _("unresolved expression that must be resolved")); |
| 593 | fixP->fx_done = 1; |
| 594 | return 1; |
| 595 | } |
| 596 | } |
| 597 | else if (fixP->fx_done) |
| 598 | { |
| 599 | /* We're finished with this fixup. Install it because |
| 600 | bfd_install_relocation won't be called to do it. */ |
| 601 | switch (fixP->fx_r_type) |
| 602 | { |
| 603 | case BFD_RELOC_8: |
| 604 | md_number_to_chars (where, value, 1); |
| 605 | break; |
| 606 | case BFD_RELOC_16: |
| 607 | md_number_to_chars (where, value, 2); |
| 608 | break; |
| 609 | case BFD_RELOC_32: |
| 610 | md_number_to_chars (where, value, 4); |
| 611 | break; |
| 612 | /* FIXME: later add support for 64 bits. */ |
| 613 | default: |
| 614 | abort (); |
| 615 | } |
| 616 | } |
| 617 | else |
| 618 | { |
| 619 | /* bfd_install_relocation will be called to finish things up. */ |
| 620 | } |
| 621 | |
| 622 | /* Tuck `value' away for use by tc_gen_reloc. |
| 623 | See the comment describing fx_addnumber in write.h. |
| 624 | This field is misnamed (or misused :-). */ |
| 625 | fixP->fx_addnumber = value; |
| 626 | |
| 627 | return 1; |
| 628 | } |
| 629 | |
| 630 | /* Translate internal representation of relocation info to BFD target format. |
| 631 | |
| 632 | FIXME: To what extent can we get all relevant targets to use this? */ |
| 633 | |
| 634 | arelent * |
| 635 | gas_cgen_tc_gen_reloc (section, fixP) |
| 636 | asection * section; |
| 637 | fixS * fixP; |
| 638 | { |
| 639 | arelent * reloc; |
| 640 | |
| 641 | reloc = (arelent *) xmalloc (sizeof (arelent)); |
| 642 | |
| 643 | reloc->howto = bfd_reloc_type_lookup (stdoutput, fixP->fx_r_type); |
| 644 | if (reloc->howto == (reloc_howto_type *) NULL) |
| 645 | { |
| 646 | as_bad_where (fixP->fx_file, fixP->fx_line, |
| 647 | _("internal error: can't export reloc type %d (`%s')"), |
| 648 | fixP->fx_r_type, bfd_get_reloc_code_name (fixP->fx_r_type)); |
| 649 | return NULL; |
| 650 | } |
| 651 | |
| 652 | assert (!fixP->fx_pcrel == !reloc->howto->pc_relative); |
| 653 | |
| 654 | reloc->sym_ptr_ptr = & fixP->fx_addsy->bsym; |
| 655 | |
| 656 | /* Use fx_offset for these cases */ |
| 657 | if (fixP->fx_r_type == BFD_RELOC_VTABLE_ENTRY |
| 658 | || fixP->fx_r_type == BFD_RELOC_VTABLE_INHERIT) |
| 659 | reloc->address = fixP->fx_offset; |
| 660 | else |
| 661 | { |
| 662 | reloc->address = fixP->fx_frag->fr_address + fixP->fx_where; |
| 663 | reloc->addend = fixP->fx_addnumber; |
| 664 | } |
| 665 | return reloc; |
| 666 | } |