| 1 | /* i386.c -- Assemble code for the Intel 80386 |
| 2 | Copyright (C) 1989, 91, 92, 93, 94, 95, 96, 97, 98, 99, 2000 |
| 3 | Free Software Foundation. |
| 4 | |
| 5 | This file is part of GAS, the GNU Assembler. |
| 6 | |
| 7 | GAS is free software; you can redistribute it and/or modify |
| 8 | it under the terms of the GNU General Public License as published by |
| 9 | the Free Software Foundation; either version 2, or (at your option) |
| 10 | any later version. |
| 11 | |
| 12 | GAS is distributed in the hope that it will be useful, |
| 13 | but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 14 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 15 | GNU General Public License for more details. |
| 16 | |
| 17 | You should have received a copy of the GNU General Public License |
| 18 | along with GAS; see the file COPYING. If not, write to the Free |
| 19 | Software Foundation, 59 Temple Place - Suite 330, Boston, MA |
| 20 | 02111-1307, USA. */ |
| 21 | |
| 22 | /* |
| 23 | Intel 80386 machine specific gas. |
| 24 | Written by Eliot Dresselhaus (eliot@mgm.mit.edu). |
| 25 | Bugs & suggestions are completely welcome. This is free software. |
| 26 | Please help us make it better. |
| 27 | */ |
| 28 | |
| 29 | #include <ctype.h> |
| 30 | |
| 31 | #include "as.h" |
| 32 | #include "subsegs.h" |
| 33 | #include "opcode/i386.h" |
| 34 | |
| 35 | #ifndef REGISTER_WARNINGS |
| 36 | #define REGISTER_WARNINGS 1 |
| 37 | #endif |
| 38 | |
| 39 | #ifndef INFER_ADDR_PREFIX |
| 40 | #define INFER_ADDR_PREFIX 1 |
| 41 | #endif |
| 42 | |
| 43 | #ifndef SCALE1_WHEN_NO_INDEX |
| 44 | /* Specifying a scale factor besides 1 when there is no index is |
| 45 | futile. eg. `mov (%ebx,2),%al' does exactly the same as |
| 46 | `mov (%ebx),%al'. To slavishly follow what the programmer |
| 47 | specified, set SCALE1_WHEN_NO_INDEX to 0. */ |
| 48 | #define SCALE1_WHEN_NO_INDEX 1 |
| 49 | #endif |
| 50 | |
| 51 | #define true 1 |
| 52 | #define false 0 |
| 53 | |
| 54 | static unsigned int mode_from_disp_size PARAMS ((unsigned int)); |
| 55 | static int fits_in_signed_byte PARAMS ((offsetT)); |
| 56 | static int fits_in_unsigned_byte PARAMS ((offsetT)); |
| 57 | static int fits_in_unsigned_word PARAMS ((offsetT)); |
| 58 | static int fits_in_signed_word PARAMS ((offsetT)); |
| 59 | static int smallest_imm_type PARAMS ((offsetT)); |
| 60 | static offsetT offset_in_range PARAMS ((offsetT, int)); |
| 61 | static int add_prefix PARAMS ((unsigned int)); |
| 62 | static void set_16bit_code_flag PARAMS ((int)); |
| 63 | static void set_16bit_gcc_code_flag PARAMS((int)); |
| 64 | static void set_intel_syntax PARAMS ((int)); |
| 65 | |
| 66 | #ifdef BFD_ASSEMBLER |
| 67 | static bfd_reloc_code_real_type reloc |
| 68 | PARAMS ((int, int, bfd_reloc_code_real_type)); |
| 69 | #endif |
| 70 | |
| 71 | /* 'md_assemble ()' gathers together information and puts it into a |
| 72 | i386_insn. */ |
| 73 | |
| 74 | union i386_op |
| 75 | { |
| 76 | expressionS *disps; |
| 77 | expressionS *imms; |
| 78 | const reg_entry *regs; |
| 79 | }; |
| 80 | |
| 81 | struct _i386_insn |
| 82 | { |
| 83 | /* TM holds the template for the insn were currently assembling. */ |
| 84 | template tm; |
| 85 | |
| 86 | /* SUFFIX holds the instruction mnemonic suffix if given. |
| 87 | (e.g. 'l' for 'movl') */ |
| 88 | char suffix; |
| 89 | |
| 90 | /* OPERANDS gives the number of given operands. */ |
| 91 | unsigned int operands; |
| 92 | |
| 93 | /* REG_OPERANDS, DISP_OPERANDS, MEM_OPERANDS, IMM_OPERANDS give the number |
| 94 | of given register, displacement, memory operands and immediate |
| 95 | operands. */ |
| 96 | unsigned int reg_operands, disp_operands, mem_operands, imm_operands; |
| 97 | |
| 98 | /* TYPES [i] is the type (see above #defines) which tells us how to |
| 99 | use OP[i] for the corresponding operand. */ |
| 100 | unsigned int types[MAX_OPERANDS]; |
| 101 | |
| 102 | /* Displacement expression, immediate expression, or register for each |
| 103 | operand. */ |
| 104 | union i386_op op[MAX_OPERANDS]; |
| 105 | |
| 106 | /* Relocation type for operand */ |
| 107 | #ifdef BFD_ASSEMBLER |
| 108 | enum bfd_reloc_code_real disp_reloc[MAX_OPERANDS]; |
| 109 | #else |
| 110 | int disp_reloc[MAX_OPERANDS]; |
| 111 | #endif |
| 112 | |
| 113 | /* BASE_REG, INDEX_REG, and LOG2_SCALE_FACTOR are used to encode |
| 114 | the base index byte below. */ |
| 115 | const reg_entry *base_reg; |
| 116 | const reg_entry *index_reg; |
| 117 | unsigned int log2_scale_factor; |
| 118 | |
| 119 | /* SEG gives the seg_entries of this insn. They are zero unless |
| 120 | explicit segment overrides are given. */ |
| 121 | const seg_entry *seg[2]; /* segments for memory operands (if given) */ |
| 122 | |
| 123 | /* PREFIX holds all the given prefix opcodes (usually null). |
| 124 | PREFIXES is the number of prefix opcodes. */ |
| 125 | unsigned int prefixes; |
| 126 | unsigned char prefix[MAX_PREFIXES]; |
| 127 | |
| 128 | /* RM and SIB are the modrm byte and the sib byte where the |
| 129 | addressing modes of this insn are encoded. */ |
| 130 | |
| 131 | modrm_byte rm; |
| 132 | sib_byte sib; |
| 133 | }; |
| 134 | |
| 135 | typedef struct _i386_insn i386_insn; |
| 136 | |
| 137 | /* List of chars besides those in app.c:symbol_chars that can start an |
| 138 | operand. Used to prevent the scrubber eating vital white-space. */ |
| 139 | #ifdef LEX_AT |
| 140 | const char extra_symbol_chars[] = "*%-(@"; |
| 141 | #else |
| 142 | const char extra_symbol_chars[] = "*%-("; |
| 143 | #endif |
| 144 | |
| 145 | /* This array holds the chars that always start a comment. If the |
| 146 | pre-processor is disabled, these aren't very useful */ |
| 147 | #if defined (TE_I386AIX) || ((defined (OBJ_ELF) || defined (OBJ_MAYBE_ELF)) && ! defined (TE_LINUX)) |
| 148 | /* Putting '/' here makes it impossible to use the divide operator. |
| 149 | However, we need it for compatibility with SVR4 systems. */ |
| 150 | const char comment_chars[] = "#/"; |
| 151 | #define PREFIX_SEPARATOR '\\' |
| 152 | #else |
| 153 | const char comment_chars[] = "#"; |
| 154 | #define PREFIX_SEPARATOR '/' |
| 155 | #endif |
| 156 | |
| 157 | /* This array holds the chars that only start a comment at the beginning of |
| 158 | a line. If the line seems to have the form '# 123 filename' |
| 159 | .line and .file directives will appear in the pre-processed output */ |
| 160 | /* Note that input_file.c hand checks for '#' at the beginning of the |
| 161 | first line of the input file. This is because the compiler outputs |
| 162 | #NO_APP at the beginning of its output. */ |
| 163 | /* Also note that comments started like this one will always work if |
| 164 | '/' isn't otherwise defined. */ |
| 165 | #if defined (TE_I386AIX) || ((defined (OBJ_ELF) || defined (OBJ_MAYBE_ELF)) && ! defined (TE_LINUX)) |
| 166 | const char line_comment_chars[] = ""; |
| 167 | #else |
| 168 | const char line_comment_chars[] = "/"; |
| 169 | #endif |
| 170 | |
| 171 | const char line_separator_chars[] = ""; |
| 172 | |
| 173 | /* Chars that can be used to separate mant from exp in floating point nums */ |
| 174 | const char EXP_CHARS[] = "eE"; |
| 175 | |
| 176 | /* Chars that mean this number is a floating point constant */ |
| 177 | /* As in 0f12.456 */ |
| 178 | /* or 0d1.2345e12 */ |
| 179 | const char FLT_CHARS[] = "fFdDxX"; |
| 180 | |
| 181 | /* tables for lexical analysis */ |
| 182 | static char mnemonic_chars[256]; |
| 183 | static char register_chars[256]; |
| 184 | static char operand_chars[256]; |
| 185 | static char identifier_chars[256]; |
| 186 | static char digit_chars[256]; |
| 187 | |
| 188 | /* lexical macros */ |
| 189 | #define is_mnemonic_char(x) (mnemonic_chars[(unsigned char) x]) |
| 190 | #define is_operand_char(x) (operand_chars[(unsigned char) x]) |
| 191 | #define is_register_char(x) (register_chars[(unsigned char) x]) |
| 192 | #define is_space_char(x) ((x) == ' ') |
| 193 | #define is_identifier_char(x) (identifier_chars[(unsigned char) x]) |
| 194 | #define is_digit_char(x) (digit_chars[(unsigned char) x]) |
| 195 | |
| 196 | /* put here all non-digit non-letter charcters that may occur in an operand */ |
| 197 | static char operand_special_chars[] = "%$-+(,)*._~/<>|&^!:[@]"; |
| 198 | |
| 199 | /* md_assemble() always leaves the strings it's passed unaltered. To |
| 200 | effect this we maintain a stack of saved characters that we've smashed |
| 201 | with '\0's (indicating end of strings for various sub-fields of the |
| 202 | assembler instruction). */ |
| 203 | static char save_stack[32]; |
| 204 | static char *save_stack_p; /* stack pointer */ |
| 205 | #define END_STRING_AND_SAVE(s) \ |
| 206 | do { *save_stack_p++ = *(s); *(s) = '\0'; } while (0) |
| 207 | #define RESTORE_END_STRING(s) \ |
| 208 | do { *(s) = *--save_stack_p; } while (0) |
| 209 | |
| 210 | /* The instruction we're assembling. */ |
| 211 | static i386_insn i; |
| 212 | |
| 213 | /* Possible templates for current insn. */ |
| 214 | static const templates *current_templates; |
| 215 | |
| 216 | /* Per instruction expressionS buffers: 2 displacements & 2 immediate max. */ |
| 217 | static expressionS disp_expressions[2], im_expressions[2]; |
| 218 | |
| 219 | static int this_operand; /* current operand we are working on */ |
| 220 | |
| 221 | static int flag_do_long_jump; /* FIXME what does this do? */ |
| 222 | |
| 223 | static int flag_16bit_code; /* 1 if we're writing 16-bit code, 0 if 32-bit */ |
| 224 | |
| 225 | static int intel_syntax = 0; /* 1 for intel syntax, 0 if att syntax */ |
| 226 | |
| 227 | static int allow_naked_reg = 0; /* 1 if register prefix % not required */ |
| 228 | |
| 229 | static char stackop_size = '\0'; /* Used in 16 bit gcc mode to add an l |
| 230 | suffix to call, ret, enter, leave, push, |
| 231 | and pop instructions so that gcc has the |
| 232 | same stack frame as in 32 bit mode. */ |
| 233 | |
| 234 | /* Interface to relax_segment. |
| 235 | There are 2 relax states for 386 jump insns: one for conditional & |
| 236 | one for unconditional jumps. This is because these two types of |
| 237 | jumps add different sizes to frags when we're figuring out what |
| 238 | sort of jump to choose to reach a given label. */ |
| 239 | |
| 240 | /* types */ |
| 241 | #define COND_JUMP 1 /* conditional jump */ |
| 242 | #define UNCOND_JUMP 2 /* unconditional jump */ |
| 243 | /* sizes */ |
| 244 | #define CODE16 1 |
| 245 | #define SMALL 0 |
| 246 | #define SMALL16 (SMALL|CODE16) |
| 247 | #define BIG 2 |
| 248 | #define BIG16 (BIG|CODE16) |
| 249 | |
| 250 | #ifndef INLINE |
| 251 | #ifdef __GNUC__ |
| 252 | #define INLINE __inline__ |
| 253 | #else |
| 254 | #define INLINE |
| 255 | #endif |
| 256 | #endif |
| 257 | |
| 258 | #define ENCODE_RELAX_STATE(type,size) \ |
| 259 | ((relax_substateT)((type<<2) | (size))) |
| 260 | #define SIZE_FROM_RELAX_STATE(s) \ |
| 261 | ( (((s) & 0x3) == BIG ? 4 : (((s) & 0x3) == BIG16 ? 2 : 1)) ) |
| 262 | |
| 263 | /* This table is used by relax_frag to promote short jumps to long |
| 264 | ones where necessary. SMALL (short) jumps may be promoted to BIG |
| 265 | (32 bit long) ones, and SMALL16 jumps to BIG16 (16 bit long). We |
| 266 | don't allow a short jump in a 32 bit code segment to be promoted to |
| 267 | a 16 bit offset jump because it's slower (requires data size |
| 268 | prefix), and doesn't work, unless the destination is in the bottom |
| 269 | 64k of the code segment (The top 16 bits of eip are zeroed). */ |
| 270 | |
| 271 | const relax_typeS md_relax_table[] = |
| 272 | { |
| 273 | /* The fields are: |
| 274 | 1) most positive reach of this state, |
| 275 | 2) most negative reach of this state, |
| 276 | 3) how many bytes this mode will add to the size of the current frag |
| 277 | 4) which index into the table to try if we can't fit into this one. |
| 278 | */ |
| 279 | {1, 1, 0, 0}, |
| 280 | {1, 1, 0, 0}, |
| 281 | {1, 1, 0, 0}, |
| 282 | {1, 1, 0, 0}, |
| 283 | |
| 284 | {127 + 1, -128 + 1, 0, ENCODE_RELAX_STATE (COND_JUMP, BIG)}, |
| 285 | {127 + 1, -128 + 1, 0, ENCODE_RELAX_STATE (COND_JUMP, BIG16)}, |
| 286 | /* dword conditionals adds 4 bytes to frag: |
| 287 | 1 extra opcode byte, 3 extra displacement bytes. */ |
| 288 | {0, 0, 4, 0}, |
| 289 | /* word conditionals add 2 bytes to frag: |
| 290 | 1 extra opcode byte, 1 extra displacement byte. */ |
| 291 | {0, 0, 2, 0}, |
| 292 | |
| 293 | {127 + 1, -128 + 1, 0, ENCODE_RELAX_STATE (UNCOND_JUMP, BIG)}, |
| 294 | {127 + 1, -128 + 1, 0, ENCODE_RELAX_STATE (UNCOND_JUMP, BIG16)}, |
| 295 | /* dword jmp adds 3 bytes to frag: |
| 296 | 0 extra opcode bytes, 3 extra displacement bytes. */ |
| 297 | {0, 0, 3, 0}, |
| 298 | /* word jmp adds 1 byte to frag: |
| 299 | 0 extra opcode bytes, 1 extra displacement byte. */ |
| 300 | {0, 0, 1, 0} |
| 301 | |
| 302 | }; |
| 303 | |
| 304 | |
| 305 | void |
| 306 | i386_align_code (fragP, count) |
| 307 | fragS *fragP; |
| 308 | int count; |
| 309 | { |
| 310 | /* Various efficient no-op patterns for aligning code labels. */ |
| 311 | /* Note: Don't try to assemble the instructions in the comments. */ |
| 312 | /* 0L and 0w are not legal */ |
| 313 | static const char f32_1[] = |
| 314 | {0x90}; /* nop */ |
| 315 | static const char f32_2[] = |
| 316 | {0x89,0xf6}; /* movl %esi,%esi */ |
| 317 | static const char f32_3[] = |
| 318 | {0x8d,0x76,0x00}; /* leal 0(%esi),%esi */ |
| 319 | static const char f32_4[] = |
| 320 | {0x8d,0x74,0x26,0x00}; /* leal 0(%esi,1),%esi */ |
| 321 | static const char f32_5[] = |
| 322 | {0x90, /* nop */ |
| 323 | 0x8d,0x74,0x26,0x00}; /* leal 0(%esi,1),%esi */ |
| 324 | static const char f32_6[] = |
| 325 | {0x8d,0xb6,0x00,0x00,0x00,0x00}; /* leal 0L(%esi),%esi */ |
| 326 | static const char f32_7[] = |
| 327 | {0x8d,0xb4,0x26,0x00,0x00,0x00,0x00}; /* leal 0L(%esi,1),%esi */ |
| 328 | static const char f32_8[] = |
| 329 | {0x90, /* nop */ |
| 330 | 0x8d,0xb4,0x26,0x00,0x00,0x00,0x00}; /* leal 0L(%esi,1),%esi */ |
| 331 | static const char f32_9[] = |
| 332 | {0x89,0xf6, /* movl %esi,%esi */ |
| 333 | 0x8d,0xbc,0x27,0x00,0x00,0x00,0x00}; /* leal 0L(%edi,1),%edi */ |
| 334 | static const char f32_10[] = |
| 335 | {0x8d,0x76,0x00, /* leal 0(%esi),%esi */ |
| 336 | 0x8d,0xbc,0x27,0x00,0x00,0x00,0x00}; /* leal 0L(%edi,1),%edi */ |
| 337 | static const char f32_11[] = |
| 338 | {0x8d,0x74,0x26,0x00, /* leal 0(%esi,1),%esi */ |
| 339 | 0x8d,0xbc,0x27,0x00,0x00,0x00,0x00}; /* leal 0L(%edi,1),%edi */ |
| 340 | static const char f32_12[] = |
| 341 | {0x8d,0xb6,0x00,0x00,0x00,0x00, /* leal 0L(%esi),%esi */ |
| 342 | 0x8d,0xbf,0x00,0x00,0x00,0x00}; /* leal 0L(%edi),%edi */ |
| 343 | static const char f32_13[] = |
| 344 | {0x8d,0xb6,0x00,0x00,0x00,0x00, /* leal 0L(%esi),%esi */ |
| 345 | 0x8d,0xbc,0x27,0x00,0x00,0x00,0x00}; /* leal 0L(%edi,1),%edi */ |
| 346 | static const char f32_14[] = |
| 347 | {0x8d,0xb4,0x26,0x00,0x00,0x00,0x00, /* leal 0L(%esi,1),%esi */ |
| 348 | 0x8d,0xbc,0x27,0x00,0x00,0x00,0x00}; /* leal 0L(%edi,1),%edi */ |
| 349 | static const char f32_15[] = |
| 350 | {0xeb,0x0d,0x90,0x90,0x90,0x90,0x90, /* jmp .+15; lotsa nops */ |
| 351 | 0x90,0x90,0x90,0x90,0x90,0x90,0x90,0x90}; |
| 352 | static const char f16_3[] = |
| 353 | {0x8d,0x74,0x00}; /* lea 0(%esi),%esi */ |
| 354 | static const char f16_4[] = |
| 355 | {0x8d,0xb4,0x00,0x00}; /* lea 0w(%si),%si */ |
| 356 | static const char f16_5[] = |
| 357 | {0x90, /* nop */ |
| 358 | 0x8d,0xb4,0x00,0x00}; /* lea 0w(%si),%si */ |
| 359 | static const char f16_6[] = |
| 360 | {0x89,0xf6, /* mov %si,%si */ |
| 361 | 0x8d,0xbd,0x00,0x00}; /* lea 0w(%di),%di */ |
| 362 | static const char f16_7[] = |
| 363 | {0x8d,0x74,0x00, /* lea 0(%si),%si */ |
| 364 | 0x8d,0xbd,0x00,0x00}; /* lea 0w(%di),%di */ |
| 365 | static const char f16_8[] = |
| 366 | {0x8d,0xb4,0x00,0x00, /* lea 0w(%si),%si */ |
| 367 | 0x8d,0xbd,0x00,0x00}; /* lea 0w(%di),%di */ |
| 368 | static const char *const f32_patt[] = { |
| 369 | f32_1, f32_2, f32_3, f32_4, f32_5, f32_6, f32_7, f32_8, |
| 370 | f32_9, f32_10, f32_11, f32_12, f32_13, f32_14, f32_15 |
| 371 | }; |
| 372 | static const char *const f16_patt[] = { |
| 373 | f32_1, f32_2, f16_3, f16_4, f16_5, f16_6, f16_7, f16_8, |
| 374 | f32_15, f32_15, f32_15, f32_15, f32_15, f32_15, f32_15 |
| 375 | }; |
| 376 | |
| 377 | if (count > 0 && count <= 15) |
| 378 | { |
| 379 | if (flag_16bit_code) |
| 380 | { |
| 381 | memcpy(fragP->fr_literal + fragP->fr_fix, |
| 382 | f16_patt[count - 1], count); |
| 383 | if (count > 8) /* adjust jump offset */ |
| 384 | fragP->fr_literal[fragP->fr_fix + 1] = count - 2; |
| 385 | } |
| 386 | else |
| 387 | memcpy(fragP->fr_literal + fragP->fr_fix, |
| 388 | f32_patt[count - 1], count); |
| 389 | fragP->fr_var = count; |
| 390 | } |
| 391 | } |
| 392 | |
| 393 | static char *output_invalid PARAMS ((int c)); |
| 394 | static int i386_operand PARAMS ((char *operand_string)); |
| 395 | static int i386_intel_operand PARAMS ((char *operand_string, int got_a_float)); |
| 396 | static const reg_entry *parse_register PARAMS ((char *reg_string, |
| 397 | char **end_op)); |
| 398 | |
| 399 | #ifndef I386COFF |
| 400 | static void s_bss PARAMS ((int)); |
| 401 | #endif |
| 402 | |
| 403 | symbolS *GOT_symbol; /* Pre-defined "_GLOBAL_OFFSET_TABLE_" */ |
| 404 | |
| 405 | static INLINE unsigned int |
| 406 | mode_from_disp_size (t) |
| 407 | unsigned int t; |
| 408 | { |
| 409 | return (t & Disp8) ? 1 : (t & (Disp16|Disp32)) ? 2 : 0; |
| 410 | } |
| 411 | |
| 412 | static INLINE int |
| 413 | fits_in_signed_byte (num) |
| 414 | offsetT num; |
| 415 | { |
| 416 | return (num >= -128) && (num <= 127); |
| 417 | } /* fits_in_signed_byte() */ |
| 418 | |
| 419 | static INLINE int |
| 420 | fits_in_unsigned_byte (num) |
| 421 | offsetT num; |
| 422 | { |
| 423 | return (num & 0xff) == num; |
| 424 | } /* fits_in_unsigned_byte() */ |
| 425 | |
| 426 | static INLINE int |
| 427 | fits_in_unsigned_word (num) |
| 428 | offsetT num; |
| 429 | { |
| 430 | return (num & 0xffff) == num; |
| 431 | } /* fits_in_unsigned_word() */ |
| 432 | |
| 433 | static INLINE int |
| 434 | fits_in_signed_word (num) |
| 435 | offsetT num; |
| 436 | { |
| 437 | return (-32768 <= num) && (num <= 32767); |
| 438 | } /* fits_in_signed_word() */ |
| 439 | |
| 440 | static int |
| 441 | smallest_imm_type (num) |
| 442 | offsetT num; |
| 443 | { |
| 444 | #if 0 |
| 445 | /* This code is disabled because all the Imm1 forms in the opcode table |
| 446 | are slower on the i486, and they're the versions with the implicitly |
| 447 | specified single-position displacement, which has another syntax if |
| 448 | you really want to use that form. If you really prefer to have the |
| 449 | one-byte-shorter Imm1 form despite these problems, re-enable this |
| 450 | code. */ |
| 451 | if (num == 1) |
| 452 | return Imm1 | Imm8 | Imm8S | Imm16 | Imm32; |
| 453 | #endif |
| 454 | return (fits_in_signed_byte (num) |
| 455 | ? (Imm8S | Imm8 | Imm16 | Imm32) |
| 456 | : fits_in_unsigned_byte (num) |
| 457 | ? (Imm8 | Imm16 | Imm32) |
| 458 | : (fits_in_signed_word (num) || fits_in_unsigned_word (num)) |
| 459 | ? (Imm16 | Imm32) |
| 460 | : (Imm32)); |
| 461 | } /* smallest_imm_type() */ |
| 462 | |
| 463 | static offsetT |
| 464 | offset_in_range (val, size) |
| 465 | offsetT val; |
| 466 | int size; |
| 467 | { |
| 468 | addressT mask; |
| 469 | |
| 470 | switch (size) |
| 471 | { |
| 472 | case 1: mask = ((addressT) 1 << 8) - 1; break; |
| 473 | case 2: mask = ((addressT) 1 << 16) - 1; break; |
| 474 | case 4: mask = ((addressT) 1 << 32) - 1; break; |
| 475 | default: abort(); |
| 476 | } |
| 477 | |
| 478 | /* If BFD64, sign extend val. */ |
| 479 | if ((val & ~ (((addressT) 1 << 32) - 1)) == 0) |
| 480 | val = (val ^ ((addressT) 1 << 31)) - ((addressT) 1 << 31); |
| 481 | |
| 482 | if ((val & ~ mask) != 0 && (val & ~ mask) != ~ mask) |
| 483 | { |
| 484 | char buf1[40], buf2[40]; |
| 485 | |
| 486 | sprint_value (buf1, val); |
| 487 | sprint_value (buf2, val & mask); |
| 488 | as_warn (_("%s shortened to %s"), buf1, buf2); |
| 489 | } |
| 490 | return val & mask; |
| 491 | } |
| 492 | |
| 493 | /* Returns 0 if attempting to add a prefix where one from the same |
| 494 | class already exists, 1 if non rep/repne added, 2 if rep/repne |
| 495 | added. */ |
| 496 | static int |
| 497 | add_prefix (prefix) |
| 498 | unsigned int prefix; |
| 499 | { |
| 500 | int ret = 1; |
| 501 | int q; |
| 502 | |
| 503 | switch (prefix) |
| 504 | { |
| 505 | default: |
| 506 | abort (); |
| 507 | |
| 508 | case CS_PREFIX_OPCODE: |
| 509 | case DS_PREFIX_OPCODE: |
| 510 | case ES_PREFIX_OPCODE: |
| 511 | case FS_PREFIX_OPCODE: |
| 512 | case GS_PREFIX_OPCODE: |
| 513 | case SS_PREFIX_OPCODE: |
| 514 | q = SEG_PREFIX; |
| 515 | break; |
| 516 | |
| 517 | case REPNE_PREFIX_OPCODE: |
| 518 | case REPE_PREFIX_OPCODE: |
| 519 | ret = 2; |
| 520 | /* fall thru */ |
| 521 | case LOCK_PREFIX_OPCODE: |
| 522 | q = LOCKREP_PREFIX; |
| 523 | break; |
| 524 | |
| 525 | case FWAIT_OPCODE: |
| 526 | q = WAIT_PREFIX; |
| 527 | break; |
| 528 | |
| 529 | case ADDR_PREFIX_OPCODE: |
| 530 | q = ADDR_PREFIX; |
| 531 | break; |
| 532 | |
| 533 | case DATA_PREFIX_OPCODE: |
| 534 | q = DATA_PREFIX; |
| 535 | break; |
| 536 | } |
| 537 | |
| 538 | if (i.prefix[q]) |
| 539 | { |
| 540 | as_bad (_("same type of prefix used twice")); |
| 541 | return 0; |
| 542 | } |
| 543 | |
| 544 | i.prefixes += 1; |
| 545 | i.prefix[q] = prefix; |
| 546 | return ret; |
| 547 | } |
| 548 | |
| 549 | static void |
| 550 | set_16bit_code_flag (new_16bit_code_flag) |
| 551 | int new_16bit_code_flag; |
| 552 | { |
| 553 | flag_16bit_code = new_16bit_code_flag; |
| 554 | stackop_size = '\0'; |
| 555 | } |
| 556 | |
| 557 | static void |
| 558 | set_16bit_gcc_code_flag (new_16bit_code_flag) |
| 559 | int new_16bit_code_flag; |
| 560 | { |
| 561 | flag_16bit_code = new_16bit_code_flag; |
| 562 | stackop_size = new_16bit_code_flag ? 'l' : '\0'; |
| 563 | } |
| 564 | |
| 565 | static void |
| 566 | set_intel_syntax (syntax_flag) |
| 567 | int syntax_flag; |
| 568 | { |
| 569 | /* Find out if register prefixing is specified. */ |
| 570 | int ask_naked_reg = 0; |
| 571 | |
| 572 | SKIP_WHITESPACE (); |
| 573 | if (! is_end_of_line[(unsigned char) *input_line_pointer]) |
| 574 | { |
| 575 | char *string = input_line_pointer; |
| 576 | int e = get_symbol_end (); |
| 577 | |
| 578 | if (strcmp(string, "prefix") == 0) |
| 579 | ask_naked_reg = 1; |
| 580 | else if (strcmp(string, "noprefix") == 0) |
| 581 | ask_naked_reg = -1; |
| 582 | else |
| 583 | as_bad (_("bad argument to syntax directive.")); |
| 584 | *input_line_pointer = e; |
| 585 | } |
| 586 | demand_empty_rest_of_line (); |
| 587 | |
| 588 | intel_syntax = syntax_flag; |
| 589 | |
| 590 | if (ask_naked_reg == 0) |
| 591 | { |
| 592 | #ifdef BFD_ASSEMBLER |
| 593 | allow_naked_reg = (intel_syntax |
| 594 | && (bfd_get_symbol_leading_char (stdoutput) != '\0')); |
| 595 | #else |
| 596 | allow_naked_reg = 0; /* conservative default */ |
| 597 | #endif |
| 598 | } |
| 599 | else |
| 600 | allow_naked_reg = (ask_naked_reg < 0); |
| 601 | } |
| 602 | |
| 603 | const pseudo_typeS md_pseudo_table[] = |
| 604 | { |
| 605 | #ifndef I386COFF |
| 606 | {"bss", s_bss, 0}, |
| 607 | #endif |
| 608 | #if !defined(OBJ_AOUT) && !defined(USE_ALIGN_PTWO) |
| 609 | {"align", s_align_bytes, 0}, |
| 610 | #else |
| 611 | {"align", s_align_ptwo, 0}, |
| 612 | #endif |
| 613 | {"ffloat", float_cons, 'f'}, |
| 614 | {"dfloat", float_cons, 'd'}, |
| 615 | {"tfloat", float_cons, 'x'}, |
| 616 | {"value", cons, 2}, |
| 617 | {"noopt", s_ignore, 0}, |
| 618 | {"optim", s_ignore, 0}, |
| 619 | {"code16gcc", set_16bit_gcc_code_flag, 1}, |
| 620 | {"code16", set_16bit_code_flag, 1}, |
| 621 | {"code32", set_16bit_code_flag, 0}, |
| 622 | {"intel_syntax", set_intel_syntax, 1}, |
| 623 | {"att_syntax", set_intel_syntax, 0}, |
| 624 | {0, 0, 0} |
| 625 | }; |
| 626 | |
| 627 | /* for interface with expression () */ |
| 628 | extern char *input_line_pointer; |
| 629 | |
| 630 | /* hash table for instruction mnemonic lookup */ |
| 631 | static struct hash_control *op_hash; |
| 632 | /* hash table for register lookup */ |
| 633 | static struct hash_control *reg_hash; |
| 634 | \f |
| 635 | |
| 636 | void |
| 637 | md_begin () |
| 638 | { |
| 639 | const char *hash_err; |
| 640 | |
| 641 | /* initialize op_hash hash table */ |
| 642 | op_hash = hash_new (); |
| 643 | |
| 644 | { |
| 645 | register const template *optab; |
| 646 | register templates *core_optab; |
| 647 | |
| 648 | optab = i386_optab; /* setup for loop */ |
| 649 | core_optab = (templates *) xmalloc (sizeof (templates)); |
| 650 | core_optab->start = optab; |
| 651 | |
| 652 | while (1) |
| 653 | { |
| 654 | ++optab; |
| 655 | if (optab->name == NULL |
| 656 | || strcmp (optab->name, (optab - 1)->name) != 0) |
| 657 | { |
| 658 | /* different name --> ship out current template list; |
| 659 | add to hash table; & begin anew */ |
| 660 | core_optab->end = optab; |
| 661 | hash_err = hash_insert (op_hash, |
| 662 | (optab - 1)->name, |
| 663 | (PTR) core_optab); |
| 664 | if (hash_err) |
| 665 | { |
| 666 | hash_error: |
| 667 | as_fatal (_("Internal Error: Can't hash %s: %s"), |
| 668 | (optab - 1)->name, |
| 669 | hash_err); |
| 670 | } |
| 671 | if (optab->name == NULL) |
| 672 | break; |
| 673 | core_optab = (templates *) xmalloc (sizeof (templates)); |
| 674 | core_optab->start = optab; |
| 675 | } |
| 676 | } |
| 677 | } |
| 678 | |
| 679 | /* initialize reg_hash hash table */ |
| 680 | reg_hash = hash_new (); |
| 681 | { |
| 682 | register const reg_entry *regtab; |
| 683 | |
| 684 | for (regtab = i386_regtab; |
| 685 | regtab < i386_regtab + sizeof (i386_regtab) / sizeof (i386_regtab[0]); |
| 686 | regtab++) |
| 687 | { |
| 688 | hash_err = hash_insert (reg_hash, regtab->reg_name, (PTR) regtab); |
| 689 | if (hash_err) |
| 690 | goto hash_error; |
| 691 | } |
| 692 | } |
| 693 | |
| 694 | /* fill in lexical tables: mnemonic_chars, operand_chars. */ |
| 695 | { |
| 696 | register int c; |
| 697 | register char *p; |
| 698 | |
| 699 | for (c = 0; c < 256; c++) |
| 700 | { |
| 701 | if (isdigit (c)) |
| 702 | { |
| 703 | digit_chars[c] = c; |
| 704 | mnemonic_chars[c] = c; |
| 705 | register_chars[c] = c; |
| 706 | operand_chars[c] = c; |
| 707 | } |
| 708 | else if (islower (c)) |
| 709 | { |
| 710 | mnemonic_chars[c] = c; |
| 711 | register_chars[c] = c; |
| 712 | operand_chars[c] = c; |
| 713 | } |
| 714 | else if (isupper (c)) |
| 715 | { |
| 716 | mnemonic_chars[c] = tolower (c); |
| 717 | register_chars[c] = mnemonic_chars[c]; |
| 718 | operand_chars[c] = c; |
| 719 | } |
| 720 | |
| 721 | if (isalpha (c) || isdigit (c)) |
| 722 | identifier_chars[c] = c; |
| 723 | else if (c >= 128) |
| 724 | { |
| 725 | identifier_chars[c] = c; |
| 726 | operand_chars[c] = c; |
| 727 | } |
| 728 | } |
| 729 | |
| 730 | #ifdef LEX_AT |
| 731 | identifier_chars['@'] = '@'; |
| 732 | #endif |
| 733 | digit_chars['-'] = '-'; |
| 734 | identifier_chars['_'] = '_'; |
| 735 | identifier_chars['.'] = '.'; |
| 736 | |
| 737 | for (p = operand_special_chars; *p != '\0'; p++) |
| 738 | operand_chars[(unsigned char) *p] = *p; |
| 739 | } |
| 740 | |
| 741 | #if defined (OBJ_ELF) || defined (OBJ_MAYBE_ELF) |
| 742 | if (OUTPUT_FLAVOR == bfd_target_elf_flavour) |
| 743 | { |
| 744 | record_alignment (text_section, 2); |
| 745 | record_alignment (data_section, 2); |
| 746 | record_alignment (bss_section, 2); |
| 747 | } |
| 748 | #endif |
| 749 | } |
| 750 | |
| 751 | void |
| 752 | i386_print_statistics (file) |
| 753 | FILE *file; |
| 754 | { |
| 755 | hash_print_statistics (file, "i386 opcode", op_hash); |
| 756 | hash_print_statistics (file, "i386 register", reg_hash); |
| 757 | } |
| 758 | \f |
| 759 | |
| 760 | #ifdef DEBUG386 |
| 761 | |
| 762 | /* debugging routines for md_assemble */ |
| 763 | static void pi PARAMS ((char *, i386_insn *)); |
| 764 | static void pte PARAMS ((template *)); |
| 765 | static void pt PARAMS ((unsigned int)); |
| 766 | static void pe PARAMS ((expressionS *)); |
| 767 | static void ps PARAMS ((symbolS *)); |
| 768 | |
| 769 | static void |
| 770 | pi (line, x) |
| 771 | char *line; |
| 772 | i386_insn *x; |
| 773 | { |
| 774 | register template *p; |
| 775 | int i; |
| 776 | |
| 777 | fprintf (stdout, "%s: template ", line); |
| 778 | pte (&x->tm); |
| 779 | fprintf (stdout, " modrm: mode %x reg %x reg/mem %x", |
| 780 | x->rm.mode, x->rm.reg, x->rm.regmem); |
| 781 | fprintf (stdout, " base %x index %x scale %x\n", |
| 782 | x->bi.base, x->bi.index, x->bi.scale); |
| 783 | for (i = 0; i < x->operands; i++) |
| 784 | { |
| 785 | fprintf (stdout, " #%d: ", i + 1); |
| 786 | pt (x->types[i]); |
| 787 | fprintf (stdout, "\n"); |
| 788 | if (x->types[i] |
| 789 | & (Reg | SReg2 | SReg3 | Control | Debug | Test | RegMMX | RegXMM)) |
| 790 | fprintf (stdout, "%s\n", x->op[i].regs->reg_name); |
| 791 | if (x->types[i] & Imm) |
| 792 | pe (x->op[i].imms); |
| 793 | if (x->types[i] & Disp) |
| 794 | pe (x->op[i].disps); |
| 795 | } |
| 796 | } |
| 797 | |
| 798 | static void |
| 799 | pte (t) |
| 800 | template *t; |
| 801 | { |
| 802 | int i; |
| 803 | fprintf (stdout, " %d operands ", t->operands); |
| 804 | fprintf (stdout, "opcode %x ", |
| 805 | t->base_opcode); |
| 806 | if (t->extension_opcode != None) |
| 807 | fprintf (stdout, "ext %x ", t->extension_opcode); |
| 808 | if (t->opcode_modifier & D) |
| 809 | fprintf (stdout, "D"); |
| 810 | if (t->opcode_modifier & W) |
| 811 | fprintf (stdout, "W"); |
| 812 | fprintf (stdout, "\n"); |
| 813 | for (i = 0; i < t->operands; i++) |
| 814 | { |
| 815 | fprintf (stdout, " #%d type ", i + 1); |
| 816 | pt (t->operand_types[i]); |
| 817 | fprintf (stdout, "\n"); |
| 818 | } |
| 819 | } |
| 820 | |
| 821 | static void |
| 822 | pe (e) |
| 823 | expressionS *e; |
| 824 | { |
| 825 | fprintf (stdout, " operation %d\n", e->X_op); |
| 826 | fprintf (stdout, " add_number %ld (%lx)\n", |
| 827 | (long) e->X_add_number, (long) e->X_add_number); |
| 828 | if (e->X_add_symbol) |
| 829 | { |
| 830 | fprintf (stdout, " add_symbol "); |
| 831 | ps (e->X_add_symbol); |
| 832 | fprintf (stdout, "\n"); |
| 833 | } |
| 834 | if (e->X_op_symbol) |
| 835 | { |
| 836 | fprintf (stdout, " op_symbol "); |
| 837 | ps (e->X_op_symbol); |
| 838 | fprintf (stdout, "\n"); |
| 839 | } |
| 840 | } |
| 841 | |
| 842 | static void |
| 843 | ps (s) |
| 844 | symbolS *s; |
| 845 | { |
| 846 | fprintf (stdout, "%s type %s%s", |
| 847 | S_GET_NAME (s), |
| 848 | S_IS_EXTERNAL (s) ? "EXTERNAL " : "", |
| 849 | segment_name (S_GET_SEGMENT (s))); |
| 850 | } |
| 851 | |
| 852 | struct type_name |
| 853 | { |
| 854 | unsigned int mask; |
| 855 | char *tname; |
| 856 | } |
| 857 | |
| 858 | type_names[] = |
| 859 | { |
| 860 | { Reg8, "r8" }, |
| 861 | { Reg16, "r16" }, |
| 862 | { Reg32, "r32" }, |
| 863 | { Imm8, "i8" }, |
| 864 | { Imm8S, "i8s" }, |
| 865 | { Imm16, "i16" }, |
| 866 | { Imm32, "i32" }, |
| 867 | { Imm1, "i1" }, |
| 868 | { BaseIndex, "BaseIndex" }, |
| 869 | { Disp8, "d8" }, |
| 870 | { Disp16, "d16" }, |
| 871 | { Disp32, "d32" }, |
| 872 | { InOutPortReg, "InOutPortReg" }, |
| 873 | { ShiftCount, "ShiftCount" }, |
| 874 | { Control, "control reg" }, |
| 875 | { Test, "test reg" }, |
| 876 | { Debug, "debug reg" }, |
| 877 | { FloatReg, "FReg" }, |
| 878 | { FloatAcc, "FAcc" }, |
| 879 | { SReg2, "SReg2" }, |
| 880 | { SReg3, "SReg3" }, |
| 881 | { Acc, "Acc" }, |
| 882 | { JumpAbsolute, "Jump Absolute" }, |
| 883 | { RegMMX, "rMMX" }, |
| 884 | { RegXMM, "rXMM" }, |
| 885 | { EsSeg, "es" }, |
| 886 | { 0, "" } |
| 887 | }; |
| 888 | |
| 889 | static void |
| 890 | pt (t) |
| 891 | unsigned int t; |
| 892 | { |
| 893 | register struct type_name *ty; |
| 894 | |
| 895 | if (t == Unknown) |
| 896 | { |
| 897 | fprintf (stdout, _("Unknown")); |
| 898 | } |
| 899 | else |
| 900 | { |
| 901 | for (ty = type_names; ty->mask; ty++) |
| 902 | if (t & ty->mask) |
| 903 | fprintf (stdout, "%s, ", ty->tname); |
| 904 | } |
| 905 | fflush (stdout); |
| 906 | } |
| 907 | |
| 908 | #endif /* DEBUG386 */ |
| 909 | \f |
| 910 | int |
| 911 | tc_i386_force_relocation (fixp) |
| 912 | struct fix *fixp; |
| 913 | { |
| 914 | #ifdef BFD_ASSEMBLER |
| 915 | if (fixp->fx_r_type == BFD_RELOC_VTABLE_INHERIT |
| 916 | || fixp->fx_r_type == BFD_RELOC_VTABLE_ENTRY) |
| 917 | return 1; |
| 918 | return 0; |
| 919 | #else |
| 920 | /* For COFF */ |
| 921 | return fixp->fx_r_type == 7; |
| 922 | #endif |
| 923 | } |
| 924 | |
| 925 | #ifdef BFD_ASSEMBLER |
| 926 | static bfd_reloc_code_real_type reloc |
| 927 | PARAMS ((int, int, bfd_reloc_code_real_type)); |
| 928 | |
| 929 | static bfd_reloc_code_real_type |
| 930 | reloc (size, pcrel, other) |
| 931 | int size; |
| 932 | int pcrel; |
| 933 | bfd_reloc_code_real_type other; |
| 934 | { |
| 935 | if (other != NO_RELOC) return other; |
| 936 | |
| 937 | if (pcrel) |
| 938 | { |
| 939 | switch (size) |
| 940 | { |
| 941 | case 1: return BFD_RELOC_8_PCREL; |
| 942 | case 2: return BFD_RELOC_16_PCREL; |
| 943 | case 4: return BFD_RELOC_32_PCREL; |
| 944 | } |
| 945 | as_bad (_("can not do %d byte pc-relative relocation"), size); |
| 946 | } |
| 947 | else |
| 948 | { |
| 949 | switch (size) |
| 950 | { |
| 951 | case 1: return BFD_RELOC_8; |
| 952 | case 2: return BFD_RELOC_16; |
| 953 | case 4: return BFD_RELOC_32; |
| 954 | } |
| 955 | as_bad (_("can not do %d byte relocation"), size); |
| 956 | } |
| 957 | |
| 958 | return BFD_RELOC_NONE; |
| 959 | } |
| 960 | |
| 961 | /* |
| 962 | * Here we decide which fixups can be adjusted to make them relative to |
| 963 | * the beginning of the section instead of the symbol. Basically we need |
| 964 | * to make sure that the dynamic relocations are done correctly, so in |
| 965 | * some cases we force the original symbol to be used. |
| 966 | */ |
| 967 | int |
| 968 | tc_i386_fix_adjustable (fixP) |
| 969 | fixS *fixP; |
| 970 | { |
| 971 | #if defined (OBJ_ELF) || defined (TE_PE) |
| 972 | /* Prevent all adjustments to global symbols, or else dynamic |
| 973 | linking will not work correctly. */ |
| 974 | if (S_IS_EXTERN (fixP->fx_addsy)) |
| 975 | return 0; |
| 976 | if (S_IS_WEAK (fixP->fx_addsy)) |
| 977 | return 0; |
| 978 | #endif |
| 979 | /* adjust_reloc_syms doesn't know about the GOT */ |
| 980 | if (fixP->fx_r_type == BFD_RELOC_386_GOTOFF |
| 981 | || fixP->fx_r_type == BFD_RELOC_386_PLT32 |
| 982 | || fixP->fx_r_type == BFD_RELOC_386_GOT32 |
| 983 | || fixP->fx_r_type == BFD_RELOC_RVA |
| 984 | || fixP->fx_r_type == BFD_RELOC_VTABLE_INHERIT |
| 985 | || fixP->fx_r_type == BFD_RELOC_VTABLE_ENTRY) |
| 986 | return 0; |
| 987 | return 1; |
| 988 | } |
| 989 | #else |
| 990 | #define reloc(SIZE,PCREL,OTHER) 0 |
| 991 | #define BFD_RELOC_16 0 |
| 992 | #define BFD_RELOC_32 0 |
| 993 | #define BFD_RELOC_16_PCREL 0 |
| 994 | #define BFD_RELOC_32_PCREL 0 |
| 995 | #define BFD_RELOC_386_PLT32 0 |
| 996 | #define BFD_RELOC_386_GOT32 0 |
| 997 | #define BFD_RELOC_386_GOTOFF 0 |
| 998 | #endif |
| 999 | |
| 1000 | static int |
| 1001 | intel_float_operand PARAMS ((char *mnemonic)); |
| 1002 | |
| 1003 | static int |
| 1004 | intel_float_operand (mnemonic) |
| 1005 | char *mnemonic; |
| 1006 | { |
| 1007 | if (mnemonic[0] == 'f' && mnemonic[1] =='i') |
| 1008 | return 2; |
| 1009 | |
| 1010 | if (mnemonic[0] == 'f') |
| 1011 | return 1; |
| 1012 | |
| 1013 | return 0; |
| 1014 | } |
| 1015 | |
| 1016 | /* This is the guts of the machine-dependent assembler. LINE points to a |
| 1017 | machine dependent instruction. This function is supposed to emit |
| 1018 | the frags/bytes it assembles to. */ |
| 1019 | |
| 1020 | void |
| 1021 | md_assemble (line) |
| 1022 | char *line; |
| 1023 | { |
| 1024 | /* Points to template once we've found it. */ |
| 1025 | const template *t; |
| 1026 | |
| 1027 | /* Count the size of the instruction generated. */ |
| 1028 | int insn_size = 0; |
| 1029 | |
| 1030 | int j; |
| 1031 | |
| 1032 | char mnemonic[MAX_MNEM_SIZE]; |
| 1033 | |
| 1034 | /* Initialize globals. */ |
| 1035 | memset (&i, '\0', sizeof (i)); |
| 1036 | for (j = 0; j < MAX_OPERANDS; j++) |
| 1037 | i.disp_reloc[j] = NO_RELOC; |
| 1038 | memset (disp_expressions, '\0', sizeof (disp_expressions)); |
| 1039 | memset (im_expressions, '\0', sizeof (im_expressions)); |
| 1040 | save_stack_p = save_stack; /* reset stack pointer */ |
| 1041 | |
| 1042 | /* First parse an instruction mnemonic & call i386_operand for the operands. |
| 1043 | We assume that the scrubber has arranged it so that line[0] is the valid |
| 1044 | start of a (possibly prefixed) mnemonic. */ |
| 1045 | { |
| 1046 | char *l = line; |
| 1047 | char *token_start = l; |
| 1048 | char *mnem_p; |
| 1049 | |
| 1050 | /* Non-zero if we found a prefix only acceptable with string insns. */ |
| 1051 | const char *expecting_string_instruction = NULL; |
| 1052 | |
| 1053 | while (1) |
| 1054 | { |
| 1055 | mnem_p = mnemonic; |
| 1056 | while ((*mnem_p = mnemonic_chars[(unsigned char) *l]) != 0) |
| 1057 | { |
| 1058 | mnem_p++; |
| 1059 | if (mnem_p >= mnemonic + sizeof (mnemonic)) |
| 1060 | { |
| 1061 | as_bad (_("no such 386 instruction: `%s'"), token_start); |
| 1062 | return; |
| 1063 | } |
| 1064 | l++; |
| 1065 | } |
| 1066 | if (!is_space_char (*l) |
| 1067 | && *l != END_OF_INSN |
| 1068 | && *l != PREFIX_SEPARATOR) |
| 1069 | { |
| 1070 | as_bad (_("invalid character %s in mnemonic"), |
| 1071 | output_invalid (*l)); |
| 1072 | return; |
| 1073 | } |
| 1074 | if (token_start == l) |
| 1075 | { |
| 1076 | if (*l == PREFIX_SEPARATOR) |
| 1077 | as_bad (_("expecting prefix; got nothing")); |
| 1078 | else |
| 1079 | as_bad (_("expecting mnemonic; got nothing")); |
| 1080 | return; |
| 1081 | } |
| 1082 | |
| 1083 | /* Look up instruction (or prefix) via hash table. */ |
| 1084 | current_templates = hash_find (op_hash, mnemonic); |
| 1085 | |
| 1086 | if (*l != END_OF_INSN |
| 1087 | && (! is_space_char (*l) || l[1] != END_OF_INSN) |
| 1088 | && current_templates |
| 1089 | && (current_templates->start->opcode_modifier & IsPrefix)) |
| 1090 | { |
| 1091 | /* If we are in 16-bit mode, do not allow addr16 or data16. |
| 1092 | Similarly, in 32-bit mode, do not allow addr32 or data32. */ |
| 1093 | if ((current_templates->start->opcode_modifier & (Size16 | Size32)) |
| 1094 | && (((current_templates->start->opcode_modifier & Size32) != 0) |
| 1095 | ^ flag_16bit_code)) |
| 1096 | { |
| 1097 | as_bad (_("redundant %s prefix"), |
| 1098 | current_templates->start->name); |
| 1099 | return; |
| 1100 | } |
| 1101 | /* Add prefix, checking for repeated prefixes. */ |
| 1102 | switch (add_prefix (current_templates->start->base_opcode)) |
| 1103 | { |
| 1104 | case 0: |
| 1105 | return; |
| 1106 | case 2: |
| 1107 | expecting_string_instruction = |
| 1108 | current_templates->start->name; |
| 1109 | break; |
| 1110 | } |
| 1111 | /* Skip past PREFIX_SEPARATOR and reset token_start. */ |
| 1112 | token_start = ++l; |
| 1113 | } |
| 1114 | else |
| 1115 | break; |
| 1116 | } |
| 1117 | |
| 1118 | if (!current_templates) |
| 1119 | { |
| 1120 | /* See if we can get a match by trimming off a suffix. */ |
| 1121 | switch (mnem_p[-1]) |
| 1122 | { |
| 1123 | case WORD_MNEM_SUFFIX: |
| 1124 | case BYTE_MNEM_SUFFIX: |
| 1125 | case SHORT_MNEM_SUFFIX: |
| 1126 | case LONG_MNEM_SUFFIX: |
| 1127 | i.suffix = mnem_p[-1]; |
| 1128 | mnem_p[-1] = '\0'; |
| 1129 | current_templates = hash_find (op_hash, mnemonic); |
| 1130 | break; |
| 1131 | |
| 1132 | /* Intel Syntax */ |
| 1133 | case DWORD_MNEM_SUFFIX: |
| 1134 | if (intel_syntax) |
| 1135 | { |
| 1136 | i.suffix = mnem_p[-1]; |
| 1137 | mnem_p[-1] = '\0'; |
| 1138 | current_templates = hash_find (op_hash, mnemonic); |
| 1139 | break; |
| 1140 | } |
| 1141 | } |
| 1142 | if (!current_templates) |
| 1143 | { |
| 1144 | as_bad (_("no such 386 instruction: `%s'"), token_start); |
| 1145 | return; |
| 1146 | } |
| 1147 | } |
| 1148 | |
| 1149 | /* check for rep/repne without a string instruction */ |
| 1150 | if (expecting_string_instruction |
| 1151 | && !(current_templates->start->opcode_modifier & IsString)) |
| 1152 | { |
| 1153 | as_bad (_("expecting string instruction after `%s'"), |
| 1154 | expecting_string_instruction); |
| 1155 | return; |
| 1156 | } |
| 1157 | |
| 1158 | /* There may be operands to parse. */ |
| 1159 | if (*l != END_OF_INSN) |
| 1160 | { |
| 1161 | /* parse operands */ |
| 1162 | |
| 1163 | /* 1 if operand is pending after ','. */ |
| 1164 | unsigned int expecting_operand = 0; |
| 1165 | |
| 1166 | /* Non-zero if operand parens not balanced. */ |
| 1167 | unsigned int paren_not_balanced; |
| 1168 | |
| 1169 | do |
| 1170 | { |
| 1171 | /* skip optional white space before operand */ |
| 1172 | if (is_space_char (*l)) |
| 1173 | ++l; |
| 1174 | if (!is_operand_char (*l) && *l != END_OF_INSN) |
| 1175 | { |
| 1176 | as_bad (_("invalid character %s before operand %d"), |
| 1177 | output_invalid (*l), |
| 1178 | i.operands + 1); |
| 1179 | return; |
| 1180 | } |
| 1181 | token_start = l; /* after white space */ |
| 1182 | paren_not_balanced = 0; |
| 1183 | while (paren_not_balanced || *l != ',') |
| 1184 | { |
| 1185 | if (*l == END_OF_INSN) |
| 1186 | { |
| 1187 | if (paren_not_balanced) |
| 1188 | { |
| 1189 | if (!intel_syntax) |
| 1190 | as_bad (_("unbalanced parenthesis in operand %d."), |
| 1191 | i.operands + 1); |
| 1192 | else |
| 1193 | as_bad (_("unbalanced brackets in operand %d."), |
| 1194 | i.operands + 1); |
| 1195 | return; |
| 1196 | } |
| 1197 | else |
| 1198 | break; /* we are done */ |
| 1199 | } |
| 1200 | else if (!is_operand_char (*l) && !is_space_char (*l)) |
| 1201 | { |
| 1202 | as_bad (_("invalid character %s in operand %d"), |
| 1203 | output_invalid (*l), |
| 1204 | i.operands + 1); |
| 1205 | return; |
| 1206 | } |
| 1207 | if (!intel_syntax) |
| 1208 | { |
| 1209 | if (*l == '(') |
| 1210 | ++paren_not_balanced; |
| 1211 | if (*l == ')') |
| 1212 | --paren_not_balanced; |
| 1213 | } |
| 1214 | else |
| 1215 | { |
| 1216 | if (*l == '[') |
| 1217 | ++paren_not_balanced; |
| 1218 | if (*l == ']') |
| 1219 | --paren_not_balanced; |
| 1220 | } |
| 1221 | l++; |
| 1222 | } |
| 1223 | if (l != token_start) |
| 1224 | { /* yes, we've read in another operand */ |
| 1225 | unsigned int operand_ok; |
| 1226 | this_operand = i.operands++; |
| 1227 | if (i.operands > MAX_OPERANDS) |
| 1228 | { |
| 1229 | as_bad (_("spurious operands; (%d operands/instruction max)"), |
| 1230 | MAX_OPERANDS); |
| 1231 | return; |
| 1232 | } |
| 1233 | /* now parse operand adding info to 'i' as we go along */ |
| 1234 | END_STRING_AND_SAVE (l); |
| 1235 | |
| 1236 | if (intel_syntax) |
| 1237 | operand_ok = i386_intel_operand (token_start, intel_float_operand (mnemonic)); |
| 1238 | else |
| 1239 | operand_ok = i386_operand (token_start); |
| 1240 | |
| 1241 | RESTORE_END_STRING (l); /* restore old contents */ |
| 1242 | if (!operand_ok) |
| 1243 | return; |
| 1244 | } |
| 1245 | else |
| 1246 | { |
| 1247 | if (expecting_operand) |
| 1248 | { |
| 1249 | expecting_operand_after_comma: |
| 1250 | as_bad (_("expecting operand after ','; got nothing")); |
| 1251 | return; |
| 1252 | } |
| 1253 | if (*l == ',') |
| 1254 | { |
| 1255 | as_bad (_("expecting operand before ','; got nothing")); |
| 1256 | return; |
| 1257 | } |
| 1258 | } |
| 1259 | |
| 1260 | /* now *l must be either ',' or END_OF_INSN */ |
| 1261 | if (*l == ',') |
| 1262 | { |
| 1263 | if (*++l == END_OF_INSN) |
| 1264 | { /* just skip it, if it's \n complain */ |
| 1265 | goto expecting_operand_after_comma; |
| 1266 | } |
| 1267 | expecting_operand = 1; |
| 1268 | } |
| 1269 | } |
| 1270 | while (*l != END_OF_INSN); /* until we get end of insn */ |
| 1271 | } |
| 1272 | } |
| 1273 | |
| 1274 | /* Now we've parsed the mnemonic into a set of templates, and have the |
| 1275 | operands at hand. |
| 1276 | |
| 1277 | Next, we find a template that matches the given insn, |
| 1278 | making sure the overlap of the given operands types is consistent |
| 1279 | with the template operand types. */ |
| 1280 | |
| 1281 | #define MATCH(overlap, given, template) \ |
| 1282 | ((overlap & ~JumpAbsolute) \ |
| 1283 | && ((given) & (BaseIndex|JumpAbsolute)) == ((overlap) & (BaseIndex|JumpAbsolute))) |
| 1284 | |
| 1285 | /* If given types r0 and r1 are registers they must be of the same type |
| 1286 | unless the expected operand type register overlap is null. |
| 1287 | Note that Acc in a template matches every size of reg. */ |
| 1288 | #define CONSISTENT_REGISTER_MATCH(m0, g0, t0, m1, g1, t1) \ |
| 1289 | ( ((g0) & Reg) == 0 || ((g1) & Reg) == 0 || \ |
| 1290 | ((g0) & Reg) == ((g1) & Reg) || \ |
| 1291 | ((((m0) & Acc) ? Reg : (t0)) & (((m1) & Acc) ? Reg : (t1)) & Reg) == 0 ) |
| 1292 | |
| 1293 | { |
| 1294 | register unsigned int overlap0, overlap1; |
| 1295 | unsigned int overlap2; |
| 1296 | unsigned int found_reverse_match; |
| 1297 | int suffix_check; |
| 1298 | |
| 1299 | /* All intel opcodes have reversed operands except for "bound" and |
| 1300 | "enter". We also don't reverse intersegment "jmp" and "call" |
| 1301 | instructions with 2 immediate operands so that the immediate segment |
| 1302 | precedes the offset, as it does when in AT&T mode. "enter" and the |
| 1303 | intersegment "jmp" and "call" instructions are the only ones that |
| 1304 | have two immediate operands. */ |
| 1305 | if (intel_syntax && i.operands > 1 |
| 1306 | && (strcmp (mnemonic, "bound") != 0) |
| 1307 | && !((i.types[0] & Imm) && (i.types[1] & Imm))) |
| 1308 | { |
| 1309 | union i386_op temp_op; |
| 1310 | unsigned int temp_type; |
| 1311 | int xchg1 = 0; |
| 1312 | int xchg2 = 0; |
| 1313 | |
| 1314 | if (i.operands == 2) |
| 1315 | { |
| 1316 | xchg1 = 0; |
| 1317 | xchg2 = 1; |
| 1318 | } |
| 1319 | else if (i.operands == 3) |
| 1320 | { |
| 1321 | xchg1 = 0; |
| 1322 | xchg2 = 2; |
| 1323 | } |
| 1324 | temp_type = i.types[xchg2]; |
| 1325 | i.types[xchg2] = i.types[xchg1]; |
| 1326 | i.types[xchg1] = temp_type; |
| 1327 | temp_op = i.op[xchg2]; |
| 1328 | i.op[xchg2] = i.op[xchg1]; |
| 1329 | i.op[xchg1] = temp_op; |
| 1330 | |
| 1331 | if (i.mem_operands == 2) |
| 1332 | { |
| 1333 | const seg_entry *temp_seg; |
| 1334 | temp_seg = i.seg[0]; |
| 1335 | i.seg[0] = i.seg[1]; |
| 1336 | i.seg[1] = temp_seg; |
| 1337 | } |
| 1338 | } |
| 1339 | |
| 1340 | if (i.imm_operands) |
| 1341 | { |
| 1342 | /* Try to ensure constant immediates are represented in the smallest |
| 1343 | opcode possible. */ |
| 1344 | char guess_suffix = 0; |
| 1345 | int op; |
| 1346 | |
| 1347 | if (i.suffix) |
| 1348 | guess_suffix = i.suffix; |
| 1349 | else if (i.reg_operands) |
| 1350 | { |
| 1351 | /* Figure out a suffix from the last register operand specified. |
| 1352 | We can't do this properly yet, ie. excluding InOutPortReg, |
| 1353 | but the following works for instructions with immediates. |
| 1354 | In any case, we can't set i.suffix yet. */ |
| 1355 | for (op = i.operands; --op >= 0; ) |
| 1356 | if (i.types[op] & Reg) |
| 1357 | { |
| 1358 | if (i.types[op] & Reg8) |
| 1359 | guess_suffix = BYTE_MNEM_SUFFIX; |
| 1360 | else if (i.types[op] & Reg16) |
| 1361 | guess_suffix = WORD_MNEM_SUFFIX; |
| 1362 | break; |
| 1363 | } |
| 1364 | } |
| 1365 | else if (flag_16bit_code ^ (i.prefix[DATA_PREFIX] != 0)) |
| 1366 | guess_suffix = WORD_MNEM_SUFFIX; |
| 1367 | |
| 1368 | for (op = i.operands; --op >= 0; ) |
| 1369 | if ((i.types[op] & Imm) |
| 1370 | && i.op[op].imms->X_op == O_constant) |
| 1371 | { |
| 1372 | /* If a suffix is given, this operand may be shortened. */ |
| 1373 | switch (guess_suffix) |
| 1374 | { |
| 1375 | case WORD_MNEM_SUFFIX: |
| 1376 | i.types[op] |= Imm16; |
| 1377 | break; |
| 1378 | case BYTE_MNEM_SUFFIX: |
| 1379 | i.types[op] |= Imm16 | Imm8 | Imm8S; |
| 1380 | break; |
| 1381 | } |
| 1382 | |
| 1383 | /* If this operand is at most 16 bits, convert it to a |
| 1384 | signed 16 bit number before trying to see whether it will |
| 1385 | fit in an even smaller size. This allows a 16-bit operand |
| 1386 | such as $0xffe0 to be recognised as within Imm8S range. */ |
| 1387 | if ((i.types[op] & Imm16) |
| 1388 | && (i.op[op].imms->X_add_number & ~(offsetT)0xffff) == 0) |
| 1389 | { |
| 1390 | i.op[op].imms->X_add_number = |
| 1391 | (((i.op[op].imms->X_add_number & 0xffff) ^ 0x8000) - 0x8000); |
| 1392 | } |
| 1393 | i.types[op] |= smallest_imm_type ((long) i.op[op].imms->X_add_number); |
| 1394 | } |
| 1395 | } |
| 1396 | |
| 1397 | overlap0 = 0; |
| 1398 | overlap1 = 0; |
| 1399 | overlap2 = 0; |
| 1400 | found_reverse_match = 0; |
| 1401 | suffix_check = (i.suffix == BYTE_MNEM_SUFFIX |
| 1402 | ? No_bSuf |
| 1403 | : (i.suffix == WORD_MNEM_SUFFIX |
| 1404 | ? No_wSuf |
| 1405 | : (i.suffix == SHORT_MNEM_SUFFIX |
| 1406 | ? No_sSuf |
| 1407 | : (i.suffix == LONG_MNEM_SUFFIX |
| 1408 | ? No_lSuf |
| 1409 | : (i.suffix == DWORD_MNEM_SUFFIX |
| 1410 | ? No_dSuf |
| 1411 | : (i.suffix == LONG_DOUBLE_MNEM_SUFFIX ? No_xSuf : 0)))))); |
| 1412 | |
| 1413 | for (t = current_templates->start; |
| 1414 | t < current_templates->end; |
| 1415 | t++) |
| 1416 | { |
| 1417 | /* Must have right number of operands. */ |
| 1418 | if (i.operands != t->operands) |
| 1419 | continue; |
| 1420 | |
| 1421 | /* Check the suffix, except for some instructions in intel mode. */ |
| 1422 | if ((t->opcode_modifier & suffix_check) |
| 1423 | && !(intel_syntax |
| 1424 | && t->base_opcode == 0xd9 |
| 1425 | && (t->extension_opcode == 5 /* 0xd9,5 "fldcw" */ |
| 1426 | || t->extension_opcode == 7))) /* 0xd9,7 "f{n}stcw" */ |
| 1427 | continue; |
| 1428 | |
| 1429 | else if (!t->operands) |
| 1430 | break; /* 0 operands always matches */ |
| 1431 | |
| 1432 | overlap0 = i.types[0] & t->operand_types[0]; |
| 1433 | switch (t->operands) |
| 1434 | { |
| 1435 | case 1: |
| 1436 | if (!MATCH (overlap0, i.types[0], t->operand_types[0])) |
| 1437 | continue; |
| 1438 | break; |
| 1439 | case 2: |
| 1440 | case 3: |
| 1441 | overlap1 = i.types[1] & t->operand_types[1]; |
| 1442 | if (!MATCH (overlap0, i.types[0], t->operand_types[0]) |
| 1443 | || !MATCH (overlap1, i.types[1], t->operand_types[1]) |
| 1444 | || !CONSISTENT_REGISTER_MATCH (overlap0, i.types[0], |
| 1445 | t->operand_types[0], |
| 1446 | overlap1, i.types[1], |
| 1447 | t->operand_types[1])) |
| 1448 | { |
| 1449 | |
| 1450 | /* check if other direction is valid ... */ |
| 1451 | if ((t->opcode_modifier & (D|FloatD)) == 0) |
| 1452 | continue; |
| 1453 | |
| 1454 | /* try reversing direction of operands */ |
| 1455 | overlap0 = i.types[0] & t->operand_types[1]; |
| 1456 | overlap1 = i.types[1] & t->operand_types[0]; |
| 1457 | if (!MATCH (overlap0, i.types[0], t->operand_types[1]) |
| 1458 | || !MATCH (overlap1, i.types[1], t->operand_types[0]) |
| 1459 | || !CONSISTENT_REGISTER_MATCH (overlap0, i.types[0], |
| 1460 | t->operand_types[1], |
| 1461 | overlap1, i.types[1], |
| 1462 | t->operand_types[0])) |
| 1463 | { |
| 1464 | /* does not match either direction */ |
| 1465 | continue; |
| 1466 | } |
| 1467 | /* found_reverse_match holds which of D or FloatDR |
| 1468 | we've found. */ |
| 1469 | found_reverse_match = t->opcode_modifier & (D|FloatDR); |
| 1470 | break; |
| 1471 | } |
| 1472 | /* found a forward 2 operand match here */ |
| 1473 | if (t->operands == 3) |
| 1474 | { |
| 1475 | /* Here we make use of the fact that there are no |
| 1476 | reverse match 3 operand instructions, and all 3 |
| 1477 | operand instructions only need to be checked for |
| 1478 | register consistency between operands 2 and 3. */ |
| 1479 | overlap2 = i.types[2] & t->operand_types[2]; |
| 1480 | if (!MATCH (overlap2, i.types[2], t->operand_types[2]) |
| 1481 | || !CONSISTENT_REGISTER_MATCH (overlap1, i.types[1], |
| 1482 | t->operand_types[1], |
| 1483 | overlap2, i.types[2], |
| 1484 | t->operand_types[2])) |
| 1485 | |
| 1486 | continue; |
| 1487 | } |
| 1488 | /* found either forward/reverse 2 or 3 operand match here: |
| 1489 | slip through to break */ |
| 1490 | } |
| 1491 | break; /* we've found a match; break out of loop */ |
| 1492 | } /* for (t = ... */ |
| 1493 | if (t == current_templates->end) |
| 1494 | { /* we found no match */ |
| 1495 | as_bad (_("suffix or operands invalid for `%s'"), |
| 1496 | current_templates->start->name); |
| 1497 | return; |
| 1498 | } |
| 1499 | |
| 1500 | if (!intel_syntax |
| 1501 | && (i.types[0] & JumpAbsolute) != (t->operand_types[0] & JumpAbsolute)) |
| 1502 | { |
| 1503 | as_warn (_("indirect %s without `*'"), t->name); |
| 1504 | } |
| 1505 | |
| 1506 | if ((t->opcode_modifier & (IsPrefix|IgnoreSize)) == (IsPrefix|IgnoreSize)) |
| 1507 | { |
| 1508 | /* Warn them that a data or address size prefix doesn't affect |
| 1509 | assembly of the next line of code. */ |
| 1510 | as_warn (_("stand-alone `%s' prefix"), t->name); |
| 1511 | } |
| 1512 | |
| 1513 | /* Copy the template we found. */ |
| 1514 | i.tm = *t; |
| 1515 | if (found_reverse_match) |
| 1516 | { |
| 1517 | /* If we found a reverse match we must alter the opcode |
| 1518 | direction bit. found_reverse_match holds bits to change |
| 1519 | (different for int & float insns). */ |
| 1520 | |
| 1521 | i.tm.base_opcode ^= found_reverse_match; |
| 1522 | |
| 1523 | i.tm.operand_types[0] = t->operand_types[1]; |
| 1524 | i.tm.operand_types[1] = t->operand_types[0]; |
| 1525 | } |
| 1526 | |
| 1527 | /* Undo SYSV386_COMPAT brokenness when in Intel mode. See i386.h */ |
| 1528 | if (SYSV386_COMPAT |
| 1529 | && intel_syntax |
| 1530 | && (i.tm.base_opcode & 0xfffffde0) == 0xdce0) |
| 1531 | i.tm.base_opcode ^= FloatR; |
| 1532 | |
| 1533 | if (i.tm.opcode_modifier & FWait) |
| 1534 | if (! add_prefix (FWAIT_OPCODE)) |
| 1535 | return; |
| 1536 | |
| 1537 | /* Check string instruction segment overrides */ |
| 1538 | if ((i.tm.opcode_modifier & IsString) != 0 && i.mem_operands != 0) |
| 1539 | { |
| 1540 | int mem_op = (i.types[0] & AnyMem) ? 0 : 1; |
| 1541 | if ((i.tm.operand_types[mem_op] & EsSeg) != 0) |
| 1542 | { |
| 1543 | if (i.seg[0] != NULL && i.seg[0] != &es) |
| 1544 | { |
| 1545 | as_bad (_("`%s' operand %d must use `%%es' segment"), |
| 1546 | i.tm.name, |
| 1547 | mem_op + 1); |
| 1548 | return; |
| 1549 | } |
| 1550 | /* There's only ever one segment override allowed per instruction. |
| 1551 | This instruction possibly has a legal segment override on the |
| 1552 | second operand, so copy the segment to where non-string |
| 1553 | instructions store it, allowing common code. */ |
| 1554 | i.seg[0] = i.seg[1]; |
| 1555 | } |
| 1556 | else if ((i.tm.operand_types[mem_op + 1] & EsSeg) != 0) |
| 1557 | { |
| 1558 | if (i.seg[1] != NULL && i.seg[1] != &es) |
| 1559 | { |
| 1560 | as_bad (_("`%s' operand %d must use `%%es' segment"), |
| 1561 | i.tm.name, |
| 1562 | mem_op + 2); |
| 1563 | return; |
| 1564 | } |
| 1565 | } |
| 1566 | } |
| 1567 | |
| 1568 | /* If matched instruction specifies an explicit instruction mnemonic |
| 1569 | suffix, use it. */ |
| 1570 | if (i.tm.opcode_modifier & (Size16 | Size32)) |
| 1571 | { |
| 1572 | if (i.tm.opcode_modifier & Size16) |
| 1573 | i.suffix = WORD_MNEM_SUFFIX; |
| 1574 | else |
| 1575 | i.suffix = LONG_MNEM_SUFFIX; |
| 1576 | } |
| 1577 | else if (i.reg_operands) |
| 1578 | { |
| 1579 | /* If there's no instruction mnemonic suffix we try to invent one |
| 1580 | based on register operands. */ |
| 1581 | if (!i.suffix) |
| 1582 | { |
| 1583 | /* We take i.suffix from the last register operand specified, |
| 1584 | Destination register type is more significant than source |
| 1585 | register type. */ |
| 1586 | int op; |
| 1587 | for (op = i.operands; --op >= 0; ) |
| 1588 | if ((i.types[op] & Reg) |
| 1589 | && !(i.tm.operand_types[op] & InOutPortReg)) |
| 1590 | { |
| 1591 | i.suffix = ((i.types[op] & Reg8) ? BYTE_MNEM_SUFFIX : |
| 1592 | (i.types[op] & Reg16) ? WORD_MNEM_SUFFIX : |
| 1593 | LONG_MNEM_SUFFIX); |
| 1594 | break; |
| 1595 | } |
| 1596 | } |
| 1597 | else if (i.suffix == BYTE_MNEM_SUFFIX) |
| 1598 | { |
| 1599 | int op; |
| 1600 | for (op = i.operands; --op >= 0; ) |
| 1601 | { |
| 1602 | /* If this is an eight bit register, it's OK. If it's |
| 1603 | the 16 or 32 bit version of an eight bit register, |
| 1604 | we will just use the low portion, and that's OK too. */ |
| 1605 | if (i.types[op] & Reg8) |
| 1606 | continue; |
| 1607 | |
| 1608 | /* movzx and movsx should not generate this warning. */ |
| 1609 | if (intel_syntax |
| 1610 | && (i.tm.base_opcode == 0xfb7 |
| 1611 | || i.tm.base_opcode == 0xfb6 |
| 1612 | || i.tm.base_opcode == 0xfbe |
| 1613 | || i.tm.base_opcode == 0xfbf)) |
| 1614 | continue; |
| 1615 | |
| 1616 | if ((i.types[op] & WordReg) && i.op[op].regs->reg_num < 4 |
| 1617 | #if 0 |
| 1618 | /* Check that the template allows eight bit regs |
| 1619 | This kills insns such as `orb $1,%edx', which |
| 1620 | maybe should be allowed. */ |
| 1621 | && (i.tm.operand_types[op] & (Reg8|InOutPortReg)) |
| 1622 | #endif |
| 1623 | ) |
| 1624 | { |
| 1625 | #if REGISTER_WARNINGS |
| 1626 | if ((i.tm.operand_types[op] & InOutPortReg) == 0) |
| 1627 | as_warn (_("using `%%%s' instead of `%%%s' due to `%c' suffix"), |
| 1628 | (i.op[op].regs - (i.types[op] & Reg16 ? 8 : 16))->reg_name, |
| 1629 | i.op[op].regs->reg_name, |
| 1630 | i.suffix); |
| 1631 | #endif |
| 1632 | continue; |
| 1633 | } |
| 1634 | /* Any other register is bad */ |
| 1635 | if (i.types[op] & (Reg | RegMMX | RegXMM |
| 1636 | | SReg2 | SReg3 |
| 1637 | | Control | Debug | Test |
| 1638 | | FloatReg | FloatAcc)) |
| 1639 | { |
| 1640 | as_bad (_("`%%%s' not allowed with `%s%c'"), |
| 1641 | i.op[op].regs->reg_name, |
| 1642 | i.tm.name, |
| 1643 | i.suffix); |
| 1644 | return; |
| 1645 | } |
| 1646 | } |
| 1647 | } |
| 1648 | else if (i.suffix == LONG_MNEM_SUFFIX) |
| 1649 | { |
| 1650 | int op; |
| 1651 | for (op = i.operands; --op >= 0; ) |
| 1652 | /* Reject eight bit registers, except where the template |
| 1653 | requires them. (eg. movzb) */ |
| 1654 | if ((i.types[op] & Reg8) != 0 |
| 1655 | && (i.tm.operand_types[op] & (Reg16|Reg32|Acc)) != 0) |
| 1656 | { |
| 1657 | as_bad (_("`%%%s' not allowed with `%s%c'"), |
| 1658 | i.op[op].regs->reg_name, |
| 1659 | i.tm.name, |
| 1660 | i.suffix); |
| 1661 | return; |
| 1662 | } |
| 1663 | #if REGISTER_WARNINGS |
| 1664 | /* Warn if the e prefix on a general reg is missing. */ |
| 1665 | else if ((i.types[op] & Reg16) != 0 |
| 1666 | && (i.tm.operand_types[op] & (Reg32|Acc)) != 0) |
| 1667 | { |
| 1668 | as_warn (_("using `%%%s' instead of `%%%s' due to `%c' suffix"), |
| 1669 | (i.op[op].regs + 8)->reg_name, |
| 1670 | i.op[op].regs->reg_name, |
| 1671 | i.suffix); |
| 1672 | } |
| 1673 | #endif |
| 1674 | } |
| 1675 | else if (i.suffix == WORD_MNEM_SUFFIX) |
| 1676 | { |
| 1677 | int op; |
| 1678 | for (op = i.operands; --op >= 0; ) |
| 1679 | /* Reject eight bit registers, except where the template |
| 1680 | requires them. (eg. movzb) */ |
| 1681 | if ((i.types[op] & Reg8) != 0 |
| 1682 | && (i.tm.operand_types[op] & (Reg16|Reg32|Acc)) != 0) |
| 1683 | { |
| 1684 | as_bad (_("`%%%s' not allowed with `%s%c'"), |
| 1685 | i.op[op].regs->reg_name, |
| 1686 | i.tm.name, |
| 1687 | i.suffix); |
| 1688 | return; |
| 1689 | } |
| 1690 | #if REGISTER_WARNINGS |
| 1691 | /* Warn if the e prefix on a general reg is present. */ |
| 1692 | else if ((i.types[op] & Reg32) != 0 |
| 1693 | && (i.tm.operand_types[op] & (Reg16|Acc)) != 0) |
| 1694 | { |
| 1695 | as_warn (_("using `%%%s' instead of `%%%s' due to `%c' suffix"), |
| 1696 | (i.op[op].regs - 8)->reg_name, |
| 1697 | i.op[op].regs->reg_name, |
| 1698 | i.suffix); |
| 1699 | } |
| 1700 | #endif |
| 1701 | } |
| 1702 | else |
| 1703 | abort(); |
| 1704 | } |
| 1705 | else if ((i.tm.opcode_modifier & DefaultSize) && !i.suffix) |
| 1706 | { |
| 1707 | i.suffix = stackop_size; |
| 1708 | } |
| 1709 | |
| 1710 | /* Make still unresolved immediate matches conform to size of immediate |
| 1711 | given in i.suffix. Note: overlap2 cannot be an immediate! */ |
| 1712 | if ((overlap0 & (Imm8 | Imm8S | Imm16 | Imm32)) |
| 1713 | && overlap0 != Imm8 && overlap0 != Imm8S |
| 1714 | && overlap0 != Imm16 && overlap0 != Imm32) |
| 1715 | { |
| 1716 | if (i.suffix) |
| 1717 | { |
| 1718 | overlap0 &= (i.suffix == BYTE_MNEM_SUFFIX ? (Imm8 | Imm8S) : |
| 1719 | (i.suffix == WORD_MNEM_SUFFIX ? Imm16 : Imm32)); |
| 1720 | } |
| 1721 | else if (overlap0 == (Imm16 | Imm32)) |
| 1722 | { |
| 1723 | overlap0 = |
| 1724 | (flag_16bit_code ^ (i.prefix[DATA_PREFIX] != 0)) ? Imm16 : Imm32; |
| 1725 | } |
| 1726 | else |
| 1727 | { |
| 1728 | as_bad (_("no instruction mnemonic suffix given; can't determine immediate size")); |
| 1729 | return; |
| 1730 | } |
| 1731 | } |
| 1732 | if ((overlap1 & (Imm8 | Imm8S | Imm16 | Imm32)) |
| 1733 | && overlap1 != Imm8 && overlap1 != Imm8S |
| 1734 | && overlap1 != Imm16 && overlap1 != Imm32) |
| 1735 | { |
| 1736 | if (i.suffix) |
| 1737 | { |
| 1738 | overlap1 &= (i.suffix == BYTE_MNEM_SUFFIX ? (Imm8 | Imm8S) : |
| 1739 | (i.suffix == WORD_MNEM_SUFFIX ? Imm16 : Imm32)); |
| 1740 | } |
| 1741 | else if (overlap1 == (Imm16 | Imm32)) |
| 1742 | { |
| 1743 | overlap1 = |
| 1744 | (flag_16bit_code ^ (i.prefix[DATA_PREFIX] != 0)) ? Imm16 : Imm32; |
| 1745 | } |
| 1746 | else |
| 1747 | { |
| 1748 | as_bad (_("no instruction mnemonic suffix given; can't determine immediate size")); |
| 1749 | return; |
| 1750 | } |
| 1751 | } |
| 1752 | assert ((overlap2 & Imm) == 0); |
| 1753 | |
| 1754 | i.types[0] = overlap0; |
| 1755 | if (overlap0 & ImplicitRegister) |
| 1756 | i.reg_operands--; |
| 1757 | if (overlap0 & Imm1) |
| 1758 | i.imm_operands = 0; /* kludge for shift insns */ |
| 1759 | |
| 1760 | i.types[1] = overlap1; |
| 1761 | if (overlap1 & ImplicitRegister) |
| 1762 | i.reg_operands--; |
| 1763 | |
| 1764 | i.types[2] = overlap2; |
| 1765 | if (overlap2 & ImplicitRegister) |
| 1766 | i.reg_operands--; |
| 1767 | |
| 1768 | /* Finalize opcode. First, we change the opcode based on the operand |
| 1769 | size given by i.suffix: We need not change things for byte insns. */ |
| 1770 | |
| 1771 | if (!i.suffix && (i.tm.opcode_modifier & W)) |
| 1772 | { |
| 1773 | as_bad (_("no instruction mnemonic suffix given and no register operands; can't size instruction")); |
| 1774 | return; |
| 1775 | } |
| 1776 | |
| 1777 | /* For movzx and movsx, need to check the register type */ |
| 1778 | if (intel_syntax |
| 1779 | && (i.tm.base_opcode == 0xfb6 || i.tm.base_opcode == 0xfbe)) |
| 1780 | if (i.suffix && i.suffix == BYTE_MNEM_SUFFIX) |
| 1781 | { |
| 1782 | unsigned int prefix = DATA_PREFIX_OPCODE; |
| 1783 | |
| 1784 | if ((i.op[1].regs->reg_type & Reg16) != 0) |
| 1785 | if (!add_prefix (prefix)) |
| 1786 | return; |
| 1787 | } |
| 1788 | |
| 1789 | if (i.suffix && i.suffix != BYTE_MNEM_SUFFIX) |
| 1790 | { |
| 1791 | /* It's not a byte, select word/dword operation. */ |
| 1792 | if (i.tm.opcode_modifier & W) |
| 1793 | { |
| 1794 | if (i.tm.opcode_modifier & ShortForm) |
| 1795 | i.tm.base_opcode |= 8; |
| 1796 | else |
| 1797 | i.tm.base_opcode |= 1; |
| 1798 | } |
| 1799 | /* Now select between word & dword operations via the operand |
| 1800 | size prefix, except for instructions that will ignore this |
| 1801 | prefix anyway. */ |
| 1802 | if (((intel_syntax && (i.suffix == DWORD_MNEM_SUFFIX)) |
| 1803 | || i.suffix == LONG_MNEM_SUFFIX) == flag_16bit_code |
| 1804 | && !(i.tm.opcode_modifier & IgnoreSize)) |
| 1805 | { |
| 1806 | unsigned int prefix = DATA_PREFIX_OPCODE; |
| 1807 | if (i.tm.opcode_modifier & JumpByte) /* jcxz, loop */ |
| 1808 | prefix = ADDR_PREFIX_OPCODE; |
| 1809 | |
| 1810 | if (! add_prefix (prefix)) |
| 1811 | return; |
| 1812 | } |
| 1813 | /* Size floating point instruction. */ |
| 1814 | if (i.suffix == LONG_MNEM_SUFFIX |
| 1815 | || (intel_syntax && i.suffix == DWORD_MNEM_SUFFIX)) |
| 1816 | { |
| 1817 | if (i.tm.opcode_modifier & FloatMF) |
| 1818 | i.tm.base_opcode ^= 4; |
| 1819 | } |
| 1820 | } |
| 1821 | |
| 1822 | if (i.tm.opcode_modifier & ImmExt) |
| 1823 | { |
| 1824 | /* These AMD 3DNow! and Intel Katmai New Instructions have an |
| 1825 | opcode suffix which is coded in the same place as an 8-bit |
| 1826 | immediate field would be. Here we fake an 8-bit immediate |
| 1827 | operand from the opcode suffix stored in tm.extension_opcode. */ |
| 1828 | |
| 1829 | expressionS *exp; |
| 1830 | |
| 1831 | assert(i.imm_operands == 0 && i.operands <= 2 && 2 < MAX_OPERANDS); |
| 1832 | |
| 1833 | exp = &im_expressions[i.imm_operands++]; |
| 1834 | i.op[i.operands].imms = exp; |
| 1835 | i.types[i.operands++] = Imm8; |
| 1836 | exp->X_op = O_constant; |
| 1837 | exp->X_add_number = i.tm.extension_opcode; |
| 1838 | i.tm.extension_opcode = None; |
| 1839 | } |
| 1840 | |
| 1841 | /* For insns with operands there are more diddles to do to the opcode. */ |
| 1842 | if (i.operands) |
| 1843 | { |
| 1844 | /* Default segment register this instruction will use |
| 1845 | for memory accesses. 0 means unknown. |
| 1846 | This is only for optimizing out unnecessary segment overrides. */ |
| 1847 | const seg_entry *default_seg = 0; |
| 1848 | |
| 1849 | /* The imul $imm, %reg instruction is converted into |
| 1850 | imul $imm, %reg, %reg, and the clr %reg instruction |
| 1851 | is converted into xor %reg, %reg. */ |
| 1852 | if (i.tm.opcode_modifier & regKludge) |
| 1853 | { |
| 1854 | unsigned int first_reg_op = (i.types[0] & Reg) ? 0 : 1; |
| 1855 | /* Pretend we saw the extra register operand. */ |
| 1856 | assert (i.op[first_reg_op+1].regs == 0); |
| 1857 | i.op[first_reg_op+1].regs = i.op[first_reg_op].regs; |
| 1858 | i.types[first_reg_op+1] = i.types[first_reg_op]; |
| 1859 | i.reg_operands = 2; |
| 1860 | } |
| 1861 | |
| 1862 | if (i.tm.opcode_modifier & ShortForm) |
| 1863 | { |
| 1864 | /* The register or float register operand is in operand 0 or 1. */ |
| 1865 | unsigned int op = (i.types[0] & (Reg | FloatReg)) ? 0 : 1; |
| 1866 | /* Register goes in low 3 bits of opcode. */ |
| 1867 | i.tm.base_opcode |= i.op[op].regs->reg_num; |
| 1868 | if ((i.tm.opcode_modifier & Ugh) != 0) |
| 1869 | { |
| 1870 | /* Warn about some common errors, but press on regardless. |
| 1871 | The first case can be generated by gcc (<= 2.8.1). */ |
| 1872 | if (i.operands == 2) |
| 1873 | { |
| 1874 | /* reversed arguments on faddp, fsubp, etc. */ |
| 1875 | as_warn (_("translating to `%s %%%s,%%%s'"), i.tm.name, |
| 1876 | i.op[1].regs->reg_name, |
| 1877 | i.op[0].regs->reg_name); |
| 1878 | } |
| 1879 | else |
| 1880 | { |
| 1881 | /* extraneous `l' suffix on fp insn */ |
| 1882 | as_warn (_("translating to `%s %%%s'"), i.tm.name, |
| 1883 | i.op[0].regs->reg_name); |
| 1884 | } |
| 1885 | } |
| 1886 | } |
| 1887 | else if (i.tm.opcode_modifier & Modrm) |
| 1888 | { |
| 1889 | /* The opcode is completed (modulo i.tm.extension_opcode which |
| 1890 | must be put into the modrm byte). |
| 1891 | Now, we make the modrm & index base bytes based on all the |
| 1892 | info we've collected. */ |
| 1893 | |
| 1894 | /* i.reg_operands MUST be the number of real register operands; |
| 1895 | implicit registers do not count. */ |
| 1896 | if (i.reg_operands == 2) |
| 1897 | { |
| 1898 | unsigned int source, dest; |
| 1899 | source = ((i.types[0] |
| 1900 | & (Reg | RegMMX | RegXMM |
| 1901 | | SReg2 | SReg3 |
| 1902 | | Control | Debug | Test)) |
| 1903 | ? 0 : 1); |
| 1904 | dest = source + 1; |
| 1905 | |
| 1906 | i.rm.mode = 3; |
| 1907 | /* One of the register operands will be encoded in the |
| 1908 | i.tm.reg field, the other in the combined i.tm.mode |
| 1909 | and i.tm.regmem fields. If no form of this |
| 1910 | instruction supports a memory destination operand, |
| 1911 | then we assume the source operand may sometimes be |
| 1912 | a memory operand and so we need to store the |
| 1913 | destination in the i.rm.reg field. */ |
| 1914 | if ((i.tm.operand_types[dest] & AnyMem) == 0) |
| 1915 | { |
| 1916 | i.rm.reg = i.op[dest].regs->reg_num; |
| 1917 | i.rm.regmem = i.op[source].regs->reg_num; |
| 1918 | } |
| 1919 | else |
| 1920 | { |
| 1921 | i.rm.reg = i.op[source].regs->reg_num; |
| 1922 | i.rm.regmem = i.op[dest].regs->reg_num; |
| 1923 | } |
| 1924 | } |
| 1925 | else |
| 1926 | { /* if it's not 2 reg operands... */ |
| 1927 | if (i.mem_operands) |
| 1928 | { |
| 1929 | unsigned int fake_zero_displacement = 0; |
| 1930 | unsigned int op = ((i.types[0] & AnyMem) |
| 1931 | ? 0 |
| 1932 | : (i.types[1] & AnyMem) ? 1 : 2); |
| 1933 | |
| 1934 | default_seg = &ds; |
| 1935 | |
| 1936 | if (! i.base_reg) |
| 1937 | { |
| 1938 | i.rm.mode = 0; |
| 1939 | if (! i.disp_operands) |
| 1940 | fake_zero_displacement = 1; |
| 1941 | if (! i.index_reg) |
| 1942 | { |
| 1943 | /* Operand is just <disp> */ |
| 1944 | if (flag_16bit_code ^ (i.prefix[ADDR_PREFIX] != 0)) |
| 1945 | { |
| 1946 | i.rm.regmem = NO_BASE_REGISTER_16; |
| 1947 | i.types[op] &= ~Disp; |
| 1948 | i.types[op] |= Disp16; |
| 1949 | } |
| 1950 | else |
| 1951 | { |
| 1952 | i.rm.regmem = NO_BASE_REGISTER; |
| 1953 | i.types[op] &= ~Disp; |
| 1954 | i.types[op] |= Disp32; |
| 1955 | } |
| 1956 | } |
| 1957 | else /* ! i.base_reg && i.index_reg */ |
| 1958 | { |
| 1959 | i.sib.index = i.index_reg->reg_num; |
| 1960 | i.sib.base = NO_BASE_REGISTER; |
| 1961 | i.sib.scale = i.log2_scale_factor; |
| 1962 | i.rm.regmem = ESCAPE_TO_TWO_BYTE_ADDRESSING; |
| 1963 | i.types[op] &= ~Disp; |
| 1964 | i.types[op] |= Disp32; /* Must be 32 bit */ |
| 1965 | } |
| 1966 | } |
| 1967 | else if (i.base_reg->reg_type & Reg16) |
| 1968 | { |
| 1969 | switch (i.base_reg->reg_num) |
| 1970 | { |
| 1971 | case 3: /* (%bx) */ |
| 1972 | if (! i.index_reg) |
| 1973 | i.rm.regmem = 7; |
| 1974 | else /* (%bx,%si) -> 0, or (%bx,%di) -> 1 */ |
| 1975 | i.rm.regmem = i.index_reg->reg_num - 6; |
| 1976 | break; |
| 1977 | case 5: /* (%bp) */ |
| 1978 | default_seg = &ss; |
| 1979 | if (! i.index_reg) |
| 1980 | { |
| 1981 | i.rm.regmem = 6; |
| 1982 | if ((i.types[op] & Disp) == 0) |
| 1983 | { |
| 1984 | /* fake (%bp) into 0(%bp) */ |
| 1985 | i.types[op] |= Disp8; |
| 1986 | fake_zero_displacement = 1; |
| 1987 | } |
| 1988 | } |
| 1989 | else /* (%bp,%si) -> 2, or (%bp,%di) -> 3 */ |
| 1990 | i.rm.regmem = i.index_reg->reg_num - 6 + 2; |
| 1991 | break; |
| 1992 | default: /* (%si) -> 4 or (%di) -> 5 */ |
| 1993 | i.rm.regmem = i.base_reg->reg_num - 6 + 4; |
| 1994 | } |
| 1995 | i.rm.mode = mode_from_disp_size (i.types[op]); |
| 1996 | } |
| 1997 | else /* i.base_reg and 32 bit mode */ |
| 1998 | { |
| 1999 | i.rm.regmem = i.base_reg->reg_num; |
| 2000 | i.sib.base = i.base_reg->reg_num; |
| 2001 | if (i.base_reg->reg_num == EBP_REG_NUM) |
| 2002 | { |
| 2003 | default_seg = &ss; |
| 2004 | if (i.disp_operands == 0) |
| 2005 | { |
| 2006 | fake_zero_displacement = 1; |
| 2007 | i.types[op] |= Disp8; |
| 2008 | } |
| 2009 | } |
| 2010 | else if (i.base_reg->reg_num == ESP_REG_NUM) |
| 2011 | { |
| 2012 | default_seg = &ss; |
| 2013 | } |
| 2014 | i.sib.scale = i.log2_scale_factor; |
| 2015 | if (! i.index_reg) |
| 2016 | { |
| 2017 | /* <disp>(%esp) becomes two byte modrm |
| 2018 | with no index register. We've already |
| 2019 | stored the code for esp in i.rm.regmem |
| 2020 | ie. ESCAPE_TO_TWO_BYTE_ADDRESSING. Any |
| 2021 | base register besides %esp will not use |
| 2022 | the extra modrm byte. */ |
| 2023 | i.sib.index = NO_INDEX_REGISTER; |
| 2024 | #if ! SCALE1_WHEN_NO_INDEX |
| 2025 | /* Another case where we force the second |
| 2026 | modrm byte. */ |
| 2027 | if (i.log2_scale_factor) |
| 2028 | i.rm.regmem = ESCAPE_TO_TWO_BYTE_ADDRESSING; |
| 2029 | #endif |
| 2030 | } |
| 2031 | else |
| 2032 | { |
| 2033 | i.sib.index = i.index_reg->reg_num; |
| 2034 | i.rm.regmem = ESCAPE_TO_TWO_BYTE_ADDRESSING; |
| 2035 | } |
| 2036 | i.rm.mode = mode_from_disp_size (i.types[op]); |
| 2037 | } |
| 2038 | |
| 2039 | if (fake_zero_displacement) |
| 2040 | { |
| 2041 | /* Fakes a zero displacement assuming that i.types[op] |
| 2042 | holds the correct displacement size. */ |
| 2043 | expressionS *exp; |
| 2044 | |
| 2045 | assert (i.op[op].disps == 0); |
| 2046 | exp = &disp_expressions[i.disp_operands++]; |
| 2047 | i.op[op].disps = exp; |
| 2048 | exp->X_op = O_constant; |
| 2049 | exp->X_add_number = 0; |
| 2050 | exp->X_add_symbol = (symbolS *) 0; |
| 2051 | exp->X_op_symbol = (symbolS *) 0; |
| 2052 | } |
| 2053 | } |
| 2054 | |
| 2055 | /* Fill in i.rm.reg or i.rm.regmem field with register |
| 2056 | operand (if any) based on i.tm.extension_opcode. |
| 2057 | Again, we must be careful to make sure that |
| 2058 | segment/control/debug/test/MMX registers are coded |
| 2059 | into the i.rm.reg field. */ |
| 2060 | if (i.reg_operands) |
| 2061 | { |
| 2062 | unsigned int op = |
| 2063 | ((i.types[0] |
| 2064 | & (Reg | RegMMX | RegXMM |
| 2065 | | SReg2 | SReg3 |
| 2066 | | Control | Debug | Test)) |
| 2067 | ? 0 |
| 2068 | : ((i.types[1] |
| 2069 | & (Reg | RegMMX | RegXMM |
| 2070 | | SReg2 | SReg3 |
| 2071 | | Control | Debug | Test)) |
| 2072 | ? 1 |
| 2073 | : 2)); |
| 2074 | /* If there is an extension opcode to put here, the |
| 2075 | register number must be put into the regmem field. */ |
| 2076 | if (i.tm.extension_opcode != None) |
| 2077 | i.rm.regmem = i.op[op].regs->reg_num; |
| 2078 | else |
| 2079 | i.rm.reg = i.op[op].regs->reg_num; |
| 2080 | |
| 2081 | /* Now, if no memory operand has set i.rm.mode = 0, 1, 2 |
| 2082 | we must set it to 3 to indicate this is a register |
| 2083 | operand in the regmem field. */ |
| 2084 | if (!i.mem_operands) |
| 2085 | i.rm.mode = 3; |
| 2086 | } |
| 2087 | |
| 2088 | /* Fill in i.rm.reg field with extension opcode (if any). */ |
| 2089 | if (i.tm.extension_opcode != None) |
| 2090 | i.rm.reg = i.tm.extension_opcode; |
| 2091 | } |
| 2092 | } |
| 2093 | else if (i.tm.opcode_modifier & (Seg2ShortForm | Seg3ShortForm)) |
| 2094 | { |
| 2095 | if (i.tm.base_opcode == POP_SEG_SHORT && i.op[0].regs->reg_num == 1) |
| 2096 | { |
| 2097 | as_bad (_("you can't `pop %%cs'")); |
| 2098 | return; |
| 2099 | } |
| 2100 | i.tm.base_opcode |= (i.op[0].regs->reg_num << 3); |
| 2101 | } |
| 2102 | else if ((i.tm.base_opcode & ~(D|W)) == MOV_AX_DISP32) |
| 2103 | { |
| 2104 | default_seg = &ds; |
| 2105 | } |
| 2106 | else if ((i.tm.opcode_modifier & IsString) != 0) |
| 2107 | { |
| 2108 | /* For the string instructions that allow a segment override |
| 2109 | on one of their operands, the default segment is ds. */ |
| 2110 | default_seg = &ds; |
| 2111 | } |
| 2112 | |
| 2113 | /* If a segment was explicitly specified, |
| 2114 | and the specified segment is not the default, |
| 2115 | use an opcode prefix to select it. |
| 2116 | If we never figured out what the default segment is, |
| 2117 | then default_seg will be zero at this point, |
| 2118 | and the specified segment prefix will always be used. */ |
| 2119 | if ((i.seg[0]) && (i.seg[0] != default_seg)) |
| 2120 | { |
| 2121 | if (! add_prefix (i.seg[0]->seg_prefix)) |
| 2122 | return; |
| 2123 | } |
| 2124 | } |
| 2125 | else if ((i.tm.opcode_modifier & Ugh) != 0) |
| 2126 | { |
| 2127 | /* UnixWare fsub no args is alias for fsubp, fadd -> faddp, etc. */ |
| 2128 | as_warn (_("translating to `%sp'"), i.tm.name); |
| 2129 | } |
| 2130 | } |
| 2131 | |
| 2132 | /* Handle conversion of 'int $3' --> special int3 insn. */ |
| 2133 | if (i.tm.base_opcode == INT_OPCODE && i.op[0].imms->X_add_number == 3) |
| 2134 | { |
| 2135 | i.tm.base_opcode = INT3_OPCODE; |
| 2136 | i.imm_operands = 0; |
| 2137 | } |
| 2138 | |
| 2139 | if ((i.tm.opcode_modifier & (Jump | JumpByte | JumpDword)) |
| 2140 | && i.op[0].disps->X_op == O_constant) |
| 2141 | { |
| 2142 | /* Convert "jmp constant" (and "call constant") to a jump (call) to |
| 2143 | the absolute address given by the constant. Since ix86 jumps and |
| 2144 | calls are pc relative, we need to generate a reloc. */ |
| 2145 | i.op[0].disps->X_add_symbol = &abs_symbol; |
| 2146 | i.op[0].disps->X_op = O_symbol; |
| 2147 | } |
| 2148 | |
| 2149 | /* We are ready to output the insn. */ |
| 2150 | { |
| 2151 | register char *p; |
| 2152 | |
| 2153 | /* Output jumps. */ |
| 2154 | if (i.tm.opcode_modifier & Jump) |
| 2155 | { |
| 2156 | int size; |
| 2157 | int code16; |
| 2158 | int prefix; |
| 2159 | |
| 2160 | code16 = 0; |
| 2161 | if (flag_16bit_code) |
| 2162 | code16 = CODE16; |
| 2163 | |
| 2164 | prefix = 0; |
| 2165 | if (i.prefix[DATA_PREFIX]) |
| 2166 | { |
| 2167 | prefix = 1; |
| 2168 | i.prefixes -= 1; |
| 2169 | code16 ^= CODE16; |
| 2170 | } |
| 2171 | |
| 2172 | size = 4; |
| 2173 | if (code16) |
| 2174 | size = 2; |
| 2175 | |
| 2176 | if (i.prefixes != 0 && !intel_syntax) |
| 2177 | as_warn (_("skipping prefixes on this instruction")); |
| 2178 | |
| 2179 | /* It's always a symbol; End frag & setup for relax. |
| 2180 | Make sure there is enough room in this frag for the largest |
| 2181 | instruction we may generate in md_convert_frag. This is 2 |
| 2182 | bytes for the opcode and room for the prefix and largest |
| 2183 | displacement. */ |
| 2184 | frag_grow (prefix + 2 + size); |
| 2185 | insn_size += prefix + 1; |
| 2186 | /* Prefix and 1 opcode byte go in fr_fix. */ |
| 2187 | p = frag_more (prefix + 1); |
| 2188 | if (prefix) |
| 2189 | *p++ = DATA_PREFIX_OPCODE; |
| 2190 | *p = i.tm.base_opcode; |
| 2191 | /* 1 possible extra opcode + displacement go in fr_var. */ |
| 2192 | frag_var (rs_machine_dependent, |
| 2193 | 1 + size, |
| 2194 | 1, |
| 2195 | ((unsigned char) *p == JUMP_PC_RELATIVE |
| 2196 | ? ENCODE_RELAX_STATE (UNCOND_JUMP, SMALL) | code16 |
| 2197 | : ENCODE_RELAX_STATE (COND_JUMP, SMALL) | code16), |
| 2198 | i.op[0].disps->X_add_symbol, |
| 2199 | i.op[0].disps->X_add_number, |
| 2200 | p); |
| 2201 | } |
| 2202 | else if (i.tm.opcode_modifier & (JumpByte | JumpDword)) |
| 2203 | { |
| 2204 | int size; |
| 2205 | |
| 2206 | if (i.tm.opcode_modifier & JumpByte) |
| 2207 | { |
| 2208 | /* This is a loop or jecxz type instruction. */ |
| 2209 | size = 1; |
| 2210 | if (i.prefix[ADDR_PREFIX]) |
| 2211 | { |
| 2212 | insn_size += 1; |
| 2213 | FRAG_APPEND_1_CHAR (ADDR_PREFIX_OPCODE); |
| 2214 | i.prefixes -= 1; |
| 2215 | } |
| 2216 | } |
| 2217 | else |
| 2218 | { |
| 2219 | int code16; |
| 2220 | |
| 2221 | code16 = 0; |
| 2222 | if (flag_16bit_code) |
| 2223 | code16 = CODE16; |
| 2224 | |
| 2225 | if (i.prefix[DATA_PREFIX]) |
| 2226 | { |
| 2227 | insn_size += 1; |
| 2228 | FRAG_APPEND_1_CHAR (DATA_PREFIX_OPCODE); |
| 2229 | i.prefixes -= 1; |
| 2230 | code16 ^= CODE16; |
| 2231 | } |
| 2232 | |
| 2233 | size = 4; |
| 2234 | if (code16) |
| 2235 | size = 2; |
| 2236 | } |
| 2237 | |
| 2238 | if (i.prefixes != 0 && !intel_syntax) |
| 2239 | as_warn (_("skipping prefixes on this instruction")); |
| 2240 | |
| 2241 | if (fits_in_unsigned_byte (i.tm.base_opcode)) |
| 2242 | { |
| 2243 | insn_size += 1 + size; |
| 2244 | p = frag_more (1 + size); |
| 2245 | } |
| 2246 | else |
| 2247 | { |
| 2248 | /* opcode can be at most two bytes */ |
| 2249 | insn_size += 2 + size; |
| 2250 | p = frag_more (2 + size); |
| 2251 | *p++ = (i.tm.base_opcode >> 8) & 0xff; |
| 2252 | } |
| 2253 | *p++ = i.tm.base_opcode & 0xff; |
| 2254 | |
| 2255 | fix_new_exp (frag_now, p - frag_now->fr_literal, size, |
| 2256 | i.op[0].disps, 1, reloc (size, 1, i.disp_reloc[0])); |
| 2257 | } |
| 2258 | else if (i.tm.opcode_modifier & JumpInterSegment) |
| 2259 | { |
| 2260 | int size; |
| 2261 | int prefix; |
| 2262 | int code16; |
| 2263 | |
| 2264 | code16 = 0; |
| 2265 | if (flag_16bit_code) |
| 2266 | code16 = CODE16; |
| 2267 | |
| 2268 | prefix = 0; |
| 2269 | if (i.prefix[DATA_PREFIX]) |
| 2270 | { |
| 2271 | prefix = 1; |
| 2272 | i.prefixes -= 1; |
| 2273 | code16 ^= CODE16; |
| 2274 | } |
| 2275 | |
| 2276 | size = 4; |
| 2277 | if (code16) |
| 2278 | size = 2; |
| 2279 | |
| 2280 | if (i.prefixes != 0 && !intel_syntax) |
| 2281 | as_warn (_("skipping prefixes on this instruction")); |
| 2282 | |
| 2283 | insn_size += prefix + 1 + 2 + size; /* 1 opcode; 2 segment; offset */ |
| 2284 | p = frag_more (prefix + 1 + 2 + size); |
| 2285 | if (prefix) |
| 2286 | *p++ = DATA_PREFIX_OPCODE; |
| 2287 | *p++ = i.tm.base_opcode; |
| 2288 | if (i.op[1].imms->X_op == O_constant) |
| 2289 | { |
| 2290 | offsetT n = i.op[1].imms->X_add_number; |
| 2291 | |
| 2292 | if (size == 2 |
| 2293 | && !fits_in_unsigned_word (n) |
| 2294 | && !fits_in_signed_word (n)) |
| 2295 | { |
| 2296 | as_bad (_("16-bit jump out of range")); |
| 2297 | return; |
| 2298 | } |
| 2299 | md_number_to_chars (p, n, size); |
| 2300 | } |
| 2301 | else |
| 2302 | fix_new_exp (frag_now, p - frag_now->fr_literal, size, |
| 2303 | i.op[1].imms, 0, reloc (size, 0, i.disp_reloc[0])); |
| 2304 | if (i.op[0].imms->X_op != O_constant) |
| 2305 | as_bad (_("can't handle non absolute segment in `%s'"), |
| 2306 | i.tm.name); |
| 2307 | md_number_to_chars (p + size, (valueT) i.op[0].imms->X_add_number, 2); |
| 2308 | } |
| 2309 | else |
| 2310 | { |
| 2311 | /* Output normal instructions here. */ |
| 2312 | unsigned char *q; |
| 2313 | |
| 2314 | /* The prefix bytes. */ |
| 2315 | for (q = i.prefix; |
| 2316 | q < i.prefix + sizeof (i.prefix) / sizeof (i.prefix[0]); |
| 2317 | q++) |
| 2318 | { |
| 2319 | if (*q) |
| 2320 | { |
| 2321 | insn_size += 1; |
| 2322 | p = frag_more (1); |
| 2323 | md_number_to_chars (p, (valueT) *q, 1); |
| 2324 | } |
| 2325 | } |
| 2326 | |
| 2327 | /* Now the opcode; be careful about word order here! */ |
| 2328 | if (fits_in_unsigned_byte (i.tm.base_opcode)) |
| 2329 | { |
| 2330 | insn_size += 1; |
| 2331 | FRAG_APPEND_1_CHAR (i.tm.base_opcode); |
| 2332 | } |
| 2333 | else if (fits_in_unsigned_word (i.tm.base_opcode)) |
| 2334 | { |
| 2335 | insn_size += 2; |
| 2336 | p = frag_more (2); |
| 2337 | /* put out high byte first: can't use md_number_to_chars! */ |
| 2338 | *p++ = (i.tm.base_opcode >> 8) & 0xff; |
| 2339 | *p = i.tm.base_opcode & 0xff; |
| 2340 | } |
| 2341 | else |
| 2342 | { /* opcode is either 3 or 4 bytes */ |
| 2343 | if (i.tm.base_opcode & 0xff000000) |
| 2344 | { |
| 2345 | insn_size += 4; |
| 2346 | p = frag_more (4); |
| 2347 | *p++ = (i.tm.base_opcode >> 24) & 0xff; |
| 2348 | } |
| 2349 | else |
| 2350 | { |
| 2351 | insn_size += 3; |
| 2352 | p = frag_more (3); |
| 2353 | } |
| 2354 | *p++ = (i.tm.base_opcode >> 16) & 0xff; |
| 2355 | *p++ = (i.tm.base_opcode >> 8) & 0xff; |
| 2356 | *p = (i.tm.base_opcode) & 0xff; |
| 2357 | } |
| 2358 | |
| 2359 | /* Now the modrm byte and sib byte (if present). */ |
| 2360 | if (i.tm.opcode_modifier & Modrm) |
| 2361 | { |
| 2362 | insn_size += 1; |
| 2363 | p = frag_more (1); |
| 2364 | md_number_to_chars (p, |
| 2365 | (valueT) (i.rm.regmem << 0 |
| 2366 | | i.rm.reg << 3 |
| 2367 | | i.rm.mode << 6), |
| 2368 | 1); |
| 2369 | /* If i.rm.regmem == ESP (4) |
| 2370 | && i.rm.mode != (Register mode) |
| 2371 | && not 16 bit |
| 2372 | ==> need second modrm byte. */ |
| 2373 | if (i.rm.regmem == ESCAPE_TO_TWO_BYTE_ADDRESSING |
| 2374 | && i.rm.mode != 3 |
| 2375 | && !(i.base_reg && (i.base_reg->reg_type & Reg16) != 0)) |
| 2376 | { |
| 2377 | insn_size += 1; |
| 2378 | p = frag_more (1); |
| 2379 | md_number_to_chars (p, |
| 2380 | (valueT) (i.sib.base << 0 |
| 2381 | | i.sib.index << 3 |
| 2382 | | i.sib.scale << 6), |
| 2383 | 1); |
| 2384 | } |
| 2385 | } |
| 2386 | |
| 2387 | if (i.disp_operands) |
| 2388 | { |
| 2389 | register unsigned int n; |
| 2390 | |
| 2391 | for (n = 0; n < i.operands; n++) |
| 2392 | { |
| 2393 | if (i.types[n] & Disp) |
| 2394 | { |
| 2395 | if (i.op[n].disps->X_op == O_constant) |
| 2396 | { |
| 2397 | int size; |
| 2398 | offsetT val; |
| 2399 | |
| 2400 | size = 4; |
| 2401 | if (i.types[n] & (Disp8 | Disp16)) |
| 2402 | { |
| 2403 | size = 2; |
| 2404 | if (i.types[n] & Disp8) |
| 2405 | size = 1; |
| 2406 | } |
| 2407 | val = offset_in_range (i.op[n].disps->X_add_number, |
| 2408 | size); |
| 2409 | insn_size += size; |
| 2410 | p = frag_more (size); |
| 2411 | md_number_to_chars (p, val, size); |
| 2412 | } |
| 2413 | else |
| 2414 | { |
| 2415 | int size = 4; |
| 2416 | |
| 2417 | if (i.types[n] & Disp16) |
| 2418 | size = 2; |
| 2419 | |
| 2420 | insn_size += size; |
| 2421 | p = frag_more (size); |
| 2422 | fix_new_exp (frag_now, p - frag_now->fr_literal, size, |
| 2423 | i.op[n].disps, 0, |
| 2424 | reloc (size, 0, i.disp_reloc[n])); |
| 2425 | } |
| 2426 | } |
| 2427 | } |
| 2428 | } /* end displacement output */ |
| 2429 | |
| 2430 | /* output immediate */ |
| 2431 | if (i.imm_operands) |
| 2432 | { |
| 2433 | register unsigned int n; |
| 2434 | |
| 2435 | for (n = 0; n < i.operands; n++) |
| 2436 | { |
| 2437 | if (i.types[n] & Imm) |
| 2438 | { |
| 2439 | if (i.op[n].imms->X_op == O_constant) |
| 2440 | { |
| 2441 | int size; |
| 2442 | offsetT val; |
| 2443 | |
| 2444 | size = 4; |
| 2445 | if (i.types[n] & (Imm8 | Imm8S | Imm16)) |
| 2446 | { |
| 2447 | size = 2; |
| 2448 | if (i.types[n] & (Imm8 | Imm8S)) |
| 2449 | size = 1; |
| 2450 | } |
| 2451 | val = offset_in_range (i.op[n].imms->X_add_number, |
| 2452 | size); |
| 2453 | insn_size += size; |
| 2454 | p = frag_more (size); |
| 2455 | md_number_to_chars (p, val, size); |
| 2456 | } |
| 2457 | else |
| 2458 | { /* not absolute_section */ |
| 2459 | /* Need a 32-bit fixup (don't support 8bit |
| 2460 | non-absolute imms). Try to support other |
| 2461 | sizes ... */ |
| 2462 | #ifdef BFD_ASSEMBLER |
| 2463 | enum bfd_reloc_code_real reloc_type; |
| 2464 | #else |
| 2465 | int reloc_type; |
| 2466 | #endif |
| 2467 | int size = 4; |
| 2468 | |
| 2469 | if (i.types[n] & Imm16) |
| 2470 | size = 2; |
| 2471 | else if (i.types[n] & (Imm8 | Imm8S)) |
| 2472 | size = 1; |
| 2473 | |
| 2474 | insn_size += size; |
| 2475 | p = frag_more (size); |
| 2476 | reloc_type = reloc (size, 0, i.disp_reloc[0]); |
| 2477 | #ifdef BFD_ASSEMBLER |
| 2478 | if (reloc_type == BFD_RELOC_32 |
| 2479 | && GOT_symbol |
| 2480 | && GOT_symbol == i.op[n].imms->X_add_symbol |
| 2481 | && (i.op[n].imms->X_op == O_symbol |
| 2482 | || (i.op[n].imms->X_op == O_add |
| 2483 | && ((symbol_get_value_expression |
| 2484 | (i.op[n].imms->X_op_symbol)->X_op) |
| 2485 | == O_subtract)))) |
| 2486 | { |
| 2487 | reloc_type = BFD_RELOC_386_GOTPC; |
| 2488 | i.op[n].imms->X_add_number += 3; |
| 2489 | } |
| 2490 | #endif |
| 2491 | fix_new_exp (frag_now, p - frag_now->fr_literal, size, |
| 2492 | i.op[n].imms, 0, reloc_type); |
| 2493 | } |
| 2494 | } |
| 2495 | } |
| 2496 | } /* end immediate output */ |
| 2497 | } |
| 2498 | |
| 2499 | #ifdef DEBUG386 |
| 2500 | if (flag_debug) |
| 2501 | { |
| 2502 | pi (line, &i); |
| 2503 | } |
| 2504 | #endif /* DEBUG386 */ |
| 2505 | } |
| 2506 | } |
| 2507 | \f |
| 2508 | static int i386_immediate PARAMS ((char *)); |
| 2509 | |
| 2510 | static int |
| 2511 | i386_immediate (imm_start) |
| 2512 | char *imm_start; |
| 2513 | { |
| 2514 | char *save_input_line_pointer; |
| 2515 | segT exp_seg = 0; |
| 2516 | expressionS * exp; |
| 2517 | |
| 2518 | if (i.imm_operands == MAX_IMMEDIATE_OPERANDS) |
| 2519 | { |
| 2520 | as_bad (_("only 1 or 2 immediate operands are allowed")); |
| 2521 | return 0; |
| 2522 | } |
| 2523 | |
| 2524 | exp = &im_expressions[i.imm_operands++]; |
| 2525 | i.op[this_operand].imms = exp; |
| 2526 | |
| 2527 | if (is_space_char (*imm_start)) |
| 2528 | ++imm_start; |
| 2529 | |
| 2530 | save_input_line_pointer = input_line_pointer; |
| 2531 | input_line_pointer = imm_start; |
| 2532 | |
| 2533 | #ifndef LEX_AT |
| 2534 | { |
| 2535 | /* |
| 2536 | * We can have operands of the form |
| 2537 | * <symbol>@GOTOFF+<nnn> |
| 2538 | * Take the easy way out here and copy everything |
| 2539 | * into a temporary buffer... |
| 2540 | */ |
| 2541 | register char *cp; |
| 2542 | |
| 2543 | cp = strchr (input_line_pointer, '@'); |
| 2544 | if (cp != NULL) |
| 2545 | { |
| 2546 | char *tmpbuf; |
| 2547 | int len = 0; |
| 2548 | int first; |
| 2549 | |
| 2550 | /* GOT relocations are not supported in 16 bit mode */ |
| 2551 | if (flag_16bit_code) |
| 2552 | as_bad (_("GOT relocations not supported in 16 bit mode")); |
| 2553 | |
| 2554 | if (GOT_symbol == NULL) |
| 2555 | GOT_symbol = symbol_find_or_make (GLOBAL_OFFSET_TABLE_NAME); |
| 2556 | |
| 2557 | if (strncmp (cp + 1, "PLT", 3) == 0) |
| 2558 | { |
| 2559 | i.disp_reloc[this_operand] = BFD_RELOC_386_PLT32; |
| 2560 | len = 3; |
| 2561 | } |
| 2562 | else if (strncmp (cp + 1, "GOTOFF", 6) == 0) |
| 2563 | { |
| 2564 | i.disp_reloc[this_operand] = BFD_RELOC_386_GOTOFF; |
| 2565 | len = 6; |
| 2566 | } |
| 2567 | else if (strncmp (cp + 1, "GOT", 3) == 0) |
| 2568 | { |
| 2569 | i.disp_reloc[this_operand] = BFD_RELOC_386_GOT32; |
| 2570 | len = 3; |
| 2571 | } |
| 2572 | else |
| 2573 | as_bad (_("bad reloc specifier in expression")); |
| 2574 | |
| 2575 | /* Replace the relocation token with ' ', so that errors like |
| 2576 | foo@GOTOFF1 will be detected. */ |
| 2577 | first = cp - input_line_pointer; |
| 2578 | tmpbuf = (char *) alloca (strlen(input_line_pointer)); |
| 2579 | memcpy (tmpbuf, input_line_pointer, first); |
| 2580 | tmpbuf[first] = ' '; |
| 2581 | strcpy (tmpbuf + first + 1, cp + 1 + len); |
| 2582 | input_line_pointer = tmpbuf; |
| 2583 | } |
| 2584 | } |
| 2585 | #endif |
| 2586 | |
| 2587 | exp_seg = expression (exp); |
| 2588 | |
| 2589 | SKIP_WHITESPACE (); |
| 2590 | if (*input_line_pointer) |
| 2591 | as_bad (_("ignoring junk `%s' after expression"), input_line_pointer); |
| 2592 | |
| 2593 | input_line_pointer = save_input_line_pointer; |
| 2594 | |
| 2595 | if (exp->X_op == O_absent || exp->X_op == O_big) |
| 2596 | { |
| 2597 | /* missing or bad expr becomes absolute 0 */ |
| 2598 | as_bad (_("missing or invalid immediate expression `%s' taken as 0"), |
| 2599 | imm_start); |
| 2600 | exp->X_op = O_constant; |
| 2601 | exp->X_add_number = 0; |
| 2602 | exp->X_add_symbol = (symbolS *) 0; |
| 2603 | exp->X_op_symbol = (symbolS *) 0; |
| 2604 | } |
| 2605 | |
| 2606 | if (exp->X_op == O_constant) |
| 2607 | { |
| 2608 | i.types[this_operand] |= Imm32; /* Size it properly later. */ |
| 2609 | } |
| 2610 | #if (defined (OBJ_AOUT) || defined (OBJ_MAYBE_AOUT)) |
| 2611 | else if ( |
| 2612 | #ifdef BFD_ASSEMBLER |
| 2613 | OUTPUT_FLAVOR == bfd_target_aout_flavour && |
| 2614 | #endif |
| 2615 | exp_seg != text_section |
| 2616 | && exp_seg != data_section |
| 2617 | && exp_seg != bss_section |
| 2618 | && exp_seg != undefined_section |
| 2619 | #ifdef BFD_ASSEMBLER |
| 2620 | && !bfd_is_com_section (exp_seg) |
| 2621 | #endif |
| 2622 | ) |
| 2623 | { |
| 2624 | #ifdef BFD_ASSEMBLER |
| 2625 | as_bad (_("unimplemented segment %s in operand"), exp_seg->name); |
| 2626 | #else |
| 2627 | as_bad (_("unimplemented segment type %d in operand"), exp_seg); |
| 2628 | #endif |
| 2629 | return 0; |
| 2630 | } |
| 2631 | #endif |
| 2632 | else |
| 2633 | { |
| 2634 | /* This is an address. The size of the address will be |
| 2635 | determined later, depending on destination register, |
| 2636 | suffix, or the default for the section. We exclude |
| 2637 | Imm8S here so that `push $foo' and other instructions |
| 2638 | with an Imm8S form will use Imm16 or Imm32. */ |
| 2639 | i.types[this_operand] |= (Imm8 | Imm16 | Imm32); |
| 2640 | } |
| 2641 | |
| 2642 | return 1; |
| 2643 | } |
| 2644 | |
| 2645 | static int i386_scale PARAMS ((char *)); |
| 2646 | |
| 2647 | static int |
| 2648 | i386_scale (scale) |
| 2649 | char *scale; |
| 2650 | { |
| 2651 | if (!isdigit (*scale)) |
| 2652 | goto bad_scale; |
| 2653 | |
| 2654 | switch (*scale) |
| 2655 | { |
| 2656 | case '0': |
| 2657 | case '1': |
| 2658 | i.log2_scale_factor = 0; |
| 2659 | break; |
| 2660 | case '2': |
| 2661 | i.log2_scale_factor = 1; |
| 2662 | break; |
| 2663 | case '4': |
| 2664 | i.log2_scale_factor = 2; |
| 2665 | break; |
| 2666 | case '8': |
| 2667 | i.log2_scale_factor = 3; |
| 2668 | break; |
| 2669 | default: |
| 2670 | bad_scale: |
| 2671 | as_bad (_("expecting scale factor of 1, 2, 4, or 8: got `%s'"), |
| 2672 | scale); |
| 2673 | return 0; |
| 2674 | } |
| 2675 | if (i.log2_scale_factor != 0 && ! i.index_reg) |
| 2676 | { |
| 2677 | as_warn (_("scale factor of %d without an index register"), |
| 2678 | 1 << i.log2_scale_factor); |
| 2679 | #if SCALE1_WHEN_NO_INDEX |
| 2680 | i.log2_scale_factor = 0; |
| 2681 | #endif |
| 2682 | } |
| 2683 | return 1; |
| 2684 | } |
| 2685 | |
| 2686 | static int i386_displacement PARAMS ((char *, char *)); |
| 2687 | |
| 2688 | static int |
| 2689 | i386_displacement (disp_start, disp_end) |
| 2690 | char *disp_start; |
| 2691 | char *disp_end; |
| 2692 | { |
| 2693 | register expressionS *exp; |
| 2694 | segT exp_seg = 0; |
| 2695 | char *save_input_line_pointer; |
| 2696 | int bigdisp = Disp32; |
| 2697 | |
| 2698 | if (flag_16bit_code ^ (i.prefix[ADDR_PREFIX] != 0)) |
| 2699 | bigdisp = Disp16; |
| 2700 | i.types[this_operand] |= bigdisp; |
| 2701 | |
| 2702 | exp = &disp_expressions[i.disp_operands]; |
| 2703 | i.op[this_operand].disps = exp; |
| 2704 | i.disp_operands++; |
| 2705 | save_input_line_pointer = input_line_pointer; |
| 2706 | input_line_pointer = disp_start; |
| 2707 | END_STRING_AND_SAVE (disp_end); |
| 2708 | |
| 2709 | #ifndef GCC_ASM_O_HACK |
| 2710 | #define GCC_ASM_O_HACK 0 |
| 2711 | #endif |
| 2712 | #if GCC_ASM_O_HACK |
| 2713 | END_STRING_AND_SAVE (disp_end + 1); |
| 2714 | if ((i.types[this_operand] & BaseIndex) != 0 |
| 2715 | && displacement_string_end[-1] == '+') |
| 2716 | { |
| 2717 | /* This hack is to avoid a warning when using the "o" |
| 2718 | constraint within gcc asm statements. |
| 2719 | For instance: |
| 2720 | |
| 2721 | #define _set_tssldt_desc(n,addr,limit,type) \ |
| 2722 | __asm__ __volatile__ ( \ |
| 2723 | "movw %w2,%0\n\t" \ |
| 2724 | "movw %w1,2+%0\n\t" \ |
| 2725 | "rorl $16,%1\n\t" \ |
| 2726 | "movb %b1,4+%0\n\t" \ |
| 2727 | "movb %4,5+%0\n\t" \ |
| 2728 | "movb $0,6+%0\n\t" \ |
| 2729 | "movb %h1,7+%0\n\t" \ |
| 2730 | "rorl $16,%1" \ |
| 2731 | : "=o"(*(n)) : "q" (addr), "ri"(limit), "i"(type)) |
| 2732 | |
| 2733 | This works great except that the output assembler ends |
| 2734 | up looking a bit weird if it turns out that there is |
| 2735 | no offset. You end up producing code that looks like: |
| 2736 | |
| 2737 | #APP |
| 2738 | movw $235,(%eax) |
| 2739 | movw %dx,2+(%eax) |
| 2740 | rorl $16,%edx |
| 2741 | movb %dl,4+(%eax) |
| 2742 | movb $137,5+(%eax) |
| 2743 | movb $0,6+(%eax) |
| 2744 | movb %dh,7+(%eax) |
| 2745 | rorl $16,%edx |
| 2746 | #NO_APP |
| 2747 | |
| 2748 | So here we provide the missing zero. |
| 2749 | */ |
| 2750 | |
| 2751 | *displacement_string_end = '0'; |
| 2752 | } |
| 2753 | #endif |
| 2754 | #ifndef LEX_AT |
| 2755 | { |
| 2756 | /* |
| 2757 | * We can have operands of the form |
| 2758 | * <symbol>@GOTOFF+<nnn> |
| 2759 | * Take the easy way out here and copy everything |
| 2760 | * into a temporary buffer... |
| 2761 | */ |
| 2762 | register char *cp; |
| 2763 | |
| 2764 | cp = strchr (input_line_pointer, '@'); |
| 2765 | if (cp != NULL) |
| 2766 | { |
| 2767 | char *tmpbuf; |
| 2768 | int len = 0; |
| 2769 | int first; |
| 2770 | |
| 2771 | /* GOT relocations are not supported in 16 bit mode */ |
| 2772 | if (flag_16bit_code) |
| 2773 | as_bad (_("GOT relocations not supported in 16 bit mode")); |
| 2774 | |
| 2775 | if (GOT_symbol == NULL) |
| 2776 | GOT_symbol = symbol_find_or_make (GLOBAL_OFFSET_TABLE_NAME); |
| 2777 | |
| 2778 | if (strncmp (cp + 1, "PLT", 3) == 0) |
| 2779 | { |
| 2780 | i.disp_reloc[this_operand] = BFD_RELOC_386_PLT32; |
| 2781 | len = 3; |
| 2782 | } |
| 2783 | else if (strncmp (cp + 1, "GOTOFF", 6) == 0) |
| 2784 | { |
| 2785 | i.disp_reloc[this_operand] = BFD_RELOC_386_GOTOFF; |
| 2786 | len = 6; |
| 2787 | } |
| 2788 | else if (strncmp (cp + 1, "GOT", 3) == 0) |
| 2789 | { |
| 2790 | i.disp_reloc[this_operand] = BFD_RELOC_386_GOT32; |
| 2791 | len = 3; |
| 2792 | } |
| 2793 | else |
| 2794 | as_bad (_("bad reloc specifier in expression")); |
| 2795 | |
| 2796 | /* Replace the relocation token with ' ', so that errors like |
| 2797 | foo@GOTOFF1 will be detected. */ |
| 2798 | first = cp - input_line_pointer; |
| 2799 | tmpbuf = (char *) alloca (strlen(input_line_pointer)); |
| 2800 | memcpy (tmpbuf, input_line_pointer, first); |
| 2801 | tmpbuf[first] = ' '; |
| 2802 | strcpy (tmpbuf + first + 1, cp + 1 + len); |
| 2803 | input_line_pointer = tmpbuf; |
| 2804 | } |
| 2805 | } |
| 2806 | #endif |
| 2807 | |
| 2808 | exp_seg = expression (exp); |
| 2809 | |
| 2810 | #ifdef BFD_ASSEMBLER |
| 2811 | /* We do this to make sure that the section symbol is in |
| 2812 | the symbol table. We will ultimately change the relocation |
| 2813 | to be relative to the beginning of the section */ |
| 2814 | if (i.disp_reloc[this_operand] == BFD_RELOC_386_GOTOFF) |
| 2815 | { |
| 2816 | if (S_IS_LOCAL(exp->X_add_symbol) |
| 2817 | && S_GET_SEGMENT (exp->X_add_symbol) != undefined_section) |
| 2818 | section_symbol (S_GET_SEGMENT (exp->X_add_symbol)); |
| 2819 | assert (exp->X_op == O_symbol); |
| 2820 | exp->X_op = O_subtract; |
| 2821 | exp->X_op_symbol = GOT_symbol; |
| 2822 | i.disp_reloc[this_operand] = BFD_RELOC_32; |
| 2823 | } |
| 2824 | #endif |
| 2825 | |
| 2826 | SKIP_WHITESPACE (); |
| 2827 | if (*input_line_pointer) |
| 2828 | as_bad (_("ignoring junk `%s' after expression"), |
| 2829 | input_line_pointer); |
| 2830 | #if GCC_ASM_O_HACK |
| 2831 | RESTORE_END_STRING (disp_end + 1); |
| 2832 | #endif |
| 2833 | RESTORE_END_STRING (disp_end); |
| 2834 | input_line_pointer = save_input_line_pointer; |
| 2835 | |
| 2836 | if (exp->X_op == O_absent || exp->X_op == O_big) |
| 2837 | { |
| 2838 | /* missing or bad expr becomes absolute 0 */ |
| 2839 | as_bad (_("missing or invalid displacement expression `%s' taken as 0"), |
| 2840 | disp_start); |
| 2841 | exp->X_op = O_constant; |
| 2842 | exp->X_add_number = 0; |
| 2843 | exp->X_add_symbol = (symbolS *) 0; |
| 2844 | exp->X_op_symbol = (symbolS *) 0; |
| 2845 | } |
| 2846 | |
| 2847 | if (exp->X_op == O_constant) |
| 2848 | { |
| 2849 | if (i.types[this_operand] & Disp16) |
| 2850 | { |
| 2851 | /* We know this operand is at most 16 bits, so convert to a |
| 2852 | signed 16 bit number before trying to see whether it will |
| 2853 | fit in an even smaller size. */ |
| 2854 | exp->X_add_number = |
| 2855 | (((exp->X_add_number & 0xffff) ^ 0x8000) - 0x8000); |
| 2856 | } |
| 2857 | if (fits_in_signed_byte (exp->X_add_number)) |
| 2858 | i.types[this_operand] |= Disp8; |
| 2859 | } |
| 2860 | #if (defined (OBJ_AOUT) || defined (OBJ_MAYBE_AOUT)) |
| 2861 | else if ( |
| 2862 | #ifdef BFD_ASSEMBLER |
| 2863 | OUTPUT_FLAVOR == bfd_target_aout_flavour && |
| 2864 | #endif |
| 2865 | exp_seg != text_section |
| 2866 | && exp_seg != data_section |
| 2867 | && exp_seg != bss_section |
| 2868 | && exp_seg != undefined_section) |
| 2869 | { |
| 2870 | #ifdef BFD_ASSEMBLER |
| 2871 | as_bad (_("unimplemented segment %s in operand"), exp_seg->name); |
| 2872 | #else |
| 2873 | as_bad (_("unimplemented segment type %d in operand"), exp_seg); |
| 2874 | #endif |
| 2875 | return 0; |
| 2876 | } |
| 2877 | #endif |
| 2878 | return 1; |
| 2879 | } |
| 2880 | |
| 2881 | static int i386_operand_modifier PARAMS ((char **, int)); |
| 2882 | |
| 2883 | static int |
| 2884 | i386_operand_modifier (op_string, got_a_float) |
| 2885 | char **op_string; |
| 2886 | int got_a_float; |
| 2887 | { |
| 2888 | if (!strncasecmp (*op_string, "BYTE PTR", 8)) |
| 2889 | { |
| 2890 | i.suffix = BYTE_MNEM_SUFFIX; |
| 2891 | *op_string += 8; |
| 2892 | return BYTE_PTR; |
| 2893 | |
| 2894 | } |
| 2895 | else if (!strncasecmp (*op_string, "WORD PTR", 8)) |
| 2896 | { |
| 2897 | if (got_a_float == 2) /* "fi..." */ |
| 2898 | i.suffix = SHORT_MNEM_SUFFIX; |
| 2899 | else |
| 2900 | i.suffix = WORD_MNEM_SUFFIX; |
| 2901 | *op_string += 8; |
| 2902 | return WORD_PTR; |
| 2903 | } |
| 2904 | |
| 2905 | else if (!strncasecmp (*op_string, "DWORD PTR", 9)) |
| 2906 | { |
| 2907 | if (got_a_float == 1) /* "f..." */ |
| 2908 | i.suffix = SHORT_MNEM_SUFFIX; |
| 2909 | else |
| 2910 | i.suffix = LONG_MNEM_SUFFIX; |
| 2911 | *op_string += 9; |
| 2912 | return DWORD_PTR; |
| 2913 | } |
| 2914 | |
| 2915 | else if (!strncasecmp (*op_string, "QWORD PTR", 9)) |
| 2916 | { |
| 2917 | i.suffix = DWORD_MNEM_SUFFIX; |
| 2918 | *op_string += 9; |
| 2919 | return QWORD_PTR; |
| 2920 | } |
| 2921 | |
| 2922 | else if (!strncasecmp (*op_string, "XWORD PTR", 9)) |
| 2923 | { |
| 2924 | i.suffix = LONG_DOUBLE_MNEM_SUFFIX; |
| 2925 | *op_string += 9; |
| 2926 | return XWORD_PTR; |
| 2927 | } |
| 2928 | |
| 2929 | else if (!strncasecmp (*op_string, "SHORT", 5)) |
| 2930 | { |
| 2931 | *op_string += 5; |
| 2932 | return SHORT; |
| 2933 | } |
| 2934 | |
| 2935 | else if (!strncasecmp (*op_string, "OFFSET FLAT:", 12)) |
| 2936 | { |
| 2937 | *op_string += 12; |
| 2938 | return OFFSET_FLAT; |
| 2939 | } |
| 2940 | |
| 2941 | else if (!strncasecmp (*op_string, "FLAT", 4)) |
| 2942 | { |
| 2943 | *op_string += 4; |
| 2944 | return FLAT; |
| 2945 | } |
| 2946 | |
| 2947 | else return NONE_FOUND; |
| 2948 | } |
| 2949 | |
| 2950 | static char * build_displacement_string PARAMS ((int, char *)); |
| 2951 | |
| 2952 | static char * |
| 2953 | build_displacement_string (initial_disp, op_string) |
| 2954 | int initial_disp; |
| 2955 | char *op_string; |
| 2956 | { |
| 2957 | char *temp_string = (char *) malloc (strlen (op_string) + 1); |
| 2958 | char *end_of_operand_string; |
| 2959 | char *tc; |
| 2960 | char *temp_disp; |
| 2961 | |
| 2962 | temp_string[0] = '\0'; |
| 2963 | tc = end_of_operand_string = strchr (op_string, '['); |
| 2964 | if (initial_disp && !end_of_operand_string) |
| 2965 | { |
| 2966 | strcpy (temp_string, op_string); |
| 2967 | return temp_string; |
| 2968 | } |
| 2969 | |
| 2970 | /* Build the whole displacement string */ |
| 2971 | if (initial_disp) |
| 2972 | { |
| 2973 | strncpy (temp_string, op_string, end_of_operand_string - op_string); |
| 2974 | temp_string[end_of_operand_string - op_string] = '\0'; |
| 2975 | temp_disp = tc; |
| 2976 | } |
| 2977 | else |
| 2978 | temp_disp = op_string; |
| 2979 | |
| 2980 | while (*temp_disp != '\0') |
| 2981 | { |
| 2982 | char *end_op; |
| 2983 | int add_minus = (*temp_disp == '-'); |
| 2984 | |
| 2985 | if (*temp_disp == '+' || *temp_disp == '-' || *temp_disp == '[') |
| 2986 | temp_disp++; |
| 2987 | |
| 2988 | if (is_space_char (*temp_disp)) |
| 2989 | temp_disp++; |
| 2990 | |
| 2991 | /* Don't consider registers */ |
| 2992 | if ( !((*temp_disp == REGISTER_PREFIX || allow_naked_reg) |
| 2993 | && parse_register (temp_disp, &end_op)) ) |
| 2994 | { |
| 2995 | char *string_start = temp_disp; |
| 2996 | |
| 2997 | while (*temp_disp != ']' |
| 2998 | && *temp_disp != '+' |
| 2999 | && *temp_disp != '-' |
| 3000 | && *temp_disp != '*') |
| 3001 | ++temp_disp; |
| 3002 | |
| 3003 | if (add_minus) |
| 3004 | strcat (temp_string, "-"); |
| 3005 | else |
| 3006 | strcat (temp_string, "+"); |
| 3007 | |
| 3008 | strncat (temp_string, string_start, temp_disp - string_start); |
| 3009 | if (*temp_disp == '+' || *temp_disp == '-') |
| 3010 | --temp_disp; |
| 3011 | } |
| 3012 | |
| 3013 | while (*temp_disp != '\0' |
| 3014 | && *temp_disp != '+' |
| 3015 | && *temp_disp != '-') |
| 3016 | ++temp_disp; |
| 3017 | } |
| 3018 | |
| 3019 | return temp_string; |
| 3020 | } |
| 3021 | |
| 3022 | static int i386_parse_seg PARAMS ((char *)); |
| 3023 | |
| 3024 | static int |
| 3025 | i386_parse_seg (op_string) |
| 3026 | char *op_string; |
| 3027 | { |
| 3028 | if (is_space_char (*op_string)) |
| 3029 | ++op_string; |
| 3030 | |
| 3031 | /* Should be one of es, cs, ss, ds fs or gs */ |
| 3032 | switch (*op_string++) |
| 3033 | { |
| 3034 | case 'e': |
| 3035 | i.seg[i.mem_operands] = &es; |
| 3036 | break; |
| 3037 | case 'c': |
| 3038 | i.seg[i.mem_operands] = &cs; |
| 3039 | break; |
| 3040 | case 's': |
| 3041 | i.seg[i.mem_operands] = &ss; |
| 3042 | break; |
| 3043 | case 'd': |
| 3044 | i.seg[i.mem_operands] = &ds; |
| 3045 | break; |
| 3046 | case 'f': |
| 3047 | i.seg[i.mem_operands] = &fs; |
| 3048 | break; |
| 3049 | case 'g': |
| 3050 | i.seg[i.mem_operands] = &gs; |
| 3051 | break; |
| 3052 | default: |
| 3053 | as_bad (_("bad segment name `%s'"), op_string); |
| 3054 | return 0; |
| 3055 | } |
| 3056 | |
| 3057 | if (*op_string++ != 's') |
| 3058 | { |
| 3059 | as_bad (_("bad segment name `%s'"), op_string); |
| 3060 | return 0; |
| 3061 | } |
| 3062 | |
| 3063 | if (is_space_char (*op_string)) |
| 3064 | ++op_string; |
| 3065 | |
| 3066 | if (*op_string != ':') |
| 3067 | { |
| 3068 | as_bad (_("bad segment name `%s'"), op_string); |
| 3069 | return 0; |
| 3070 | } |
| 3071 | |
| 3072 | return 1; |
| 3073 | |
| 3074 | } |
| 3075 | |
| 3076 | static int i386_index_check PARAMS((const char *)); |
| 3077 | |
| 3078 | /* Make sure the memory operand we've been dealt is valid. |
| 3079 | Returns 1 on success, 0 on a failure. |
| 3080 | */ |
| 3081 | static int |
| 3082 | i386_index_check (operand_string) |
| 3083 | const char *operand_string; |
| 3084 | { |
| 3085 | #if INFER_ADDR_PREFIX |
| 3086 | int fudged = 0; |
| 3087 | |
| 3088 | tryprefix: |
| 3089 | #endif |
| 3090 | if (flag_16bit_code ^ (i.prefix[ADDR_PREFIX] != 0) |
| 3091 | /* 16 bit mode checks */ |
| 3092 | ? ((i.base_reg |
| 3093 | && ((i.base_reg->reg_type & (Reg16|BaseIndex)) |
| 3094 | != (Reg16|BaseIndex))) |
| 3095 | || (i.index_reg |
| 3096 | && (((i.index_reg->reg_type & (Reg16|BaseIndex)) |
| 3097 | != (Reg16|BaseIndex)) |
| 3098 | || ! (i.base_reg |
| 3099 | && i.base_reg->reg_num < 6 |
| 3100 | && i.index_reg->reg_num >= 6 |
| 3101 | && i.log2_scale_factor == 0)))) |
| 3102 | /* 32 bit mode checks */ |
| 3103 | : ((i.base_reg |
| 3104 | && (i.base_reg->reg_type & Reg32) == 0) |
| 3105 | || (i.index_reg |
| 3106 | && ((i.index_reg->reg_type & (Reg32|BaseIndex)) |
| 3107 | != (Reg32|BaseIndex))))) |
| 3108 | { |
| 3109 | #if INFER_ADDR_PREFIX |
| 3110 | if (i.prefix[ADDR_PREFIX] == 0 && stackop_size != '\0') |
| 3111 | { |
| 3112 | i.prefix[ADDR_PREFIX] = ADDR_PREFIX_OPCODE; |
| 3113 | i.prefixes += 1; |
| 3114 | /* Change the size of any displacement too. At most one of |
| 3115 | Disp16 or Disp32 is set. |
| 3116 | FIXME. There doesn't seem to be any real need for separate |
| 3117 | Disp16 and Disp32 flags. The same goes for Imm16 and Imm32. |
| 3118 | Removing them would probably clean up the code quite a lot. |
| 3119 | */ |
| 3120 | if (i.types[this_operand] & (Disp16|Disp32)) |
| 3121 | i.types[this_operand] ^= (Disp16|Disp32); |
| 3122 | fudged = 1; |
| 3123 | goto tryprefix; |
| 3124 | } |
| 3125 | if (fudged) |
| 3126 | as_bad (_("`%s' is not a valid base/index expression"), |
| 3127 | operand_string); |
| 3128 | else |
| 3129 | #endif |
| 3130 | as_bad (_("`%s' is not a valid %s bit base/index expression"), |
| 3131 | operand_string, |
| 3132 | flag_16bit_code ^ (i.prefix[ADDR_PREFIX] != 0) ? "16" : "32"); |
| 3133 | return 0; |
| 3134 | } |
| 3135 | return 1; |
| 3136 | } |
| 3137 | |
| 3138 | static int i386_intel_memory_operand PARAMS ((char *)); |
| 3139 | |
| 3140 | static int |
| 3141 | i386_intel_memory_operand (operand_string) |
| 3142 | char *operand_string; |
| 3143 | { |
| 3144 | char *op_string = operand_string; |
| 3145 | char *end_of_operand_string; |
| 3146 | |
| 3147 | if ((i.mem_operands == 1 |
| 3148 | && (current_templates->start->opcode_modifier & IsString) == 0) |
| 3149 | || i.mem_operands == 2) |
| 3150 | { |
| 3151 | as_bad (_("too many memory references for `%s'"), |
| 3152 | current_templates->start->name); |
| 3153 | return 0; |
| 3154 | } |
| 3155 | |
| 3156 | /* First check for a segment override. */ |
| 3157 | if (*op_string != '[') |
| 3158 | { |
| 3159 | char *end_seg; |
| 3160 | |
| 3161 | end_seg = strchr (op_string, ':'); |
| 3162 | if (end_seg) |
| 3163 | { |
| 3164 | if (!i386_parse_seg (op_string)) |
| 3165 | return 0; |
| 3166 | op_string = end_seg + 1; |
| 3167 | } |
| 3168 | } |
| 3169 | |
| 3170 | /* Look for displacement preceding open bracket */ |
| 3171 | if (*op_string != '[') |
| 3172 | { |
| 3173 | char *temp_string; |
| 3174 | |
| 3175 | if (i.disp_operands) |
| 3176 | return 0; |
| 3177 | |
| 3178 | temp_string = build_displacement_string (true, op_string); |
| 3179 | |
| 3180 | if (!i386_displacement (temp_string, temp_string + strlen (temp_string))) |
| 3181 | { |
| 3182 | free (temp_string); |
| 3183 | return 0; |
| 3184 | } |
| 3185 | free (temp_string); |
| 3186 | |
| 3187 | end_of_operand_string = strchr (op_string, '['); |
| 3188 | if (!end_of_operand_string) |
| 3189 | end_of_operand_string = op_string + strlen (op_string); |
| 3190 | |
| 3191 | if (is_space_char (*end_of_operand_string)) |
| 3192 | --end_of_operand_string; |
| 3193 | |
| 3194 | op_string = end_of_operand_string; |
| 3195 | } |
| 3196 | |
| 3197 | if (*op_string == '[') |
| 3198 | { |
| 3199 | ++op_string; |
| 3200 | |
| 3201 | /* Pick off each component and figure out where it belongs */ |
| 3202 | |
| 3203 | end_of_operand_string = op_string; |
| 3204 | |
| 3205 | while (*op_string != ']') |
| 3206 | { |
| 3207 | const reg_entry *temp_reg; |
| 3208 | char *end_op; |
| 3209 | char *temp_string; |
| 3210 | |
| 3211 | while (*end_of_operand_string != '+' |
| 3212 | && *end_of_operand_string != '-' |
| 3213 | && *end_of_operand_string != '*' |
| 3214 | && *end_of_operand_string != ']') |
| 3215 | end_of_operand_string++; |
| 3216 | |
| 3217 | temp_string = op_string; |
| 3218 | if (*temp_string == '+') |
| 3219 | { |
| 3220 | ++temp_string; |
| 3221 | if (is_space_char (*temp_string)) |
| 3222 | ++temp_string; |
| 3223 | } |
| 3224 | |
| 3225 | if ((*temp_string == REGISTER_PREFIX || allow_naked_reg) |
| 3226 | && (temp_reg = parse_register (temp_string, &end_op)) != NULL) |
| 3227 | { |
| 3228 | if (i.base_reg == NULL) |
| 3229 | i.base_reg = temp_reg; |
| 3230 | else |
| 3231 | i.index_reg = temp_reg; |
| 3232 | |
| 3233 | i.types[this_operand] |= BaseIndex; |
| 3234 | } |
| 3235 | else if (*temp_string == REGISTER_PREFIX) |
| 3236 | { |
| 3237 | as_bad (_("bad register name `%s'"), temp_string); |
| 3238 | return 0; |
| 3239 | } |
| 3240 | else if (is_digit_char (*op_string) |
| 3241 | || *op_string == '+' || *op_string == '-') |
| 3242 | { |
| 3243 | char *temp_str; |
| 3244 | |
| 3245 | if (i.disp_operands != 0) |
| 3246 | return 0; |
| 3247 | |
| 3248 | temp_string = build_displacement_string (false, op_string); |
| 3249 | |
| 3250 | temp_str = temp_string; |
| 3251 | if (*temp_str == '+') |
| 3252 | ++temp_str; |
| 3253 | |
| 3254 | if (!i386_displacement (temp_str, temp_str + strlen (temp_str))) |
| 3255 | { |
| 3256 | free (temp_string); |
| 3257 | return 0; |
| 3258 | } |
| 3259 | free (temp_string); |
| 3260 | |
| 3261 | ++op_string; |
| 3262 | end_of_operand_string = op_string; |
| 3263 | while (*end_of_operand_string != ']' |
| 3264 | && *end_of_operand_string != '+' |
| 3265 | && *end_of_operand_string != '-' |
| 3266 | && *end_of_operand_string != '*') |
| 3267 | ++end_of_operand_string; |
| 3268 | } |
| 3269 | else if (*op_string == '*') |
| 3270 | { |
| 3271 | ++op_string; |
| 3272 | |
| 3273 | if (i.base_reg && !i.index_reg) |
| 3274 | { |
| 3275 | i.index_reg = i.base_reg; |
| 3276 | i.base_reg = 0; |
| 3277 | } |
| 3278 | |
| 3279 | if (!i386_scale (op_string)) |
| 3280 | return 0; |
| 3281 | } |
| 3282 | op_string = end_of_operand_string; |
| 3283 | ++end_of_operand_string; |
| 3284 | } |
| 3285 | } |
| 3286 | |
| 3287 | if (i386_index_check (operand_string) == 0) |
| 3288 | return 0; |
| 3289 | |
| 3290 | i.mem_operands++; |
| 3291 | return 1; |
| 3292 | } |
| 3293 | |
| 3294 | static int |
| 3295 | i386_intel_operand (operand_string, got_a_float) |
| 3296 | char *operand_string; |
| 3297 | int got_a_float; |
| 3298 | { |
| 3299 | const reg_entry * r; |
| 3300 | char *end_op; |
| 3301 | char *op_string = operand_string; |
| 3302 | |
| 3303 | int operand_modifier = i386_operand_modifier (&op_string, got_a_float); |
| 3304 | if (is_space_char (*op_string)) |
| 3305 | ++op_string; |
| 3306 | |
| 3307 | switch (operand_modifier) |
| 3308 | { |
| 3309 | case BYTE_PTR: |
| 3310 | case WORD_PTR: |
| 3311 | case DWORD_PTR: |
| 3312 | case QWORD_PTR: |
| 3313 | case XWORD_PTR: |
| 3314 | if (!i386_intel_memory_operand (op_string)) |
| 3315 | return 0; |
| 3316 | break; |
| 3317 | |
| 3318 | case FLAT: |
| 3319 | case OFFSET_FLAT: |
| 3320 | if (!i386_immediate (op_string)) |
| 3321 | return 0; |
| 3322 | break; |
| 3323 | |
| 3324 | case SHORT: |
| 3325 | case NONE_FOUND: |
| 3326 | /* Should be register or immediate */ |
| 3327 | if (is_digit_char (*op_string) |
| 3328 | && strchr (op_string, '[') == 0) |
| 3329 | { |
| 3330 | if (!i386_immediate (op_string)) |
| 3331 | return 0; |
| 3332 | } |
| 3333 | else if ((*op_string == REGISTER_PREFIX || allow_naked_reg) |
| 3334 | && (r = parse_register (op_string, &end_op)) != NULL) |
| 3335 | { |
| 3336 | /* Check for a segment override by searching for ':' after a |
| 3337 | segment register. */ |
| 3338 | op_string = end_op; |
| 3339 | if (is_space_char (*op_string)) |
| 3340 | ++op_string; |
| 3341 | if (*op_string == ':' && (r->reg_type & (SReg2 | SReg3))) |
| 3342 | { |
| 3343 | switch (r->reg_num) |
| 3344 | { |
| 3345 | case 0: |
| 3346 | i.seg[i.mem_operands] = &es; |
| 3347 | break; |
| 3348 | case 1: |
| 3349 | i.seg[i.mem_operands] = &cs; |
| 3350 | break; |
| 3351 | case 2: |
| 3352 | i.seg[i.mem_operands] = &ss; |
| 3353 | break; |
| 3354 | case 3: |
| 3355 | i.seg[i.mem_operands] = &ds; |
| 3356 | break; |
| 3357 | case 4: |
| 3358 | i.seg[i.mem_operands] = &fs; |
| 3359 | break; |
| 3360 | case 5: |
| 3361 | i.seg[i.mem_operands] = &gs; |
| 3362 | break; |
| 3363 | } |
| 3364 | |
| 3365 | } |
| 3366 | i.types[this_operand] |= r->reg_type & ~BaseIndex; |
| 3367 | i.op[this_operand].regs = r; |
| 3368 | i.reg_operands++; |
| 3369 | } |
| 3370 | else if (*op_string == REGISTER_PREFIX) |
| 3371 | { |
| 3372 | as_bad (_("bad register name `%s'"), op_string); |
| 3373 | return 0; |
| 3374 | } |
| 3375 | else if (!i386_intel_memory_operand (op_string)) |
| 3376 | return 0; |
| 3377 | |
| 3378 | break; |
| 3379 | } /* end switch */ |
| 3380 | |
| 3381 | return 1; |
| 3382 | } |
| 3383 | |
| 3384 | /* Parse OPERAND_STRING into the i386_insn structure I. Returns non-zero |
| 3385 | on error. */ |
| 3386 | |
| 3387 | static int |
| 3388 | i386_operand (operand_string) |
| 3389 | char *operand_string; |
| 3390 | { |
| 3391 | const reg_entry *r; |
| 3392 | char *end_op; |
| 3393 | char *op_string = operand_string; |
| 3394 | |
| 3395 | if (is_space_char (*op_string)) |
| 3396 | ++op_string; |
| 3397 | |
| 3398 | /* We check for an absolute prefix (differentiating, |
| 3399 | for example, 'jmp pc_relative_label' from 'jmp *absolute_label'. */ |
| 3400 | if (*op_string == ABSOLUTE_PREFIX) |
| 3401 | { |
| 3402 | ++op_string; |
| 3403 | if (is_space_char (*op_string)) |
| 3404 | ++op_string; |
| 3405 | i.types[this_operand] |= JumpAbsolute; |
| 3406 | } |
| 3407 | |
| 3408 | /* Check if operand is a register. */ |
| 3409 | if ((*op_string == REGISTER_PREFIX || allow_naked_reg) |
| 3410 | && (r = parse_register (op_string, &end_op)) != NULL) |
| 3411 | { |
| 3412 | /* Check for a segment override by searching for ':' after a |
| 3413 | segment register. */ |
| 3414 | op_string = end_op; |
| 3415 | if (is_space_char (*op_string)) |
| 3416 | ++op_string; |
| 3417 | if (*op_string == ':' && (r->reg_type & (SReg2 | SReg3))) |
| 3418 | { |
| 3419 | switch (r->reg_num) |
| 3420 | { |
| 3421 | case 0: |
| 3422 | i.seg[i.mem_operands] = &es; |
| 3423 | break; |
| 3424 | case 1: |
| 3425 | i.seg[i.mem_operands] = &cs; |
| 3426 | break; |
| 3427 | case 2: |
| 3428 | i.seg[i.mem_operands] = &ss; |
| 3429 | break; |
| 3430 | case 3: |
| 3431 | i.seg[i.mem_operands] = &ds; |
| 3432 | break; |
| 3433 | case 4: |
| 3434 | i.seg[i.mem_operands] = &fs; |
| 3435 | break; |
| 3436 | case 5: |
| 3437 | i.seg[i.mem_operands] = &gs; |
| 3438 | break; |
| 3439 | } |
| 3440 | |
| 3441 | /* Skip the ':' and whitespace. */ |
| 3442 | ++op_string; |
| 3443 | if (is_space_char (*op_string)) |
| 3444 | ++op_string; |
| 3445 | |
| 3446 | if (!is_digit_char (*op_string) |
| 3447 | && !is_identifier_char (*op_string) |
| 3448 | && *op_string != '(' |
| 3449 | && *op_string != ABSOLUTE_PREFIX) |
| 3450 | { |
| 3451 | as_bad (_("bad memory operand `%s'"), op_string); |
| 3452 | return 0; |
| 3453 | } |
| 3454 | /* Handle case of %es:*foo. */ |
| 3455 | if (*op_string == ABSOLUTE_PREFIX) |
| 3456 | { |
| 3457 | ++op_string; |
| 3458 | if (is_space_char (*op_string)) |
| 3459 | ++op_string; |
| 3460 | i.types[this_operand] |= JumpAbsolute; |
| 3461 | } |
| 3462 | goto do_memory_reference; |
| 3463 | } |
| 3464 | if (*op_string) |
| 3465 | { |
| 3466 | as_bad (_("junk `%s' after register"), op_string); |
| 3467 | return 0; |
| 3468 | } |
| 3469 | i.types[this_operand] |= r->reg_type & ~BaseIndex; |
| 3470 | i.op[this_operand].regs = r; |
| 3471 | i.reg_operands++; |
| 3472 | } |
| 3473 | else if (*op_string == REGISTER_PREFIX) |
| 3474 | { |
| 3475 | as_bad (_("bad register name `%s'"), op_string); |
| 3476 | return 0; |
| 3477 | } |
| 3478 | else if (*op_string == IMMEDIATE_PREFIX) |
| 3479 | { /* ... or an immediate */ |
| 3480 | ++op_string; |
| 3481 | if (i.types[this_operand] & JumpAbsolute) |
| 3482 | { |
| 3483 | as_bad (_("immediate operand illegal with absolute jump")); |
| 3484 | return 0; |
| 3485 | } |
| 3486 | if (!i386_immediate (op_string)) |
| 3487 | return 0; |
| 3488 | } |
| 3489 | else if (is_digit_char (*op_string) |
| 3490 | || is_identifier_char (*op_string) |
| 3491 | || *op_string == '(' ) |
| 3492 | { |
| 3493 | /* This is a memory reference of some sort. */ |
| 3494 | char *base_string; |
| 3495 | |
| 3496 | /* Start and end of displacement string expression (if found). */ |
| 3497 | char *displacement_string_start; |
| 3498 | char *displacement_string_end; |
| 3499 | |
| 3500 | do_memory_reference: |
| 3501 | if ((i.mem_operands == 1 |
| 3502 | && (current_templates->start->opcode_modifier & IsString) == 0) |
| 3503 | || i.mem_operands == 2) |
| 3504 | { |
| 3505 | as_bad (_("too many memory references for `%s'"), |
| 3506 | current_templates->start->name); |
| 3507 | return 0; |
| 3508 | } |
| 3509 | |
| 3510 | /* Check for base index form. We detect the base index form by |
| 3511 | looking for an ')' at the end of the operand, searching |
| 3512 | for the '(' matching it, and finding a REGISTER_PREFIX or ',' |
| 3513 | after the '('. */ |
| 3514 | base_string = op_string + strlen (op_string); |
| 3515 | |
| 3516 | --base_string; |
| 3517 | if (is_space_char (*base_string)) |
| 3518 | --base_string; |
| 3519 | |
| 3520 | /* If we only have a displacement, set-up for it to be parsed later. */ |
| 3521 | displacement_string_start = op_string; |
| 3522 | displacement_string_end = base_string + 1; |
| 3523 | |
| 3524 | if (*base_string == ')') |
| 3525 | { |
| 3526 | char *temp_string; |
| 3527 | unsigned int parens_balanced = 1; |
| 3528 | /* We've already checked that the number of left & right ()'s are |
| 3529 | equal, so this loop will not be infinite. */ |
| 3530 | do |
| 3531 | { |
| 3532 | base_string--; |
| 3533 | if (*base_string == ')') |
| 3534 | parens_balanced++; |
| 3535 | if (*base_string == '(') |
| 3536 | parens_balanced--; |
| 3537 | } |
| 3538 | while (parens_balanced); |
| 3539 | |
| 3540 | temp_string = base_string; |
| 3541 | |
| 3542 | /* Skip past '(' and whitespace. */ |
| 3543 | ++base_string; |
| 3544 | if (is_space_char (*base_string)) |
| 3545 | ++base_string; |
| 3546 | |
| 3547 | if (*base_string == ',' |
| 3548 | || ((*base_string == REGISTER_PREFIX || allow_naked_reg) |
| 3549 | && (i.base_reg = parse_register (base_string, &end_op)) != NULL)) |
| 3550 | { |
| 3551 | displacement_string_end = temp_string; |
| 3552 | |
| 3553 | i.types[this_operand] |= BaseIndex; |
| 3554 | |
| 3555 | if (i.base_reg) |
| 3556 | { |
| 3557 | base_string = end_op; |
| 3558 | if (is_space_char (*base_string)) |
| 3559 | ++base_string; |
| 3560 | } |
| 3561 | |
| 3562 | /* There may be an index reg or scale factor here. */ |
| 3563 | if (*base_string == ',') |
| 3564 | { |
| 3565 | ++base_string; |
| 3566 | if (is_space_char (*base_string)) |
| 3567 | ++base_string; |
| 3568 | |
| 3569 | if ((*base_string == REGISTER_PREFIX || allow_naked_reg) |
| 3570 | && (i.index_reg = parse_register (base_string, &end_op)) != NULL) |
| 3571 | { |
| 3572 | base_string = end_op; |
| 3573 | if (is_space_char (*base_string)) |
| 3574 | ++base_string; |
| 3575 | if (*base_string == ',') |
| 3576 | { |
| 3577 | ++base_string; |
| 3578 | if (is_space_char (*base_string)) |
| 3579 | ++base_string; |
| 3580 | } |
| 3581 | else if (*base_string != ')' ) |
| 3582 | { |
| 3583 | as_bad (_("expecting `,' or `)' after index register in `%s'"), |
| 3584 | operand_string); |
| 3585 | return 0; |
| 3586 | } |
| 3587 | } |
| 3588 | else if (*base_string == REGISTER_PREFIX) |
| 3589 | { |
| 3590 | as_bad (_("bad register name `%s'"), base_string); |
| 3591 | return 0; |
| 3592 | } |
| 3593 | |
| 3594 | /* Check for scale factor. */ |
| 3595 | if (isdigit ((unsigned char) *base_string)) |
| 3596 | { |
| 3597 | if (!i386_scale (base_string)) |
| 3598 | return 0; |
| 3599 | |
| 3600 | ++base_string; |
| 3601 | if (is_space_char (*base_string)) |
| 3602 | ++base_string; |
| 3603 | if (*base_string != ')') |
| 3604 | { |
| 3605 | as_bad (_("expecting `)' after scale factor in `%s'"), |
| 3606 | operand_string); |
| 3607 | return 0; |
| 3608 | } |
| 3609 | } |
| 3610 | else if (!i.index_reg) |
| 3611 | { |
| 3612 | as_bad (_("expecting index register or scale factor after `,'; got '%c'"), |
| 3613 | *base_string); |
| 3614 | return 0; |
| 3615 | } |
| 3616 | } |
| 3617 | else if (*base_string != ')') |
| 3618 | { |
| 3619 | as_bad (_("expecting `,' or `)' after base register in `%s'"), |
| 3620 | operand_string); |
| 3621 | return 0; |
| 3622 | } |
| 3623 | } |
| 3624 | else if (*base_string == REGISTER_PREFIX) |
| 3625 | { |
| 3626 | as_bad (_("bad register name `%s'"), base_string); |
| 3627 | return 0; |
| 3628 | } |
| 3629 | } |
| 3630 | |
| 3631 | /* If there's an expression beginning the operand, parse it, |
| 3632 | assuming displacement_string_start and |
| 3633 | displacement_string_end are meaningful. */ |
| 3634 | if (displacement_string_start != displacement_string_end) |
| 3635 | { |
| 3636 | if (!i386_displacement (displacement_string_start, |
| 3637 | displacement_string_end)) |
| 3638 | return 0; |
| 3639 | } |
| 3640 | |
| 3641 | /* Special case for (%dx) while doing input/output op. */ |
| 3642 | if (i.base_reg |
| 3643 | && i.base_reg->reg_type == (Reg16 | InOutPortReg) |
| 3644 | && i.index_reg == 0 |
| 3645 | && i.log2_scale_factor == 0 |
| 3646 | && i.seg[i.mem_operands] == 0 |
| 3647 | && (i.types[this_operand] & Disp) == 0) |
| 3648 | { |
| 3649 | i.types[this_operand] = InOutPortReg; |
| 3650 | return 1; |
| 3651 | } |
| 3652 | |
| 3653 | if (i386_index_check (operand_string) == 0) |
| 3654 | return 0; |
| 3655 | i.mem_operands++; |
| 3656 | } |
| 3657 | else |
| 3658 | { /* it's not a memory operand; argh! */ |
| 3659 | as_bad (_("invalid char %s beginning operand %d `%s'"), |
| 3660 | output_invalid (*op_string), |
| 3661 | this_operand + 1, |
| 3662 | op_string); |
| 3663 | return 0; |
| 3664 | } |
| 3665 | return 1; /* normal return */ |
| 3666 | } |
| 3667 | \f |
| 3668 | /* |
| 3669 | * md_estimate_size_before_relax() |
| 3670 | * |
| 3671 | * Called just before relax(). |
| 3672 | * Any symbol that is now undefined will not become defined. |
| 3673 | * Return the correct fr_subtype in the frag. |
| 3674 | * Return the initial "guess for fr_var" to caller. |
| 3675 | * The guess for fr_var is ACTUALLY the growth beyond fr_fix. |
| 3676 | * Whatever we do to grow fr_fix or fr_var contributes to our returned value. |
| 3677 | * Although it may not be explicit in the frag, pretend fr_var starts with a |
| 3678 | * 0 value. |
| 3679 | */ |
| 3680 | int |
| 3681 | md_estimate_size_before_relax (fragP, segment) |
| 3682 | register fragS *fragP; |
| 3683 | register segT segment; |
| 3684 | { |
| 3685 | register unsigned char *opcode; |
| 3686 | register int old_fr_fix; |
| 3687 | |
| 3688 | old_fr_fix = fragP->fr_fix; |
| 3689 | opcode = (unsigned char *) fragP->fr_opcode; |
| 3690 | /* We've already got fragP->fr_subtype right; all we have to do is |
| 3691 | check for un-relaxable symbols. */ |
| 3692 | if (S_GET_SEGMENT (fragP->fr_symbol) != segment) |
| 3693 | { |
| 3694 | /* symbol is undefined in this segment */ |
| 3695 | int code16 = fragP->fr_subtype & CODE16; |
| 3696 | int size = code16 ? 2 : 4; |
| 3697 | #ifdef BFD_ASSEMBLER |
| 3698 | enum bfd_reloc_code_real reloc_type; |
| 3699 | #else |
| 3700 | int reloc_type; |
| 3701 | #endif |
| 3702 | |
| 3703 | if (GOT_symbol /* Not quite right - we should switch on presence of |
| 3704 | @PLT, but I cannot see how to get to that from |
| 3705 | here. We should have done this in md_assemble to |
| 3706 | really get it right all of the time, but I think it |
| 3707 | does not matter that much, as this will be right |
| 3708 | most of the time. ERY */ |
| 3709 | && S_GET_SEGMENT(fragP->fr_symbol) == undefined_section) |
| 3710 | reloc_type = BFD_RELOC_386_PLT32; |
| 3711 | else if (code16) |
| 3712 | reloc_type = BFD_RELOC_16_PCREL; |
| 3713 | else |
| 3714 | reloc_type = BFD_RELOC_32_PCREL; |
| 3715 | |
| 3716 | switch (opcode[0]) |
| 3717 | { |
| 3718 | case JUMP_PC_RELATIVE: /* make jmp (0xeb) a dword displacement jump */ |
| 3719 | opcode[0] = 0xe9; /* dword disp jmp */ |
| 3720 | fragP->fr_fix += size; |
| 3721 | fix_new (fragP, old_fr_fix, size, |
| 3722 | fragP->fr_symbol, |
| 3723 | fragP->fr_offset, 1, |
| 3724 | reloc_type); |
| 3725 | break; |
| 3726 | |
| 3727 | default: |
| 3728 | /* This changes the byte-displacement jump 0x7N |
| 3729 | to the dword-displacement jump 0x0f,0x8N. */ |
| 3730 | opcode[1] = opcode[0] + 0x10; |
| 3731 | opcode[0] = TWO_BYTE_OPCODE_ESCAPE; |
| 3732 | fragP->fr_fix += 1 + size; /* we've added an opcode byte */ |
| 3733 | fix_new (fragP, old_fr_fix + 1, size, |
| 3734 | fragP->fr_symbol, |
| 3735 | fragP->fr_offset, 1, |
| 3736 | reloc_type); |
| 3737 | break; |
| 3738 | } |
| 3739 | frag_wane (fragP); |
| 3740 | } |
| 3741 | return (fragP->fr_var + fragP->fr_fix - old_fr_fix); |
| 3742 | } /* md_estimate_size_before_relax() */ |
| 3743 | \f |
| 3744 | /* |
| 3745 | * md_convert_frag(); |
| 3746 | * |
| 3747 | * Called after relax() is finished. |
| 3748 | * In: Address of frag. |
| 3749 | * fr_type == rs_machine_dependent. |
| 3750 | * fr_subtype is what the address relaxed to. |
| 3751 | * |
| 3752 | * Out: Any fixSs and constants are set up. |
| 3753 | * Caller will turn frag into a ".space 0". |
| 3754 | */ |
| 3755 | #ifndef BFD_ASSEMBLER |
| 3756 | void |
| 3757 | md_convert_frag (headers, sec, fragP) |
| 3758 | object_headers *headers ATTRIBUTE_UNUSED; |
| 3759 | segT sec ATTRIBUTE_UNUSED; |
| 3760 | register fragS *fragP; |
| 3761 | #else |
| 3762 | void |
| 3763 | md_convert_frag (abfd, sec, fragP) |
| 3764 | bfd *abfd ATTRIBUTE_UNUSED; |
| 3765 | segT sec ATTRIBUTE_UNUSED; |
| 3766 | register fragS *fragP; |
| 3767 | #endif |
| 3768 | { |
| 3769 | register unsigned char *opcode; |
| 3770 | unsigned char *where_to_put_displacement = NULL; |
| 3771 | offsetT target_address; |
| 3772 | offsetT opcode_address; |
| 3773 | unsigned int extension = 0; |
| 3774 | offsetT displacement_from_opcode_start; |
| 3775 | |
| 3776 | opcode = (unsigned char *) fragP->fr_opcode; |
| 3777 | |
| 3778 | /* Address we want to reach in file space. */ |
| 3779 | target_address = S_GET_VALUE (fragP->fr_symbol) + fragP->fr_offset; |
| 3780 | #ifdef BFD_ASSEMBLER /* not needed otherwise? */ |
| 3781 | target_address += symbol_get_frag (fragP->fr_symbol)->fr_address; |
| 3782 | #endif |
| 3783 | |
| 3784 | /* Address opcode resides at in file space. */ |
| 3785 | opcode_address = fragP->fr_address + fragP->fr_fix; |
| 3786 | |
| 3787 | /* Displacement from opcode start to fill into instruction. */ |
| 3788 | displacement_from_opcode_start = target_address - opcode_address; |
| 3789 | |
| 3790 | switch (fragP->fr_subtype) |
| 3791 | { |
| 3792 | case ENCODE_RELAX_STATE (COND_JUMP, SMALL): |
| 3793 | case ENCODE_RELAX_STATE (COND_JUMP, SMALL16): |
| 3794 | case ENCODE_RELAX_STATE (UNCOND_JUMP, SMALL): |
| 3795 | case ENCODE_RELAX_STATE (UNCOND_JUMP, SMALL16): |
| 3796 | /* don't have to change opcode */ |
| 3797 | extension = 1; /* 1 opcode + 1 displacement */ |
| 3798 | where_to_put_displacement = &opcode[1]; |
| 3799 | break; |
| 3800 | |
| 3801 | case ENCODE_RELAX_STATE (COND_JUMP, BIG): |
| 3802 | extension = 5; /* 2 opcode + 4 displacement */ |
| 3803 | opcode[1] = opcode[0] + 0x10; |
| 3804 | opcode[0] = TWO_BYTE_OPCODE_ESCAPE; |
| 3805 | where_to_put_displacement = &opcode[2]; |
| 3806 | break; |
| 3807 | |
| 3808 | case ENCODE_RELAX_STATE (UNCOND_JUMP, BIG): |
| 3809 | extension = 4; /* 1 opcode + 4 displacement */ |
| 3810 | opcode[0] = 0xe9; |
| 3811 | where_to_put_displacement = &opcode[1]; |
| 3812 | break; |
| 3813 | |
| 3814 | case ENCODE_RELAX_STATE (COND_JUMP, BIG16): |
| 3815 | extension = 3; /* 2 opcode + 2 displacement */ |
| 3816 | opcode[1] = opcode[0] + 0x10; |
| 3817 | opcode[0] = TWO_BYTE_OPCODE_ESCAPE; |
| 3818 | where_to_put_displacement = &opcode[2]; |
| 3819 | break; |
| 3820 | |
| 3821 | case ENCODE_RELAX_STATE (UNCOND_JUMP, BIG16): |
| 3822 | extension = 2; /* 1 opcode + 2 displacement */ |
| 3823 | opcode[0] = 0xe9; |
| 3824 | where_to_put_displacement = &opcode[1]; |
| 3825 | break; |
| 3826 | |
| 3827 | default: |
| 3828 | BAD_CASE (fragP->fr_subtype); |
| 3829 | break; |
| 3830 | } |
| 3831 | /* now put displacement after opcode */ |
| 3832 | md_number_to_chars ((char *) where_to_put_displacement, |
| 3833 | (valueT) (displacement_from_opcode_start - extension), |
| 3834 | SIZE_FROM_RELAX_STATE (fragP->fr_subtype)); |
| 3835 | fragP->fr_fix += extension; |
| 3836 | } |
| 3837 | \f |
| 3838 | |
| 3839 | int md_short_jump_size = 2; /* size of byte displacement jmp */ |
| 3840 | int md_long_jump_size = 5; /* size of dword displacement jmp */ |
| 3841 | const int md_reloc_size = 8; /* Size of relocation record */ |
| 3842 | |
| 3843 | void |
| 3844 | md_create_short_jump (ptr, from_addr, to_addr, frag, to_symbol) |
| 3845 | char *ptr; |
| 3846 | addressT from_addr, to_addr; |
| 3847 | fragS *frag ATTRIBUTE_UNUSED; |
| 3848 | symbolS *to_symbol ATTRIBUTE_UNUSED; |
| 3849 | { |
| 3850 | offsetT offset; |
| 3851 | |
| 3852 | offset = to_addr - (from_addr + 2); |
| 3853 | md_number_to_chars (ptr, (valueT) 0xeb, 1); /* opcode for byte-disp jump */ |
| 3854 | md_number_to_chars (ptr + 1, (valueT) offset, 1); |
| 3855 | } |
| 3856 | |
| 3857 | void |
| 3858 | md_create_long_jump (ptr, from_addr, to_addr, frag, to_symbol) |
| 3859 | char *ptr; |
| 3860 | addressT from_addr, to_addr; |
| 3861 | fragS *frag; |
| 3862 | symbolS *to_symbol; |
| 3863 | { |
| 3864 | offsetT offset; |
| 3865 | |
| 3866 | if (flag_do_long_jump) |
| 3867 | { |
| 3868 | offset = to_addr - S_GET_VALUE (to_symbol); |
| 3869 | md_number_to_chars (ptr, (valueT) 0xe9, 1);/* opcode for long jmp */ |
| 3870 | md_number_to_chars (ptr + 1, (valueT) offset, 4); |
| 3871 | fix_new (frag, (ptr + 1) - frag->fr_literal, 4, |
| 3872 | to_symbol, (offsetT) 0, 0, BFD_RELOC_32); |
| 3873 | } |
| 3874 | else |
| 3875 | { |
| 3876 | offset = to_addr - (from_addr + 5); |
| 3877 | md_number_to_chars (ptr, (valueT) 0xe9, 1); |
| 3878 | md_number_to_chars (ptr + 1, (valueT) offset, 4); |
| 3879 | } |
| 3880 | } |
| 3881 | \f |
| 3882 | /* Apply a fixup (fixS) to segment data, once it has been determined |
| 3883 | by our caller that we have all the info we need to fix it up. |
| 3884 | |
| 3885 | On the 386, immediates, displacements, and data pointers are all in |
| 3886 | the same (little-endian) format, so we don't need to care about which |
| 3887 | we are handling. */ |
| 3888 | |
| 3889 | int |
| 3890 | md_apply_fix3 (fixP, valp, seg) |
| 3891 | fixS *fixP; /* The fix we're to put in. */ |
| 3892 | valueT *valp; /* Pointer to the value of the bits. */ |
| 3893 | segT seg ATTRIBUTE_UNUSED; /* Segment fix is from. */ |
| 3894 | { |
| 3895 | register char *p = fixP->fx_where + fixP->fx_frag->fr_literal; |
| 3896 | valueT value = *valp; |
| 3897 | |
| 3898 | #if defined (BFD_ASSEMBLER) && !defined (TE_Mach) |
| 3899 | if (fixP->fx_pcrel) |
| 3900 | { |
| 3901 | switch (fixP->fx_r_type) |
| 3902 | { |
| 3903 | default: |
| 3904 | break; |
| 3905 | |
| 3906 | case BFD_RELOC_32: |
| 3907 | fixP->fx_r_type = BFD_RELOC_32_PCREL; |
| 3908 | break; |
| 3909 | case BFD_RELOC_16: |
| 3910 | fixP->fx_r_type = BFD_RELOC_16_PCREL; |
| 3911 | break; |
| 3912 | case BFD_RELOC_8: |
| 3913 | fixP->fx_r_type = BFD_RELOC_8_PCREL; |
| 3914 | break; |
| 3915 | } |
| 3916 | } |
| 3917 | |
| 3918 | /* This is a hack. There should be a better way to handle this. |
| 3919 | This covers for the fact that bfd_install_relocation will |
| 3920 | subtract the current location (for partial_inplace, PC relative |
| 3921 | relocations); see more below. */ |
| 3922 | if ((fixP->fx_r_type == BFD_RELOC_32_PCREL |
| 3923 | || fixP->fx_r_type == BFD_RELOC_16_PCREL |
| 3924 | || fixP->fx_r_type == BFD_RELOC_8_PCREL) |
| 3925 | && fixP->fx_addsy) |
| 3926 | { |
| 3927 | #ifndef OBJ_AOUT |
| 3928 | if (OUTPUT_FLAVOR == bfd_target_elf_flavour |
| 3929 | #ifdef TE_PE |
| 3930 | || OUTPUT_FLAVOR == bfd_target_coff_flavour |
| 3931 | #endif |
| 3932 | ) |
| 3933 | value += fixP->fx_where + fixP->fx_frag->fr_address; |
| 3934 | #endif |
| 3935 | #if defined (OBJ_ELF) || defined (OBJ_MAYBE_ELF) |
| 3936 | if (OUTPUT_FLAVOR == bfd_target_elf_flavour) |
| 3937 | { |
| 3938 | segT fseg = S_GET_SEGMENT (fixP->fx_addsy); |
| 3939 | |
| 3940 | if ((fseg == seg |
| 3941 | || (symbol_section_p (fixP->fx_addsy) |
| 3942 | && fseg != absolute_section)) |
| 3943 | && ! S_IS_EXTERNAL (fixP->fx_addsy) |
| 3944 | && ! S_IS_WEAK (fixP->fx_addsy) |
| 3945 | && S_IS_DEFINED (fixP->fx_addsy) |
| 3946 | && ! S_IS_COMMON (fixP->fx_addsy)) |
| 3947 | { |
| 3948 | /* Yes, we add the values in twice. This is because |
| 3949 | bfd_perform_relocation subtracts them out again. I think |
| 3950 | bfd_perform_relocation is broken, but I don't dare change |
| 3951 | it. FIXME. */ |
| 3952 | value += fixP->fx_where + fixP->fx_frag->fr_address; |
| 3953 | } |
| 3954 | } |
| 3955 | #endif |
| 3956 | #if defined (OBJ_COFF) && defined (TE_PE) |
| 3957 | /* For some reason, the PE format does not store a section |
| 3958 | address offset for a PC relative symbol. */ |
| 3959 | if (S_GET_SEGMENT (fixP->fx_addsy) != seg) |
| 3960 | value += md_pcrel_from (fixP); |
| 3961 | else if (S_IS_EXTERNAL (fixP->fx_addsy) |
| 3962 | || S_IS_WEAK (fixP->fx_addsy)) |
| 3963 | { |
| 3964 | /* We are generating an external relocation for this defined |
| 3965 | symbol. We add the address, because |
| 3966 | bfd_install_relocation will subtract it. VALUE already |
| 3967 | holds the symbol value, because fixup_segment added it |
| 3968 | in. We subtract it out, and then we subtract it out |
| 3969 | again because bfd_install_relocation will add it in |
| 3970 | again. */ |
| 3971 | value += md_pcrel_from (fixP); |
| 3972 | value -= 2 * S_GET_VALUE (fixP->fx_addsy); |
| 3973 | } |
| 3974 | #endif |
| 3975 | } |
| 3976 | #ifdef TE_PE |
| 3977 | else if (fixP->fx_addsy != NULL |
| 3978 | && S_IS_DEFINED (fixP->fx_addsy) |
| 3979 | && (S_IS_EXTERNAL (fixP->fx_addsy) |
| 3980 | || S_IS_WEAK (fixP->fx_addsy))) |
| 3981 | { |
| 3982 | /* We are generating an external relocation for this defined |
| 3983 | symbol. VALUE already holds the symbol value, and |
| 3984 | bfd_install_relocation will add it in again. We don't want |
| 3985 | either addition. */ |
| 3986 | value -= 2 * S_GET_VALUE (fixP->fx_addsy); |
| 3987 | } |
| 3988 | #endif |
| 3989 | |
| 3990 | /* Fix a few things - the dynamic linker expects certain values here, |
| 3991 | and we must not dissappoint it. */ |
| 3992 | #if defined (OBJ_ELF) || defined (OBJ_MAYBE_ELF) |
| 3993 | if (OUTPUT_FLAVOR == bfd_target_elf_flavour |
| 3994 | && fixP->fx_addsy) |
| 3995 | switch (fixP->fx_r_type) { |
| 3996 | case BFD_RELOC_386_PLT32: |
| 3997 | /* Make the jump instruction point to the address of the operand. At |
| 3998 | runtime we merely add the offset to the actual PLT entry. */ |
| 3999 | value = -4; |
| 4000 | break; |
| 4001 | case BFD_RELOC_386_GOTPC: |
| 4002 | /* |
| 4003 | * This is tough to explain. We end up with this one if we have |
| 4004 | * operands that look like "_GLOBAL_OFFSET_TABLE_+[.-.L284]". The goal |
| 4005 | * here is to obtain the absolute address of the GOT, and it is strongly |
| 4006 | * preferable from a performance point of view to avoid using a runtime |
| 4007 | * relocation for this. The actual sequence of instructions often look |
| 4008 | * something like: |
| 4009 | * |
| 4010 | * call .L66 |
| 4011 | * .L66: |
| 4012 | * popl %ebx |
| 4013 | * addl $_GLOBAL_OFFSET_TABLE_+[.-.L66],%ebx |
| 4014 | * |
| 4015 | * The call and pop essentially return the absolute address of |
| 4016 | * the label .L66 and store it in %ebx. The linker itself will |
| 4017 | * ultimately change the first operand of the addl so that %ebx points to |
| 4018 | * the GOT, but to keep things simple, the .o file must have this operand |
| 4019 | * set so that it generates not the absolute address of .L66, but the |
| 4020 | * absolute address of itself. This allows the linker itself simply |
| 4021 | * treat a GOTPC relocation as asking for a pcrel offset to the GOT to be |
| 4022 | * added in, and the addend of the relocation is stored in the operand |
| 4023 | * field for the instruction itself. |
| 4024 | * |
| 4025 | * Our job here is to fix the operand so that it would add the correct |
| 4026 | * offset so that %ebx would point to itself. The thing that is tricky is |
| 4027 | * that .-.L66 will point to the beginning of the instruction, so we need |
| 4028 | * to further modify the operand so that it will point to itself. |
| 4029 | * There are other cases where you have something like: |
| 4030 | * |
| 4031 | * .long $_GLOBAL_OFFSET_TABLE_+[.-.L66] |
| 4032 | * |
| 4033 | * and here no correction would be required. Internally in the assembler |
| 4034 | * we treat operands of this form as not being pcrel since the '.' is |
| 4035 | * explicitly mentioned, and I wonder whether it would simplify matters |
| 4036 | * to do it this way. Who knows. In earlier versions of the PIC patches, |
| 4037 | * the pcrel_adjust field was used to store the correction, but since the |
| 4038 | * expression is not pcrel, I felt it would be confusing to do it this way. |
| 4039 | */ |
| 4040 | value -= 1; |
| 4041 | break; |
| 4042 | case BFD_RELOC_386_GOT32: |
| 4043 | value = 0; /* Fully resolved at runtime. No addend. */ |
| 4044 | break; |
| 4045 | case BFD_RELOC_386_GOTOFF: |
| 4046 | break; |
| 4047 | |
| 4048 | case BFD_RELOC_VTABLE_INHERIT: |
| 4049 | case BFD_RELOC_VTABLE_ENTRY: |
| 4050 | fixP->fx_done = 0; |
| 4051 | return 1; |
| 4052 | |
| 4053 | default: |
| 4054 | break; |
| 4055 | } |
| 4056 | #endif /* defined (OBJ_ELF) || defined (OBJ_MAYBE_ELF) */ |
| 4057 | *valp = value; |
| 4058 | #endif /* defined (BFD_ASSEMBLER) && !defined (TE_Mach) */ |
| 4059 | md_number_to_chars (p, value, fixP->fx_size); |
| 4060 | |
| 4061 | return 1; |
| 4062 | } |
| 4063 | \f |
| 4064 | |
| 4065 | #define MAX_LITTLENUMS 6 |
| 4066 | |
| 4067 | /* Turn the string pointed to by litP into a floating point constant of type |
| 4068 | type, and emit the appropriate bytes. The number of LITTLENUMS emitted |
| 4069 | is stored in *sizeP . An error message is returned, or NULL on OK. */ |
| 4070 | char * |
| 4071 | md_atof (type, litP, sizeP) |
| 4072 | int type; |
| 4073 | char *litP; |
| 4074 | int *sizeP; |
| 4075 | { |
| 4076 | int prec; |
| 4077 | LITTLENUM_TYPE words[MAX_LITTLENUMS]; |
| 4078 | LITTLENUM_TYPE *wordP; |
| 4079 | char *t; |
| 4080 | |
| 4081 | switch (type) |
| 4082 | { |
| 4083 | case 'f': |
| 4084 | case 'F': |
| 4085 | prec = 2; |
| 4086 | break; |
| 4087 | |
| 4088 | case 'd': |
| 4089 | case 'D': |
| 4090 | prec = 4; |
| 4091 | break; |
| 4092 | |
| 4093 | case 'x': |
| 4094 | case 'X': |
| 4095 | prec = 5; |
| 4096 | break; |
| 4097 | |
| 4098 | default: |
| 4099 | *sizeP = 0; |
| 4100 | return _("Bad call to md_atof ()"); |
| 4101 | } |
| 4102 | t = atof_ieee (input_line_pointer, type, words); |
| 4103 | if (t) |
| 4104 | input_line_pointer = t; |
| 4105 | |
| 4106 | *sizeP = prec * sizeof (LITTLENUM_TYPE); |
| 4107 | /* This loops outputs the LITTLENUMs in REVERSE order; in accord with |
| 4108 | the bigendian 386. */ |
| 4109 | for (wordP = words + prec - 1; prec--;) |
| 4110 | { |
| 4111 | md_number_to_chars (litP, (valueT) (*wordP--), sizeof (LITTLENUM_TYPE)); |
| 4112 | litP += sizeof (LITTLENUM_TYPE); |
| 4113 | } |
| 4114 | return 0; |
| 4115 | } |
| 4116 | \f |
| 4117 | char output_invalid_buf[8]; |
| 4118 | |
| 4119 | static char * |
| 4120 | output_invalid (c) |
| 4121 | int c; |
| 4122 | { |
| 4123 | if (isprint (c)) |
| 4124 | sprintf (output_invalid_buf, "'%c'", c); |
| 4125 | else |
| 4126 | sprintf (output_invalid_buf, "(0x%x)", (unsigned) c); |
| 4127 | return output_invalid_buf; |
| 4128 | } |
| 4129 | |
| 4130 | |
| 4131 | /* REG_STRING starts *before* REGISTER_PREFIX. */ |
| 4132 | |
| 4133 | static const reg_entry * |
| 4134 | parse_register (reg_string, end_op) |
| 4135 | char *reg_string; |
| 4136 | char **end_op; |
| 4137 | { |
| 4138 | char *s = reg_string; |
| 4139 | char *p; |
| 4140 | char reg_name_given[MAX_REG_NAME_SIZE + 1]; |
| 4141 | const reg_entry *r; |
| 4142 | |
| 4143 | /* Skip possible REGISTER_PREFIX and possible whitespace. */ |
| 4144 | if (*s == REGISTER_PREFIX) |
| 4145 | ++s; |
| 4146 | |
| 4147 | if (is_space_char (*s)) |
| 4148 | ++s; |
| 4149 | |
| 4150 | p = reg_name_given; |
| 4151 | while ((*p++ = register_chars[(unsigned char) *s]) != '\0') |
| 4152 | { |
| 4153 | if (p >= reg_name_given + MAX_REG_NAME_SIZE) |
| 4154 | return (const reg_entry *) NULL; |
| 4155 | s++; |
| 4156 | } |
| 4157 | |
| 4158 | *end_op = s; |
| 4159 | |
| 4160 | r = (const reg_entry *) hash_find (reg_hash, reg_name_given); |
| 4161 | |
| 4162 | /* Handle floating point regs, allowing spaces in the (i) part. */ |
| 4163 | if (r == i386_regtab /* %st is first entry of table */) |
| 4164 | { |
| 4165 | if (is_space_char (*s)) |
| 4166 | ++s; |
| 4167 | if (*s == '(') |
| 4168 | { |
| 4169 | ++s; |
| 4170 | if (is_space_char (*s)) |
| 4171 | ++s; |
| 4172 | if (*s >= '0' && *s <= '7') |
| 4173 | { |
| 4174 | r = &i386_float_regtab[*s - '0']; |
| 4175 | ++s; |
| 4176 | if (is_space_char (*s)) |
| 4177 | ++s; |
| 4178 | if (*s == ')') |
| 4179 | { |
| 4180 | *end_op = s + 1; |
| 4181 | return r; |
| 4182 | } |
| 4183 | } |
| 4184 | /* We have "%st(" then garbage */ |
| 4185 | return (const reg_entry *) NULL; |
| 4186 | } |
| 4187 | } |
| 4188 | |
| 4189 | return r; |
| 4190 | } |
| 4191 | \f |
| 4192 | #if defined (OBJ_ELF) || defined (OBJ_MAYBE_ELF) |
| 4193 | CONST char *md_shortopts = "kmVQ:sq"; |
| 4194 | #else |
| 4195 | CONST char *md_shortopts = "m"; |
| 4196 | #endif |
| 4197 | struct option md_longopts[] = { |
| 4198 | {NULL, no_argument, NULL, 0} |
| 4199 | }; |
| 4200 | size_t md_longopts_size = sizeof (md_longopts); |
| 4201 | |
| 4202 | int |
| 4203 | md_parse_option (c, arg) |
| 4204 | int c; |
| 4205 | char *arg ATTRIBUTE_UNUSED; |
| 4206 | { |
| 4207 | switch (c) |
| 4208 | { |
| 4209 | case 'm': |
| 4210 | flag_do_long_jump = 1; |
| 4211 | break; |
| 4212 | |
| 4213 | #if defined (OBJ_ELF) || defined (OBJ_MAYBE_ELF) |
| 4214 | /* -k: Ignore for FreeBSD compatibility. */ |
| 4215 | case 'k': |
| 4216 | break; |
| 4217 | |
| 4218 | /* -V: SVR4 argument to print version ID. */ |
| 4219 | case 'V': |
| 4220 | print_version_id (); |
| 4221 | break; |
| 4222 | |
| 4223 | /* -Qy, -Qn: SVR4 arguments controlling whether a .comment section |
| 4224 | should be emitted or not. FIXME: Not implemented. */ |
| 4225 | case 'Q': |
| 4226 | break; |
| 4227 | |
| 4228 | case 's': |
| 4229 | /* -s: On i386 Solaris, this tells the native assembler to use |
| 4230 | .stab instead of .stab.excl. We always use .stab anyhow. */ |
| 4231 | break; |
| 4232 | |
| 4233 | case 'q': |
| 4234 | /* -q: On i386 Solaris, this tells the native assembler does |
| 4235 | fewer checks. */ |
| 4236 | break; |
| 4237 | #endif |
| 4238 | |
| 4239 | default: |
| 4240 | return 0; |
| 4241 | } |
| 4242 | return 1; |
| 4243 | } |
| 4244 | |
| 4245 | void |
| 4246 | md_show_usage (stream) |
| 4247 | FILE *stream; |
| 4248 | { |
| 4249 | fprintf (stream, _("\ |
| 4250 | -m do long jump\n")); |
| 4251 | #if defined (OBJ_ELF) || defined (OBJ_MAYBE_ELF) |
| 4252 | fprintf (stream, _("\ |
| 4253 | -V print assembler version number\n\ |
| 4254 | -k ignored\n\ |
| 4255 | -Qy, -Qn ignored\n\ |
| 4256 | -q ignored\n\ |
| 4257 | -s ignored\n")); |
| 4258 | #endif |
| 4259 | } |
| 4260 | |
| 4261 | #ifdef BFD_ASSEMBLER |
| 4262 | #if ((defined (OBJ_MAYBE_ELF) && defined (OBJ_MAYBE_COFF)) \ |
| 4263 | || (defined (OBJ_MAYBE_ELF) && defined (OBJ_MAYBE_AOUT)) \ |
| 4264 | || (defined (OBJ_MAYBE_COFF) && defined (OBJ_MAYBE_AOUT))) |
| 4265 | |
| 4266 | /* Pick the target format to use. */ |
| 4267 | |
| 4268 | const char * |
| 4269 | i386_target_format () |
| 4270 | { |
| 4271 | switch (OUTPUT_FLAVOR) |
| 4272 | { |
| 4273 | #ifdef OBJ_MAYBE_AOUT |
| 4274 | case bfd_target_aout_flavour: |
| 4275 | return AOUT_TARGET_FORMAT; |
| 4276 | #endif |
| 4277 | #ifdef OBJ_MAYBE_COFF |
| 4278 | case bfd_target_coff_flavour: |
| 4279 | return "coff-i386"; |
| 4280 | #endif |
| 4281 | #ifdef OBJ_MAYBE_ELF |
| 4282 | case bfd_target_elf_flavour: |
| 4283 | return "elf32-i386"; |
| 4284 | #endif |
| 4285 | default: |
| 4286 | abort (); |
| 4287 | return NULL; |
| 4288 | } |
| 4289 | } |
| 4290 | |
| 4291 | #endif /* OBJ_MAYBE_ more than one */ |
| 4292 | #endif /* BFD_ASSEMBLER */ |
| 4293 | \f |
| 4294 | symbolS * |
| 4295 | md_undefined_symbol (name) |
| 4296 | char *name; |
| 4297 | { |
| 4298 | if (name[0] == GLOBAL_OFFSET_TABLE_NAME[0] |
| 4299 | && name[1] == GLOBAL_OFFSET_TABLE_NAME[1] |
| 4300 | && name[2] == GLOBAL_OFFSET_TABLE_NAME[2] |
| 4301 | && strcmp (name, GLOBAL_OFFSET_TABLE_NAME) == 0) |
| 4302 | { |
| 4303 | if (!GOT_symbol) |
| 4304 | { |
| 4305 | if (symbol_find (name)) |
| 4306 | as_bad (_("GOT already in symbol table")); |
| 4307 | GOT_symbol = symbol_new (name, undefined_section, |
| 4308 | (valueT) 0, &zero_address_frag); |
| 4309 | }; |
| 4310 | return GOT_symbol; |
| 4311 | } |
| 4312 | return 0; |
| 4313 | } |
| 4314 | |
| 4315 | /* Round up a section size to the appropriate boundary. */ |
| 4316 | valueT |
| 4317 | md_section_align (segment, size) |
| 4318 | segT segment ATTRIBUTE_UNUSED; |
| 4319 | valueT size; |
| 4320 | { |
| 4321 | #ifdef BFD_ASSEMBLER |
| 4322 | #if (defined (OBJ_AOUT) || defined (OBJ_MAYBE_AOUT)) |
| 4323 | if (OUTPUT_FLAVOR == bfd_target_aout_flavour) |
| 4324 | { |
| 4325 | /* For a.out, force the section size to be aligned. If we don't do |
| 4326 | this, BFD will align it for us, but it will not write out the |
| 4327 | final bytes of the section. This may be a bug in BFD, but it is |
| 4328 | easier to fix it here since that is how the other a.out targets |
| 4329 | work. */ |
| 4330 | int align; |
| 4331 | |
| 4332 | align = bfd_get_section_alignment (stdoutput, segment); |
| 4333 | size = ((size + (1 << align) - 1) & ((valueT) -1 << align)); |
| 4334 | } |
| 4335 | #endif |
| 4336 | #endif |
| 4337 | |
| 4338 | return size; |
| 4339 | } |
| 4340 | |
| 4341 | /* On the i386, PC-relative offsets are relative to the start of the |
| 4342 | next instruction. That is, the address of the offset, plus its |
| 4343 | size, since the offset is always the last part of the insn. */ |
| 4344 | |
| 4345 | long |
| 4346 | md_pcrel_from (fixP) |
| 4347 | fixS *fixP; |
| 4348 | { |
| 4349 | return fixP->fx_size + fixP->fx_where + fixP->fx_frag->fr_address; |
| 4350 | } |
| 4351 | |
| 4352 | #ifndef I386COFF |
| 4353 | |
| 4354 | static void |
| 4355 | s_bss (ignore) |
| 4356 | int ignore ATTRIBUTE_UNUSED; |
| 4357 | { |
| 4358 | register int temp; |
| 4359 | |
| 4360 | temp = get_absolute_expression (); |
| 4361 | subseg_set (bss_section, (subsegT) temp); |
| 4362 | demand_empty_rest_of_line (); |
| 4363 | } |
| 4364 | |
| 4365 | #endif |
| 4366 | |
| 4367 | |
| 4368 | #ifdef BFD_ASSEMBLER |
| 4369 | |
| 4370 | void |
| 4371 | i386_validate_fix (fixp) |
| 4372 | fixS *fixp; |
| 4373 | { |
| 4374 | if (fixp->fx_subsy && fixp->fx_subsy == GOT_symbol) |
| 4375 | { |
| 4376 | fixp->fx_r_type = BFD_RELOC_386_GOTOFF; |
| 4377 | fixp->fx_subsy = 0; |
| 4378 | } |
| 4379 | } |
| 4380 | |
| 4381 | arelent * |
| 4382 | tc_gen_reloc (section, fixp) |
| 4383 | asection *section ATTRIBUTE_UNUSED; |
| 4384 | fixS *fixp; |
| 4385 | { |
| 4386 | arelent *rel; |
| 4387 | bfd_reloc_code_real_type code; |
| 4388 | |
| 4389 | switch (fixp->fx_r_type) |
| 4390 | { |
| 4391 | case BFD_RELOC_386_PLT32: |
| 4392 | case BFD_RELOC_386_GOT32: |
| 4393 | case BFD_RELOC_386_GOTOFF: |
| 4394 | case BFD_RELOC_386_GOTPC: |
| 4395 | case BFD_RELOC_RVA: |
| 4396 | case BFD_RELOC_VTABLE_ENTRY: |
| 4397 | case BFD_RELOC_VTABLE_INHERIT: |
| 4398 | code = fixp->fx_r_type; |
| 4399 | break; |
| 4400 | default: |
| 4401 | if (fixp->fx_pcrel) |
| 4402 | { |
| 4403 | switch (fixp->fx_size) |
| 4404 | { |
| 4405 | default: |
| 4406 | as_bad (_("can not do %d byte pc-relative relocation"), |
| 4407 | fixp->fx_size); |
| 4408 | code = BFD_RELOC_32_PCREL; |
| 4409 | break; |
| 4410 | case 1: code = BFD_RELOC_8_PCREL; break; |
| 4411 | case 2: code = BFD_RELOC_16_PCREL; break; |
| 4412 | case 4: code = BFD_RELOC_32_PCREL; break; |
| 4413 | } |
| 4414 | } |
| 4415 | else |
| 4416 | { |
| 4417 | switch (fixp->fx_size) |
| 4418 | { |
| 4419 | default: |
| 4420 | as_bad (_("can not do %d byte relocation"), fixp->fx_size); |
| 4421 | code = BFD_RELOC_32; |
| 4422 | break; |
| 4423 | case 1: code = BFD_RELOC_8; break; |
| 4424 | case 2: code = BFD_RELOC_16; break; |
| 4425 | case 4: code = BFD_RELOC_32; break; |
| 4426 | } |
| 4427 | } |
| 4428 | break; |
| 4429 | } |
| 4430 | |
| 4431 | if (code == BFD_RELOC_32 |
| 4432 | && GOT_symbol |
| 4433 | && fixp->fx_addsy == GOT_symbol) |
| 4434 | code = BFD_RELOC_386_GOTPC; |
| 4435 | |
| 4436 | rel = (arelent *) xmalloc (sizeof (arelent)); |
| 4437 | rel->sym_ptr_ptr = (asymbol **) xmalloc (sizeof (asymbol *)); |
| 4438 | *rel->sym_ptr_ptr = symbol_get_bfdsym (fixp->fx_addsy); |
| 4439 | |
| 4440 | rel->address = fixp->fx_frag->fr_address + fixp->fx_where; |
| 4441 | /* HACK: Since i386 ELF uses Rel instead of Rela, encode the |
| 4442 | vtable entry to be used in the relocation's section offset. */ |
| 4443 | if (fixp->fx_r_type == BFD_RELOC_VTABLE_ENTRY) |
| 4444 | rel->address = fixp->fx_offset; |
| 4445 | |
| 4446 | if (fixp->fx_pcrel) |
| 4447 | rel->addend = fixp->fx_addnumber; |
| 4448 | else |
| 4449 | rel->addend = 0; |
| 4450 | |
| 4451 | rel->howto = bfd_reloc_type_lookup (stdoutput, code); |
| 4452 | if (rel->howto == NULL) |
| 4453 | { |
| 4454 | as_bad_where (fixp->fx_file, fixp->fx_line, |
| 4455 | _("cannot represent relocation type %s"), |
| 4456 | bfd_get_reloc_code_name (code)); |
| 4457 | /* Set howto to a garbage value so that we can keep going. */ |
| 4458 | rel->howto = bfd_reloc_type_lookup (stdoutput, BFD_RELOC_32); |
| 4459 | assert (rel->howto != NULL); |
| 4460 | } |
| 4461 | |
| 4462 | return rel; |
| 4463 | } |
| 4464 | |
| 4465 | #else /* ! BFD_ASSEMBLER */ |
| 4466 | |
| 4467 | #if (defined(OBJ_AOUT) | defined(OBJ_BOUT)) |
| 4468 | void |
| 4469 | tc_aout_fix_to_chars (where, fixP, segment_address_in_file) |
| 4470 | char *where; |
| 4471 | fixS *fixP; |
| 4472 | relax_addressT segment_address_in_file; |
| 4473 | { |
| 4474 | /* |
| 4475 | * In: length of relocation (or of address) in chars: 1, 2 or 4. |
| 4476 | * Out: GNU LD relocation length code: 0, 1, or 2. |
| 4477 | */ |
| 4478 | |
| 4479 | static const unsigned char nbytes_r_length[] = {42, 0, 1, 42, 2}; |
| 4480 | long r_symbolnum; |
| 4481 | |
| 4482 | know (fixP->fx_addsy != NULL); |
| 4483 | |
| 4484 | md_number_to_chars (where, |
| 4485 | (valueT) (fixP->fx_frag->fr_address |
| 4486 | + fixP->fx_where - segment_address_in_file), |
| 4487 | 4); |
| 4488 | |
| 4489 | r_symbolnum = (S_IS_DEFINED (fixP->fx_addsy) |
| 4490 | ? S_GET_TYPE (fixP->fx_addsy) |
| 4491 | : fixP->fx_addsy->sy_number); |
| 4492 | |
| 4493 | where[6] = (r_symbolnum >> 16) & 0x0ff; |
| 4494 | where[5] = (r_symbolnum >> 8) & 0x0ff; |
| 4495 | where[4] = r_symbolnum & 0x0ff; |
| 4496 | where[7] = ((((!S_IS_DEFINED (fixP->fx_addsy)) << 3) & 0x08) |
| 4497 | | ((nbytes_r_length[fixP->fx_size] << 1) & 0x06) |
| 4498 | | (((fixP->fx_pcrel << 0) & 0x01) & 0x0f)); |
| 4499 | } |
| 4500 | |
| 4501 | #endif /* OBJ_AOUT or OBJ_BOUT */ |
| 4502 | |
| 4503 | #if defined (I386COFF) |
| 4504 | |
| 4505 | short |
| 4506 | tc_coff_fix2rtype (fixP) |
| 4507 | fixS *fixP; |
| 4508 | { |
| 4509 | if (fixP->fx_r_type == R_IMAGEBASE) |
| 4510 | return R_IMAGEBASE; |
| 4511 | |
| 4512 | return (fixP->fx_pcrel ? |
| 4513 | (fixP->fx_size == 1 ? R_PCRBYTE : |
| 4514 | fixP->fx_size == 2 ? R_PCRWORD : |
| 4515 | R_PCRLONG) : |
| 4516 | (fixP->fx_size == 1 ? R_RELBYTE : |
| 4517 | fixP->fx_size == 2 ? R_RELWORD : |
| 4518 | R_DIR32)); |
| 4519 | } |
| 4520 | |
| 4521 | int |
| 4522 | tc_coff_sizemachdep (frag) |
| 4523 | fragS *frag; |
| 4524 | { |
| 4525 | if (frag->fr_next) |
| 4526 | return (frag->fr_next->fr_address - frag->fr_address); |
| 4527 | else |
| 4528 | return 0; |
| 4529 | } |
| 4530 | |
| 4531 | #endif /* I386COFF */ |
| 4532 | |
| 4533 | #endif /* ! BFD_ASSEMBLER */ |
| 4534 | \f |
| 4535 | /* end of tc-i386.c */ |