| 1 | # Copyright 1999, 2000, 2002, 2007 Free Software Foundation, Inc. |
| 2 | |
| 3 | # This program is free software; you can redistribute it and/or modify |
| 4 | # it under the terms of the GNU General Public License as published by |
| 5 | # the Free Software Foundation; either version 3 of the License, or |
| 6 | # (at your option) any later version. |
| 7 | # |
| 8 | # This program is distributed in the hope that it will be useful, |
| 9 | # but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 10 | # MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 11 | # GNU General Public License for more details. |
| 12 | # |
| 13 | # You should have received a copy of the GNU General Public License |
| 14 | # along with this program; if not, write to the Free Software |
| 15 | # Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston, |
| 16 | # MA 02110-1301, USA. |
| 17 | |
| 18 | # Please email any bugs, comments, and/or additions to this file to: |
| 19 | # hp@axis.com |
| 20 | |
| 21 | # Written by Axis Communications AB. |
| 22 | |
| 23 | # --- This function copied from arc.exp and rewritten to fit CRIS --- |
| 24 | # |
| 25 | # Test an insn from a template .s/.d. |
| 26 | # The best way to create the .d file is to run the tests without it, let |
| 27 | # dejagnu crash, run as.new on the just built .s file, run objdump -dr on |
| 28 | # the result of that, copy the result into the .d file, and edit in the |
| 29 | # necessary patterns (@OC@, etc.). Sounds complicated but it's easy. The |
| 30 | # catch is that we assume a working assembler is used to build it. That's |
| 31 | # obviously not entirely kosher, but once the .d file is created one can |
| 32 | # verify it's contents over time. |
| 33 | # |
| 34 | # Template patterns: |
| 35 | # @OC@ - placeholder for the opcode |
| 36 | # @OR@ - placeholder for extra replacement to distinguish similar |
| 37 | # testcases. |
| 38 | # @IR+????@ - placeholder for (e.g.) register-operand insn code |
| 39 | # @IM+????@ - placeholder for (e.g.) memory-operand insn code. |
| 40 | |
| 41 | proc test_template_insn_reg_mem { args } { |
| 42 | # tmpl opcode ircode imcode avoid_regex dname ircode0 |
| 43 | # imcode0 [regex replace OR_replace] |
| 44 | global srcdir subdir objdir |
| 45 | |
| 46 | set tmpl [lindex $args 0] |
| 47 | set opcode [lindex $args 1] |
| 48 | set ircode [lindex $args 2] |
| 49 | set imcode [lindex $args 3] |
| 50 | set avoid_regex [lindex $args 4] |
| 51 | set dname [lindex $args 5] |
| 52 | set ircode0 [lindex $args 6] |
| 53 | set imcode0 [lindex $args 7] |
| 54 | |
| 55 | if { [llength $args] >= 10 } { |
| 56 | set replace_regex [lindex $args 8] |
| 57 | set replacement [lindex $args 9] |
| 58 | } else { |
| 59 | set replace_regex "" |
| 60 | } |
| 61 | |
| 62 | # Any extra replacements (like modifying the test name to something |
| 63 | # else than the @OC@ modification). Replaces occurences of @OR@. |
| 64 | if { [llength $args] >= 11 } then { |
| 65 | set extra_OR_replace [lindex $args 10] |
| 66 | } else { |
| 67 | set extra_OR_replace "" |
| 68 | } |
| 69 | |
| 70 | # Get the parts that we will wedge into the insn. |
| 71 | if [regexp "(.)(.)(.)" $imcode junk imcode3 imcode2 imcode1] { |
| 72 | set imcode3 [expr "0x$imcode3" ] |
| 73 | } else { |
| 74 | regexp "(.)(.)" $imcode junk imcode2 imcode1 |
| 75 | set imcode3 0 |
| 76 | } |
| 77 | set imcode1 [expr "0x$imcode1" ] |
| 78 | set imcode2 [expr "0x$imcode2" ] |
| 79 | |
| 80 | if [regexp "(.)(.)(.)" $ircode junk ircode3 ircode2 ircode1] { |
| 81 | set ircode3 [expr "0x$ircode3" ] |
| 82 | } else { |
| 83 | regexp "(.)(.)" $ircode junk ircode2 ircode1 |
| 84 | set ircode3 0 |
| 85 | } |
| 86 | set ircode1 [expr "0x$ircode1" ] |
| 87 | set ircode2 [expr "0x$ircode2" ] |
| 88 | |
| 89 | # To avoid fiddling with the generated .d-file, we have a |
| 90 | # parameter saying what ircode, imcode to subtract. |
| 91 | if [regexp "(.)(.)(.)" $imcode0 junk imcode03 imcode02 imcode01] { |
| 92 | set imcode03 [expr "0x$imcode03" ] |
| 93 | } else { |
| 94 | regexp "(.)(.)" $imcode0 junk imcode02 imcode01 |
| 95 | set imcode03 0 |
| 96 | } |
| 97 | set imcode01 [expr "0x$imcode01" ] |
| 98 | set imcode02 [expr "0x$imcode02" ] |
| 99 | |
| 100 | if [regexp "(.)(.)(.)" $ircode0 junk ircode03 ircode02 ircode01] { |
| 101 | set ircode03 [expr "0x$ircode03" ] |
| 102 | } else { |
| 103 | regexp "(.)(.)" $ircode0 junk ircode02 ircode01 |
| 104 | set ircode03 0 |
| 105 | } |
| 106 | |
| 107 | set ircode01 [expr "0x$ircode01" ] |
| 108 | set ircode02 [expr "0x$ircode02" ] |
| 109 | |
| 110 | # The output template may be in another file than what the |
| 111 | # source template is. |
| 112 | if [string match $dname ""] { |
| 113 | set dname $tmpl |
| 114 | } |
| 115 | |
| 116 | # Change @OC@ in the template file to $opcode |
| 117 | |
| 118 | set in_fd [open $srcdir/$subdir/$tmpl.s r] |
| 119 | set out_fd [open $objdir/$opcode-test.s w] |
| 120 | # FIXME: check return codes |
| 121 | |
| 122 | while { [gets $in_fd line] >= 0 } { |
| 123 | if { [string match "" "$avoid_regex"] \ |
| 124 | || ![regexp "$avoid_regex" $line] } { |
| 125 | |
| 126 | # verbose "Keeping $line for $opcode" |
| 127 | |
| 128 | # If caller passed a replacement regex, use it. |
| 129 | if ![string match "" "$replace_regex"] { |
| 130 | # verbose "Replacing $line with ..." |
| 131 | regsub $replace_regex $line $replacement line |
| 132 | # verbose "... $line" |
| 133 | } |
| 134 | regsub "@OC@" $line $opcode line |
| 135 | |
| 136 | puts $out_fd $line |
| 137 | } else { |
| 138 | # verbose "Skipping $line for $opcode" |
| 139 | } |
| 140 | } |
| 141 | |
| 142 | close $in_fd |
| 143 | close $out_fd |
| 144 | |
| 145 | # Create output template. |
| 146 | |
| 147 | set in_fd [open $srcdir/$subdir/$dname.d r] |
| 148 | set out_fd [open $objdir/$opcode-test.d w] |
| 149 | # FIXME: check return codes |
| 150 | |
| 151 | while { [gets $in_fd line] >= 0 } { |
| 152 | regsub "@OC@" $line $opcode line |
| 153 | #send_user "$line\n" |
| 154 | |
| 155 | regsub "@OR@" $line $extra_OR_replace line |
| 156 | |
| 157 | if [string match "*@IM+????@*" $line] { |
| 158 | # Insert the memory opcode. imcode2 occupies the high four bits |
| 159 | # of the first (presented as leftmost) byte of the |
| 160 | # IC parameter, and imcode1 the low four bits of the second |
| 161 | # (rightmost) byte. |
| 162 | regexp "^(.*)@IM\\+(.)(.)(.)(.)@(.*)$" \ |
| 163 | $line junk leftpart n1 n2 n3 n4 rightpart |
| 164 | # verbose "IM $n1 $n2 $n3 $n4 ($imcode1 $imcode2 $imcode3 $imcode01 $imcode02 $imcode03)" |
| 165 | |
| 166 | set n1 [expr 0x$n1 - $imcode01 ] |
| 167 | set n3 [expr 0x$n3 - $imcode03 ] |
| 168 | set n4 [expr 0x$n4 - $imcode02 ] |
| 169 | |
| 170 | set n [expr ($imcode1 << 12) + ($n1 << 12) + (0x$n2 << 8) \ |
| 171 | + ($n3 << 4) + ($imcode3 << 4) + $n4 + $imcode2 ] |
| 172 | set n [format "%04x" $n] |
| 173 | puts $out_fd "$leftpart$n$rightpart" |
| 174 | } elseif [string match "*@IR+????@*" $line] { |
| 175 | # As IM, but use the register opcode. |
| 176 | regexp "^(.*)@IR\\+(.)(.)(.)(.)@(.*)$" \ |
| 177 | $line junk leftpart n1 n2 n3 n4 rightpart |
| 178 | # verbose "IR $n1 $n2 $n3 $n4 ($ircode1 $ircode2 $ircode3 $ircode01 $ircode02 $ircode03)" |
| 179 | |
| 180 | set n1 [expr 0x$n1 - $ircode01 ] |
| 181 | set n3 [expr 0x$n3 - $ircode03 ] |
| 182 | set n4 [expr 0x$n4 - $ircode02 ] |
| 183 | |
| 184 | set n [expr ($ircode1 << 12) + ($n1 << 12) + (0x$n2 << 8) \ |
| 185 | + ($n3 << 4) + ($ircode3 << 4) + $n4 + $ircode2 ] |
| 186 | set n [format "%04x" $n] |
| 187 | puts $out_fd "$leftpart$n$rightpart" |
| 188 | } else { |
| 189 | puts $out_fd $line |
| 190 | } |
| 191 | } |
| 192 | |
| 193 | close $in_fd |
| 194 | close $out_fd |
| 195 | |
| 196 | # Finally, run the test. |
| 197 | |
| 198 | run_dump_test $objdir/$opcode-test |
| 199 | |
| 200 | # "make clean" won't delete these, so for now we must. |
| 201 | catch "exec rm -f $objdir/$opcode-test.s $objdir/$opcode-test.d" |
| 202 | } |
| 203 | # --- End of arc.exp borrow --- |
| 204 | |
| 205 | proc test_template_insn_reg { args } { |
| 206 | # tmpl opcode ircode avoid_regex dname ircode0 [regex replace OR_replace] |
| 207 | if { [llength $args] == 6 } { |
| 208 | test_template_insn_reg_mem [lindex $args 0] [lindex $args 1] \ |
| 209 | [lindex $args 2] 00 [lindex $args 3] [lindex $args 4] \ |
| 210 | [lindex $args 5] 00 |
| 211 | } elseif { [llength $args] == 9 } { |
| 212 | test_template_insn_reg_mem [lindex $args 0] [lindex $args 1] \ |
| 213 | [lindex $args 2] 00 [lindex $args 3] [lindex $args 4] \ |
| 214 | [lindex $args 5] 00 [lindex $args 6] [lindex $args 7] \ |
| 215 | [lindex $args 8] |
| 216 | } else { |
| 217 | test_template_insn_reg_mem [lindex $args 0] [lindex $args 1] \ |
| 218 | [lindex $args 2] 00 [lindex $args 3] [lindex $args 4] \ |
| 219 | [lindex $args 5] 00 [lindex $args 6] [lindex $args 7] |
| 220 | } |
| 221 | } |
| 222 | |
| 223 | # For insn with only memory operands. |
| 224 | proc test_template_insn_mem { args } { |
| 225 | # tmpl opcode imcode avoid_regex dname imcode0 [regex replace] |
| 226 | if { [llength $args] == 6 } { |
| 227 | test_template_insn_reg_mem [lindex $args 0] [lindex $args 1] 00 \ |
| 228 | [lindex $args 2] [lindex $args 3] [lindex $args 4] 00 \ |
| 229 | [lindex $args 5] |
| 230 | } else { |
| 231 | test_template_insn_reg_mem [lindex $args 0] [lindex $args 1] 00 \ |
| 232 | [lindex $args 2] [lindex $args 3] [lindex $args 4] 00 \ |
| 233 | [lindex $args 5] [lindex $args 6] [lindex $args 7] |
| 234 | } |
| 235 | } |
| 236 | |
| 237 | # For insn without substitutions in the output pattern. |
| 238 | proc test_template_insn_single { tmpl opcode avoid_regex dname } { |
| 239 | test_template_insn_reg_mem $tmpl $opcode 00 00 "$avoid_regex" $dname 00 00 |
| 240 | } |
| 241 | |
| 242 | # For iteration over special registers. Spec reg name in "regname", |
| 243 | # number in "regno". Type (size) in "regtype". Size-patterns to avoid |
| 244 | # in input_avoid. |
| 245 | proc to_sreg { regname regno regtype input_avoid } { |
| 246 | test_template_insn_reg_mem binop move \ |
| 247 | [format "%0x63" $regno] [format "%0xa3" $regno] \ |
| 248 | ",r\[0-9\]+,r\[0-9\]|@OC@\[^\\.\]|$input_avoid" \ |
| 249 | "x-to-$regtype-sreg" 063 0a3 \ |
| 250 | "@OC@\[^ \]+ (.*),r\[0-9\]+" [format "@OC@ \\1,%s" $regname] \ |
| 251 | $regname |
| 252 | } |
| 253 | |
| 254 | # As to_sreg, but using unop, since we don't need to test constants. |
| 255 | proc sreg_to { regname regno regtype input_avoid } { |
| 256 | test_template_insn_reg_mem unop move \ |
| 257 | [format "%0x67" $regno] [format "%0xa7" $regno] \ |
| 258 | "@OC@\\." "sreg-to-x" 067 0a7 \ |
| 259 | "@OC@ (.*)" [format "@OC@ %s,\\1" $regname] $regname |
| 260 | } |
| 261 | |
| 262 | # Replace registers in pushpop |
| 263 | proc push_pop { regname regno regtype input_avoid } { |
| 264 | test_template_insn_reg_mem pushpop pushpop-sreg \ |
| 265 | 00 [format "%0x00" $regno] \ |
| 266 | "$input_avoid" "pushpop-$regtype-sreg" 00 000 \ |
| 267 | "(\\.\[bwd\])? ((\[^, \]*,)?)r\[0-9\]+((,.*)?)" " \\2$regname\\4" $regname |
| 268 | } |
| 269 | |
| 270 | # |
| 271 | # Iterate over spec reg names and spec reg numbers. |
| 272 | # |
| 273 | proc do_spec_regs { inner_function spec_reg_list } { |
| 274 | for { set i 0 } { $i < [llength $spec_reg_list] } { incr i } { |
| 275 | set regname [lindex [lindex $spec_reg_list $i] 0] |
| 276 | set regno [lindex [lindex $spec_reg_list $i] 1] |
| 277 | |
| 278 | set regtype [lindex [lindex $spec_reg_list $i] 2] |
| 279 | set input_avoid [lindex [lindex $spec_reg_list $i] 3] |
| 280 | |
| 281 | # verbose "$regname $regno $regtype $input_avoid" |
| 282 | $inner_function $regname $regno $regtype $input_avoid |
| 283 | } |
| 284 | } |
| 285 | |
| 286 | if [istarget cris-*-*] then { |
| 287 | # Note that registers are missing, since the assembler will |
| 288 | # rightfully emit errors for registers that are not in current |
| 289 | # silicon. Those are currently p2 and p3. |
| 290 | # Note the special for dcr1, since it has different size for |
| 291 | # different silicon, which matters for assembling and displaying |
| 292 | # "immediate constants". |
| 293 | set spec_reg_list [list \ |
| 294 | [list p0 0 "byte" "(@OC@|move)\\.\[wd\]" ] \ |
| 295 | [list p1 1 "byte" "(@OC@|move)\\.\[wd\]" ] \ |
| 296 | [list vr 1 "byte" "(@OC@|move)\\.\[wd\]" ] \ |
| 297 | [list p4 4 "word" "(@OC@|move)\\.\[bd\]" ] \ |
| 298 | [list p5 5 "word" "(@OC@|move)\\.\[bd\]" ] \ |
| 299 | [list ccr 5 "word" "(@OC@|move)\\.\[bd\]" ] \ |
| 300 | [list p6 6 "word" "(@OC@|move)\\.\[bd\]" ] \ |
| 301 | [list dcr0 6 "word" "(@OC@|move)\\.\[bd\]" ] \ |
| 302 | [list p7 7 "dword" "(@OC@|move)\\.\[bw\]" ] \ |
| 303 | [list dcr1 7 "dcr1" "(@OC@|move)\\.\[bd\]" ] \ |
| 304 | [list p8 8 "dword" "(@OC@|move)\\.\[bw\]" ] \ |
| 305 | [list p9 9 "dword" "(@OC@|move)\\.\[bw\]" ] \ |
| 306 | [list ibr 9 "dword" "(@OC@|move)\\.\[bw\]" ] \ |
| 307 | [list p10 10 "dword" "(@OC@|move)\\.\[bw\]" ] \ |
| 308 | [list irp 10 "dword" "(@OC@|move)\\.\[bw\]" ] \ |
| 309 | [list p11 11 "dword" "(@OC@|move)\\.\[bw\]" ] \ |
| 310 | [list srp 11 "dword" "(@OC@|move)\\.\[bw\]" ] \ |
| 311 | [list p12 12 "dword" "(@OC@|move)\\.\[bw\]" ] \ |
| 312 | [list bar 12 "dword" "(@OC@|move)\\.\[bw\]" ] \ |
| 313 | [list dtp0 12 "dword" "(@OC@|move)\\.\[bw\]" ] \ |
| 314 | [list p13 13 "dword" "(@OC@|move)\\.\[bw\]" ] \ |
| 315 | [list dccr 13 "dword" "(@OC@|move)\\.\[bw\]" ] \ |
| 316 | [list dtp1 13 "dword" "(@OC@|move)\\.\[bw\]" ] \ |
| 317 | [list p14 14 "dword" "(@OC@|move)\\.\[bw\]" ] \ |
| 318 | [list brp 14 "dword" "(@OC@|move)\\.\[bw\]" ] \ |
| 319 | [list p15 15 "dword" "(@OC@|move)\\.\[bw\]" ]] |
| 320 | |
| 321 | # Test basic instructions. Note that this will actually |
| 322 | # test both the assembler and the disassembler functionality. |
| 323 | #untested ".weak reduction" |
| 324 | #untested "Old regressions" |
| 325 | #untested "LX" |
| 326 | #untested "case recognition (disassembler)" |
| 327 | #untested "disassembling special regs" |
| 328 | #untested "disassembling unimplemented special regs" |
| 329 | |
| 330 | # *PLEASE* make new "simple" run_dump_test-tests match "rd-*.d", so |
| 331 | # they will be picked up automatically through this construct. This |
| 332 | # so you don't need to change cris.exp. (As perhaps should have been |
| 333 | # originally done for cases below, but which is not worth fixing now.) |
| 334 | set rd_test_list [lsort [glob -nocomplain $srcdir/$subdir/rd-*.d]] |
| 335 | for { set i 0 } { $i < [llength $rd_test_list] } { incr i } { |
| 336 | # We need to strip the ".d", but can leave the dirname. |
| 337 | verbose [file rootname [lindex $rd_test_list $i]] |
| 338 | run_dump_test [file rootname [lindex $rd_test_list $i]] |
| 339 | } |
| 340 | |
| 341 | # Broken word handling got erroneously triggers for this and |
| 342 | # got out-of-bounds errors. |
| 343 | # FIXME: Check closer that this gets the expected results and fix |
| 344 | # the general use of difference-expressions in binop.s and elsewhere. |
| 345 | gas_test "binop-segref.s" "" "" "False broken words" |
| 346 | |
| 347 | # Really orthogonal instructions. |
| 348 | test_template_insn_reg_mem binop add 60 a0 "@OC@\[^\\.\]" "" 60 a0 |
| 349 | test_template_insn_reg_mem binop sub 68 a8 "@OC@\[^\\.\]" "" 60 a0 |
| 350 | test_template_insn_reg_mem binop bound 5c 9c "@OC@\[^\\.\]" "" 60 a0 |
| 351 | test_template_insn_reg_mem binop and 70 b0 "@OC@\[^\\.\]" "" 60 a0 |
| 352 | test_template_insn_reg_mem binop or 74 b4 "@OC@\[^\\.\]" "" 60 a0 |
| 353 | |
| 354 | # Unary (two-operand) insns, otherwise as above. |
| 355 | test_template_insn_reg_mem binop cmp 6c ac \ |
| 356 | ",r\[0-9\]+,r\[0-9\]|@OC@\[^\\.\]" "binop-cmpmove" 64 a4 |
| 357 | # This is of course only the move-to-register one. |
| 358 | test_template_insn_reg_mem binop move 64 a4 \ |
| 359 | ",r\[0-9\]+,r\[0-9\]|@OC@\[^\\.\]" "binop-cmpmove" 64 a4 |
| 360 | |
| 361 | # No dword size - operations with sign- or zero-extend on |
| 362 | # the mem or reg operand. |
| 363 | test_template_insn_reg_mem binop addu 40 80 \ |
| 364 | "@\\.d|@OC@\[^\\.\]" "binop-extx" 40 80 |
| 365 | test_template_insn_reg_mem binop adds 42 82 \ |
| 366 | "@\\.d|@OC@\[^\\.\]" "binop-extx" 40 80 |
| 367 | test_template_insn_reg_mem binop subu 48 88 \ |
| 368 | "@\\.d|@OC@\[^\\.\]" "binop-extx" 40 80 |
| 369 | test_template_insn_reg_mem binop subs 4a 8a \ |
| 370 | "@\\.d|@OC@\[^\\.\]" "binop-extx" 40 80 |
| 371 | |
| 372 | # The two constraints above combined, and no reg-to-reg - |
| 373 | # cmps, cmpu, movs, movu. We have to test reg-to-reg |
| 374 | # separately for movs and movu. |
| 375 | test_template_insn_mem binop movs 86 \ |
| 376 | "r\[0-9\]+,r\[0-9\]+|@\\.d|@OC@\[^\\.\]" "binop-cmpmovx" 84 |
| 377 | test_template_insn_mem binop movu 84 \ |
| 378 | "r\[0-9\]+,r\[0-9\]+|@\\.d|@OC@\[^\\.\]" "binop-cmpmovx" 84 |
| 379 | test_template_insn_mem binop cmps 8e \ |
| 380 | "r\[0-9\]+,r\[0-9\]+|@\\.d|@OC@\[^\\.\]" "binop-cmpmovx" 84 |
| 381 | test_template_insn_mem binop cmpu 8c \ |
| 382 | "r\[0-9\]+,r\[0-9\]+|@\\.d|@OC@\[^\\.\]" "binop-cmpmovx" 84 |
| 383 | |
| 384 | # Reg-to-memory. FIXME: Perhaps we should use unop.s for |
| 385 | # everything, and insert registers (including special |
| 386 | # registers) for all reg-to-mem and mem-to-reg insn tests. |
| 387 | test_template_insn_mem binop move.b bc "@OC@\\." "reg-to-mem" bc |
| 388 | test_template_insn_mem binop move.w bd "@OC@\\." "reg-to-mem" bc |
| 389 | test_template_insn_mem binop move.d be "@OC@\\." "reg-to-mem" bc |
| 390 | test_template_insn_mem binop movem bf "@OC@\\." "reg-to-mem" bc |
| 391 | |
| 392 | # Use the replace-regex functionality to reverse the |
| 393 | # operands for movem. |
| 394 | test_template_insn_mem binop movem 00 "@OC@\\." "movem-to-reg" 00 \ |
| 395 | "@OC@ r(\[0-9\]+),\\\[(.*)\\\]" "@OC@ \[\\2\],r\\1" |
| 396 | |
| 397 | # The unary operations are too irregular to make a pattern |
| 398 | # of the output. |
| 399 | test_template_insn_single unop test "@OC@\[^\\.\]" "test" |
| 400 | test_template_insn_single unop clear "@OC@\[^\\.\]" "clear" |
| 401 | |
| 402 | # Quick-operand tests. |
| 403 | # |
| 404 | # Unsigned 5-bits: btstq, asrq, lslq, lsrq. |
| 405 | test_template_insn_reg quick btstq 38 "s6|u6" "quick-u5" 38 |
| 406 | test_template_insn_reg quick asrq 3a "s6|u6" "quick-u5" 38 |
| 407 | test_template_insn_reg quick lslq 3c "s6|u6" "quick-u5" 38 |
| 408 | test_template_insn_reg quick lsrq 3e "s6|u6" "quick-u5" 38 |
| 409 | |
| 410 | # Signed 6-bits: moveq, cmpq, andq, orq. |
| 411 | test_template_insn_reg quick moveq 24 "u6" "quick-s6" 24 |
| 412 | test_template_insn_reg quick cmpq 2c "u6" "quick-s6" 24 |
| 413 | test_template_insn_reg quick andq 30 "u6" "quick-s6" 24 |
| 414 | test_template_insn_reg quick orq 34 "u6" "quick-s6" 24 |
| 415 | |
| 416 | # Unsigned 6-bits: addq, subq. |
| 417 | test_template_insn_reg quick addq 20 "s6" "quick-u6" 20 |
| 418 | test_template_insn_reg quick subq 28 "s6" "quick-u6" 20 |
| 419 | |
| 420 | # Register-to-register instructions, for each size. |
| 421 | test_template_insn_reg regreg movu.b 44 "" "" 44 |
| 422 | test_template_insn_reg regreg movu.w 45 "" "" 44 |
| 423 | test_template_insn_reg regreg movs.b 46 "" "" 44 |
| 424 | test_template_insn_reg regreg movs.w 47 "" "" 44 |
| 425 | test_template_insn_reg regreg lsl.b 4c "" "" 44 |
| 426 | test_template_insn_reg regreg lsl.w 4d "" "" 44 |
| 427 | test_template_insn_reg regreg lsl.d 4e "" "" 44 |
| 428 | test_template_insn_reg regreg neg.b 58 "" "" 44 |
| 429 | test_template_insn_reg regreg neg.w 59 "" "" 44 |
| 430 | test_template_insn_reg regreg neg.d 5a "" "" 44 |
| 431 | test_template_insn_reg regreg asr.b 78 "" "" 44 |
| 432 | test_template_insn_reg regreg asr.w 79 "" "" 44 |
| 433 | test_template_insn_reg regreg asr.d 7a "" "" 44 |
| 434 | test_template_insn_reg regreg lsr.b 7c "" "" 44 |
| 435 | test_template_insn_reg regreg lsr.w 7d "" "" 44 |
| 436 | test_template_insn_reg regreg lsr.d 7e "" "" 44 |
| 437 | test_template_insn_reg regreg btst 4f "" "" 44 |
| 438 | test_template_insn_reg regreg abs 6b "" "" 44 |
| 439 | test_template_insn_reg regreg dstep 6f "" "" 44 |
| 440 | test_template_insn_reg regreg xor 7b "" "" 44 |
| 441 | test_template_insn_reg regreg mstep 7f "" "" 44 |
| 442 | |
| 443 | # The various incarnations of the swap(n) insn. |
| 444 | set nwbr_list [list [list "not" 877] \ |
| 445 | [list "swapw" 477] \ |
| 446 | [list "swapnw" c77] \ |
| 447 | [list "swapb" 277] \ |
| 448 | [list "swapnb" a77] \ |
| 449 | [list "swapwb" 677] \ |
| 450 | [list "swapnwb" e77] \ |
| 451 | [list "swapr" 177] \ |
| 452 | [list "swapnr" 977] \ |
| 453 | [list "swapwr" 577] \ |
| 454 | [list "swapnwr" d77] \ |
| 455 | [list "swapbr" 377] \ |
| 456 | [list "swapnbr" b77] \ |
| 457 | [list "swapwbr" 777] \ |
| 458 | [list "swapnwbr" f77]] |
| 459 | |
| 460 | for { set i 0 } { $i < [llength $nwbr_list] } { incr i } { |
| 461 | set name [lindex [lindex $nwbr_list $i] 0] |
| 462 | set number [lindex [lindex $nwbr_list $i] 1] |
| 463 | |
| 464 | test_template_insn_reg regreg $name $number "" "oneop-type" 877 \ |
| 465 | ",r\[0-9]+" "" $name |
| 466 | } |
| 467 | |
| 468 | # And one extra for the one that is canonicalized as "not". |
| 469 | test_template_insn_reg regreg swapn 877 "" "oneop-type" 877 \ |
| 470 | ",r\[0-9]+" "" not |
| 471 | |
| 472 | # And take the opportunity to make sure that the assembler |
| 473 | # recognizes StUDlYCaPs. |
| 474 | test_template_insn_reg regreg SWAPN 877 "" "oneop-type" 877 \ |
| 475 | ",r\[0-9]+" "" not |
| 476 | test_template_insn_reg regreg Swapn 877 "" "oneop-type" 877 \ |
| 477 | ",r\[0-9]+" "" not |
| 478 | test_template_insn_reg regreg sWApN 877 "" "oneop-type" 877 \ |
| 479 | ",r\[0-9]+" "" not |
| 480 | |
| 481 | # Fixed-size unary memory instructions. |
| 482 | test_template_insn_mem unop jsr b93 "@OC@\\." "jump-type" b93 |
| 483 | test_template_insn_mem unop jump 093 "@OC@\\." "jump-type" b93 |
| 484 | test_template_insn_mem unop jir a93 "@OC@\\." "jump-type" b93 |
| 485 | |
| 486 | # Non-templated tests. |
| 487 | run_dump_test "ccr" |
| 488 | run_dump_test "scc" |
| 489 | run_dump_test "pushpop" |
| 490 | run_dump_test "prefix" |
| 491 | run_dump_test "unimplemented" |
| 492 | run_dump_test "return" |
| 493 | run_dump_test "branch" |
| 494 | run_dump_test "separator" |
| 495 | run_dump_test "diffexp-ovwr" |
| 496 | run_dump_test "continue" |
| 497 | run_dump_test "nosep" |
| 498 | run_dump_test "labfloat" |
| 499 | run_dump_test "bork" |
| 500 | |
| 501 | # This seems like a generic expression evaluation problem. |
| 502 | setup_xfail "cris-*-*" |
| 503 | run_dump_test "shexpr-1" |
| 504 | |
| 505 | # The "@" will be erroneously interpreted as a line-separator in a |
| 506 | # macro here-label marker: "\@". |
| 507 | setup_xfail "cris-*-*" |
| 508 | run_dump_test "macroat" |
| 509 | |
| 510 | # "\x20a" will be recognized as "\n" rather than " a" |
| 511 | setup_xfail "cris-*-*" |
| 512 | run_dump_test "string-1" |
| 513 | # Same as above, but removed the failing case to make sure the rest |
| 514 | # still works. |
| 515 | run_dump_test "string-2" |
| 516 | |
| 517 | # Usable (non-redundant) and refreshed bits from the old, manual, |
| 518 | # test suite. |
| 519 | run_dump_test "brokw-1" |
| 520 | run_dump_test "brokw-2" |
| 521 | run_dump_test "brokw-3" |
| 522 | run_dump_test "fragtest" |
| 523 | |
| 524 | # Addi is too irregular to bother applying templates to. |
| 525 | run_dump_test "addi" |
| 526 | |
| 527 | # Test {mem (including constants), reg}-to/from-spec-reg. |
| 528 | do_spec_regs to_sreg $spec_reg_list |
| 529 | do_spec_regs sreg_to $spec_reg_list |
| 530 | do_spec_regs push_pop $spec_reg_list |
| 531 | |
| 532 | # Additional insns for CRIS v3: |
| 533 | run_dump_test "break" |
| 534 | test_template_insn_reg regreg lz 73 "" "" 44 |
| 535 | |
| 536 | # Additional insns for CRIS v8 (also the swapxxx insns other than "not" above). |
| 537 | test_template_insn_mem unop jirc 293 "@OC@\\." "jump-type" b93 |
| 538 | test_template_insn_mem unop jsrc 393 "@OC@\\." "jump-type" b93 |
| 539 | test_template_insn_mem unop jbrc 693 "@OC@\\." "jump-type" b93 |
| 540 | |
| 541 | # Additional insns for CRIS v10: |
| 542 | test_template_insn_reg regreg mulu.b 90 "" "" 44 |
| 543 | test_template_insn_reg regreg mulu.w 91 "" "" 44 |
| 544 | test_template_insn_reg regreg mulu.d 92 "" "" 44 |
| 545 | test_template_insn_reg regreg muls.b d0 "" "" 44 |
| 546 | test_template_insn_reg regreg muls.w d1 "" "" 44 |
| 547 | test_template_insn_reg regreg muls.d d2 "" "" 44 |
| 548 | test_template_insn_mem unop sbfs 3b7 "@OC@\\.| r\[0-9\]+$" "unop-mem" 3b7 |
| 549 | test_template_insn_mem unop rbf 3b3 "@OC@\\.| r\[0-9\]+$" "unop-mem" 3b7 |
| 550 | test_template_insn_mem unop jmpu 893 "@OC@\\.| r\[0-9\]+$" "unop-mem" 3b7 |
| 551 | |
| 552 | # Some dg-tests, which seems the easiest way to test error |
| 553 | # cases. Keeping it here at the end avoids getting a |
| 554 | # "Tcl_RegisterChannel: duplicate channel names" error, and |
| 555 | # I don't see a cause to put this in a separate file. Hey, |
| 556 | # isn't dg-finish supposed to make things (like this case) |
| 557 | # fine? |
| 558 | load_lib gas-dg.exp |
| 559 | dg-init |
| 560 | dg-runtest [lsort [glob -nocomplain $srcdir/$subdir/*-err-*.s $srcdir/$subdir/*-warn-*.s]] "" "" |
| 561 | dg-finish |
| 562 | } |