| 1 | # Check 32bit AVX512VL,VPCLMULQDQ instructions |
| 2 | |
| 3 | .allow_index_reg |
| 4 | .text |
| 5 | _start: |
| 6 | vpclmulqdq $0xab, %xmm2, %xmm2, %xmm3 # AVX512VL,VPCLMULQDQ |
| 7 | vpclmulqdq $123, -123456(%esp,%esi,8), %xmm2, %xmm3 # AVX512VL,VPCLMULQDQ |
| 8 | vpclmulqdq $123, 2032(%edx), %xmm2, %xmm3 # AVX512VL,VPCLMULQDQ Disp8 |
| 9 | vpclmulqdq $0xab, %ymm1, %ymm5, %ymm4 # AVX512VL,VPCLMULQDQ |
| 10 | vpclmulqdq $123, -123456(%esp,%esi,8), %ymm5, %ymm4 # AVX512VL,VPCLMULQDQ |
| 11 | vpclmulqdq $123, 4064(%edx), %ymm5, %ymm4 # AVX512VL,VPCLMULQDQ Disp8 |
| 12 | |
| 13 | {evex} vpclmulqdq $0xab, %xmm2, %xmm2, %xmm3 # AVX512VL,VPCLMULQDQ |
| 14 | {evex} vpclmulqdq $123, -123456(%esp,%esi,8), %xmm2, %xmm3 # AVX512VL,VPCLMULQDQ |
| 15 | {evex} vpclmulqdq $123, 2032(%edx), %xmm2, %xmm3 # AVX512VL,VPCLMULQDQ Disp8 |
| 16 | {evex} vpclmulqdq $0xab, %ymm1, %ymm5, %ymm4 # AVX512VL,VPCLMULQDQ |
| 17 | {evex} vpclmulqdq $123, -123456(%esp,%esi,8), %ymm5, %ymm4 # AVX512VL,VPCLMULQDQ |
| 18 | {evex} vpclmulqdq $123, 4064(%edx), %ymm5, %ymm4 # AVX512VL,VPCLMULQDQ Disp8 |
| 19 | |
| 20 | {evex} vpclmulhqhqdq %xmm2, %xmm3, %xmm4 |
| 21 | {evex} vpclmulhqlqdq %xmm3, %xmm4, %xmm5 |
| 22 | {evex} vpclmullqhqdq %xmm4, %xmm5, %xmm6 |
| 23 | {evex} vpclmullqlqdq %xmm5, %xmm6, %xmm7 |
| 24 | |
| 25 | {evex} vpclmulhqhqdq %ymm1, %ymm2, %ymm3 |
| 26 | {evex} vpclmulhqlqdq %ymm2, %ymm3, %ymm4 |
| 27 | {evex} vpclmullqhqdq %ymm3, %ymm4, %ymm5 |
| 28 | {evex} vpclmullqlqdq %ymm4, %ymm5, %ymm6 |
| 29 | |
| 30 | .intel_syntax noprefix |
| 31 | vpclmulqdq xmm3, xmm5, xmm3, 0xab # AVX512VL,VPCLMULQDQ |
| 32 | vpclmulqdq xmm3, xmm5, XMMWORD PTR [esp+esi*8-123456], 123 # AVX512VL,VPCLMULQDQ |
| 33 | vpclmulqdq xmm3, xmm5, XMMWORD PTR [edx+2032], 123 # AVX512VL,VPCLMULQDQ Disp8 |
| 34 | vpclmulqdq ymm2, ymm2, ymm2, 0xab # AVX512VL,VPCLMULQDQ |
| 35 | vpclmulqdq ymm2, ymm2, YMMWORD PTR [esp+esi*8-123456], 123 # AVX512VL,VPCLMULQDQ |
| 36 | vpclmulqdq ymm2, ymm2, YMMWORD PTR [edx+4064], 123 # AVX512VL,VPCLMULQDQ Disp8 |
| 37 | |
| 38 | {evex} vpclmulqdq xmm3, xmm5, xmm3, 0xab # AVX512VL,VPCLMULQDQ |
| 39 | {evex} vpclmulqdq xmm3, xmm5, XMMWORD PTR [esp+esi*8-123456], 123 # AVX512VL,VPCLMULQDQ |
| 40 | {evex} vpclmulqdq xmm3, xmm5, XMMWORD PTR [edx+2032], 123 # AVX512VL,VPCLMULQDQ Disp8 |
| 41 | {evex} vpclmulqdq ymm2, ymm2, ymm2, 0xab # AVX512VL,VPCLMULQDQ |
| 42 | {evex} vpclmulqdq ymm2, ymm2, YMMWORD PTR [esp+esi*8-123456], 123 # AVX512VL,VPCLMULQDQ |
| 43 | {evex} vpclmulqdq ymm2, ymm2, YMMWORD PTR [edx+4064], 123 # AVX512VL,VPCLMULQDQ Disp8 |