Use the existing instruction to determine the RISC-V breakpoint kind.
[deliverable/binutils-gdb.git] / gdb / amd64-tdep.h
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CommitLineData
1/* Target-dependent definitions for AMD64.
2
3 Copyright (C) 2001-2018 Free Software Foundation, Inc.
4 Contributed by Jiri Smid, SuSE Labs.
5
6 This file is part of GDB.
7
8 This program is free software; you can redistribute it and/or modify
9 it under the terms of the GNU General Public License as published by
10 the Free Software Foundation; either version 3 of the License, or
11 (at your option) any later version.
12
13 This program is distributed in the hope that it will be useful,
14 but WITHOUT ANY WARRANTY; without even the implied warranty of
15 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 GNU General Public License for more details.
17
18 You should have received a copy of the GNU General Public License
19 along with this program. If not, see <http://www.gnu.org/licenses/>. */
20
21#ifndef AMD64_TDEP_H
22#define AMD64_TDEP_H
23
24struct gdbarch;
25struct frame_info;
26struct regcache;
27
28#include "i386-tdep.h"
29
30/* Register numbers of various important registers. */
31
32enum amd64_regnum
33{
34 AMD64_RAX_REGNUM, /* %rax */
35 AMD64_RBX_REGNUM, /* %rbx */
36 AMD64_RCX_REGNUM, /* %rcx */
37 AMD64_RDX_REGNUM, /* %rdx */
38 AMD64_RSI_REGNUM, /* %rsi */
39 AMD64_RDI_REGNUM, /* %rdi */
40 AMD64_RBP_REGNUM, /* %rbp */
41 AMD64_RSP_REGNUM, /* %rsp */
42 AMD64_R8_REGNUM, /* %r8 */
43 AMD64_R9_REGNUM, /* %r9 */
44 AMD64_R10_REGNUM, /* %r10 */
45 AMD64_R11_REGNUM, /* %r11 */
46 AMD64_R12_REGNUM, /* %r12 */
47 AMD64_R13_REGNUM, /* %r13 */
48 AMD64_R14_REGNUM, /* %r14 */
49 AMD64_R15_REGNUM, /* %r15 */
50 AMD64_RIP_REGNUM, /* %rip */
51 AMD64_EFLAGS_REGNUM, /* %eflags */
52 AMD64_CS_REGNUM, /* %cs */
53 AMD64_SS_REGNUM, /* %ss */
54 AMD64_DS_REGNUM, /* %ds */
55 AMD64_ES_REGNUM, /* %es */
56 AMD64_FS_REGNUM, /* %fs */
57 AMD64_GS_REGNUM, /* %gs */
58 AMD64_ST0_REGNUM = 24, /* %st0 */
59 AMD64_ST1_REGNUM, /* %st1 */
60 AMD64_FCTRL_REGNUM = AMD64_ST0_REGNUM + 8,
61 AMD64_FSTAT_REGNUM = AMD64_ST0_REGNUM + 9,
62 AMD64_FTAG_REGNUM = AMD64_ST0_REGNUM + 10,
63 AMD64_XMM0_REGNUM = 40, /* %xmm0 */
64 AMD64_XMM1_REGNUM, /* %xmm1 */
65 AMD64_MXCSR_REGNUM = AMD64_XMM0_REGNUM + 16,
66 AMD64_YMM0H_REGNUM, /* %ymm0h */
67 AMD64_YMM15H_REGNUM = AMD64_YMM0H_REGNUM + 15,
68 AMD64_BND0R_REGNUM = AMD64_YMM15H_REGNUM + 1,
69 AMD64_BND3R_REGNUM = AMD64_BND0R_REGNUM + 3,
70 AMD64_BNDCFGU_REGNUM,
71 AMD64_BNDSTATUS_REGNUM,
72 AMD64_XMM16_REGNUM,
73 AMD64_XMM31_REGNUM = AMD64_XMM16_REGNUM + 15,
74 AMD64_YMM16H_REGNUM,
75 AMD64_YMM31H_REGNUM = AMD64_YMM16H_REGNUM + 15,
76 AMD64_K0_REGNUM,
77 AMD64_K7_REGNUM = AMD64_K0_REGNUM + 7,
78 AMD64_ZMM0H_REGNUM,
79 AMD64_ZMM31H_REGNUM = AMD64_ZMM0H_REGNUM + 31,
80 AMD64_PKRU_REGNUM,
81 AMD64_FSBASE_REGNUM,
82 AMD64_GSBASE_REGNUM
83};
84
85/* Number of general purpose registers. */
86#define AMD64_NUM_GREGS 24
87
88#define AMD64_NUM_REGS (AMD64_GSBASE_REGNUM + 1)
89
90extern struct displaced_step_closure *amd64_displaced_step_copy_insn
91 (struct gdbarch *gdbarch, CORE_ADDR from, CORE_ADDR to,
92 struct regcache *regs);
93extern void amd64_displaced_step_fixup (struct gdbarch *gdbarch,
94 struct displaced_step_closure *closure,
95 CORE_ADDR from, CORE_ADDR to,
96 struct regcache *regs);
97
98/* Initialize the ABI for amd64. Uses DEFAULT_TDESC as fallback
99 tdesc, if INFO does not specify one. */
100extern void amd64_init_abi (struct gdbarch_info info,
101 struct gdbarch *gdbarch,
102 const target_desc *default_tdesc);
103
104/* Initialize the ABI for x32. Uses DEFAULT_TDESC as fallback tdesc,
105 if INFO does not specify one. */
106extern void amd64_x32_init_abi (struct gdbarch_info info,
107 struct gdbarch *gdbarch,
108 const target_desc *default_tdesc);
109extern const struct target_desc *amd64_target_description (uint64_t xcr0,
110 bool segments);
111
112/* Fill register REGNUM in REGCACHE with the appropriate
113 floating-point or SSE register value from *FXSAVE. If REGNUM is
114 -1, do this for all registers. This function masks off any of the
115 reserved bits in *FXSAVE. */
116
117extern void amd64_supply_fxsave (struct regcache *regcache, int regnum,
118 const void *fxsave);
119
120/* Similar to amd64_supply_fxsave, but use XSAVE extended state. */
121extern void amd64_supply_xsave (struct regcache *regcache, int regnum,
122 const void *xsave);
123
124/* Fill register REGNUM (if it is a floating-point or SSE register) in
125 *FXSAVE with the value from REGCACHE. If REGNUM is -1, do this for
126 all registers. This function doesn't touch any of the reserved
127 bits in *FXSAVE. */
128
129extern void amd64_collect_fxsave (const struct regcache *regcache, int regnum,
130 void *fxsave);
131/* Similar to amd64_collect_fxsave, but use XSAVE extended state. */
132extern void amd64_collect_xsave (const struct regcache *regcache,
133 int regnum, void *xsave, int gcore);
134\f
135/* Floating-point register set. */
136extern const struct regset amd64_fpregset;
137
138/* Variables exported from amd64-linux-tdep.c. */
139extern int amd64_linux_gregset_reg_offset[];
140
141/* Variables exported from amd64-nbsd-tdep.c. */
142extern int amd64nbsd_r_reg_offset[];
143
144/* Variables exported from amd64-obsd-tdep.c. */
145extern int amd64obsd_r_reg_offset[];
146
147/* Variables exported from amd64-fbsd-tdep.c. */
148extern CORE_ADDR amd64fbsd_sigtramp_start_addr;
149extern CORE_ADDR amd64fbsd_sigtramp_end_addr;
150extern int amd64fbsd_sc_reg_offset[];
151
152#endif /* amd64-tdep.h */
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