| 1 | /* Common target dependent code for GDB on ARM systems. |
| 2 | Copyright (C) 2002-2015 Free Software Foundation, Inc. |
| 3 | |
| 4 | This file is part of GDB. |
| 5 | |
| 6 | This program is free software; you can redistribute it and/or modify |
| 7 | it under the terms of the GNU General Public License as published by |
| 8 | the Free Software Foundation; either version 3 of the License, or |
| 9 | (at your option) any later version. |
| 10 | |
| 11 | This program is distributed in the hope that it will be useful, |
| 12 | but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 13 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 14 | GNU General Public License for more details. |
| 15 | |
| 16 | You should have received a copy of the GNU General Public License |
| 17 | along with this program. If not, see <http://www.gnu.org/licenses/>. */ |
| 18 | |
| 19 | #ifndef ARM_H |
| 20 | #define ARM_H |
| 21 | |
| 22 | /* Register numbers of various important registers. */ |
| 23 | |
| 24 | enum gdb_regnum { |
| 25 | ARM_A1_REGNUM = 0, /* first integer-like argument */ |
| 26 | ARM_A4_REGNUM = 3, /* last integer-like argument */ |
| 27 | ARM_AP_REGNUM = 11, |
| 28 | ARM_IP_REGNUM = 12, |
| 29 | ARM_SP_REGNUM = 13, /* Contains address of top of stack */ |
| 30 | ARM_LR_REGNUM = 14, /* address to return to from a function call */ |
| 31 | ARM_PC_REGNUM = 15, /* Contains program counter */ |
| 32 | ARM_F0_REGNUM = 16, /* first floating point register */ |
| 33 | ARM_F3_REGNUM = 19, /* last floating point argument register */ |
| 34 | ARM_F7_REGNUM = 23, /* last floating point register */ |
| 35 | ARM_FPS_REGNUM = 24, /* floating point status register */ |
| 36 | ARM_PS_REGNUM = 25, /* Contains processor status */ |
| 37 | ARM_WR0_REGNUM, /* WMMX data registers. */ |
| 38 | ARM_WR15_REGNUM = ARM_WR0_REGNUM + 15, |
| 39 | ARM_WC0_REGNUM, /* WMMX control registers. */ |
| 40 | ARM_WCSSF_REGNUM = ARM_WC0_REGNUM + 2, |
| 41 | ARM_WCASF_REGNUM = ARM_WC0_REGNUM + 3, |
| 42 | ARM_WC7_REGNUM = ARM_WC0_REGNUM + 7, |
| 43 | ARM_WCGR0_REGNUM, /* WMMX general purpose registers. */ |
| 44 | ARM_WCGR3_REGNUM = ARM_WCGR0_REGNUM + 3, |
| 45 | ARM_WCGR7_REGNUM = ARM_WCGR0_REGNUM + 7, |
| 46 | ARM_D0_REGNUM, /* VFP double-precision registers. */ |
| 47 | ARM_D31_REGNUM = ARM_D0_REGNUM + 31, |
| 48 | ARM_FPSCR_REGNUM, |
| 49 | |
| 50 | ARM_NUM_REGS, |
| 51 | |
| 52 | /* Other useful registers. */ |
| 53 | ARM_FP_REGNUM = 11, /* Frame register in ARM code, if used. */ |
| 54 | THUMB_FP_REGNUM = 7, /* Frame register in Thumb code, if used. */ |
| 55 | ARM_NUM_ARG_REGS = 4, |
| 56 | ARM_LAST_ARG_REGNUM = ARM_A4_REGNUM, |
| 57 | ARM_NUM_FP_ARG_REGS = 4, |
| 58 | ARM_LAST_FP_ARG_REGNUM = ARM_F3_REGNUM |
| 59 | }; |
| 60 | |
| 61 | #endif |