| 1 | /* GNU/Linux on ARM native support. |
| 2 | Copyright (C) 1999-2018 Free Software Foundation, Inc. |
| 3 | |
| 4 | This file is part of GDB. |
| 5 | |
| 6 | This program is free software; you can redistribute it and/or modify |
| 7 | it under the terms of the GNU General Public License as published by |
| 8 | the Free Software Foundation; either version 3 of the License, or |
| 9 | (at your option) any later version. |
| 10 | |
| 11 | This program is distributed in the hope that it will be useful, |
| 12 | but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 13 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 14 | GNU General Public License for more details. |
| 15 | |
| 16 | You should have received a copy of the GNU General Public License |
| 17 | along with this program. If not, see <http://www.gnu.org/licenses/>. */ |
| 18 | |
| 19 | #include "defs.h" |
| 20 | #include "inferior.h" |
| 21 | #include "gdbcore.h" |
| 22 | #include "regcache.h" |
| 23 | #include "target.h" |
| 24 | #include "linux-nat.h" |
| 25 | #include "target-descriptions.h" |
| 26 | #include "auxv.h" |
| 27 | #include "observable.h" |
| 28 | #include "gdbthread.h" |
| 29 | |
| 30 | #include "arm-tdep.h" |
| 31 | #include "arm-linux-tdep.h" |
| 32 | #include "aarch32-linux-nat.h" |
| 33 | |
| 34 | #include <elf/common.h> |
| 35 | #include <sys/user.h> |
| 36 | #include "nat/gdb_ptrace.h" |
| 37 | #include <sys/utsname.h> |
| 38 | #include <sys/procfs.h> |
| 39 | |
| 40 | #include "nat/linux-ptrace.h" |
| 41 | |
| 42 | /* Prototypes for supply_gregset etc. */ |
| 43 | #include "gregset.h" |
| 44 | |
| 45 | /* Defines ps_err_e, struct ps_prochandle. */ |
| 46 | #include "gdb_proc_service.h" |
| 47 | |
| 48 | #ifndef PTRACE_GET_THREAD_AREA |
| 49 | #define PTRACE_GET_THREAD_AREA 22 |
| 50 | #endif |
| 51 | |
| 52 | #ifndef PTRACE_GETWMMXREGS |
| 53 | #define PTRACE_GETWMMXREGS 18 |
| 54 | #define PTRACE_SETWMMXREGS 19 |
| 55 | #endif |
| 56 | |
| 57 | #ifndef PTRACE_GETVFPREGS |
| 58 | #define PTRACE_GETVFPREGS 27 |
| 59 | #define PTRACE_SETVFPREGS 28 |
| 60 | #endif |
| 61 | |
| 62 | #ifndef PTRACE_GETHBPREGS |
| 63 | #define PTRACE_GETHBPREGS 29 |
| 64 | #define PTRACE_SETHBPREGS 30 |
| 65 | #endif |
| 66 | |
| 67 | extern int arm_apcs_32; |
| 68 | |
| 69 | /* Get the whole floating point state of the process and store it |
| 70 | into regcache. */ |
| 71 | |
| 72 | static void |
| 73 | fetch_fpregs (struct regcache *regcache) |
| 74 | { |
| 75 | int ret, regno, tid; |
| 76 | gdb_byte fp[ARM_LINUX_SIZEOF_NWFPE]; |
| 77 | |
| 78 | /* Get the thread id for the ptrace call. */ |
| 79 | tid = ptid_get_lwp (regcache_get_ptid (regcache)); |
| 80 | |
| 81 | /* Read the floating point state. */ |
| 82 | if (have_ptrace_getregset == TRIBOOL_TRUE) |
| 83 | { |
| 84 | struct iovec iov; |
| 85 | |
| 86 | iov.iov_base = &fp; |
| 87 | iov.iov_len = ARM_LINUX_SIZEOF_NWFPE; |
| 88 | |
| 89 | ret = ptrace (PTRACE_GETREGSET, tid, NT_FPREGSET, &iov); |
| 90 | } |
| 91 | else |
| 92 | ret = ptrace (PT_GETFPREGS, tid, 0, fp); |
| 93 | |
| 94 | if (ret < 0) |
| 95 | perror_with_name (_("Unable to fetch the floating point registers.")); |
| 96 | |
| 97 | /* Fetch fpsr. */ |
| 98 | regcache_raw_supply (regcache, ARM_FPS_REGNUM, |
| 99 | fp + NWFPE_FPSR_OFFSET); |
| 100 | |
| 101 | /* Fetch the floating point registers. */ |
| 102 | for (regno = ARM_F0_REGNUM; regno <= ARM_F7_REGNUM; regno++) |
| 103 | supply_nwfpe_register (regcache, regno, fp); |
| 104 | } |
| 105 | |
| 106 | /* Save the whole floating point state of the process using |
| 107 | the contents from regcache. */ |
| 108 | |
| 109 | static void |
| 110 | store_fpregs (const struct regcache *regcache) |
| 111 | { |
| 112 | int ret, regno, tid; |
| 113 | gdb_byte fp[ARM_LINUX_SIZEOF_NWFPE]; |
| 114 | |
| 115 | /* Get the thread id for the ptrace call. */ |
| 116 | tid = ptid_get_lwp (regcache_get_ptid (regcache)); |
| 117 | |
| 118 | /* Read the floating point state. */ |
| 119 | if (have_ptrace_getregset == TRIBOOL_TRUE) |
| 120 | { |
| 121 | elf_fpregset_t fpregs; |
| 122 | struct iovec iov; |
| 123 | |
| 124 | iov.iov_base = &fpregs; |
| 125 | iov.iov_len = sizeof (fpregs); |
| 126 | |
| 127 | ret = ptrace (PTRACE_GETREGSET, tid, NT_FPREGSET, &iov); |
| 128 | } |
| 129 | else |
| 130 | ret = ptrace (PT_GETFPREGS, tid, 0, fp); |
| 131 | |
| 132 | if (ret < 0) |
| 133 | perror_with_name (_("Unable to fetch the floating point registers.")); |
| 134 | |
| 135 | /* Store fpsr. */ |
| 136 | if (REG_VALID == regcache_register_status (regcache, ARM_FPS_REGNUM)) |
| 137 | regcache_raw_collect (regcache, ARM_FPS_REGNUM, fp + NWFPE_FPSR_OFFSET); |
| 138 | |
| 139 | /* Store the floating point registers. */ |
| 140 | for (regno = ARM_F0_REGNUM; regno <= ARM_F7_REGNUM; regno++) |
| 141 | if (REG_VALID == regcache_register_status (regcache, regno)) |
| 142 | collect_nwfpe_register (regcache, regno, fp); |
| 143 | |
| 144 | if (have_ptrace_getregset == TRIBOOL_TRUE) |
| 145 | { |
| 146 | struct iovec iov; |
| 147 | |
| 148 | iov.iov_base = &fp; |
| 149 | iov.iov_len = ARM_LINUX_SIZEOF_NWFPE; |
| 150 | |
| 151 | ret = ptrace (PTRACE_SETREGSET, tid, NT_FPREGSET, &iov); |
| 152 | } |
| 153 | else |
| 154 | ret = ptrace (PTRACE_SETFPREGS, tid, 0, fp); |
| 155 | |
| 156 | if (ret < 0) |
| 157 | perror_with_name (_("Unable to store floating point registers.")); |
| 158 | } |
| 159 | |
| 160 | /* Fetch all general registers of the process and store into |
| 161 | regcache. */ |
| 162 | |
| 163 | static void |
| 164 | fetch_regs (struct regcache *regcache) |
| 165 | { |
| 166 | int ret, regno, tid; |
| 167 | elf_gregset_t regs; |
| 168 | |
| 169 | /* Get the thread id for the ptrace call. */ |
| 170 | tid = ptid_get_lwp (regcache_get_ptid (regcache)); |
| 171 | |
| 172 | if (have_ptrace_getregset == TRIBOOL_TRUE) |
| 173 | { |
| 174 | struct iovec iov; |
| 175 | |
| 176 | iov.iov_base = ®s; |
| 177 | iov.iov_len = sizeof (regs); |
| 178 | |
| 179 | ret = ptrace (PTRACE_GETREGSET, tid, NT_PRSTATUS, &iov); |
| 180 | } |
| 181 | else |
| 182 | ret = ptrace (PTRACE_GETREGS, tid, 0, ®s); |
| 183 | |
| 184 | if (ret < 0) |
| 185 | perror_with_name (_("Unable to fetch general registers.")); |
| 186 | |
| 187 | aarch32_gp_regcache_supply (regcache, (uint32_t *) regs, arm_apcs_32); |
| 188 | } |
| 189 | |
| 190 | static void |
| 191 | store_regs (const struct regcache *regcache) |
| 192 | { |
| 193 | int ret, regno, tid; |
| 194 | elf_gregset_t regs; |
| 195 | |
| 196 | /* Get the thread id for the ptrace call. */ |
| 197 | tid = ptid_get_lwp (regcache_get_ptid (regcache)); |
| 198 | |
| 199 | /* Fetch the general registers. */ |
| 200 | if (have_ptrace_getregset == TRIBOOL_TRUE) |
| 201 | { |
| 202 | struct iovec iov; |
| 203 | |
| 204 | iov.iov_base = ®s; |
| 205 | iov.iov_len = sizeof (regs); |
| 206 | |
| 207 | ret = ptrace (PTRACE_GETREGSET, tid, NT_PRSTATUS, &iov); |
| 208 | } |
| 209 | else |
| 210 | ret = ptrace (PTRACE_GETREGS, tid, 0, ®s); |
| 211 | |
| 212 | if (ret < 0) |
| 213 | perror_with_name (_("Unable to fetch general registers.")); |
| 214 | |
| 215 | aarch32_gp_regcache_collect (regcache, (uint32_t *) regs, arm_apcs_32); |
| 216 | |
| 217 | if (have_ptrace_getregset == TRIBOOL_TRUE) |
| 218 | { |
| 219 | struct iovec iov; |
| 220 | |
| 221 | iov.iov_base = ®s; |
| 222 | iov.iov_len = sizeof (regs); |
| 223 | |
| 224 | ret = ptrace (PTRACE_SETREGSET, tid, NT_PRSTATUS, &iov); |
| 225 | } |
| 226 | else |
| 227 | ret = ptrace (PTRACE_SETREGS, tid, 0, ®s); |
| 228 | |
| 229 | if (ret < 0) |
| 230 | perror_with_name (_("Unable to store general registers.")); |
| 231 | } |
| 232 | |
| 233 | /* Fetch all WMMX registers of the process and store into |
| 234 | regcache. */ |
| 235 | |
| 236 | #define IWMMXT_REGS_SIZE (16 * 8 + 6 * 4) |
| 237 | |
| 238 | static void |
| 239 | fetch_wmmx_regs (struct regcache *regcache) |
| 240 | { |
| 241 | char regbuf[IWMMXT_REGS_SIZE]; |
| 242 | int ret, regno, tid; |
| 243 | |
| 244 | /* Get the thread id for the ptrace call. */ |
| 245 | tid = ptid_get_lwp (regcache_get_ptid (regcache)); |
| 246 | |
| 247 | ret = ptrace (PTRACE_GETWMMXREGS, tid, 0, regbuf); |
| 248 | if (ret < 0) |
| 249 | perror_with_name (_("Unable to fetch WMMX registers.")); |
| 250 | |
| 251 | for (regno = 0; regno < 16; regno++) |
| 252 | regcache_raw_supply (regcache, regno + ARM_WR0_REGNUM, |
| 253 | ®buf[regno * 8]); |
| 254 | |
| 255 | for (regno = 0; regno < 2; regno++) |
| 256 | regcache_raw_supply (regcache, regno + ARM_WCSSF_REGNUM, |
| 257 | ®buf[16 * 8 + regno * 4]); |
| 258 | |
| 259 | for (regno = 0; regno < 4; regno++) |
| 260 | regcache_raw_supply (regcache, regno + ARM_WCGR0_REGNUM, |
| 261 | ®buf[16 * 8 + 2 * 4 + regno * 4]); |
| 262 | } |
| 263 | |
| 264 | static void |
| 265 | store_wmmx_regs (const struct regcache *regcache) |
| 266 | { |
| 267 | char regbuf[IWMMXT_REGS_SIZE]; |
| 268 | int ret, regno, tid; |
| 269 | |
| 270 | /* Get the thread id for the ptrace call. */ |
| 271 | tid = ptid_get_lwp (regcache_get_ptid (regcache)); |
| 272 | |
| 273 | ret = ptrace (PTRACE_GETWMMXREGS, tid, 0, regbuf); |
| 274 | if (ret < 0) |
| 275 | perror_with_name (_("Unable to fetch WMMX registers.")); |
| 276 | |
| 277 | for (regno = 0; regno < 16; regno++) |
| 278 | if (REG_VALID == regcache_register_status (regcache, |
| 279 | regno + ARM_WR0_REGNUM)) |
| 280 | regcache_raw_collect (regcache, regno + ARM_WR0_REGNUM, |
| 281 | ®buf[regno * 8]); |
| 282 | |
| 283 | for (regno = 0; regno < 2; regno++) |
| 284 | if (REG_VALID == regcache_register_status (regcache, |
| 285 | regno + ARM_WCSSF_REGNUM)) |
| 286 | regcache_raw_collect (regcache, regno + ARM_WCSSF_REGNUM, |
| 287 | ®buf[16 * 8 + regno * 4]); |
| 288 | |
| 289 | for (regno = 0; regno < 4; regno++) |
| 290 | if (REG_VALID == regcache_register_status (regcache, |
| 291 | regno + ARM_WCGR0_REGNUM)) |
| 292 | regcache_raw_collect (regcache, regno + ARM_WCGR0_REGNUM, |
| 293 | ®buf[16 * 8 + 2 * 4 + regno * 4]); |
| 294 | |
| 295 | ret = ptrace (PTRACE_SETWMMXREGS, tid, 0, regbuf); |
| 296 | |
| 297 | if (ret < 0) |
| 298 | perror_with_name (_("Unable to store WMMX registers.")); |
| 299 | } |
| 300 | |
| 301 | static void |
| 302 | fetch_vfp_regs (struct regcache *regcache) |
| 303 | { |
| 304 | gdb_byte regbuf[VFP_REGS_SIZE]; |
| 305 | int ret, regno, tid; |
| 306 | struct gdbarch *gdbarch = regcache->arch (); |
| 307 | struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch); |
| 308 | |
| 309 | /* Get the thread id for the ptrace call. */ |
| 310 | tid = ptid_get_lwp (regcache_get_ptid (regcache)); |
| 311 | |
| 312 | if (have_ptrace_getregset == TRIBOOL_TRUE) |
| 313 | { |
| 314 | struct iovec iov; |
| 315 | |
| 316 | iov.iov_base = regbuf; |
| 317 | iov.iov_len = VFP_REGS_SIZE; |
| 318 | ret = ptrace (PTRACE_GETREGSET, tid, NT_ARM_VFP, &iov); |
| 319 | } |
| 320 | else |
| 321 | ret = ptrace (PTRACE_GETVFPREGS, tid, 0, regbuf); |
| 322 | |
| 323 | if (ret < 0) |
| 324 | perror_with_name (_("Unable to fetch VFP registers.")); |
| 325 | |
| 326 | aarch32_vfp_regcache_supply (regcache, regbuf, |
| 327 | tdep->vfp_register_count); |
| 328 | } |
| 329 | |
| 330 | static void |
| 331 | store_vfp_regs (const struct regcache *regcache) |
| 332 | { |
| 333 | gdb_byte regbuf[VFP_REGS_SIZE]; |
| 334 | int ret, regno, tid; |
| 335 | struct gdbarch *gdbarch = regcache->arch (); |
| 336 | struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch); |
| 337 | |
| 338 | /* Get the thread id for the ptrace call. */ |
| 339 | tid = ptid_get_lwp (regcache_get_ptid (regcache)); |
| 340 | |
| 341 | if (have_ptrace_getregset == TRIBOOL_TRUE) |
| 342 | { |
| 343 | struct iovec iov; |
| 344 | |
| 345 | iov.iov_base = regbuf; |
| 346 | iov.iov_len = VFP_REGS_SIZE; |
| 347 | ret = ptrace (PTRACE_GETREGSET, tid, NT_ARM_VFP, &iov); |
| 348 | } |
| 349 | else |
| 350 | ret = ptrace (PTRACE_GETVFPREGS, tid, 0, regbuf); |
| 351 | |
| 352 | if (ret < 0) |
| 353 | perror_with_name (_("Unable to fetch VFP registers (for update).")); |
| 354 | |
| 355 | aarch32_vfp_regcache_collect (regcache, regbuf, |
| 356 | tdep->vfp_register_count); |
| 357 | |
| 358 | if (have_ptrace_getregset == TRIBOOL_TRUE) |
| 359 | { |
| 360 | struct iovec iov; |
| 361 | |
| 362 | iov.iov_base = regbuf; |
| 363 | iov.iov_len = VFP_REGS_SIZE; |
| 364 | ret = ptrace (PTRACE_SETREGSET, tid, NT_ARM_VFP, &iov); |
| 365 | } |
| 366 | else |
| 367 | ret = ptrace (PTRACE_SETVFPREGS, tid, 0, regbuf); |
| 368 | |
| 369 | if (ret < 0) |
| 370 | perror_with_name (_("Unable to store VFP registers.")); |
| 371 | } |
| 372 | |
| 373 | /* Fetch registers from the child process. Fetch all registers if |
| 374 | regno == -1, otherwise fetch all general registers or all floating |
| 375 | point registers depending upon the value of regno. */ |
| 376 | |
| 377 | static void |
| 378 | arm_linux_fetch_inferior_registers (struct target_ops *ops, |
| 379 | struct regcache *regcache, int regno) |
| 380 | { |
| 381 | struct gdbarch *gdbarch = regcache->arch (); |
| 382 | struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch); |
| 383 | |
| 384 | if (-1 == regno) |
| 385 | { |
| 386 | fetch_regs (regcache); |
| 387 | if (tdep->have_wmmx_registers) |
| 388 | fetch_wmmx_regs (regcache); |
| 389 | if (tdep->vfp_register_count > 0) |
| 390 | fetch_vfp_regs (regcache); |
| 391 | if (tdep->have_fpa_registers) |
| 392 | fetch_fpregs (regcache); |
| 393 | } |
| 394 | else |
| 395 | { |
| 396 | if (regno < ARM_F0_REGNUM || regno == ARM_PS_REGNUM) |
| 397 | fetch_regs (regcache); |
| 398 | else if (regno >= ARM_F0_REGNUM && regno <= ARM_FPS_REGNUM) |
| 399 | fetch_fpregs (regcache); |
| 400 | else if (tdep->have_wmmx_registers |
| 401 | && regno >= ARM_WR0_REGNUM && regno <= ARM_WCGR7_REGNUM) |
| 402 | fetch_wmmx_regs (regcache); |
| 403 | else if (tdep->vfp_register_count > 0 |
| 404 | && regno >= ARM_D0_REGNUM |
| 405 | && (regno < ARM_D0_REGNUM + tdep->vfp_register_count |
| 406 | || regno == ARM_FPSCR_REGNUM)) |
| 407 | fetch_vfp_regs (regcache); |
| 408 | } |
| 409 | } |
| 410 | |
| 411 | /* Store registers back into the inferior. Store all registers if |
| 412 | regno == -1, otherwise store all general registers or all floating |
| 413 | point registers depending upon the value of regno. */ |
| 414 | |
| 415 | static void |
| 416 | arm_linux_store_inferior_registers (struct target_ops *ops, |
| 417 | struct regcache *regcache, int regno) |
| 418 | { |
| 419 | struct gdbarch *gdbarch = regcache->arch (); |
| 420 | struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch); |
| 421 | |
| 422 | if (-1 == regno) |
| 423 | { |
| 424 | store_regs (regcache); |
| 425 | if (tdep->have_wmmx_registers) |
| 426 | store_wmmx_regs (regcache); |
| 427 | if (tdep->vfp_register_count > 0) |
| 428 | store_vfp_regs (regcache); |
| 429 | if (tdep->have_fpa_registers) |
| 430 | store_fpregs (regcache); |
| 431 | } |
| 432 | else |
| 433 | { |
| 434 | if (regno < ARM_F0_REGNUM || regno == ARM_PS_REGNUM) |
| 435 | store_regs (regcache); |
| 436 | else if ((regno >= ARM_F0_REGNUM) && (regno <= ARM_FPS_REGNUM)) |
| 437 | store_fpregs (regcache); |
| 438 | else if (tdep->have_wmmx_registers |
| 439 | && regno >= ARM_WR0_REGNUM && regno <= ARM_WCGR7_REGNUM) |
| 440 | store_wmmx_regs (regcache); |
| 441 | else if (tdep->vfp_register_count > 0 |
| 442 | && regno >= ARM_D0_REGNUM |
| 443 | && (regno < ARM_D0_REGNUM + tdep->vfp_register_count |
| 444 | || regno == ARM_FPSCR_REGNUM)) |
| 445 | store_vfp_regs (regcache); |
| 446 | } |
| 447 | } |
| 448 | |
| 449 | /* Wrapper functions for the standard regset handling, used by |
| 450 | thread debugging. */ |
| 451 | |
| 452 | void |
| 453 | fill_gregset (const struct regcache *regcache, |
| 454 | gdb_gregset_t *gregsetp, int regno) |
| 455 | { |
| 456 | arm_linux_collect_gregset (NULL, regcache, regno, gregsetp, 0); |
| 457 | } |
| 458 | |
| 459 | void |
| 460 | supply_gregset (struct regcache *regcache, const gdb_gregset_t *gregsetp) |
| 461 | { |
| 462 | arm_linux_supply_gregset (NULL, regcache, -1, gregsetp, 0); |
| 463 | } |
| 464 | |
| 465 | void |
| 466 | fill_fpregset (const struct regcache *regcache, |
| 467 | gdb_fpregset_t *fpregsetp, int regno) |
| 468 | { |
| 469 | arm_linux_collect_nwfpe (NULL, regcache, regno, fpregsetp, 0); |
| 470 | } |
| 471 | |
| 472 | /* Fill GDB's register array with the floating-point register values |
| 473 | in *fpregsetp. */ |
| 474 | |
| 475 | void |
| 476 | supply_fpregset (struct regcache *regcache, const gdb_fpregset_t *fpregsetp) |
| 477 | { |
| 478 | arm_linux_supply_nwfpe (NULL, regcache, -1, fpregsetp, 0); |
| 479 | } |
| 480 | |
| 481 | /* Fetch the thread-local storage pointer for libthread_db. */ |
| 482 | |
| 483 | ps_err_e |
| 484 | ps_get_thread_area (struct ps_prochandle *ph, |
| 485 | lwpid_t lwpid, int idx, void **base) |
| 486 | { |
| 487 | if (ptrace (PTRACE_GET_THREAD_AREA, lwpid, NULL, base) != 0) |
| 488 | return PS_ERR; |
| 489 | |
| 490 | /* IDX is the bias from the thread pointer to the beginning of the |
| 491 | thread descriptor. It has to be subtracted due to implementation |
| 492 | quirks in libthread_db. */ |
| 493 | *base = (void *) ((char *)*base - idx); |
| 494 | |
| 495 | return PS_OK; |
| 496 | } |
| 497 | |
| 498 | static const struct target_desc * |
| 499 | arm_linux_read_description (struct target_ops *ops) |
| 500 | { |
| 501 | CORE_ADDR arm_hwcap = 0; |
| 502 | |
| 503 | if (have_ptrace_getregset == TRIBOOL_UNKNOWN) |
| 504 | { |
| 505 | elf_gregset_t gpregs; |
| 506 | struct iovec iov; |
| 507 | int tid = ptid_get_lwp (inferior_ptid); |
| 508 | |
| 509 | iov.iov_base = &gpregs; |
| 510 | iov.iov_len = sizeof (gpregs); |
| 511 | |
| 512 | /* Check if PTRACE_GETREGSET works. */ |
| 513 | if (ptrace (PTRACE_GETREGSET, tid, NT_PRSTATUS, &iov) < 0) |
| 514 | have_ptrace_getregset = TRIBOOL_FALSE; |
| 515 | else |
| 516 | have_ptrace_getregset = TRIBOOL_TRUE; |
| 517 | } |
| 518 | |
| 519 | if (target_auxv_search (ops, AT_HWCAP, &arm_hwcap) != 1) |
| 520 | { |
| 521 | return ops->beneath->to_read_description (ops->beneath); |
| 522 | } |
| 523 | |
| 524 | if (arm_hwcap & HWCAP_IWMMXT) |
| 525 | return tdesc_arm_with_iwmmxt; |
| 526 | |
| 527 | if (arm_hwcap & HWCAP_VFP) |
| 528 | { |
| 529 | int pid; |
| 530 | char *buf; |
| 531 | const struct target_desc * result = NULL; |
| 532 | |
| 533 | /* NEON implies VFPv3-D32 or no-VFP unit. Say that we only support |
| 534 | Neon with VFPv3-D32. */ |
| 535 | if (arm_hwcap & HWCAP_NEON) |
| 536 | result = tdesc_arm_with_neon; |
| 537 | else if ((arm_hwcap & (HWCAP_VFPv3 | HWCAP_VFPv3D16)) == HWCAP_VFPv3) |
| 538 | result = tdesc_arm_with_vfpv3; |
| 539 | else |
| 540 | result = tdesc_arm_with_vfpv2; |
| 541 | |
| 542 | /* Now make sure that the kernel supports reading these |
| 543 | registers. Support was added in 2.6.30. */ |
| 544 | pid = ptid_get_lwp (inferior_ptid); |
| 545 | errno = 0; |
| 546 | buf = (char *) alloca (VFP_REGS_SIZE); |
| 547 | if (ptrace (PTRACE_GETVFPREGS, pid, 0, buf) < 0 |
| 548 | && errno == EIO) |
| 549 | result = NULL; |
| 550 | |
| 551 | return result; |
| 552 | } |
| 553 | |
| 554 | return ops->beneath->to_read_description (ops->beneath); |
| 555 | } |
| 556 | |
| 557 | /* Information describing the hardware breakpoint capabilities. */ |
| 558 | struct arm_linux_hwbp_cap |
| 559 | { |
| 560 | gdb_byte arch; |
| 561 | gdb_byte max_wp_length; |
| 562 | gdb_byte wp_count; |
| 563 | gdb_byte bp_count; |
| 564 | }; |
| 565 | |
| 566 | /* Since we cannot dynamically allocate subfields of arm_linux_process_info, |
| 567 | assume a maximum number of supported break-/watchpoints. */ |
| 568 | #define MAX_BPTS 16 |
| 569 | #define MAX_WPTS 16 |
| 570 | |
| 571 | /* Get hold of the Hardware Breakpoint information for the target we are |
| 572 | attached to. Returns NULL if the kernel doesn't support Hardware |
| 573 | breakpoints at all, or a pointer to the information structure. */ |
| 574 | static const struct arm_linux_hwbp_cap * |
| 575 | arm_linux_get_hwbp_cap (void) |
| 576 | { |
| 577 | /* The info structure we return. */ |
| 578 | static struct arm_linux_hwbp_cap info; |
| 579 | |
| 580 | /* Is INFO in a good state? -1 means that no attempt has been made to |
| 581 | initialize INFO; 0 means an attempt has been made, but it failed; 1 |
| 582 | means INFO is in an initialized state. */ |
| 583 | static int available = -1; |
| 584 | |
| 585 | if (available == -1) |
| 586 | { |
| 587 | int tid; |
| 588 | unsigned int val; |
| 589 | |
| 590 | tid = ptid_get_lwp (inferior_ptid); |
| 591 | if (ptrace (PTRACE_GETHBPREGS, tid, 0, &val) < 0) |
| 592 | available = 0; |
| 593 | else |
| 594 | { |
| 595 | info.arch = (gdb_byte)((val >> 24) & 0xff); |
| 596 | info.max_wp_length = (gdb_byte)((val >> 16) & 0xff); |
| 597 | info.wp_count = (gdb_byte)((val >> 8) & 0xff); |
| 598 | info.bp_count = (gdb_byte)(val & 0xff); |
| 599 | |
| 600 | if (info.wp_count > MAX_WPTS) |
| 601 | { |
| 602 | warning (_("arm-linux-gdb supports %d hardware watchpoints but target \ |
| 603 | supports %d"), MAX_WPTS, info.wp_count); |
| 604 | info.wp_count = MAX_WPTS; |
| 605 | } |
| 606 | |
| 607 | if (info.bp_count > MAX_BPTS) |
| 608 | { |
| 609 | warning (_("arm-linux-gdb supports %d hardware breakpoints but target \ |
| 610 | supports %d"), MAX_BPTS, info.bp_count); |
| 611 | info.bp_count = MAX_BPTS; |
| 612 | } |
| 613 | available = (info.arch != 0); |
| 614 | } |
| 615 | } |
| 616 | |
| 617 | return available == 1 ? &info : NULL; |
| 618 | } |
| 619 | |
| 620 | /* How many hardware breakpoints are available? */ |
| 621 | static int |
| 622 | arm_linux_get_hw_breakpoint_count (void) |
| 623 | { |
| 624 | const struct arm_linux_hwbp_cap *cap = arm_linux_get_hwbp_cap (); |
| 625 | return cap != NULL ? cap->bp_count : 0; |
| 626 | } |
| 627 | |
| 628 | /* How many hardware watchpoints are available? */ |
| 629 | static int |
| 630 | arm_linux_get_hw_watchpoint_count (void) |
| 631 | { |
| 632 | const struct arm_linux_hwbp_cap *cap = arm_linux_get_hwbp_cap (); |
| 633 | return cap != NULL ? cap->wp_count : 0; |
| 634 | } |
| 635 | |
| 636 | /* Have we got a free break-/watch-point available for use? Returns -1 if |
| 637 | there is not an appropriate resource available, otherwise returns 1. */ |
| 638 | static int |
| 639 | arm_linux_can_use_hw_breakpoint (struct target_ops *self, |
| 640 | enum bptype type, |
| 641 | int cnt, int ot) |
| 642 | { |
| 643 | if (type == bp_hardware_watchpoint || type == bp_read_watchpoint |
| 644 | || type == bp_access_watchpoint || type == bp_watchpoint) |
| 645 | { |
| 646 | int count = arm_linux_get_hw_watchpoint_count (); |
| 647 | |
| 648 | if (count == 0) |
| 649 | return 0; |
| 650 | else if (cnt + ot > count) |
| 651 | return -1; |
| 652 | } |
| 653 | else if (type == bp_hardware_breakpoint) |
| 654 | { |
| 655 | int count = arm_linux_get_hw_breakpoint_count (); |
| 656 | |
| 657 | if (count == 0) |
| 658 | return 0; |
| 659 | else if (cnt > count) |
| 660 | return -1; |
| 661 | } |
| 662 | else |
| 663 | gdb_assert (FALSE); |
| 664 | |
| 665 | return 1; |
| 666 | } |
| 667 | |
| 668 | /* Enum describing the different types of ARM hardware break-/watch-points. */ |
| 669 | typedef enum |
| 670 | { |
| 671 | arm_hwbp_break = 0, |
| 672 | arm_hwbp_load = 1, |
| 673 | arm_hwbp_store = 2, |
| 674 | arm_hwbp_access = 3 |
| 675 | } arm_hwbp_type; |
| 676 | |
| 677 | /* Type describing an ARM Hardware Breakpoint Control register value. */ |
| 678 | typedef unsigned int arm_hwbp_control_t; |
| 679 | |
| 680 | /* Structure used to keep track of hardware break-/watch-points. */ |
| 681 | struct arm_linux_hw_breakpoint |
| 682 | { |
| 683 | /* Address to break on, or being watched. */ |
| 684 | unsigned int address; |
| 685 | /* Control register for break-/watch- point. */ |
| 686 | arm_hwbp_control_t control; |
| 687 | }; |
| 688 | |
| 689 | /* Structure containing arrays of per process hardware break-/watchpoints |
| 690 | for caching address and control information. |
| 691 | |
| 692 | The Linux ptrace interface to hardware break-/watch-points presents the |
| 693 | values in a vector centred around 0 (which is used fo generic information). |
| 694 | Positive indicies refer to breakpoint addresses/control registers, negative |
| 695 | indices to watchpoint addresses/control registers. |
| 696 | |
| 697 | The Linux vector is indexed as follows: |
| 698 | -((i << 1) + 2): Control register for watchpoint i. |
| 699 | -((i << 1) + 1): Address register for watchpoint i. |
| 700 | 0: Information register. |
| 701 | ((i << 1) + 1): Address register for breakpoint i. |
| 702 | ((i << 1) + 2): Control register for breakpoint i. |
| 703 | |
| 704 | This structure is used as a per-thread cache of the state stored by the |
| 705 | kernel, so that we don't need to keep calling into the kernel to find a |
| 706 | free breakpoint. |
| 707 | |
| 708 | We treat break-/watch-points with their enable bit clear as being deleted. |
| 709 | */ |
| 710 | struct arm_linux_debug_reg_state |
| 711 | { |
| 712 | /* Hardware breakpoints for this process. */ |
| 713 | struct arm_linux_hw_breakpoint bpts[MAX_BPTS]; |
| 714 | /* Hardware watchpoints for this process. */ |
| 715 | struct arm_linux_hw_breakpoint wpts[MAX_WPTS]; |
| 716 | }; |
| 717 | |
| 718 | /* Per-process arch-specific data we want to keep. */ |
| 719 | struct arm_linux_process_info |
| 720 | { |
| 721 | /* Linked list. */ |
| 722 | struct arm_linux_process_info *next; |
| 723 | /* The process identifier. */ |
| 724 | pid_t pid; |
| 725 | /* Hardware break-/watchpoints state information. */ |
| 726 | struct arm_linux_debug_reg_state state; |
| 727 | |
| 728 | }; |
| 729 | |
| 730 | /* Per-thread arch-specific data we want to keep. */ |
| 731 | struct arch_lwp_info |
| 732 | { |
| 733 | /* Non-zero if our copy differs from what's recorded in the thread. */ |
| 734 | char bpts_changed[MAX_BPTS]; |
| 735 | char wpts_changed[MAX_WPTS]; |
| 736 | }; |
| 737 | |
| 738 | static struct arm_linux_process_info *arm_linux_process_list = NULL; |
| 739 | |
| 740 | /* Find process data for process PID. */ |
| 741 | |
| 742 | static struct arm_linux_process_info * |
| 743 | arm_linux_find_process_pid (pid_t pid) |
| 744 | { |
| 745 | struct arm_linux_process_info *proc; |
| 746 | |
| 747 | for (proc = arm_linux_process_list; proc; proc = proc->next) |
| 748 | if (proc->pid == pid) |
| 749 | return proc; |
| 750 | |
| 751 | return NULL; |
| 752 | } |
| 753 | |
| 754 | /* Add process data for process PID. Returns newly allocated info |
| 755 | object. */ |
| 756 | |
| 757 | static struct arm_linux_process_info * |
| 758 | arm_linux_add_process (pid_t pid) |
| 759 | { |
| 760 | struct arm_linux_process_info *proc; |
| 761 | |
| 762 | proc = XCNEW (struct arm_linux_process_info); |
| 763 | proc->pid = pid; |
| 764 | |
| 765 | proc->next = arm_linux_process_list; |
| 766 | arm_linux_process_list = proc; |
| 767 | |
| 768 | return proc; |
| 769 | } |
| 770 | |
| 771 | /* Get data specific info for process PID, creating it if necessary. |
| 772 | Never returns NULL. */ |
| 773 | |
| 774 | static struct arm_linux_process_info * |
| 775 | arm_linux_process_info_get (pid_t pid) |
| 776 | { |
| 777 | struct arm_linux_process_info *proc; |
| 778 | |
| 779 | proc = arm_linux_find_process_pid (pid); |
| 780 | if (proc == NULL) |
| 781 | proc = arm_linux_add_process (pid); |
| 782 | |
| 783 | return proc; |
| 784 | } |
| 785 | |
| 786 | /* Called whenever GDB is no longer debugging process PID. It deletes |
| 787 | data structures that keep track of debug register state. */ |
| 788 | |
| 789 | static void |
| 790 | arm_linux_forget_process (pid_t pid) |
| 791 | { |
| 792 | struct arm_linux_process_info *proc, **proc_link; |
| 793 | |
| 794 | proc = arm_linux_process_list; |
| 795 | proc_link = &arm_linux_process_list; |
| 796 | |
| 797 | while (proc != NULL) |
| 798 | { |
| 799 | if (proc->pid == pid) |
| 800 | { |
| 801 | *proc_link = proc->next; |
| 802 | |
| 803 | xfree (proc); |
| 804 | return; |
| 805 | } |
| 806 | |
| 807 | proc_link = &proc->next; |
| 808 | proc = *proc_link; |
| 809 | } |
| 810 | } |
| 811 | |
| 812 | /* Get hardware break-/watchpoint state for process PID. */ |
| 813 | |
| 814 | static struct arm_linux_debug_reg_state * |
| 815 | arm_linux_get_debug_reg_state (pid_t pid) |
| 816 | { |
| 817 | return &arm_linux_process_info_get (pid)->state; |
| 818 | } |
| 819 | |
| 820 | /* Initialize an ARM hardware break-/watch-point control register value. |
| 821 | BYTE_ADDRESS_SELECT is the mask of bytes to trigger on; HWBP_TYPE is the |
| 822 | type of break-/watch-point; ENABLE indicates whether the point is enabled. |
| 823 | */ |
| 824 | static arm_hwbp_control_t |
| 825 | arm_hwbp_control_initialize (unsigned byte_address_select, |
| 826 | arm_hwbp_type hwbp_type, |
| 827 | int enable) |
| 828 | { |
| 829 | gdb_assert ((byte_address_select & ~0xffU) == 0); |
| 830 | gdb_assert (hwbp_type != arm_hwbp_break |
| 831 | || ((byte_address_select & 0xfU) != 0)); |
| 832 | |
| 833 | return (byte_address_select << 5) | (hwbp_type << 3) | (3 << 1) | enable; |
| 834 | } |
| 835 | |
| 836 | /* Does the breakpoint control value CONTROL have the enable bit set? */ |
| 837 | static int |
| 838 | arm_hwbp_control_is_enabled (arm_hwbp_control_t control) |
| 839 | { |
| 840 | return control & 0x1; |
| 841 | } |
| 842 | |
| 843 | /* Change a breakpoint control word so that it is in the disabled state. */ |
| 844 | static arm_hwbp_control_t |
| 845 | arm_hwbp_control_disable (arm_hwbp_control_t control) |
| 846 | { |
| 847 | return control & ~0x1; |
| 848 | } |
| 849 | |
| 850 | /* Initialise the hardware breakpoint structure P. The breakpoint will be |
| 851 | enabled, and will point to the placed address of BP_TGT. */ |
| 852 | static void |
| 853 | arm_linux_hw_breakpoint_initialize (struct gdbarch *gdbarch, |
| 854 | struct bp_target_info *bp_tgt, |
| 855 | struct arm_linux_hw_breakpoint *p) |
| 856 | { |
| 857 | unsigned mask; |
| 858 | CORE_ADDR address = bp_tgt->placed_address = bp_tgt->reqstd_address; |
| 859 | |
| 860 | /* We have to create a mask for the control register which says which bits |
| 861 | of the word pointed to by address to break on. */ |
| 862 | if (arm_pc_is_thumb (gdbarch, address)) |
| 863 | { |
| 864 | mask = 0x3; |
| 865 | address &= ~1; |
| 866 | } |
| 867 | else |
| 868 | { |
| 869 | mask = 0xf; |
| 870 | address &= ~3; |
| 871 | } |
| 872 | |
| 873 | p->address = (unsigned int) address; |
| 874 | p->control = arm_hwbp_control_initialize (mask, arm_hwbp_break, 1); |
| 875 | } |
| 876 | |
| 877 | /* Get the ARM hardware breakpoint type from the TYPE value we're |
| 878 | given when asked to set a watchpoint. */ |
| 879 | static arm_hwbp_type |
| 880 | arm_linux_get_hwbp_type (enum target_hw_bp_type type) |
| 881 | { |
| 882 | if (type == hw_read) |
| 883 | return arm_hwbp_load; |
| 884 | else if (type == hw_write) |
| 885 | return arm_hwbp_store; |
| 886 | else |
| 887 | return arm_hwbp_access; |
| 888 | } |
| 889 | |
| 890 | /* Initialize the hardware breakpoint structure P for a watchpoint at ADDR |
| 891 | to LEN. The type of watchpoint is given in RW. */ |
| 892 | static void |
| 893 | arm_linux_hw_watchpoint_initialize (CORE_ADDR addr, int len, |
| 894 | enum target_hw_bp_type type, |
| 895 | struct arm_linux_hw_breakpoint *p) |
| 896 | { |
| 897 | const struct arm_linux_hwbp_cap *cap = arm_linux_get_hwbp_cap (); |
| 898 | unsigned mask; |
| 899 | |
| 900 | gdb_assert (cap != NULL); |
| 901 | gdb_assert (cap->max_wp_length != 0); |
| 902 | |
| 903 | mask = (1 << len) - 1; |
| 904 | |
| 905 | p->address = (unsigned int) addr; |
| 906 | p->control = arm_hwbp_control_initialize (mask, |
| 907 | arm_linux_get_hwbp_type (type), 1); |
| 908 | } |
| 909 | |
| 910 | /* Are two break-/watch-points equal? */ |
| 911 | static int |
| 912 | arm_linux_hw_breakpoint_equal (const struct arm_linux_hw_breakpoint *p1, |
| 913 | const struct arm_linux_hw_breakpoint *p2) |
| 914 | { |
| 915 | return p1->address == p2->address && p1->control == p2->control; |
| 916 | } |
| 917 | |
| 918 | /* Callback to mark a watch-/breakpoint to be updated in all threads of |
| 919 | the current process. */ |
| 920 | |
| 921 | struct update_registers_data |
| 922 | { |
| 923 | int watch; |
| 924 | int index; |
| 925 | }; |
| 926 | |
| 927 | static int |
| 928 | update_registers_callback (struct lwp_info *lwp, void *arg) |
| 929 | { |
| 930 | struct update_registers_data *data = (struct update_registers_data *) arg; |
| 931 | |
| 932 | if (lwp->arch_private == NULL) |
| 933 | lwp->arch_private = XCNEW (struct arch_lwp_info); |
| 934 | |
| 935 | /* The actual update is done later just before resuming the lwp, |
| 936 | we just mark that the registers need updating. */ |
| 937 | if (data->watch) |
| 938 | lwp->arch_private->wpts_changed[data->index] = 1; |
| 939 | else |
| 940 | lwp->arch_private->bpts_changed[data->index] = 1; |
| 941 | |
| 942 | /* If the lwp isn't stopped, force it to momentarily pause, so |
| 943 | we can update its breakpoint registers. */ |
| 944 | if (!lwp->stopped) |
| 945 | linux_stop_lwp (lwp); |
| 946 | |
| 947 | return 0; |
| 948 | } |
| 949 | |
| 950 | /* Insert the hardware breakpoint (WATCHPOINT = 0) or watchpoint (WATCHPOINT |
| 951 | =1) BPT for thread TID. */ |
| 952 | static void |
| 953 | arm_linux_insert_hw_breakpoint1 (const struct arm_linux_hw_breakpoint* bpt, |
| 954 | int watchpoint) |
| 955 | { |
| 956 | int pid; |
| 957 | ptid_t pid_ptid; |
| 958 | gdb_byte count, i; |
| 959 | struct arm_linux_hw_breakpoint* bpts; |
| 960 | struct update_registers_data data; |
| 961 | |
| 962 | pid = ptid_get_pid (inferior_ptid); |
| 963 | pid_ptid = pid_to_ptid (pid); |
| 964 | |
| 965 | if (watchpoint) |
| 966 | { |
| 967 | count = arm_linux_get_hw_watchpoint_count (); |
| 968 | bpts = arm_linux_get_debug_reg_state (pid)->wpts; |
| 969 | } |
| 970 | else |
| 971 | { |
| 972 | count = arm_linux_get_hw_breakpoint_count (); |
| 973 | bpts = arm_linux_get_debug_reg_state (pid)->bpts; |
| 974 | } |
| 975 | |
| 976 | for (i = 0; i < count; ++i) |
| 977 | if (!arm_hwbp_control_is_enabled (bpts[i].control)) |
| 978 | { |
| 979 | data.watch = watchpoint; |
| 980 | data.index = i; |
| 981 | bpts[i] = *bpt; |
| 982 | iterate_over_lwps (pid_ptid, update_registers_callback, &data); |
| 983 | break; |
| 984 | } |
| 985 | |
| 986 | gdb_assert (i != count); |
| 987 | } |
| 988 | |
| 989 | /* Remove the hardware breakpoint (WATCHPOINT = 0) or watchpoint |
| 990 | (WATCHPOINT = 1) BPT for thread TID. */ |
| 991 | static void |
| 992 | arm_linux_remove_hw_breakpoint1 (const struct arm_linux_hw_breakpoint *bpt, |
| 993 | int watchpoint) |
| 994 | { |
| 995 | int pid; |
| 996 | gdb_byte count, i; |
| 997 | ptid_t pid_ptid; |
| 998 | struct arm_linux_hw_breakpoint* bpts; |
| 999 | struct update_registers_data data; |
| 1000 | |
| 1001 | pid = ptid_get_pid (inferior_ptid); |
| 1002 | pid_ptid = pid_to_ptid (pid); |
| 1003 | |
| 1004 | if (watchpoint) |
| 1005 | { |
| 1006 | count = arm_linux_get_hw_watchpoint_count (); |
| 1007 | bpts = arm_linux_get_debug_reg_state (pid)->wpts; |
| 1008 | } |
| 1009 | else |
| 1010 | { |
| 1011 | count = arm_linux_get_hw_breakpoint_count (); |
| 1012 | bpts = arm_linux_get_debug_reg_state (pid)->bpts; |
| 1013 | } |
| 1014 | |
| 1015 | for (i = 0; i < count; ++i) |
| 1016 | if (arm_linux_hw_breakpoint_equal (bpt, bpts + i)) |
| 1017 | { |
| 1018 | data.watch = watchpoint; |
| 1019 | data.index = i; |
| 1020 | bpts[i].control = arm_hwbp_control_disable (bpts[i].control); |
| 1021 | iterate_over_lwps (pid_ptid, update_registers_callback, &data); |
| 1022 | break; |
| 1023 | } |
| 1024 | |
| 1025 | gdb_assert (i != count); |
| 1026 | } |
| 1027 | |
| 1028 | /* Insert a Hardware breakpoint. */ |
| 1029 | static int |
| 1030 | arm_linux_insert_hw_breakpoint (struct target_ops *self, |
| 1031 | struct gdbarch *gdbarch, |
| 1032 | struct bp_target_info *bp_tgt) |
| 1033 | { |
| 1034 | struct lwp_info *lp; |
| 1035 | struct arm_linux_hw_breakpoint p; |
| 1036 | |
| 1037 | if (arm_linux_get_hw_breakpoint_count () == 0) |
| 1038 | return -1; |
| 1039 | |
| 1040 | arm_linux_hw_breakpoint_initialize (gdbarch, bp_tgt, &p); |
| 1041 | |
| 1042 | arm_linux_insert_hw_breakpoint1 (&p, 0); |
| 1043 | |
| 1044 | return 0; |
| 1045 | } |
| 1046 | |
| 1047 | /* Remove a hardware breakpoint. */ |
| 1048 | static int |
| 1049 | arm_linux_remove_hw_breakpoint (struct target_ops *self, |
| 1050 | struct gdbarch *gdbarch, |
| 1051 | struct bp_target_info *bp_tgt) |
| 1052 | { |
| 1053 | struct lwp_info *lp; |
| 1054 | struct arm_linux_hw_breakpoint p; |
| 1055 | |
| 1056 | if (arm_linux_get_hw_breakpoint_count () == 0) |
| 1057 | return -1; |
| 1058 | |
| 1059 | arm_linux_hw_breakpoint_initialize (gdbarch, bp_tgt, &p); |
| 1060 | |
| 1061 | arm_linux_remove_hw_breakpoint1 (&p, 0); |
| 1062 | |
| 1063 | return 0; |
| 1064 | } |
| 1065 | |
| 1066 | /* Are we able to use a hardware watchpoint for the LEN bytes starting at |
| 1067 | ADDR? */ |
| 1068 | static int |
| 1069 | arm_linux_region_ok_for_hw_watchpoint (struct target_ops *self, |
| 1070 | CORE_ADDR addr, int len) |
| 1071 | { |
| 1072 | const struct arm_linux_hwbp_cap *cap = arm_linux_get_hwbp_cap (); |
| 1073 | CORE_ADDR max_wp_length, aligned_addr; |
| 1074 | |
| 1075 | /* Can not set watchpoints for zero or negative lengths. */ |
| 1076 | if (len <= 0) |
| 1077 | return 0; |
| 1078 | |
| 1079 | /* Need to be able to use the ptrace interface. */ |
| 1080 | if (cap == NULL || cap->wp_count == 0) |
| 1081 | return 0; |
| 1082 | |
| 1083 | /* Test that the range [ADDR, ADDR + LEN) fits into the largest address |
| 1084 | range covered by a watchpoint. */ |
| 1085 | max_wp_length = (CORE_ADDR)cap->max_wp_length; |
| 1086 | aligned_addr = addr & ~(max_wp_length - 1); |
| 1087 | |
| 1088 | if (aligned_addr + max_wp_length < addr + len) |
| 1089 | return 0; |
| 1090 | |
| 1091 | /* The current ptrace interface can only handle watchpoints that are a |
| 1092 | power of 2. */ |
| 1093 | if ((len & (len - 1)) != 0) |
| 1094 | return 0; |
| 1095 | |
| 1096 | /* All tests passed so we must be able to set a watchpoint. */ |
| 1097 | return 1; |
| 1098 | } |
| 1099 | |
| 1100 | /* Insert a Hardware breakpoint. */ |
| 1101 | static int |
| 1102 | arm_linux_insert_watchpoint (struct target_ops *self, |
| 1103 | CORE_ADDR addr, int len, |
| 1104 | enum target_hw_bp_type rw, |
| 1105 | struct expression *cond) |
| 1106 | { |
| 1107 | struct lwp_info *lp; |
| 1108 | struct arm_linux_hw_breakpoint p; |
| 1109 | |
| 1110 | if (arm_linux_get_hw_watchpoint_count () == 0) |
| 1111 | return -1; |
| 1112 | |
| 1113 | arm_linux_hw_watchpoint_initialize (addr, len, rw, &p); |
| 1114 | |
| 1115 | arm_linux_insert_hw_breakpoint1 (&p, 1); |
| 1116 | |
| 1117 | return 0; |
| 1118 | } |
| 1119 | |
| 1120 | /* Remove a hardware breakpoint. */ |
| 1121 | static int |
| 1122 | arm_linux_remove_watchpoint (struct target_ops *self, CORE_ADDR addr, |
| 1123 | int len, enum target_hw_bp_type rw, |
| 1124 | struct expression *cond) |
| 1125 | { |
| 1126 | struct lwp_info *lp; |
| 1127 | struct arm_linux_hw_breakpoint p; |
| 1128 | |
| 1129 | if (arm_linux_get_hw_watchpoint_count () == 0) |
| 1130 | return -1; |
| 1131 | |
| 1132 | arm_linux_hw_watchpoint_initialize (addr, len, rw, &p); |
| 1133 | |
| 1134 | arm_linux_remove_hw_breakpoint1 (&p, 1); |
| 1135 | |
| 1136 | return 0; |
| 1137 | } |
| 1138 | |
| 1139 | /* What was the data address the target was stopped on accessing. */ |
| 1140 | static int |
| 1141 | arm_linux_stopped_data_address (struct target_ops *target, CORE_ADDR *addr_p) |
| 1142 | { |
| 1143 | siginfo_t siginfo; |
| 1144 | int slot; |
| 1145 | |
| 1146 | if (!linux_nat_get_siginfo (inferior_ptid, &siginfo)) |
| 1147 | return 0; |
| 1148 | |
| 1149 | /* This must be a hardware breakpoint. */ |
| 1150 | if (siginfo.si_signo != SIGTRAP |
| 1151 | || (siginfo.si_code & 0xffff) != 0x0004 /* TRAP_HWBKPT */) |
| 1152 | return 0; |
| 1153 | |
| 1154 | /* We must be able to set hardware watchpoints. */ |
| 1155 | if (arm_linux_get_hw_watchpoint_count () == 0) |
| 1156 | return 0; |
| 1157 | |
| 1158 | slot = siginfo.si_errno; |
| 1159 | |
| 1160 | /* If we are in a positive slot then we're looking at a breakpoint and not |
| 1161 | a watchpoint. */ |
| 1162 | if (slot >= 0) |
| 1163 | return 0; |
| 1164 | |
| 1165 | *addr_p = (CORE_ADDR) (uintptr_t) siginfo.si_addr; |
| 1166 | return 1; |
| 1167 | } |
| 1168 | |
| 1169 | /* Has the target been stopped by hitting a watchpoint? */ |
| 1170 | static int |
| 1171 | arm_linux_stopped_by_watchpoint (struct target_ops *ops) |
| 1172 | { |
| 1173 | CORE_ADDR addr; |
| 1174 | return arm_linux_stopped_data_address (ops, &addr); |
| 1175 | } |
| 1176 | |
| 1177 | static int |
| 1178 | arm_linux_watchpoint_addr_within_range (struct target_ops *target, |
| 1179 | CORE_ADDR addr, |
| 1180 | CORE_ADDR start, int length) |
| 1181 | { |
| 1182 | return start <= addr && start + length - 1 >= addr; |
| 1183 | } |
| 1184 | |
| 1185 | /* Handle thread creation. We need to copy the breakpoints and watchpoints |
| 1186 | in the parent thread to the child thread. */ |
| 1187 | static void |
| 1188 | arm_linux_new_thread (struct lwp_info *lp) |
| 1189 | { |
| 1190 | int i; |
| 1191 | struct arch_lwp_info *info = XCNEW (struct arch_lwp_info); |
| 1192 | |
| 1193 | /* Mark that all the hardware breakpoint/watchpoint register pairs |
| 1194 | for this thread need to be initialized. */ |
| 1195 | |
| 1196 | for (i = 0; i < MAX_BPTS; i++) |
| 1197 | { |
| 1198 | info->bpts_changed[i] = 1; |
| 1199 | info->wpts_changed[i] = 1; |
| 1200 | } |
| 1201 | |
| 1202 | lp->arch_private = info; |
| 1203 | } |
| 1204 | |
| 1205 | /* Function to call when a thread is being deleted. */ |
| 1206 | |
| 1207 | static void |
| 1208 | arm_linux_delete_thread (struct arch_lwp_info *arch_lwp) |
| 1209 | { |
| 1210 | xfree (arch_lwp); |
| 1211 | } |
| 1212 | |
| 1213 | /* Called when resuming a thread. |
| 1214 | The hardware debug registers are updated when there is any change. */ |
| 1215 | |
| 1216 | static void |
| 1217 | arm_linux_prepare_to_resume (struct lwp_info *lwp) |
| 1218 | { |
| 1219 | int pid, i; |
| 1220 | struct arm_linux_hw_breakpoint *bpts, *wpts; |
| 1221 | struct arch_lwp_info *arm_lwp_info = lwp->arch_private; |
| 1222 | |
| 1223 | pid = ptid_get_lwp (lwp->ptid); |
| 1224 | bpts = arm_linux_get_debug_reg_state (ptid_get_pid (lwp->ptid))->bpts; |
| 1225 | wpts = arm_linux_get_debug_reg_state (ptid_get_pid (lwp->ptid))->wpts; |
| 1226 | |
| 1227 | /* NULL means this is the main thread still going through the shell, |
| 1228 | or, no watchpoint has been set yet. In that case, there's |
| 1229 | nothing to do. */ |
| 1230 | if (arm_lwp_info == NULL) |
| 1231 | return; |
| 1232 | |
| 1233 | for (i = 0; i < arm_linux_get_hw_breakpoint_count (); i++) |
| 1234 | if (arm_lwp_info->bpts_changed[i]) |
| 1235 | { |
| 1236 | errno = 0; |
| 1237 | if (arm_hwbp_control_is_enabled (bpts[i].control)) |
| 1238 | if (ptrace (PTRACE_SETHBPREGS, pid, |
| 1239 | (PTRACE_TYPE_ARG3) ((i << 1) + 1), &bpts[i].address) < 0) |
| 1240 | perror_with_name (_("Unexpected error setting breakpoint")); |
| 1241 | |
| 1242 | if (bpts[i].control != 0) |
| 1243 | if (ptrace (PTRACE_SETHBPREGS, pid, |
| 1244 | (PTRACE_TYPE_ARG3) ((i << 1) + 2), &bpts[i].control) < 0) |
| 1245 | perror_with_name (_("Unexpected error setting breakpoint")); |
| 1246 | |
| 1247 | arm_lwp_info->bpts_changed[i] = 0; |
| 1248 | } |
| 1249 | |
| 1250 | for (i = 0; i < arm_linux_get_hw_watchpoint_count (); i++) |
| 1251 | if (arm_lwp_info->wpts_changed[i]) |
| 1252 | { |
| 1253 | errno = 0; |
| 1254 | if (arm_hwbp_control_is_enabled (wpts[i].control)) |
| 1255 | if (ptrace (PTRACE_SETHBPREGS, pid, |
| 1256 | (PTRACE_TYPE_ARG3) -((i << 1) + 1), &wpts[i].address) < 0) |
| 1257 | perror_with_name (_("Unexpected error setting watchpoint")); |
| 1258 | |
| 1259 | if (wpts[i].control != 0) |
| 1260 | if (ptrace (PTRACE_SETHBPREGS, pid, |
| 1261 | (PTRACE_TYPE_ARG3) -((i << 1) + 2), &wpts[i].control) < 0) |
| 1262 | perror_with_name (_("Unexpected error setting watchpoint")); |
| 1263 | |
| 1264 | arm_lwp_info->wpts_changed[i] = 0; |
| 1265 | } |
| 1266 | } |
| 1267 | |
| 1268 | /* linux_nat_new_fork hook. */ |
| 1269 | |
| 1270 | static void |
| 1271 | arm_linux_new_fork (struct lwp_info *parent, pid_t child_pid) |
| 1272 | { |
| 1273 | pid_t parent_pid; |
| 1274 | struct arm_linux_debug_reg_state *parent_state; |
| 1275 | struct arm_linux_debug_reg_state *child_state; |
| 1276 | |
| 1277 | /* NULL means no watchpoint has ever been set in the parent. In |
| 1278 | that case, there's nothing to do. */ |
| 1279 | if (parent->arch_private == NULL) |
| 1280 | return; |
| 1281 | |
| 1282 | /* GDB core assumes the child inherits the watchpoints/hw |
| 1283 | breakpoints of the parent, and will remove them all from the |
| 1284 | forked off process. Copy the debug registers mirrors into the |
| 1285 | new process so that all breakpoints and watchpoints can be |
| 1286 | removed together. */ |
| 1287 | |
| 1288 | parent_pid = ptid_get_pid (parent->ptid); |
| 1289 | parent_state = arm_linux_get_debug_reg_state (parent_pid); |
| 1290 | child_state = arm_linux_get_debug_reg_state (child_pid); |
| 1291 | *child_state = *parent_state; |
| 1292 | } |
| 1293 | |
| 1294 | void |
| 1295 | _initialize_arm_linux_nat (void) |
| 1296 | { |
| 1297 | struct target_ops *t; |
| 1298 | |
| 1299 | /* Fill in the generic GNU/Linux methods. */ |
| 1300 | t = linux_target (); |
| 1301 | |
| 1302 | /* Add our register access methods. */ |
| 1303 | t->to_fetch_registers = arm_linux_fetch_inferior_registers; |
| 1304 | t->to_store_registers = arm_linux_store_inferior_registers; |
| 1305 | |
| 1306 | /* Add our hardware breakpoint and watchpoint implementation. */ |
| 1307 | t->to_can_use_hw_breakpoint = arm_linux_can_use_hw_breakpoint; |
| 1308 | t->to_insert_hw_breakpoint = arm_linux_insert_hw_breakpoint; |
| 1309 | t->to_remove_hw_breakpoint = arm_linux_remove_hw_breakpoint; |
| 1310 | t->to_region_ok_for_hw_watchpoint = arm_linux_region_ok_for_hw_watchpoint; |
| 1311 | t->to_insert_watchpoint = arm_linux_insert_watchpoint; |
| 1312 | t->to_remove_watchpoint = arm_linux_remove_watchpoint; |
| 1313 | t->to_stopped_by_watchpoint = arm_linux_stopped_by_watchpoint; |
| 1314 | t->to_stopped_data_address = arm_linux_stopped_data_address; |
| 1315 | t->to_watchpoint_addr_within_range = arm_linux_watchpoint_addr_within_range; |
| 1316 | |
| 1317 | t->to_read_description = arm_linux_read_description; |
| 1318 | |
| 1319 | /* Register the target. */ |
| 1320 | linux_nat_add_target (t); |
| 1321 | |
| 1322 | /* Handle thread creation and exit. */ |
| 1323 | linux_nat_set_new_thread (t, arm_linux_new_thread); |
| 1324 | linux_nat_set_delete_thread (t, arm_linux_delete_thread); |
| 1325 | linux_nat_set_prepare_to_resume (t, arm_linux_prepare_to_resume); |
| 1326 | |
| 1327 | /* Handle process creation and exit. */ |
| 1328 | linux_nat_set_new_fork (t, arm_linux_new_fork); |
| 1329 | linux_nat_set_forget_process (t, arm_linux_forget_process); |
| 1330 | } |