| 1 | /* Definitions to target GDB to ARM targets. |
| 2 | Copyright 1986, 1987, 1988, 1989, 1991, 1993, 1994, 1995, 1996, 1997, |
| 3 | 1998, 1999, 2000 Free Software Foundation, Inc. |
| 4 | |
| 5 | This file is part of GDB. |
| 6 | |
| 7 | This program is free software; you can redistribute it and/or modify |
| 8 | it under the terms of the GNU General Public License as published by |
| 9 | the Free Software Foundation; either version 2 of the License, or |
| 10 | (at your option) any later version. |
| 11 | |
| 12 | This program is distributed in the hope that it will be useful, |
| 13 | but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 14 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 15 | GNU General Public License for more details. |
| 16 | |
| 17 | You should have received a copy of the GNU General Public License |
| 18 | along with this program; if not, write to the Free Software |
| 19 | Foundation, Inc., 59 Temple Place - Suite 330, |
| 20 | Boston, MA 02111-1307, USA. */ |
| 21 | |
| 22 | #ifndef TM_ARM_H |
| 23 | #define TM_ARM_H |
| 24 | |
| 25 | #include "regcache.h" |
| 26 | #include "floatformat.h" |
| 27 | |
| 28 | /* Forward declarations for prototypes. */ |
| 29 | struct type; |
| 30 | struct value; |
| 31 | |
| 32 | /* Target byte order on ARM defaults to selectable, and defaults to |
| 33 | little endian. */ |
| 34 | #define TARGET_BYTE_ORDER_SELECTABLE_P 1 |
| 35 | #define TARGET_BYTE_ORDER_DEFAULT BFD_ENDIAN_LITTLE |
| 36 | |
| 37 | /* IEEE format floating point. */ |
| 38 | #define IEEE_FLOAT (1) |
| 39 | #define TARGET_DOUBLE_FORMAT (target_byte_order == BIG_ENDIAN \ |
| 40 | ? &floatformat_ieee_double_big \ |
| 41 | : &floatformat_ieee_double_littlebyte_bigword) |
| 42 | |
| 43 | /* When reading symbols, we need to zap the low bit of the address, |
| 44 | which may be set to 1 for Thumb functions. */ |
| 45 | |
| 46 | #define SMASH_TEXT_ADDRESS(addr) ((addr) &= ~0x1) |
| 47 | |
| 48 | /* Remove useless bits from addresses in a running program. */ |
| 49 | |
| 50 | CORE_ADDR arm_addr_bits_remove (CORE_ADDR); |
| 51 | |
| 52 | #define ADDR_BITS_REMOVE(val) (arm_addr_bits_remove (val)) |
| 53 | |
| 54 | /* Offset from address of function to start of its code. Zero on most |
| 55 | machines. */ |
| 56 | |
| 57 | #define FUNCTION_START_OFFSET 0 |
| 58 | |
| 59 | /* Advance PC across any function entry prologue instructions to reach |
| 60 | some "real" code. */ |
| 61 | |
| 62 | extern CORE_ADDR arm_skip_prologue (CORE_ADDR pc); |
| 63 | |
| 64 | #define SKIP_PROLOGUE(pc) (arm_skip_prologue (pc)) |
| 65 | |
| 66 | /* Immediately after a function call, return the saved pc. Can't |
| 67 | always go through the frames for this because on some machines the |
| 68 | new frame is not set up until the new function executes some |
| 69 | instructions. */ |
| 70 | |
| 71 | #define SAVED_PC_AFTER_CALL(frame) arm_saved_pc_after_call (frame) |
| 72 | struct frame_info; |
| 73 | extern CORE_ADDR arm_saved_pc_after_call (struct frame_info *); |
| 74 | |
| 75 | /* The following define instruction sequences that will cause ARM |
| 76 | cpu's to take an undefined instruction trap. These are used to |
| 77 | signal a breakpoint to GDB. |
| 78 | |
| 79 | The newer ARMv4T cpu's are capable of operating in ARM or Thumb |
| 80 | modes. A different instruction is required for each mode. The ARM |
| 81 | cpu's can also be big or little endian. Thus four different |
| 82 | instructions are needed to support all cases. |
| 83 | |
| 84 | Note: ARMv4 defines several new instructions that will take the |
| 85 | undefined instruction trap. ARM7TDMI is nominally ARMv4T, but does |
| 86 | not in fact add the new instructions. The new undefined |
| 87 | instructions in ARMv4 are all instructions that had no defined |
| 88 | behaviour in earlier chips. There is no guarantee that they will |
| 89 | raise an exception, but may be treated as NOP's. In practice, it |
| 90 | may only safe to rely on instructions matching: |
| 91 | |
| 92 | 3 3 2 2 2 2 2 2 2 2 2 2 1 1 1 1 1 1 1 1 1 1 |
| 93 | 1 0 9 8 7 6 5 4 3 2 1 0 9 8 7 6 5 4 3 2 1 0 9 8 7 6 5 4 3 2 1 0 |
| 94 | C C C C 0 1 1 x x x x x x x x x x x x x x x x x x x x 1 x x x x |
| 95 | |
| 96 | Even this may only true if the condition predicate is true. The |
| 97 | following use a condition predicate of ALWAYS so it is always TRUE. |
| 98 | |
| 99 | There are other ways of forcing a breakpoint. ARM Linux, RisciX, |
| 100 | and I suspect NetBSD will all use a software interrupt rather than |
| 101 | an undefined instruction to force a trap. This can be handled by |
| 102 | redefining some or all of the following in a target dependent |
| 103 | fashion. */ |
| 104 | |
| 105 | #define ARM_LE_BREAKPOINT {0xFE,0xDE,0xFF,0xE7} |
| 106 | #define ARM_BE_BREAKPOINT {0xE7,0xFF,0xDE,0xFE} |
| 107 | #define THUMB_LE_BREAKPOINT {0xfe,0xdf} |
| 108 | #define THUMB_BE_BREAKPOINT {0xdf,0xfe} |
| 109 | |
| 110 | /* Stack grows downward. */ |
| 111 | |
| 112 | #define INNER_THAN(lhs,rhs) ((lhs) < (rhs)) |
| 113 | |
| 114 | /* !!!! if we're using RDP, then we're inserting breakpoints and |
| 115 | storing their handles instread of what was in memory. It is nice |
| 116 | that this is the same size as a handle - otherwise remote-rdp will |
| 117 | have to change. */ |
| 118 | |
| 119 | /* BREAKPOINT_FROM_PC uses the program counter value to determine |
| 120 | whether a 16- or 32-bit breakpoint should be used. It returns a |
| 121 | pointer to a string of bytes that encode a breakpoint instruction, |
| 122 | stores the length of the string to *lenptr, and adjusts the pc (if |
| 123 | necessary) to point to the actual memory location where the |
| 124 | breakpoint should be inserted. */ |
| 125 | |
| 126 | extern breakpoint_from_pc_fn arm_breakpoint_from_pc; |
| 127 | #define BREAKPOINT_FROM_PC(pcptr, lenptr) arm_breakpoint_from_pc (pcptr, lenptr) |
| 128 | |
| 129 | /* Amount PC must be decremented by after a breakpoint. This is often |
| 130 | the number of bytes in BREAKPOINT but not always. */ |
| 131 | |
| 132 | #define DECR_PC_AFTER_BREAK 0 |
| 133 | |
| 134 | /* Code to execute to print interesting information about the floating |
| 135 | point processor (if any) or emulator. No need to define if there |
| 136 | is nothing to do. */ |
| 137 | extern void arm_float_info (void); |
| 138 | |
| 139 | #define FLOAT_INFO { arm_float_info (); } |
| 140 | |
| 141 | /* Say how long (ordinary) registers are. This is a piece of bogosity |
| 142 | used in push_word and a few other places; REGISTER_RAW_SIZE is the |
| 143 | real way to know how big a register is. */ |
| 144 | |
| 145 | #define REGISTER_SIZE 4 |
| 146 | |
| 147 | /* Say how long FP registers are. Used for documentation purposes and |
| 148 | code readability in this header. IEEE extended doubles are 80 |
| 149 | bits. DWORD aligned they use 96 bits. */ |
| 150 | #define FP_REGISTER_RAW_SIZE 12 |
| 151 | |
| 152 | /* GCC doesn't support long doubles (extended IEEE values). The FP |
| 153 | register virtual size is therefore 64 bits. Used for documentation |
| 154 | purposes and code readability in this header. */ |
| 155 | #define FP_REGISTER_VIRTUAL_SIZE 8 |
| 156 | |
| 157 | /* Status registers are the same size as general purpose registers. |
| 158 | Used for documentation purposes and code readability in this |
| 159 | header. */ |
| 160 | #define STATUS_REGISTER_SIZE REGISTER_SIZE |
| 161 | |
| 162 | /* Number of machine registers. The only define actually required |
| 163 | is NUM_REGS. The other definitions are used for documentation |
| 164 | purposes and code readability. */ |
| 165 | /* For 26 bit ARM code, a fake copy of the PC is placed in register 25 (PS) |
| 166 | (and called PS for processor status) so the status bits can be cleared |
| 167 | from the PC (register 15). For 32 bit ARM code, a copy of CPSR is placed |
| 168 | in PS. */ |
| 169 | #define NUM_FREGS 8 /* Number of floating point registers. */ |
| 170 | #define NUM_SREGS 2 /* Number of status registers. */ |
| 171 | #define NUM_GREGS 16 /* Number of general purpose registers. */ |
| 172 | #define NUM_REGS (NUM_GREGS + NUM_FREGS + NUM_SREGS) |
| 173 | |
| 174 | /* An array of names of registers. */ |
| 175 | extern char **arm_register_names; |
| 176 | |
| 177 | #define REGISTER_NAME(i) arm_register_names[i] |
| 178 | |
| 179 | /* Register numbers of various important registers. Note that some of |
| 180 | these values are "real" register numbers, and correspond to the |
| 181 | general registers of the machine, and some are "phony" register |
| 182 | numbers which are too large to be actual register numbers as far as |
| 183 | the user is concerned but do serve to get the desired values when |
| 184 | passed to read_register. */ |
| 185 | |
| 186 | #define A1_REGNUM 0 /* first integer-like argument */ |
| 187 | #define A4_REGNUM 3 /* last integer-like argument */ |
| 188 | #define AP_REGNUM 11 |
| 189 | #define FP_REGNUM 11 /* Contains address of executing stack frame */ |
| 190 | #define SP_REGNUM 13 /* Contains address of top of stack */ |
| 191 | #define LR_REGNUM 14 /* address to return to from a function call */ |
| 192 | #define PC_REGNUM 15 /* Contains program counter */ |
| 193 | #define F0_REGNUM 16 /* first floating point register */ |
| 194 | #define F3_REGNUM 19 /* last floating point argument register */ |
| 195 | #define F7_REGNUM 23 /* last floating point register */ |
| 196 | #define FPS_REGNUM 24 /* floating point status register */ |
| 197 | #define PS_REGNUM 25 /* Contains processor status */ |
| 198 | |
| 199 | #define THUMB_FP_REGNUM 7 /* R7 is frame register on Thumb */ |
| 200 | |
| 201 | #define ARM_NUM_ARG_REGS 4 |
| 202 | #define ARM_LAST_ARG_REGNUM A4_REGNUM |
| 203 | #define ARM_NUM_FP_ARG_REGS 4 |
| 204 | #define ARM_LAST_FP_ARG_REGNUM F3_REGNUM |
| 205 | |
| 206 | /* Instruction condition field values. */ |
| 207 | #define INST_EQ 0x0 |
| 208 | #define INST_NE 0x1 |
| 209 | #define INST_CS 0x2 |
| 210 | #define INST_CC 0x3 |
| 211 | #define INST_MI 0x4 |
| 212 | #define INST_PL 0x5 |
| 213 | #define INST_VS 0x6 |
| 214 | #define INST_VC 0x7 |
| 215 | #define INST_HI 0x8 |
| 216 | #define INST_LS 0x9 |
| 217 | #define INST_GE 0xa |
| 218 | #define INST_LT 0xb |
| 219 | #define INST_GT 0xc |
| 220 | #define INST_LE 0xd |
| 221 | #define INST_AL 0xe |
| 222 | #define INST_NV 0xf |
| 223 | |
| 224 | #define FLAG_N 0x80000000 |
| 225 | #define FLAG_Z 0x40000000 |
| 226 | #define FLAG_C 0x20000000 |
| 227 | #define FLAG_V 0x10000000 |
| 228 | |
| 229 | |
| 230 | |
| 231 | /* Total amount of space needed to store our copies of the machine's |
| 232 | register state, the array `registers'. */ |
| 233 | |
| 234 | #define REGISTER_BYTES ((NUM_GREGS * REGISTER_SIZE) + \ |
| 235 | (NUM_FREGS * FP_REGISTER_RAW_SIZE) + \ |
| 236 | (NUM_SREGS * STATUS_REGISTER_SIZE)) |
| 237 | |
| 238 | /* Index within `registers' of the first byte of the space for |
| 239 | register N. */ |
| 240 | |
| 241 | #define REGISTER_BYTE(N) \ |
| 242 | ((N) < F0_REGNUM \ |
| 243 | ? (N) * REGISTER_SIZE \ |
| 244 | : ((N) < PS_REGNUM \ |
| 245 | ? (NUM_GREGS * REGISTER_SIZE + \ |
| 246 | ((N) - F0_REGNUM) * FP_REGISTER_RAW_SIZE) \ |
| 247 | : (NUM_GREGS * REGISTER_SIZE + \ |
| 248 | NUM_FREGS * FP_REGISTER_RAW_SIZE + \ |
| 249 | ((N) - FPS_REGNUM) * STATUS_REGISTER_SIZE))) |
| 250 | |
| 251 | /* Number of bytes of storage in the actual machine representation for |
| 252 | register N. All registers are 4 bytes, except fp0 - fp7, which are |
| 253 | 12 bytes in length. */ |
| 254 | #define REGISTER_RAW_SIZE(N) \ |
| 255 | ((N) < F0_REGNUM ? REGISTER_SIZE : \ |
| 256 | (N) < FPS_REGNUM ? FP_REGISTER_RAW_SIZE : STATUS_REGISTER_SIZE) |
| 257 | |
| 258 | /* Number of bytes of storage in a program's representation |
| 259 | for register N. */ |
| 260 | #define REGISTER_VIRTUAL_SIZE(N) \ |
| 261 | ((N) < F0_REGNUM ? REGISTER_SIZE : \ |
| 262 | (N) < FPS_REGNUM ? FP_REGISTER_VIRTUAL_SIZE : STATUS_REGISTER_SIZE) |
| 263 | |
| 264 | /* Largest value REGISTER_RAW_SIZE can have. */ |
| 265 | |
| 266 | #define MAX_REGISTER_RAW_SIZE FP_REGISTER_RAW_SIZE |
| 267 | |
| 268 | /* Largest value REGISTER_VIRTUAL_SIZE can have. */ |
| 269 | #define MAX_REGISTER_VIRTUAL_SIZE FP_REGISTER_VIRTUAL_SIZE |
| 270 | |
| 271 | /* Return the GDB type object for the "standard" data type of data in |
| 272 | register N. */ |
| 273 | |
| 274 | extern struct type *arm_register_type (int regnum); |
| 275 | #define REGISTER_VIRTUAL_TYPE(N) arm_register_type (N) |
| 276 | |
| 277 | /* The system C compiler uses a similar structure return convention to gcc */ |
| 278 | extern use_struct_convention_fn arm_use_struct_convention; |
| 279 | #define USE_STRUCT_CONVENTION(gcc_p, type) \ |
| 280 | arm_use_struct_convention (gcc_p, type) |
| 281 | |
| 282 | /* Store the address of the place in which to copy the structure the |
| 283 | subroutine will return. This is called from call_function. */ |
| 284 | |
| 285 | #define STORE_STRUCT_RETURN(ADDR, SP) \ |
| 286 | write_register (A1_REGNUM, (ADDR)) |
| 287 | |
| 288 | /* Extract from an array REGBUF containing the (raw) register state a |
| 289 | function return value of type TYPE, and copy that, in virtual |
| 290 | format, into VALBUF. */ |
| 291 | |
| 292 | extern void arm_extract_return_value (struct type *, char[], char *); |
| 293 | #define EXTRACT_RETURN_VALUE(TYPE,REGBUF,VALBUF) \ |
| 294 | arm_extract_return_value ((TYPE), (REGBUF), (VALBUF)) |
| 295 | |
| 296 | /* Write into appropriate registers a function return value of type |
| 297 | TYPE, given in virtual format. */ |
| 298 | |
| 299 | extern void convert_to_extended (void *dbl, void *ptr); |
| 300 | #define STORE_RETURN_VALUE(TYPE,VALBUF) \ |
| 301 | if (TYPE_CODE (TYPE) == TYPE_CODE_FLT) { \ |
| 302 | char _buf[MAX_REGISTER_RAW_SIZE]; \ |
| 303 | convert_to_extended (VALBUF, _buf); \ |
| 304 | write_register_bytes (REGISTER_BYTE (F0_REGNUM), _buf, MAX_REGISTER_RAW_SIZE); \ |
| 305 | } else \ |
| 306 | write_register_bytes (0, VALBUF, TYPE_LENGTH (TYPE)) |
| 307 | |
| 308 | /* Extract from an array REGBUF containing the (raw) register state |
| 309 | the address in which a function should return its structure value, |
| 310 | as a CORE_ADDR (or an expression that can be used as one). */ |
| 311 | |
| 312 | #define EXTRACT_STRUCT_VALUE_ADDRESS(REGBUF) \ |
| 313 | (extract_address ((PTR)(REGBUF), REGISTER_RAW_SIZE(0))) |
| 314 | |
| 315 | /* Specify that for the native compiler variables for a particular |
| 316 | lexical context are listed after the beginning LBRAC instead of |
| 317 | before in the executables list of symbols. */ |
| 318 | #define VARIABLES_INSIDE_BLOCK(desc, gcc_p) (!(gcc_p)) |
| 319 | \f |
| 320 | |
| 321 | /* Define other aspects of the stack frame. We keep the offsets of |
| 322 | all saved registers, 'cause we need 'em a lot! We also keep the |
| 323 | current size of the stack frame, and the offset of the frame |
| 324 | pointer from the stack pointer (for frameless functions, and when |
| 325 | we're still in the prologue of a function with a frame) */ |
| 326 | |
| 327 | #define EXTRA_FRAME_INFO \ |
| 328 | struct frame_saved_regs fsr; \ |
| 329 | int framesize; \ |
| 330 | int frameoffset; \ |
| 331 | int framereg; |
| 332 | |
| 333 | extern void arm_init_extra_frame_info (int fromleaf, struct frame_info * fi); |
| 334 | #define INIT_EXTRA_FRAME_INFO(fromleaf, fi) \ |
| 335 | arm_init_extra_frame_info ((fromleaf), (fi)) |
| 336 | |
| 337 | /* Return the frame address. On ARM, it is R11; on Thumb it is R7. */ |
| 338 | CORE_ADDR arm_target_read_fp (void); |
| 339 | #define TARGET_READ_FP() arm_target_read_fp () |
| 340 | |
| 341 | /* Describe the pointer in each stack frame to the previous stack |
| 342 | frame (its caller). */ |
| 343 | |
| 344 | /* FRAME_CHAIN takes a frame's nominal address and produces the |
| 345 | frame's chain-pointer. |
| 346 | |
| 347 | However, if FRAME_CHAIN_VALID returns zero, |
| 348 | it means the given frame is the outermost one and has no caller. */ |
| 349 | |
| 350 | #define FRAME_CHAIN(thisframe) arm_frame_chain (thisframe) |
| 351 | extern CORE_ADDR arm_frame_chain (struct frame_info *); |
| 352 | |
| 353 | extern int arm_frame_chain_valid (CORE_ADDR, struct frame_info *); |
| 354 | #define FRAME_CHAIN_VALID(chain, thisframe) \ |
| 355 | arm_frame_chain_valid (chain, thisframe) |
| 356 | |
| 357 | /* Define other aspects of the stack frame. */ |
| 358 | |
| 359 | /* A macro that tells us whether the function invocation represented |
| 360 | by FI does not have a frame on the stack associated with it. If it |
| 361 | does not, FRAMELESS is set to 1, else 0. |
| 362 | |
| 363 | Sometimes we have functions that do a little setup (like saving the |
| 364 | vN registers with the stmdb instruction, but DO NOT set up a frame. |
| 365 | The symbol table will report this as a prologue. However, it is |
| 366 | important not to try to parse these partial frames as frames, or we |
| 367 | will get really confused. |
| 368 | |
| 369 | So I will demand 3 instructions between the start & end of the |
| 370 | prologue before I call it a real prologue, i.e. at least |
| 371 | mov ip, sp, |
| 372 | stmdb sp!, {} |
| 373 | sub sp, ip, #4. */ |
| 374 | |
| 375 | extern int arm_frameless_function_invocation (struct frame_info *fi); |
| 376 | #define FRAMELESS_FUNCTION_INVOCATION(FI) \ |
| 377 | (arm_frameless_function_invocation (FI)) |
| 378 | |
| 379 | /* Saved Pc. */ |
| 380 | |
| 381 | #define FRAME_SAVED_PC(FRAME) arm_frame_saved_pc (FRAME) |
| 382 | extern CORE_ADDR arm_frame_saved_pc (struct frame_info *); |
| 383 | |
| 384 | #define FRAME_ARGS_ADDRESS(fi) (fi->frame) |
| 385 | |
| 386 | #define FRAME_LOCALS_ADDRESS(fi) ((fi)->frame) |
| 387 | |
| 388 | /* Return number of args passed to a frame. |
| 389 | Can return -1, meaning no way to tell. */ |
| 390 | |
| 391 | #define FRAME_NUM_ARGS(fi) (-1) |
| 392 | |
| 393 | /* Return number of bytes at start of arglist that are not really args. */ |
| 394 | |
| 395 | #define FRAME_ARGS_SKIP 0 |
| 396 | |
| 397 | /* Put here the code to store, into a struct frame_saved_regs, the |
| 398 | addresses of the saved registers of frame described by FRAME_INFO. |
| 399 | This includes special registers such as pc and fp saved in special |
| 400 | ways in the stack frame. sp is even more special: the address we |
| 401 | return for it IS the sp for the next frame. */ |
| 402 | |
| 403 | struct frame_saved_regs; |
| 404 | struct frame_info; |
| 405 | void arm_frame_find_saved_regs (struct frame_info * fi, |
| 406 | struct frame_saved_regs * fsr); |
| 407 | |
| 408 | #define FRAME_FIND_SAVED_REGS(frame_info, frame_saved_regs) \ |
| 409 | arm_frame_find_saved_regs (frame_info, &(frame_saved_regs)); |
| 410 | |
| 411 | /* Things needed for making the inferior call functions. */ |
| 412 | |
| 413 | #define PUSH_ARGUMENTS(nargs, args, sp, struct_return, struct_addr) \ |
| 414 | sp = arm_push_arguments ((nargs), (args), (sp), (struct_return), (struct_addr)) |
| 415 | extern CORE_ADDR arm_push_arguments (int, struct value **, CORE_ADDR, int, |
| 416 | CORE_ADDR); |
| 417 | |
| 418 | /* Push an empty stack frame, to record the current PC, etc. */ |
| 419 | |
| 420 | void arm_push_dummy_frame (void); |
| 421 | |
| 422 | #define PUSH_DUMMY_FRAME arm_push_dummy_frame () |
| 423 | |
| 424 | /* Discard from the stack the innermost frame, restoring all registers. */ |
| 425 | |
| 426 | void arm_pop_frame (void); |
| 427 | |
| 428 | #define POP_FRAME arm_pop_frame () |
| 429 | |
| 430 | /* This sequence of words is the instructions |
| 431 | |
| 432 | mov lr,pc |
| 433 | mov pc,r4 |
| 434 | illegal |
| 435 | |
| 436 | Note this is 12 bytes. */ |
| 437 | |
| 438 | #define CALL_DUMMY {0xe1a0e00f, 0xe1a0f004, 0xe7ffdefe} |
| 439 | #define CALL_DUMMY_START_OFFSET 0 /* Start execution at beginning of dummy */ |
| 440 | |
| 441 | #define CALL_DUMMY_BREAKPOINT_OFFSET arm_call_dummy_breakpoint_offset() |
| 442 | extern int arm_call_dummy_breakpoint_offset (void); |
| 443 | |
| 444 | /* Insert the specified number of args and function address into a |
| 445 | call sequence of the above form stored at DUMMYNAME. */ |
| 446 | |
| 447 | #define FIX_CALL_DUMMY(dummyname, pc, fun, nargs, args, type, gcc_p) \ |
| 448 | arm_fix_call_dummy ((dummyname), (pc), (fun), (nargs), (args), (type), (gcc_p)) |
| 449 | |
| 450 | void arm_fix_call_dummy (char *dummy, CORE_ADDR pc, CORE_ADDR fun, |
| 451 | int nargs, struct value ** args, |
| 452 | struct type * type, int gcc_p); |
| 453 | |
| 454 | CORE_ADDR arm_get_next_pc (CORE_ADDR pc); |
| 455 | |
| 456 | /* Macros for setting and testing a bit in a minimal symbol that marks |
| 457 | it as Thumb function. The MSB of the minimal symbol's "info" field |
| 458 | is used for this purpose. This field is already being used to store |
| 459 | the symbol size, so the assumption is that the symbol size cannot |
| 460 | exceed 2^31. |
| 461 | |
| 462 | COFF_MAKE_MSYMBOL_SPECIAL |
| 463 | ELF_MAKE_MSYMBOL_SPECIAL |
| 464 | |
| 465 | These macros test whether the COFF or ELF symbol corresponds to a |
| 466 | thumb function, and set a "special" bit in a minimal symbol to |
| 467 | indicate that it does. |
| 468 | |
| 469 | MSYMBOL_SET_SPECIAL Actually sets the "special" bit. |
| 470 | MSYMBOL_IS_SPECIAL Tests the "special" bit in a minimal symbol. |
| 471 | MSYMBOL_SIZE Returns the size of the minimal symbol, |
| 472 | i.e. the "info" field with the "special" bit |
| 473 | masked out |
| 474 | */ |
| 475 | |
| 476 | extern int coff_sym_is_thumb (int val); |
| 477 | |
| 478 | #define MSYMBOL_SET_SPECIAL(msym) \ |
| 479 | MSYMBOL_INFO (msym) = (char *) (((long) MSYMBOL_INFO (msym)) | 0x80000000) |
| 480 | #define MSYMBOL_IS_SPECIAL(msym) \ |
| 481 | (((long) MSYMBOL_INFO (msym) & 0x80000000) != 0) |
| 482 | #define MSYMBOL_SIZE(msym) \ |
| 483 | ((long) MSYMBOL_INFO (msym) & 0x7fffffff) |
| 484 | |
| 485 | /* Thumb symbols are of type STT_LOPROC, (synonymous with STT_ARM_TFUNC) */ |
| 486 | #define ELF_MAKE_MSYMBOL_SPECIAL(sym,msym) \ |
| 487 | { if(ELF_ST_TYPE(((elf_symbol_type *)(sym))->internal_elf_sym.st_info) == STT_LOPROC) \ |
| 488 | MSYMBOL_SET_SPECIAL(msym); } |
| 489 | |
| 490 | #define COFF_MAKE_MSYMBOL_SPECIAL(val,msym) \ |
| 491 | { if(coff_sym_is_thumb(val)) MSYMBOL_SET_SPECIAL(msym); } |
| 492 | |
| 493 | /* The first 0x20 bytes are the trap vectors. */ |
| 494 | #define LOWEST_PC 0x20 |
| 495 | |
| 496 | /* Function to determine whether MEMADDR is in a Thumb function. */ |
| 497 | extern int arm_pc_is_thumb (bfd_vma memaddr); |
| 498 | |
| 499 | /* Function to determine whether MEMADDR is in a call dummy called from |
| 500 | a Thumb function. */ |
| 501 | extern int arm_pc_is_thumb_dummy (bfd_vma memaddr); |
| 502 | |
| 503 | #endif /* TM_ARM_H */ |