| 1 | /* Definitions to make GDB run on a mips box under 4.3bsd. |
| 2 | |
| 3 | Copyright 1986, 1987, 1989, 1991, 1992, 1993, 1994, 1995, 1996, |
| 4 | 1997, 1998, 1999, 2000, 2002, 2003 Free Software Foundation, Inc. |
| 5 | |
| 6 | Contributed by Per Bothner (bothner@cs.wisc.edu) at U.Wisconsin |
| 7 | and by Alessandro Forin (af@cs.cmu.edu) at CMU.. |
| 8 | |
| 9 | This file is part of GDB. |
| 10 | |
| 11 | This program is free software; you can redistribute it and/or modify |
| 12 | it under the terms of the GNU General Public License as published by |
| 13 | the Free Software Foundation; either version 2 of the License, or |
| 14 | (at your option) any later version. |
| 15 | |
| 16 | This program is distributed in the hope that it will be useful, |
| 17 | but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 18 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 19 | GNU General Public License for more details. |
| 20 | |
| 21 | You should have received a copy of the GNU General Public License |
| 22 | along with this program; if not, write to the Free Software |
| 23 | Foundation, Inc., 59 Temple Place - Suite 330, |
| 24 | Boston, MA 02111-1307, USA. */ |
| 25 | |
| 26 | #ifndef TM_MIPS_H |
| 27 | #define TM_MIPS_H 1 |
| 28 | |
| 29 | #define GDB_MULTI_ARCH 1 |
| 30 | |
| 31 | #include "regcache.h" |
| 32 | |
| 33 | struct frame_info; |
| 34 | struct symbol; |
| 35 | struct type; |
| 36 | struct value; |
| 37 | |
| 38 | #include <bfd.h> |
| 39 | #include "coff/sym.h" /* Needed for PDR below. */ |
| 40 | #include "coff/symconst.h" |
| 41 | |
| 42 | /* Return non-zero if PC points to an instruction which will cause a step |
| 43 | to execute both the instruction at PC and an instruction at PC+4. */ |
| 44 | extern int mips_step_skips_delay (CORE_ADDR); |
| 45 | #define STEP_SKIPS_DELAY_P (1) |
| 46 | #define STEP_SKIPS_DELAY(pc) (mips_step_skips_delay (pc)) |
| 47 | |
| 48 | /* Initializer for an array of names for registers 32 and above. |
| 49 | There should be NUM_REGS-32 strings in this initializer. */ |
| 50 | |
| 51 | #ifndef MIPS_REGISTER_NAMES |
| 52 | #define MIPS_REGISTER_NAMES \ |
| 53 | { "sr", "lo", "hi", "bad", "cause","pc", \ |
| 54 | "f0", "f1", "f2", "f3", "f4", "f5", "f6", "f7", \ |
| 55 | "f8", "f9", "f10", "f11", "f12", "f13", "f14", "f15", \ |
| 56 | "f16", "f17", "f18", "f19", "f20", "f21", "f22", "f23",\ |
| 57 | "f24", "f25", "f26", "f27", "f28", "f29", "f30", "f31",\ |
| 58 | "fsr", "fir", ""/*"fp"*/, "", \ |
| 59 | "", "", "", "", "", "", "", "", \ |
| 60 | "", "", "", "", "", "", "", "", \ |
| 61 | } |
| 62 | #endif |
| 63 | |
| 64 | /* Register numbers of various important registers. |
| 65 | Note that some of these values are "real" register numbers, |
| 66 | and correspond to the general registers of the machine, |
| 67 | and some are "phony" register numbers which are too large |
| 68 | to be actual register numbers as far as the user is concerned |
| 69 | but do serve to get the desired values when passed to read_register. */ |
| 70 | |
| 71 | #define ZERO_REGNUM 0 /* read-only register, always 0 */ |
| 72 | #define V0_REGNUM 2 /* Function integer return value */ |
| 73 | #define A0_REGNUM 4 /* Loc of first arg during a subr call */ |
| 74 | #define T9_REGNUM 25 /* Contains address of callee in PIC */ |
| 75 | #define SP_REGNUM 29 /* Contains address of top of stack */ |
| 76 | #define RA_REGNUM 31 /* Contains return address value */ |
| 77 | #define PS_REGNUM 32 /* Contains processor status */ |
| 78 | #define HI_REGNUM 34 /* Multiple/divide temp */ |
| 79 | #define LO_REGNUM 33 /* ... */ |
| 80 | #define BADVADDR_REGNUM 35 /* bad vaddr for addressing exception */ |
| 81 | #define CAUSE_REGNUM 36 /* describes last exception */ |
| 82 | #define PC_REGNUM 37 /* Contains program counter */ |
| 83 | #define FP0_REGNUM 38 /* Floating point register 0 (single float) */ |
| 84 | #define FPA0_REGNUM (FP0_REGNUM+12) /* First float argument register */ |
| 85 | #define FCRCS_REGNUM 70 /* FP control/status */ |
| 86 | #define FCRIR_REGNUM 71 /* FP implementation/revision */ |
| 87 | #define UNUSED_REGNUM 73 /* Never used, FIXME */ |
| 88 | #define FIRST_EMBED_REGNUM 74 /* First CP0 register for embedded use */ |
| 89 | #define PRID_REGNUM 89 /* Processor ID */ |
| 90 | #define LAST_EMBED_REGNUM 89 /* Last one */ |
| 91 | |
| 92 | /* Index within `registers' of the first byte of the space for |
| 93 | register N. */ |
| 94 | |
| 95 | #define MIPS_REGISTER_BYTE(N) ((N) * mips_regsize (current_gdbarch)) |
| 96 | |
| 97 | /* Return the GDB type object for the "standard" data type of data in |
| 98 | register N. */ |
| 99 | |
| 100 | #ifndef MIPS_REGISTER_TYPE |
| 101 | #define MIPS_REGISTER_TYPE(N) \ |
| 102 | (((N) >= FP0_REGNUM && (N) < FP0_REGNUM+32) ? builtin_type_float \ |
| 103 | : ((N) == 32 /*SR*/) ? builtin_type_uint32 \ |
| 104 | : ((N) >= 70 && (N) <= 89) ? builtin_type_uint32 \ |
| 105 | : builtin_type_int) |
| 106 | #endif |
| 107 | |
| 108 | /* Special symbol found in blocks associated with routines. We can hang |
| 109 | mips_extra_func_info_t's off of this. */ |
| 110 | |
| 111 | #define MIPS_EFI_SYMBOL_NAME "__GDB_EFI_INFO__" |
| 112 | extern void ecoff_relocate_efi (struct symbol *, CORE_ADDR); |
| 113 | |
| 114 | /* Specific information about a procedure. |
| 115 | This overlays the MIPS's PDR records, |
| 116 | mipsread.c (ab)uses this to save memory */ |
| 117 | |
| 118 | typedef struct mips_extra_func_info |
| 119 | { |
| 120 | long numargs; /* number of args to procedure (was iopt) */ |
| 121 | bfd_vma high_addr; /* upper address bound */ |
| 122 | long frame_adjust; /* offset of FP from SP (used on MIPS16) */ |
| 123 | PDR pdr; /* Procedure descriptor record */ |
| 124 | } |
| 125 | *mips_extra_func_info_t; |
| 126 | |
| 127 | /* It takes two values to specify a frame on the MIPS. |
| 128 | |
| 129 | In fact, the *PC* is the primary value that sets up a frame. The |
| 130 | PC is looked up to see what function it's in; symbol information |
| 131 | from that function tells us which register is the frame pointer |
| 132 | base, and what offset from there is the "virtual frame pointer". |
| 133 | (This is usually an offset from SP.) On most non-MIPS machines, |
| 134 | the primary value is the SP, and the PC, if needed, disambiguates |
| 135 | multiple functions with the same SP. But on the MIPS we can't do |
| 136 | that since the PC is not stored in the same part of the frame every |
| 137 | time. This does not seem to be a very clever way to set up frames, |
| 138 | but there is nothing we can do about that. */ |
| 139 | |
| 140 | #define SETUP_ARBITRARY_FRAME(argc, argv) setup_arbitrary_frame (argc, argv) |
| 141 | extern struct frame_info *setup_arbitrary_frame (int, CORE_ADDR *); |
| 142 | |
| 143 | /* These are defined in mdebugread.c and are used in mips-tdep.c */ |
| 144 | extern CORE_ADDR sigtramp_address, sigtramp_end; |
| 145 | extern void fixup_sigtramp (void); |
| 146 | |
| 147 | /* Defined in mips-tdep.c and used in remote-mips.c */ |
| 148 | extern char *mips_read_processor_type (void); |
| 149 | |
| 150 | /* Functions for dealing with MIPS16 call and return stubs. */ |
| 151 | #define IGNORE_HELPER_CALL(pc) mips_ignore_helper (pc) |
| 152 | extern int mips_ignore_helper (CORE_ADDR pc); |
| 153 | |
| 154 | /* Definitions and declarations used by mips-tdep.c and remote-mips.c */ |
| 155 | #define MIPS_INSTLEN 4 /* Length of an instruction */ |
| 156 | #define MIPS16_INSTLEN 2 /* Length of an instruction on MIPS16 */ |
| 157 | #define MIPS_NUMREGS 32 /* Number of integer or float registers */ |
| 158 | typedef unsigned long t_inst; /* Integer big enough to hold an instruction */ |
| 159 | |
| 160 | #endif /* TM_MIPS_H */ |
| 161 | |
| 162 | /* Command to set the processor type. */ |
| 163 | extern void mips_set_processor_type_command (char *, int); |
| 164 | |
| 165 | /* Single step based on where the current instruction will take us. */ |
| 166 | extern void mips_software_single_step (enum target_signal, int); |