| 1 | /* Target-machine dependent code for Renesas H8/300, for GDB. |
| 2 | |
| 3 | Copyright (C) 1988-2018 Free Software Foundation, Inc. |
| 4 | |
| 5 | This file is part of GDB. |
| 6 | |
| 7 | This program is free software; you can redistribute it and/or modify |
| 8 | it under the terms of the GNU General Public License as published by |
| 9 | the Free Software Foundation; either version 3 of the License, or |
| 10 | (at your option) any later version. |
| 11 | |
| 12 | This program is distributed in the hope that it will be useful, |
| 13 | but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 14 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 15 | GNU General Public License for more details. |
| 16 | |
| 17 | You should have received a copy of the GNU General Public License |
| 18 | along with this program. If not, see <http://www.gnu.org/licenses/>. */ |
| 19 | |
| 20 | /* |
| 21 | Contributed by Steve Chamberlain |
| 22 | sac@cygnus.com |
| 23 | */ |
| 24 | |
| 25 | #include "defs.h" |
| 26 | #include "value.h" |
| 27 | #include "arch-utils.h" |
| 28 | #include "regcache.h" |
| 29 | #include "gdbcore.h" |
| 30 | #include "objfiles.h" |
| 31 | #include "dis-asm.h" |
| 32 | #include "dwarf2-frame.h" |
| 33 | #include "frame-base.h" |
| 34 | #include "frame-unwind.h" |
| 35 | |
| 36 | enum gdb_regnum |
| 37 | { |
| 38 | E_R0_REGNUM, E_ER0_REGNUM = E_R0_REGNUM, E_ARG0_REGNUM = E_R0_REGNUM, |
| 39 | E_RET0_REGNUM = E_R0_REGNUM, |
| 40 | E_R1_REGNUM, E_ER1_REGNUM = E_R1_REGNUM, E_RET1_REGNUM = E_R1_REGNUM, |
| 41 | E_R2_REGNUM, E_ER2_REGNUM = E_R2_REGNUM, E_ARGLAST_REGNUM = E_R2_REGNUM, |
| 42 | E_R3_REGNUM, E_ER3_REGNUM = E_R3_REGNUM, |
| 43 | E_R4_REGNUM, E_ER4_REGNUM = E_R4_REGNUM, |
| 44 | E_R5_REGNUM, E_ER5_REGNUM = E_R5_REGNUM, |
| 45 | E_R6_REGNUM, E_ER6_REGNUM = E_R6_REGNUM, E_FP_REGNUM = E_R6_REGNUM, |
| 46 | E_SP_REGNUM, |
| 47 | E_CCR_REGNUM, |
| 48 | E_PC_REGNUM, |
| 49 | E_CYCLES_REGNUM, |
| 50 | E_TICK_REGNUM, E_EXR_REGNUM = E_TICK_REGNUM, |
| 51 | E_INST_REGNUM, E_TICKS_REGNUM = E_INST_REGNUM, |
| 52 | E_INSTS_REGNUM, |
| 53 | E_MACH_REGNUM, |
| 54 | E_MACL_REGNUM, |
| 55 | E_SBR_REGNUM, |
| 56 | E_VBR_REGNUM |
| 57 | }; |
| 58 | |
| 59 | #define H8300_MAX_NUM_REGS 18 |
| 60 | |
| 61 | #define E_PSEUDO_CCR_REGNUM(gdbarch) (gdbarch_num_regs (gdbarch)) |
| 62 | #define E_PSEUDO_EXR_REGNUM(gdbarch) (gdbarch_num_regs (gdbarch)+1) |
| 63 | |
| 64 | struct h8300_frame_cache |
| 65 | { |
| 66 | /* Base address. */ |
| 67 | CORE_ADDR base; |
| 68 | CORE_ADDR sp_offset; |
| 69 | CORE_ADDR pc; |
| 70 | |
| 71 | /* Flag showing that a frame has been created in the prologue code. */ |
| 72 | int uses_fp; |
| 73 | |
| 74 | /* Saved registers. */ |
| 75 | CORE_ADDR saved_regs[H8300_MAX_NUM_REGS]; |
| 76 | CORE_ADDR saved_sp; |
| 77 | }; |
| 78 | |
| 79 | enum |
| 80 | { |
| 81 | h8300_reg_size = 2, |
| 82 | h8300h_reg_size = 4, |
| 83 | h8300_max_reg_size = 4, |
| 84 | }; |
| 85 | |
| 86 | static int is_h8300hmode (struct gdbarch *gdbarch); |
| 87 | static int is_h8300smode (struct gdbarch *gdbarch); |
| 88 | static int is_h8300sxmode (struct gdbarch *gdbarch); |
| 89 | static int is_h8300_normal_mode (struct gdbarch *gdbarch); |
| 90 | |
| 91 | #define BINWORD(gdbarch) ((is_h8300hmode (gdbarch) \ |
| 92 | && !is_h8300_normal_mode (gdbarch)) \ |
| 93 | ? h8300h_reg_size : h8300_reg_size) |
| 94 | |
| 95 | static CORE_ADDR |
| 96 | h8300_unwind_pc (struct gdbarch *gdbarch, struct frame_info *next_frame) |
| 97 | { |
| 98 | return frame_unwind_register_unsigned (next_frame, E_PC_REGNUM); |
| 99 | } |
| 100 | |
| 101 | static CORE_ADDR |
| 102 | h8300_unwind_sp (struct gdbarch *gdbarch, struct frame_info *next_frame) |
| 103 | { |
| 104 | return frame_unwind_register_unsigned (next_frame, E_SP_REGNUM); |
| 105 | } |
| 106 | |
| 107 | static struct frame_id |
| 108 | h8300_dummy_id (struct gdbarch *gdbarch, struct frame_info *this_frame) |
| 109 | { |
| 110 | CORE_ADDR sp = get_frame_register_unsigned (this_frame, E_SP_REGNUM); |
| 111 | return frame_id_build (sp, get_frame_pc (this_frame)); |
| 112 | } |
| 113 | |
| 114 | /* Normal frames. */ |
| 115 | |
| 116 | /* Allocate and initialize a frame cache. */ |
| 117 | |
| 118 | static void |
| 119 | h8300_init_frame_cache (struct gdbarch *gdbarch, |
| 120 | struct h8300_frame_cache *cache) |
| 121 | { |
| 122 | int i; |
| 123 | |
| 124 | /* Base address. */ |
| 125 | cache->base = 0; |
| 126 | cache->sp_offset = 0; |
| 127 | cache->pc = 0; |
| 128 | |
| 129 | /* Frameless until proven otherwise. */ |
| 130 | cache->uses_fp = 0; |
| 131 | |
| 132 | /* Saved registers. We initialize these to -1 since zero is a valid |
| 133 | offset (that's where %fp is supposed to be stored). */ |
| 134 | for (i = 0; i < gdbarch_num_regs (gdbarch); i++) |
| 135 | cache->saved_regs[i] = -1; |
| 136 | } |
| 137 | |
| 138 | #define IS_MOVB_RnRm(x) (((x) & 0xff88) == 0x0c88) |
| 139 | #define IS_MOVW_RnRm(x) (((x) & 0xff88) == 0x0d00) |
| 140 | #define IS_MOVL_RnRm(x) (((x) & 0xff88) == 0x0f80) |
| 141 | #define IS_MOVB_Rn16_SP(x) (((x) & 0xfff0) == 0x6ee0) |
| 142 | #define IS_MOVB_EXT(x) ((x) == 0x7860) |
| 143 | #define IS_MOVB_Rn24_SP(x) (((x) & 0xfff0) == 0x6aa0) |
| 144 | #define IS_MOVW_Rn16_SP(x) (((x) & 0xfff0) == 0x6fe0) |
| 145 | #define IS_MOVW_EXT(x) ((x) == 0x78e0) |
| 146 | #define IS_MOVW_Rn24_SP(x) (((x) & 0xfff0) == 0x6ba0) |
| 147 | /* Same instructions as mov.w, just prefixed with 0x0100. */ |
| 148 | #define IS_MOVL_PRE(x) ((x) == 0x0100) |
| 149 | #define IS_MOVL_Rn16_SP(x) (((x) & 0xfff0) == 0x6fe0) |
| 150 | #define IS_MOVL_EXT(x) ((x) == 0x78e0) |
| 151 | #define IS_MOVL_Rn24_SP(x) (((x) & 0xfff0) == 0x6ba0) |
| 152 | |
| 153 | #define IS_PUSHFP_MOVESPFP(x) ((x) == 0x6df60d76) |
| 154 | #define IS_PUSH_FP(x) ((x) == 0x01006df6) |
| 155 | #define IS_MOV_SP_FP(x) ((x) == 0x0ff6) |
| 156 | #define IS_SUB2_SP(x) ((x) == 0x1b87) |
| 157 | #define IS_SUB4_SP(x) ((x) == 0x1b97) |
| 158 | #define IS_ADD_IMM_SP(x) ((x) == 0x7a1f) |
| 159 | #define IS_SUB_IMM_SP(x) ((x) == 0x7a3f) |
| 160 | #define IS_SUBL4_SP(x) ((x) == 0x1acf) |
| 161 | #define IS_MOV_IMM_Rn(x) (((x) & 0xfff0) == 0x7905) |
| 162 | #define IS_SUB_RnSP(x) (((x) & 0xff0f) == 0x1907) |
| 163 | #define IS_ADD_RnSP(x) (((x) & 0xff0f) == 0x0907) |
| 164 | #define IS_PUSH(x) (((x) & 0xfff0) == 0x6df0) |
| 165 | |
| 166 | /* If the instruction at PC is an argument register spill, return its |
| 167 | length. Otherwise, return zero. |
| 168 | |
| 169 | An argument register spill is an instruction that moves an argument |
| 170 | from the register in which it was passed to the stack slot in which |
| 171 | it really lives. It is a byte, word, or longword move from an |
| 172 | argument register to a negative offset from the frame pointer. |
| 173 | |
| 174 | CV, 2003-06-16: Or, in optimized code or when the `register' qualifier |
| 175 | is used, it could be a byte, word or long move to registers r3-r5. */ |
| 176 | |
| 177 | static int |
| 178 | h8300_is_argument_spill (struct gdbarch *gdbarch, CORE_ADDR pc) |
| 179 | { |
| 180 | enum bfd_endian byte_order = gdbarch_byte_order (gdbarch); |
| 181 | int w = read_memory_unsigned_integer (pc, 2, byte_order); |
| 182 | |
| 183 | if ((IS_MOVB_RnRm (w) || IS_MOVW_RnRm (w) || IS_MOVL_RnRm (w)) |
| 184 | && (w & 0x70) <= 0x20 /* Rs is R0, R1 or R2 */ |
| 185 | && (w & 0x7) >= 0x3 && (w & 0x7) <= 0x5) /* Rd is R3, R4 or R5 */ |
| 186 | return 2; |
| 187 | |
| 188 | if (IS_MOVB_Rn16_SP (w) |
| 189 | && 8 <= (w & 0xf) && (w & 0xf) <= 10) /* Rs is R0L, R1L, or R2L */ |
| 190 | { |
| 191 | /* ... and d:16 is negative. */ |
| 192 | if (read_memory_integer (pc + 2, 2, byte_order) < 0) |
| 193 | return 4; |
| 194 | } |
| 195 | else if (IS_MOVB_EXT (w)) |
| 196 | { |
| 197 | if (IS_MOVB_Rn24_SP (read_memory_unsigned_integer (pc + 2, |
| 198 | 2, byte_order))) |
| 199 | { |
| 200 | LONGEST disp = read_memory_integer (pc + 4, 4, byte_order); |
| 201 | |
| 202 | /* ... and d:24 is negative. */ |
| 203 | if (disp < 0 && disp > 0xffffff) |
| 204 | return 8; |
| 205 | } |
| 206 | } |
| 207 | else if (IS_MOVW_Rn16_SP (w) |
| 208 | && (w & 0xf) <= 2) /* Rs is R0, R1, or R2 */ |
| 209 | { |
| 210 | /* ... and d:16 is negative. */ |
| 211 | if (read_memory_integer (pc + 2, 2, byte_order) < 0) |
| 212 | return 4; |
| 213 | } |
| 214 | else if (IS_MOVW_EXT (w)) |
| 215 | { |
| 216 | if (IS_MOVW_Rn24_SP (read_memory_unsigned_integer (pc + 2, |
| 217 | 2, byte_order))) |
| 218 | { |
| 219 | LONGEST disp = read_memory_integer (pc + 4, 4, byte_order); |
| 220 | |
| 221 | /* ... and d:24 is negative. */ |
| 222 | if (disp < 0 && disp > 0xffffff) |
| 223 | return 8; |
| 224 | } |
| 225 | } |
| 226 | else if (IS_MOVL_PRE (w)) |
| 227 | { |
| 228 | int w2 = read_memory_integer (pc + 2, 2, byte_order); |
| 229 | |
| 230 | if (IS_MOVL_Rn16_SP (w2) |
| 231 | && (w2 & 0xf) <= 2) /* Rs is ER0, ER1, or ER2 */ |
| 232 | { |
| 233 | /* ... and d:16 is negative. */ |
| 234 | if (read_memory_integer (pc + 4, 2, byte_order) < 0) |
| 235 | return 6; |
| 236 | } |
| 237 | else if (IS_MOVL_EXT (w2)) |
| 238 | { |
| 239 | if (IS_MOVL_Rn24_SP (read_memory_integer (pc + 4, 2, byte_order))) |
| 240 | { |
| 241 | LONGEST disp = read_memory_integer (pc + 6, 4, byte_order); |
| 242 | |
| 243 | /* ... and d:24 is negative. */ |
| 244 | if (disp < 0 && disp > 0xffffff) |
| 245 | return 10; |
| 246 | } |
| 247 | } |
| 248 | } |
| 249 | |
| 250 | return 0; |
| 251 | } |
| 252 | |
| 253 | /* Do a full analysis of the prologue at PC and update CACHE |
| 254 | accordingly. Bail out early if CURRENT_PC is reached. Return the |
| 255 | address where the analysis stopped. |
| 256 | |
| 257 | We handle all cases that can be generated by gcc. |
| 258 | |
| 259 | For allocating a stack frame: |
| 260 | |
| 261 | mov.w r6,@-sp |
| 262 | mov.w sp,r6 |
| 263 | mov.w #-n,rN |
| 264 | add.w rN,sp |
| 265 | |
| 266 | mov.w r6,@-sp |
| 267 | mov.w sp,r6 |
| 268 | subs #2,sp |
| 269 | (repeat) |
| 270 | |
| 271 | mov.l er6,@-sp |
| 272 | mov.l sp,er6 |
| 273 | add.l #-n,sp |
| 274 | |
| 275 | mov.w r6,@-sp |
| 276 | mov.w sp,r6 |
| 277 | subs #4,sp |
| 278 | (repeat) |
| 279 | |
| 280 | For saving registers: |
| 281 | |
| 282 | mov.w rN,@-sp |
| 283 | mov.l erN,@-sp |
| 284 | stm.l reglist,@-sp |
| 285 | |
| 286 | */ |
| 287 | |
| 288 | static CORE_ADDR |
| 289 | h8300_analyze_prologue (struct gdbarch *gdbarch, |
| 290 | CORE_ADDR pc, CORE_ADDR current_pc, |
| 291 | struct h8300_frame_cache *cache) |
| 292 | { |
| 293 | enum bfd_endian byte_order = gdbarch_byte_order (gdbarch); |
| 294 | unsigned int op; |
| 295 | int regno, i, spill_size; |
| 296 | |
| 297 | cache->sp_offset = 0; |
| 298 | |
| 299 | if (pc >= current_pc) |
| 300 | return current_pc; |
| 301 | |
| 302 | op = read_memory_unsigned_integer (pc, 4, byte_order); |
| 303 | |
| 304 | if (IS_PUSHFP_MOVESPFP (op)) |
| 305 | { |
| 306 | cache->saved_regs[E_FP_REGNUM] = 0; |
| 307 | cache->uses_fp = 1; |
| 308 | pc += 4; |
| 309 | } |
| 310 | else if (IS_PUSH_FP (op)) |
| 311 | { |
| 312 | cache->saved_regs[E_FP_REGNUM] = 0; |
| 313 | pc += 4; |
| 314 | if (pc >= current_pc) |
| 315 | return current_pc; |
| 316 | op = read_memory_unsigned_integer (pc, 2, byte_order); |
| 317 | if (IS_MOV_SP_FP (op)) |
| 318 | { |
| 319 | cache->uses_fp = 1; |
| 320 | pc += 2; |
| 321 | } |
| 322 | } |
| 323 | |
| 324 | while (pc < current_pc) |
| 325 | { |
| 326 | op = read_memory_unsigned_integer (pc, 2, byte_order); |
| 327 | if (IS_SUB2_SP (op)) |
| 328 | { |
| 329 | cache->sp_offset += 2; |
| 330 | pc += 2; |
| 331 | } |
| 332 | else if (IS_SUB4_SP (op)) |
| 333 | { |
| 334 | cache->sp_offset += 4; |
| 335 | pc += 2; |
| 336 | } |
| 337 | else if (IS_ADD_IMM_SP (op)) |
| 338 | { |
| 339 | cache->sp_offset += -read_memory_integer (pc + 2, 2, byte_order); |
| 340 | pc += 4; |
| 341 | } |
| 342 | else if (IS_SUB_IMM_SP (op)) |
| 343 | { |
| 344 | cache->sp_offset += read_memory_integer (pc + 2, 2, byte_order); |
| 345 | pc += 4; |
| 346 | } |
| 347 | else if (IS_SUBL4_SP (op)) |
| 348 | { |
| 349 | cache->sp_offset += 4; |
| 350 | pc += 2; |
| 351 | } |
| 352 | else if (IS_MOV_IMM_Rn (op)) |
| 353 | { |
| 354 | int offset = read_memory_integer (pc + 2, 2, byte_order); |
| 355 | regno = op & 0x000f; |
| 356 | op = read_memory_unsigned_integer (pc + 4, 2, byte_order); |
| 357 | if (IS_ADD_RnSP (op) && (op & 0x00f0) == regno) |
| 358 | { |
| 359 | cache->sp_offset -= offset; |
| 360 | pc += 6; |
| 361 | } |
| 362 | else if (IS_SUB_RnSP (op) && (op & 0x00f0) == regno) |
| 363 | { |
| 364 | cache->sp_offset += offset; |
| 365 | pc += 6; |
| 366 | } |
| 367 | else |
| 368 | break; |
| 369 | } |
| 370 | else if (IS_PUSH (op)) |
| 371 | { |
| 372 | regno = op & 0x000f; |
| 373 | cache->sp_offset += 2; |
| 374 | cache->saved_regs[regno] = cache->sp_offset; |
| 375 | pc += 2; |
| 376 | } |
| 377 | else if (op == 0x0100) |
| 378 | { |
| 379 | op = read_memory_unsigned_integer (pc + 2, 2, byte_order); |
| 380 | if (IS_PUSH (op)) |
| 381 | { |
| 382 | regno = op & 0x000f; |
| 383 | cache->sp_offset += 4; |
| 384 | cache->saved_regs[regno] = cache->sp_offset; |
| 385 | pc += 4; |
| 386 | } |
| 387 | else |
| 388 | break; |
| 389 | } |
| 390 | else if ((op & 0xffcf) == 0x0100) |
| 391 | { |
| 392 | int op1; |
| 393 | op1 = read_memory_unsigned_integer (pc + 2, 2, byte_order); |
| 394 | if (IS_PUSH (op1)) |
| 395 | { |
| 396 | /* Since the prefix is 0x01x0, this is not a simple pushm but a |
| 397 | stm.l reglist,@-sp */ |
| 398 | i = ((op & 0x0030) >> 4) + 1; |
| 399 | regno = op1 & 0x000f; |
| 400 | for (; i > 0; regno++, --i) |
| 401 | { |
| 402 | cache->sp_offset += 4; |
| 403 | cache->saved_regs[regno] = cache->sp_offset; |
| 404 | } |
| 405 | pc += 4; |
| 406 | } |
| 407 | else |
| 408 | break; |
| 409 | } |
| 410 | else |
| 411 | break; |
| 412 | } |
| 413 | |
| 414 | /* Check for spilling an argument register to the stack frame. |
| 415 | This could also be an initializing store from non-prologue code, |
| 416 | but I don't think there's any harm in skipping that. */ |
| 417 | while ((spill_size = h8300_is_argument_spill (gdbarch, pc)) > 0 |
| 418 | && pc + spill_size <= current_pc) |
| 419 | pc += spill_size; |
| 420 | |
| 421 | return pc; |
| 422 | } |
| 423 | |
| 424 | static struct h8300_frame_cache * |
| 425 | h8300_frame_cache (struct frame_info *this_frame, void **this_cache) |
| 426 | { |
| 427 | struct gdbarch *gdbarch = get_frame_arch (this_frame); |
| 428 | struct h8300_frame_cache *cache; |
| 429 | int i; |
| 430 | CORE_ADDR current_pc; |
| 431 | |
| 432 | if (*this_cache) |
| 433 | return (struct h8300_frame_cache *) *this_cache; |
| 434 | |
| 435 | cache = FRAME_OBSTACK_ZALLOC (struct h8300_frame_cache); |
| 436 | h8300_init_frame_cache (gdbarch, cache); |
| 437 | *this_cache = cache; |
| 438 | |
| 439 | /* In principle, for normal frames, %fp holds the frame pointer, |
| 440 | which holds the base address for the current stack frame. |
| 441 | However, for functions that don't need it, the frame pointer is |
| 442 | optional. For these "frameless" functions the frame pointer is |
| 443 | actually the frame pointer of the calling frame. */ |
| 444 | |
| 445 | cache->base = get_frame_register_unsigned (this_frame, E_FP_REGNUM); |
| 446 | if (cache->base == 0) |
| 447 | return cache; |
| 448 | |
| 449 | cache->saved_regs[E_PC_REGNUM] = -BINWORD (gdbarch); |
| 450 | |
| 451 | cache->pc = get_frame_func (this_frame); |
| 452 | current_pc = get_frame_pc (this_frame); |
| 453 | if (cache->pc != 0) |
| 454 | h8300_analyze_prologue (gdbarch, cache->pc, current_pc, cache); |
| 455 | |
| 456 | if (!cache->uses_fp) |
| 457 | { |
| 458 | /* We didn't find a valid frame, which means that CACHE->base |
| 459 | currently holds the frame pointer for our calling frame. If |
| 460 | we're at the start of a function, or somewhere half-way its |
| 461 | prologue, the function's frame probably hasn't been fully |
| 462 | setup yet. Try to reconstruct the base address for the stack |
| 463 | frame by looking at the stack pointer. For truly "frameless" |
| 464 | functions this might work too. */ |
| 465 | |
| 466 | cache->base = get_frame_register_unsigned (this_frame, E_SP_REGNUM) |
| 467 | + cache->sp_offset; |
| 468 | cache->saved_sp = cache->base + BINWORD (gdbarch); |
| 469 | cache->saved_regs[E_PC_REGNUM] = 0; |
| 470 | } |
| 471 | else |
| 472 | { |
| 473 | cache->saved_sp = cache->base + 2 * BINWORD (gdbarch); |
| 474 | cache->saved_regs[E_PC_REGNUM] = -BINWORD (gdbarch); |
| 475 | } |
| 476 | |
| 477 | /* Adjust all the saved registers such that they contain addresses |
| 478 | instead of offsets. */ |
| 479 | for (i = 0; i < gdbarch_num_regs (gdbarch); i++) |
| 480 | if (cache->saved_regs[i] != -1) |
| 481 | cache->saved_regs[i] = cache->base - cache->saved_regs[i]; |
| 482 | |
| 483 | return cache; |
| 484 | } |
| 485 | |
| 486 | static void |
| 487 | h8300_frame_this_id (struct frame_info *this_frame, void **this_cache, |
| 488 | struct frame_id *this_id) |
| 489 | { |
| 490 | struct h8300_frame_cache *cache = |
| 491 | h8300_frame_cache (this_frame, this_cache); |
| 492 | |
| 493 | /* This marks the outermost frame. */ |
| 494 | if (cache->base == 0) |
| 495 | return; |
| 496 | |
| 497 | *this_id = frame_id_build (cache->saved_sp, cache->pc); |
| 498 | } |
| 499 | |
| 500 | static struct value * |
| 501 | h8300_frame_prev_register (struct frame_info *this_frame, void **this_cache, |
| 502 | int regnum) |
| 503 | { |
| 504 | struct gdbarch *gdbarch = get_frame_arch (this_frame); |
| 505 | struct h8300_frame_cache *cache = |
| 506 | h8300_frame_cache (this_frame, this_cache); |
| 507 | |
| 508 | gdb_assert (regnum >= 0); |
| 509 | |
| 510 | if (regnum == E_SP_REGNUM && cache->saved_sp) |
| 511 | return frame_unwind_got_constant (this_frame, regnum, cache->saved_sp); |
| 512 | |
| 513 | if (regnum < gdbarch_num_regs (gdbarch) |
| 514 | && cache->saved_regs[regnum] != -1) |
| 515 | return frame_unwind_got_memory (this_frame, regnum, |
| 516 | cache->saved_regs[regnum]); |
| 517 | |
| 518 | return frame_unwind_got_register (this_frame, regnum, regnum); |
| 519 | } |
| 520 | |
| 521 | static const struct frame_unwind h8300_frame_unwind = { |
| 522 | NORMAL_FRAME, |
| 523 | default_frame_unwind_stop_reason, |
| 524 | h8300_frame_this_id, |
| 525 | h8300_frame_prev_register, |
| 526 | NULL, |
| 527 | default_frame_sniffer |
| 528 | }; |
| 529 | |
| 530 | static CORE_ADDR |
| 531 | h8300_frame_base_address (struct frame_info *this_frame, void **this_cache) |
| 532 | { |
| 533 | struct h8300_frame_cache *cache = h8300_frame_cache (this_frame, this_cache); |
| 534 | return cache->base; |
| 535 | } |
| 536 | |
| 537 | static const struct frame_base h8300_frame_base = { |
| 538 | &h8300_frame_unwind, |
| 539 | h8300_frame_base_address, |
| 540 | h8300_frame_base_address, |
| 541 | h8300_frame_base_address |
| 542 | }; |
| 543 | |
| 544 | static CORE_ADDR |
| 545 | h8300_skip_prologue (struct gdbarch *gdbarch, CORE_ADDR pc) |
| 546 | { |
| 547 | CORE_ADDR func_addr = 0 , func_end = 0; |
| 548 | |
| 549 | if (find_pc_partial_function (pc, NULL, &func_addr, &func_end)) |
| 550 | { |
| 551 | struct symtab_and_line sal; |
| 552 | struct h8300_frame_cache cache; |
| 553 | |
| 554 | /* Found a function. */ |
| 555 | sal = find_pc_line (func_addr, 0); |
| 556 | if (sal.end && sal.end < func_end) |
| 557 | /* Found a line number, use it as end of prologue. */ |
| 558 | return sal.end; |
| 559 | |
| 560 | /* No useable line symbol. Use prologue parsing method. */ |
| 561 | h8300_init_frame_cache (gdbarch, &cache); |
| 562 | return h8300_analyze_prologue (gdbarch, func_addr, func_end, &cache); |
| 563 | } |
| 564 | |
| 565 | /* No function symbol -- just return the PC. */ |
| 566 | return (CORE_ADDR) pc; |
| 567 | } |
| 568 | |
| 569 | /* Function: push_dummy_call |
| 570 | Setup the function arguments for calling a function in the inferior. |
| 571 | In this discussion, a `word' is 16 bits on the H8/300s, and 32 bits |
| 572 | on the H8/300H. |
| 573 | |
| 574 | There are actually two ABI's here: -mquickcall (the default) and |
| 575 | -mno-quickcall. With -mno-quickcall, all arguments are passed on |
| 576 | the stack after the return address, word-aligned. With |
| 577 | -mquickcall, GCC tries to use r0 -- r2 to pass registers. Since |
| 578 | GCC doesn't indicate in the object file which ABI was used to |
| 579 | compile it, GDB only supports the default --- -mquickcall. |
| 580 | |
| 581 | Here are the rules for -mquickcall, in detail: |
| 582 | |
| 583 | Each argument, whether scalar or aggregate, is padded to occupy a |
| 584 | whole number of words. Arguments smaller than a word are padded at |
| 585 | the most significant end; those larger than a word are padded at |
| 586 | the least significant end. |
| 587 | |
| 588 | The initial arguments are passed in r0 -- r2. Earlier arguments go in |
| 589 | lower-numbered registers. Multi-word arguments are passed in |
| 590 | consecutive registers, with the most significant end in the |
| 591 | lower-numbered register. |
| 592 | |
| 593 | If an argument doesn't fit entirely in the remaining registers, it |
| 594 | is passed entirely on the stack. Stack arguments begin just after |
| 595 | the return address. Once an argument has overflowed onto the stack |
| 596 | this way, all subsequent arguments are passed on the stack. |
| 597 | |
| 598 | The above rule has odd consequences. For example, on the h8/300s, |
| 599 | if a function takes two longs and an int as arguments: |
| 600 | - the first long will be passed in r0/r1, |
| 601 | - the second long will be passed entirely on the stack, since it |
| 602 | doesn't fit in r2, |
| 603 | - and the int will be passed on the stack, even though it could fit |
| 604 | in r2. |
| 605 | |
| 606 | A weird exception: if an argument is larger than a word, but not a |
| 607 | whole number of words in length (before padding), it is passed on |
| 608 | the stack following the rules for stack arguments above, even if |
| 609 | there are sufficient registers available to hold it. Stranger |
| 610 | still, the argument registers are still `used up' --- even though |
| 611 | there's nothing in them. |
| 612 | |
| 613 | So, for example, on the h8/300s, if a function expects a three-byte |
| 614 | structure and an int, the structure will go on the stack, and the |
| 615 | int will go in r2, not r0. |
| 616 | |
| 617 | If the function returns an aggregate type (struct, union, or class) |
| 618 | by value, the caller must allocate space to hold the return value, |
| 619 | and pass the callee a pointer to this space as an invisible first |
| 620 | argument, in R0. |
| 621 | |
| 622 | For varargs functions, the last fixed argument and all the variable |
| 623 | arguments are always passed on the stack. This means that calls to |
| 624 | varargs functions don't work properly unless there is a prototype |
| 625 | in scope. |
| 626 | |
| 627 | Basically, this ABI is not good, for the following reasons: |
| 628 | - You can't call vararg functions properly unless a prototype is in scope. |
| 629 | - Structure passing is inconsistent, to no purpose I can see. |
| 630 | - It often wastes argument registers, of which there are only three |
| 631 | to begin with. */ |
| 632 | |
| 633 | static CORE_ADDR |
| 634 | h8300_push_dummy_call (struct gdbarch *gdbarch, struct value *function, |
| 635 | struct regcache *regcache, CORE_ADDR bp_addr, |
| 636 | int nargs, struct value **args, CORE_ADDR sp, |
| 637 | int struct_return, CORE_ADDR struct_addr) |
| 638 | { |
| 639 | enum bfd_endian byte_order = gdbarch_byte_order (gdbarch); |
| 640 | int stack_alloc = 0, stack_offset = 0; |
| 641 | int wordsize = BINWORD (gdbarch); |
| 642 | int reg = E_ARG0_REGNUM; |
| 643 | int argument; |
| 644 | |
| 645 | /* First, make sure the stack is properly aligned. */ |
| 646 | sp = align_down (sp, wordsize); |
| 647 | |
| 648 | /* Now make sure there's space on the stack for the arguments. We |
| 649 | may over-allocate a little here, but that won't hurt anything. */ |
| 650 | for (argument = 0; argument < nargs; argument++) |
| 651 | stack_alloc += align_up (TYPE_LENGTH (value_type (args[argument])), |
| 652 | wordsize); |
| 653 | sp -= stack_alloc; |
| 654 | |
| 655 | /* Now load as many arguments as possible into registers, and push |
| 656 | the rest onto the stack. |
| 657 | If we're returning a structure by value, then we must pass a |
| 658 | pointer to the buffer for the return value as an invisible first |
| 659 | argument. */ |
| 660 | if (struct_return) |
| 661 | regcache_cooked_write_unsigned (regcache, reg++, struct_addr); |
| 662 | |
| 663 | for (argument = 0; argument < nargs; argument++) |
| 664 | { |
| 665 | struct type *type = value_type (args[argument]); |
| 666 | int len = TYPE_LENGTH (type); |
| 667 | char *contents = (char *) value_contents (args[argument]); |
| 668 | |
| 669 | /* Pad the argument appropriately. */ |
| 670 | int padded_len = align_up (len, wordsize); |
| 671 | /* Use std::vector here to get zero initialization. */ |
| 672 | std::vector<gdb_byte> padded (padded_len); |
| 673 | |
| 674 | memcpy ((len < wordsize ? padded.data () + padded_len - len |
| 675 | : padded.data ()), |
| 676 | contents, len); |
| 677 | |
| 678 | /* Could the argument fit in the remaining registers? */ |
| 679 | if (padded_len <= (E_ARGLAST_REGNUM - reg + 1) * wordsize) |
| 680 | { |
| 681 | /* Are we going to pass it on the stack anyway, for no good |
| 682 | reason? */ |
| 683 | if (len > wordsize && len % wordsize) |
| 684 | { |
| 685 | /* I feel so unclean. */ |
| 686 | write_memory (sp + stack_offset, padded.data (), padded_len); |
| 687 | stack_offset += padded_len; |
| 688 | |
| 689 | /* That's right --- even though we passed the argument |
| 690 | on the stack, we consume the registers anyway! Love |
| 691 | me, love my dog. */ |
| 692 | reg += padded_len / wordsize; |
| 693 | } |
| 694 | else |
| 695 | { |
| 696 | /* Heavens to Betsy --- it's really going in registers! |
| 697 | Note that on the h8/300s, there are gaps between the |
| 698 | registers in the register file. */ |
| 699 | int offset; |
| 700 | |
| 701 | for (offset = 0; offset < padded_len; offset += wordsize) |
| 702 | { |
| 703 | ULONGEST word |
| 704 | = extract_unsigned_integer (&padded[offset], |
| 705 | wordsize, byte_order); |
| 706 | regcache_cooked_write_unsigned (regcache, reg++, word); |
| 707 | } |
| 708 | } |
| 709 | } |
| 710 | else |
| 711 | { |
| 712 | /* It doesn't fit in registers! Onto the stack it goes. */ |
| 713 | write_memory (sp + stack_offset, padded.data (), padded_len); |
| 714 | stack_offset += padded_len; |
| 715 | |
| 716 | /* Once one argument has spilled onto the stack, all |
| 717 | subsequent arguments go on the stack. */ |
| 718 | reg = E_ARGLAST_REGNUM + 1; |
| 719 | } |
| 720 | } |
| 721 | |
| 722 | /* Store return address. */ |
| 723 | sp -= wordsize; |
| 724 | write_memory_unsigned_integer (sp, wordsize, byte_order, bp_addr); |
| 725 | |
| 726 | /* Update stack pointer. */ |
| 727 | regcache_cooked_write_unsigned (regcache, E_SP_REGNUM, sp); |
| 728 | |
| 729 | /* Return the new stack pointer minus the return address slot since |
| 730 | that's what DWARF2/GCC uses as the frame's CFA. */ |
| 731 | return sp + wordsize; |
| 732 | } |
| 733 | |
| 734 | /* Function: extract_return_value |
| 735 | Figure out where in REGBUF the called function has left its return value. |
| 736 | Copy that into VALBUF. Be sure to account for CPU type. */ |
| 737 | |
| 738 | static void |
| 739 | h8300_extract_return_value (struct type *type, struct regcache *regcache, |
| 740 | gdb_byte *valbuf) |
| 741 | { |
| 742 | struct gdbarch *gdbarch = regcache->arch (); |
| 743 | enum bfd_endian byte_order = gdbarch_byte_order (gdbarch); |
| 744 | int len = TYPE_LENGTH (type); |
| 745 | ULONGEST c, addr; |
| 746 | |
| 747 | switch (len) |
| 748 | { |
| 749 | case 1: |
| 750 | case 2: |
| 751 | regcache_cooked_read_unsigned (regcache, E_RET0_REGNUM, &c); |
| 752 | store_unsigned_integer (valbuf, len, byte_order, c); |
| 753 | break; |
| 754 | case 4: /* Needs two registers on plain H8/300 */ |
| 755 | regcache_cooked_read_unsigned (regcache, E_RET0_REGNUM, &c); |
| 756 | store_unsigned_integer (valbuf, 2, byte_order, c); |
| 757 | regcache_cooked_read_unsigned (regcache, E_RET1_REGNUM, &c); |
| 758 | store_unsigned_integer (valbuf + 2, 2, byte_order, c); |
| 759 | break; |
| 760 | case 8: /* long long is now 8 bytes. */ |
| 761 | if (TYPE_CODE (type) == TYPE_CODE_INT) |
| 762 | { |
| 763 | regcache_cooked_read_unsigned (regcache, E_RET0_REGNUM, &addr); |
| 764 | c = read_memory_unsigned_integer ((CORE_ADDR) addr, len, byte_order); |
| 765 | store_unsigned_integer (valbuf, len, byte_order, c); |
| 766 | } |
| 767 | else |
| 768 | { |
| 769 | error (_("I don't know how this 8 byte value is returned.")); |
| 770 | } |
| 771 | break; |
| 772 | } |
| 773 | } |
| 774 | |
| 775 | static void |
| 776 | h8300h_extract_return_value (struct type *type, struct regcache *regcache, |
| 777 | gdb_byte *valbuf) |
| 778 | { |
| 779 | struct gdbarch *gdbarch = regcache->arch (); |
| 780 | enum bfd_endian byte_order = gdbarch_byte_order (gdbarch); |
| 781 | ULONGEST c; |
| 782 | |
| 783 | switch (TYPE_LENGTH (type)) |
| 784 | { |
| 785 | case 1: |
| 786 | case 2: |
| 787 | case 4: |
| 788 | regcache_cooked_read_unsigned (regcache, E_RET0_REGNUM, &c); |
| 789 | store_unsigned_integer (valbuf, TYPE_LENGTH (type), byte_order, c); |
| 790 | break; |
| 791 | case 8: /* long long is now 8 bytes. */ |
| 792 | if (TYPE_CODE (type) == TYPE_CODE_INT) |
| 793 | { |
| 794 | regcache_cooked_read_unsigned (regcache, E_RET0_REGNUM, &c); |
| 795 | store_unsigned_integer (valbuf, 4, byte_order, c); |
| 796 | regcache_cooked_read_unsigned (regcache, E_RET1_REGNUM, &c); |
| 797 | store_unsigned_integer (valbuf + 4, 4, byte_order, c); |
| 798 | } |
| 799 | else |
| 800 | { |
| 801 | error (_("I don't know how this 8 byte value is returned.")); |
| 802 | } |
| 803 | break; |
| 804 | } |
| 805 | } |
| 806 | |
| 807 | static int |
| 808 | h8300_use_struct_convention (struct type *value_type) |
| 809 | { |
| 810 | /* Types of 1, 2 or 4 bytes are returned in R0/R1, everything else on the |
| 811 | stack. */ |
| 812 | |
| 813 | if (TYPE_CODE (value_type) == TYPE_CODE_STRUCT |
| 814 | || TYPE_CODE (value_type) == TYPE_CODE_UNION) |
| 815 | return 1; |
| 816 | return !(TYPE_LENGTH (value_type) == 1 |
| 817 | || TYPE_LENGTH (value_type) == 2 |
| 818 | || TYPE_LENGTH (value_type) == 4); |
| 819 | } |
| 820 | |
| 821 | static int |
| 822 | h8300h_use_struct_convention (struct type *value_type) |
| 823 | { |
| 824 | /* Types of 1, 2 or 4 bytes are returned in R0, INT types of 8 bytes are |
| 825 | returned in R0/R1, everything else on the stack. */ |
| 826 | if (TYPE_CODE (value_type) == TYPE_CODE_STRUCT |
| 827 | || TYPE_CODE (value_type) == TYPE_CODE_UNION) |
| 828 | return 1; |
| 829 | return !(TYPE_LENGTH (value_type) == 1 |
| 830 | || TYPE_LENGTH (value_type) == 2 |
| 831 | || TYPE_LENGTH (value_type) == 4 |
| 832 | || (TYPE_LENGTH (value_type) == 8 |
| 833 | && TYPE_CODE (value_type) == TYPE_CODE_INT)); |
| 834 | } |
| 835 | |
| 836 | /* Function: store_return_value |
| 837 | Place the appropriate value in the appropriate registers. |
| 838 | Primarily used by the RETURN command. */ |
| 839 | |
| 840 | static void |
| 841 | h8300_store_return_value (struct type *type, struct regcache *regcache, |
| 842 | const gdb_byte *valbuf) |
| 843 | { |
| 844 | struct gdbarch *gdbarch = regcache->arch (); |
| 845 | enum bfd_endian byte_order = gdbarch_byte_order (gdbarch); |
| 846 | ULONGEST val; |
| 847 | |
| 848 | switch (TYPE_LENGTH (type)) |
| 849 | { |
| 850 | case 1: |
| 851 | case 2: /* short... */ |
| 852 | val = extract_unsigned_integer (valbuf, TYPE_LENGTH (type), byte_order); |
| 853 | regcache_cooked_write_unsigned (regcache, E_RET0_REGNUM, val); |
| 854 | break; |
| 855 | case 4: /* long, float */ |
| 856 | val = extract_unsigned_integer (valbuf, TYPE_LENGTH (type), byte_order); |
| 857 | regcache_cooked_write_unsigned (regcache, E_RET0_REGNUM, |
| 858 | (val >> 16) & 0xffff); |
| 859 | regcache_cooked_write_unsigned (regcache, E_RET1_REGNUM, val & 0xffff); |
| 860 | break; |
| 861 | case 8: /* long long, double and long double |
| 862 | are all defined as 4 byte types so |
| 863 | far so this shouldn't happen. */ |
| 864 | error (_("I don't know how to return an 8 byte value.")); |
| 865 | break; |
| 866 | } |
| 867 | } |
| 868 | |
| 869 | static void |
| 870 | h8300h_store_return_value (struct type *type, struct regcache *regcache, |
| 871 | const gdb_byte *valbuf) |
| 872 | { |
| 873 | struct gdbarch *gdbarch = regcache->arch (); |
| 874 | enum bfd_endian byte_order = gdbarch_byte_order (gdbarch); |
| 875 | ULONGEST val; |
| 876 | |
| 877 | switch (TYPE_LENGTH (type)) |
| 878 | { |
| 879 | case 1: |
| 880 | case 2: |
| 881 | case 4: /* long, float */ |
| 882 | val = extract_unsigned_integer (valbuf, TYPE_LENGTH (type), byte_order); |
| 883 | regcache_cooked_write_unsigned (regcache, E_RET0_REGNUM, val); |
| 884 | break; |
| 885 | case 8: |
| 886 | val = extract_unsigned_integer (valbuf, TYPE_LENGTH (type), byte_order); |
| 887 | regcache_cooked_write_unsigned (regcache, E_RET0_REGNUM, |
| 888 | (val >> 32) & 0xffffffff); |
| 889 | regcache_cooked_write_unsigned (regcache, E_RET1_REGNUM, |
| 890 | val & 0xffffffff); |
| 891 | break; |
| 892 | } |
| 893 | } |
| 894 | |
| 895 | static enum return_value_convention |
| 896 | h8300_return_value (struct gdbarch *gdbarch, struct value *function, |
| 897 | struct type *type, struct regcache *regcache, |
| 898 | gdb_byte *readbuf, const gdb_byte *writebuf) |
| 899 | { |
| 900 | if (h8300_use_struct_convention (type)) |
| 901 | return RETURN_VALUE_STRUCT_CONVENTION; |
| 902 | if (writebuf) |
| 903 | h8300_store_return_value (type, regcache, writebuf); |
| 904 | else if (readbuf) |
| 905 | h8300_extract_return_value (type, regcache, readbuf); |
| 906 | return RETURN_VALUE_REGISTER_CONVENTION; |
| 907 | } |
| 908 | |
| 909 | static enum return_value_convention |
| 910 | h8300h_return_value (struct gdbarch *gdbarch, struct value *function, |
| 911 | struct type *type, struct regcache *regcache, |
| 912 | gdb_byte *readbuf, const gdb_byte *writebuf) |
| 913 | { |
| 914 | if (h8300h_use_struct_convention (type)) |
| 915 | { |
| 916 | if (readbuf) |
| 917 | { |
| 918 | ULONGEST addr; |
| 919 | |
| 920 | regcache_raw_read_unsigned (regcache, E_R0_REGNUM, &addr); |
| 921 | read_memory (addr, readbuf, TYPE_LENGTH (type)); |
| 922 | } |
| 923 | |
| 924 | return RETURN_VALUE_ABI_RETURNS_ADDRESS; |
| 925 | } |
| 926 | if (writebuf) |
| 927 | h8300h_store_return_value (type, regcache, writebuf); |
| 928 | else if (readbuf) |
| 929 | h8300h_extract_return_value (type, regcache, readbuf); |
| 930 | return RETURN_VALUE_REGISTER_CONVENTION; |
| 931 | } |
| 932 | |
| 933 | /* Implementation of 'register_sim_regno' gdbarch method. */ |
| 934 | |
| 935 | static int |
| 936 | h8300_register_sim_regno (struct gdbarch *gdbarch, int regnum) |
| 937 | { |
| 938 | /* Only makes sense to supply raw registers. */ |
| 939 | gdb_assert (regnum >= 0 && regnum < gdbarch_num_regs (gdbarch)); |
| 940 | |
| 941 | /* We hide the raw ccr from the user by making it nameless. Because |
| 942 | the default register_sim_regno hook returns |
| 943 | LEGACY_SIM_REGNO_IGNORE for unnamed registers, we need to |
| 944 | override it. The sim register numbering is compatible with |
| 945 | gdb's. */ |
| 946 | return regnum; |
| 947 | } |
| 948 | |
| 949 | static const char * |
| 950 | h8300_register_name (struct gdbarch *gdbarch, int regno) |
| 951 | { |
| 952 | /* The register names change depending on which h8300 processor |
| 953 | type is selected. */ |
| 954 | static const char *register_names[] = { |
| 955 | "r0", "r1", "r2", "r3", "r4", "r5", "r6", |
| 956 | "sp", "", "pc", "cycles", "tick", "inst", |
| 957 | "ccr", /* pseudo register */ |
| 958 | }; |
| 959 | if (regno < 0 |
| 960 | || regno >= (sizeof (register_names) / sizeof (*register_names))) |
| 961 | internal_error (__FILE__, __LINE__, |
| 962 | _("h8300_register_name: illegal register number %d"), |
| 963 | regno); |
| 964 | else |
| 965 | return register_names[regno]; |
| 966 | } |
| 967 | |
| 968 | static const char * |
| 969 | h8300s_register_name (struct gdbarch *gdbarch, int regno) |
| 970 | { |
| 971 | static const char *register_names[] = { |
| 972 | "er0", "er1", "er2", "er3", "er4", "er5", "er6", |
| 973 | "sp", "", "pc", "cycles", "", "tick", "inst", |
| 974 | "mach", "macl", |
| 975 | "ccr", "exr" /* pseudo registers */ |
| 976 | }; |
| 977 | if (regno < 0 |
| 978 | || regno >= (sizeof (register_names) / sizeof (*register_names))) |
| 979 | internal_error (__FILE__, __LINE__, |
| 980 | _("h8300s_register_name: illegal register number %d"), |
| 981 | regno); |
| 982 | else |
| 983 | return register_names[regno]; |
| 984 | } |
| 985 | |
| 986 | static const char * |
| 987 | h8300sx_register_name (struct gdbarch *gdbarch, int regno) |
| 988 | { |
| 989 | static const char *register_names[] = { |
| 990 | "er0", "er1", "er2", "er3", "er4", "er5", "er6", |
| 991 | "sp", "", "pc", "cycles", "", "tick", "inst", |
| 992 | "mach", "macl", "sbr", "vbr", |
| 993 | "ccr", "exr" /* pseudo registers */ |
| 994 | }; |
| 995 | if (regno < 0 |
| 996 | || regno >= (sizeof (register_names) / sizeof (*register_names))) |
| 997 | internal_error (__FILE__, __LINE__, |
| 998 | _("h8300sx_register_name: illegal register number %d"), |
| 999 | regno); |
| 1000 | else |
| 1001 | return register_names[regno]; |
| 1002 | } |
| 1003 | |
| 1004 | static void |
| 1005 | h8300_print_register (struct gdbarch *gdbarch, struct ui_file *file, |
| 1006 | struct frame_info *frame, int regno) |
| 1007 | { |
| 1008 | LONGEST rval; |
| 1009 | const char *name = gdbarch_register_name (gdbarch, regno); |
| 1010 | |
| 1011 | if (!name || !*name) |
| 1012 | return; |
| 1013 | |
| 1014 | rval = get_frame_register_signed (frame, regno); |
| 1015 | |
| 1016 | fprintf_filtered (file, "%-14s ", name); |
| 1017 | if ((regno == E_PSEUDO_CCR_REGNUM (gdbarch)) || \ |
| 1018 | (regno == E_PSEUDO_EXR_REGNUM (gdbarch) && is_h8300smode (gdbarch))) |
| 1019 | { |
| 1020 | fprintf_filtered (file, "0x%02x ", (unsigned char) rval); |
| 1021 | print_longest (file, 'u', 1, rval); |
| 1022 | } |
| 1023 | else |
| 1024 | { |
| 1025 | fprintf_filtered (file, "0x%s ", phex ((ULONGEST) rval, |
| 1026 | BINWORD (gdbarch))); |
| 1027 | print_longest (file, 'd', 1, rval); |
| 1028 | } |
| 1029 | if (regno == E_PSEUDO_CCR_REGNUM (gdbarch)) |
| 1030 | { |
| 1031 | /* CCR register */ |
| 1032 | int C, Z, N, V; |
| 1033 | unsigned char l = rval & 0xff; |
| 1034 | fprintf_filtered (file, "\t"); |
| 1035 | fprintf_filtered (file, "I-%d ", (l & 0x80) != 0); |
| 1036 | fprintf_filtered (file, "UI-%d ", (l & 0x40) != 0); |
| 1037 | fprintf_filtered (file, "H-%d ", (l & 0x20) != 0); |
| 1038 | fprintf_filtered (file, "U-%d ", (l & 0x10) != 0); |
| 1039 | N = (l & 0x8) != 0; |
| 1040 | Z = (l & 0x4) != 0; |
| 1041 | V = (l & 0x2) != 0; |
| 1042 | C = (l & 0x1) != 0; |
| 1043 | fprintf_filtered (file, "N-%d ", N); |
| 1044 | fprintf_filtered (file, "Z-%d ", Z); |
| 1045 | fprintf_filtered (file, "V-%d ", V); |
| 1046 | fprintf_filtered (file, "C-%d ", C); |
| 1047 | if ((C | Z) == 0) |
| 1048 | fprintf_filtered (file, "u> "); |
| 1049 | if ((C | Z) == 1) |
| 1050 | fprintf_filtered (file, "u<= "); |
| 1051 | if (C == 0) |
| 1052 | fprintf_filtered (file, "u>= "); |
| 1053 | if (C == 1) |
| 1054 | fprintf_filtered (file, "u< "); |
| 1055 | if (Z == 0) |
| 1056 | fprintf_filtered (file, "!= "); |
| 1057 | if (Z == 1) |
| 1058 | fprintf_filtered (file, "== "); |
| 1059 | if ((N ^ V) == 0) |
| 1060 | fprintf_filtered (file, ">= "); |
| 1061 | if ((N ^ V) == 1) |
| 1062 | fprintf_filtered (file, "< "); |
| 1063 | if ((Z | (N ^ V)) == 0) |
| 1064 | fprintf_filtered (file, "> "); |
| 1065 | if ((Z | (N ^ V)) == 1) |
| 1066 | fprintf_filtered (file, "<= "); |
| 1067 | } |
| 1068 | else if (regno == E_PSEUDO_EXR_REGNUM (gdbarch) && is_h8300smode (gdbarch)) |
| 1069 | { |
| 1070 | /* EXR register */ |
| 1071 | unsigned char l = rval & 0xff; |
| 1072 | fprintf_filtered (file, "\t"); |
| 1073 | fprintf_filtered (file, "T-%d - - - ", (l & 0x80) != 0); |
| 1074 | fprintf_filtered (file, "I2-%d ", (l & 4) != 0); |
| 1075 | fprintf_filtered (file, "I1-%d ", (l & 2) != 0); |
| 1076 | fprintf_filtered (file, "I0-%d", (l & 1) != 0); |
| 1077 | } |
| 1078 | fprintf_filtered (file, "\n"); |
| 1079 | } |
| 1080 | |
| 1081 | static void |
| 1082 | h8300_print_registers_info (struct gdbarch *gdbarch, struct ui_file *file, |
| 1083 | struct frame_info *frame, int regno, int cpregs) |
| 1084 | { |
| 1085 | if (regno < 0) |
| 1086 | { |
| 1087 | for (regno = E_R0_REGNUM; regno <= E_SP_REGNUM; ++regno) |
| 1088 | h8300_print_register (gdbarch, file, frame, regno); |
| 1089 | h8300_print_register (gdbarch, file, frame, |
| 1090 | E_PSEUDO_CCR_REGNUM (gdbarch)); |
| 1091 | h8300_print_register (gdbarch, file, frame, E_PC_REGNUM); |
| 1092 | if (is_h8300smode (gdbarch)) |
| 1093 | { |
| 1094 | h8300_print_register (gdbarch, file, frame, |
| 1095 | E_PSEUDO_EXR_REGNUM (gdbarch)); |
| 1096 | if (is_h8300sxmode (gdbarch)) |
| 1097 | { |
| 1098 | h8300_print_register (gdbarch, file, frame, E_SBR_REGNUM); |
| 1099 | h8300_print_register (gdbarch, file, frame, E_VBR_REGNUM); |
| 1100 | } |
| 1101 | h8300_print_register (gdbarch, file, frame, E_MACH_REGNUM); |
| 1102 | h8300_print_register (gdbarch, file, frame, E_MACL_REGNUM); |
| 1103 | h8300_print_register (gdbarch, file, frame, E_CYCLES_REGNUM); |
| 1104 | h8300_print_register (gdbarch, file, frame, E_TICKS_REGNUM); |
| 1105 | h8300_print_register (gdbarch, file, frame, E_INSTS_REGNUM); |
| 1106 | } |
| 1107 | else |
| 1108 | { |
| 1109 | h8300_print_register (gdbarch, file, frame, E_CYCLES_REGNUM); |
| 1110 | h8300_print_register (gdbarch, file, frame, E_TICK_REGNUM); |
| 1111 | h8300_print_register (gdbarch, file, frame, E_INST_REGNUM); |
| 1112 | } |
| 1113 | } |
| 1114 | else |
| 1115 | { |
| 1116 | if (regno == E_CCR_REGNUM) |
| 1117 | h8300_print_register (gdbarch, file, frame, |
| 1118 | E_PSEUDO_CCR_REGNUM (gdbarch)); |
| 1119 | else if (regno == E_PSEUDO_EXR_REGNUM (gdbarch) |
| 1120 | && is_h8300smode (gdbarch)) |
| 1121 | h8300_print_register (gdbarch, file, frame, |
| 1122 | E_PSEUDO_EXR_REGNUM (gdbarch)); |
| 1123 | else |
| 1124 | h8300_print_register (gdbarch, file, frame, regno); |
| 1125 | } |
| 1126 | } |
| 1127 | |
| 1128 | static struct type * |
| 1129 | h8300_register_type (struct gdbarch *gdbarch, int regno) |
| 1130 | { |
| 1131 | if (regno < 0 || regno >= gdbarch_num_regs (gdbarch) |
| 1132 | + gdbarch_num_pseudo_regs (gdbarch)) |
| 1133 | internal_error (__FILE__, __LINE__, |
| 1134 | _("h8300_register_type: illegal register number %d"), |
| 1135 | regno); |
| 1136 | else |
| 1137 | { |
| 1138 | switch (regno) |
| 1139 | { |
| 1140 | case E_PC_REGNUM: |
| 1141 | return builtin_type (gdbarch)->builtin_func_ptr; |
| 1142 | case E_SP_REGNUM: |
| 1143 | case E_FP_REGNUM: |
| 1144 | return builtin_type (gdbarch)->builtin_data_ptr; |
| 1145 | default: |
| 1146 | if (regno == E_PSEUDO_CCR_REGNUM (gdbarch)) |
| 1147 | return builtin_type (gdbarch)->builtin_uint8; |
| 1148 | else if (regno == E_PSEUDO_EXR_REGNUM (gdbarch)) |
| 1149 | return builtin_type (gdbarch)->builtin_uint8; |
| 1150 | else if (is_h8300hmode (gdbarch)) |
| 1151 | return builtin_type (gdbarch)->builtin_int32; |
| 1152 | else |
| 1153 | return builtin_type (gdbarch)->builtin_int16; |
| 1154 | } |
| 1155 | } |
| 1156 | } |
| 1157 | |
| 1158 | /* Helpers for h8300_pseudo_register_read. We expose ccr/exr as |
| 1159 | pseudo-registers to users with smaller sizes than the corresponding |
| 1160 | raw registers. These helpers extend/narrow the values. */ |
| 1161 | |
| 1162 | static enum register_status |
| 1163 | pseudo_from_raw_register (struct gdbarch *gdbarch, readable_regcache *regcache, |
| 1164 | gdb_byte *buf, int pseudo_regno, int raw_regno) |
| 1165 | { |
| 1166 | enum bfd_endian byte_order = gdbarch_byte_order (gdbarch); |
| 1167 | enum register_status status; |
| 1168 | ULONGEST val; |
| 1169 | |
| 1170 | status = regcache->raw_read (raw_regno, &val); |
| 1171 | if (status == REG_VALID) |
| 1172 | store_unsigned_integer (buf, |
| 1173 | register_size (gdbarch, pseudo_regno), |
| 1174 | byte_order, val); |
| 1175 | return status; |
| 1176 | } |
| 1177 | |
| 1178 | /* See pseudo_from_raw_register. */ |
| 1179 | |
| 1180 | static void |
| 1181 | raw_from_pseudo_register (struct gdbarch *gdbarch, struct regcache *regcache, |
| 1182 | const gdb_byte *buf, int raw_regno, int pseudo_regno) |
| 1183 | { |
| 1184 | enum bfd_endian byte_order = gdbarch_byte_order (gdbarch); |
| 1185 | ULONGEST val; |
| 1186 | |
| 1187 | val = extract_unsigned_integer (buf, register_size (gdbarch, pseudo_regno), |
| 1188 | byte_order); |
| 1189 | regcache_raw_write_unsigned (regcache, raw_regno, val); |
| 1190 | } |
| 1191 | |
| 1192 | static enum register_status |
| 1193 | h8300_pseudo_register_read (struct gdbarch *gdbarch, |
| 1194 | readable_regcache *regcache, int regno, |
| 1195 | gdb_byte *buf) |
| 1196 | { |
| 1197 | if (regno == E_PSEUDO_CCR_REGNUM (gdbarch)) |
| 1198 | { |
| 1199 | return pseudo_from_raw_register (gdbarch, regcache, buf, |
| 1200 | regno, E_CCR_REGNUM); |
| 1201 | } |
| 1202 | else if (regno == E_PSEUDO_EXR_REGNUM (gdbarch)) |
| 1203 | { |
| 1204 | return pseudo_from_raw_register (gdbarch, regcache, buf, |
| 1205 | regno, E_EXR_REGNUM); |
| 1206 | } |
| 1207 | else |
| 1208 | return regcache->raw_read (regno, buf); |
| 1209 | } |
| 1210 | |
| 1211 | static void |
| 1212 | h8300_pseudo_register_write (struct gdbarch *gdbarch, |
| 1213 | struct regcache *regcache, int regno, |
| 1214 | const gdb_byte *buf) |
| 1215 | { |
| 1216 | if (regno == E_PSEUDO_CCR_REGNUM (gdbarch)) |
| 1217 | raw_from_pseudo_register (gdbarch, regcache, buf, E_CCR_REGNUM, regno); |
| 1218 | else if (regno == E_PSEUDO_EXR_REGNUM (gdbarch)) |
| 1219 | raw_from_pseudo_register (gdbarch, regcache, buf, E_EXR_REGNUM, regno); |
| 1220 | else |
| 1221 | regcache->raw_write (regno, buf); |
| 1222 | } |
| 1223 | |
| 1224 | static int |
| 1225 | h8300_dbg_reg_to_regnum (struct gdbarch *gdbarch, int regno) |
| 1226 | { |
| 1227 | if (regno == E_CCR_REGNUM) |
| 1228 | return E_PSEUDO_CCR_REGNUM (gdbarch); |
| 1229 | return regno; |
| 1230 | } |
| 1231 | |
| 1232 | static int |
| 1233 | h8300s_dbg_reg_to_regnum (struct gdbarch *gdbarch, int regno) |
| 1234 | { |
| 1235 | if (regno == E_CCR_REGNUM) |
| 1236 | return E_PSEUDO_CCR_REGNUM (gdbarch); |
| 1237 | if (regno == E_EXR_REGNUM) |
| 1238 | return E_PSEUDO_EXR_REGNUM (gdbarch); |
| 1239 | return regno; |
| 1240 | } |
| 1241 | |
| 1242 | /*static unsigned char breakpoint[] = { 0x7A, 0xFF }; *//* ??? */ |
| 1243 | constexpr gdb_byte h8300_break_insn[] = { 0x01, 0x80 }; /* Sleep */ |
| 1244 | |
| 1245 | typedef BP_MANIPULATION (h8300_break_insn) h8300_breakpoint; |
| 1246 | |
| 1247 | static struct gdbarch * |
| 1248 | h8300_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches) |
| 1249 | { |
| 1250 | struct gdbarch *gdbarch; |
| 1251 | |
| 1252 | arches = gdbarch_list_lookup_by_info (arches, &info); |
| 1253 | if (arches != NULL) |
| 1254 | return arches->gdbarch; |
| 1255 | |
| 1256 | if (info.bfd_arch_info->arch != bfd_arch_h8300) |
| 1257 | return NULL; |
| 1258 | |
| 1259 | gdbarch = gdbarch_alloc (&info, 0); |
| 1260 | |
| 1261 | set_gdbarch_register_sim_regno (gdbarch, h8300_register_sim_regno); |
| 1262 | |
| 1263 | switch (info.bfd_arch_info->mach) |
| 1264 | { |
| 1265 | case bfd_mach_h8300: |
| 1266 | set_gdbarch_num_regs (gdbarch, 13); |
| 1267 | set_gdbarch_num_pseudo_regs (gdbarch, 1); |
| 1268 | set_gdbarch_dwarf2_reg_to_regnum (gdbarch, h8300_dbg_reg_to_regnum); |
| 1269 | set_gdbarch_stab_reg_to_regnum (gdbarch, h8300_dbg_reg_to_regnum); |
| 1270 | set_gdbarch_register_name (gdbarch, h8300_register_name); |
| 1271 | set_gdbarch_ptr_bit (gdbarch, 2 * TARGET_CHAR_BIT); |
| 1272 | set_gdbarch_addr_bit (gdbarch, 2 * TARGET_CHAR_BIT); |
| 1273 | set_gdbarch_return_value (gdbarch, h8300_return_value); |
| 1274 | break; |
| 1275 | case bfd_mach_h8300h: |
| 1276 | case bfd_mach_h8300hn: |
| 1277 | set_gdbarch_num_regs (gdbarch, 13); |
| 1278 | set_gdbarch_num_pseudo_regs (gdbarch, 1); |
| 1279 | set_gdbarch_dwarf2_reg_to_regnum (gdbarch, h8300_dbg_reg_to_regnum); |
| 1280 | set_gdbarch_stab_reg_to_regnum (gdbarch, h8300_dbg_reg_to_regnum); |
| 1281 | set_gdbarch_register_name (gdbarch, h8300_register_name); |
| 1282 | if (info.bfd_arch_info->mach != bfd_mach_h8300hn) |
| 1283 | { |
| 1284 | set_gdbarch_ptr_bit (gdbarch, 4 * TARGET_CHAR_BIT); |
| 1285 | set_gdbarch_addr_bit (gdbarch, 4 * TARGET_CHAR_BIT); |
| 1286 | } |
| 1287 | else |
| 1288 | { |
| 1289 | set_gdbarch_ptr_bit (gdbarch, 2 * TARGET_CHAR_BIT); |
| 1290 | set_gdbarch_addr_bit (gdbarch, 2 * TARGET_CHAR_BIT); |
| 1291 | } |
| 1292 | set_gdbarch_return_value (gdbarch, h8300h_return_value); |
| 1293 | break; |
| 1294 | case bfd_mach_h8300s: |
| 1295 | case bfd_mach_h8300sn: |
| 1296 | set_gdbarch_num_regs (gdbarch, 16); |
| 1297 | set_gdbarch_num_pseudo_regs (gdbarch, 2); |
| 1298 | set_gdbarch_dwarf2_reg_to_regnum (gdbarch, h8300s_dbg_reg_to_regnum); |
| 1299 | set_gdbarch_stab_reg_to_regnum (gdbarch, h8300s_dbg_reg_to_regnum); |
| 1300 | set_gdbarch_register_name (gdbarch, h8300s_register_name); |
| 1301 | if (info.bfd_arch_info->mach != bfd_mach_h8300sn) |
| 1302 | { |
| 1303 | set_gdbarch_ptr_bit (gdbarch, 4 * TARGET_CHAR_BIT); |
| 1304 | set_gdbarch_addr_bit (gdbarch, 4 * TARGET_CHAR_BIT); |
| 1305 | } |
| 1306 | else |
| 1307 | { |
| 1308 | set_gdbarch_ptr_bit (gdbarch, 2 * TARGET_CHAR_BIT); |
| 1309 | set_gdbarch_addr_bit (gdbarch, 2 * TARGET_CHAR_BIT); |
| 1310 | } |
| 1311 | set_gdbarch_return_value (gdbarch, h8300h_return_value); |
| 1312 | break; |
| 1313 | case bfd_mach_h8300sx: |
| 1314 | case bfd_mach_h8300sxn: |
| 1315 | set_gdbarch_num_regs (gdbarch, 18); |
| 1316 | set_gdbarch_num_pseudo_regs (gdbarch, 2); |
| 1317 | set_gdbarch_dwarf2_reg_to_regnum (gdbarch, h8300s_dbg_reg_to_regnum); |
| 1318 | set_gdbarch_stab_reg_to_regnum (gdbarch, h8300s_dbg_reg_to_regnum); |
| 1319 | set_gdbarch_register_name (gdbarch, h8300sx_register_name); |
| 1320 | if (info.bfd_arch_info->mach != bfd_mach_h8300sxn) |
| 1321 | { |
| 1322 | set_gdbarch_ptr_bit (gdbarch, 4 * TARGET_CHAR_BIT); |
| 1323 | set_gdbarch_addr_bit (gdbarch, 4 * TARGET_CHAR_BIT); |
| 1324 | } |
| 1325 | else |
| 1326 | { |
| 1327 | set_gdbarch_ptr_bit (gdbarch, 2 * TARGET_CHAR_BIT); |
| 1328 | set_gdbarch_addr_bit (gdbarch, 2 * TARGET_CHAR_BIT); |
| 1329 | } |
| 1330 | set_gdbarch_return_value (gdbarch, h8300h_return_value); |
| 1331 | break; |
| 1332 | } |
| 1333 | |
| 1334 | set_gdbarch_pseudo_register_read (gdbarch, h8300_pseudo_register_read); |
| 1335 | set_gdbarch_pseudo_register_write (gdbarch, h8300_pseudo_register_write); |
| 1336 | |
| 1337 | /* |
| 1338 | * Basic register fields and methods. |
| 1339 | */ |
| 1340 | |
| 1341 | set_gdbarch_sp_regnum (gdbarch, E_SP_REGNUM); |
| 1342 | set_gdbarch_pc_regnum (gdbarch, E_PC_REGNUM); |
| 1343 | set_gdbarch_register_type (gdbarch, h8300_register_type); |
| 1344 | set_gdbarch_print_registers_info (gdbarch, h8300_print_registers_info); |
| 1345 | |
| 1346 | /* |
| 1347 | * Frame Info |
| 1348 | */ |
| 1349 | set_gdbarch_skip_prologue (gdbarch, h8300_skip_prologue); |
| 1350 | |
| 1351 | /* Frame unwinder. */ |
| 1352 | set_gdbarch_unwind_pc (gdbarch, h8300_unwind_pc); |
| 1353 | set_gdbarch_unwind_sp (gdbarch, h8300_unwind_sp); |
| 1354 | set_gdbarch_dummy_id (gdbarch, h8300_dummy_id); |
| 1355 | frame_base_set_default (gdbarch, &h8300_frame_base); |
| 1356 | |
| 1357 | /* |
| 1358 | * Miscelany |
| 1359 | */ |
| 1360 | /* Stack grows up. */ |
| 1361 | set_gdbarch_inner_than (gdbarch, core_addr_lessthan); |
| 1362 | |
| 1363 | set_gdbarch_breakpoint_kind_from_pc (gdbarch, |
| 1364 | h8300_breakpoint::kind_from_pc); |
| 1365 | set_gdbarch_sw_breakpoint_from_kind (gdbarch, |
| 1366 | h8300_breakpoint::bp_from_kind); |
| 1367 | set_gdbarch_push_dummy_call (gdbarch, h8300_push_dummy_call); |
| 1368 | |
| 1369 | set_gdbarch_char_signed (gdbarch, 0); |
| 1370 | set_gdbarch_int_bit (gdbarch, 2 * TARGET_CHAR_BIT); |
| 1371 | set_gdbarch_long_bit (gdbarch, 4 * TARGET_CHAR_BIT); |
| 1372 | set_gdbarch_long_long_bit (gdbarch, 8 * TARGET_CHAR_BIT); |
| 1373 | |
| 1374 | set_gdbarch_wchar_bit (gdbarch, 2 * TARGET_CHAR_BIT); |
| 1375 | set_gdbarch_wchar_signed (gdbarch, 0); |
| 1376 | |
| 1377 | set_gdbarch_double_bit (gdbarch, 4 * TARGET_CHAR_BIT); |
| 1378 | set_gdbarch_double_format (gdbarch, floatformats_ieee_single); |
| 1379 | set_gdbarch_long_double_bit (gdbarch, 4 * TARGET_CHAR_BIT); |
| 1380 | set_gdbarch_long_double_format (gdbarch, floatformats_ieee_single); |
| 1381 | |
| 1382 | set_gdbarch_believe_pcc_promotion (gdbarch, 1); |
| 1383 | |
| 1384 | /* Hook in the DWARF CFI frame unwinder. */ |
| 1385 | dwarf2_append_unwinders (gdbarch); |
| 1386 | frame_unwind_append_unwinder (gdbarch, &h8300_frame_unwind); |
| 1387 | |
| 1388 | return gdbarch; |
| 1389 | |
| 1390 | } |
| 1391 | |
| 1392 | void |
| 1393 | _initialize_h8300_tdep (void) |
| 1394 | { |
| 1395 | register_gdbarch_init (bfd_arch_h8300, h8300_gdbarch_init); |
| 1396 | } |
| 1397 | |
| 1398 | static int |
| 1399 | is_h8300hmode (struct gdbarch *gdbarch) |
| 1400 | { |
| 1401 | return gdbarch_bfd_arch_info (gdbarch)->mach == bfd_mach_h8300sx |
| 1402 | || gdbarch_bfd_arch_info (gdbarch)->mach == bfd_mach_h8300sxn |
| 1403 | || gdbarch_bfd_arch_info (gdbarch)->mach == bfd_mach_h8300s |
| 1404 | || gdbarch_bfd_arch_info (gdbarch)->mach == bfd_mach_h8300sn |
| 1405 | || gdbarch_bfd_arch_info (gdbarch)->mach == bfd_mach_h8300h |
| 1406 | || gdbarch_bfd_arch_info (gdbarch)->mach == bfd_mach_h8300hn; |
| 1407 | } |
| 1408 | |
| 1409 | static int |
| 1410 | is_h8300smode (struct gdbarch *gdbarch) |
| 1411 | { |
| 1412 | return gdbarch_bfd_arch_info (gdbarch)->mach == bfd_mach_h8300sx |
| 1413 | || gdbarch_bfd_arch_info (gdbarch)->mach == bfd_mach_h8300sxn |
| 1414 | || gdbarch_bfd_arch_info (gdbarch)->mach == bfd_mach_h8300s |
| 1415 | || gdbarch_bfd_arch_info (gdbarch)->mach == bfd_mach_h8300sn; |
| 1416 | } |
| 1417 | |
| 1418 | static int |
| 1419 | is_h8300sxmode (struct gdbarch *gdbarch) |
| 1420 | { |
| 1421 | return gdbarch_bfd_arch_info (gdbarch)->mach == bfd_mach_h8300sx |
| 1422 | || gdbarch_bfd_arch_info (gdbarch)->mach == bfd_mach_h8300sxn; |
| 1423 | } |
| 1424 | |
| 1425 | static int |
| 1426 | is_h8300_normal_mode (struct gdbarch *gdbarch) |
| 1427 | { |
| 1428 | return gdbarch_bfd_arch_info (gdbarch)->mach == bfd_mach_h8300sxn |
| 1429 | || gdbarch_bfd_arch_info (gdbarch)->mach == bfd_mach_h8300sn |
| 1430 | || gdbarch_bfd_arch_info (gdbarch)->mach == bfd_mach_h8300hn; |
| 1431 | } |